drivers/net/bnxt/bnxt_ethdev.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) Broadcom Limited.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Broadcom Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <inttypes.h>
  35 #include <stdbool.h>
  36
  37 #include <rte_dev.h>
  38 #include <rte_ethdev.h>
  39 #include <rte_malloc.h>
  40 #include <rte_cycles.h>
  41
  42 #include "bnxt.h"
  43 #include "bnxt_cpr.h"
  44 #include "bnxt_filter.h"
  45 #include "bnxt_hwrm.h"
  46 #include "bnxt_irq.h"
  47 #include "bnxt_ring.h"
  48 #include "bnxt_rxq.h"
  49 #include "bnxt_rxr.h"
  50 #include "bnxt_stats.h"
  51 #include "bnxt_txq.h"
  52 #include "bnxt_txr.h"
  53 #include "bnxt_vnic.h"
  54 #include "hsi_struct_def_dpdk.h"
  55
  56 #define DRV_MODULE_NAME         "bnxt"
  57 static const char bnxt_version[] =
  58         "Broadcom Cumulus driver " DRV_MODULE_NAME "\n";
  59
  60 #define PCI_VENDOR_ID_BROADCOM 0x14E4
  61
  62 #define BROADCOM_DEV_ID_57301 0x16c8
  63 #define BROADCOM_DEV_ID_57302 0x16c9
  64 #define BROADCOM_DEV_ID_57304_PF 0x16ca
  65 #define BROADCOM_DEV_ID_57304_VF 0x16cb
  66 #define BROADCOM_DEV_ID_57417_MF 0x16cc
  67 #define BROADCOM_DEV_ID_NS2 0x16cd
  68 #define BROADCOM_DEV_ID_57311 0x16ce
  69 #define BROADCOM_DEV_ID_57312 0x16cf
  70 #define BROADCOM_DEV_ID_57402 0x16d0
  71 #define BROADCOM_DEV_ID_57404 0x16d1
  72 #define BROADCOM_DEV_ID_57406_PF 0x16d2
  73 #define BROADCOM_DEV_ID_57406_VF 0x16d3
  74 #define BROADCOM_DEV_ID_57402_MF 0x16d4
  75 #define BROADCOM_DEV_ID_57407_RJ45 0x16d5
  76 #define BROADCOM_DEV_ID_57412 0x16d6
  77 #define BROADCOM_DEV_ID_57414 0x16d7
  78 #define BROADCOM_DEV_ID_57416_RJ45 0x16d8
  79 #define BROADCOM_DEV_ID_57417_RJ45 0x16d9
  80 #define BROADCOM_DEV_ID_5741X_VF 0x16dc
  81 #define BROADCOM_DEV_ID_57412_MF 0x16de
  82 #define BROADCOM_DEV_ID_57314 0x16df
  83 #define BROADCOM_DEV_ID_57317_RJ45 0x16e0
  84 #define BROADCOM_DEV_ID_5731X_VF 0x16e1
  85 #define BROADCOM_DEV_ID_57417_SFP 0x16e2
  86 #define BROADCOM_DEV_ID_57416_SFP 0x16e3
  87 #define BROADCOM_DEV_ID_57317_SFP 0x16e4
  88 #define BROADCOM_DEV_ID_57404_MF 0x16e7
  89 #define BROADCOM_DEV_ID_57406_MF 0x16e8
  90 #define BROADCOM_DEV_ID_57407_SFP 0x16e9
  91 #define BROADCOM_DEV_ID_57407_MF 0x16ea
  92 #define BROADCOM_DEV_ID_57414_MF 0x16ec
  93 #define BROADCOM_DEV_ID_57416_MF 0x16ee
  94
  95 static struct rte_pci_id bnxt_pci_id_map[] = {
  96         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57301) },
  97         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57302) },
  98         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_PF) },
  99         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_VF) },
 100         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_NS2) },
 101         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402) },
 102         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404) },
 103         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_PF) },
 104         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_VF) },
 105         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402_MF) },
 106         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_RJ45) },
 107         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404_MF) },
 108         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_MF) },
 109         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_SFP) },
 110         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_MF) },
 111         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5741X_VF) },
 112         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5731X_VF) },
 113         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57314) },
 114         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_MF) },
 115         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57311) },
 116         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57312) },
 117         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412) },
 118         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414) },
 119         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_RJ45) },
 120         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_RJ45) },
 121         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412_MF) },
 122         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_RJ45) },
 123         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_SFP) },
 124         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_SFP) },
 125         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_SFP) },
 126         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_MF) },
 127         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_MF) },
 128         { .vendor_id = 0, /* sentinel */ },
 129 };
 130
 131 #define BNXT_ETH_RSS_SUPPORT (  \
 132         ETH_RSS_IPV4 |          \
 133         ETH_RSS_NONFRAG_IPV4_TCP |      \
 134         ETH_RSS_NONFRAG_IPV4_UDP |      \
 135         ETH_RSS_IPV6 |          \
 136         ETH_RSS_NONFRAG_IPV6_TCP |      \
 137         ETH_RSS_NONFRAG_IPV6_UDP)
 138
 139 static void bnxt_print_link_info(struct rte_eth_dev *eth_dev);
 140 static int bnxt_dev_uninit(struct rte_eth_dev *eth_dev);
 141
 142 /***********************/
 143
 144 /*
 145  * High level utility functions
 146  */
 147
 148 static void bnxt_free_mem(struct bnxt *bp)
 149 {
 150         bnxt_free_filter_mem(bp);
 151         bnxt_free_vnic_attributes(bp);
 152         bnxt_free_vnic_mem(bp);
 153
 154         bnxt_free_stats(bp);
 155         bnxt_free_tx_rings(bp);
 156         bnxt_free_rx_rings(bp);
 157         bnxt_free_def_cp_ring(bp);
 158 }
 159
 160 static int bnxt_alloc_mem(struct bnxt *bp)
 161 {
 162         int rc;
 163
 164         /* Default completion ring */
 165         rc = bnxt_init_def_ring_struct(bp, SOCKET_ID_ANY);
 166         if (rc)
 167                 goto alloc_mem_err;
 168
 169         rc = bnxt_alloc_rings(bp, 0, NULL, NULL,
 170                               bp->def_cp_ring, "def_cp");
 171         if (rc)
 172                 goto alloc_mem_err;
 173
 174         rc = bnxt_alloc_vnic_mem(bp);
 175         if (rc)
 176                 goto alloc_mem_err;
 177
 178         rc = bnxt_alloc_vnic_attributes(bp);
 179         if (rc)
 180                 goto alloc_mem_err;
 181
 182         rc = bnxt_alloc_filter_mem(bp);
 183         if (rc)
 184                 goto alloc_mem_err;
 185
 186         return 0;
 187
 188 alloc_mem_err:
 189         bnxt_free_mem(bp);
 190         return rc;
 191 }
 192
 193 static int bnxt_init_chip(struct bnxt *bp)
 194 {
 195         unsigned int i, rss_idx, fw_idx;
 196         struct rte_eth_link new;
 197         int rc;
 198
 199         rc = bnxt_alloc_all_hwrm_stat_ctxs(bp);
 200         if (rc) {
 201                 RTE_LOG(ERR, PMD, "HWRM stat ctx alloc failure rc: %x\n", rc);
 202                 goto err_out;
 203         }
 204
 205         rc = bnxt_alloc_hwrm_rings(bp);
 206         if (rc) {
 207                 RTE_LOG(ERR, PMD, "HWRM ring alloc failure rc: %x\n", rc);
 208                 goto err_out;
 209         }
 210
 211         rc = bnxt_alloc_all_hwrm_ring_grps(bp);
 212         if (rc) {
 213                 RTE_LOG(ERR, PMD, "HWRM ring grp alloc failure: %x\n", rc);
 214                 goto err_out;
 215         }
 216
 217         rc = bnxt_mq_rx_configure(bp);
 218         if (rc) {
 219                 RTE_LOG(ERR, PMD, "MQ mode configure failure rc: %x\n", rc);
 220                 goto err_out;
 221         }
 222
 223         /* VNIC configuration */
 224         for (i = 0; i < bp->nr_vnics; i++) {
 225                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
 226                 uint32_t size = sizeof(*vnic->fw_grp_ids) * bp->max_ring_grps;
 227
 228                 vnic->fw_grp_ids = rte_zmalloc("vnic_fw_grp_ids", size, 0);
 229                 if (!vnic->fw_grp_ids) {
 230                         RTE_LOG(ERR, PMD,
 231                                     "Failed to alloc %d bytes for group ids\n",
 232                                     size);
 233                         rc = -ENOMEM;
 234                         goto err_out;
 235                 }
 236                 memset(vnic->fw_grp_ids, -1, size);
 237
 238                 rc = bnxt_hwrm_vnic_alloc(bp, vnic);
 239                 if (rc) {
 240                         RTE_LOG(ERR, PMD, "HWRM vnic alloc failure rc: %x\n",
 241                                 rc);
 242                         goto err_out;
 243                 }
 244
 245                 rc = bnxt_hwrm_vnic_ctx_alloc(bp, vnic);
 246                 if (rc) {
 247                         RTE_LOG(ERR, PMD,
 248                                 "HWRM vnic ctx alloc failure rc: %x\n", rc);
 249                         goto err_out;
 250                 }
 251
 252                 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
 253                 if (rc) {
 254                         RTE_LOG(ERR, PMD, "HWRM vnic cfg failure rc: %x\n", rc);
 255                         goto err_out;
 256                 }
 257
 258                 rc = bnxt_set_hwrm_vnic_filters(bp, vnic);
 259                 if (rc) {
 260                         RTE_LOG(ERR, PMD, "HWRM vnic filter failure rc: %x\n",
 261                                 rc);
 262                         goto err_out;
 263                 }
 264                 if (vnic->rss_table && vnic->hash_type) {
 265                         /*
 266                          * Fill the RSS hash & redirection table with
 267                          * ring group ids for all VNICs
 268                          */
 269                         for (rss_idx = 0, fw_idx = 0;
 270                              rss_idx < HW_HASH_INDEX_SIZE;
 271                              rss_idx++, fw_idx++) {
 272                                 if (vnic->fw_grp_ids[fw_idx] ==
 273                                     INVALID_HW_RING_ID)
 274                                         fw_idx = 0;
 275                                 vnic->rss_table[rss_idx] =
 276                                                 vnic->fw_grp_ids[fw_idx];
 277                         }
 278                         rc = bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 279                         if (rc) {
 280                                 RTE_LOG(ERR, PMD,
 281                                         "HWRM vnic set RSS failure rc: %x\n",
 282                                         rc);
 283                                 goto err_out;
 284                         }
 285                 }
 286         }
 287         rc = bnxt_hwrm_cfa_l2_set_rx_mask(bp, &bp->vnic_info[0]);
 288         if (rc) {
 289                 RTE_LOG(ERR, PMD,
 290                         "HWRM cfa l2 rx mask failure rc: %x\n", rc);
 291                 goto err_out;
 292         }
 293
 294         rc = bnxt_get_hwrm_link_config(bp, &new);
 295         if (rc) {
 296                 RTE_LOG(ERR, PMD, "HWRM Get link config failure rc: %x\n", rc);
 297                 goto err_out;
 298         }
 299
 300         if (!bp->link_info.link_up) {
 301                 rc = bnxt_set_hwrm_link_config(bp, true);
 302                 if (rc) {
 303                         RTE_LOG(ERR, PMD,
 304                                 "HWRM link config failure rc: %x\n", rc);
 305                         goto err_out;
 306                 }
 307         }
 308         bnxt_print_link_info(bp->eth_dev);
 309
 310         return 0;
 311
 312 err_out:
 313         bnxt_free_all_hwrm_resources(bp);
 314
 315         return rc;
 316 }
 317
 318 static int bnxt_shutdown_nic(struct bnxt *bp)
 319 {
 320         bnxt_free_all_hwrm_resources(bp);
 321         bnxt_free_all_filters(bp);
 322         bnxt_free_all_vnics(bp);
 323         return 0;
 324 }
 325
 326 static int bnxt_init_nic(struct bnxt *bp)
 327 {
 328         int rc;
 329
 330         rc = bnxt_init_ring_grps(bp);
 331         if (rc)
 332                 return rc;
 333         bnxt_init_vnics(bp);
 334         bnxt_init_filters(bp);
 335
 336         rc = bnxt_init_chip(bp);
 337         if (rc)
 338                 return rc;
 339
 340         return 0;
 341 }
 342
 343 /*
 344  * Device configuration and status function
 345  */
 346
 347 static void bnxt_dev_info_get_op(struct rte_eth_dev *eth_dev,
 348                                   struct rte_eth_dev_info *dev_info)
 349 {
 350         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 351         uint16_t max_vnics, i, j, vpool, vrxq;
 352
 353         /* MAC Specifics */
 354         dev_info->max_mac_addrs = MAX_NUM_MAC_ADDR;
 355         dev_info->max_hash_mac_addrs = 0;
 356
 357         /* PF/VF specifics */
 358         if (BNXT_PF(bp)) {
 359                 dev_info->max_rx_queues = bp->pf.max_rx_rings;
 360                 dev_info->max_tx_queues = bp->pf.max_tx_rings;
 361                 dev_info->max_vfs = bp->pf.active_vfs;
 362                 dev_info->reta_size = HW_HASH_INDEX_SIZE;
 363                 max_vnics = bp->pf.max_vnics;
 364         } else {
 365                 dev_info->max_rx_queues = bp->vf.max_rx_rings;
 366                 dev_info->max_tx_queues = bp->vf.max_tx_rings;
 367                 dev_info->reta_size = HW_HASH_INDEX_SIZE;
 368                 max_vnics = bp->vf.max_vnics;
 369         }
 370
 371         /* Fast path specifics */
 372         dev_info->min_rx_bufsize = 1;
 373         dev_info->max_rx_pktlen = BNXT_MAX_MTU + ETHER_HDR_LEN + ETHER_CRC_LEN
 374                                   + VLAN_TAG_SIZE;
 375         dev_info->rx_offload_capa = DEV_RX_OFFLOAD_VLAN_STRIP |
 376                                         DEV_RX_OFFLOAD_IPV4_CKSUM |
 377                                         DEV_RX_OFFLOAD_UDP_CKSUM |
 378                                         DEV_RX_OFFLOAD_TCP_CKSUM |
 379                                         DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM;
 380         dev_info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT |
 381                                         DEV_TX_OFFLOAD_IPV4_CKSUM |
 382                                         DEV_TX_OFFLOAD_TCP_CKSUM |
 383                                         DEV_TX_OFFLOAD_UDP_CKSUM |
 384                                         DEV_TX_OFFLOAD_TCP_TSO;
 385
 386         /* *INDENT-OFF* */
 387         dev_info->default_rxconf = (struct rte_eth_rxconf) {
 388                 .rx_thresh = {
 389                         .pthresh = 8,
 390                         .hthresh = 8,
 391                         .wthresh = 0,
 392                 },
 393                 .rx_free_thresh = 32,
 394                 /* If no descriptors available, pkts are dropped by default */
 395                 .rx_drop_en = 1,
 396         };
 397
 398         dev_info->default_txconf = (struct rte_eth_txconf) {
 399                 .tx_thresh = {
 400                         .pthresh = 32,
 401                         .hthresh = 0,
 402                         .wthresh = 0,
 403                 },
 404                 .tx_free_thresh = 32,
 405                 .tx_rs_thresh = 32,
 406                 .txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
 407                              ETH_TXQ_FLAGS_NOOFFLOADS,
 408         };
 409         eth_dev->data->dev_conf.intr_conf.lsc = 1;
 410
 411         /* *INDENT-ON* */
 412
 413         /*
 414          * TODO: default_rxconf, default_txconf, rx_desc_lim, and tx_desc_lim
 415          *       need further investigation.
 416          */
 417
 418         /* VMDq resources */
 419         vpool = 64; /* ETH_64_POOLS */
 420         vrxq = 128; /* ETH_VMDQ_DCB_NUM_QUEUES */
 421         for (i = 0; i < 4; vpool >>= 1, i++) {
 422                 if (max_vnics > vpool) {
 423                         for (j = 0; j < 5; vrxq >>= 1, j++) {
 424                                 if (dev_info->max_rx_queues > vrxq) {
 425                                         if (vpool > vrxq)
 426                                                 vpool = vrxq;
 427                                         goto found;
 428                                 }
 429                         }
 430                         /* Not enough resources to support VMDq */
 431                         break;
 432                 }
 433         }
 434         /* Not enough resources to support VMDq */
 435         vpool = 0;
 436         vrxq = 0;
 437 found:
 438         dev_info->max_vmdq_pools = vpool;
 439         dev_info->vmdq_queue_num = vrxq;
 440
 441         dev_info->vmdq_pool_base = 0;
 442         dev_info->vmdq_queue_base = 0;
 443 }
 444
 445 /* Configure the device based on the configuration provided */
 446 static int bnxt_dev_configure_op(struct rte_eth_dev *eth_dev)
 447 {
 448         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 449
 450         bp->rx_queues = (void *)eth_dev->data->rx_queues;
 451         bp->tx_queues = (void *)eth_dev->data->tx_queues;
 452
 453         /* Inherit new configurations */
 454         bp->rx_nr_rings = eth_dev->data->nb_rx_queues;
 455         bp->tx_nr_rings = eth_dev->data->nb_tx_queues;
 456         bp->rx_cp_nr_rings = bp->rx_nr_rings;
 457         bp->tx_cp_nr_rings = bp->tx_nr_rings;
 458
 459         if (eth_dev->data->dev_conf.rxmode.jumbo_frame)
 460                 eth_dev->data->mtu =
 461                                 eth_dev->data->dev_conf.rxmode.max_rx_pkt_len -
 462                                 ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE;
 463         return 0;
 464 }
 465
 466 static void bnxt_print_link_info(struct rte_eth_dev *eth_dev)
 467 {
 468         struct rte_eth_link *link = &eth_dev->data->dev_link;
 469
 470         if (link->link_status)
 471                 RTE_LOG(INFO, PMD, "Port %d Link Up - speed %u Mbps - %s\n",
 472                         (uint8_t)(eth_dev->data->port_id),
 473                         (uint32_t)link->link_speed,
 474                         (link->link_duplex == ETH_LINK_FULL_DUPLEX) ?
 475                         ("full-duplex") : ("half-duplex\n"));
 476         else
 477                 RTE_LOG(INFO, PMD, "Port %d Link Down\n",
 478                         (uint8_t)(eth_dev->data->port_id));
 479 }
 480
 481 static int bnxt_dev_lsc_intr_setup(struct rte_eth_dev *eth_dev)
 482 {
 483         bnxt_print_link_info(eth_dev);
 484         return 0;
 485 }
 486
 487 static int bnxt_dev_start_op(struct rte_eth_dev *eth_dev)
 488 {
 489         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 490         int rc;
 491
 492         bp->dev_stopped = 0;
 493         rc = bnxt_hwrm_func_reset(bp);
 494         if (rc) {
 495                 RTE_LOG(ERR, PMD, "hwrm chip reset failure rc: %x\n", rc);
 496                 rc = -1;
 497                 goto error;
 498         }
 499
 500         rc = bnxt_setup_int(bp);
 501         if (rc)
 502                 goto error;
 503
 504         rc = bnxt_alloc_mem(bp);
 505         if (rc)
 506                 goto error;
 507
 508         rc = bnxt_request_int(bp);
 509         if (rc)
 510                 goto error;
 511
 512         rc = bnxt_init_nic(bp);
 513         if (rc)
 514                 goto error;
 515
 516         bnxt_enable_int(bp);
 517
 518         bnxt_link_update_op(eth_dev, 1);
 519         return 0;
 520
 521 error:
 522         bnxt_shutdown_nic(bp);
 523         bnxt_disable_int(bp);
 524         bnxt_free_int(bp);
 525         bnxt_free_tx_mbufs(bp);
 526         bnxt_free_rx_mbufs(bp);
 527         bnxt_free_mem(bp);
 528         return rc;
 529 }
 530
 531 static int bnxt_dev_set_link_up_op(struct rte_eth_dev *eth_dev)
 532 {
 533         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 534         int rc = 0;
 535
 536         if (!bp->link_info.link_up)
 537                 rc = bnxt_set_hwrm_link_config(bp, true);
 538         if (!rc)
 539                 eth_dev->data->dev_link.link_status = 1;
 540
 541         bnxt_print_link_info(eth_dev);
 542         return 0;
 543 }
 544
 545 static int bnxt_dev_set_link_down_op(struct rte_eth_dev *eth_dev)
 546 {
 547         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 548
 549         eth_dev->data->dev_link.link_status = 0;
 550         bnxt_set_hwrm_link_config(bp, false);
 551         bp->link_info.link_up = 0;
 552
 553         return 0;
 554 }
 555
 556 /* Unload the driver, release resources */
 557 static void bnxt_dev_stop_op(struct rte_eth_dev *eth_dev)
 558 {
 559         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 560
 561         if (bp->eth_dev->data->dev_started) {
 562                 /* TBD: STOP HW queues DMA */
 563                 eth_dev->data->dev_link.link_status = 0;
 564         }
 565         bnxt_set_hwrm_link_config(bp, false);
 566         bnxt_disable_int(bp);
 567         bnxt_free_int(bp);
 568         bnxt_free_tx_mbufs(bp);
 569         bnxt_free_rx_mbufs(bp);
 570         bnxt_shutdown_nic(bp);
 571         bp->dev_stopped = 1;
 572 }
 573
 574 static void bnxt_dev_close_op(struct rte_eth_dev *eth_dev)
 575 {
 576         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 577
 578         if (bp->dev_stopped == 0)
 579                 bnxt_dev_stop_op(eth_dev);
 580
 581         bnxt_free_mem(bp);
 582         if (eth_dev->data->mac_addrs != NULL) {
 583                 rte_free(eth_dev->data->mac_addrs);
 584                 eth_dev->data->mac_addrs = NULL;
 585         }
 586         if (bp->grp_info != NULL) {
 587                 rte_free(bp->grp_info);
 588                 bp->grp_info = NULL;
 589         }
 590
 591         bnxt_dev_uninit(eth_dev);
 592 }
 593
 594 static void bnxt_mac_addr_remove_op(struct rte_eth_dev *eth_dev,
 595                                     uint32_t index)
 596 {
 597         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 598         uint64_t pool_mask = eth_dev->data->mac_pool_sel[index];
 599         struct bnxt_vnic_info *vnic;
 600         struct bnxt_filter_info *filter, *temp_filter;
 601         uint32_t pool = RTE_MIN(MAX_FF_POOLS, ETH_64_POOLS);
 602         uint32_t i;
 603
 604         /*
 605          * Loop through all VNICs from the specified filter flow pools to
 606          * remove the corresponding MAC addr filter
 607          */
 608         for (i = 0; i < pool; i++) {
 609                 if (!(pool_mask & (1ULL << i)))
 610                         continue;
 611
 612                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 613                         filter = STAILQ_FIRST(&vnic->filter);
 614                         while (filter) {
 615                                 temp_filter = STAILQ_NEXT(filter, next);
 616                                 if (filter->mac_index == index) {
 617                                         STAILQ_REMOVE(&vnic->filter, filter,
 618                                                       bnxt_filter_info, next);
 619                                         bnxt_hwrm_clear_filter(bp, filter);
 620                                         filter->mac_index = INVALID_MAC_INDEX;
 621                                         memset(&filter->l2_addr, 0,
 622                                                ETHER_ADDR_LEN);
 623                                         STAILQ_INSERT_TAIL(
 624                                                         &bp->free_filter_list,
 625                                                         filter, next);
 626                                 }
 627                                 filter = temp_filter;
 628                         }
 629                 }
 630         }
 631 }
 632
 633 static void bnxt_mac_addr_add_op(struct rte_eth_dev *eth_dev,
 634                                  struct ether_addr *mac_addr,
 635                                  uint32_t index, uint32_t pool)
 636 {
 637         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 638         struct bnxt_vnic_info *vnic = STAILQ_FIRST(&bp->ff_pool[pool]);
 639         struct bnxt_filter_info *filter;
 640
 641         if (BNXT_VF(bp)) {
 642                 RTE_LOG(ERR, PMD, "Cannot add MAC address to a VF interface\n");
 643                 return;
 644         }
 645
 646         if (!vnic) {
 647                 RTE_LOG(ERR, PMD, "VNIC not found for pool %d!\n", pool);
 648                 return;
 649         }
 650         /* Attach requested MAC address to the new l2_filter */
 651         STAILQ_FOREACH(filter, &vnic->filter, next) {
 652                 if (filter->mac_index == index) {
 653                         RTE_LOG(ERR, PMD,
 654                                 "MAC addr already existed for pool %d\n", pool);
 655                         return;
 656                 }
 657         }
 658         filter = bnxt_alloc_filter(bp);
 659         if (!filter) {
 660                 RTE_LOG(ERR, PMD, "L2 filter alloc failed\n");
 661                 return;
 662         }
 663         STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
 664         filter->mac_index = index;
 665         memcpy(filter->l2_addr, mac_addr, ETHER_ADDR_LEN);
 666         bnxt_hwrm_set_filter(bp, vnic, filter);
 667 }
 668
 669 int bnxt_link_update_op(struct rte_eth_dev *eth_dev, int wait_to_complete)
 670 {
 671         int rc = 0;
 672         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 673         struct rte_eth_link new;
 674         unsigned int cnt = BNXT_LINK_WAIT_CNT;
 675
 676         memset(&new, 0, sizeof(new));
 677         do {
 678                 /* Retrieve link info from hardware */
 679                 rc = bnxt_get_hwrm_link_config(bp, &new);
 680                 if (rc) {
 681                         new.link_speed = ETH_LINK_SPEED_100M;
 682                         new.link_duplex = ETH_LINK_FULL_DUPLEX;
 683                         RTE_LOG(ERR, PMD,
 684                                 "Failed to retrieve link rc = 0x%x!", rc);
 685                         goto out;
 686                 }
 687                 rte_delay_ms(BNXT_LINK_WAIT_INTERVAL);
 688
 689                 if (!wait_to_complete)
 690                         break;
 691         } while (!new.link_status && cnt--);
 692
 693 out:
 694         /* Timed out or success */
 695         if (new.link_status != eth_dev->data->dev_link.link_status ||
 696         new.link_speed != eth_dev->data->dev_link.link_speed) {
 697                 memcpy(&eth_dev->data->dev_link, &new,
 698                         sizeof(struct rte_eth_link));
 699                 bnxt_print_link_info(eth_dev);
 700         }
 701
 702         return rc;
 703 }
 704
 705 static void bnxt_promiscuous_enable_op(struct rte_eth_dev *eth_dev)
 706 {
 707         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 708         struct bnxt_vnic_info *vnic;
 709
 710         if (bp->vnic_info == NULL)
 711                 return;
 712
 713         vnic = &bp->vnic_info[0];
 714
 715         vnic->flags |= BNXT_VNIC_INFO_PROMISC;
 716         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
 717 }
 718
 719 static void bnxt_promiscuous_disable_op(struct rte_eth_dev *eth_dev)
 720 {
 721         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 722         struct bnxt_vnic_info *vnic;
 723
 724         if (bp->vnic_info == NULL)
 725                 return;
 726
 727         vnic = &bp->vnic_info[0];
 728
 729         vnic->flags &= ~BNXT_VNIC_INFO_PROMISC;
 730         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
 731 }
 732
 733 static void bnxt_allmulticast_enable_op(struct rte_eth_dev *eth_dev)
 734 {
 735         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 736         struct bnxt_vnic_info *vnic;
 737
 738         if (bp->vnic_info == NULL)
 739                 return;
 740
 741         vnic = &bp->vnic_info[0];
 742
 743         vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
 744         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
 745 }
 746
 747 static void bnxt_allmulticast_disable_op(struct rte_eth_dev *eth_dev)
 748 {
 749         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 750         struct bnxt_vnic_info *vnic;
 751
 752         if (bp->vnic_info == NULL)
 753                 return;
 754
 755         vnic = &bp->vnic_info[0];
 756
 757         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
 758         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic);
 759 }
 760
 761 static int bnxt_reta_update_op(struct rte_eth_dev *eth_dev,
 762                             struct rte_eth_rss_reta_entry64 *reta_conf,
 763                             uint16_t reta_size)
 764 {
 765         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 766         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 767         struct bnxt_vnic_info *vnic;
 768         int i;
 769
 770         if (!(dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
 771                 return -EINVAL;
 772
 773         if (reta_size != HW_HASH_INDEX_SIZE) {
 774                 RTE_LOG(ERR, PMD, "The configured hash table lookup size "
 775                         "(%d) must equal the size supported by the hardware "
 776                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 777                 return -EINVAL;
 778         }
 779         /* Update the RSS VNIC(s) */
 780         for (i = 0; i < MAX_FF_POOLS; i++) {
 781                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 782                         memcpy(vnic->rss_table, reta_conf, reta_size);
 783
 784                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 785                 }
 786         }
 787         return 0;
 788 }
 789
 790 static int bnxt_reta_query_op(struct rte_eth_dev *eth_dev,
 791                               struct rte_eth_rss_reta_entry64 *reta_conf,
 792                               uint16_t reta_size)
 793 {
 794         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 795         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 796
 797         /* Retrieve from the default VNIC */
 798         if (!vnic)
 799                 return -EINVAL;
 800         if (!vnic->rss_table)
 801                 return -EINVAL;
 802
 803         if (reta_size != HW_HASH_INDEX_SIZE) {
 804                 RTE_LOG(ERR, PMD, "The configured hash table lookup size "
 805                         "(%d) must equal the size supported by the hardware "
 806                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 807                 return -EINVAL;
 808         }
 809         /* EW - need to revisit here copying from u64 to u16 */
 810         memcpy(reta_conf, vnic->rss_table, reta_size);
 811
 812         if (rte_intr_allow_others(&eth_dev->pci_dev->intr_handle)) {
 813                 if (eth_dev->data->dev_conf.intr_conf.lsc != 0)
 814                         bnxt_dev_lsc_intr_setup(eth_dev);
 815         }
 816
 817         return 0;
 818 }
 819
 820 static int bnxt_rss_hash_update_op(struct rte_eth_dev *eth_dev,
 821                                    struct rte_eth_rss_conf *rss_conf)
 822 {
 823         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 824         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 825         struct bnxt_vnic_info *vnic;
 826         uint16_t hash_type = 0;
 827         int i;
 828
 829         /*
 830          * If RSS enablement were different than dev_configure,
 831          * then return -EINVAL
 832          */
 833         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
 834                 if (!rss_conf->rss_hf)
 835                         return -EINVAL;
 836         } else {
 837                 if (rss_conf->rss_hf & BNXT_ETH_RSS_SUPPORT)
 838                         return -EINVAL;
 839         }
 840         if (rss_conf->rss_hf & ETH_RSS_IPV4)
 841                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 842         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_TCP)
 843                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 844         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_UDP)
 845                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 846         if (rss_conf->rss_hf & ETH_RSS_IPV6)
 847                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 848         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_TCP)
 849                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 850         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_UDP)
 851                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 852
 853         /* Update the RSS VNIC(s) */
 854         for (i = 0; i < MAX_FF_POOLS; i++) {
 855                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 856                         vnic->hash_type = hash_type;
 857
 858                         /*
 859                          * Use the supplied key if the key length is
 860                          * acceptable and the rss_key is not NULL
 861                          */
 862                         if (rss_conf->rss_key &&
 863                             rss_conf->rss_key_len <= HW_HASH_KEY_SIZE)
 864                                 memcpy(vnic->rss_hash_key, rss_conf->rss_key,
 865                                        rss_conf->rss_key_len);
 866
 867                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 868                 }
 869         }
 870         return 0;
 871 }
 872
 873 static int bnxt_rss_hash_conf_get_op(struct rte_eth_dev *eth_dev,
 874                                      struct rte_eth_rss_conf *rss_conf)
 875 {
 876         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 877         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 878         int len;
 879         uint32_t hash_types;
 880
 881         /* RSS configuration is the same for all VNICs */
 882         if (vnic && vnic->rss_hash_key) {
 883                 if (rss_conf->rss_key) {
 884                         len = rss_conf->rss_key_len <= HW_HASH_KEY_SIZE ?
 885                               rss_conf->rss_key_len : HW_HASH_KEY_SIZE;
 886                         memcpy(rss_conf->rss_key, vnic->rss_hash_key, len);
 887                 }
 888
 889                 hash_types = vnic->hash_type;
 890                 rss_conf->rss_hf = 0;
 891                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4) {
 892                         rss_conf->rss_hf |= ETH_RSS_IPV4;
 893                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 894                 }
 895                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4) {
 896                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_TCP;
 897                         hash_types &=
 898                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 899                 }
 900                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4) {
 901                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_UDP;
 902                         hash_types &=
 903                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 904                 }
 905                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6) {
 906                         rss_conf->rss_hf |= ETH_RSS_IPV6;
 907                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 908                 }
 909                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6) {
 910                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_TCP;
 911                         hash_types &=
 912                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 913                 }
 914                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6) {
 915                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_UDP;
 916                         hash_types &=
 917                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 918                 }
 919                 if (hash_types) {
 920                         RTE_LOG(ERR, PMD,
 921                                 "Unknwon RSS config from firmware (%08x), RSS disabled",
 922                                 vnic->hash_type);
 923                         return -ENOTSUP;
 924                 }
 925         } else {
 926                 rss_conf->rss_hf = 0;
 927         }
 928         return 0;
 929 }
 930
 931 static int bnxt_flow_ctrl_get_op(struct rte_eth_dev *dev,
 932                                struct rte_eth_fc_conf *fc_conf __rte_unused)
 933 {
 934         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
 935         struct rte_eth_link link_info;
 936         int rc;
 937
 938         rc = bnxt_get_hwrm_link_config(bp, &link_info);
 939         if (rc)
 940                 return rc;
 941
 942         memset(fc_conf, 0, sizeof(*fc_conf));
 943         if (bp->link_info.auto_pause)
 944                 fc_conf->autoneg = 1;
 945         switch (bp->link_info.pause) {
 946         case 0:
 947                 fc_conf->mode = RTE_FC_NONE;
 948                 break;
 949         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX:
 950                 fc_conf->mode = RTE_FC_TX_PAUSE;
 951                 break;
 952         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX:
 953                 fc_conf->mode = RTE_FC_RX_PAUSE;
 954                 break;
 955         case (HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX |
 956                         HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX):
 957                 fc_conf->mode = RTE_FC_FULL;
 958                 break;
 959         }
 960         return 0;
 961 }
 962
 963 static int bnxt_flow_ctrl_set_op(struct rte_eth_dev *dev,
 964                                struct rte_eth_fc_conf *fc_conf)
 965 {
 966         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
 967
 968         if (BNXT_NPAR_PF(bp) || BNXT_VF(bp)) {
 969                 RTE_LOG(ERR, PMD, "Flow Control Settings cannot be modified\n");
 970                 return -ENOTSUP;
 971         }
 972
 973         switch (fc_conf->mode) {
 974         case RTE_FC_NONE:
 975                 bp->link_info.auto_pause = 0;
 976                 bp->link_info.force_pause = 0;
 977                 break;
 978         case RTE_FC_RX_PAUSE:
 979                 if (fc_conf->autoneg) {
 980                         bp->link_info.auto_pause =
 981                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
 982                         bp->link_info.force_pause = 0;
 983                 } else {
 984                         bp->link_info.auto_pause = 0;
 985                         bp->link_info.force_pause =
 986                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
 987                 }
 988                 break;
 989         case RTE_FC_TX_PAUSE:
 990                 if (fc_conf->autoneg) {
 991                         bp->link_info.auto_pause =
 992                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX;
 993                         bp->link_info.force_pause = 0;
 994                 } else {
 995                         bp->link_info.auto_pause = 0;
 996                         bp->link_info.force_pause =
 997                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX;
 998                 }
 999                 break;
1000         case RTE_FC_FULL:
1001                 if (fc_conf->autoneg) {
1002                         bp->link_info.auto_pause =
1003                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX |
1004                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
1005                         bp->link_info.force_pause = 0;
1006                 } else {
1007                         bp->link_info.auto_pause = 0;
1008                         bp->link_info.force_pause =
1009                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX |
1010                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
1011                 }
1012                 break;
1013         }
1014         return bnxt_set_hwrm_link_config(bp, true);
1015 }
1016
1017 /*
1018  * Initialization
1019  */
1020
1021 static struct eth_dev_ops bnxt_dev_ops = {
1022         .dev_infos_get = bnxt_dev_info_get_op,
1023         .dev_close = bnxt_dev_close_op,
1024         .dev_configure = bnxt_dev_configure_op,
1025         .dev_start = bnxt_dev_start_op,
1026         .dev_stop = bnxt_dev_stop_op,
1027         .dev_set_link_up = bnxt_dev_set_link_up_op,
1028         .dev_set_link_down = bnxt_dev_set_link_down_op,
1029         .stats_get = bnxt_stats_get_op,
1030         .stats_reset = bnxt_stats_reset_op,
1031         .rx_queue_setup = bnxt_rx_queue_setup_op,
1032         .rx_queue_release = bnxt_rx_queue_release_op,
1033         .tx_queue_setup = bnxt_tx_queue_setup_op,
1034         .tx_queue_release = bnxt_tx_queue_release_op,
1035         .reta_update = bnxt_reta_update_op,
1036         .reta_query = bnxt_reta_query_op,
1037         .rss_hash_update = bnxt_rss_hash_update_op,
1038         .rss_hash_conf_get = bnxt_rss_hash_conf_get_op,
1039         .link_update = bnxt_link_update_op,
1040         .promiscuous_enable = bnxt_promiscuous_enable_op,
1041         .promiscuous_disable = bnxt_promiscuous_disable_op,
1042         .allmulticast_enable = bnxt_allmulticast_enable_op,
1043         .allmulticast_disable = bnxt_allmulticast_disable_op,
1044         .mac_addr_add = bnxt_mac_addr_add_op,
1045         .mac_addr_remove = bnxt_mac_addr_remove_op,
1046         .flow_ctrl_get = bnxt_flow_ctrl_get_op,
1047         .flow_ctrl_set = bnxt_flow_ctrl_set_op,
1048 };
1049
1050 static bool bnxt_vf_pciid(uint16_t id)
1051 {
1052         if (id == BROADCOM_DEV_ID_57304_VF ||
1053             id == BROADCOM_DEV_ID_57406_VF ||
1054             id == BROADCOM_DEV_ID_5731X_VF ||
1055             id == BROADCOM_DEV_ID_5741X_VF)
1056                 return true;
1057         return false;
1058 }
1059
1060 static int bnxt_init_board(struct rte_eth_dev *eth_dev)
1061 {
1062         int rc;
1063         struct bnxt *bp = eth_dev->data->dev_private;
1064
1065         /* enable device (incl. PCI PM wakeup), and bus-mastering */
1066         if (!eth_dev->pci_dev->mem_resource[0].addr) {
1067                 RTE_LOG(ERR, PMD,
1068                         "Cannot find PCI device base address, aborting\n");
1069                 rc = -ENODEV;
1070                 goto init_err_disable;
1071         }
1072
1073         bp->eth_dev = eth_dev;
1074         bp->pdev = eth_dev->pci_dev;
1075
1076         bp->bar0 = (void *)eth_dev->pci_dev->mem_resource[0].addr;
1077         if (!bp->bar0) {
1078                 RTE_LOG(ERR, PMD, "Cannot map device registers, aborting\n");
1079                 rc = -ENOMEM;
1080                 goto init_err_release;
1081         }
1082         return 0;
1083
1084 init_err_release:
1085         if (bp->bar0)
1086                 bp->bar0 = NULL;
1087
1088 init_err_disable:
1089
1090         return rc;
1091 }
1092
1093 static int
1094 bnxt_dev_init(struct rte_eth_dev *eth_dev)
1095 {
1096         static int version_printed;
1097         struct bnxt *bp;
1098         int rc;
1099
1100         if (version_printed++ == 0)
1101                 RTE_LOG(INFO, PMD, "%s", bnxt_version);
1102
1103         rte_eth_copy_pci_info(eth_dev, eth_dev->pci_dev);
1104         bp = eth_dev->data->dev_private;
1105
1106         if (bnxt_vf_pciid(eth_dev->pci_dev->id.device_id))
1107                 bp->flags |= BNXT_FLAG_VF;
1108
1109         rc = bnxt_init_board(eth_dev);
1110         if (rc) {
1111                 RTE_LOG(ERR, PMD,
1112                         "Board initialization failed rc: %x\n", rc);
1113                 goto error;
1114         }
1115         eth_dev->dev_ops = &bnxt_dev_ops;
1116         eth_dev->rx_pkt_burst = &bnxt_recv_pkts;
1117         eth_dev->tx_pkt_burst = &bnxt_xmit_pkts;
1118
1119         rc = bnxt_alloc_hwrm_resources(bp);
1120         if (rc) {
1121                 RTE_LOG(ERR, PMD,
1122                         "hwrm resource allocation failure rc: %x\n", rc);
1123                 goto error_free;
1124         }
1125         rc = bnxt_hwrm_ver_get(bp);
1126         if (rc)
1127                 goto error_free;
1128         bnxt_hwrm_queue_qportcfg(bp);
1129
1130         bnxt_hwrm_func_qcfg(bp);
1131
1132         /* Get the MAX capabilities for this function */
1133         rc = bnxt_hwrm_func_qcaps(bp);
1134         if (rc) {
1135                 RTE_LOG(ERR, PMD, "hwrm query capability failure rc: %x\n", rc);
1136                 goto error_free;
1137         }
1138         eth_dev->data->mac_addrs = rte_zmalloc("bnxt_mac_addr_tbl",
1139                                         ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR, 0);
1140         if (eth_dev->data->mac_addrs == NULL) {
1141                 RTE_LOG(ERR, PMD,
1142                         "Failed to alloc %u bytes needed to store MAC addr tbl",
1143                         ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR);
1144                 rc = -ENOMEM;
1145                 goto error_free;
1146         }
1147         /* Copy the permanent MAC from the qcap response address now. */
1148         if (BNXT_PF(bp))
1149                 memcpy(bp->mac_addr, bp->pf.mac_addr, sizeof(bp->mac_addr));
1150         else
1151                 memcpy(bp->mac_addr, bp->vf.mac_addr, sizeof(bp->mac_addr));
1152         memcpy(&eth_dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
1153         bp->grp_info = rte_zmalloc("bnxt_grp_info",
1154                                 sizeof(*bp->grp_info) * bp->max_ring_grps, 0);
1155         if (!bp->grp_info) {
1156                 RTE_LOG(ERR, PMD,
1157                         "Failed to alloc %zu bytes needed to store group info table\n",
1158                         sizeof(*bp->grp_info) * bp->max_ring_grps);
1159                 rc = -ENOMEM;
1160                 goto error_free;
1161         }
1162
1163         rc = bnxt_hwrm_func_driver_register(bp, 0,
1164                                             bp->pf.vf_req_fwd);
1165         if (rc) {
1166                 RTE_LOG(ERR, PMD,
1167                         "Failed to register driver");
1168                 rc = -EBUSY;
1169                 goto error_free;
1170         }
1171
1172         RTE_LOG(INFO, PMD,
1173                 DRV_MODULE_NAME " found at mem %" PRIx64 ", node addr %pM\n",
1174                 eth_dev->pci_dev->mem_resource[0].phys_addr,
1175                 eth_dev->pci_dev->mem_resource[0].addr);
1176
1177         bp->dev_stopped = 0;
1178
1179         return 0;
1180
1181 error_free:
1182         eth_dev->driver->eth_dev_uninit(eth_dev);
1183 error:
1184         return rc;
1185 }
1186
1187 static int
1188 bnxt_dev_uninit(struct rte_eth_dev *eth_dev) {
1189         struct bnxt *bp = eth_dev->data->dev_private;
1190         int rc;
1191
1192         if (eth_dev->data->mac_addrs != NULL) {
1193                 rte_free(eth_dev->data->mac_addrs);
1194                 eth_dev->data->mac_addrs = NULL;
1195         }
1196         if (bp->grp_info != NULL) {
1197                 rte_free(bp->grp_info);
1198                 bp->grp_info = NULL;
1199         }
1200         rc = bnxt_hwrm_func_driver_unregister(bp, 0);
1201         bnxt_free_hwrm_resources(bp);
1202         if (bp->dev_stopped == 0)
1203                 bnxt_dev_close_op(eth_dev);
1204         eth_dev->dev_ops = NULL;
1205         eth_dev->rx_pkt_burst = NULL;
1206         eth_dev->tx_pkt_burst = NULL;
1207
1208         return rc;
1209 }
1210
1211 static struct eth_driver bnxt_rte_pmd = {
1212         .pci_drv = {
1213                     .id_table = bnxt_pci_id_map,
1214                     .drv_flags = RTE_PCI_DRV_NEED_MAPPING |
1215                             RTE_PCI_DRV_DETACHABLE | RTE_PCI_DRV_INTR_LSC,
1216                     .probe = rte_eth_dev_pci_probe,
1217                     .remove = rte_eth_dev_pci_remove
1218                     },
1219         .eth_dev_init = bnxt_dev_init,
1220         .eth_dev_uninit = bnxt_dev_uninit,
1221         .dev_private_size = sizeof(struct bnxt),
1222 };
1223
1224 RTE_PMD_REGISTER_PCI(net_bnxt, bnxt_rte_pmd.pci_drv);
1225 RTE_PMD_REGISTER_PCI_TABLE(net_bnxt, bnxt_pci_id_map);