drivers/net/bnxt/bnxt_ethdev.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) Broadcom Limited.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Broadcom Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <inttypes.h>
  35 #include <stdbool.h>
  36
  37 #include <rte_dev.h>
  38 #include <rte_ethdev.h>
  39 #include <rte_ethdev_pci.h>
  40 #include <rte_malloc.h>
  41 #include <rte_cycles.h>
  42
  43 #include "bnxt.h"
  44 #include "bnxt_cpr.h"
  45 #include "bnxt_filter.h"
  46 #include "bnxt_hwrm.h"
  47 #include "bnxt_irq.h"
  48 #include "bnxt_ring.h"
  49 #include "bnxt_rxq.h"
  50 #include "bnxt_rxr.h"
  51 #include "bnxt_stats.h"
  52 #include "bnxt_txq.h"
  53 #include "bnxt_txr.h"
  54 #include "bnxt_vnic.h"
  55 #include "hsi_struct_def_dpdk.h"
  56
  57 #define DRV_MODULE_NAME         "bnxt"
  58 static const char bnxt_version[] =
  59         "Broadcom Cumulus driver " DRV_MODULE_NAME "\n";
  60
  61 #define PCI_VENDOR_ID_BROADCOM 0x14E4
  62
  63 #define BROADCOM_DEV_ID_STRATUS_NIC_VF 0x1609
  64 #define BROADCOM_DEV_ID_STRATUS_NIC 0x1614
  65 #define BROADCOM_DEV_ID_57414_VF 0x16c1
  66 #define BROADCOM_DEV_ID_57301 0x16c8
  67 #define BROADCOM_DEV_ID_57302 0x16c9
  68 #define BROADCOM_DEV_ID_57304_PF 0x16ca
  69 #define BROADCOM_DEV_ID_57304_VF 0x16cb
  70 #define BROADCOM_DEV_ID_57417_MF 0x16cc
  71 #define BROADCOM_DEV_ID_NS2 0x16cd
  72 #define BROADCOM_DEV_ID_57311 0x16ce
  73 #define BROADCOM_DEV_ID_57312 0x16cf
  74 #define BROADCOM_DEV_ID_57402 0x16d0
  75 #define BROADCOM_DEV_ID_57404 0x16d1
  76 #define BROADCOM_DEV_ID_57406_PF 0x16d2
  77 #define BROADCOM_DEV_ID_57406_VF 0x16d3
  78 #define BROADCOM_DEV_ID_57402_MF 0x16d4
  79 #define BROADCOM_DEV_ID_57407_RJ45 0x16d5
  80 #define BROADCOM_DEV_ID_57412 0x16d6
  81 #define BROADCOM_DEV_ID_57414 0x16d7
  82 #define BROADCOM_DEV_ID_57416_RJ45 0x16d8
  83 #define BROADCOM_DEV_ID_57417_RJ45 0x16d9
  84 #define BROADCOM_DEV_ID_5741X_VF 0x16dc
  85 #define BROADCOM_DEV_ID_57412_MF 0x16de
  86 #define BROADCOM_DEV_ID_57314 0x16df
  87 #define BROADCOM_DEV_ID_57317_RJ45 0x16e0
  88 #define BROADCOM_DEV_ID_5731X_VF 0x16e1
  89 #define BROADCOM_DEV_ID_57417_SFP 0x16e2
  90 #define BROADCOM_DEV_ID_57416_SFP 0x16e3
  91 #define BROADCOM_DEV_ID_57317_SFP 0x16e4
  92 #define BROADCOM_DEV_ID_57404_MF 0x16e7
  93 #define BROADCOM_DEV_ID_57406_MF 0x16e8
  94 #define BROADCOM_DEV_ID_57407_SFP 0x16e9
  95 #define BROADCOM_DEV_ID_57407_MF 0x16ea
  96 #define BROADCOM_DEV_ID_57414_MF 0x16ec
  97 #define BROADCOM_DEV_ID_57416_MF 0x16ee
  98
  99 static const struct rte_pci_id bnxt_pci_id_map[] = {
 100         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM,
 101                          BROADCOM_DEV_ID_STRATUS_NIC_VF) },
 102         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_STRATUS_NIC) },
 103         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_VF) },
 104         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57301) },
 105         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57302) },
 106         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_PF) },
 107         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57304_VF) },
 108         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_NS2) },
 109         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402) },
 110         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404) },
 111         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_PF) },
 112         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_VF) },
 113         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57402_MF) },
 114         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_RJ45) },
 115         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57404_MF) },
 116         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57406_MF) },
 117         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_SFP) },
 118         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57407_MF) },
 119         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5741X_VF) },
 120         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_5731X_VF) },
 121         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57314) },
 122         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_MF) },
 123         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57311) },
 124         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57312) },
 125         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412) },
 126         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414) },
 127         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_RJ45) },
 128         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_RJ45) },
 129         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57412_MF) },
 130         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_RJ45) },
 131         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57417_SFP) },
 132         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_SFP) },
 133         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57317_SFP) },
 134         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57414_MF) },
 135         { RTE_PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, BROADCOM_DEV_ID_57416_MF) },
 136         { .vendor_id = 0, /* sentinel */ },
 137 };
 138
 139 #define BNXT_ETH_RSS_SUPPORT (  \
 140         ETH_RSS_IPV4 |          \
 141         ETH_RSS_NONFRAG_IPV4_TCP |      \
 142         ETH_RSS_NONFRAG_IPV4_UDP |      \
 143         ETH_RSS_IPV6 |          \
 144         ETH_RSS_NONFRAG_IPV6_TCP |      \
 145         ETH_RSS_NONFRAG_IPV6_UDP)
 146
 147 static void bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask);
 148
 149 /***********************/
 150
 151 /*
 152  * High level utility functions
 153  */
 154
 155 static void bnxt_free_mem(struct bnxt *bp)
 156 {
 157         bnxt_free_filter_mem(bp);
 158         bnxt_free_vnic_attributes(bp);
 159         bnxt_free_vnic_mem(bp);
 160
 161         bnxt_free_stats(bp);
 162         bnxt_free_tx_rings(bp);
 163         bnxt_free_rx_rings(bp);
 164         bnxt_free_def_cp_ring(bp);
 165 }
 166
 167 static int bnxt_alloc_mem(struct bnxt *bp)
 168 {
 169         int rc;
 170
 171         /* Default completion ring */
 172         rc = bnxt_init_def_ring_struct(bp, SOCKET_ID_ANY);
 173         if (rc)
 174                 goto alloc_mem_err;
 175
 176         rc = bnxt_alloc_rings(bp, 0, NULL, NULL,
 177                               bp->def_cp_ring, "def_cp");
 178         if (rc)
 179                 goto alloc_mem_err;
 180
 181         rc = bnxt_alloc_vnic_mem(bp);
 182         if (rc)
 183                 goto alloc_mem_err;
 184
 185         rc = bnxt_alloc_vnic_attributes(bp);
 186         if (rc)
 187                 goto alloc_mem_err;
 188
 189         rc = bnxt_alloc_filter_mem(bp);
 190         if (rc)
 191                 goto alloc_mem_err;
 192
 193         return 0;
 194
 195 alloc_mem_err:
 196         bnxt_free_mem(bp);
 197         return rc;
 198 }
 199
 200 static int bnxt_init_chip(struct bnxt *bp)
 201 {
 202         unsigned int i, rss_idx, fw_idx;
 203         struct rte_eth_link new;
 204         int rc;
 205
 206         if (bp->eth_dev->data->mtu > ETHER_MTU) {
 207                 bp->eth_dev->data->dev_conf.rxmode.jumbo_frame = 1;
 208                 bp->flags |= BNXT_FLAG_JUMBO;
 209         } else {
 210                 bp->eth_dev->data->dev_conf.rxmode.jumbo_frame = 0;
 211                 bp->flags &= ~BNXT_FLAG_JUMBO;
 212         }
 213
 214         rc = bnxt_alloc_all_hwrm_stat_ctxs(bp);
 215         if (rc) {
 216                 RTE_LOG(ERR, PMD, "HWRM stat ctx alloc failure rc: %x\n", rc);
 217                 goto err_out;
 218         }
 219
 220         rc = bnxt_alloc_hwrm_rings(bp);
 221         if (rc) {
 222                 RTE_LOG(ERR, PMD, "HWRM ring alloc failure rc: %x\n", rc);
 223                 goto err_out;
 224         }
 225
 226         rc = bnxt_alloc_all_hwrm_ring_grps(bp);
 227         if (rc) {
 228                 RTE_LOG(ERR, PMD, "HWRM ring grp alloc failure: %x\n", rc);
 229                 goto err_out;
 230         }
 231
 232         rc = bnxt_mq_rx_configure(bp);
 233         if (rc) {
 234                 RTE_LOG(ERR, PMD, "MQ mode configure failure rc: %x\n", rc);
 235                 goto err_out;
 236         }
 237
 238         /* VNIC configuration */
 239         for (i = 0; i < bp->nr_vnics; i++) {
 240                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
 241
 242                 rc = bnxt_hwrm_vnic_alloc(bp, vnic);
 243                 if (rc) {
 244                         RTE_LOG(ERR, PMD, "HWRM vnic %d alloc failure rc: %x\n",
 245                                 i, rc);
 246                         goto err_out;
 247                 }
 248
 249                 rc = bnxt_hwrm_vnic_ctx_alloc(bp, vnic);
 250                 if (rc) {
 251                         RTE_LOG(ERR, PMD,
 252                                 "HWRM vnic %d ctx alloc failure rc: %x\n",
 253                                 i, rc);
 254                         goto err_out;
 255                 }
 256
 257                 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
 258                 if (rc) {
 259                         RTE_LOG(ERR, PMD, "HWRM vnic %d cfg failure rc: %x\n",
 260                                 i, rc);
 261                         goto err_out;
 262                 }
 263
 264                 rc = bnxt_set_hwrm_vnic_filters(bp, vnic);
 265                 if (rc) {
 266                         RTE_LOG(ERR, PMD,
 267                                 "HWRM vnic %d filter failure rc: %x\n",
 268                                 i, rc);
 269                         goto err_out;
 270                 }
 271                 if (vnic->rss_table && vnic->hash_type) {
 272                         /*
 273                          * Fill the RSS hash & redirection table with
 274                          * ring group ids for all VNICs
 275                          */
 276                         for (rss_idx = 0, fw_idx = 0;
 277                              rss_idx < HW_HASH_INDEX_SIZE;
 278                              rss_idx++, fw_idx++) {
 279                                 if (vnic->fw_grp_ids[fw_idx] ==
 280                                     INVALID_HW_RING_ID)
 281                                         fw_idx = 0;
 282                                 vnic->rss_table[rss_idx] =
 283                                                 vnic->fw_grp_ids[fw_idx];
 284                         }
 285                         rc = bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 286                         if (rc) {
 287                                 RTE_LOG(ERR, PMD,
 288                                         "HWRM vnic %d set RSS failure rc: %x\n",
 289                                         i, rc);
 290                                 goto err_out;
 291                         }
 292                 }
 293
 294                 bnxt_hwrm_vnic_plcmode_cfg(bp, vnic);
 295
 296                 if (bp->eth_dev->data->dev_conf.rxmode.enable_lro)
 297                         bnxt_hwrm_vnic_tpa_cfg(bp, vnic, 1);
 298                 else
 299                         bnxt_hwrm_vnic_tpa_cfg(bp, vnic, 0);
 300         }
 301         rc = bnxt_hwrm_cfa_l2_set_rx_mask(bp, &bp->vnic_info[0], 0, NULL);
 302         if (rc) {
 303                 RTE_LOG(ERR, PMD,
 304                         "HWRM cfa l2 rx mask failure rc: %x\n", rc);
 305                 goto err_out;
 306         }
 307
 308         rc = bnxt_get_hwrm_link_config(bp, &new);
 309         if (rc) {
 310                 RTE_LOG(ERR, PMD, "HWRM Get link config failure rc: %x\n", rc);
 311                 goto err_out;
 312         }
 313
 314         if (!bp->link_info.link_up) {
 315                 rc = bnxt_set_hwrm_link_config(bp, true);
 316                 if (rc) {
 317                         RTE_LOG(ERR, PMD,
 318                                 "HWRM link config failure rc: %x\n", rc);
 319                         goto err_out;
 320                 }
 321         }
 322
 323         return 0;
 324
 325 err_out:
 326         bnxt_free_all_hwrm_resources(bp);
 327
 328         return rc;
 329 }
 330
 331 static int bnxt_shutdown_nic(struct bnxt *bp)
 332 {
 333         bnxt_free_all_hwrm_resources(bp);
 334         bnxt_free_all_filters(bp);
 335         bnxt_free_all_vnics(bp);
 336         return 0;
 337 }
 338
 339 static int bnxt_init_nic(struct bnxt *bp)
 340 {
 341         int rc;
 342
 343         bnxt_init_ring_grps(bp);
 344         bnxt_init_vnics(bp);
 345         bnxt_init_filters(bp);
 346
 347         rc = bnxt_init_chip(bp);
 348         if (rc)
 349                 return rc;
 350
 351         return 0;
 352 }
 353
 354 /*
 355  * Device configuration and status function
 356  */
 357
 358 static void bnxt_dev_info_get_op(struct rte_eth_dev *eth_dev,
 359                                   struct rte_eth_dev_info *dev_info)
 360 {
 361         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 362         uint16_t max_vnics, i, j, vpool, vrxq;
 363
 364         dev_info->pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
 365
 366         /* MAC Specifics */
 367         dev_info->max_mac_addrs = MAX_NUM_MAC_ADDR;
 368         dev_info->max_hash_mac_addrs = 0;
 369
 370         /* PF/VF specifics */
 371         if (BNXT_PF(bp))
 372                 dev_info->max_vfs = bp->pdev->max_vfs;
 373         dev_info->max_rx_queues = bp->max_rx_rings;
 374         dev_info->max_tx_queues = bp->max_tx_rings;
 375         dev_info->reta_size = bp->max_rsscos_ctx;
 376         max_vnics = bp->max_vnics;
 377
 378         /* Fast path specifics */
 379         dev_info->min_rx_bufsize = 1;
 380         dev_info->max_rx_pktlen = BNXT_MAX_MTU + ETHER_HDR_LEN + ETHER_CRC_LEN
 381                                   + VLAN_TAG_SIZE;
 382         dev_info->rx_offload_capa = 0;
 383         dev_info->tx_offload_capa = DEV_TX_OFFLOAD_IPV4_CKSUM |
 384                                         DEV_TX_OFFLOAD_TCP_CKSUM |
 385                                         DEV_TX_OFFLOAD_UDP_CKSUM |
 386                                         DEV_TX_OFFLOAD_TCP_TSO |
 387                                         DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
 388                                         DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
 389                                         DEV_TX_OFFLOAD_GRE_TNL_TSO |
 390                                         DEV_TX_OFFLOAD_IPIP_TNL_TSO |
 391                                         DEV_TX_OFFLOAD_GENEVE_TNL_TSO;
 392
 393         /* *INDENT-OFF* */
 394         dev_info->default_rxconf = (struct rte_eth_rxconf) {
 395                 .rx_thresh = {
 396                         .pthresh = 8,
 397                         .hthresh = 8,
 398                         .wthresh = 0,
 399                 },
 400                 .rx_free_thresh = 32,
 401                 .rx_drop_en = 0,
 402         };
 403
 404         dev_info->default_txconf = (struct rte_eth_txconf) {
 405                 .tx_thresh = {
 406                         .pthresh = 32,
 407                         .hthresh = 0,
 408                         .wthresh = 0,
 409                 },
 410                 .tx_free_thresh = 32,
 411                 .tx_rs_thresh = 32,
 412                 .txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
 413                              ETH_TXQ_FLAGS_NOOFFLOADS,
 414         };
 415         eth_dev->data->dev_conf.intr_conf.lsc = 1;
 416
 417         /* *INDENT-ON* */
 418
 419         /*
 420          * TODO: default_rxconf, default_txconf, rx_desc_lim, and tx_desc_lim
 421          *       need further investigation.
 422          */
 423
 424         /* VMDq resources */
 425         vpool = 64; /* ETH_64_POOLS */
 426         vrxq = 128; /* ETH_VMDQ_DCB_NUM_QUEUES */
 427         for (i = 0; i < 4; vpool >>= 1, i++) {
 428                 if (max_vnics > vpool) {
 429                         for (j = 0; j < 5; vrxq >>= 1, j++) {
 430                                 if (dev_info->max_rx_queues > vrxq) {
 431                                         if (vpool > vrxq)
 432                                                 vpool = vrxq;
 433                                         goto found;
 434                                 }
 435                         }
 436                         /* Not enough resources to support VMDq */
 437                         break;
 438                 }
 439         }
 440         /* Not enough resources to support VMDq */
 441         vpool = 0;
 442         vrxq = 0;
 443 found:
 444         dev_info->max_vmdq_pools = vpool;
 445         dev_info->vmdq_queue_num = vrxq;
 446
 447         dev_info->vmdq_pool_base = 0;
 448         dev_info->vmdq_queue_base = 0;
 449 }
 450
 451 /* Configure the device based on the configuration provided */
 452 static int bnxt_dev_configure_op(struct rte_eth_dev *eth_dev)
 453 {
 454         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 455
 456         bp->rx_queues = (void *)eth_dev->data->rx_queues;
 457         bp->tx_queues = (void *)eth_dev->data->tx_queues;
 458
 459         /* Inherit new configurations */
 460         bp->rx_nr_rings = eth_dev->data->nb_rx_queues;
 461         bp->tx_nr_rings = eth_dev->data->nb_tx_queues;
 462         bp->rx_cp_nr_rings = bp->rx_nr_rings;
 463         bp->tx_cp_nr_rings = bp->tx_nr_rings;
 464
 465         if (eth_dev->data->dev_conf.rxmode.jumbo_frame)
 466                 eth_dev->data->mtu =
 467                                 eth_dev->data->dev_conf.rxmode.max_rx_pkt_len -
 468                                 ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE;
 469         return 0;
 470 }
 471
 472 static inline int
 473 rte_bnxt_atomic_write_link_status(struct rte_eth_dev *eth_dev,
 474                                 struct rte_eth_link *link)
 475 {
 476         struct rte_eth_link *dst = &eth_dev->data->dev_link;
 477         struct rte_eth_link *src = link;
 478
 479         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
 480                                         *(uint64_t *)src) == 0)
 481                 return 1;
 482
 483         return 0;
 484 }
 485
 486 static void bnxt_print_link_info(struct rte_eth_dev *eth_dev)
 487 {
 488         struct rte_eth_link *link = &eth_dev->data->dev_link;
 489
 490         if (link->link_status)
 491                 RTE_LOG(INFO, PMD, "Port %d Link Up - speed %u Mbps - %s\n",
 492                         (uint8_t)(eth_dev->data->port_id),
 493                         (uint32_t)link->link_speed,
 494                         (link->link_duplex == ETH_LINK_FULL_DUPLEX) ?
 495                         ("full-duplex") : ("half-duplex\n"));
 496         else
 497                 RTE_LOG(INFO, PMD, "Port %d Link Down\n",
 498                         (uint8_t)(eth_dev->data->port_id));
 499 }
 500
 501 static int bnxt_dev_lsc_intr_setup(struct rte_eth_dev *eth_dev)
 502 {
 503         bnxt_print_link_info(eth_dev);
 504         return 0;
 505 }
 506
 507 static int bnxt_dev_start_op(struct rte_eth_dev *eth_dev)
 508 {
 509         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 510         int vlan_mask = 0;
 511         int rc;
 512
 513         bp->dev_stopped = 0;
 514
 515         rc = bnxt_init_nic(bp);
 516         if (rc)
 517                 goto error;
 518
 519         bnxt_link_update_op(eth_dev, 0);
 520
 521         if (eth_dev->data->dev_conf.rxmode.hw_vlan_filter)
 522                 vlan_mask |= ETH_VLAN_FILTER_MASK;
 523         if (eth_dev->data->dev_conf.rxmode.hw_vlan_strip)
 524                 vlan_mask |= ETH_VLAN_STRIP_MASK;
 525         bnxt_vlan_offload_set_op(eth_dev, vlan_mask);
 526
 527         return 0;
 528
 529 error:
 530         bnxt_shutdown_nic(bp);
 531         bnxt_free_tx_mbufs(bp);
 532         bnxt_free_rx_mbufs(bp);
 533         return rc;
 534 }
 535
 536 static int bnxt_dev_set_link_up_op(struct rte_eth_dev *eth_dev)
 537 {
 538         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 539
 540         eth_dev->data->dev_link.link_status = 1;
 541         bnxt_set_hwrm_link_config(bp, true);
 542         return 0;
 543 }
 544
 545 static int bnxt_dev_set_link_down_op(struct rte_eth_dev *eth_dev)
 546 {
 547         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 548
 549         eth_dev->data->dev_link.link_status = 0;
 550         bnxt_set_hwrm_link_config(bp, false);
 551         return 0;
 552 }
 553
 554 /* Unload the driver, release resources */
 555 static void bnxt_dev_stop_op(struct rte_eth_dev *eth_dev)
 556 {
 557         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 558
 559         if (bp->eth_dev->data->dev_started) {
 560                 /* TBD: STOP HW queues DMA */
 561                 eth_dev->data->dev_link.link_status = 0;
 562         }
 563         bnxt_set_hwrm_link_config(bp, false);
 564         bnxt_hwrm_port_clr_stats(bp);
 565         bnxt_shutdown_nic(bp);
 566         bp->dev_stopped = 1;
 567 }
 568
 569 static void bnxt_dev_close_op(struct rte_eth_dev *eth_dev)
 570 {
 571         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 572
 573         if (bp->dev_stopped == 0)
 574                 bnxt_dev_stop_op(eth_dev);
 575
 576         bnxt_free_tx_mbufs(bp);
 577         bnxt_free_rx_mbufs(bp);
 578         bnxt_free_mem(bp);
 579         if (eth_dev->data->mac_addrs != NULL) {
 580                 rte_free(eth_dev->data->mac_addrs);
 581                 eth_dev->data->mac_addrs = NULL;
 582         }
 583         if (bp->grp_info != NULL) {
 584                 rte_free(bp->grp_info);
 585                 bp->grp_info = NULL;
 586         }
 587 }
 588
 589 static void bnxt_mac_addr_remove_op(struct rte_eth_dev *eth_dev,
 590                                     uint32_t index)
 591 {
 592         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 593         uint64_t pool_mask = eth_dev->data->mac_pool_sel[index];
 594         struct bnxt_vnic_info *vnic;
 595         struct bnxt_filter_info *filter, *temp_filter;
 596         int i;
 597
 598         /*
 599          * Loop through all VNICs from the specified filter flow pools to
 600          * remove the corresponding MAC addr filter
 601          */
 602         for (i = 0; i < MAX_FF_POOLS; i++) {
 603                 if (!(pool_mask & (1ULL << i)))
 604                         continue;
 605
 606                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 607                         filter = STAILQ_FIRST(&vnic->filter);
 608                         while (filter) {
 609                                 temp_filter = STAILQ_NEXT(filter, next);
 610                                 if (filter->mac_index == index) {
 611                                         STAILQ_REMOVE(&vnic->filter, filter,
 612                                                       bnxt_filter_info, next);
 613                                         bnxt_hwrm_clear_filter(bp, filter);
 614                                         filter->mac_index = INVALID_MAC_INDEX;
 615                                         memset(&filter->l2_addr, 0,
 616                                                ETHER_ADDR_LEN);
 617                                         STAILQ_INSERT_TAIL(
 618                                                         &bp->free_filter_list,
 619                                                         filter, next);
 620                                 }
 621                                 filter = temp_filter;
 622                         }
 623                 }
 624         }
 625 }
 626
 627 static int bnxt_mac_addr_add_op(struct rte_eth_dev *eth_dev,
 628                                 struct ether_addr *mac_addr,
 629                                 uint32_t index, uint32_t pool)
 630 {
 631         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 632         struct bnxt_vnic_info *vnic = STAILQ_FIRST(&bp->ff_pool[pool]);
 633         struct bnxt_filter_info *filter;
 634
 635         if (BNXT_VF(bp)) {
 636                 RTE_LOG(ERR, PMD, "Cannot add MAC address to a VF interface\n");
 637                 return -ENOTSUP;
 638         }
 639
 640         if (!vnic) {
 641                 RTE_LOG(ERR, PMD, "VNIC not found for pool %d!\n", pool);
 642                 return -EINVAL;
 643         }
 644         /* Attach requested MAC address to the new l2_filter */
 645         STAILQ_FOREACH(filter, &vnic->filter, next) {
 646                 if (filter->mac_index == index) {
 647                         RTE_LOG(ERR, PMD,
 648                                 "MAC addr already existed for pool %d\n", pool);
 649                         return -EINVAL;
 650                 }
 651         }
 652         filter = bnxt_alloc_filter(bp);
 653         if (!filter) {
 654                 RTE_LOG(ERR, PMD, "L2 filter alloc failed\n");
 655                 return -ENODEV;
 656         }
 657         STAILQ_INSERT_TAIL(&vnic->filter, filter, next);
 658         filter->mac_index = index;
 659         memcpy(filter->l2_addr, mac_addr, ETHER_ADDR_LEN);
 660         return bnxt_hwrm_set_filter(bp, vnic->fw_vnic_id, filter);
 661 }
 662
 663 int bnxt_link_update_op(struct rte_eth_dev *eth_dev, int wait_to_complete)
 664 {
 665         int rc = 0;
 666         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 667         struct rte_eth_link new;
 668         unsigned int cnt = BNXT_LINK_WAIT_CNT;
 669
 670         memset(&new, 0, sizeof(new));
 671         do {
 672                 /* Retrieve link info from hardware */
 673                 rc = bnxt_get_hwrm_link_config(bp, &new);
 674                 if (rc) {
 675                         new.link_speed = ETH_LINK_SPEED_100M;
 676                         new.link_duplex = ETH_LINK_FULL_DUPLEX;
 677                         RTE_LOG(ERR, PMD,
 678                                 "Failed to retrieve link rc = 0x%x!\n", rc);
 679                         goto out;
 680                 }
 681                 rte_delay_ms(BNXT_LINK_WAIT_INTERVAL);
 682
 683                 if (!wait_to_complete)
 684                         break;
 685         } while (!new.link_status && cnt--);
 686
 687 out:
 688         /* Timed out or success */
 689         if (new.link_status != eth_dev->data->dev_link.link_status ||
 690         new.link_speed != eth_dev->data->dev_link.link_speed) {
 691                 rte_bnxt_atomic_write_link_status(eth_dev, &new);
 692                 bnxt_print_link_info(eth_dev);
 693         }
 694
 695         return rc;
 696 }
 697
 698 static void bnxt_promiscuous_enable_op(struct rte_eth_dev *eth_dev)
 699 {
 700         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 701         struct bnxt_vnic_info *vnic;
 702
 703         if (bp->vnic_info == NULL)
 704                 return;
 705
 706         vnic = &bp->vnic_info[0];
 707
 708         vnic->flags |= BNXT_VNIC_INFO_PROMISC;
 709         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 710 }
 711
 712 static void bnxt_promiscuous_disable_op(struct rte_eth_dev *eth_dev)
 713 {
 714         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 715         struct bnxt_vnic_info *vnic;
 716
 717         if (bp->vnic_info == NULL)
 718                 return;
 719
 720         vnic = &bp->vnic_info[0];
 721
 722         vnic->flags &= ~BNXT_VNIC_INFO_PROMISC;
 723         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 724 }
 725
 726 static void bnxt_allmulticast_enable_op(struct rte_eth_dev *eth_dev)
 727 {
 728         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 729         struct bnxt_vnic_info *vnic;
 730
 731         if (bp->vnic_info == NULL)
 732                 return;
 733
 734         vnic = &bp->vnic_info[0];
 735
 736         vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
 737         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 738 }
 739
 740 static void bnxt_allmulticast_disable_op(struct rte_eth_dev *eth_dev)
 741 {
 742         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 743         struct bnxt_vnic_info *vnic;
 744
 745         if (bp->vnic_info == NULL)
 746                 return;
 747
 748         vnic = &bp->vnic_info[0];
 749
 750         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
 751         bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
 752 }
 753
 754 static int bnxt_reta_update_op(struct rte_eth_dev *eth_dev,
 755                             struct rte_eth_rss_reta_entry64 *reta_conf,
 756                             uint16_t reta_size)
 757 {
 758         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 759         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 760         struct bnxt_vnic_info *vnic;
 761         int i;
 762
 763         if (!(dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG))
 764                 return -EINVAL;
 765
 766         if (reta_size != HW_HASH_INDEX_SIZE) {
 767                 RTE_LOG(ERR, PMD, "The configured hash table lookup size "
 768                         "(%d) must equal the size supported by the hardware "
 769                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 770                 return -EINVAL;
 771         }
 772         /* Update the RSS VNIC(s) */
 773         for (i = 0; i < MAX_FF_POOLS; i++) {
 774                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 775                         memcpy(vnic->rss_table, reta_conf, reta_size);
 776
 777                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 778                 }
 779         }
 780         return 0;
 781 }
 782
 783 static int bnxt_reta_query_op(struct rte_eth_dev *eth_dev,
 784                               struct rte_eth_rss_reta_entry64 *reta_conf,
 785                               uint16_t reta_size)
 786 {
 787         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 788         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 789         struct rte_intr_handle *intr_handle
 790                 = &bp->pdev->intr_handle;
 791
 792         /* Retrieve from the default VNIC */
 793         if (!vnic)
 794                 return -EINVAL;
 795         if (!vnic->rss_table)
 796                 return -EINVAL;
 797
 798         if (reta_size != HW_HASH_INDEX_SIZE) {
 799                 RTE_LOG(ERR, PMD, "The configured hash table lookup size "
 800                         "(%d) must equal the size supported by the hardware "
 801                         "(%d)\n", reta_size, HW_HASH_INDEX_SIZE);
 802                 return -EINVAL;
 803         }
 804         /* EW - need to revisit here copying from u64 to u16 */
 805         memcpy(reta_conf, vnic->rss_table, reta_size);
 806
 807         if (rte_intr_allow_others(intr_handle)) {
 808                 if (eth_dev->data->dev_conf.intr_conf.lsc != 0)
 809                         bnxt_dev_lsc_intr_setup(eth_dev);
 810         }
 811
 812         return 0;
 813 }
 814
 815 static int bnxt_rss_hash_update_op(struct rte_eth_dev *eth_dev,
 816                                    struct rte_eth_rss_conf *rss_conf)
 817 {
 818         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 819         struct rte_eth_conf *dev_conf = &bp->eth_dev->data->dev_conf;
 820         struct bnxt_vnic_info *vnic;
 821         uint16_t hash_type = 0;
 822         int i;
 823
 824         /*
 825          * If RSS enablement were different than dev_configure,
 826          * then return -EINVAL
 827          */
 828         if (dev_conf->rxmode.mq_mode & ETH_MQ_RX_RSS_FLAG) {
 829                 if (!rss_conf->rss_hf)
 830                         return -EINVAL;
 831         } else {
 832                 if (rss_conf->rss_hf & BNXT_ETH_RSS_SUPPORT)
 833                         return -EINVAL;
 834         }
 835         if (rss_conf->rss_hf & ETH_RSS_IPV4)
 836                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 837         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_TCP)
 838                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 839         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV4_UDP)
 840                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 841         if (rss_conf->rss_hf & ETH_RSS_IPV6)
 842                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 843         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_TCP)
 844                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 845         if (rss_conf->rss_hf & ETH_RSS_NONFRAG_IPV6_UDP)
 846                 hash_type |= HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 847
 848         /* Update the RSS VNIC(s) */
 849         for (i = 0; i < MAX_FF_POOLS; i++) {
 850                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
 851                         vnic->hash_type = hash_type;
 852
 853                         /*
 854                          * Use the supplied key if the key length is
 855                          * acceptable and the rss_key is not NULL
 856                          */
 857                         if (rss_conf->rss_key &&
 858                             rss_conf->rss_key_len <= HW_HASH_KEY_SIZE)
 859                                 memcpy(vnic->rss_hash_key, rss_conf->rss_key,
 860                                        rss_conf->rss_key_len);
 861
 862                         bnxt_hwrm_vnic_rss_cfg(bp, vnic);
 863                 }
 864         }
 865         return 0;
 866 }
 867
 868 static int bnxt_rss_hash_conf_get_op(struct rte_eth_dev *eth_dev,
 869                                      struct rte_eth_rss_conf *rss_conf)
 870 {
 871         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
 872         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
 873         int len;
 874         uint32_t hash_types;
 875
 876         /* RSS configuration is the same for all VNICs */
 877         if (vnic && vnic->rss_hash_key) {
 878                 if (rss_conf->rss_key) {
 879                         len = rss_conf->rss_key_len <= HW_HASH_KEY_SIZE ?
 880                               rss_conf->rss_key_len : HW_HASH_KEY_SIZE;
 881                         memcpy(rss_conf->rss_key, vnic->rss_hash_key, len);
 882                 }
 883
 884                 hash_types = vnic->hash_type;
 885                 rss_conf->rss_hf = 0;
 886                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4) {
 887                         rss_conf->rss_hf |= ETH_RSS_IPV4;
 888                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV4;
 889                 }
 890                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4) {
 891                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_TCP;
 892                         hash_types &=
 893                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV4;
 894                 }
 895                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4) {
 896                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV4_UDP;
 897                         hash_types &=
 898                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV4;
 899                 }
 900                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6) {
 901                         rss_conf->rss_hf |= ETH_RSS_IPV6;
 902                         hash_types &= ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_IPV6;
 903                 }
 904                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6) {
 905                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_TCP;
 906                         hash_types &=
 907                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_TCP_IPV6;
 908                 }
 909                 if (hash_types & HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6) {
 910                         rss_conf->rss_hf |= ETH_RSS_NONFRAG_IPV6_UDP;
 911                         hash_types &=
 912                                 ~HWRM_VNIC_RSS_CFG_INPUT_HASH_TYPE_UDP_IPV6;
 913                 }
 914                 if (hash_types) {
 915                         RTE_LOG(ERR, PMD,
 916                                 "Unknwon RSS config from firmware (%08x), RSS disabled",
 917                                 vnic->hash_type);
 918                         return -ENOTSUP;
 919                 }
 920         } else {
 921                 rss_conf->rss_hf = 0;
 922         }
 923         return 0;
 924 }
 925
 926 static int bnxt_flow_ctrl_get_op(struct rte_eth_dev *dev,
 927                                struct rte_eth_fc_conf *fc_conf)
 928 {
 929         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
 930         struct rte_eth_link link_info;
 931         int rc;
 932
 933         rc = bnxt_get_hwrm_link_config(bp, &link_info);
 934         if (rc)
 935                 return rc;
 936
 937         memset(fc_conf, 0, sizeof(*fc_conf));
 938         if (bp->link_info.auto_pause)
 939                 fc_conf->autoneg = 1;
 940         switch (bp->link_info.pause) {
 941         case 0:
 942                 fc_conf->mode = RTE_FC_NONE;
 943                 break;
 944         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX:
 945                 fc_conf->mode = RTE_FC_TX_PAUSE;
 946                 break;
 947         case HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX:
 948                 fc_conf->mode = RTE_FC_RX_PAUSE;
 949                 break;
 950         case (HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_TX |
 951                         HWRM_PORT_PHY_QCFG_OUTPUT_PAUSE_RX):
 952                 fc_conf->mode = RTE_FC_FULL;
 953                 break;
 954         }
 955         return 0;
 956 }
 957
 958 static int bnxt_flow_ctrl_set_op(struct rte_eth_dev *dev,
 959                                struct rte_eth_fc_conf *fc_conf)
 960 {
 961         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
 962
 963         if (BNXT_NPAR_PF(bp) || BNXT_VF(bp)) {
 964                 RTE_LOG(ERR, PMD, "Flow Control Settings cannot be modified\n");
 965                 return -ENOTSUP;
 966         }
 967
 968         switch (fc_conf->mode) {
 969         case RTE_FC_NONE:
 970                 bp->link_info.auto_pause = 0;
 971                 bp->link_info.force_pause = 0;
 972                 break;
 973         case RTE_FC_RX_PAUSE:
 974                 if (fc_conf->autoneg) {
 975                         bp->link_info.auto_pause =
 976                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
 977                         bp->link_info.force_pause = 0;
 978                 } else {
 979                         bp->link_info.auto_pause = 0;
 980                         bp->link_info.force_pause =
 981                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
 982                 }
 983                 break;
 984         case RTE_FC_TX_PAUSE:
 985                 if (fc_conf->autoneg) {
 986                         bp->link_info.auto_pause =
 987                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX;
 988                         bp->link_info.force_pause = 0;
 989                 } else {
 990                         bp->link_info.auto_pause = 0;
 991                         bp->link_info.force_pause =
 992                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX;
 993                 }
 994                 break;
 995         case RTE_FC_FULL:
 996                 if (fc_conf->autoneg) {
 997                         bp->link_info.auto_pause =
 998                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_TX |
 999                                         HWRM_PORT_PHY_CFG_INPUT_AUTO_PAUSE_RX;
1000                         bp->link_info.force_pause = 0;
1001                 } else {
1002                         bp->link_info.auto_pause = 0;
1003                         bp->link_info.force_pause =
1004                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_TX |
1005                                         HWRM_PORT_PHY_CFG_INPUT_FORCE_PAUSE_RX;
1006                 }
1007                 break;
1008         }
1009         return bnxt_set_hwrm_link_config(bp, true);
1010 }
1011
1012 /* Add UDP tunneling port */
1013 static int
1014 bnxt_udp_tunnel_port_add_op(struct rte_eth_dev *eth_dev,
1015                          struct rte_eth_udp_tunnel *udp_tunnel)
1016 {
1017         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1018         uint16_t tunnel_type = 0;
1019         int rc = 0;
1020
1021         switch (udp_tunnel->prot_type) {
1022         case RTE_TUNNEL_TYPE_VXLAN:
1023                 if (bp->vxlan_port_cnt) {
1024                         RTE_LOG(ERR, PMD, "Tunnel Port %d already programmed\n",
1025                                 udp_tunnel->udp_port);
1026                         if (bp->vxlan_port != udp_tunnel->udp_port) {
1027                                 RTE_LOG(ERR, PMD, "Only one port allowed\n");
1028                                 return -ENOSPC;
1029                         }
1030                         bp->vxlan_port_cnt++;
1031                         return 0;
1032                 }
1033                 tunnel_type =
1034                         HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_VXLAN;
1035                 bp->vxlan_port_cnt++;
1036                 break;
1037         case RTE_TUNNEL_TYPE_GENEVE:
1038                 if (bp->geneve_port_cnt) {
1039                         RTE_LOG(ERR, PMD, "Tunnel Port %d already programmed\n",
1040                                 udp_tunnel->udp_port);
1041                         if (bp->geneve_port != udp_tunnel->udp_port) {
1042                                 RTE_LOG(ERR, PMD, "Only one port allowed\n");
1043                                 return -ENOSPC;
1044                         }
1045                         bp->geneve_port_cnt++;
1046                         return 0;
1047                 }
1048                 tunnel_type =
1049                         HWRM_TUNNEL_DST_PORT_ALLOC_INPUT_TUNNEL_TYPE_GENEVE;
1050                 bp->geneve_port_cnt++;
1051                 break;
1052         default:
1053                 RTE_LOG(ERR, PMD, "Tunnel type is not supported\n");
1054                 return -ENOTSUP;
1055         }
1056         rc = bnxt_hwrm_tunnel_dst_port_alloc(bp, udp_tunnel->udp_port,
1057                                              tunnel_type);
1058         return rc;
1059 }
1060
1061 static int
1062 bnxt_udp_tunnel_port_del_op(struct rte_eth_dev *eth_dev,
1063                          struct rte_eth_udp_tunnel *udp_tunnel)
1064 {
1065         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1066         uint16_t tunnel_type = 0;
1067         uint16_t port = 0;
1068         int rc = 0;
1069
1070         switch (udp_tunnel->prot_type) {
1071         case RTE_TUNNEL_TYPE_VXLAN:
1072                 if (!bp->vxlan_port_cnt) {
1073                         RTE_LOG(ERR, PMD, "No Tunnel port configured yet\n");
1074                         return -EINVAL;
1075                 }
1076                 if (bp->vxlan_port != udp_tunnel->udp_port) {
1077                         RTE_LOG(ERR, PMD, "Req Port: %d. Configured port: %d\n",
1078                                 udp_tunnel->udp_port, bp->vxlan_port);
1079                         return -EINVAL;
1080                 }
1081                 if (--bp->vxlan_port_cnt)
1082                         return 0;
1083
1084                 tunnel_type =
1085                         HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN;
1086                 port = bp->vxlan_fw_dst_port_id;
1087                 break;
1088         case RTE_TUNNEL_TYPE_GENEVE:
1089                 if (!bp->geneve_port_cnt) {
1090                         RTE_LOG(ERR, PMD, "No Tunnel port configured yet\n");
1091                         return -EINVAL;
1092                 }
1093                 if (bp->geneve_port != udp_tunnel->udp_port) {
1094                         RTE_LOG(ERR, PMD, "Req Port: %d. Configured port: %d\n",
1095                                 udp_tunnel->udp_port, bp->geneve_port);
1096                         return -EINVAL;
1097                 }
1098                 if (--bp->geneve_port_cnt)
1099                         return 0;
1100
1101                 tunnel_type =
1102                         HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE;
1103                 port = bp->geneve_fw_dst_port_id;
1104                 break;
1105         default:
1106                 RTE_LOG(ERR, PMD, "Tunnel type is not supported\n");
1107                 return -ENOTSUP;
1108         }
1109
1110         rc = bnxt_hwrm_tunnel_dst_port_free(bp, port, tunnel_type);
1111         if (!rc) {
1112                 if (tunnel_type ==
1113                     HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_VXLAN)
1114                         bp->vxlan_port = 0;
1115                 if (tunnel_type ==
1116                     HWRM_TUNNEL_DST_PORT_FREE_INPUT_TUNNEL_TYPE_GENEVE)
1117                         bp->geneve_port = 0;
1118         }
1119         return rc;
1120 }
1121
1122 static int bnxt_del_vlan_filter(struct bnxt *bp, uint16_t vlan_id)
1123 {
1124         struct bnxt_filter_info *filter, *temp_filter, *new_filter;
1125         struct bnxt_vnic_info *vnic;
1126         unsigned int i;
1127         int rc = 0;
1128         uint32_t chk = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN;
1129
1130         /* Cycle through all VNICs */
1131         for (i = 0; i < bp->nr_vnics; i++) {
1132                 /*
1133                  * For each VNIC and each associated filter(s)
1134                  * if VLAN exists && VLAN matches vlan_id
1135                  *      remove the MAC+VLAN filter
1136                  *      add a new MAC only filter
1137                  * else
1138                  *      VLAN filter doesn't exist, just skip and continue
1139                  */
1140                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
1141                         filter = STAILQ_FIRST(&vnic->filter);
1142                         while (filter) {
1143                                 temp_filter = STAILQ_NEXT(filter, next);
1144
1145                                 if (filter->enables & chk &&
1146                                     filter->l2_ovlan == vlan_id) {
1147                                         /* Must delete the filter */
1148                                         STAILQ_REMOVE(&vnic->filter, filter,
1149                                                       bnxt_filter_info, next);
1150                                         bnxt_hwrm_clear_filter(bp, filter);
1151                                         STAILQ_INSERT_TAIL(
1152                                                         &bp->free_filter_list,
1153                                                         filter, next);
1154
1155                                         /*
1156                                          * Need to examine to see if the MAC
1157                                          * filter already existed or not before
1158                                          * allocating a new one
1159                                          */
1160
1161                                         new_filter = bnxt_alloc_filter(bp);
1162                                         if (!new_filter) {
1163                                                 RTE_LOG(ERR, PMD,
1164                                                         "MAC/VLAN filter alloc failed\n");
1165                                                 rc = -ENOMEM;
1166                                                 goto exit;
1167                                         }
1168                                         STAILQ_INSERT_TAIL(&vnic->filter,
1169                                                            new_filter, next);
1170                                         /* Inherit MAC from previous filter */
1171                                         new_filter->mac_index =
1172                                                         filter->mac_index;
1173                                         memcpy(new_filter->l2_addr,
1174                                                filter->l2_addr, ETHER_ADDR_LEN);
1175                                         /* MAC only filter */
1176                                         rc = bnxt_hwrm_set_filter(bp,
1177                                                         vnic->fw_vnic_id,
1178                                                         new_filter);
1179                                         if (rc)
1180                                                 goto exit;
1181                                         RTE_LOG(INFO, PMD,
1182                                                 "Del Vlan filter for %d\n",
1183                                                 vlan_id);
1184                                 }
1185                                 filter = temp_filter;
1186                         }
1187                 }
1188         }
1189 exit:
1190         return rc;
1191 }
1192
1193 static int bnxt_add_vlan_filter(struct bnxt *bp, uint16_t vlan_id)
1194 {
1195         struct bnxt_filter_info *filter, *temp_filter, *new_filter;
1196         struct bnxt_vnic_info *vnic;
1197         unsigned int i;
1198         int rc = 0;
1199         uint32_t en = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN |
1200                 HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN_MASK;
1201         uint32_t chk = HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_OVLAN;
1202
1203         /* Cycle through all VNICs */
1204         for (i = 0; i < bp->nr_vnics; i++) {
1205                 /*
1206                  * For each VNIC and each associated filter(s)
1207                  * if VLAN exists:
1208                  *   if VLAN matches vlan_id
1209                  *      VLAN filter already exists, just skip and continue
1210                  *   else
1211                  *      add a new MAC+VLAN filter
1212                  * else
1213                  *   Remove the old MAC only filter
1214                  *    Add a new MAC+VLAN filter
1215                  */
1216                 STAILQ_FOREACH(vnic, &bp->ff_pool[i], next) {
1217                         filter = STAILQ_FIRST(&vnic->filter);
1218                         while (filter) {
1219                                 temp_filter = STAILQ_NEXT(filter, next);
1220
1221                                 if (filter->enables & chk) {
1222                                         if (filter->l2_ovlan == vlan_id)
1223                                                 goto cont;
1224                                 } else {
1225                                         /* Must delete the MAC filter */
1226                                         STAILQ_REMOVE(&vnic->filter, filter,
1227                                                       bnxt_filter_info, next);
1228                                         bnxt_hwrm_clear_filter(bp, filter);
1229                                         filter->l2_ovlan = 0;
1230                                         STAILQ_INSERT_TAIL(
1231                                                         &bp->free_filter_list,
1232                                                         filter, next);
1233                                 }
1234                                 new_filter = bnxt_alloc_filter(bp);
1235                                 if (!new_filter) {
1236                                         RTE_LOG(ERR, PMD,
1237                                                 "MAC/VLAN filter alloc failed\n");
1238                                         rc = -ENOMEM;
1239                                         goto exit;
1240                                 }
1241                                 STAILQ_INSERT_TAIL(&vnic->filter, new_filter,
1242                                                    next);
1243                                 /* Inherit MAC from the previous filter */
1244                                 new_filter->mac_index = filter->mac_index;
1245                                 memcpy(new_filter->l2_addr, filter->l2_addr,
1246                                        ETHER_ADDR_LEN);
1247                                 /* MAC + VLAN ID filter */
1248                                 new_filter->l2_ovlan = vlan_id;
1249                                 new_filter->l2_ovlan_mask = 0xF000;
1250                                 new_filter->enables |= en;
1251                                 rc = bnxt_hwrm_set_filter(bp, vnic->fw_vnic_id,
1252                                                           new_filter);
1253                                 if (rc)
1254                                         goto exit;
1255                                 RTE_LOG(INFO, PMD,
1256                                         "Added Vlan filter for %d\n", vlan_id);
1257 cont:
1258                                 filter = temp_filter;
1259                         }
1260                 }
1261         }
1262 exit:
1263         return rc;
1264 }
1265
1266 static int bnxt_vlan_filter_set_op(struct rte_eth_dev *eth_dev,
1267                                    uint16_t vlan_id, int on)
1268 {
1269         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1270
1271         /* These operations apply to ALL existing MAC/VLAN filters */
1272         if (on)
1273                 return bnxt_add_vlan_filter(bp, vlan_id);
1274         else
1275                 return bnxt_del_vlan_filter(bp, vlan_id);
1276 }
1277
1278 static void
1279 bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask)
1280 {
1281         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1282         unsigned int i;
1283
1284         if (mask & ETH_VLAN_FILTER_MASK) {
1285                 if (!dev->data->dev_conf.rxmode.hw_vlan_filter) {
1286                         /* Remove any VLAN filters programmed */
1287                         for (i = 0; i < 4095; i++)
1288                                 bnxt_del_vlan_filter(bp, i);
1289                 }
1290                 RTE_LOG(INFO, PMD, "VLAN Filtering: %d\n",
1291                         dev->data->dev_conf.rxmode.hw_vlan_filter);
1292         }
1293
1294         if (mask & ETH_VLAN_STRIP_MASK) {
1295                 /* Enable or disable VLAN stripping */
1296                 for (i = 0; i < bp->nr_vnics; i++) {
1297                         struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
1298                         if (dev->data->dev_conf.rxmode.hw_vlan_strip)
1299                                 vnic->vlan_strip = true;
1300                         else
1301                                 vnic->vlan_strip = false;
1302                         bnxt_hwrm_vnic_cfg(bp, vnic);
1303                 }
1304                 RTE_LOG(INFO, PMD, "VLAN Strip Offload: %d\n",
1305                         dev->data->dev_conf.rxmode.hw_vlan_strip);
1306         }
1307
1308         if (mask & ETH_VLAN_EXTEND_MASK)
1309                 RTE_LOG(ERR, PMD, "Extend VLAN Not supported\n");
1310 }
1311
1312 static void
1313 bnxt_set_default_mac_addr_op(struct rte_eth_dev *dev, struct ether_addr *addr)
1314 {
1315         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1316         /* Default Filter is tied to VNIC 0 */
1317         struct bnxt_vnic_info *vnic = &bp->vnic_info[0];
1318         struct bnxt_filter_info *filter;
1319         int rc;
1320
1321         if (BNXT_VF(bp))
1322                 return;
1323
1324         memcpy(bp->mac_addr, addr, sizeof(bp->mac_addr));
1325         memcpy(&dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
1326
1327         STAILQ_FOREACH(filter, &vnic->filter, next) {
1328                 /* Default Filter is at Index 0 */
1329                 if (filter->mac_index != 0)
1330                         continue;
1331                 rc = bnxt_hwrm_clear_filter(bp, filter);
1332                 if (rc)
1333                         break;
1334                 memcpy(filter->l2_addr, bp->mac_addr, ETHER_ADDR_LEN);
1335                 memset(filter->l2_addr_mask, 0xff, ETHER_ADDR_LEN);
1336                 filter->flags |= HWRM_CFA_L2_FILTER_ALLOC_INPUT_FLAGS_PATH_RX;
1337                 filter->enables |=
1338                         HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR |
1339                         HWRM_CFA_L2_FILTER_ALLOC_INPUT_ENABLES_L2_ADDR_MASK;
1340                 rc = bnxt_hwrm_set_filter(bp, vnic->fw_vnic_id, filter);
1341                 if (rc)
1342                         break;
1343                 filter->mac_index = 0;
1344                 RTE_LOG(DEBUG, PMD, "Set MAC addr\n");
1345         }
1346 }
1347
1348 static int
1349 bnxt_dev_set_mc_addr_list_op(struct rte_eth_dev *eth_dev,
1350                           struct ether_addr *mc_addr_set,
1351                           uint32_t nb_mc_addr)
1352 {
1353         struct bnxt *bp = (struct bnxt *)eth_dev->data->dev_private;
1354         char *mc_addr_list = (char *)mc_addr_set;
1355         struct bnxt_vnic_info *vnic;
1356         uint32_t off = 0, i = 0;
1357
1358         vnic = &bp->vnic_info[0];
1359
1360         if (nb_mc_addr > BNXT_MAX_MC_ADDRS) {
1361                 vnic->flags |= BNXT_VNIC_INFO_ALLMULTI;
1362                 goto allmulti;
1363         }
1364
1365         /* TODO Check for Duplicate mcast addresses */
1366         vnic->flags &= ~BNXT_VNIC_INFO_ALLMULTI;
1367         for (i = 0; i < nb_mc_addr; i++) {
1368                 memcpy(vnic->mc_list + off, &mc_addr_list[i], ETHER_ADDR_LEN);
1369                 off += ETHER_ADDR_LEN;
1370         }
1371
1372         vnic->mc_addr_cnt = i;
1373
1374 allmulti:
1375         return bnxt_hwrm_cfa_l2_set_rx_mask(bp, vnic, 0, NULL);
1376 }
1377
1378 static int
1379 bnxt_fw_version_get(struct rte_eth_dev *dev, char *fw_version, size_t fw_size)
1380 {
1381         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1382         uint8_t fw_major = (bp->fw_ver >> 24) & 0xff;
1383         uint8_t fw_minor = (bp->fw_ver >> 16) & 0xff;
1384         uint8_t fw_updt = (bp->fw_ver >> 8) & 0xff;
1385         int ret;
1386
1387         ret = snprintf(fw_version, fw_size, "%d.%d.%d",
1388                         fw_major, fw_minor, fw_updt);
1389
1390         ret += 1; /* add the size of '\0' */
1391         if (fw_size < (uint32_t)ret)
1392                 return ret;
1393         else
1394                 return 0;
1395 }
1396
1397 static void
1398 bnxt_rxq_info_get_op(struct rte_eth_dev *dev, uint16_t queue_id,
1399         struct rte_eth_rxq_info *qinfo)
1400 {
1401         struct bnxt_rx_queue *rxq;
1402
1403         rxq = dev->data->rx_queues[queue_id];
1404
1405         qinfo->mp = rxq->mb_pool;
1406         qinfo->scattered_rx = dev->data->scattered_rx;
1407         qinfo->nb_desc = rxq->nb_rx_desc;
1408
1409         qinfo->conf.rx_free_thresh = rxq->rx_free_thresh;
1410         qinfo->conf.rx_drop_en = 0;
1411         qinfo->conf.rx_deferred_start = 0;
1412 }
1413
1414 static void
1415 bnxt_txq_info_get_op(struct rte_eth_dev *dev, uint16_t queue_id,
1416         struct rte_eth_txq_info *qinfo)
1417 {
1418         struct bnxt_tx_queue *txq;
1419
1420         txq = dev->data->tx_queues[queue_id];
1421
1422         qinfo->nb_desc = txq->nb_tx_desc;
1423
1424         qinfo->conf.tx_thresh.pthresh = txq->pthresh;
1425         qinfo->conf.tx_thresh.hthresh = txq->hthresh;
1426         qinfo->conf.tx_thresh.wthresh = txq->wthresh;
1427
1428         qinfo->conf.tx_free_thresh = txq->tx_free_thresh;
1429         qinfo->conf.tx_rs_thresh = 0;
1430         qinfo->conf.txq_flags = txq->txq_flags;
1431         qinfo->conf.tx_deferred_start = txq->tx_deferred_start;
1432 }
1433
1434 static int bnxt_mtu_set_op(struct rte_eth_dev *eth_dev, uint16_t new_mtu)
1435 {
1436         struct bnxt *bp = eth_dev->data->dev_private;
1437         struct rte_eth_dev_info dev_info;
1438         uint32_t max_dev_mtu;
1439         uint32_t rc = 0;
1440         uint32_t i;
1441
1442         bnxt_dev_info_get_op(eth_dev, &dev_info);
1443         max_dev_mtu = dev_info.max_rx_pktlen -
1444                       ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE * 2;
1445
1446         if (new_mtu < ETHER_MIN_MTU || new_mtu > max_dev_mtu) {
1447                 RTE_LOG(ERR, PMD, "MTU requested must be within (%d, %d)\n",
1448                         ETHER_MIN_MTU, max_dev_mtu);
1449                 return -EINVAL;
1450         }
1451
1452
1453         if (new_mtu > ETHER_MTU) {
1454                 bp->flags |= BNXT_FLAG_JUMBO;
1455                 eth_dev->data->dev_conf.rxmode.jumbo_frame = 1;
1456         } else {
1457                 eth_dev->data->dev_conf.rxmode.jumbo_frame = 0;
1458                 bp->flags &= ~BNXT_FLAG_JUMBO;
1459         }
1460
1461         eth_dev->data->dev_conf.rxmode.max_rx_pkt_len =
1462                 new_mtu + ETHER_HDR_LEN + ETHER_CRC_LEN + VLAN_TAG_SIZE * 2;
1463
1464         eth_dev->data->mtu = new_mtu;
1465         RTE_LOG(INFO, PMD, "New MTU is %d\n", eth_dev->data->mtu);
1466
1467         for (i = 0; i < bp->nr_vnics; i++) {
1468                 struct bnxt_vnic_info *vnic = &bp->vnic_info[i];
1469
1470                 vnic->mru = bp->eth_dev->data->mtu + ETHER_HDR_LEN +
1471                                         ETHER_CRC_LEN + VLAN_TAG_SIZE * 2;
1472                 rc = bnxt_hwrm_vnic_cfg(bp, vnic);
1473                 if (rc)
1474                         break;
1475
1476                 rc = bnxt_hwrm_vnic_plcmode_cfg(bp, vnic);
1477                 if (rc)
1478                         return rc;
1479         }
1480
1481         return rc;
1482 }
1483
1484 static int
1485 bnxt_vlan_pvid_set_op(struct rte_eth_dev *dev, uint16_t pvid, int on)
1486 {
1487         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1488         uint16_t vlan = bp->vlan;
1489         int rc;
1490
1491         if (BNXT_NPAR_PF(bp) || BNXT_VF(bp)) {
1492                 RTE_LOG(ERR, PMD,
1493                         "PVID cannot be modified for this function\n");
1494                 return -ENOTSUP;
1495         }
1496         bp->vlan = on ? pvid : 0;
1497
1498         rc = bnxt_hwrm_set_default_vlan(bp, 0, 0);
1499         if (rc)
1500                 bp->vlan = vlan;
1501         return rc;
1502 }
1503
1504 static int
1505 bnxt_dev_led_on_op(struct rte_eth_dev *dev)
1506 {
1507         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1508
1509         return bnxt_hwrm_port_led_cfg(bp, true);
1510 }
1511
1512 static int
1513 bnxt_dev_led_off_op(struct rte_eth_dev *dev)
1514 {
1515         struct bnxt *bp = (struct bnxt *)dev->data->dev_private;
1516
1517         return bnxt_hwrm_port_led_cfg(bp, false);
1518 }
1519
1520 /*
1521  * Initialization
1522  */
1523
1524 static const struct eth_dev_ops bnxt_dev_ops = {
1525         .dev_infos_get = bnxt_dev_info_get_op,
1526         .dev_close = bnxt_dev_close_op,
1527         .dev_configure = bnxt_dev_configure_op,
1528         .dev_start = bnxt_dev_start_op,
1529         .dev_stop = bnxt_dev_stop_op,
1530         .dev_set_link_up = bnxt_dev_set_link_up_op,
1531         .dev_set_link_down = bnxt_dev_set_link_down_op,
1532         .stats_get = bnxt_stats_get_op,
1533         .stats_reset = bnxt_stats_reset_op,
1534         .rx_queue_setup = bnxt_rx_queue_setup_op,
1535         .rx_queue_release = bnxt_rx_queue_release_op,
1536         .tx_queue_setup = bnxt_tx_queue_setup_op,
1537         .tx_queue_release = bnxt_tx_queue_release_op,
1538         .reta_update = bnxt_reta_update_op,
1539         .reta_query = bnxt_reta_query_op,
1540         .rss_hash_update = bnxt_rss_hash_update_op,
1541         .rss_hash_conf_get = bnxt_rss_hash_conf_get_op,
1542         .link_update = bnxt_link_update_op,
1543         .promiscuous_enable = bnxt_promiscuous_enable_op,
1544         .promiscuous_disable = bnxt_promiscuous_disable_op,
1545         .allmulticast_enable = bnxt_allmulticast_enable_op,
1546         .allmulticast_disable = bnxt_allmulticast_disable_op,
1547         .mac_addr_add = bnxt_mac_addr_add_op,
1548         .mac_addr_remove = bnxt_mac_addr_remove_op,
1549         .flow_ctrl_get = bnxt_flow_ctrl_get_op,
1550         .flow_ctrl_set = bnxt_flow_ctrl_set_op,
1551         .udp_tunnel_port_add  = bnxt_udp_tunnel_port_add_op,
1552         .udp_tunnel_port_del  = bnxt_udp_tunnel_port_del_op,
1553         .vlan_filter_set = bnxt_vlan_filter_set_op,
1554         .vlan_offload_set = bnxt_vlan_offload_set_op,
1555         .vlan_pvid_set = bnxt_vlan_pvid_set_op,
1556         .mtu_set = bnxt_mtu_set_op,
1557         .mac_addr_set = bnxt_set_default_mac_addr_op,
1558         .xstats_get = bnxt_dev_xstats_get_op,
1559         .xstats_get_names = bnxt_dev_xstats_get_names_op,
1560         .xstats_reset = bnxt_dev_xstats_reset_op,
1561         .fw_version_get = bnxt_fw_version_get,
1562         .set_mc_addr_list = bnxt_dev_set_mc_addr_list_op,
1563         .rxq_info_get = bnxt_rxq_info_get_op,
1564         .txq_info_get = bnxt_txq_info_get_op,
1565         .dev_led_on = bnxt_dev_led_on_op,
1566         .dev_led_off = bnxt_dev_led_off_op,
1567 };
1568
1569 static bool bnxt_vf_pciid(uint16_t id)
1570 {
1571         if (id == BROADCOM_DEV_ID_57304_VF ||
1572             id == BROADCOM_DEV_ID_57406_VF ||
1573             id == BROADCOM_DEV_ID_5731X_VF ||
1574             id == BROADCOM_DEV_ID_5741X_VF ||
1575             id == BROADCOM_DEV_ID_57414_VF ||
1576             id == BROADCOM_DEV_ID_STRATUS_NIC_VF)
1577                 return true;
1578         return false;
1579 }
1580
1581 static int bnxt_init_board(struct rte_eth_dev *eth_dev)
1582 {
1583         struct bnxt *bp = eth_dev->data->dev_private;
1584         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
1585         int rc;
1586
1587         /* enable device (incl. PCI PM wakeup), and bus-mastering */
1588         if (!pci_dev->mem_resource[0].addr) {
1589                 RTE_LOG(ERR, PMD,
1590                         "Cannot find PCI device base address, aborting\n");
1591                 rc = -ENODEV;
1592                 goto init_err_disable;
1593         }
1594
1595         bp->eth_dev = eth_dev;
1596         bp->pdev = pci_dev;
1597
1598         bp->bar0 = (void *)pci_dev->mem_resource[0].addr;
1599         if (!bp->bar0) {
1600                 RTE_LOG(ERR, PMD, "Cannot map device registers, aborting\n");
1601                 rc = -ENOMEM;
1602                 goto init_err_release;
1603         }
1604         return 0;
1605
1606 init_err_release:
1607         if (bp->bar0)
1608                 bp->bar0 = NULL;
1609
1610 init_err_disable:
1611
1612         return rc;
1613 }
1614
1615 static int bnxt_dev_uninit(struct rte_eth_dev *eth_dev);
1616
1617 #define ALLOW_FUNC(x)   \
1618         { \
1619                 typeof(x) arg = (x); \
1620                 bp->pf.vf_req_fwd[((arg) >> 5)] &= \
1621                 ~rte_cpu_to_le_32(1 << ((arg) & 0x1f)); \
1622         }
1623 static int
1624 bnxt_dev_init(struct rte_eth_dev *eth_dev)
1625 {
1626         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
1627         char mz_name[RTE_MEMZONE_NAMESIZE];
1628         const struct rte_memzone *mz = NULL;
1629         static int version_printed;
1630         uint32_t total_alloc_len;
1631         phys_addr_t mz_phys_addr;
1632         struct bnxt *bp;
1633         int rc;
1634
1635         if (version_printed++ == 0)
1636                 RTE_LOG(INFO, PMD, "%s\n", bnxt_version);
1637
1638         rte_eth_copy_pci_info(eth_dev, pci_dev);
1639         eth_dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE;
1640
1641         bp = eth_dev->data->dev_private;
1642
1643         rte_atomic64_init(&bp->rx_mbuf_alloc_fail);
1644         bp->dev_stopped = 1;
1645
1646         if (bnxt_vf_pciid(pci_dev->id.device_id))
1647                 bp->flags |= BNXT_FLAG_VF;
1648
1649         rc = bnxt_init_board(eth_dev);
1650         if (rc) {
1651                 RTE_LOG(ERR, PMD,
1652                         "Board initialization failed rc: %x\n", rc);
1653                 goto error;
1654         }
1655         eth_dev->dev_ops = &bnxt_dev_ops;
1656         eth_dev->rx_pkt_burst = &bnxt_recv_pkts;
1657         eth_dev->tx_pkt_burst = &bnxt_xmit_pkts;
1658
1659         if (BNXT_PF(bp) && pci_dev->id.device_id != BROADCOM_DEV_ID_NS2) {
1660                 snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
1661                          "bnxt_%04x:%02x:%02x:%02x-%s", pci_dev->addr.domain,
1662                          pci_dev->addr.bus, pci_dev->addr.devid,
1663                          pci_dev->addr.function, "rx_port_stats");
1664                 mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
1665                 mz = rte_memzone_lookup(mz_name);
1666                 total_alloc_len = RTE_CACHE_LINE_ROUNDUP(
1667                                 sizeof(struct rx_port_stats) + 512);
1668                 if (!mz) {
1669                         mz = rte_memzone_reserve(mz_name, total_alloc_len,
1670                                                  SOCKET_ID_ANY,
1671                                                  RTE_MEMZONE_2MB |
1672                                                  RTE_MEMZONE_SIZE_HINT_ONLY);
1673                         if (mz == NULL)
1674                                 return -ENOMEM;
1675                 }
1676                 memset(mz->addr, 0, mz->len);
1677                 mz_phys_addr = mz->phys_addr;
1678                 if ((unsigned long)mz->addr == mz_phys_addr) {
1679                         RTE_LOG(WARNING, PMD,
1680                                 "Memzone physical address same as virtual.\n");
1681                         RTE_LOG(WARNING, PMD,
1682                                 "Using rte_mem_virt2phy()\n");
1683                         mz_phys_addr = rte_mem_virt2phy(mz->addr);
1684                         if (mz_phys_addr == 0) {
1685                                 RTE_LOG(ERR, PMD,
1686                                 "unable to map address to physical memory\n");
1687                                 return -ENOMEM;
1688                         }
1689                 }
1690
1691                 bp->rx_mem_zone = (const void *)mz;
1692                 bp->hw_rx_port_stats = mz->addr;
1693                 bp->hw_rx_port_stats_map = mz_phys_addr;
1694
1695                 snprintf(mz_name, RTE_MEMZONE_NAMESIZE,
1696                          "bnxt_%04x:%02x:%02x:%02x-%s", pci_dev->addr.domain,
1697                          pci_dev->addr.bus, pci_dev->addr.devid,
1698                          pci_dev->addr.function, "tx_port_stats");
1699                 mz_name[RTE_MEMZONE_NAMESIZE - 1] = 0;
1700                 mz = rte_memzone_lookup(mz_name);
1701                 total_alloc_len = RTE_CACHE_LINE_ROUNDUP(
1702                                 sizeof(struct tx_port_stats) + 512);
1703                 if (!mz) {
1704                         mz = rte_memzone_reserve(mz_name, total_alloc_len,
1705                                                  SOCKET_ID_ANY,
1706                                                  RTE_MEMZONE_2MB |
1707                                                  RTE_MEMZONE_SIZE_HINT_ONLY);
1708                         if (mz == NULL)
1709                                 return -ENOMEM;
1710                 }
1711                 memset(mz->addr, 0, mz->len);
1712                 mz_phys_addr = mz->phys_addr;
1713                 if ((unsigned long)mz->addr == mz_phys_addr) {
1714                         RTE_LOG(WARNING, PMD,
1715                                 "Memzone physical address same as virtual.\n");
1716                         RTE_LOG(WARNING, PMD,
1717                                 "Using rte_mem_virt2phy()\n");
1718                         mz_phys_addr = rte_mem_virt2phy(mz->addr);
1719                         if (mz_phys_addr == 0) {
1720                                 RTE_LOG(ERR, PMD,
1721                                 "unable to map address to physical memory\n");
1722                                 return -ENOMEM;
1723                         }
1724                 }
1725
1726                 bp->tx_mem_zone = (const void *)mz;
1727                 bp->hw_tx_port_stats = mz->addr;
1728                 bp->hw_tx_port_stats_map = mz_phys_addr;
1729
1730                 bp->flags |= BNXT_FLAG_PORT_STATS;
1731         }
1732
1733         rc = bnxt_alloc_hwrm_resources(bp);
1734         if (rc) {
1735                 RTE_LOG(ERR, PMD,
1736                         "hwrm resource allocation failure rc: %x\n", rc);
1737                 goto error_free;
1738         }
1739         rc = bnxt_hwrm_ver_get(bp);
1740         if (rc)
1741                 goto error_free;
1742         bnxt_hwrm_queue_qportcfg(bp);
1743
1744         bnxt_hwrm_func_qcfg(bp);
1745
1746         /* Get the MAX capabilities for this function */
1747         rc = bnxt_hwrm_func_qcaps(bp);
1748         if (rc) {
1749                 RTE_LOG(ERR, PMD, "hwrm query capability failure rc: %x\n", rc);
1750                 goto error_free;
1751         }
1752         if (bp->max_tx_rings == 0) {
1753                 RTE_LOG(ERR, PMD, "No TX rings available!\n");
1754                 rc = -EBUSY;
1755                 goto error_free;
1756         }
1757         eth_dev->data->mac_addrs = rte_zmalloc("bnxt_mac_addr_tbl",
1758                                         ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR, 0);
1759         if (eth_dev->data->mac_addrs == NULL) {
1760                 RTE_LOG(ERR, PMD,
1761                         "Failed to alloc %u bytes needed to store MAC addr tbl",
1762                         ETHER_ADDR_LEN * MAX_NUM_MAC_ADDR);
1763                 rc = -ENOMEM;
1764                 goto error_free;
1765         }
1766         /* Copy the permanent MAC from the qcap response address now. */
1767         memcpy(bp->mac_addr, bp->dflt_mac_addr, sizeof(bp->mac_addr));
1768         memcpy(&eth_dev->data->mac_addrs[0], bp->mac_addr, ETHER_ADDR_LEN);
1769         bp->grp_info = rte_zmalloc("bnxt_grp_info",
1770                                 sizeof(*bp->grp_info) * bp->max_ring_grps, 0);
1771         if (!bp->grp_info) {
1772                 RTE_LOG(ERR, PMD,
1773                         "Failed to alloc %zu bytes needed to store group info table\n",
1774                         sizeof(*bp->grp_info) * bp->max_ring_grps);
1775                 rc = -ENOMEM;
1776                 goto error_free;
1777         }
1778
1779         /* Forward all requests if firmware is new enough */
1780         if (((bp->fw_ver >= ((20 << 24) | (6 << 16) | (100 << 8))) &&
1781             (bp->fw_ver < ((20 << 24) | (7 << 16)))) ||
1782             ((bp->fw_ver >= ((20 << 24) | (8 << 16))))) {
1783                 memset(bp->pf.vf_req_fwd, 0xff, sizeof(bp->pf.vf_req_fwd));
1784         } else {
1785                 RTE_LOG(WARNING, PMD,
1786                         "Firmware too old for VF mailbox functionality\n");
1787                 memset(bp->pf.vf_req_fwd, 0, sizeof(bp->pf.vf_req_fwd));
1788         }
1789
1790         /*
1791          * The following are used for driver cleanup.  If we disallow these,
1792          * VF drivers can't clean up cleanly.
1793          */
1794         ALLOW_FUNC(HWRM_FUNC_DRV_UNRGTR);
1795         ALLOW_FUNC(HWRM_VNIC_FREE);
1796         ALLOW_FUNC(HWRM_RING_FREE);
1797         ALLOW_FUNC(HWRM_RING_GRP_FREE);
1798         ALLOW_FUNC(HWRM_VNIC_RSS_COS_LB_CTX_FREE);
1799         ALLOW_FUNC(HWRM_CFA_L2_FILTER_FREE);
1800         ALLOW_FUNC(HWRM_STAT_CTX_FREE);
1801         rc = bnxt_hwrm_func_driver_register(bp);
1802         if (rc) {
1803                 RTE_LOG(ERR, PMD,
1804                         "Failed to register driver");
1805                 rc = -EBUSY;
1806                 goto error_free;
1807         }
1808
1809         RTE_LOG(INFO, PMD,
1810                 DRV_MODULE_NAME " found at mem %" PRIx64 ", node addr %pM\n",
1811                 pci_dev->mem_resource[0].phys_addr,
1812                 pci_dev->mem_resource[0].addr);
1813
1814         rc = bnxt_hwrm_func_reset(bp);
1815         if (rc) {
1816                 RTE_LOG(ERR, PMD, "hwrm chip reset failure rc: %x\n", rc);
1817                 rc = -1;
1818                 goto error_free;
1819         }
1820
1821         if (BNXT_PF(bp)) {
1822                 //if (bp->pf.active_vfs) {
1823                         // TODO: Deallocate VF resources?
1824                 //}
1825                 if (bp->pdev->max_vfs) {
1826                         rc = bnxt_hwrm_allocate_vfs(bp, bp->pdev->max_vfs);
1827                         if (rc) {
1828                                 RTE_LOG(ERR, PMD, "Failed to allocate VFs\n");
1829                                 goto error_free;
1830                         }
1831                 } else {
1832                         rc = bnxt_hwrm_allocate_pf_only(bp);
1833                         if (rc) {
1834                                 RTE_LOG(ERR, PMD,
1835                                         "Failed to allocate PF resources\n");
1836                                 goto error_free;
1837                         }
1838                 }
1839         }
1840
1841         bnxt_hwrm_port_led_qcaps(bp);
1842
1843         rc = bnxt_setup_int(bp);
1844         if (rc)
1845                 goto error_free;
1846
1847         rc = bnxt_alloc_mem(bp);
1848         if (rc)
1849                 goto error_free_int;
1850
1851         rc = bnxt_request_int(bp);
1852         if (rc)
1853                 goto error_free_int;
1854
1855         rc = bnxt_alloc_def_cp_ring(bp);
1856         if (rc)
1857                 goto error_free_int;
1858
1859         bnxt_enable_int(bp);
1860
1861         return 0;
1862
1863 error_free_int:
1864         bnxt_disable_int(bp);
1865         bnxt_free_def_cp_ring(bp);
1866         bnxt_hwrm_func_buf_unrgtr(bp);
1867         bnxt_free_int(bp);
1868         bnxt_free_mem(bp);
1869 error_free:
1870         bnxt_dev_uninit(eth_dev);
1871 error:
1872         return rc;
1873 }
1874
1875 static int
1876 bnxt_dev_uninit(struct rte_eth_dev *eth_dev) {
1877         struct bnxt *bp = eth_dev->data->dev_private;
1878         int rc;
1879
1880         bnxt_disable_int(bp);
1881         bnxt_free_int(bp);
1882         bnxt_free_mem(bp);
1883         if (eth_dev->data->mac_addrs != NULL) {
1884                 rte_free(eth_dev->data->mac_addrs);
1885                 eth_dev->data->mac_addrs = NULL;
1886         }
1887         if (bp->grp_info != NULL) {
1888                 rte_free(bp->grp_info);
1889                 bp->grp_info = NULL;
1890         }
1891         rc = bnxt_hwrm_func_driver_unregister(bp, 0);
1892         bnxt_free_hwrm_resources(bp);
1893         rte_memzone_free((const struct rte_memzone *)bp->tx_mem_zone);
1894         rte_memzone_free((const struct rte_memzone *)bp->rx_mem_zone);
1895         if (bp->dev_stopped == 0)
1896                 bnxt_dev_close_op(eth_dev);
1897         if (bp->pf.vf_info)
1898                 rte_free(bp->pf.vf_info);
1899         eth_dev->dev_ops = NULL;
1900         eth_dev->rx_pkt_burst = NULL;
1901         eth_dev->tx_pkt_burst = NULL;
1902
1903         return rc;
1904 }
1905
1906 static int bnxt_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1907         struct rte_pci_device *pci_dev)
1908 {
1909         return rte_eth_dev_pci_generic_probe(pci_dev, sizeof(struct bnxt),
1910                 bnxt_dev_init);
1911 }
1912
1913 static int bnxt_pci_remove(struct rte_pci_device *pci_dev)
1914 {
1915         return rte_eth_dev_pci_generic_remove(pci_dev, bnxt_dev_uninit);
1916 }
1917
1918 static struct rte_pci_driver bnxt_rte_pmd = {
1919         .id_table = bnxt_pci_id_map,
1920         .drv_flags = RTE_PCI_DRV_NEED_MAPPING |
1921                 RTE_PCI_DRV_INTR_LSC,
1922         .probe = bnxt_pci_probe,
1923         .remove = bnxt_pci_remove,
1924 };
1925
1926 static bool
1927 is_device_supported(struct rte_eth_dev *dev, struct rte_pci_driver *drv)
1928 {
1929         if (strcmp(dev->device->driver->name, drv->driver.name))
1930                 return false;
1931
1932         return true;
1933 }
1934
1935 bool is_bnxt_supported(struct rte_eth_dev *dev)
1936 {
1937         return is_device_supported(dev, &bnxt_rte_pmd);
1938 }
1939
1940 RTE_PMD_REGISTER_PCI(net_bnxt, bnxt_rte_pmd);
1941 RTE_PMD_REGISTER_PCI_TABLE(net_bnxt, bnxt_pci_id_map);
1942 RTE_PMD_REGISTER_KMOD_DEP(net_bnxt, "* igb_uio | uio_pci_generic | vfio-pci");