drivers/net/dpaa/dpaa_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  *
   3  *   Copyright 2016 Freescale Semiconductor, Inc. All rights reserved.
   4  *   Copyright 2017 NXP
   5  *
   6  */
   7 /* System headers */
   8 #include <stdio.h>
   9 #include <inttypes.h>
  10 #include <unistd.h>
  11 #include <limits.h>
  12 #include <sched.h>
  13 #include <signal.h>
  14 #include <pthread.h>
  15 #include <sys/types.h>
  16 #include <sys/syscall.h>
  17
  18 #include <rte_byteorder.h>
  19 #include <rte_common.h>
  20 #include <rte_interrupts.h>
  21 #include <rte_log.h>
  22 #include <rte_debug.h>
  23 #include <rte_pci.h>
  24 #include <rte_atomic.h>
  25 #include <rte_branch_prediction.h>
  26 #include <rte_memory.h>
  27 #include <rte_tailq.h>
  28 #include <rte_eal.h>
  29 #include <rte_alarm.h>
  30 #include <rte_ether.h>
  31 #include <rte_ethdev_driver.h>
  32 #include <rte_malloc.h>
  33 #include <rte_ring.h>
  34
  35 #include <rte_dpaa_bus.h>
  36 #include <rte_dpaa_logs.h>
  37 #include <dpaa_mempool.h>
  38
  39 #include <dpaa_ethdev.h>
  40 #include <dpaa_rxtx.h>
  41 #include <rte_pmd_dpaa.h>
  42
  43 #include <fsl_usd.h>
  44 #include <fsl_qman.h>
  45 #include <fsl_bman.h>
  46 #include <fsl_fman.h>
  47
  48 /* Supported Rx offloads */
  49 static uint64_t dev_rx_offloads_sup =
  50                 DEV_RX_OFFLOAD_JUMBO_FRAME |
  51                 DEV_RX_OFFLOAD_SCATTER;
  52
  53 /* Rx offloads which cannot be disabled */
  54 static uint64_t dev_rx_offloads_nodis =
  55                 DEV_RX_OFFLOAD_IPV4_CKSUM |
  56                 DEV_RX_OFFLOAD_UDP_CKSUM |
  57                 DEV_RX_OFFLOAD_TCP_CKSUM |
  58                 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM;
  59
  60 /* Supported Tx offloads */
  61 static uint64_t dev_tx_offloads_sup;
  62
  63 /* Tx offloads which cannot be disabled */
  64 static uint64_t dev_tx_offloads_nodis =
  65                 DEV_TX_OFFLOAD_IPV4_CKSUM |
  66                 DEV_TX_OFFLOAD_UDP_CKSUM |
  67                 DEV_TX_OFFLOAD_TCP_CKSUM |
  68                 DEV_TX_OFFLOAD_SCTP_CKSUM |
  69                 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
  70                 DEV_TX_OFFLOAD_MULTI_SEGS |
  71                 DEV_TX_OFFLOAD_MT_LOCKFREE |
  72                 DEV_TX_OFFLOAD_MBUF_FAST_FREE;
  73
  74 /* Keep track of whether QMAN and BMAN have been globally initialized */
  75 static int is_global_init;
  76 static int default_q;   /* use default queue - FMC is not executed*/
  77 /* At present we only allow up to 4 push mode queues as default - as each of
  78  * this queue need dedicated portal and we are short of portals.
  79  */
  80 #define DPAA_MAX_PUSH_MODE_QUEUE       8
  81 #define DPAA_DEFAULT_PUSH_MODE_QUEUE   4
  82
  83 static int dpaa_push_mode_max_queue = DPAA_DEFAULT_PUSH_MODE_QUEUE;
  84 static int dpaa_push_queue_idx; /* Queue index which are in push mode*/
  85
  86
  87 /* Per FQ Taildrop in frame count */
  88 static unsigned int td_threshold = CGR_RX_PERFQ_THRESH;
  89
  90 struct rte_dpaa_xstats_name_off {
  91         char name[RTE_ETH_XSTATS_NAME_SIZE];
  92         uint32_t offset;
  93 };
  94
  95 static const struct rte_dpaa_xstats_name_off dpaa_xstats_strings[] = {
  96         {"rx_align_err",
  97                 offsetof(struct dpaa_if_stats, raln)},
  98         {"rx_valid_pause",
  99                 offsetof(struct dpaa_if_stats, rxpf)},
 100         {"rx_fcs_err",
 101                 offsetof(struct dpaa_if_stats, rfcs)},
 102         {"rx_vlan_frame",
 103                 offsetof(struct dpaa_if_stats, rvlan)},
 104         {"rx_frame_err",
 105                 offsetof(struct dpaa_if_stats, rerr)},
 106         {"rx_drop_err",
 107                 offsetof(struct dpaa_if_stats, rdrp)},
 108         {"rx_undersized",
 109                 offsetof(struct dpaa_if_stats, rund)},
 110         {"rx_oversize_err",
 111                 offsetof(struct dpaa_if_stats, rovr)},
 112         {"rx_fragment_pkt",
 113                 offsetof(struct dpaa_if_stats, rfrg)},
 114         {"tx_valid_pause",
 115                 offsetof(struct dpaa_if_stats, txpf)},
 116         {"tx_fcs_err",
 117                 offsetof(struct dpaa_if_stats, terr)},
 118         {"tx_vlan_frame",
 119                 offsetof(struct dpaa_if_stats, tvlan)},
 120         {"rx_undersized",
 121                 offsetof(struct dpaa_if_stats, tund)},
 122 };
 123
 124 static struct rte_dpaa_driver rte_dpaa_pmd;
 125
 126 static void
 127 dpaa_eth_dev_info(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info);
 128
 129 static inline void
 130 dpaa_poll_queue_default_config(struct qm_mcc_initfq *opts)
 131 {
 132         memset(opts, 0, sizeof(struct qm_mcc_initfq));
 133         opts->we_mask = QM_INITFQ_WE_FQCTRL | QM_INITFQ_WE_CONTEXTA;
 134         opts->fqd.fq_ctrl = QM_FQCTRL_AVOIDBLOCK | QM_FQCTRL_CTXASTASHING |
 135                            QM_FQCTRL_PREFERINCACHE;
 136         opts->fqd.context_a.stashing.exclusive = 0;
 137         if (dpaa_svr_family != SVR_LS1046A_FAMILY)
 138                 opts->fqd.context_a.stashing.annotation_cl =
 139                                                 DPAA_IF_RX_ANNOTATION_STASH;
 140         opts->fqd.context_a.stashing.data_cl = DPAA_IF_RX_DATA_STASH;
 141         opts->fqd.context_a.stashing.context_cl = DPAA_IF_RX_CONTEXT_STASH;
 142 }
 143
 144 static int
 145 dpaa_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
 146 {
 147         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 148         uint32_t frame_size = mtu + ETHER_HDR_LEN + ETHER_CRC_LEN
 149                                 + VLAN_TAG_SIZE;
 150         uint32_t buffsz = dev->data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM;
 151
 152         PMD_INIT_FUNC_TRACE();
 153
 154         if (mtu < ETHER_MIN_MTU || frame_size > DPAA_MAX_RX_PKT_LEN)
 155                 return -EINVAL;
 156         /*
 157          * Refuse mtu that requires the support of scattered packets
 158          * when this feature has not been enabled before.
 159          */
 160         if (dev->data->min_rx_buf_size &&
 161                 !dev->data->scattered_rx && frame_size > buffsz) {
 162                 DPAA_PMD_ERR("SG not enabled, will not fit in one buffer");
 163                 return -EINVAL;
 164         }
 165
 166         /* check <seg size> * <max_seg>  >= max_frame */
 167         if (dev->data->min_rx_buf_size && dev->data->scattered_rx &&
 168                 (frame_size > buffsz * DPAA_SGT_MAX_ENTRIES)) {
 169                 DPAA_PMD_ERR("Too big to fit for Max SG list %d",
 170                                 buffsz * DPAA_SGT_MAX_ENTRIES);
 171                 return -EINVAL;
 172         }
 173
 174         if (frame_size > ETHER_MAX_LEN)
 175                 dev->data->dev_conf.rxmode.offloads &=
 176                                                 DEV_RX_OFFLOAD_JUMBO_FRAME;
 177         else
 178                 dev->data->dev_conf.rxmode.offloads &=
 179                                                 ~DEV_RX_OFFLOAD_JUMBO_FRAME;
 180
 181         dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
 182
 183         fman_if_set_maxfrm(dpaa_intf->fif, frame_size);
 184
 185         return 0;
 186 }
 187
 188 static int
 189 dpaa_eth_dev_configure(struct rte_eth_dev *dev)
 190 {
 191         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 192         struct rte_eth_conf *eth_conf = &dev->data->dev_conf;
 193         uint64_t rx_offloads = eth_conf->rxmode.offloads;
 194         uint64_t tx_offloads = eth_conf->txmode.offloads;
 195
 196         PMD_INIT_FUNC_TRACE();
 197
 198         /* Rx offloads validation */
 199         if (dev_rx_offloads_nodis & ~rx_offloads) {
 200                 DPAA_PMD_WARN(
 201                 "Rx offloads non configurable - requested 0x%" PRIx64
 202                 " ignored 0x%" PRIx64,
 203                         rx_offloads, dev_rx_offloads_nodis);
 204         }
 205
 206         /* Tx offloads validation */
 207         if (dev_tx_offloads_nodis & ~tx_offloads) {
 208                 DPAA_PMD_WARN(
 209                 "Tx offloads non configurable - requested 0x%" PRIx64
 210                 " ignored 0x%" PRIx64,
 211                         tx_offloads, dev_tx_offloads_nodis);
 212         }
 213
 214         if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
 215                 uint32_t max_len;
 216
 217                 DPAA_PMD_DEBUG("enabling jumbo");
 218
 219                 if (dev->data->dev_conf.rxmode.max_rx_pkt_len <=
 220                     DPAA_MAX_RX_PKT_LEN)
 221                         max_len = dev->data->dev_conf.rxmode.max_rx_pkt_len;
 222                 else {
 223                         DPAA_PMD_INFO("enabling jumbo override conf max len=%d "
 224                                 "supported is %d",
 225                                 dev->data->dev_conf.rxmode.max_rx_pkt_len,
 226                                 DPAA_MAX_RX_PKT_LEN);
 227                         max_len = DPAA_MAX_RX_PKT_LEN;
 228                 }
 229
 230                 fman_if_set_maxfrm(dpaa_intf->fif, max_len);
 231                 dev->data->mtu = max_len
 232                                 - ETHER_HDR_LEN - ETHER_CRC_LEN - VLAN_TAG_SIZE;
 233         }
 234
 235         if (rx_offloads & DEV_RX_OFFLOAD_SCATTER) {
 236                 DPAA_PMD_DEBUG("enabling scatter mode");
 237                 fman_if_set_sg(dpaa_intf->fif, 1);
 238                 dev->data->scattered_rx = 1;
 239         }
 240
 241         return 0;
 242 }
 243
 244 static const uint32_t *
 245 dpaa_supported_ptypes_get(struct rte_eth_dev *dev)
 246 {
 247         static const uint32_t ptypes[] = {
 248                 /*todo -= add more types */
 249                 RTE_PTYPE_L2_ETHER,
 250                 RTE_PTYPE_L3_IPV4,
 251                 RTE_PTYPE_L3_IPV4_EXT,
 252                 RTE_PTYPE_L3_IPV6,
 253                 RTE_PTYPE_L3_IPV6_EXT,
 254                 RTE_PTYPE_L4_TCP,
 255                 RTE_PTYPE_L4_UDP,
 256                 RTE_PTYPE_L4_SCTP
 257         };
 258
 259         PMD_INIT_FUNC_TRACE();
 260
 261         if (dev->rx_pkt_burst == dpaa_eth_queue_rx)
 262                 return ptypes;
 263         return NULL;
 264 }
 265
 266 static int dpaa_eth_dev_start(struct rte_eth_dev *dev)
 267 {
 268         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 269
 270         PMD_INIT_FUNC_TRACE();
 271
 272         /* Change tx callback to the real one */
 273         dev->tx_pkt_burst = dpaa_eth_queue_tx;
 274         fman_if_enable_rx(dpaa_intf->fif);
 275
 276         return 0;
 277 }
 278
 279 static void dpaa_eth_dev_stop(struct rte_eth_dev *dev)
 280 {
 281         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 282
 283         PMD_INIT_FUNC_TRACE();
 284
 285         fman_if_disable_rx(dpaa_intf->fif);
 286         dev->tx_pkt_burst = dpaa_eth_tx_drop_all;
 287 }
 288
 289 static void dpaa_eth_dev_close(struct rte_eth_dev *dev)
 290 {
 291         PMD_INIT_FUNC_TRACE();
 292
 293         dpaa_eth_dev_stop(dev);
 294 }
 295
 296 static int
 297 dpaa_fw_version_get(struct rte_eth_dev *dev __rte_unused,
 298                      char *fw_version,
 299                      size_t fw_size)
 300 {
 301         int ret;
 302         FILE *svr_file = NULL;
 303         unsigned int svr_ver = 0;
 304
 305         PMD_INIT_FUNC_TRACE();
 306
 307         svr_file = fopen(DPAA_SOC_ID_FILE, "r");
 308         if (!svr_file) {
 309                 DPAA_PMD_ERR("Unable to open SoC device");
 310                 return -ENOTSUP; /* Not supported on this infra */
 311         }
 312         if (fscanf(svr_file, "svr:%x", &svr_ver) > 0)
 313                 dpaa_svr_family = svr_ver & SVR_MASK;
 314         else
 315                 DPAA_PMD_ERR("Unable to read SoC device");
 316
 317         fclose(svr_file);
 318
 319         ret = snprintf(fw_version, fw_size, "SVR:%x-fman-v%x",
 320                        svr_ver, fman_ip_rev);
 321         ret += 1; /* add the size of '\0' */
 322
 323         if (fw_size < (uint32_t)ret)
 324                 return ret;
 325         else
 326                 return 0;
 327 }
 328
 329 static void dpaa_eth_dev_info(struct rte_eth_dev *dev,
 330                               struct rte_eth_dev_info *dev_info)
 331 {
 332         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 333
 334         PMD_INIT_FUNC_TRACE();
 335
 336         dev_info->max_rx_queues = dpaa_intf->nb_rx_queues;
 337         dev_info->max_tx_queues = dpaa_intf->nb_tx_queues;
 338         dev_info->max_rx_pktlen = DPAA_MAX_RX_PKT_LEN;
 339         dev_info->max_mac_addrs = DPAA_MAX_MAC_FILTER;
 340         dev_info->max_hash_mac_addrs = 0;
 341         dev_info->max_vfs = 0;
 342         dev_info->max_vmdq_pools = ETH_16_POOLS;
 343         dev_info->flow_type_rss_offloads = DPAA_RSS_OFFLOAD_ALL;
 344
 345         if (dpaa_intf->fif->mac_type == fman_mac_1g)
 346                 dev_info->speed_capa = ETH_LINK_SPEED_1G;
 347         else if (dpaa_intf->fif->mac_type == fman_mac_10g)
 348                 dev_info->speed_capa = (ETH_LINK_SPEED_1G | ETH_LINK_SPEED_10G);
 349         else
 350                 DPAA_PMD_ERR("invalid link_speed: %s, %d",
 351                              dpaa_intf->name, dpaa_intf->fif->mac_type);
 352
 353         dev_info->rx_offload_capa = dev_rx_offloads_sup |
 354                                         dev_rx_offloads_nodis;
 355         dev_info->tx_offload_capa = dev_tx_offloads_sup |
 356                                         dev_tx_offloads_nodis;
 357         dev_info->default_rxportconf.burst_size = DPAA_DEF_RX_BURST_SIZE;
 358         dev_info->default_txportconf.burst_size = DPAA_DEF_TX_BURST_SIZE;
 359 }
 360
 361 static int dpaa_eth_link_update(struct rte_eth_dev *dev,
 362                                 int wait_to_complete __rte_unused)
 363 {
 364         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 365         struct rte_eth_link *link = &dev->data->dev_link;
 366
 367         PMD_INIT_FUNC_TRACE();
 368
 369         if (dpaa_intf->fif->mac_type == fman_mac_1g)
 370                 link->link_speed = ETH_SPEED_NUM_1G;
 371         else if (dpaa_intf->fif->mac_type == fman_mac_10g)
 372                 link->link_speed = ETH_SPEED_NUM_10G;
 373         else
 374                 DPAA_PMD_ERR("invalid link_speed: %s, %d",
 375                              dpaa_intf->name, dpaa_intf->fif->mac_type);
 376
 377         link->link_status = dpaa_intf->valid;
 378         link->link_duplex = ETH_LINK_FULL_DUPLEX;
 379         link->link_autoneg = ETH_LINK_AUTONEG;
 380         return 0;
 381 }
 382
 383 static int dpaa_eth_stats_get(struct rte_eth_dev *dev,
 384                                struct rte_eth_stats *stats)
 385 {
 386         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 387
 388         PMD_INIT_FUNC_TRACE();
 389
 390         fman_if_stats_get(dpaa_intf->fif, stats);
 391         return 0;
 392 }
 393
 394 static void dpaa_eth_stats_reset(struct rte_eth_dev *dev)
 395 {
 396         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 397
 398         PMD_INIT_FUNC_TRACE();
 399
 400         fman_if_stats_reset(dpaa_intf->fif);
 401 }
 402
 403 static int
 404 dpaa_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
 405                     unsigned int n)
 406 {
 407         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 408         unsigned int i = 0, num = RTE_DIM(dpaa_xstats_strings);
 409         uint64_t values[sizeof(struct dpaa_if_stats) / 8];
 410
 411         if (n < num)
 412                 return num;
 413
 414         if (xstats == NULL)
 415                 return 0;
 416
 417         fman_if_stats_get_all(dpaa_intf->fif, values,
 418                               sizeof(struct dpaa_if_stats) / 8);
 419
 420         for (i = 0; i < num; i++) {
 421                 xstats[i].id = i;
 422                 xstats[i].value = values[dpaa_xstats_strings[i].offset / 8];
 423         }
 424         return i;
 425 }
 426
 427 static int
 428 dpaa_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
 429                       struct rte_eth_xstat_name *xstats_names,
 430                       unsigned int limit)
 431 {
 432         unsigned int i, stat_cnt = RTE_DIM(dpaa_xstats_strings);
 433
 434         if (limit < stat_cnt)
 435                 return stat_cnt;
 436
 437         if (xstats_names != NULL)
 438                 for (i = 0; i < stat_cnt; i++)
 439                         snprintf(xstats_names[i].name,
 440                                  sizeof(xstats_names[i].name),
 441                                  "%s",
 442                                  dpaa_xstats_strings[i].name);
 443
 444         return stat_cnt;
 445 }
 446
 447 static int
 448 dpaa_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids,
 449                       uint64_t *values, unsigned int n)
 450 {
 451         unsigned int i, stat_cnt = RTE_DIM(dpaa_xstats_strings);
 452         uint64_t values_copy[sizeof(struct dpaa_if_stats) / 8];
 453
 454         if (!ids) {
 455                 struct dpaa_if *dpaa_intf = dev->data->dev_private;
 456
 457                 if (n < stat_cnt)
 458                         return stat_cnt;
 459
 460                 if (!values)
 461                         return 0;
 462
 463                 fman_if_stats_get_all(dpaa_intf->fif, values_copy,
 464                                       sizeof(struct dpaa_if_stats) / 8);
 465
 466                 for (i = 0; i < stat_cnt; i++)
 467                         values[i] =
 468                                 values_copy[dpaa_xstats_strings[i].offset / 8];
 469
 470                 return stat_cnt;
 471         }
 472
 473         dpaa_xstats_get_by_id(dev, NULL, values_copy, stat_cnt);
 474
 475         for (i = 0; i < n; i++) {
 476                 if (ids[i] >= stat_cnt) {
 477                         DPAA_PMD_ERR("id value isn't valid");
 478                         return -1;
 479                 }
 480                 values[i] = values_copy[ids[i]];
 481         }
 482         return n;
 483 }
 484
 485 static int
 486 dpaa_xstats_get_names_by_id(
 487         struct rte_eth_dev *dev,
 488         struct rte_eth_xstat_name *xstats_names,
 489         const uint64_t *ids,
 490         unsigned int limit)
 491 {
 492         unsigned int i, stat_cnt = RTE_DIM(dpaa_xstats_strings);
 493         struct rte_eth_xstat_name xstats_names_copy[stat_cnt];
 494
 495         if (!ids)
 496                 return dpaa_xstats_get_names(dev, xstats_names, limit);
 497
 498         dpaa_xstats_get_names(dev, xstats_names_copy, limit);
 499
 500         for (i = 0; i < limit; i++) {
 501                 if (ids[i] >= stat_cnt) {
 502                         DPAA_PMD_ERR("id value isn't valid");
 503                         return -1;
 504                 }
 505                 strcpy(xstats_names[i].name, xstats_names_copy[ids[i]].name);
 506         }
 507         return limit;
 508 }
 509
 510 static void dpaa_eth_promiscuous_enable(struct rte_eth_dev *dev)
 511 {
 512         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 513
 514         PMD_INIT_FUNC_TRACE();
 515
 516         fman_if_promiscuous_enable(dpaa_intf->fif);
 517 }
 518
 519 static void dpaa_eth_promiscuous_disable(struct rte_eth_dev *dev)
 520 {
 521         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 522
 523         PMD_INIT_FUNC_TRACE();
 524
 525         fman_if_promiscuous_disable(dpaa_intf->fif);
 526 }
 527
 528 static void dpaa_eth_multicast_enable(struct rte_eth_dev *dev)
 529 {
 530         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 531
 532         PMD_INIT_FUNC_TRACE();
 533
 534         fman_if_set_mcast_filter_table(dpaa_intf->fif);
 535 }
 536
 537 static void dpaa_eth_multicast_disable(struct rte_eth_dev *dev)
 538 {
 539         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 540
 541         PMD_INIT_FUNC_TRACE();
 542
 543         fman_if_reset_mcast_filter_table(dpaa_intf->fif);
 544 }
 545
 546 static
 547 int dpaa_eth_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
 548                             uint16_t nb_desc,
 549                             unsigned int socket_id __rte_unused,
 550                             const struct rte_eth_rxconf *rx_conf __rte_unused,
 551                             struct rte_mempool *mp)
 552 {
 553         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 554         struct qman_fq *rxq = &dpaa_intf->rx_queues[queue_idx];
 555         struct qm_mcc_initfq opts = {0};
 556         u32 flags = 0;
 557         int ret;
 558         u32 buffsz = rte_pktmbuf_data_room_size(mp) - RTE_PKTMBUF_HEADROOM;
 559
 560         PMD_INIT_FUNC_TRACE();
 561
 562         if (queue_idx >= dev->data->nb_rx_queues) {
 563                 rte_errno = EOVERFLOW;
 564                 DPAA_PMD_ERR("%p: queue index out of range (%u >= %u)",
 565                       (void *)dev, queue_idx, dev->data->nb_rx_queues);
 566                 return -rte_errno;
 567         }
 568
 569         DPAA_PMD_INFO("Rx queue setup for queue index: %d fq_id (0x%x)",
 570                         queue_idx, rxq->fqid);
 571
 572         /* Max packet can fit in single buffer */
 573         if (dev->data->dev_conf.rxmode.max_rx_pkt_len <= buffsz) {
 574                 ;
 575         } else if (dev->data->dev_conf.rxmode.offloads &
 576                         DEV_RX_OFFLOAD_SCATTER) {
 577                 if (dev->data->dev_conf.rxmode.max_rx_pkt_len >
 578                         buffsz * DPAA_SGT_MAX_ENTRIES) {
 579                         DPAA_PMD_ERR("max RxPkt size %d too big to fit "
 580                                 "MaxSGlist %d",
 581                                 dev->data->dev_conf.rxmode.max_rx_pkt_len,
 582                                 buffsz * DPAA_SGT_MAX_ENTRIES);
 583                         rte_errno = EOVERFLOW;
 584                         return -rte_errno;
 585                 }
 586         } else {
 587                 DPAA_PMD_WARN("The requested maximum Rx packet size (%u) is"
 588                      " larger than a single mbuf (%u) and scattered"
 589                      " mode has not been requested",
 590                      dev->data->dev_conf.rxmode.max_rx_pkt_len,
 591                      buffsz - RTE_PKTMBUF_HEADROOM);
 592         }
 593
 594         if (!dpaa_intf->bp_info || dpaa_intf->bp_info->mp != mp) {
 595                 struct fman_if_ic_params icp;
 596                 uint32_t fd_offset;
 597                 uint32_t bp_size;
 598
 599                 if (!mp->pool_data) {
 600                         DPAA_PMD_ERR("Not an offloaded buffer pool!");
 601                         return -1;
 602                 }
 603                 dpaa_intf->bp_info = DPAA_MEMPOOL_TO_POOL_INFO(mp);
 604
 605                 memset(&icp, 0, sizeof(icp));
 606                 /* set ICEOF for to the default value , which is 0*/
 607                 icp.iciof = DEFAULT_ICIOF;
 608                 icp.iceof = DEFAULT_RX_ICEOF;
 609                 icp.icsz = DEFAULT_ICSZ;
 610                 fman_if_set_ic_params(dpaa_intf->fif, &icp);
 611
 612                 fd_offset = RTE_PKTMBUF_HEADROOM + DPAA_HW_BUF_RESERVE;
 613                 fman_if_set_fdoff(dpaa_intf->fif, fd_offset);
 614
 615                 /* Buffer pool size should be equal to Dataroom Size*/
 616                 bp_size = rte_pktmbuf_data_room_size(mp);
 617                 fman_if_set_bp(dpaa_intf->fif, mp->size,
 618                                dpaa_intf->bp_info->bpid, bp_size);
 619                 dpaa_intf->valid = 1;
 620                 DPAA_PMD_DEBUG("if:%s fd_offset = %d offset = %d",
 621                                 dpaa_intf->name, fd_offset,
 622                                 fman_if_get_fdoff(dpaa_intf->fif));
 623         }
 624         DPAA_PMD_DEBUG("if:%s sg_on = %d, max_frm =%d", dpaa_intf->name,
 625                 fman_if_get_sg_enable(dpaa_intf->fif),
 626                 dev->data->dev_conf.rxmode.max_rx_pkt_len);
 627         /* checking if push mode only, no error check for now */
 628         if (dpaa_push_mode_max_queue > dpaa_push_queue_idx) {
 629                 dpaa_push_queue_idx++;
 630                 opts.we_mask = QM_INITFQ_WE_FQCTRL | QM_INITFQ_WE_CONTEXTA;
 631                 opts.fqd.fq_ctrl = QM_FQCTRL_AVOIDBLOCK |
 632                                    QM_FQCTRL_CTXASTASHING |
 633                                    QM_FQCTRL_PREFERINCACHE;
 634                 opts.fqd.context_a.stashing.exclusive = 0;
 635                 /* In muticore scenario stashing becomes a bottleneck on LS1046.
 636                  * So do not enable stashing in this case
 637                  */
 638                 if (dpaa_svr_family != SVR_LS1046A_FAMILY)
 639                         opts.fqd.context_a.stashing.annotation_cl =
 640                                                 DPAA_IF_RX_ANNOTATION_STASH;
 641                 opts.fqd.context_a.stashing.data_cl = DPAA_IF_RX_DATA_STASH;
 642                 opts.fqd.context_a.stashing.context_cl =
 643                                                 DPAA_IF_RX_CONTEXT_STASH;
 644
 645                 /*Create a channel and associate given queue with the channel*/
 646                 qman_alloc_pool_range((u32 *)&rxq->ch_id, 1, 1, 0);
 647                 opts.we_mask = opts.we_mask | QM_INITFQ_WE_DESTWQ;
 648                 opts.fqd.dest.channel = rxq->ch_id;
 649                 opts.fqd.dest.wq = DPAA_IF_RX_PRIORITY;
 650                 flags = QMAN_INITFQ_FLAG_SCHED;
 651
 652                 /* Configure tail drop */
 653                 if (dpaa_intf->cgr_rx) {
 654                         opts.we_mask |= QM_INITFQ_WE_CGID;
 655                         opts.fqd.cgid = dpaa_intf->cgr_rx[queue_idx].cgrid;
 656                         opts.fqd.fq_ctrl |= QM_FQCTRL_CGE;
 657                 }
 658                 ret = qman_init_fq(rxq, flags, &opts);
 659                 if (ret) {
 660                         DPAA_PMD_ERR("Channel/Q association failed. fqid 0x%x "
 661                                 "ret:%d(%s)", rxq->fqid, ret, strerror(ret));
 662                         return ret;
 663                 }
 664                 if (dpaa_svr_family == SVR_LS1043A_FAMILY) {
 665                         rxq->cb.dqrr_dpdk_pull_cb = dpaa_rx_cb_no_prefetch;
 666                 } else {
 667                         rxq->cb.dqrr_dpdk_pull_cb = dpaa_rx_cb;
 668                         rxq->cb.dqrr_prepare = dpaa_rx_cb_prepare;
 669                 }
 670
 671                 rxq->is_static = true;
 672         }
 673         dev->data->rx_queues[queue_idx] = rxq;
 674
 675         /* configure the CGR size as per the desc size */
 676         if (dpaa_intf->cgr_rx) {
 677                 struct qm_mcc_initcgr cgr_opts = {0};
 678
 679                 /* Enable tail drop with cgr on this queue */
 680                 qm_cgr_cs_thres_set64(&cgr_opts.cgr.cs_thres, nb_desc, 0);
 681                 ret = qman_modify_cgr(dpaa_intf->cgr_rx, 0, &cgr_opts);
 682                 if (ret) {
 683                         DPAA_PMD_WARN(
 684                                 "rx taildrop modify fail on fqid %d (ret=%d)",
 685                                 rxq->fqid, ret);
 686                 }
 687         }
 688
 689         return 0;
 690 }
 691
 692 int
 693 dpaa_eth_eventq_attach(const struct rte_eth_dev *dev,
 694                 int eth_rx_queue_id,
 695                 u16 ch_id,
 696                 const struct rte_event_eth_rx_adapter_queue_conf *queue_conf)
 697 {
 698         int ret;
 699         u32 flags = 0;
 700         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 701         struct qman_fq *rxq = &dpaa_intf->rx_queues[eth_rx_queue_id];
 702         struct qm_mcc_initfq opts = {0};
 703
 704         if (dpaa_push_mode_max_queue)
 705                 DPAA_PMD_WARN("PUSH mode q and EVENTDEV are not compatible\n"
 706                               "PUSH mode already enabled for first %d queues.\n"
 707                               "To disable set DPAA_PUSH_QUEUES_NUMBER to 0\n",
 708                               dpaa_push_mode_max_queue);
 709
 710         dpaa_poll_queue_default_config(&opts);
 711
 712         switch (queue_conf->ev.sched_type) {
 713         case RTE_SCHED_TYPE_ATOMIC:
 714                 opts.fqd.fq_ctrl |= QM_FQCTRL_HOLDACTIVE;
 715                 /* Reset FQCTRL_AVOIDBLOCK bit as it is unnecessary
 716                  * configuration with HOLD_ACTIVE setting
 717                  */
 718                 opts.fqd.fq_ctrl &= (~QM_FQCTRL_AVOIDBLOCK);
 719                 rxq->cb.dqrr_dpdk_cb = dpaa_rx_cb_atomic;
 720                 break;
 721         case RTE_SCHED_TYPE_ORDERED:
 722                 DPAA_PMD_ERR("Ordered queue schedule type is not supported\n");
 723                 return -1;
 724         default:
 725                 opts.fqd.fq_ctrl |= QM_FQCTRL_AVOIDBLOCK;
 726                 rxq->cb.dqrr_dpdk_cb = dpaa_rx_cb_parallel;
 727                 break;
 728         }
 729
 730         opts.we_mask = opts.we_mask | QM_INITFQ_WE_DESTWQ;
 731         opts.fqd.dest.channel = ch_id;
 732         opts.fqd.dest.wq = queue_conf->ev.priority;
 733
 734         if (dpaa_intf->cgr_rx) {
 735                 opts.we_mask |= QM_INITFQ_WE_CGID;
 736                 opts.fqd.cgid = dpaa_intf->cgr_rx[eth_rx_queue_id].cgrid;
 737                 opts.fqd.fq_ctrl |= QM_FQCTRL_CGE;
 738         }
 739
 740         flags = QMAN_INITFQ_FLAG_SCHED;
 741
 742         ret = qman_init_fq(rxq, flags, &opts);
 743         if (ret) {
 744                 DPAA_PMD_ERR("Ev-Channel/Q association failed. fqid 0x%x "
 745                                 "ret:%d(%s)", rxq->fqid, ret, strerror(ret));
 746                 return ret;
 747         }
 748
 749         /* copy configuration which needs to be filled during dequeue */
 750         memcpy(&rxq->ev, &queue_conf->ev, sizeof(struct rte_event));
 751         dev->data->rx_queues[eth_rx_queue_id] = rxq;
 752
 753         return ret;
 754 }
 755
 756 int
 757 dpaa_eth_eventq_detach(const struct rte_eth_dev *dev,
 758                 int eth_rx_queue_id)
 759 {
 760         struct qm_mcc_initfq opts;
 761         int ret;
 762         u32 flags = 0;
 763         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 764         struct qman_fq *rxq = &dpaa_intf->rx_queues[eth_rx_queue_id];
 765
 766         dpaa_poll_queue_default_config(&opts);
 767
 768         if (dpaa_intf->cgr_rx) {
 769                 opts.we_mask |= QM_INITFQ_WE_CGID;
 770                 opts.fqd.cgid = dpaa_intf->cgr_rx[eth_rx_queue_id].cgrid;
 771                 opts.fqd.fq_ctrl |= QM_FQCTRL_CGE;
 772         }
 773
 774         ret = qman_init_fq(rxq, flags, &opts);
 775         if (ret) {
 776                 DPAA_PMD_ERR("init rx fqid %d failed with ret: %d",
 777                              rxq->fqid, ret);
 778         }
 779
 780         rxq->cb.dqrr_dpdk_cb = NULL;
 781         dev->data->rx_queues[eth_rx_queue_id] = NULL;
 782
 783         return 0;
 784 }
 785
 786 static
 787 void dpaa_eth_rx_queue_release(void *rxq __rte_unused)
 788 {
 789         PMD_INIT_FUNC_TRACE();
 790 }
 791
 792 static
 793 int dpaa_eth_tx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
 794                             uint16_t nb_desc __rte_unused,
 795                 unsigned int socket_id __rte_unused,
 796                 const struct rte_eth_txconf *tx_conf __rte_unused)
 797 {
 798         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 799
 800         PMD_INIT_FUNC_TRACE();
 801
 802         if (queue_idx >= dev->data->nb_tx_queues) {
 803                 rte_errno = EOVERFLOW;
 804                 DPAA_PMD_ERR("%p: queue index out of range (%u >= %u)",
 805                       (void *)dev, queue_idx, dev->data->nb_tx_queues);
 806                 return -rte_errno;
 807         }
 808
 809         DPAA_PMD_INFO("Tx queue setup for queue index: %d fq_id (0x%x)",
 810                         queue_idx, dpaa_intf->tx_queues[queue_idx].fqid);
 811         dev->data->tx_queues[queue_idx] = &dpaa_intf->tx_queues[queue_idx];
 812         return 0;
 813 }
 814
 815 static void dpaa_eth_tx_queue_release(void *txq __rte_unused)
 816 {
 817         PMD_INIT_FUNC_TRACE();
 818 }
 819
 820 static uint32_t
 821 dpaa_dev_rx_queue_count(struct rte_eth_dev *dev, uint16_t rx_queue_id)
 822 {
 823         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 824         struct qman_fq *rxq = &dpaa_intf->rx_queues[rx_queue_id];
 825         u32 frm_cnt = 0;
 826
 827         PMD_INIT_FUNC_TRACE();
 828
 829         if (qman_query_fq_frm_cnt(rxq, &frm_cnt) == 0) {
 830                 RTE_LOG(DEBUG, PMD, "RX frame count for q(%d) is %u\n",
 831                         rx_queue_id, frm_cnt);
 832         }
 833         return frm_cnt;
 834 }
 835
 836 static int dpaa_link_down(struct rte_eth_dev *dev)
 837 {
 838         PMD_INIT_FUNC_TRACE();
 839
 840         dpaa_eth_dev_stop(dev);
 841         return 0;
 842 }
 843
 844 static int dpaa_link_up(struct rte_eth_dev *dev)
 845 {
 846         PMD_INIT_FUNC_TRACE();
 847
 848         dpaa_eth_dev_start(dev);
 849         return 0;
 850 }
 851
 852 static int
 853 dpaa_flow_ctrl_set(struct rte_eth_dev *dev,
 854                    struct rte_eth_fc_conf *fc_conf)
 855 {
 856         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 857         struct rte_eth_fc_conf *net_fc;
 858
 859         PMD_INIT_FUNC_TRACE();
 860
 861         if (!(dpaa_intf->fc_conf)) {
 862                 dpaa_intf->fc_conf = rte_zmalloc(NULL,
 863                         sizeof(struct rte_eth_fc_conf), MAX_CACHELINE);
 864                 if (!dpaa_intf->fc_conf) {
 865                         DPAA_PMD_ERR("unable to save flow control info");
 866                         return -ENOMEM;
 867                 }
 868         }
 869         net_fc = dpaa_intf->fc_conf;
 870
 871         if (fc_conf->high_water < fc_conf->low_water) {
 872                 DPAA_PMD_ERR("Incorrect Flow Control Configuration");
 873                 return -EINVAL;
 874         }
 875
 876         if (fc_conf->mode == RTE_FC_NONE) {
 877                 return 0;
 878         } else if (fc_conf->mode == RTE_FC_TX_PAUSE ||
 879                  fc_conf->mode == RTE_FC_FULL) {
 880                 fman_if_set_fc_threshold(dpaa_intf->fif, fc_conf->high_water,
 881                                          fc_conf->low_water,
 882                                 dpaa_intf->bp_info->bpid);
 883                 if (fc_conf->pause_time)
 884                         fman_if_set_fc_quanta(dpaa_intf->fif,
 885                                               fc_conf->pause_time);
 886         }
 887
 888         /* Save the information in dpaa device */
 889         net_fc->pause_time = fc_conf->pause_time;
 890         net_fc->high_water = fc_conf->high_water;
 891         net_fc->low_water = fc_conf->low_water;
 892         net_fc->send_xon = fc_conf->send_xon;
 893         net_fc->mac_ctrl_frame_fwd = fc_conf->mac_ctrl_frame_fwd;
 894         net_fc->mode = fc_conf->mode;
 895         net_fc->autoneg = fc_conf->autoneg;
 896
 897         return 0;
 898 }
 899
 900 static int
 901 dpaa_flow_ctrl_get(struct rte_eth_dev *dev,
 902                    struct rte_eth_fc_conf *fc_conf)
 903 {
 904         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 905         struct rte_eth_fc_conf *net_fc = dpaa_intf->fc_conf;
 906         int ret;
 907
 908         PMD_INIT_FUNC_TRACE();
 909
 910         if (net_fc) {
 911                 fc_conf->pause_time = net_fc->pause_time;
 912                 fc_conf->high_water = net_fc->high_water;
 913                 fc_conf->low_water = net_fc->low_water;
 914                 fc_conf->send_xon = net_fc->send_xon;
 915                 fc_conf->mac_ctrl_frame_fwd = net_fc->mac_ctrl_frame_fwd;
 916                 fc_conf->mode = net_fc->mode;
 917                 fc_conf->autoneg = net_fc->autoneg;
 918                 return 0;
 919         }
 920         ret = fman_if_get_fc_threshold(dpaa_intf->fif);
 921         if (ret) {
 922                 fc_conf->mode = RTE_FC_TX_PAUSE;
 923                 fc_conf->pause_time = fman_if_get_fc_quanta(dpaa_intf->fif);
 924         } else {
 925                 fc_conf->mode = RTE_FC_NONE;
 926         }
 927
 928         return 0;
 929 }
 930
 931 static int
 932 dpaa_dev_add_mac_addr(struct rte_eth_dev *dev,
 933                              struct ether_addr *addr,
 934                              uint32_t index,
 935                              __rte_unused uint32_t pool)
 936 {
 937         int ret;
 938         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 939
 940         PMD_INIT_FUNC_TRACE();
 941
 942         ret = fman_if_add_mac_addr(dpaa_intf->fif, addr->addr_bytes, index);
 943
 944         if (ret)
 945                 RTE_LOG(ERR, PMD, "error: Adding the MAC ADDR failed:"
 946                         " err = %d", ret);
 947         return 0;
 948 }
 949
 950 static void
 951 dpaa_dev_remove_mac_addr(struct rte_eth_dev *dev,
 952                           uint32_t index)
 953 {
 954         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 955
 956         PMD_INIT_FUNC_TRACE();
 957
 958         fman_if_clear_mac_addr(dpaa_intf->fif, index);
 959 }
 960
 961 static int
 962 dpaa_dev_set_mac_addr(struct rte_eth_dev *dev,
 963                        struct ether_addr *addr)
 964 {
 965         int ret;
 966         struct dpaa_if *dpaa_intf = dev->data->dev_private;
 967
 968         PMD_INIT_FUNC_TRACE();
 969
 970         ret = fman_if_add_mac_addr(dpaa_intf->fif, addr->addr_bytes, 0);
 971         if (ret)
 972                 RTE_LOG(ERR, PMD, "error: Setting the MAC ADDR failed %d", ret);
 973
 974         return ret;
 975 }
 976
 977 static struct eth_dev_ops dpaa_devops = {
 978         .dev_configure            = dpaa_eth_dev_configure,
 979         .dev_start                = dpaa_eth_dev_start,
 980         .dev_stop                 = dpaa_eth_dev_stop,
 981         .dev_close                = dpaa_eth_dev_close,
 982         .dev_infos_get            = dpaa_eth_dev_info,
 983         .dev_supported_ptypes_get = dpaa_supported_ptypes_get,
 984
 985         .rx_queue_setup           = dpaa_eth_rx_queue_setup,
 986         .tx_queue_setup           = dpaa_eth_tx_queue_setup,
 987         .rx_queue_release         = dpaa_eth_rx_queue_release,
 988         .tx_queue_release         = dpaa_eth_tx_queue_release,
 989         .rx_queue_count           = dpaa_dev_rx_queue_count,
 990
 991         .flow_ctrl_get            = dpaa_flow_ctrl_get,
 992         .flow_ctrl_set            = dpaa_flow_ctrl_set,
 993
 994         .link_update              = dpaa_eth_link_update,
 995         .stats_get                = dpaa_eth_stats_get,
 996         .xstats_get               = dpaa_dev_xstats_get,
 997         .xstats_get_by_id         = dpaa_xstats_get_by_id,
 998         .xstats_get_names_by_id   = dpaa_xstats_get_names_by_id,
 999         .xstats_get_names         = dpaa_xstats_get_names,
1000         .xstats_reset             = dpaa_eth_stats_reset,
1001         .stats_reset              = dpaa_eth_stats_reset,
1002         .promiscuous_enable       = dpaa_eth_promiscuous_enable,
1003         .promiscuous_disable      = dpaa_eth_promiscuous_disable,
1004         .allmulticast_enable      = dpaa_eth_multicast_enable,
1005         .allmulticast_disable     = dpaa_eth_multicast_disable,
1006         .mtu_set                  = dpaa_mtu_set,
1007         .dev_set_link_down        = dpaa_link_down,
1008         .dev_set_link_up          = dpaa_link_up,
1009         .mac_addr_add             = dpaa_dev_add_mac_addr,
1010         .mac_addr_remove          = dpaa_dev_remove_mac_addr,
1011         .mac_addr_set             = dpaa_dev_set_mac_addr,
1012
1013         .fw_version_get           = dpaa_fw_version_get,
1014 };
1015
1016 static bool
1017 is_device_supported(struct rte_eth_dev *dev, struct rte_dpaa_driver *drv)
1018 {
1019         if (strcmp(dev->device->driver->name,
1020                    drv->driver.name))
1021                 return false;
1022
1023         return true;
1024 }
1025
1026 static bool
1027 is_dpaa_supported(struct rte_eth_dev *dev)
1028 {
1029         return is_device_supported(dev, &rte_dpaa_pmd);
1030 }
1031
1032 int
1033 rte_pmd_dpaa_set_tx_loopback(uint8_t port, uint8_t on)
1034 {
1035         struct rte_eth_dev *dev;
1036         struct dpaa_if *dpaa_intf;
1037
1038         RTE_ETH_VALID_PORTID_OR_ERR_RET(port, -ENODEV);
1039
1040         dev = &rte_eth_devices[port];
1041
1042         if (!is_dpaa_supported(dev))
1043                 return -ENOTSUP;
1044
1045         dpaa_intf = dev->data->dev_private;
1046
1047         if (on)
1048                 fman_if_loopback_enable(dpaa_intf->fif);
1049         else
1050                 fman_if_loopback_disable(dpaa_intf->fif);
1051
1052         return 0;
1053 }
1054
1055 static int dpaa_fc_set_default(struct dpaa_if *dpaa_intf)
1056 {
1057         struct rte_eth_fc_conf *fc_conf;
1058         int ret;
1059
1060         PMD_INIT_FUNC_TRACE();
1061
1062         if (!(dpaa_intf->fc_conf)) {
1063                 dpaa_intf->fc_conf = rte_zmalloc(NULL,
1064                         sizeof(struct rte_eth_fc_conf), MAX_CACHELINE);
1065                 if (!dpaa_intf->fc_conf) {
1066                         DPAA_PMD_ERR("unable to save flow control info");
1067                         return -ENOMEM;
1068                 }
1069         }
1070         fc_conf = dpaa_intf->fc_conf;
1071         ret = fman_if_get_fc_threshold(dpaa_intf->fif);
1072         if (ret) {
1073                 fc_conf->mode = RTE_FC_TX_PAUSE;
1074                 fc_conf->pause_time = fman_if_get_fc_quanta(dpaa_intf->fif);
1075         } else {
1076                 fc_conf->mode = RTE_FC_NONE;
1077         }
1078
1079         return 0;
1080 }
1081
1082 /* Initialise an Rx FQ */
1083 static int dpaa_rx_queue_init(struct qman_fq *fq, struct qman_cgr *cgr_rx,
1084                               uint32_t fqid)
1085 {
1086         struct qm_mcc_initfq opts = {0};
1087         int ret;
1088         u32 flags = QMAN_FQ_FLAG_NO_ENQUEUE;
1089         struct qm_mcc_initcgr cgr_opts = {
1090                 .we_mask = QM_CGR_WE_CS_THRES |
1091                                 QM_CGR_WE_CSTD_EN |
1092                                 QM_CGR_WE_MODE,
1093                 .cgr = {
1094                         .cstd_en = QM_CGR_EN,
1095                         .mode = QMAN_CGR_MODE_FRAME
1096                 }
1097         };
1098
1099         PMD_INIT_FUNC_TRACE();
1100
1101         if (fqid) {
1102                 ret = qman_reserve_fqid(fqid);
1103                 if (ret) {
1104                         DPAA_PMD_ERR("reserve rx fqid 0x%x failed with ret: %d",
1105                                      fqid, ret);
1106                         return -EINVAL;
1107                 }
1108         } else {
1109                 flags |= QMAN_FQ_FLAG_DYNAMIC_FQID;
1110         }
1111         DPAA_PMD_DEBUG("creating rx fq %p, fqid 0x%x", fq, fqid);
1112         ret = qman_create_fq(fqid, flags, fq);
1113         if (ret) {
1114                 DPAA_PMD_ERR("create rx fqid 0x%x failed with ret: %d",
1115                         fqid, ret);
1116                 return ret;
1117         }
1118         fq->is_static = false;
1119
1120         dpaa_poll_queue_default_config(&opts);
1121
1122         if (cgr_rx) {
1123                 /* Enable tail drop with cgr on this queue */
1124                 qm_cgr_cs_thres_set64(&cgr_opts.cgr.cs_thres, td_threshold, 0);
1125                 cgr_rx->cb = NULL;
1126                 ret = qman_create_cgr(cgr_rx, QMAN_CGR_FLAG_USE_INIT,
1127                                       &cgr_opts);
1128                 if (ret) {
1129                         DPAA_PMD_WARN(
1130                                 "rx taildrop init fail on rx fqid 0x%x(ret=%d)",
1131                                 fq->fqid, ret);
1132                         goto without_cgr;
1133                 }
1134                 opts.we_mask |= QM_INITFQ_WE_CGID;
1135                 opts.fqd.cgid = cgr_rx->cgrid;
1136                 opts.fqd.fq_ctrl |= QM_FQCTRL_CGE;
1137         }
1138 without_cgr:
1139         ret = qman_init_fq(fq, 0, &opts);
1140         if (ret)
1141                 DPAA_PMD_ERR("init rx fqid 0x%x failed with ret:%d", fqid, ret);
1142         return ret;
1143 }
1144
1145 /* Initialise a Tx FQ */
1146 static int dpaa_tx_queue_init(struct qman_fq *fq,
1147                               struct fman_if *fman_intf)
1148 {
1149         struct qm_mcc_initfq opts = {0};
1150         int ret;
1151
1152         PMD_INIT_FUNC_TRACE();
1153
1154         ret = qman_create_fq(0, QMAN_FQ_FLAG_DYNAMIC_FQID |
1155                              QMAN_FQ_FLAG_TO_DCPORTAL, fq);
1156         if (ret) {
1157                 DPAA_PMD_ERR("create tx fq failed with ret: %d", ret);
1158                 return ret;
1159         }
1160         opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL |
1161                        QM_INITFQ_WE_CONTEXTB | QM_INITFQ_WE_CONTEXTA;
1162         opts.fqd.dest.channel = fman_intf->tx_channel_id;
1163         opts.fqd.dest.wq = DPAA_IF_TX_PRIORITY;
1164         opts.fqd.fq_ctrl = QM_FQCTRL_PREFERINCACHE;
1165         opts.fqd.context_b = 0;
1166         /* no tx-confirmation */
1167         opts.fqd.context_a.hi = 0x80000000 | fman_dealloc_bufs_mask_hi;
1168         opts.fqd.context_a.lo = 0 | fman_dealloc_bufs_mask_lo;
1169         DPAA_PMD_DEBUG("init tx fq %p, fqid 0x%x", fq, fq->fqid);
1170         ret = qman_init_fq(fq, QMAN_INITFQ_FLAG_SCHED, &opts);
1171         if (ret)
1172                 DPAA_PMD_ERR("init tx fqid 0x%x failed %d", fq->fqid, ret);
1173         return ret;
1174 }
1175
1176 #ifdef RTE_LIBRTE_DPAA_DEBUG_DRIVER
1177 /* Initialise a DEBUG FQ ([rt]x_error, rx_default). */
1178 static int dpaa_debug_queue_init(struct qman_fq *fq, uint32_t fqid)
1179 {
1180         struct qm_mcc_initfq opts = {0};
1181         int ret;
1182
1183         PMD_INIT_FUNC_TRACE();
1184
1185         ret = qman_reserve_fqid(fqid);
1186         if (ret) {
1187                 DPAA_PMD_ERR("Reserve debug fqid %d failed with ret: %d",
1188                         fqid, ret);
1189                 return -EINVAL;
1190         }
1191         /* "map" this Rx FQ to one of the interfaces Tx FQID */
1192         DPAA_PMD_DEBUG("Creating debug fq %p, fqid %d", fq, fqid);
1193         ret = qman_create_fq(fqid, QMAN_FQ_FLAG_NO_ENQUEUE, fq);
1194         if (ret) {
1195                 DPAA_PMD_ERR("create debug fqid %d failed with ret: %d",
1196                         fqid, ret);
1197                 return ret;
1198         }
1199         opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL;
1200         opts.fqd.dest.wq = DPAA_IF_DEBUG_PRIORITY;
1201         ret = qman_init_fq(fq, 0, &opts);
1202         if (ret)
1203                 DPAA_PMD_ERR("init debug fqid %d failed with ret: %d",
1204                             fqid, ret);
1205         return ret;
1206 }
1207 #endif
1208
1209 /* Initialise a network interface */
1210 static int
1211 dpaa_dev_init(struct rte_eth_dev *eth_dev)
1212 {
1213         int num_cores, num_rx_fqs, fqid;
1214         int loop, ret = 0;
1215         int dev_id;
1216         struct rte_dpaa_device *dpaa_device;
1217         struct dpaa_if *dpaa_intf;
1218         struct fm_eth_port_cfg *cfg;
1219         struct fman_if *fman_intf;
1220         struct fman_if_bpool *bp, *tmp_bp;
1221         uint32_t cgrid[DPAA_MAX_NUM_PCD_QUEUES];
1222
1223         PMD_INIT_FUNC_TRACE();
1224
1225         /* For secondary processes, the primary has done all the work */
1226         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1227                 return 0;
1228
1229         dpaa_device = DEV_TO_DPAA_DEVICE(eth_dev->device);
1230         dev_id = dpaa_device->id.dev_id;
1231         dpaa_intf = eth_dev->data->dev_private;
1232         cfg = &dpaa_netcfg->port_cfg[dev_id];
1233         fman_intf = cfg->fman_if;
1234
1235         dpaa_intf->name = dpaa_device->name;
1236
1237         /* save fman_if & cfg in the interface struture */
1238         dpaa_intf->fif = fman_intf;
1239         dpaa_intf->ifid = dev_id;
1240         dpaa_intf->cfg = cfg;
1241
1242         /* Initialize Rx FQ's */
1243         if (default_q) {
1244                 num_rx_fqs = DPAA_DEFAULT_NUM_PCD_QUEUES;
1245         } else {
1246                 if (getenv("DPAA_NUM_RX_QUEUES"))
1247                         num_rx_fqs = atoi(getenv("DPAA_NUM_RX_QUEUES"));
1248                 else
1249                         num_rx_fqs = DPAA_DEFAULT_NUM_PCD_QUEUES;
1250         }
1251
1252
1253         /* Each device can not have more than DPAA_MAX_NUM_PCD_QUEUES RX
1254          * queues.
1255          */
1256         if (num_rx_fqs <= 0 || num_rx_fqs > DPAA_MAX_NUM_PCD_QUEUES) {
1257                 DPAA_PMD_ERR("Invalid number of RX queues\n");
1258                 return -EINVAL;
1259         }
1260
1261         dpaa_intf->rx_queues = rte_zmalloc(NULL,
1262                 sizeof(struct qman_fq) * num_rx_fqs, MAX_CACHELINE);
1263         if (!dpaa_intf->rx_queues) {
1264                 DPAA_PMD_ERR("Failed to alloc mem for RX queues\n");
1265                 return -ENOMEM;
1266         }
1267
1268         /* If congestion control is enabled globally*/
1269         if (td_threshold) {
1270                 dpaa_intf->cgr_rx = rte_zmalloc(NULL,
1271                         sizeof(struct qman_cgr) * num_rx_fqs, MAX_CACHELINE);
1272                 if (!dpaa_intf->cgr_rx) {
1273                         DPAA_PMD_ERR("Failed to alloc mem for cgr_rx\n");
1274                         ret = -ENOMEM;
1275                         goto free_rx;
1276                 }
1277
1278                 ret = qman_alloc_cgrid_range(&cgrid[0], num_rx_fqs, 1, 0);
1279                 if (ret != num_rx_fqs) {
1280                         DPAA_PMD_WARN("insufficient CGRIDs available");
1281                         ret = -EINVAL;
1282                         goto free_rx;
1283                 }
1284         } else {
1285                 dpaa_intf->cgr_rx = NULL;
1286         }
1287
1288         for (loop = 0; loop < num_rx_fqs; loop++) {
1289                 if (default_q)
1290                         fqid = cfg->rx_def;
1291                 else
1292                         fqid = DPAA_PCD_FQID_START + dpaa_intf->fif->mac_idx *
1293                                 DPAA_PCD_FQID_MULTIPLIER + loop;
1294
1295                 if (dpaa_intf->cgr_rx)
1296                         dpaa_intf->cgr_rx[loop].cgrid = cgrid[loop];
1297
1298                 ret = dpaa_rx_queue_init(&dpaa_intf->rx_queues[loop],
1299                         dpaa_intf->cgr_rx ? &dpaa_intf->cgr_rx[loop] : NULL,
1300                         fqid);
1301                 if (ret)
1302                         goto free_rx;
1303                 dpaa_intf->rx_queues[loop].dpaa_intf = dpaa_intf;
1304         }
1305         dpaa_intf->nb_rx_queues = num_rx_fqs;
1306
1307         /* Initialise Tx FQs.free_rx Have as many Tx FQ's as number of cores */
1308         num_cores = rte_lcore_count();
1309         dpaa_intf->tx_queues = rte_zmalloc(NULL, sizeof(struct qman_fq) *
1310                 num_cores, MAX_CACHELINE);
1311         if (!dpaa_intf->tx_queues) {
1312                 DPAA_PMD_ERR("Failed to alloc mem for TX queues\n");
1313                 ret = -ENOMEM;
1314                 goto free_rx;
1315         }
1316
1317         for (loop = 0; loop < num_cores; loop++) {
1318                 ret = dpaa_tx_queue_init(&dpaa_intf->tx_queues[loop],
1319                                          fman_intf);
1320                 if (ret)
1321                         goto free_tx;
1322                 dpaa_intf->tx_queues[loop].dpaa_intf = dpaa_intf;
1323         }
1324         dpaa_intf->nb_tx_queues = num_cores;
1325
1326 #ifdef RTE_LIBRTE_DPAA_DEBUG_DRIVER
1327         dpaa_debug_queue_init(&dpaa_intf->debug_queues[
1328                 DPAA_DEBUG_FQ_RX_ERROR], fman_intf->fqid_rx_err);
1329         dpaa_intf->debug_queues[DPAA_DEBUG_FQ_RX_ERROR].dpaa_intf = dpaa_intf;
1330         dpaa_debug_queue_init(&dpaa_intf->debug_queues[
1331                 DPAA_DEBUG_FQ_TX_ERROR], fman_intf->fqid_tx_err);
1332         dpaa_intf->debug_queues[DPAA_DEBUG_FQ_TX_ERROR].dpaa_intf = dpaa_intf;
1333 #endif
1334
1335         DPAA_PMD_DEBUG("All frame queues created");
1336
1337         /* Get the initial configuration for flow control */
1338         dpaa_fc_set_default(dpaa_intf);
1339
1340         /* reset bpool list, initialize bpool dynamically */
1341         list_for_each_entry_safe(bp, tmp_bp, &cfg->fman_if->bpool_list, node) {
1342                 list_del(&bp->node);
1343                 free(bp);
1344         }
1345
1346         /* Populate ethdev structure */
1347         eth_dev->dev_ops = &dpaa_devops;
1348         eth_dev->rx_pkt_burst = dpaa_eth_queue_rx;
1349         eth_dev->tx_pkt_burst = dpaa_eth_tx_drop_all;
1350
1351         /* Allocate memory for storing MAC addresses */
1352         eth_dev->data->mac_addrs = rte_zmalloc("mac_addr",
1353                 ETHER_ADDR_LEN * DPAA_MAX_MAC_FILTER, 0);
1354         if (eth_dev->data->mac_addrs == NULL) {
1355                 DPAA_PMD_ERR("Failed to allocate %d bytes needed to "
1356                                                 "store MAC addresses",
1357                                 ETHER_ADDR_LEN * DPAA_MAX_MAC_FILTER);
1358                 ret = -ENOMEM;
1359                 goto free_tx;
1360         }
1361
1362         /* copy the primary mac address */
1363         ether_addr_copy(&fman_intf->mac_addr, &eth_dev->data->mac_addrs[0]);
1364
1365         RTE_LOG(INFO, PMD, "net: dpaa: %s: %02x:%02x:%02x:%02x:%02x:%02x\n",
1366                 dpaa_device->name,
1367                 fman_intf->mac_addr.addr_bytes[0],
1368                 fman_intf->mac_addr.addr_bytes[1],
1369                 fman_intf->mac_addr.addr_bytes[2],
1370                 fman_intf->mac_addr.addr_bytes[3],
1371                 fman_intf->mac_addr.addr_bytes[4],
1372                 fman_intf->mac_addr.addr_bytes[5]);
1373
1374         /* Disable RX mode */
1375         fman_if_discard_rx_errors(fman_intf);
1376         fman_if_disable_rx(fman_intf);
1377         /* Disable promiscuous mode */
1378         fman_if_promiscuous_disable(fman_intf);
1379         /* Disable multicast */
1380         fman_if_reset_mcast_filter_table(fman_intf);
1381         /* Reset interface statistics */
1382         fman_if_stats_reset(fman_intf);
1383         /* Disable SG by default */
1384         fman_if_set_sg(fman_intf, 0);
1385         fman_if_set_maxfrm(fman_intf, ETHER_MAX_LEN + VLAN_TAG_SIZE);
1386
1387         return 0;
1388
1389 free_tx:
1390         rte_free(dpaa_intf->tx_queues);
1391         dpaa_intf->tx_queues = NULL;
1392         dpaa_intf->nb_tx_queues = 0;
1393
1394 free_rx:
1395         rte_free(dpaa_intf->cgr_rx);
1396         rte_free(dpaa_intf->rx_queues);
1397         dpaa_intf->rx_queues = NULL;
1398         dpaa_intf->nb_rx_queues = 0;
1399         return ret;
1400 }
1401
1402 static int
1403 dpaa_dev_uninit(struct rte_eth_dev *dev)
1404 {
1405         struct dpaa_if *dpaa_intf = dev->data->dev_private;
1406         int loop;
1407
1408         PMD_INIT_FUNC_TRACE();
1409
1410         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1411                 return -EPERM;
1412
1413         if (!dpaa_intf) {
1414                 DPAA_PMD_WARN("Already closed or not started");
1415                 return -1;
1416         }
1417
1418         dpaa_eth_dev_close(dev);
1419
1420         /* release configuration memory */
1421         if (dpaa_intf->fc_conf)
1422                 rte_free(dpaa_intf->fc_conf);
1423
1424         /* Release RX congestion Groups */
1425         if (dpaa_intf->cgr_rx) {
1426                 for (loop = 0; loop < dpaa_intf->nb_rx_queues; loop++)
1427                         qman_delete_cgr(&dpaa_intf->cgr_rx[loop]);
1428
1429                 qman_release_cgrid_range(dpaa_intf->cgr_rx[loop].cgrid,
1430                                          dpaa_intf->nb_rx_queues);
1431         }
1432
1433         rte_free(dpaa_intf->cgr_rx);
1434         dpaa_intf->cgr_rx = NULL;
1435
1436         rte_free(dpaa_intf->rx_queues);
1437         dpaa_intf->rx_queues = NULL;
1438
1439         rte_free(dpaa_intf->tx_queues);
1440         dpaa_intf->tx_queues = NULL;
1441
1442         dev->dev_ops = NULL;
1443         dev->rx_pkt_burst = NULL;
1444         dev->tx_pkt_burst = NULL;
1445
1446         return 0;
1447 }
1448
1449 static int
1450 rte_dpaa_probe(struct rte_dpaa_driver *dpaa_drv __rte_unused,
1451                struct rte_dpaa_device *dpaa_dev)
1452 {
1453         int diag;
1454         int ret;
1455         struct rte_eth_dev *eth_dev;
1456
1457         PMD_INIT_FUNC_TRACE();
1458
1459         /* In case of secondary process, the device is already configured
1460          * and no further action is required, except portal initialization
1461          * and verifying secondary attachment to port name.
1462          */
1463         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1464                 eth_dev = rte_eth_dev_attach_secondary(dpaa_dev->name);
1465                 if (!eth_dev)
1466                         return -ENOMEM;
1467                 eth_dev->device = &dpaa_dev->device;
1468                 eth_dev->dev_ops = &dpaa_devops;
1469                 rte_eth_dev_probing_finish(eth_dev);
1470                 return 0;
1471         }
1472
1473         if (!is_global_init) {
1474                 /* One time load of Qman/Bman drivers */
1475                 ret = qman_global_init();
1476                 if (ret) {
1477                         DPAA_PMD_ERR("QMAN initialization failed: %d",
1478                                      ret);
1479                         return ret;
1480                 }
1481                 ret = bman_global_init();
1482                 if (ret) {
1483                         DPAA_PMD_ERR("BMAN initialization failed: %d",
1484                                      ret);
1485                         return ret;
1486                 }
1487
1488                 if (access("/tmp/fmc.bin", F_OK) == -1) {
1489                         RTE_LOG(INFO, PMD,
1490                                 "* FMC not configured.Enabling default mode\n");
1491                         default_q = 1;
1492                 }
1493
1494                 /* disabling the default push mode for LS1043 */
1495                 if (dpaa_svr_family == SVR_LS1043A_FAMILY)
1496                         dpaa_push_mode_max_queue = 0;
1497
1498                 /* if push mode queues to be enabled. Currenly we are allowing
1499                  * only one queue per thread.
1500                  */
1501                 if (getenv("DPAA_PUSH_QUEUES_NUMBER")) {
1502                         dpaa_push_mode_max_queue =
1503                                         atoi(getenv("DPAA_PUSH_QUEUES_NUMBER"));
1504                         if (dpaa_push_mode_max_queue > DPAA_MAX_PUSH_MODE_QUEUE)
1505                             dpaa_push_mode_max_queue = DPAA_MAX_PUSH_MODE_QUEUE;
1506                 }
1507
1508                 is_global_init = 1;
1509         }
1510
1511         if (unlikely(!RTE_PER_LCORE(dpaa_io))) {
1512                 ret = rte_dpaa_portal_init((void *)1);
1513                 if (ret) {
1514                         DPAA_PMD_ERR("Unable to initialize portal");
1515                         return ret;
1516                 }
1517         }
1518
1519         eth_dev = rte_eth_dev_allocate(dpaa_dev->name);
1520         if (eth_dev == NULL)
1521                 return -ENOMEM;
1522
1523         eth_dev->data->dev_private = rte_zmalloc(
1524                                         "ethdev private structure",
1525                                         sizeof(struct dpaa_if),
1526                                         RTE_CACHE_LINE_SIZE);
1527         if (!eth_dev->data->dev_private) {
1528                 DPAA_PMD_ERR("Cannot allocate memzone for port data");
1529                 rte_eth_dev_release_port(eth_dev);
1530                 return -ENOMEM;
1531         }
1532
1533         eth_dev->device = &dpaa_dev->device;
1534         dpaa_dev->eth_dev = eth_dev;
1535
1536         /* Invoke PMD device initialization function */
1537         diag = dpaa_dev_init(eth_dev);
1538         if (diag == 0) {
1539                 rte_eth_dev_probing_finish(eth_dev);
1540                 return 0;
1541         }
1542
1543         rte_eth_dev_release_port(eth_dev);
1544         return diag;
1545 }
1546
1547 static int
1548 rte_dpaa_remove(struct rte_dpaa_device *dpaa_dev)
1549 {
1550         struct rte_eth_dev *eth_dev;
1551
1552         PMD_INIT_FUNC_TRACE();
1553
1554         eth_dev = dpaa_dev->eth_dev;
1555         dpaa_dev_uninit(eth_dev);
1556
1557         rte_eth_dev_release_port(eth_dev);
1558
1559         return 0;
1560 }
1561
1562 static struct rte_dpaa_driver rte_dpaa_pmd = {
1563         .drv_type = FSL_DPAA_ETH,
1564         .probe = rte_dpaa_probe,
1565         .remove = rte_dpaa_remove,
1566 };
1567
1568 RTE_PMD_REGISTER_DPAA(net_dpaa, rte_dpaa_pmd);