New upstream version 17.11.4
[deb_dpdk.git] / drivers / net / ena / base / ena_plat_dpdk.h
1 /*-
2 * BSD LICENSE
3 *
4 * Copyright (c) 2015-2016 Amazon.com, Inc. or its affiliates.
5 * All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 *
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
16 * distribution.
17 * * Neither the name of copyright holder nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
25 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
26 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
27 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 */
33
34 #ifndef DPDK_ENA_COM_ENA_PLAT_DPDK_H_
35 #define DPDK_ENA_COM_ENA_PLAT_DPDK_H_
36
37 #include <stdbool.h>
38 #include <stdlib.h>
39 #include <pthread.h>
40 #include <stdint.h>
41 #include <string.h>
42 #include <errno.h>
43
44 #include <rte_atomic.h>
45 #include <rte_branch_prediction.h>
46 #include <rte_cycles.h>
47 #include <rte_io.h>
48 #include <rte_log.h>
49 #include <rte_malloc.h>
50 #include <rte_memzone.h>
51 #include <rte_spinlock.h>
52
53 #include <sys/time.h>
54
55 typedef uint64_t u64;
56 typedef uint32_t u32;
57 typedef uint16_t u16;
58 typedef uint8_t u8;
59
60 typedef uint64_t dma_addr_t;
61 #ifndef ETIME
62 #define ETIME ETIMEDOUT
63 #endif
64
65 #define ena_atomic32_t rte_atomic32_t
66 #define ena_mem_handle_t const struct rte_memzone *
67
68 #define SZ_256 (256U)
69 #define SZ_4K (4096U)
70
71 #define ENA_COM_OK      0
72 #define ENA_COM_NO_MEM  -ENOMEM
73 #define ENA_COM_INVAL   -EINVAL
74 #define ENA_COM_NO_SPACE        -ENOSPC
75 #define ENA_COM_NO_DEVICE       -ENODEV
76 #define ENA_COM_PERMISSION      -EPERM
77 #define ENA_COM_TIMER_EXPIRED   -ETIME
78 #define ENA_COM_FAULT   -EFAULT
79 #define ENA_COM_TRY_AGAIN       -EAGAIN
80
81 #define ____cacheline_aligned __rte_cache_aligned
82
83 #define ENA_ABORT() abort()
84
85 #define ENA_MSLEEP(x) rte_delay_ms(x)
86 #define ENA_UDELAY(x) rte_delay_us(x)
87
88 #define ENA_TOUCH(x) ((void)(x))
89 #define memcpy_toio memcpy
90 #define wmb rte_wmb
91 #define rmb rte_wmb
92 #define mb rte_mb
93 #define __iomem
94
95 #define US_PER_S 1000000
96 #define ENA_GET_SYSTEM_USECS()                                          \
97         (rte_get_timer_cycles() * US_PER_S / rte_get_timer_hz())
98
99 #if RTE_LOG_LEVEL >= RTE_LOG_DEBUG
100 #define ENA_ASSERT(cond, format, arg...)                                \
101         do {                                                            \
102                 if (unlikely(!(cond))) {                                \
103                         RTE_LOG(ERR, PMD, format, ##arg);               \
104                         rte_panic("line %d\tassert \"" #cond "\""       \
105                                         "failed\n", __LINE__);          \
106                 }                                                       \
107         } while (0)
108 #else
109 #define ENA_ASSERT(cond, format, arg...) do {} while (0)
110 #endif
111
112 #define ENA_MAX32(x, y) RTE_MAX((x), (y))
113 #define ENA_MAX16(x, y) RTE_MAX((x), (y))
114 #define ENA_MAX8(x, y) RTE_MAX((x), (y))
115 #define ENA_MIN32(x, y) RTE_MIN((x), (y))
116 #define ENA_MIN16(x, y) RTE_MIN((x), (y))
117 #define ENA_MIN8(x, y) RTE_MIN((x), (y))
118
119 #define BITS_PER_LONG_LONG (__SIZEOF_LONG_LONG__ * 8)
120 #define U64_C(x) x ## ULL
121 #define BIT(nr)         (1UL << (nr))
122 #define BITS_PER_LONG   (__SIZEOF_LONG__ * 8)
123 #define GENMASK(h, l)   (((~0UL) << (l)) & (~0UL >> (BITS_PER_LONG - 1 - (h))))
124 #define GENMASK_ULL(h, l) (((~0ULL) - (1ULL << (l)) + 1) & \
125                           (~0ULL >> (BITS_PER_LONG_LONG - 1 - (h))))
126
127 #ifdef RTE_LIBRTE_ENA_COM_DEBUG
128 #define ena_trc_dbg(format, arg...)                                     \
129         RTE_LOG(DEBUG, PMD, "[ENA_COM: %s] " format, __func__, ##arg)
130 #define ena_trc_info(format, arg...)                                    \
131         RTE_LOG(INFO, PMD, "[ENA_COM: %s] " format, __func__, ##arg)
132 #define ena_trc_warn(format, arg...)                                    \
133         RTE_LOG(ERR, PMD, "[ENA_COM: %s] " format, __func__, ##arg)
134 #define ena_trc_err(format, arg...)                                     \
135         RTE_LOG(ERR, PMD, "[ENA_COM: %s] " format, __func__, ##arg)
136 #else
137 #define ena_trc_dbg(format, arg...) do { } while (0)
138 #define ena_trc_info(format, arg...) do { } while (0)
139 #define ena_trc_warn(format, arg...) do { } while (0)
140 #define ena_trc_err(format, arg...) do { } while (0)
141 #endif /* RTE_LIBRTE_ENA_COM_DEBUG */
142
143 /* Spinlock related methods */
144 #define ena_spinlock_t rte_spinlock_t
145 #define ENA_SPINLOCK_INIT(spinlock) rte_spinlock_init(&spinlock)
146 #define ENA_SPINLOCK_LOCK(spinlock, flags)                              \
147         ({(void)flags; rte_spinlock_lock(&spinlock); })
148 #define ENA_SPINLOCK_UNLOCK(spinlock, flags)                            \
149         ({(void)flags; rte_spinlock_unlock(&(spinlock)); })
150
151 #define q_waitqueue_t                   \
152         struct {                        \
153                 pthread_cond_t cond;    \
154                 pthread_mutex_t mutex;  \
155         }
156
157 #define ena_wait_queue_t q_waitqueue_t
158
159 #define ENA_WAIT_EVENT_INIT(waitqueue)                                  \
160         do {                                                            \
161                 pthread_mutex_init(&(waitqueue).mutex, NULL);           \
162                 pthread_cond_init(&(waitqueue).cond, NULL);             \
163         } while (0)
164
165 #define ENA_WAIT_EVENT_WAIT(waitevent, timeout)                         \
166         do {                                                            \
167                 struct timespec wait;                                   \
168                 struct timeval now;                                     \
169                 unsigned long timeout_us;                               \
170                 gettimeofday(&now, NULL);                               \
171                 wait.tv_sec = now.tv_sec + timeout / 1000000UL;         \
172                 timeout_us = timeout % 1000000UL;                       \
173                 wait.tv_nsec = (now.tv_usec + timeout_us) * 1000UL;     \
174                 pthread_mutex_lock(&waitevent.mutex);                   \
175                 pthread_cond_timedwait(&waitevent.cond,                 \
176                                 &waitevent.mutex, &wait);               \
177                 pthread_mutex_unlock(&waitevent.mutex);                 \
178         } while (0)
179 #define ENA_WAIT_EVENT_SIGNAL(waitevent) pthread_cond_signal(&waitevent.cond)
180 /* pthread condition doesn't need to be rearmed after usage */
181 #define ENA_WAIT_EVENT_CLEAR(...)
182
183 #define ena_wait_event_t ena_wait_queue_t
184 #define ENA_MIGHT_SLEEP()
185
186 #define ENA_MEM_ALLOC_COHERENT(dmadev, size, virt, phys, handle)        \
187         do {                                                            \
188                 const struct rte_memzone *mz;                           \
189                 char z_name[RTE_MEMZONE_NAMESIZE];                      \
190                 ENA_TOUCH(dmadev); ENA_TOUCH(handle);                   \
191                 snprintf(z_name, sizeof(z_name),                        \
192                                 "ena_alloc_%d", ena_alloc_cnt++);       \
193                 mz = rte_memzone_reserve(z_name, size, SOCKET_ID_ANY, 0); \
194                 handle = mz;                                            \
195                 if (mz == NULL) {                                       \
196                         virt = NULL;                                    \
197                         phys = 0;                                       \
198                 } else {                                                \
199                         memset(mz->addr, 0, size);                      \
200                         virt = mz->addr;                                \
201                         phys = mz->iova;                                \
202                 }                                                       \
203         } while (0)
204 #define ENA_MEM_FREE_COHERENT(dmadev, size, virt, phys, handle)         \
205                 ({ ENA_TOUCH(size); ENA_TOUCH(phys);                    \
206                    ENA_TOUCH(dmadev);                                   \
207                    rte_memzone_free(handle); })
208
209 #define ENA_MEM_ALLOC_COHERENT_NODE(dmadev, size, virt, phys, node, dev_node) \
210         do {                                                            \
211                 const struct rte_memzone *mz;                           \
212                 char z_name[RTE_MEMZONE_NAMESIZE];                      \
213                 ENA_TOUCH(dmadev); ENA_TOUCH(dev_node);                 \
214                 snprintf(z_name, sizeof(z_name),                        \
215                                 "ena_alloc_%d", ena_alloc_cnt++);       \
216                 mz = rte_memzone_reserve(z_name, size, node, 0); \
217                 if (mz == NULL) {                                       \
218                         virt = NULL;                                    \
219                         phys = 0;                                       \
220                 } else {                                                \
221                         memset(mz->addr, 0, size);                      \
222                         virt = mz->addr;                                \
223                         phys = mz->iova;                                \
224                 }                                                       \
225         } while (0)
226
227 #define ENA_MEM_ALLOC_NODE(dmadev, size, virt, node, dev_node) \
228         do {                                                            \
229                 ENA_TOUCH(dmadev); ENA_TOUCH(dev_node);                 \
230                 virt = rte_zmalloc_socket(NULL, size, 0, node);         \
231         } while (0)
232
233 #define ENA_MEM_ALLOC(dmadev, size) rte_zmalloc(NULL, size, 1)
234 #define ENA_MEM_FREE(dmadev, ptr) ({ENA_TOUCH(dmadev); rte_free(ptr); })
235
236 #define ENA_REG_WRITE32(value, reg) rte_write32_relaxed((value), (reg))
237 #define ENA_REG_READ32(reg) rte_read32_relaxed((reg))
238
239 #define ATOMIC32_INC(i32_ptr) rte_atomic32_inc(i32_ptr)
240 #define ATOMIC32_DEC(i32_ptr) rte_atomic32_dec(i32_ptr)
241 #define ATOMIC32_SET(i32_ptr, val) rte_atomic32_set(i32_ptr, val)
242 #define ATOMIC32_READ(i32_ptr) rte_atomic32_read(i32_ptr)
243
244 #define msleep(x) rte_delay_us(x * 1000)
245 #define udelay(x) rte_delay_us(x)
246
247 #define MAX_ERRNO       4095
248 #define IS_ERR(x) (((unsigned long)x) >= (unsigned long)-MAX_ERRNO)
249 #define ERR_PTR(error) ((void *)(long)error)
250 #define PTR_ERR(error) ((long)(void *)error)
251 #define might_sleep()
252
253 #endif /* DPDK_ENA_COM_ENA_PLAT_DPDK_H_ */