drivers/net/enic/base/cq_desc.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2008-2017 Cisco Systems, Inc.  All rights reserved.
   3  * Copyright 2007 Nuova Systems, Inc.  All rights reserved.
   4  */
   5
   6 #ifndef _CQ_DESC_H_
   7 #define _CQ_DESC_H_
   8
   9 /*
  10  * Completion queue descriptor types
  11  */
  12 enum cq_desc_types {
  13         CQ_DESC_TYPE_WQ_ENET = 0,
  14         CQ_DESC_TYPE_DESC_COPY = 1,
  15         CQ_DESC_TYPE_WQ_EXCH = 2,
  16         CQ_DESC_TYPE_RQ_ENET = 3,
  17         CQ_DESC_TYPE_RQ_FCP = 4,
  18         CQ_DESC_TYPE_IOMMU_MISS = 5,
  19         CQ_DESC_TYPE_SGL = 6,
  20         CQ_DESC_TYPE_CLASSIFIER = 7,
  21         CQ_DESC_TYPE_TEST = 127,
  22 };
  23
  24 /* Completion queue descriptor: 16B
  25  *
  26  * All completion queues have this basic layout.  The
  27  * type_specfic area is unique for each completion
  28  * queue type.
  29  */
  30 struct cq_desc {
  31         __le16 completed_index;
  32         __le16 q_number;
  33         u8 type_specfic[11];
  34         u8 type_color;
  35 };
  36
  37 #define CQ_DESC_TYPE_BITS        4
  38 #define CQ_DESC_TYPE_MASK        ((1 << CQ_DESC_TYPE_BITS) - 1)
  39 #define CQ_DESC_COLOR_MASK       1
  40 #define CQ_DESC_COLOR_SHIFT      7
  41 #define CQ_DESC_Q_NUM_BITS       10
  42 #define CQ_DESC_Q_NUM_MASK       ((1 << CQ_DESC_Q_NUM_BITS) - 1)
  43 #define CQ_DESC_COMP_NDX_BITS    12
  44 #define CQ_DESC_COMP_NDX_MASK    ((1 << CQ_DESC_COMP_NDX_BITS) - 1)
  45
  46 static inline void cq_color_enc(struct cq_desc *desc, const u8 color)
  47 {
  48         if (color)
  49                 desc->type_color |=  (1 << CQ_DESC_COLOR_SHIFT);
  50         else
  51                 desc->type_color &= ~(1 << CQ_DESC_COLOR_SHIFT);
  52 }
  53
  54 static inline void cq_desc_enc(struct cq_desc *desc,
  55         const u8 type, const u8 color, const u16 q_number,
  56         const u16 completed_index)
  57 {
  58         desc->type_color = (type & CQ_DESC_TYPE_MASK) |
  59                 ((color & CQ_DESC_COLOR_MASK) << CQ_DESC_COLOR_SHIFT);
  60         desc->q_number = cpu_to_le16(q_number & CQ_DESC_Q_NUM_MASK);
  61         desc->completed_index = cpu_to_le16(completed_index &
  62                 CQ_DESC_COMP_NDX_MASK);
  63 }
  64
  65 static inline void cq_desc_dec(const struct cq_desc *desc_arg,
  66         u8 *type, u8 *color, u16 *q_number, u16 *completed_index)
  67 {
  68         const struct cq_desc *desc = desc_arg;
  69         const u8 type_color = desc->type_color;
  70
  71         *color = (type_color >> CQ_DESC_COLOR_SHIFT) & CQ_DESC_COLOR_MASK;
  72
  73         /*
  74          * Make sure color bit is read from desc *before* other fields
  75          * are read from desc.  Hardware guarantees color bit is last
  76          * bit (byte) written.  Adding the rmb() prevents the compiler
  77          * and/or CPU from reordering the reads which would potentially
  78          * result in reading stale values.
  79          */
  80
  81         rmb();
  82
  83         *type = type_color & CQ_DESC_TYPE_MASK;
  84         *q_number = le16_to_cpu(desc->q_number) & CQ_DESC_Q_NUM_MASK;
  85         *completed_index = le16_to_cpu(desc->completed_index) &
  86                 CQ_DESC_COMP_NDX_MASK;
  87 }
  88
  89 static inline void cq_color_dec(const struct cq_desc *desc_arg, u8 *color)
  90 {
  91         volatile const struct cq_desc *desc = desc_arg;
  92
  93         *color = (desc->type_color >> CQ_DESC_COLOR_SHIFT) & CQ_DESC_COLOR_MASK;
  94 }
  95
  96 #endif /* _CQ_DESC_H_ */