Imported Upstream version 16.07-rc3
[deb_dpdk.git] / drivers / net / enic / enic_main.c
1 /*
2  * Copyright 2008-2014 Cisco Systems, Inc.  All rights reserved.
3  * Copyright 2007 Nuova Systems, Inc.  All rights reserved.
4  *
5  * Copyright (c) 2014, Cisco Systems, Inc.
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  *
12  * 1. Redistributions of source code must retain the above copyright
13  * notice, this list of conditions and the following disclaimer.
14  *
15  * 2. Redistributions in binary form must reproduce the above copyright
16  * notice, this list of conditions and the following disclaimer in
17  * the documentation and/or other materials provided with the
18  * distribution.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
21  * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
22  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
23  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
24  * COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
25  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
26  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
27  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
28  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
30  * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
31  * POSSIBILITY OF SUCH DAMAGE.
32  *
33  */
34
35 #include <stdio.h>
36
37 #include <sys/stat.h>
38 #include <sys/mman.h>
39 #include <fcntl.h>
40 #include <libgen.h>
41
42 #include <rte_pci.h>
43 #include <rte_memzone.h>
44 #include <rte_malloc.h>
45 #include <rte_mbuf.h>
46 #include <rte_string_fns.h>
47 #include <rte_ethdev.h>
48
49 #include "enic_compat.h"
50 #include "enic.h"
51 #include "wq_enet_desc.h"
52 #include "rq_enet_desc.h"
53 #include "cq_enet_desc.h"
54 #include "vnic_enet.h"
55 #include "vnic_dev.h"
56 #include "vnic_wq.h"
57 #include "vnic_rq.h"
58 #include "vnic_cq.h"
59 #include "vnic_intr.h"
60 #include "vnic_nic.h"
61
62 static inline int enic_is_sriov_vf(struct enic *enic)
63 {
64         return enic->pdev->id.device_id == PCI_DEVICE_ID_CISCO_VIC_ENET_VF;
65 }
66
67 static int is_zero_addr(uint8_t *addr)
68 {
69         return !(addr[0] |  addr[1] | addr[2] | addr[3] | addr[4] | addr[5]);
70 }
71
72 static int is_mcast_addr(uint8_t *addr)
73 {
74         return addr[0] & 1;
75 }
76
77 static int is_eth_addr_valid(uint8_t *addr)
78 {
79         return !is_mcast_addr(addr) && !is_zero_addr(addr);
80 }
81
82 static void
83 enic_rxmbuf_queue_release(__rte_unused struct enic *enic, struct vnic_rq *rq)
84 {
85         uint16_t i;
86
87         if (!rq || !rq->mbuf_ring) {
88                 dev_debug(enic, "Pointer to rq or mbuf_ring is NULL");
89                 return;
90         }
91
92         for (i = 0; i < rq->ring.desc_count; i++) {
93                 if (rq->mbuf_ring[i]) {
94                         rte_pktmbuf_free_seg(rq->mbuf_ring[i]);
95                         rq->mbuf_ring[i] = NULL;
96                 }
97         }
98 }
99
100 void enic_set_hdr_split_size(struct enic *enic, u16 split_hdr_size)
101 {
102         vnic_set_hdr_split_size(enic->vdev, split_hdr_size);
103 }
104
105 static void enic_free_wq_buf(struct vnic_wq_buf *buf)
106 {
107         struct rte_mbuf *mbuf = (struct rte_mbuf *)buf->mb;
108
109         rte_pktmbuf_free_seg(mbuf);
110         buf->mb = NULL;
111 }
112
113 static void enic_log_q_error(struct enic *enic)
114 {
115         unsigned int i;
116         u32 error_status;
117
118         for (i = 0; i < enic->wq_count; i++) {
119                 error_status = vnic_wq_error_status(&enic->wq[i]);
120                 if (error_status)
121                         dev_err(enic, "WQ[%d] error_status %d\n", i,
122                                 error_status);
123         }
124
125         for (i = 0; i < enic_vnic_rq_count(enic); i++) {
126                 if (!enic->rq[i].in_use)
127                         continue;
128                 error_status = vnic_rq_error_status(&enic->rq[i]);
129                 if (error_status)
130                         dev_err(enic, "RQ[%d] error_status %d\n", i,
131                                 error_status);
132         }
133 }
134
135 static void enic_clear_soft_stats(struct enic *enic)
136 {
137         struct enic_soft_stats *soft_stats = &enic->soft_stats;
138         rte_atomic64_clear(&soft_stats->rx_nombuf);
139         rte_atomic64_clear(&soft_stats->rx_packet_errors);
140 }
141
142 static void enic_init_soft_stats(struct enic *enic)
143 {
144         struct enic_soft_stats *soft_stats = &enic->soft_stats;
145         rte_atomic64_init(&soft_stats->rx_nombuf);
146         rte_atomic64_init(&soft_stats->rx_packet_errors);
147         enic_clear_soft_stats(enic);
148 }
149
150 void enic_dev_stats_clear(struct enic *enic)
151 {
152         if (vnic_dev_stats_clear(enic->vdev))
153                 dev_err(enic, "Error in clearing stats\n");
154         enic_clear_soft_stats(enic);
155 }
156
157 void enic_dev_stats_get(struct enic *enic, struct rte_eth_stats *r_stats)
158 {
159         struct vnic_stats *stats;
160         struct enic_soft_stats *soft_stats = &enic->soft_stats;
161         int64_t rx_truncated;
162         uint64_t rx_packet_errors;
163
164         if (vnic_dev_stats_dump(enic->vdev, &stats)) {
165                 dev_err(enic, "Error in getting stats\n");
166                 return;
167         }
168
169         /* The number of truncated packets can only be calculated by
170          * subtracting a hardware counter from error packets received by
171          * the driver. Note: this causes transient inaccuracies in the
172          * ipackets count. Also, the length of truncated packets are
173          * counted in ibytes even though truncated packets are dropped
174          * which can make ibytes be slightly higher than it should be.
175          */
176         rx_packet_errors = rte_atomic64_read(&soft_stats->rx_packet_errors);
177         rx_truncated = rx_packet_errors - stats->rx.rx_errors -
178                 stats->rx.rx_no_bufs;
179
180         r_stats->ipackets = stats->rx.rx_frames_ok - rx_truncated;
181         r_stats->opackets = stats->tx.tx_frames_ok;
182
183         r_stats->ibytes = stats->rx.rx_bytes_ok;
184         r_stats->obytes = stats->tx.tx_bytes_ok;
185
186         r_stats->ierrors = stats->rx.rx_errors + stats->rx.rx_drop;
187         r_stats->oerrors = stats->tx.tx_errors;
188
189         r_stats->imissed = stats->rx.rx_no_bufs + rx_truncated;
190
191         r_stats->rx_nombuf = rte_atomic64_read(&soft_stats->rx_nombuf);
192 }
193
194 void enic_del_mac_address(struct enic *enic)
195 {
196         if (vnic_dev_del_addr(enic->vdev, enic->mac_addr))
197                 dev_err(enic, "del mac addr failed\n");
198 }
199
200 void enic_set_mac_address(struct enic *enic, uint8_t *mac_addr)
201 {
202         int err;
203
204         if (!is_eth_addr_valid(mac_addr)) {
205                 dev_err(enic, "invalid mac address\n");
206                 return;
207         }
208
209         err = vnic_dev_del_addr(enic->vdev, enic->mac_addr);
210         if (err) {
211                 dev_err(enic, "del mac addr failed\n");
212                 return;
213         }
214
215         ether_addr_copy((struct ether_addr *)mac_addr,
216                 (struct ether_addr *)enic->mac_addr);
217
218         err = vnic_dev_add_addr(enic->vdev, mac_addr);
219         if (err) {
220                 dev_err(enic, "add mac addr failed\n");
221                 return;
222         }
223 }
224
225 static void
226 enic_free_rq_buf(struct rte_mbuf **mbuf)
227 {
228         if (*mbuf == NULL)
229                 return;
230
231         rte_pktmbuf_free(*mbuf);
232         mbuf = NULL;
233 }
234
235 void enic_init_vnic_resources(struct enic *enic)
236 {
237         unsigned int error_interrupt_enable = 1;
238         unsigned int error_interrupt_offset = 0;
239         unsigned int index = 0;
240         unsigned int cq_idx;
241         struct vnic_rq *data_rq;
242
243         for (index = 0; index < enic->rq_count; index++) {
244                 cq_idx = enic_cq_rq(enic, enic_sop_rq(index));
245
246                 vnic_rq_init(&enic->rq[enic_sop_rq(index)],
247                         cq_idx,
248                         error_interrupt_enable,
249                         error_interrupt_offset);
250
251                 data_rq = &enic->rq[enic_data_rq(index)];
252                 if (data_rq->in_use)
253                         vnic_rq_init(data_rq,
254                                      cq_idx,
255                                      error_interrupt_enable,
256                                      error_interrupt_offset);
257
258                 vnic_cq_init(&enic->cq[cq_idx],
259                         0 /* flow_control_enable */,
260                         1 /* color_enable */,
261                         0 /* cq_head */,
262                         0 /* cq_tail */,
263                         1 /* cq_tail_color */,
264                         0 /* interrupt_enable */,
265                         1 /* cq_entry_enable */,
266                         0 /* cq_message_enable */,
267                         0 /* interrupt offset */,
268                         0 /* cq_message_addr */);
269         }
270
271         for (index = 0; index < enic->wq_count; index++) {
272                 vnic_wq_init(&enic->wq[index],
273                         enic_cq_wq(enic, index),
274                         error_interrupt_enable,
275                         error_interrupt_offset);
276
277                 cq_idx = enic_cq_wq(enic, index);
278                 vnic_cq_init(&enic->cq[cq_idx],
279                         0 /* flow_control_enable */,
280                         1 /* color_enable */,
281                         0 /* cq_head */,
282                         0 /* cq_tail */,
283                         1 /* cq_tail_color */,
284                         0 /* interrupt_enable */,
285                         0 /* cq_entry_enable */,
286                         1 /* cq_message_enable */,
287                         0 /* interrupt offset */,
288                         (u64)enic->wq[index].cqmsg_rz->phys_addr);
289         }
290
291         vnic_intr_init(&enic->intr,
292                 enic->config.intr_timer_usec,
293                 enic->config.intr_timer_type,
294                 /*mask_on_assertion*/1);
295 }
296
297
298 static int
299 enic_alloc_rx_queue_mbufs(struct enic *enic, struct vnic_rq *rq)
300 {
301         struct rte_mbuf *mb;
302         struct rq_enet_desc *rqd = rq->ring.descs;
303         unsigned i;
304         dma_addr_t dma_addr;
305
306         if (!rq->in_use)
307                 return 0;
308
309         dev_debug(enic, "queue %u, allocating %u rx queue mbufs\n", rq->index,
310                   rq->ring.desc_count);
311
312         for (i = 0; i < rq->ring.desc_count; i++, rqd++) {
313                 mb = rte_mbuf_raw_alloc(rq->mp);
314                 if (mb == NULL) {
315                         dev_err(enic, "RX mbuf alloc failed queue_id=%u\n",
316                         (unsigned)rq->index);
317                         return -ENOMEM;
318                 }
319
320                 dma_addr = (dma_addr_t)(mb->buf_physaddr
321                            + RTE_PKTMBUF_HEADROOM);
322                 rq_enet_desc_enc(rqd, dma_addr,
323                                 (rq->is_sop ? RQ_ENET_TYPE_ONLY_SOP
324                                 : RQ_ENET_TYPE_NOT_SOP),
325                                 mb->buf_len - RTE_PKTMBUF_HEADROOM);
326                 rq->mbuf_ring[i] = mb;
327         }
328
329         /* make sure all prior writes are complete before doing the PIO write */
330         rte_rmb();
331
332         /* Post all but the last buffer to VIC. */
333         rq->posted_index = rq->ring.desc_count - 1;
334
335         rq->rx_nb_hold = 0;
336
337         dev_debug(enic, "port=%u, qidx=%u, Write %u posted idx, %u sw held\n",
338                 enic->port_id, rq->index, rq->posted_index, rq->rx_nb_hold);
339         iowrite32(rq->posted_index, &rq->ctrl->posted_index);
340         iowrite32(0, &rq->ctrl->fetch_index);
341         rte_rmb();
342
343         return 0;
344
345 }
346
347 static void *
348 enic_alloc_consistent(void *priv, size_t size,
349         dma_addr_t *dma_handle, u8 *name)
350 {
351         void *vaddr;
352         const struct rte_memzone *rz;
353         *dma_handle = 0;
354         struct enic *enic = (struct enic *)priv;
355         struct enic_memzone_entry *mze;
356
357         rz = rte_memzone_reserve_aligned((const char *)name,
358                                          size, SOCKET_ID_ANY, 0, ENIC_ALIGN);
359         if (!rz) {
360                 pr_err("%s : Failed to allocate memory requested for %s\n",
361                         __func__, name);
362                 return NULL;
363         }
364
365         vaddr = rz->addr;
366         *dma_handle = (dma_addr_t)rz->phys_addr;
367
368         mze = rte_malloc("enic memzone entry",
369                          sizeof(struct enic_memzone_entry), 0);
370
371         if (!mze) {
372                 pr_err("%s : Failed to allocate memory for memzone list\n",
373                        __func__);
374                 rte_memzone_free(rz);
375         }
376
377         mze->rz = rz;
378
379         rte_spinlock_lock(&enic->memzone_list_lock);
380         LIST_INSERT_HEAD(&enic->memzone_list, mze, entries);
381         rte_spinlock_unlock(&enic->memzone_list_lock);
382
383         return vaddr;
384 }
385
386 static void
387 enic_free_consistent(void *priv,
388                      __rte_unused size_t size,
389                      void *vaddr,
390                      dma_addr_t dma_handle)
391 {
392         struct enic_memzone_entry *mze;
393         struct enic *enic = (struct enic *)priv;
394
395         rte_spinlock_lock(&enic->memzone_list_lock);
396         LIST_FOREACH(mze, &enic->memzone_list, entries) {
397                 if (mze->rz->addr == vaddr &&
398                     mze->rz->phys_addr == dma_handle)
399                         break;
400         }
401         if (mze == NULL) {
402                 rte_spinlock_unlock(&enic->memzone_list_lock);
403                 dev_warning(enic,
404                             "Tried to free memory, but couldn't find it in the memzone list\n");
405                 return;
406         }
407         LIST_REMOVE(mze, entries);
408         rte_spinlock_unlock(&enic->memzone_list_lock);
409         rte_memzone_free(mze->rz);
410         rte_free(mze);
411 }
412
413 static void
414 enic_intr_handler(__rte_unused struct rte_intr_handle *handle,
415         void *arg)
416 {
417         struct enic *enic = pmd_priv((struct rte_eth_dev *)arg);
418
419         vnic_intr_return_all_credits(&enic->intr);
420
421         enic_log_q_error(enic);
422 }
423
424 int enic_enable(struct enic *enic)
425 {
426         unsigned int index;
427         int err;
428         struct rte_eth_dev *eth_dev = enic->rte_dev;
429
430         eth_dev->data->dev_link.link_speed = vnic_dev_port_speed(enic->vdev);
431         eth_dev->data->dev_link.link_duplex = ETH_LINK_FULL_DUPLEX;
432         vnic_dev_notify_set(enic->vdev, -1); /* No Intr for notify */
433
434         if (enic_clsf_init(enic))
435                 dev_warning(enic, "Init of hash table for clsf failed."\
436                         "Flow director feature will not work\n");
437
438         for (index = 0; index < enic->rq_count; index++) {
439                 err = enic_alloc_rx_queue_mbufs(enic,
440                         &enic->rq[enic_sop_rq(index)]);
441                 if (err) {
442                         dev_err(enic, "Failed to alloc sop RX queue mbufs\n");
443                         return err;
444                 }
445                 err = enic_alloc_rx_queue_mbufs(enic,
446                         &enic->rq[enic_data_rq(index)]);
447                 if (err) {
448                         /* release the allocated mbufs for the sop rq*/
449                         enic_rxmbuf_queue_release(enic,
450                                 &enic->rq[enic_sop_rq(index)]);
451
452                         dev_err(enic, "Failed to alloc data RX queue mbufs\n");
453                         return err;
454                 }
455         }
456
457         for (index = 0; index < enic->wq_count; index++)
458                 enic_start_wq(enic, index);
459         for (index = 0; index < enic->rq_count; index++)
460                 enic_start_rq(enic, index);
461
462         vnic_dev_add_addr(enic->vdev, enic->mac_addr);
463
464         vnic_dev_enable_wait(enic->vdev);
465
466         /* Register and enable error interrupt */
467         rte_intr_callback_register(&(enic->pdev->intr_handle),
468                 enic_intr_handler, (void *)enic->rte_dev);
469
470         rte_intr_enable(&(enic->pdev->intr_handle));
471         vnic_intr_unmask(&enic->intr);
472
473         return 0;
474 }
475
476 int enic_alloc_intr_resources(struct enic *enic)
477 {
478         int err;
479
480         dev_info(enic, "vNIC resources used:  "\
481                 "wq %d rq %d cq %d intr %d\n",
482                 enic->wq_count, enic_vnic_rq_count(enic),
483                 enic->cq_count, enic->intr_count);
484
485         err = vnic_intr_alloc(enic->vdev, &enic->intr, 0);
486         if (err)
487                 enic_free_vnic_resources(enic);
488
489         return err;
490 }
491
492 void enic_free_rq(void *rxq)
493 {
494         struct vnic_rq *rq_sop, *rq_data;
495         struct enic *enic;
496
497         if (rxq == NULL)
498                 return;
499
500         rq_sop = (struct vnic_rq *)rxq;
501         enic = vnic_dev_priv(rq_sop->vdev);
502         rq_data = &enic->rq[rq_sop->data_queue_idx];
503
504         enic_rxmbuf_queue_release(enic, rq_sop);
505         if (rq_data->in_use)
506                 enic_rxmbuf_queue_release(enic, rq_data);
507
508         rte_free(rq_sop->mbuf_ring);
509         if (rq_data->in_use)
510                 rte_free(rq_data->mbuf_ring);
511
512         rq_sop->mbuf_ring = NULL;
513         rq_data->mbuf_ring = NULL;
514
515         vnic_rq_free(rq_sop);
516         if (rq_data->in_use)
517                 vnic_rq_free(rq_data);
518
519         vnic_cq_free(&enic->cq[rq_sop->index]);
520 }
521
522 void enic_start_wq(struct enic *enic, uint16_t queue_idx)
523 {
524         struct rte_eth_dev *eth_dev = enic->rte_dev;
525         vnic_wq_enable(&enic->wq[queue_idx]);
526         eth_dev->data->tx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STARTED;
527 }
528
529 int enic_stop_wq(struct enic *enic, uint16_t queue_idx)
530 {
531         struct rte_eth_dev *eth_dev = enic->rte_dev;
532         int ret;
533
534         ret = vnic_wq_disable(&enic->wq[queue_idx]);
535         if (ret)
536                 return ret;
537
538         eth_dev->data->tx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STOPPED;
539         return 0;
540 }
541
542 void enic_start_rq(struct enic *enic, uint16_t queue_idx)
543 {
544         struct vnic_rq *rq_sop = &enic->rq[enic_sop_rq(queue_idx)];
545         struct vnic_rq *rq_data = &enic->rq[rq_sop->data_queue_idx];
546         struct rte_eth_dev *eth_dev = enic->rte_dev;
547
548         if (rq_data->in_use)
549                 vnic_rq_enable(rq_data);
550         rte_mb();
551         vnic_rq_enable(rq_sop);
552         eth_dev->data->rx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STARTED;
553 }
554
555 int enic_stop_rq(struct enic *enic, uint16_t queue_idx)
556 {
557         int ret1 = 0, ret2 = 0;
558         struct rte_eth_dev *eth_dev = enic->rte_dev;
559         struct vnic_rq *rq_sop = &enic->rq[enic_sop_rq(queue_idx)];
560         struct vnic_rq *rq_data = &enic->rq[rq_sop->data_queue_idx];
561
562         ret2 = vnic_rq_disable(rq_sop);
563         rte_mb();
564         if (rq_data->in_use)
565                 ret1 = vnic_rq_disable(rq_data);
566
567         if (ret2)
568                 return ret2;
569         else if (ret1)
570                 return ret1;
571
572         eth_dev->data->rx_queue_state[queue_idx] = RTE_ETH_QUEUE_STATE_STOPPED;
573         return 0;
574 }
575
576 int enic_alloc_rq(struct enic *enic, uint16_t queue_idx,
577         unsigned int socket_id, struct rte_mempool *mp,
578         uint16_t nb_desc)
579 {
580         int rc;
581         uint16_t sop_queue_idx = enic_sop_rq(queue_idx);
582         uint16_t data_queue_idx = enic_data_rq(queue_idx);
583         struct vnic_rq *rq_sop = &enic->rq[sop_queue_idx];
584         struct vnic_rq *rq_data = &enic->rq[data_queue_idx];
585         unsigned int mbuf_size, mbufs_per_pkt;
586         unsigned int nb_sop_desc, nb_data_desc;
587         uint16_t min_sop, max_sop, min_data, max_data;
588
589         rq_sop->is_sop = 1;
590         rq_sop->data_queue_idx = data_queue_idx;
591         rq_data->is_sop = 0;
592         rq_data->data_queue_idx = 0;
593         rq_sop->socket_id = socket_id;
594         rq_sop->mp = mp;
595         rq_data->socket_id = socket_id;
596         rq_data->mp = mp;
597         rq_sop->in_use = 1;
598
599         mbuf_size = (uint16_t)(rte_pktmbuf_data_room_size(mp) -
600                                RTE_PKTMBUF_HEADROOM);
601
602         if (enic->rte_dev->data->dev_conf.rxmode.enable_scatter) {
603                 dev_info(enic, "Scatter rx mode enabled\n");
604                 /* ceil((mtu + ETHER_HDR_LEN + 4)/mbuf_size) */
605                 mbufs_per_pkt = ((enic->config.mtu + ETHER_HDR_LEN + 4) +
606                                  (mbuf_size - 1)) / mbuf_size;
607         } else {
608                 dev_info(enic, "Scatter rx mode disabled\n");
609                 mbufs_per_pkt = 1;
610         }
611
612         if (mbufs_per_pkt > 1) {
613                 dev_info(enic, "Scatter rx mode in use\n");
614                 rq_data->in_use = 1;
615         } else {
616                 dev_info(enic, "Scatter rx mode not being used\n");
617                 rq_data->in_use = 0;
618         }
619
620         /* number of descriptors have to be a multiple of 32 */
621         nb_sop_desc = (nb_desc / mbufs_per_pkt) & ~0x1F;
622         nb_data_desc = (nb_desc - nb_sop_desc) & ~0x1F;
623
624         rq_sop->max_mbufs_per_pkt = mbufs_per_pkt;
625         rq_data->max_mbufs_per_pkt = mbufs_per_pkt;
626
627         if (mbufs_per_pkt > 1) {
628                 min_sop = 64;
629                 max_sop = ((enic->config.rq_desc_count /
630                             (mbufs_per_pkt - 1)) & ~0x1F);
631                 min_data = min_sop * (mbufs_per_pkt - 1);
632                 max_data = enic->config.rq_desc_count;
633         } else {
634                 min_sop = 64;
635                 max_sop = enic->config.rq_desc_count;
636                 min_data = 0;
637                 max_data = 0;
638         }
639
640         if (nb_desc < (min_sop + min_data)) {
641                 dev_warning(enic,
642                             "Number of rx descs too low, adjusting to minimum\n");
643                 nb_sop_desc = min_sop;
644                 nb_data_desc = min_data;
645         } else if (nb_desc > (max_sop + max_data)) {
646                 dev_warning(enic,
647                             "Number of rx_descs too high, adjusting to maximum\n");
648                 nb_sop_desc = max_sop;
649                 nb_data_desc = max_data;
650         }
651         if (mbufs_per_pkt > 1) {
652                 dev_info(enic, "For mtu %d and mbuf size %d valid rx descriptor range is %d to %d\n",
653                          enic->config.mtu, mbuf_size, min_sop + min_data,
654                          max_sop + max_data);
655         }
656         dev_info(enic, "Using %d rx descriptors (sop %d, data %d)\n",
657                  nb_sop_desc + nb_data_desc, nb_sop_desc, nb_data_desc);
658
659         /* Allocate sop queue resources */
660         rc = vnic_rq_alloc(enic->vdev, rq_sop, sop_queue_idx,
661                 nb_sop_desc, sizeof(struct rq_enet_desc));
662         if (rc) {
663                 dev_err(enic, "error in allocation of sop rq\n");
664                 goto err_exit;
665         }
666         nb_sop_desc = rq_sop->ring.desc_count;
667
668         if (rq_data->in_use) {
669                 /* Allocate data queue resources */
670                 rc = vnic_rq_alloc(enic->vdev, rq_data, data_queue_idx,
671                                    nb_data_desc,
672                                    sizeof(struct rq_enet_desc));
673                 if (rc) {
674                         dev_err(enic, "error in allocation of data rq\n");
675                         goto err_free_rq_sop;
676                 }
677                 nb_data_desc = rq_data->ring.desc_count;
678         }
679         rc = vnic_cq_alloc(enic->vdev, &enic->cq[queue_idx], queue_idx,
680                            socket_id, nb_sop_desc + nb_data_desc,
681                            sizeof(struct cq_enet_rq_desc));
682         if (rc) {
683                 dev_err(enic, "error in allocation of cq for rq\n");
684                 goto err_free_rq_data;
685         }
686
687         /* Allocate the mbuf rings */
688         rq_sop->mbuf_ring = (struct rte_mbuf **)
689                 rte_zmalloc_socket("rq->mbuf_ring",
690                                    sizeof(struct rte_mbuf *) * nb_sop_desc,
691                                    RTE_CACHE_LINE_SIZE, rq_sop->socket_id);
692         if (rq_sop->mbuf_ring == NULL)
693                 goto err_free_cq;
694
695         if (rq_data->in_use) {
696                 rq_data->mbuf_ring = (struct rte_mbuf **)
697                         rte_zmalloc_socket("rq->mbuf_ring",
698                                 sizeof(struct rte_mbuf *) * nb_data_desc,
699                                 RTE_CACHE_LINE_SIZE, rq_sop->socket_id);
700                 if (rq_data->mbuf_ring == NULL)
701                         goto err_free_sop_mbuf;
702         }
703
704         return 0;
705
706 err_free_sop_mbuf:
707         rte_free(rq_sop->mbuf_ring);
708 err_free_cq:
709         /* cleanup on error */
710         vnic_cq_free(&enic->cq[queue_idx]);
711 err_free_rq_data:
712         if (rq_data->in_use)
713                 vnic_rq_free(rq_data);
714 err_free_rq_sop:
715         vnic_rq_free(rq_sop);
716 err_exit:
717         return -ENOMEM;
718 }
719
720 void enic_free_wq(void *txq)
721 {
722         struct vnic_wq *wq;
723         struct enic *enic;
724
725         if (txq == NULL)
726                 return;
727
728         wq = (struct vnic_wq *)txq;
729         enic = vnic_dev_priv(wq->vdev);
730         rte_memzone_free(wq->cqmsg_rz);
731         vnic_wq_free(wq);
732         vnic_cq_free(&enic->cq[enic->rq_count + wq->index]);
733 }
734
735 int enic_alloc_wq(struct enic *enic, uint16_t queue_idx,
736         unsigned int socket_id, uint16_t nb_desc)
737 {
738         int err;
739         struct vnic_wq *wq = &enic->wq[queue_idx];
740         unsigned int cq_index = enic_cq_wq(enic, queue_idx);
741         char name[NAME_MAX];
742         static int instance;
743
744         wq->socket_id = socket_id;
745         if (nb_desc) {
746                 if (nb_desc > enic->config.wq_desc_count) {
747                         dev_warning(enic,
748                                 "WQ %d - number of tx desc in cmd line (%d)"\
749                                 "is greater than that in the UCSM/CIMC adapter"\
750                                 "policy.  Applying the value in the adapter "\
751                                 "policy (%d)\n",
752                                 queue_idx, nb_desc, enic->config.wq_desc_count);
753                 } else if (nb_desc != enic->config.wq_desc_count) {
754                         enic->config.wq_desc_count = nb_desc;
755                         dev_info(enic,
756                                 "TX Queues - effective number of descs:%d\n",
757                                 nb_desc);
758                 }
759         }
760
761         /* Allocate queue resources */
762         err = vnic_wq_alloc(enic->vdev, &enic->wq[queue_idx], queue_idx,
763                 enic->config.wq_desc_count,
764                 sizeof(struct wq_enet_desc));
765         if (err) {
766                 dev_err(enic, "error in allocation of wq\n");
767                 return err;
768         }
769
770         err = vnic_cq_alloc(enic->vdev, &enic->cq[cq_index], cq_index,
771                 socket_id, enic->config.wq_desc_count,
772                 sizeof(struct cq_enet_wq_desc));
773         if (err) {
774                 vnic_wq_free(wq);
775                 dev_err(enic, "error in allocation of cq for wq\n");
776         }
777
778         /* setup up CQ message */
779         snprintf((char *)name, sizeof(name),
780                  "vnic_cqmsg-%s-%d-%d", enic->bdf_name, queue_idx,
781                 instance++);
782
783         wq->cqmsg_rz = rte_memzone_reserve_aligned((const char *)name,
784                                                    sizeof(uint32_t),
785                                                    SOCKET_ID_ANY, 0,
786                                                    ENIC_ALIGN);
787         if (!wq->cqmsg_rz)
788                 return -ENOMEM;
789
790         return err;
791 }
792
793 int enic_disable(struct enic *enic)
794 {
795         unsigned int i;
796         int err;
797
798         vnic_intr_mask(&enic->intr);
799         (void)vnic_intr_masked(&enic->intr); /* flush write */
800
801         vnic_dev_disable(enic->vdev);
802
803         enic_clsf_destroy(enic);
804
805         if (!enic_is_sriov_vf(enic))
806                 vnic_dev_del_addr(enic->vdev, enic->mac_addr);
807
808         for (i = 0; i < enic->wq_count; i++) {
809                 err = vnic_wq_disable(&enic->wq[i]);
810                 if (err)
811                         return err;
812         }
813         for (i = 0; i < enic_vnic_rq_count(enic); i++) {
814                 if (enic->rq[i].in_use) {
815                         err = vnic_rq_disable(&enic->rq[i]);
816                         if (err)
817                                 return err;
818                 }
819         }
820
821         vnic_dev_set_reset_flag(enic->vdev, 1);
822         vnic_dev_notify_unset(enic->vdev);
823
824         for (i = 0; i < enic->wq_count; i++)
825                 vnic_wq_clean(&enic->wq[i], enic_free_wq_buf);
826
827         for (i = 0; i < enic_vnic_rq_count(enic); i++)
828                 if (enic->rq[i].in_use)
829                         vnic_rq_clean(&enic->rq[i], enic_free_rq_buf);
830         for (i = 0; i < enic->cq_count; i++)
831                 vnic_cq_clean(&enic->cq[i]);
832         vnic_intr_clean(&enic->intr);
833
834         return 0;
835 }
836
837 static int enic_dev_wait(struct vnic_dev *vdev,
838         int (*start)(struct vnic_dev *, int),
839         int (*finished)(struct vnic_dev *, int *),
840         int arg)
841 {
842         int done;
843         int err;
844         int i;
845
846         err = start(vdev, arg);
847         if (err)
848                 return err;
849
850         /* Wait for func to complete...2 seconds max */
851         for (i = 0; i < 2000; i++) {
852                 err = finished(vdev, &done);
853                 if (err)
854                         return err;
855                 if (done)
856                         return 0;
857                 usleep(1000);
858         }
859         return -ETIMEDOUT;
860 }
861
862 static int enic_dev_open(struct enic *enic)
863 {
864         int err;
865
866         err = enic_dev_wait(enic->vdev, vnic_dev_open,
867                 vnic_dev_open_done, 0);
868         if (err)
869                 dev_err(enic_get_dev(enic),
870                         "vNIC device open failed, err %d\n", err);
871
872         return err;
873 }
874
875 static int enic_set_rsskey(struct enic *enic)
876 {
877         dma_addr_t rss_key_buf_pa;
878         union vnic_rss_key *rss_key_buf_va = NULL;
879         static union vnic_rss_key rss_key = {
880                 .key = {
881                         [0] = {.b = {85, 67, 83, 97, 119, 101, 115, 111, 109, 101}},
882                         [1] = {.b = {80, 65, 76, 79, 117, 110, 105, 113, 117, 101}},
883                         [2] = {.b = {76, 73, 78, 85, 88, 114, 111, 99, 107, 115}},
884                         [3] = {.b = {69, 78, 73, 67, 105, 115, 99, 111, 111, 108}},
885                 }
886         };
887         int err;
888         u8 name[NAME_MAX];
889
890         snprintf((char *)name, NAME_MAX, "rss_key-%s", enic->bdf_name);
891         rss_key_buf_va = enic_alloc_consistent(enic, sizeof(union vnic_rss_key),
892                 &rss_key_buf_pa, name);
893         if (!rss_key_buf_va)
894                 return -ENOMEM;
895
896         rte_memcpy(rss_key_buf_va, &rss_key, sizeof(union vnic_rss_key));
897
898         err = enic_set_rss_key(enic,
899                 rss_key_buf_pa,
900                 sizeof(union vnic_rss_key));
901
902         enic_free_consistent(enic, sizeof(union vnic_rss_key),
903                 rss_key_buf_va, rss_key_buf_pa);
904
905         return err;
906 }
907
908 static int enic_set_rsscpu(struct enic *enic, u8 rss_hash_bits)
909 {
910         dma_addr_t rss_cpu_buf_pa;
911         union vnic_rss_cpu *rss_cpu_buf_va = NULL;
912         int i;
913         int err;
914         u8 name[NAME_MAX];
915
916         snprintf((char *)name, NAME_MAX, "rss_cpu-%s", enic->bdf_name);
917         rss_cpu_buf_va = enic_alloc_consistent(enic, sizeof(union vnic_rss_cpu),
918                 &rss_cpu_buf_pa, name);
919         if (!rss_cpu_buf_va)
920                 return -ENOMEM;
921
922         for (i = 0; i < (1 << rss_hash_bits); i++)
923                 (*rss_cpu_buf_va).cpu[i / 4].b[i % 4] =
924                         enic_sop_rq(i % enic->rq_count);
925
926         err = enic_set_rss_cpu(enic,
927                 rss_cpu_buf_pa,
928                 sizeof(union vnic_rss_cpu));
929
930         enic_free_consistent(enic, sizeof(union vnic_rss_cpu),
931                 rss_cpu_buf_va, rss_cpu_buf_pa);
932
933         return err;
934 }
935
936 static int enic_set_niccfg(struct enic *enic, u8 rss_default_cpu,
937         u8 rss_hash_type, u8 rss_hash_bits, u8 rss_base_cpu, u8 rss_enable)
938 {
939         const u8 tso_ipid_split_en = 0;
940         int err;
941
942         /* Enable VLAN tag stripping */
943
944         err = enic_set_nic_cfg(enic,
945                 rss_default_cpu, rss_hash_type,
946                 rss_hash_bits, rss_base_cpu,
947                 rss_enable, tso_ipid_split_en,
948                 enic->ig_vlan_strip_en);
949
950         return err;
951 }
952
953 int enic_set_rss_nic_cfg(struct enic *enic)
954 {
955         const u8 rss_default_cpu = 0;
956         const u8 rss_hash_type = NIC_CFG_RSS_HASH_TYPE_IPV4 |
957             NIC_CFG_RSS_HASH_TYPE_TCP_IPV4 |
958             NIC_CFG_RSS_HASH_TYPE_IPV6 |
959             NIC_CFG_RSS_HASH_TYPE_TCP_IPV6;
960         const u8 rss_hash_bits = 7;
961         const u8 rss_base_cpu = 0;
962         u8 rss_enable = ENIC_SETTING(enic, RSS) && (enic->rq_count > 1);
963
964         if (rss_enable) {
965                 if (!enic_set_rsskey(enic)) {
966                         if (enic_set_rsscpu(enic, rss_hash_bits)) {
967                                 rss_enable = 0;
968                                 dev_warning(enic, "RSS disabled, "\
969                                         "Failed to set RSS cpu indirection table.");
970                         }
971                 } else {
972                         rss_enable = 0;
973                         dev_warning(enic,
974                                 "RSS disabled, Failed to set RSS key.\n");
975                 }
976         }
977
978         return enic_set_niccfg(enic, rss_default_cpu, rss_hash_type,
979                 rss_hash_bits, rss_base_cpu, rss_enable);
980 }
981
982 int enic_setup_finish(struct enic *enic)
983 {
984         int ret;
985
986         enic_init_soft_stats(enic);
987
988         ret = enic_set_rss_nic_cfg(enic);
989         if (ret) {
990                 dev_err(enic, "Failed to config nic, aborting.\n");
991                 return -1;
992         }
993
994         /* Default conf */
995         vnic_dev_packet_filter(enic->vdev,
996                 1 /* directed  */,
997                 1 /* multicast */,
998                 1 /* broadcast */,
999                 0 /* promisc   */,
1000                 1 /* allmulti  */);
1001
1002         enic->promisc = 0;
1003         enic->allmulti = 1;
1004
1005         return 0;
1006 }
1007
1008 void enic_add_packet_filter(struct enic *enic)
1009 {
1010         /* Args -> directed, multicast, broadcast, promisc, allmulti */
1011         vnic_dev_packet_filter(enic->vdev, 1, 1, 1,
1012                 enic->promisc, enic->allmulti);
1013 }
1014
1015 int enic_get_link_status(struct enic *enic)
1016 {
1017         return vnic_dev_link_status(enic->vdev);
1018 }
1019
1020 static void enic_dev_deinit(struct enic *enic)
1021 {
1022         struct rte_eth_dev *eth_dev = enic->rte_dev;
1023
1024         rte_free(eth_dev->data->mac_addrs);
1025 }
1026
1027
1028 int enic_set_vnic_res(struct enic *enic)
1029 {
1030         struct rte_eth_dev *eth_dev = enic->rte_dev;
1031         int rc = 0;
1032
1033         /* With Rx scatter support, two RQs are now used per RQ used by
1034          * the application.
1035          */
1036         if (enic->conf_rq_count < eth_dev->data->nb_rx_queues) {
1037                 dev_err(dev, "Not enough Receive queues. Requested:%u which uses %d RQs on VIC, Configured:%u\n",
1038                         eth_dev->data->nb_rx_queues,
1039                         eth_dev->data->nb_rx_queues * 2, enic->conf_rq_count);
1040                 rc = -EINVAL;
1041         }
1042         if (enic->conf_wq_count < eth_dev->data->nb_tx_queues) {
1043                 dev_err(dev, "Not enough Transmit queues. Requested:%u, Configured:%u\n",
1044                         eth_dev->data->nb_tx_queues, enic->conf_wq_count);
1045                 rc = -EINVAL;
1046         }
1047
1048         if (enic->conf_cq_count < (eth_dev->data->nb_rx_queues +
1049                                    eth_dev->data->nb_tx_queues)) {
1050                 dev_err(dev, "Not enough Completion queues. Required:%u, Configured:%u\n",
1051                         (eth_dev->data->nb_rx_queues +
1052                          eth_dev->data->nb_tx_queues), enic->conf_cq_count);
1053                 rc = -EINVAL;
1054         }
1055
1056         if (rc == 0) {
1057                 enic->rq_count = eth_dev->data->nb_rx_queues;
1058                 enic->wq_count = eth_dev->data->nb_tx_queues;
1059                 enic->cq_count = enic->rq_count + enic->wq_count;
1060         }
1061
1062         return rc;
1063 }
1064
1065 /* The Cisco NIC can send and receive packets up to a max packet size
1066  * determined by the NIC type and firmware. There is also an MTU
1067  * configured into the NIC via the CIMC/UCSM management interface
1068  * which can be overridden by this function (up to the max packet size).
1069  * Depending on the network setup, doing so may cause packet drops
1070  * and unexpected behavior.
1071  */
1072 int enic_set_mtu(struct enic *enic, uint16_t new_mtu)
1073 {
1074         uint16_t old_mtu;       /* previous setting */
1075         uint16_t config_mtu;    /* Value configured into NIC via CIMC/UCSM */
1076         struct rte_eth_dev *eth_dev = enic->rte_dev;
1077
1078         old_mtu = eth_dev->data->mtu;
1079         config_mtu = enic->config.mtu;
1080
1081         /* only works with Rx scatter disabled */
1082         if (enic->rte_dev->data->dev_conf.rxmode.enable_scatter)
1083                 return -ENOTSUP;
1084
1085         if (new_mtu > enic->max_mtu) {
1086                 dev_err(enic,
1087                         "MTU not updated: requested (%u) greater than max (%u)\n",
1088                         new_mtu, enic->max_mtu);
1089                 return -EINVAL;
1090         }
1091         if (new_mtu < ENIC_MIN_MTU) {
1092                 dev_info(enic,
1093                         "MTU not updated: requested (%u) less than min (%u)\n",
1094                         new_mtu, ENIC_MIN_MTU);
1095                 return -EINVAL;
1096         }
1097         if (new_mtu > config_mtu)
1098                 dev_warning(enic,
1099                         "MTU (%u) is greater than value configured in NIC (%u)\n",
1100                         new_mtu, config_mtu);
1101
1102         /* update the mtu */
1103         eth_dev->data->mtu = new_mtu;
1104
1105         dev_info(enic, "MTU changed from %u to %u\n",  old_mtu, new_mtu);
1106         return 0;
1107 }
1108
1109 static int enic_dev_init(struct enic *enic)
1110 {
1111         int err;
1112         struct rte_eth_dev *eth_dev = enic->rte_dev;
1113
1114         vnic_dev_intr_coal_timer_info_default(enic->vdev);
1115
1116         /* Get vNIC configuration
1117         */
1118         err = enic_get_vnic_config(enic);
1119         if (err) {
1120                 dev_err(dev, "Get vNIC configuration failed, aborting\n");
1121                 return err;
1122         }
1123
1124         eth_dev->data->mac_addrs = rte_zmalloc("enic_mac_addr", ETH_ALEN, 0);
1125         if (!eth_dev->data->mac_addrs) {
1126                 dev_err(enic, "mac addr storage alloc failed, aborting.\n");
1127                 return -1;
1128         }
1129         ether_addr_copy((struct ether_addr *) enic->mac_addr,
1130                 &eth_dev->data->mac_addrs[0]);
1131
1132
1133         /* Get available resource counts
1134         */
1135         enic_get_res_counts(enic);
1136
1137         vnic_dev_set_reset_flag(enic->vdev, 0);
1138
1139         return 0;
1140
1141 }
1142
1143 int enic_probe(struct enic *enic)
1144 {
1145         struct rte_pci_device *pdev = enic->pdev;
1146         int err = -1;
1147
1148         dev_debug(enic, " Initializing ENIC PMD\n");
1149
1150         enic->bar0.vaddr = (void *)pdev->mem_resource[0].addr;
1151         enic->bar0.len = pdev->mem_resource[0].len;
1152
1153         /* Register vNIC device */
1154         enic->vdev = vnic_dev_register(NULL, enic, enic->pdev, &enic->bar0, 1);
1155         if (!enic->vdev) {
1156                 dev_err(enic, "vNIC registration failed, aborting\n");
1157                 goto err_out;
1158         }
1159
1160         LIST_INIT(&enic->memzone_list);
1161         rte_spinlock_init(&enic->memzone_list_lock);
1162
1163         vnic_register_cbacks(enic->vdev,
1164                 enic_alloc_consistent,
1165                 enic_free_consistent);
1166
1167         /* Issue device open to get device in known state */
1168         err = enic_dev_open(enic);
1169         if (err) {
1170                 dev_err(enic, "vNIC dev open failed, aborting\n");
1171                 goto err_out_unregister;
1172         }
1173
1174         /* Set ingress vlan rewrite mode before vnic initialization */
1175         err = vnic_dev_set_ig_vlan_rewrite_mode(enic->vdev,
1176                 IG_VLAN_REWRITE_MODE_PASS_THRU);
1177         if (err) {
1178                 dev_err(enic,
1179                         "Failed to set ingress vlan rewrite mode, aborting.\n");
1180                 goto err_out_dev_close;
1181         }
1182
1183         /* Issue device init to initialize the vnic-to-switch link.
1184          * We'll start with carrier off and wait for link UP
1185          * notification later to turn on carrier.  We don't need
1186          * to wait here for the vnic-to-switch link initialization
1187          * to complete; link UP notification is the indication that
1188          * the process is complete.
1189          */
1190
1191         err = vnic_dev_init(enic->vdev, 0);
1192         if (err) {
1193                 dev_err(enic, "vNIC dev init failed, aborting\n");
1194                 goto err_out_dev_close;
1195         }
1196
1197         err = enic_dev_init(enic);
1198         if (err) {
1199                 dev_err(enic, "Device initialization failed, aborting\n");
1200                 goto err_out_dev_close;
1201         }
1202
1203         return 0;
1204
1205 err_out_dev_close:
1206         vnic_dev_close(enic->vdev);
1207 err_out_unregister:
1208         vnic_dev_unregister(enic->vdev);
1209 err_out:
1210         return err;
1211 }
1212
1213 void enic_remove(struct enic *enic)
1214 {
1215         enic_dev_deinit(enic);
1216         vnic_dev_close(enic->vdev);
1217         vnic_dev_unregister(enic->vdev);
1218 }