drivers/net/enic/enic_rxtx.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright 2008-2017 Cisco Systems, Inc.  All rights reserved.
   3  * Copyright 2007 Nuova Systems, Inc.  All rights reserved.
   4  */
   5
   6 #include <rte_mbuf.h>
   7 #include <rte_ethdev_driver.h>
   8 #include <rte_net.h>
   9 #include <rte_prefetch.h>
  10
  11 #include "enic_compat.h"
  12 #include "rq_enet_desc.h"
  13 #include "enic.h"
  14 #include <rte_ether.h>
  15 #include <rte_ip.h>
  16 #include <rte_tcp.h>
  17
  18 #define RTE_PMD_USE_PREFETCH
  19
  20 #ifdef RTE_PMD_USE_PREFETCH
  21 /*Prefetch a cache line into all cache levels. */
  22 #define rte_enic_prefetch(p) rte_prefetch0(p)
  23 #else
  24 #define rte_enic_prefetch(p) do {} while (0)
  25 #endif
  26
  27 #ifdef RTE_PMD_PACKET_PREFETCH
  28 #define rte_packet_prefetch(p) rte_prefetch1(p)
  29 #else
  30 #define rte_packet_prefetch(p) do {} while (0)
  31 #endif
  32
  33 static inline uint16_t
  34 enic_cq_rx_desc_ciflags(struct cq_enet_rq_desc *crd)
  35 {
  36         return le16_to_cpu(crd->completed_index_flags) & ~CQ_DESC_COMP_NDX_MASK;
  37 }
  38
  39 static inline uint16_t
  40 enic_cq_rx_desc_bwflags(struct cq_enet_rq_desc *crd)
  41 {
  42         return le16_to_cpu(crd->bytes_written_flags) &
  43                            ~CQ_ENET_RQ_DESC_BYTES_WRITTEN_MASK;
  44 }
  45
  46 static inline uint8_t
  47 enic_cq_rx_desc_packet_error(uint16_t bwflags)
  48 {
  49         return (bwflags & CQ_ENET_RQ_DESC_FLAGS_TRUNCATED) ==
  50                 CQ_ENET_RQ_DESC_FLAGS_TRUNCATED;
  51 }
  52
  53 static inline uint8_t
  54 enic_cq_rx_desc_eop(uint16_t ciflags)
  55 {
  56         return (ciflags & CQ_ENET_RQ_DESC_FLAGS_EOP)
  57                 == CQ_ENET_RQ_DESC_FLAGS_EOP;
  58 }
  59
  60 static inline uint8_t
  61 enic_cq_rx_desc_csum_not_calc(struct cq_enet_rq_desc *cqrd)
  62 {
  63         return (le16_to_cpu(cqrd->q_number_rss_type_flags) &
  64                 CQ_ENET_RQ_DESC_FLAGS_CSUM_NOT_CALC) ==
  65                 CQ_ENET_RQ_DESC_FLAGS_CSUM_NOT_CALC;
  66 }
  67
  68 static inline uint8_t
  69 enic_cq_rx_desc_ipv4_csum_ok(struct cq_enet_rq_desc *cqrd)
  70 {
  71         return (cqrd->flags & CQ_ENET_RQ_DESC_FLAGS_IPV4_CSUM_OK) ==
  72                 CQ_ENET_RQ_DESC_FLAGS_IPV4_CSUM_OK;
  73 }
  74
  75 static inline uint8_t
  76 enic_cq_rx_desc_tcp_udp_csum_ok(struct cq_enet_rq_desc *cqrd)
  77 {
  78         return (cqrd->flags & CQ_ENET_RQ_DESC_FLAGS_TCP_UDP_CSUM_OK) ==
  79                 CQ_ENET_RQ_DESC_FLAGS_TCP_UDP_CSUM_OK;
  80 }
  81
  82 static inline uint8_t
  83 enic_cq_rx_desc_rss_type(struct cq_enet_rq_desc *cqrd)
  84 {
  85         return (uint8_t)((le16_to_cpu(cqrd->q_number_rss_type_flags) >>
  86                 CQ_DESC_Q_NUM_BITS) & CQ_ENET_RQ_DESC_RSS_TYPE_MASK);
  87 }
  88
  89 static inline uint32_t
  90 enic_cq_rx_desc_rss_hash(struct cq_enet_rq_desc *cqrd)
  91 {
  92         return le32_to_cpu(cqrd->rss_hash);
  93 }
  94
  95 static inline uint16_t
  96 enic_cq_rx_desc_vlan(struct cq_enet_rq_desc *cqrd)
  97 {
  98         return le16_to_cpu(cqrd->vlan);
  99 }
 100
 101 static inline uint16_t
 102 enic_cq_rx_desc_n_bytes(struct cq_desc *cqd)
 103 {
 104         struct cq_enet_rq_desc *cqrd = (struct cq_enet_rq_desc *)cqd;
 105         return le16_to_cpu(cqrd->bytes_written_flags) &
 106                 CQ_ENET_RQ_DESC_BYTES_WRITTEN_MASK;
 107 }
 108
 109
 110 static inline uint8_t
 111 enic_cq_rx_check_err(struct cq_desc *cqd)
 112 {
 113         struct cq_enet_rq_desc *cqrd = (struct cq_enet_rq_desc *)cqd;
 114         uint16_t bwflags;
 115
 116         bwflags = enic_cq_rx_desc_bwflags(cqrd);
 117         if (unlikely(enic_cq_rx_desc_packet_error(bwflags)))
 118                 return 1;
 119         return 0;
 120 }
 121
 122 /* Lookup table to translate RX CQ flags to mbuf flags. */
 123 static inline uint32_t
 124 enic_cq_rx_flags_to_pkt_type(struct cq_desc *cqd, uint8_t tnl)
 125 {
 126         struct cq_enet_rq_desc *cqrd = (struct cq_enet_rq_desc *)cqd;
 127         uint8_t cqrd_flags = cqrd->flags;
 128         /*
 129          * Odd-numbered entries are for tunnel packets. All packet type info
 130          * applies to the inner packet, and there is no info on the outer
 131          * packet. The outer flags in these entries exist only to avoid
 132          * changing enic_cq_rx_to_pkt_flags(). They are cleared from mbuf
 133          * afterwards.
 134          *
 135          * Also, as there is no tunnel type info (VXLAN, NVGRE, or GENEVE), set
 136          * RTE_PTYPE_TUNNEL_GRENAT..
 137          */
 138         static const uint32_t cq_type_table[128] __rte_cache_aligned = {
 139                 [0x00] = RTE_PTYPE_UNKNOWN,
 140                 [0x20] = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | RTE_PTYPE_L4_NONFRAG,
 141                 [0x21] = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | RTE_PTYPE_L4_NONFRAG |
 142                          RTE_PTYPE_TUNNEL_GRENAT |
 143                          RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
 144                          RTE_PTYPE_INNER_L4_NONFRAG,
 145                 [0x22] = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | RTE_PTYPE_L4_UDP,
 146                 [0x23] = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | RTE_PTYPE_L4_UDP |
 147                          RTE_PTYPE_TUNNEL_GRENAT |
 148                          RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
 149                          RTE_PTYPE_INNER_L4_UDP,
 150                 [0x24] = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | RTE_PTYPE_L4_TCP,
 151                 [0x25] = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | RTE_PTYPE_L4_TCP |
 152                          RTE_PTYPE_TUNNEL_GRENAT |
 153                          RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
 154                          RTE_PTYPE_INNER_L4_TCP,
 155                 [0x60] = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | RTE_PTYPE_L4_FRAG,
 156                 [0x61] = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | RTE_PTYPE_L4_FRAG |
 157                          RTE_PTYPE_TUNNEL_GRENAT |
 158                          RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
 159                          RTE_PTYPE_INNER_L4_FRAG,
 160                 [0x62] = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | RTE_PTYPE_L4_UDP,
 161                 [0x63] = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | RTE_PTYPE_L4_UDP |
 162                          RTE_PTYPE_TUNNEL_GRENAT |
 163                          RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
 164                          RTE_PTYPE_INNER_L4_UDP,
 165                 [0x64] = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | RTE_PTYPE_L4_TCP,
 166                 [0x65] = RTE_PTYPE_L3_IPV4_EXT_UNKNOWN | RTE_PTYPE_L4_TCP |
 167                          RTE_PTYPE_TUNNEL_GRENAT |
 168                          RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN |
 169                          RTE_PTYPE_INNER_L4_TCP,
 170                 [0x10] = RTE_PTYPE_L3_IPV6_EXT_UNKNOWN | RTE_PTYPE_L4_NONFRAG,
 171                 [0x11] = RTE_PTYPE_L3_IPV6_EXT_UNKNOWN | RTE_PTYPE_L4_NONFRAG |
 172                          RTE_PTYPE_TUNNEL_GRENAT |
 173                          RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
 174                          RTE_PTYPE_INNER_L4_NONFRAG,
 175                 [0x12] = RTE_PTYPE_L3_IPV6_EXT_UNKNOWN | RTE_PTYPE_L4_UDP,
 176                 [0x13] = RTE_PTYPE_L3_IPV6_EXT_UNKNOWN | RTE_PTYPE_L4_UDP |
 177                          RTE_PTYPE_TUNNEL_GRENAT |
 178                          RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
 179                          RTE_PTYPE_INNER_L4_UDP,
 180                 [0x14] = RTE_PTYPE_L3_IPV6_EXT_UNKNOWN | RTE_PTYPE_L4_TCP,
 181                 [0x15] = RTE_PTYPE_L3_IPV6_EXT_UNKNOWN | RTE_PTYPE_L4_TCP |
 182                          RTE_PTYPE_TUNNEL_GRENAT |
 183                          RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN |
 184                          RTE_PTYPE_INNER_L4_TCP,
 185                 /* All others reserved */
 186         };
 187         cqrd_flags &= CQ_ENET_RQ_DESC_FLAGS_IPV4_FRAGMENT
 188                 | CQ_ENET_RQ_DESC_FLAGS_IPV4 | CQ_ENET_RQ_DESC_FLAGS_IPV6
 189                 | CQ_ENET_RQ_DESC_FLAGS_TCP | CQ_ENET_RQ_DESC_FLAGS_UDP;
 190         return cq_type_table[cqrd_flags + tnl];
 191 }
 192
 193 static inline void
 194 enic_cq_rx_to_pkt_flags(struct cq_desc *cqd, struct rte_mbuf *mbuf)
 195 {
 196         struct cq_enet_rq_desc *cqrd = (struct cq_enet_rq_desc *)cqd;
 197         uint16_t bwflags, pkt_flags = 0, vlan_tci;
 198         bwflags = enic_cq_rx_desc_bwflags(cqrd);
 199         vlan_tci = enic_cq_rx_desc_vlan(cqrd);
 200
 201         /* VLAN STRIPPED flag. The L2 packet type updated here also */
 202         if (bwflags & CQ_ENET_RQ_DESC_FLAGS_VLAN_STRIPPED) {
 203                 pkt_flags |= PKT_RX_VLAN | PKT_RX_VLAN_STRIPPED;
 204                 mbuf->packet_type |= RTE_PTYPE_L2_ETHER;
 205         } else {
 206                 if (vlan_tci != 0)
 207                         mbuf->packet_type |= RTE_PTYPE_L2_ETHER_VLAN;
 208                 else
 209                         mbuf->packet_type |= RTE_PTYPE_L2_ETHER;
 210         }
 211         mbuf->vlan_tci = vlan_tci;
 212
 213         if ((cqd->type_color & CQ_DESC_TYPE_MASK) == CQ_DESC_TYPE_CLASSIFIER) {
 214                 struct cq_enet_rq_clsf_desc *clsf_cqd;
 215                 uint16_t filter_id;
 216                 clsf_cqd = (struct cq_enet_rq_clsf_desc *)cqd;
 217                 filter_id = clsf_cqd->filter_id;
 218                 if (filter_id) {
 219                         pkt_flags |= PKT_RX_FDIR;
 220                         if (filter_id != ENIC_MAGIC_FILTER_ID) {
 221                                 mbuf->hash.fdir.hi = clsf_cqd->filter_id;
 222                                 pkt_flags |= PKT_RX_FDIR_ID;
 223                         }
 224                 }
 225         } else if (enic_cq_rx_desc_rss_type(cqrd)) {
 226                 /* RSS flag */
 227                 pkt_flags |= PKT_RX_RSS_HASH;
 228                 mbuf->hash.rss = enic_cq_rx_desc_rss_hash(cqrd);
 229         }
 230
 231         /* checksum flags */
 232         if (mbuf->packet_type & (RTE_PTYPE_L3_IPV4 | RTE_PTYPE_L3_IPV6)) {
 233                 if (!enic_cq_rx_desc_csum_not_calc(cqrd)) {
 234                         uint32_t l4_flags;
 235                         l4_flags = mbuf->packet_type & RTE_PTYPE_L4_MASK;
 236
 237                         /*
 238                          * When overlay offload is enabled, the NIC may
 239                          * set ipv4_csum_ok=1 if the inner packet is IPv6..
 240                          * So, explicitly check for IPv4 before checking
 241                          * ipv4_csum_ok.
 242                          */
 243                         if (mbuf->packet_type & RTE_PTYPE_L3_IPV4) {
 244                                 if (enic_cq_rx_desc_ipv4_csum_ok(cqrd))
 245                                         pkt_flags |= PKT_RX_IP_CKSUM_GOOD;
 246                                 else
 247                                         pkt_flags |= PKT_RX_IP_CKSUM_BAD;
 248                         }
 249
 250                         if (l4_flags == RTE_PTYPE_L4_UDP ||
 251                             l4_flags == RTE_PTYPE_L4_TCP) {
 252                                 if (enic_cq_rx_desc_tcp_udp_csum_ok(cqrd))
 253                                         pkt_flags |= PKT_RX_L4_CKSUM_GOOD;
 254                                 else
 255                                         pkt_flags |= PKT_RX_L4_CKSUM_BAD;
 256                         }
 257                 }
 258         }
 259
 260         mbuf->ol_flags = pkt_flags;
 261 }
 262
 263 /* dummy receive function to replace actual function in
 264  * order to do safe reconfiguration operations.
 265  */
 266 uint16_t
 267 enic_dummy_recv_pkts(__rte_unused void *rx_queue,
 268                      __rte_unused struct rte_mbuf **rx_pkts,
 269                      __rte_unused uint16_t nb_pkts)
 270 {
 271         return 0;
 272 }
 273
 274 uint16_t
 275 enic_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts,
 276                uint16_t nb_pkts)
 277 {
 278         struct vnic_rq *sop_rq = rx_queue;
 279         struct vnic_rq *data_rq;
 280         struct vnic_rq *rq;
 281         struct enic *enic = vnic_dev_priv(sop_rq->vdev);
 282         uint16_t cq_idx;
 283         uint16_t rq_idx;
 284         uint16_t rq_num;
 285         struct rte_mbuf *nmb, *rxmb;
 286         uint16_t nb_rx = 0;
 287         struct vnic_cq *cq;
 288         volatile struct cq_desc *cqd_ptr;
 289         uint8_t color;
 290         uint8_t tnl;
 291         uint16_t seg_length;
 292         struct rte_mbuf *first_seg = sop_rq->pkt_first_seg;
 293         struct rte_mbuf *last_seg = sop_rq->pkt_last_seg;
 294
 295         cq = &enic->cq[enic_cq_rq(enic, sop_rq->index)];
 296         cq_idx = cq->to_clean;          /* index of cqd, rqd, mbuf_table */
 297         cqd_ptr = (struct cq_desc *)(cq->ring.descs) + cq_idx;
 298
 299         data_rq = &enic->rq[sop_rq->data_queue_idx];
 300
 301         while (nb_rx < nb_pkts) {
 302                 volatile struct rq_enet_desc *rqd_ptr;
 303                 struct cq_desc cqd;
 304                 uint8_t packet_error;
 305                 uint16_t ciflags;
 306
 307                 /* Check for pkts available */
 308                 color = (cqd_ptr->type_color >> CQ_DESC_COLOR_SHIFT)
 309                         & CQ_DESC_COLOR_MASK;
 310                 if (color == cq->last_color)
 311                         break;
 312
 313                 /* Get the cq descriptor and extract rq info from it */
 314                 cqd = *cqd_ptr;
 315                 rq_num = cqd.q_number & CQ_DESC_Q_NUM_MASK;
 316                 rq_idx = cqd.completed_index & CQ_DESC_COMP_NDX_MASK;
 317
 318                 rq = &enic->rq[rq_num];
 319                 rqd_ptr = ((struct rq_enet_desc *)rq->ring.descs) + rq_idx;
 320
 321                 /* allocate a new mbuf */
 322                 nmb = rte_mbuf_raw_alloc(rq->mp);
 323                 if (nmb == NULL) {
 324                         rte_atomic64_inc(&enic->soft_stats.rx_nombuf);
 325                         break;
 326                 }
 327
 328                 /* A packet error means descriptor and data are untrusted */
 329                 packet_error = enic_cq_rx_check_err(&cqd);
 330
 331                 /* Get the mbuf to return and replace with one just allocated */
 332                 rxmb = rq->mbuf_ring[rq_idx];
 333                 rq->mbuf_ring[rq_idx] = nmb;
 334
 335                 /* Increment cqd, rqd, mbuf_table index */
 336                 cq_idx++;
 337                 if (unlikely(cq_idx == cq->ring.desc_count)) {
 338                         cq_idx = 0;
 339                         cq->last_color = cq->last_color ? 0 : 1;
 340                 }
 341
 342                 /* Prefetch next mbuf & desc while processing current one */
 343                 cqd_ptr = (struct cq_desc *)(cq->ring.descs) + cq_idx;
 344                 rte_enic_prefetch(cqd_ptr);
 345
 346                 ciflags = enic_cq_rx_desc_ciflags(
 347                         (struct cq_enet_rq_desc *)&cqd);
 348
 349                 /* Push descriptor for newly allocated mbuf */
 350                 nmb->data_off = RTE_PKTMBUF_HEADROOM;
 351                 /*
 352                  * Only the address needs to be refilled. length_type of the
 353                  * descriptor it set during initialization
 354                  * (enic_alloc_rx_queue_mbufs) and does not change.
 355                  */
 356                 rqd_ptr->address = rte_cpu_to_le_64(nmb->buf_iova +
 357                                                     RTE_PKTMBUF_HEADROOM);
 358
 359                 /* Fill in the rest of the mbuf */
 360                 seg_length = enic_cq_rx_desc_n_bytes(&cqd);
 361
 362                 if (rq->is_sop) {
 363                         first_seg = rxmb;
 364                         first_seg->pkt_len = seg_length;
 365                 } else {
 366                         first_seg->pkt_len = (uint16_t)(first_seg->pkt_len
 367                                                         + seg_length);
 368                         first_seg->nb_segs++;
 369                         last_seg->next = rxmb;
 370                 }
 371
 372                 rxmb->port = enic->port_id;
 373                 rxmb->data_len = seg_length;
 374
 375                 rq->rx_nb_hold++;
 376
 377                 if (!(enic_cq_rx_desc_eop(ciflags))) {
 378                         last_seg = rxmb;
 379                         continue;
 380                 }
 381
 382                 /*
 383                  * When overlay offload is enabled, CQ.fcoe indicates the
 384                  * packet is tunnelled.
 385                  */
 386                 tnl = enic->overlay_offload &&
 387                         (ciflags & CQ_ENET_RQ_DESC_FLAGS_FCOE) != 0;
 388                 /* cq rx flags are only valid if eop bit is set */
 389                 first_seg->packet_type =
 390                         enic_cq_rx_flags_to_pkt_type(&cqd, tnl);
 391                 enic_cq_rx_to_pkt_flags(&cqd, first_seg);
 392                 /* Wipe the outer types set by enic_cq_rx_flags_to_pkt_type() */
 393                 if (tnl) {
 394                         first_seg->packet_type &= ~(RTE_PTYPE_L3_MASK |
 395                                                     RTE_PTYPE_L4_MASK);
 396                 }
 397                 if (unlikely(packet_error)) {
 398                         rte_pktmbuf_free(first_seg);
 399                         rte_atomic64_inc(&enic->soft_stats.rx_packet_errors);
 400                         continue;
 401                 }
 402
 403
 404                 /* prefetch mbuf data for caller */
 405                 rte_packet_prefetch(RTE_PTR_ADD(first_seg->buf_addr,
 406                                     RTE_PKTMBUF_HEADROOM));
 407
 408                 /* store the mbuf address into the next entry of the array */
 409                 rx_pkts[nb_rx++] = first_seg;
 410         }
 411
 412         sop_rq->pkt_first_seg = first_seg;
 413         sop_rq->pkt_last_seg = last_seg;
 414
 415         cq->to_clean = cq_idx;
 416
 417         if ((sop_rq->rx_nb_hold + data_rq->rx_nb_hold) >
 418             sop_rq->rx_free_thresh) {
 419                 if (data_rq->in_use) {
 420                         data_rq->posted_index =
 421                                 enic_ring_add(data_rq->ring.desc_count,
 422                                               data_rq->posted_index,
 423                                               data_rq->rx_nb_hold);
 424                         data_rq->rx_nb_hold = 0;
 425                 }
 426                 sop_rq->posted_index = enic_ring_add(sop_rq->ring.desc_count,
 427                                                      sop_rq->posted_index,
 428                                                      sop_rq->rx_nb_hold);
 429                 sop_rq->rx_nb_hold = 0;
 430
 431                 rte_mb();
 432                 if (data_rq->in_use)
 433                         iowrite32_relaxed(data_rq->posted_index,
 434                                           &data_rq->ctrl->posted_index);
 435                 rte_compiler_barrier();
 436                 iowrite32_relaxed(sop_rq->posted_index,
 437                                   &sop_rq->ctrl->posted_index);
 438         }
 439
 440
 441         return nb_rx;
 442 }
 443
 444 static inline void enic_free_wq_bufs(struct vnic_wq *wq, u16 completed_index)
 445 {
 446         struct vnic_wq_buf *buf;
 447         struct rte_mbuf *m, *free[ENIC_MAX_WQ_DESCS];
 448         unsigned int nb_to_free, nb_free = 0, i;
 449         struct rte_mempool *pool;
 450         unsigned int tail_idx;
 451         unsigned int desc_count = wq->ring.desc_count;
 452
 453         nb_to_free = enic_ring_sub(desc_count, wq->tail_idx, completed_index)
 454                                    + 1;
 455         tail_idx = wq->tail_idx;
 456         buf = &wq->bufs[tail_idx];
 457         pool = ((struct rte_mbuf *)buf->mb)->pool;
 458         for (i = 0; i < nb_to_free; i++) {
 459                 buf = &wq->bufs[tail_idx];
 460                 m = rte_pktmbuf_prefree_seg((struct rte_mbuf *)(buf->mb));
 461                 buf->mb = NULL;
 462
 463                 if (unlikely(m == NULL)) {
 464                         tail_idx = enic_ring_incr(desc_count, tail_idx);
 465                         continue;
 466                 }
 467
 468                 if (likely(m->pool == pool)) {
 469                         RTE_ASSERT(nb_free < ENIC_MAX_WQ_DESCS);
 470                         free[nb_free++] = m;
 471                 } else {
 472                         rte_mempool_put_bulk(pool, (void *)free, nb_free);
 473                         free[0] = m;
 474                         nb_free = 1;
 475                         pool = m->pool;
 476                 }
 477                 tail_idx = enic_ring_incr(desc_count, tail_idx);
 478         }
 479
 480         if (nb_free > 0)
 481                 rte_mempool_put_bulk(pool, (void **)free, nb_free);
 482
 483         wq->tail_idx = tail_idx;
 484         wq->ring.desc_avail += nb_to_free;
 485 }
 486
 487 unsigned int enic_cleanup_wq(__rte_unused struct enic *enic, struct vnic_wq *wq)
 488 {
 489         u16 completed_index;
 490
 491         completed_index = *((uint32_t *)wq->cqmsg_rz->addr) & 0xffff;
 492
 493         if (wq->last_completed_index != completed_index) {
 494                 enic_free_wq_bufs(wq, completed_index);
 495                 wq->last_completed_index = completed_index;
 496         }
 497         return 0;
 498 }
 499
 500 uint16_t enic_prep_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
 501                         uint16_t nb_pkts)
 502 {
 503         struct vnic_wq *wq = (struct vnic_wq *)tx_queue;
 504         int32_t ret;
 505         uint16_t i;
 506         uint64_t ol_flags;
 507         struct rte_mbuf *m;
 508
 509         for (i = 0; i != nb_pkts; i++) {
 510                 m = tx_pkts[i];
 511                 ol_flags = m->ol_flags;
 512                 if (ol_flags & wq->tx_offload_notsup_mask) {
 513                         rte_errno = ENOTSUP;
 514                         return i;
 515                 }
 516 #ifdef RTE_LIBRTE_ETHDEV_DEBUG
 517                 ret = rte_validate_tx_offload(m);
 518                 if (ret != 0) {
 519                         rte_errno = ret;
 520                         return i;
 521                 }
 522 #endif
 523                 ret = rte_net_intel_cksum_prepare(m);
 524                 if (ret != 0) {
 525                         rte_errno = ret;
 526                         return i;
 527                 }
 528         }
 529
 530         return i;
 531 }
 532
 533 uint16_t enic_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
 534         uint16_t nb_pkts)
 535 {
 536         uint16_t index;
 537         unsigned int pkt_len, data_len;
 538         unsigned int nb_segs;
 539         struct rte_mbuf *tx_pkt;
 540         struct vnic_wq *wq = (struct vnic_wq *)tx_queue;
 541         struct enic *enic = vnic_dev_priv(wq->vdev);
 542         unsigned short vlan_id;
 543         uint64_t ol_flags;
 544         uint64_t ol_flags_mask;
 545         unsigned int wq_desc_avail;
 546         int head_idx;
 547         struct vnic_wq_buf *buf;
 548         unsigned int desc_count;
 549         struct wq_enet_desc *descs, *desc_p, desc_tmp;
 550         uint16_t mss;
 551         uint8_t vlan_tag_insert;
 552         uint8_t eop;
 553         uint64_t bus_addr;
 554         uint8_t offload_mode;
 555         uint16_t header_len;
 556         uint64_t tso;
 557         rte_atomic64_t *tx_oversized;
 558
 559         enic_cleanup_wq(enic, wq);
 560         wq_desc_avail = vnic_wq_desc_avail(wq);
 561         head_idx = wq->head_idx;
 562         desc_count = wq->ring.desc_count;
 563         ol_flags_mask = PKT_TX_VLAN_PKT | PKT_TX_IP_CKSUM | PKT_TX_L4_MASK;
 564         tx_oversized = &enic->soft_stats.tx_oversized;
 565
 566         nb_pkts = RTE_MIN(nb_pkts, ENIC_TX_XMIT_MAX);
 567
 568         for (index = 0; index < nb_pkts; index++) {
 569                 tx_pkt = *tx_pkts++;
 570                 pkt_len = tx_pkt->pkt_len;
 571                 data_len = tx_pkt->data_len;
 572                 ol_flags = tx_pkt->ol_flags;
 573                 nb_segs = tx_pkt->nb_segs;
 574                 tso = ol_flags & PKT_TX_TCP_SEG;
 575
 576                 /* drop packet if it's too big to send */
 577                 if (unlikely(!tso && pkt_len > ENIC_TX_MAX_PKT_SIZE)) {
 578                         rte_pktmbuf_free(tx_pkt);
 579                         rte_atomic64_inc(tx_oversized);
 580                         continue;
 581                 }
 582
 583                 if (nb_segs > wq_desc_avail) {
 584                         if (index > 0)
 585                                 goto post;
 586                         goto done;
 587                 }
 588
 589                 mss = 0;
 590                 vlan_id = tx_pkt->vlan_tci;
 591                 vlan_tag_insert = !!(ol_flags & PKT_TX_VLAN_PKT);
 592                 bus_addr = (dma_addr_t)
 593                            (tx_pkt->buf_iova + tx_pkt->data_off);
 594
 595                 descs = (struct wq_enet_desc *)wq->ring.descs;
 596                 desc_p = descs + head_idx;
 597
 598                 eop = (data_len == pkt_len);
 599                 offload_mode = WQ_ENET_OFFLOAD_MODE_CSUM;
 600                 header_len = 0;
 601
 602                 if (tso) {
 603                         header_len = tx_pkt->l2_len + tx_pkt->l3_len +
 604                                      tx_pkt->l4_len;
 605
 606                         /* Drop if non-TCP packet or TSO seg size is too big */
 607                         if (unlikely(header_len == 0 || ((tx_pkt->tso_segsz +
 608                             header_len) > ENIC_TX_MAX_PKT_SIZE))) {
 609                                 rte_pktmbuf_free(tx_pkt);
 610                                 rte_atomic64_inc(tx_oversized);
 611                                 continue;
 612                         }
 613
 614                         offload_mode = WQ_ENET_OFFLOAD_MODE_TSO;
 615                         mss = tx_pkt->tso_segsz;
 616                         /* For tunnel, need the size of outer+inner headers */
 617                         if (ol_flags & PKT_TX_TUNNEL_MASK) {
 618                                 header_len += tx_pkt->outer_l2_len +
 619                                         tx_pkt->outer_l3_len;
 620                         }
 621                 }
 622
 623                 if ((ol_flags & ol_flags_mask) && (header_len == 0)) {
 624                         if (ol_flags & PKT_TX_IP_CKSUM)
 625                                 mss |= ENIC_CALC_IP_CKSUM;
 626
 627                         /* Nic uses just 1 bit for UDP and TCP */
 628                         switch (ol_flags & PKT_TX_L4_MASK) {
 629                         case PKT_TX_TCP_CKSUM:
 630                         case PKT_TX_UDP_CKSUM:
 631                                 mss |= ENIC_CALC_TCP_UDP_CKSUM;
 632                                 break;
 633                         }
 634                 }
 635
 636
 637                 wq_enet_desc_enc(&desc_tmp, bus_addr, data_len, mss, header_len,
 638                                  offload_mode, eop, eop, 0, vlan_tag_insert,
 639                                  vlan_id, 0);
 640
 641                 *desc_p = desc_tmp;
 642                 buf = &wq->bufs[head_idx];
 643                 buf->mb = (void *)tx_pkt;
 644                 head_idx = enic_ring_incr(desc_count, head_idx);
 645                 wq_desc_avail--;
 646
 647                 if (!eop) {
 648                         for (tx_pkt = tx_pkt->next; tx_pkt; tx_pkt =
 649                             tx_pkt->next) {
 650                                 data_len = tx_pkt->data_len;
 651
 652                                 if (tx_pkt->next == NULL)
 653                                         eop = 1;
 654                                 desc_p = descs + head_idx;
 655                                 bus_addr = (dma_addr_t)(tx_pkt->buf_iova
 656                                            + tx_pkt->data_off);
 657                                 wq_enet_desc_enc((struct wq_enet_desc *)
 658                                                  &desc_tmp, bus_addr, data_len,
 659                                                  mss, 0, offload_mode, eop, eop,
 660                                                  0, vlan_tag_insert, vlan_id,
 661                                                  0);
 662
 663                                 *desc_p = desc_tmp;
 664                                 buf = &wq->bufs[head_idx];
 665                                 buf->mb = (void *)tx_pkt;
 666                                 head_idx = enic_ring_incr(desc_count, head_idx);
 667                                 wq_desc_avail--;
 668                         }
 669                 }
 670         }
 671  post:
 672         rte_wmb();
 673         iowrite32_relaxed(head_idx, &wq->ctrl->posted_index);
 674  done:
 675         wq->ring.desc_avail = wq_desc_avail;
 676         wq->head_idx = head_idx;
 677
 678         return index;
 679 }
 680
 681