drivers/net/i40e/i40e_ethdev_vf.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2010-2016 Intel Corporation
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdio.h>
   7 #include <errno.h>
   8 #include <stdint.h>
   9 #include <string.h>
  10 #include <unistd.h>
  11 #include <stdarg.h>
  12 #include <inttypes.h>
  13 #include <rte_byteorder.h>
  14 #include <rte_common.h>
  15 #include <rte_cycles.h>
  16
  17 #include <rte_interrupts.h>
  18 #include <rte_log.h>
  19 #include <rte_debug.h>
  20 #include <rte_pci.h>
  21 #include <rte_bus_pci.h>
  22 #include <rte_atomic.h>
  23 #include <rte_branch_prediction.h>
  24 #include <rte_memory.h>
  25 #include <rte_eal.h>
  26 #include <rte_alarm.h>
  27 #include <rte_ether.h>
  28 #include <rte_ethdev_driver.h>
  29 #include <rte_ethdev_pci.h>
  30 #include <rte_malloc.h>
  31 #include <rte_dev.h>
  32
  33 #include "i40e_logs.h"
  34 #include "base/i40e_prototype.h"
  35 #include "base/i40e_adminq_cmd.h"
  36 #include "base/i40e_type.h"
  37
  38 #include "i40e_rxtx.h"
  39 #include "i40e_ethdev.h"
  40 #include "i40e_pf.h"
  41
  42 /* busy wait delay in msec */
  43 #define I40EVF_BUSY_WAIT_DELAY 10
  44 #define I40EVF_BUSY_WAIT_COUNT 50
  45 #define MAX_RESET_WAIT_CNT     20
  46
  47 struct i40evf_arq_msg_info {
  48         enum virtchnl_ops ops;
  49         enum i40e_status_code result;
  50         uint16_t buf_len;
  51         uint16_t msg_len;
  52         uint8_t *msg;
  53 };
  54
  55 struct vf_cmd_info {
  56         enum virtchnl_ops ops;
  57         uint8_t *in_args;
  58         uint32_t in_args_size;
  59         uint8_t *out_buffer;
  60         /* Input & output type. pass in buffer size and pass out
  61          * actual return result
  62          */
  63         uint32_t out_size;
  64 };
  65
  66 enum i40evf_aq_result {
  67         I40EVF_MSG_ERR = -1, /* Meet error when accessing admin queue */
  68         I40EVF_MSG_NON,      /* Read nothing from admin queue */
  69         I40EVF_MSG_SYS,      /* Read system msg from admin queue */
  70         I40EVF_MSG_CMD,      /* Read async command result */
  71 };
  72
  73 static int i40evf_dev_configure(struct rte_eth_dev *dev);
  74 static int i40evf_dev_start(struct rte_eth_dev *dev);
  75 static void i40evf_dev_stop(struct rte_eth_dev *dev);
  76 static void i40evf_dev_info_get(struct rte_eth_dev *dev,
  77                                 struct rte_eth_dev_info *dev_info);
  78 static int i40evf_dev_link_update(struct rte_eth_dev *dev,
  79                                   int wait_to_complete);
  80 static int i40evf_dev_stats_get(struct rte_eth_dev *dev,
  81                                 struct rte_eth_stats *stats);
  82 static int i40evf_dev_xstats_get(struct rte_eth_dev *dev,
  83                                  struct rte_eth_xstat *xstats, unsigned n);
  84 static int i40evf_dev_xstats_get_names(struct rte_eth_dev *dev,
  85                                        struct rte_eth_xstat_name *xstats_names,
  86                                        unsigned limit);
  87 static void i40evf_dev_xstats_reset(struct rte_eth_dev *dev);
  88 static int i40evf_vlan_filter_set(struct rte_eth_dev *dev,
  89                                   uint16_t vlan_id, int on);
  90 static int i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask);
  91 static void i40evf_dev_close(struct rte_eth_dev *dev);
  92 static int  i40evf_dev_reset(struct rte_eth_dev *dev);
  93 static void i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev);
  94 static void i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev);
  95 static void i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev);
  96 static void i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev);
  97 static int i40evf_init_vlan(struct rte_eth_dev *dev);
  98 static int i40evf_dev_rx_queue_start(struct rte_eth_dev *dev,
  99                                      uint16_t rx_queue_id);
 100 static int i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev,
 101                                     uint16_t rx_queue_id);
 102 static int i40evf_dev_tx_queue_start(struct rte_eth_dev *dev,
 103                                      uint16_t tx_queue_id);
 104 static int i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev,
 105                                     uint16_t tx_queue_id);
 106 static int i40evf_add_mac_addr(struct rte_eth_dev *dev,
 107                                struct ether_addr *addr,
 108                                uint32_t index,
 109                                uint32_t pool);
 110 static void i40evf_del_mac_addr(struct rte_eth_dev *dev, uint32_t index);
 111 static int i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
 112                         struct rte_eth_rss_reta_entry64 *reta_conf,
 113                         uint16_t reta_size);
 114 static int i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
 115                         struct rte_eth_rss_reta_entry64 *reta_conf,
 116                         uint16_t reta_size);
 117 static int i40evf_config_rss(struct i40e_vf *vf);
 118 static int i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
 119                                       struct rte_eth_rss_conf *rss_conf);
 120 static int i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
 121                                         struct rte_eth_rss_conf *rss_conf);
 122 static int i40evf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu);
 123 static void i40evf_set_default_mac_addr(struct rte_eth_dev *dev,
 124                                         struct ether_addr *mac_addr);
 125 static int
 126 i40evf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id);
 127 static int
 128 i40evf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id);
 129 static void i40evf_handle_pf_event(struct rte_eth_dev *dev,
 130                                    uint8_t *msg,
 131                                    uint16_t msglen);
 132
 133 /* Default hash key buffer for RSS */
 134 static uint32_t rss_key_default[I40E_VFQF_HKEY_MAX_INDEX + 1];
 135
 136 struct rte_i40evf_xstats_name_off {
 137         char name[RTE_ETH_XSTATS_NAME_SIZE];
 138         unsigned offset;
 139 };
 140
 141 static const struct rte_i40evf_xstats_name_off rte_i40evf_stats_strings[] = {
 142         {"rx_bytes", offsetof(struct i40e_eth_stats, rx_bytes)},
 143         {"rx_unicast_packets", offsetof(struct i40e_eth_stats, rx_unicast)},
 144         {"rx_multicast_packets", offsetof(struct i40e_eth_stats, rx_multicast)},
 145         {"rx_broadcast_packets", offsetof(struct i40e_eth_stats, rx_broadcast)},
 146         {"rx_dropped_packets", offsetof(struct i40e_eth_stats, rx_discards)},
 147         {"rx_unknown_protocol_packets", offsetof(struct i40e_eth_stats,
 148                 rx_unknown_protocol)},
 149         {"tx_bytes", offsetof(struct i40e_eth_stats, tx_bytes)},
 150         {"tx_unicast_packets", offsetof(struct i40e_eth_stats, tx_unicast)},
 151         {"tx_multicast_packets", offsetof(struct i40e_eth_stats, tx_multicast)},
 152         {"tx_broadcast_packets", offsetof(struct i40e_eth_stats, tx_broadcast)},
 153         {"tx_dropped_packets", offsetof(struct i40e_eth_stats, tx_discards)},
 154         {"tx_error_packets", offsetof(struct i40e_eth_stats, tx_errors)},
 155 };
 156
 157 #define I40EVF_NB_XSTATS (sizeof(rte_i40evf_stats_strings) / \
 158                 sizeof(rte_i40evf_stats_strings[0]))
 159
 160 static const struct eth_dev_ops i40evf_eth_dev_ops = {
 161         .dev_configure        = i40evf_dev_configure,
 162         .dev_start            = i40evf_dev_start,
 163         .dev_stop             = i40evf_dev_stop,
 164         .promiscuous_enable   = i40evf_dev_promiscuous_enable,
 165         .promiscuous_disable  = i40evf_dev_promiscuous_disable,
 166         .allmulticast_enable  = i40evf_dev_allmulticast_enable,
 167         .allmulticast_disable = i40evf_dev_allmulticast_disable,
 168         .link_update          = i40evf_dev_link_update,
 169         .stats_get            = i40evf_dev_stats_get,
 170         .stats_reset          = i40evf_dev_xstats_reset,
 171         .xstats_get           = i40evf_dev_xstats_get,
 172         .xstats_get_names     = i40evf_dev_xstats_get_names,
 173         .xstats_reset         = i40evf_dev_xstats_reset,
 174         .dev_close            = i40evf_dev_close,
 175         .dev_reset            = i40evf_dev_reset,
 176         .dev_infos_get        = i40evf_dev_info_get,
 177         .dev_supported_ptypes_get = i40e_dev_supported_ptypes_get,
 178         .vlan_filter_set      = i40evf_vlan_filter_set,
 179         .vlan_offload_set     = i40evf_vlan_offload_set,
 180         .rx_queue_start       = i40evf_dev_rx_queue_start,
 181         .rx_queue_stop        = i40evf_dev_rx_queue_stop,
 182         .tx_queue_start       = i40evf_dev_tx_queue_start,
 183         .tx_queue_stop        = i40evf_dev_tx_queue_stop,
 184         .rx_queue_setup       = i40e_dev_rx_queue_setup,
 185         .rx_queue_release     = i40e_dev_rx_queue_release,
 186         .rx_queue_intr_enable = i40evf_dev_rx_queue_intr_enable,
 187         .rx_queue_intr_disable = i40evf_dev_rx_queue_intr_disable,
 188         .rx_descriptor_done   = i40e_dev_rx_descriptor_done,
 189         .rx_descriptor_status = i40e_dev_rx_descriptor_status,
 190         .tx_descriptor_status = i40e_dev_tx_descriptor_status,
 191         .tx_queue_setup       = i40e_dev_tx_queue_setup,
 192         .tx_queue_release     = i40e_dev_tx_queue_release,
 193         .rx_queue_count       = i40e_dev_rx_queue_count,
 194         .rxq_info_get         = i40e_rxq_info_get,
 195         .txq_info_get         = i40e_txq_info_get,
 196         .mac_addr_add         = i40evf_add_mac_addr,
 197         .mac_addr_remove      = i40evf_del_mac_addr,
 198         .reta_update          = i40evf_dev_rss_reta_update,
 199         .reta_query           = i40evf_dev_rss_reta_query,
 200         .rss_hash_update      = i40evf_dev_rss_hash_update,
 201         .rss_hash_conf_get    = i40evf_dev_rss_hash_conf_get,
 202         .mtu_set              = i40evf_dev_mtu_set,
 203         .mac_addr_set         = i40evf_set_default_mac_addr,
 204 };
 205
 206 /*
 207  * Read data in admin queue to get msg from pf driver
 208  */
 209 static enum i40evf_aq_result
 210 i40evf_read_pfmsg(struct rte_eth_dev *dev, struct i40evf_arq_msg_info *data)
 211 {
 212         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 213         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 214         struct i40e_arq_event_info event;
 215         enum virtchnl_ops opcode;
 216         enum i40e_status_code retval;
 217         int ret;
 218         enum i40evf_aq_result result = I40EVF_MSG_NON;
 219
 220         event.buf_len = data->buf_len;
 221         event.msg_buf = data->msg;
 222         ret = i40e_clean_arq_element(hw, &event, NULL);
 223         /* Can't read any msg from adminQ */
 224         if (ret) {
 225                 if (ret != I40E_ERR_ADMIN_QUEUE_NO_WORK)
 226                         result = I40EVF_MSG_ERR;
 227                 return result;
 228         }
 229
 230         opcode = (enum virtchnl_ops)rte_le_to_cpu_32(event.desc.cookie_high);
 231         retval = (enum i40e_status_code)rte_le_to_cpu_32(event.desc.cookie_low);
 232         /* pf sys event */
 233         if (opcode == VIRTCHNL_OP_EVENT) {
 234                 struct virtchnl_pf_event *vpe =
 235                         (struct virtchnl_pf_event *)event.msg_buf;
 236
 237                 result = I40EVF_MSG_SYS;
 238                 switch (vpe->event) {
 239                 case VIRTCHNL_EVENT_LINK_CHANGE:
 240                         vf->link_up =
 241                                 vpe->event_data.link_event.link_status;
 242                         vf->link_speed =
 243                                 vpe->event_data.link_event.link_speed;
 244                         vf->pend_msg |= PFMSG_LINK_CHANGE;
 245                         PMD_DRV_LOG(INFO, "Link status update:%s",
 246                                     vf->link_up ? "up" : "down");
 247                         break;
 248                 case VIRTCHNL_EVENT_RESET_IMPENDING:
 249                         vf->vf_reset = true;
 250                         vf->pend_msg |= PFMSG_RESET_IMPENDING;
 251                         PMD_DRV_LOG(INFO, "vf is reseting");
 252                         break;
 253                 case VIRTCHNL_EVENT_PF_DRIVER_CLOSE:
 254                         vf->dev_closed = true;
 255                         vf->pend_msg |= PFMSG_DRIVER_CLOSE;
 256                         PMD_DRV_LOG(INFO, "PF driver closed");
 257                         break;
 258                 default:
 259                         PMD_DRV_LOG(ERR, "%s: Unknown event %d from pf",
 260                                     __func__, vpe->event);
 261                 }
 262         } else {
 263                 /* async reply msg on command issued by vf previously */
 264                 result = I40EVF_MSG_CMD;
 265                 /* Actual data length read from PF */
 266                 data->msg_len = event.msg_len;
 267         }
 268
 269         data->result = retval;
 270         data->ops = opcode;
 271
 272         return result;
 273 }
 274
 275 /**
 276  * clear current command. Only call in case execute
 277  * _atomic_set_cmd successfully.
 278  */
 279 static inline void
 280 _clear_cmd(struct i40e_vf *vf)
 281 {
 282         rte_wmb();
 283         vf->pend_cmd = VIRTCHNL_OP_UNKNOWN;
 284 }
 285
 286 /*
 287  * Check there is pending cmd in execution. If none, set new command.
 288  */
 289 static inline int
 290 _atomic_set_cmd(struct i40e_vf *vf, enum virtchnl_ops ops)
 291 {
 292         int ret = rte_atomic32_cmpset(&vf->pend_cmd,
 293                         VIRTCHNL_OP_UNKNOWN, ops);
 294
 295         if (!ret)
 296                 PMD_DRV_LOG(ERR, "There is incomplete cmd %d", vf->pend_cmd);
 297
 298         return !ret;
 299 }
 300
 301 #define MAX_TRY_TIMES 200
 302 #define ASQ_DELAY_MS  10
 303
 304 static int
 305 i40evf_execute_vf_cmd(struct rte_eth_dev *dev, struct vf_cmd_info *args)
 306 {
 307         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 308         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 309         struct i40evf_arq_msg_info info;
 310         enum i40evf_aq_result ret;
 311         int err, i = 0;
 312
 313         if (_atomic_set_cmd(vf, args->ops))
 314                 return -1;
 315
 316         info.msg = args->out_buffer;
 317         info.buf_len = args->out_size;
 318         info.ops = VIRTCHNL_OP_UNKNOWN;
 319         info.result = I40E_SUCCESS;
 320
 321         err = i40e_aq_send_msg_to_pf(hw, args->ops, I40E_SUCCESS,
 322                      args->in_args, args->in_args_size, NULL);
 323         if (err) {
 324                 PMD_DRV_LOG(ERR, "fail to send cmd %d", args->ops);
 325                 _clear_cmd(vf);
 326                 return err;
 327         }
 328
 329         switch (args->ops) {
 330         case VIRTCHNL_OP_RESET_VF:
 331                 /*no need to process in this function */
 332                 err = 0;
 333                 break;
 334         case VIRTCHNL_OP_VERSION:
 335         case VIRTCHNL_OP_GET_VF_RESOURCES:
 336                 /* for init adminq commands, need to poll the response */
 337                 err = -1;
 338                 do {
 339                         ret = i40evf_read_pfmsg(dev, &info);
 340                         vf->cmd_retval = info.result;
 341                         if (ret == I40EVF_MSG_CMD) {
 342                                 err = 0;
 343                                 break;
 344                         } else if (ret == I40EVF_MSG_ERR)
 345                                 break;
 346                         rte_delay_ms(ASQ_DELAY_MS);
 347                         /* If don't read msg or read sys event, continue */
 348                 } while (i++ < MAX_TRY_TIMES);
 349                 _clear_cmd(vf);
 350                 break;
 351
 352         default:
 353                 /* for other adminq in running time, waiting the cmd done flag */
 354                 err = -1;
 355                 do {
 356                         if (vf->pend_cmd == VIRTCHNL_OP_UNKNOWN) {
 357                                 err = 0;
 358                                 break;
 359                         }
 360                         rte_delay_ms(ASQ_DELAY_MS);
 361                         /* If don't read msg or read sys event, continue */
 362                 } while (i++ < MAX_TRY_TIMES);
 363                 /* If there's no response is received, clear command */
 364                 if (i >= MAX_TRY_TIMES) {
 365                         PMD_DRV_LOG(WARNING, "No response for %d", args->ops);
 366                         _clear_cmd(vf);
 367                 }
 368                 break;
 369         }
 370
 371         return err | vf->cmd_retval;
 372 }
 373
 374 /*
 375  * Check API version with sync wait until version read or fail from admin queue
 376  */
 377 static int
 378 i40evf_check_api_version(struct rte_eth_dev *dev)
 379 {
 380         struct virtchnl_version_info version, *pver;
 381         int err;
 382         struct vf_cmd_info args;
 383         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 384
 385         version.major = VIRTCHNL_VERSION_MAJOR;
 386         version.minor = VIRTCHNL_VERSION_MINOR;
 387
 388         args.ops = VIRTCHNL_OP_VERSION;
 389         args.in_args = (uint8_t *)&version;
 390         args.in_args_size = sizeof(version);
 391         args.out_buffer = vf->aq_resp;
 392         args.out_size = I40E_AQ_BUF_SZ;
 393
 394         err = i40evf_execute_vf_cmd(dev, &args);
 395         if (err) {
 396                 PMD_INIT_LOG(ERR, "fail to execute command OP_VERSION");
 397                 return err;
 398         }
 399
 400         pver = (struct virtchnl_version_info *)args.out_buffer;
 401         vf->version_major = pver->major;
 402         vf->version_minor = pver->minor;
 403         if ((vf->version_major == VIRTCHNL_VERSION_MAJOR) &&
 404                 (vf->version_minor <= VIRTCHNL_VERSION_MINOR))
 405                 PMD_DRV_LOG(INFO, "Peer is Linux PF host");
 406         else {
 407                 PMD_INIT_LOG(ERR, "PF/VF API version mismatch:(%u.%u)-(%u.%u)",
 408                                         vf->version_major, vf->version_minor,
 409                                                 VIRTCHNL_VERSION_MAJOR,
 410                                                 VIRTCHNL_VERSION_MINOR);
 411                 return -1;
 412         }
 413
 414         return 0;
 415 }
 416
 417 static int
 418 i40evf_get_vf_resource(struct rte_eth_dev *dev)
 419 {
 420         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 421         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 422         int err;
 423         struct vf_cmd_info args;
 424         uint32_t caps, len;
 425
 426         args.ops = VIRTCHNL_OP_GET_VF_RESOURCES;
 427         args.out_buffer = vf->aq_resp;
 428         args.out_size = I40E_AQ_BUF_SZ;
 429         if (PF_IS_V11(vf)) {
 430                 caps = VIRTCHNL_VF_OFFLOAD_L2 |
 431                        VIRTCHNL_VF_OFFLOAD_RSS_AQ |
 432                        VIRTCHNL_VF_OFFLOAD_RSS_REG |
 433                        VIRTCHNL_VF_OFFLOAD_VLAN |
 434                        VIRTCHNL_VF_OFFLOAD_RX_POLLING;
 435                 args.in_args = (uint8_t *)&caps;
 436                 args.in_args_size = sizeof(caps);
 437         } else {
 438                 args.in_args = NULL;
 439                 args.in_args_size = 0;
 440         }
 441         err = i40evf_execute_vf_cmd(dev, &args);
 442
 443         if (err) {
 444                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_VF_RESOURCE");
 445                 return err;
 446         }
 447
 448         len =  sizeof(struct virtchnl_vf_resource) +
 449                 I40E_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource);
 450
 451         rte_memcpy(vf->vf_res, args.out_buffer,
 452                         RTE_MIN(args.out_size, len));
 453         i40e_vf_parse_hw_config(hw, vf->vf_res);
 454
 455         return 0;
 456 }
 457
 458 static int
 459 i40evf_config_promisc(struct rte_eth_dev *dev,
 460                       bool enable_unicast,
 461                       bool enable_multicast)
 462 {
 463         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 464         int err;
 465         struct vf_cmd_info args;
 466         struct virtchnl_promisc_info promisc;
 467
 468         promisc.flags = 0;
 469         promisc.vsi_id = vf->vsi_res->vsi_id;
 470
 471         if (enable_unicast)
 472                 promisc.flags |= FLAG_VF_UNICAST_PROMISC;
 473
 474         if (enable_multicast)
 475                 promisc.flags |= FLAG_VF_MULTICAST_PROMISC;
 476
 477         args.ops = VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE;
 478         args.in_args = (uint8_t *)&promisc;
 479         args.in_args_size = sizeof(promisc);
 480         args.out_buffer = vf->aq_resp;
 481         args.out_size = I40E_AQ_BUF_SZ;
 482
 483         err = i40evf_execute_vf_cmd(dev, &args);
 484
 485         if (err)
 486                 PMD_DRV_LOG(ERR, "fail to execute command "
 487                             "CONFIG_PROMISCUOUS_MODE");
 488         return err;
 489 }
 490
 491 static int
 492 i40evf_enable_vlan_strip(struct rte_eth_dev *dev)
 493 {
 494         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 495         struct vf_cmd_info args;
 496         int ret;
 497
 498         memset(&args, 0, sizeof(args));
 499         args.ops = VIRTCHNL_OP_ENABLE_VLAN_STRIPPING;
 500         args.in_args = NULL;
 501         args.in_args_size = 0;
 502         args.out_buffer = vf->aq_resp;
 503         args.out_size = I40E_AQ_BUF_SZ;
 504         ret = i40evf_execute_vf_cmd(dev, &args);
 505         if (ret)
 506                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 507                             "VIRTCHNL_OP_ENABLE_VLAN_STRIPPING");
 508
 509         return ret;
 510 }
 511
 512 static int
 513 i40evf_disable_vlan_strip(struct rte_eth_dev *dev)
 514 {
 515         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 516         struct vf_cmd_info args;
 517         int ret;
 518
 519         memset(&args, 0, sizeof(args));
 520         args.ops = VIRTCHNL_OP_DISABLE_VLAN_STRIPPING;
 521         args.in_args = NULL;
 522         args.in_args_size = 0;
 523         args.out_buffer = vf->aq_resp;
 524         args.out_size = I40E_AQ_BUF_SZ;
 525         ret = i40evf_execute_vf_cmd(dev, &args);
 526         if (ret)
 527                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 528                             "VIRTCHNL_OP_DISABLE_VLAN_STRIPPING");
 529
 530         return ret;
 531 }
 532
 533 static void
 534 i40evf_fill_virtchnl_vsi_txq_info(struct virtchnl_txq_info *txq_info,
 535                                   uint16_t vsi_id,
 536                                   uint16_t queue_id,
 537                                   uint16_t nb_txq,
 538                                   struct i40e_tx_queue *txq)
 539 {
 540         txq_info->vsi_id = vsi_id;
 541         txq_info->queue_id = queue_id;
 542         if (queue_id < nb_txq) {
 543                 txq_info->ring_len = txq->nb_tx_desc;
 544                 txq_info->dma_ring_addr = txq->tx_ring_phys_addr;
 545         }
 546 }
 547
 548 static void
 549 i40evf_fill_virtchnl_vsi_rxq_info(struct virtchnl_rxq_info *rxq_info,
 550                                   uint16_t vsi_id,
 551                                   uint16_t queue_id,
 552                                   uint16_t nb_rxq,
 553                                   uint32_t max_pkt_size,
 554                                   struct i40e_rx_queue *rxq)
 555 {
 556         rxq_info->vsi_id = vsi_id;
 557         rxq_info->queue_id = queue_id;
 558         rxq_info->max_pkt_size = max_pkt_size;
 559         if (queue_id < nb_rxq) {
 560                 rxq_info->ring_len = rxq->nb_rx_desc;
 561                 rxq_info->dma_ring_addr = rxq->rx_ring_phys_addr;
 562                 rxq_info->databuffer_size =
 563                         (rte_pktmbuf_data_room_size(rxq->mp) -
 564                                 RTE_PKTMBUF_HEADROOM);
 565         }
 566 }
 567
 568 static int
 569 i40evf_configure_vsi_queues(struct rte_eth_dev *dev)
 570 {
 571         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 572         struct i40e_rx_queue **rxq =
 573                 (struct i40e_rx_queue **)dev->data->rx_queues;
 574         struct i40e_tx_queue **txq =
 575                 (struct i40e_tx_queue **)dev->data->tx_queues;
 576         struct virtchnl_vsi_queue_config_info *vc_vqci;
 577         struct virtchnl_queue_pair_info *vc_qpi;
 578         struct vf_cmd_info args;
 579         uint16_t i, nb_qp = vf->num_queue_pairs;
 580         const uint32_t size =
 581                 I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqci, nb_qp);
 582         uint8_t buff[size];
 583         int ret;
 584
 585         memset(buff, 0, sizeof(buff));
 586         vc_vqci = (struct virtchnl_vsi_queue_config_info *)buff;
 587         vc_vqci->vsi_id = vf->vsi_res->vsi_id;
 588         vc_vqci->num_queue_pairs = nb_qp;
 589
 590         for (i = 0, vc_qpi = vc_vqci->qpair; i < nb_qp; i++, vc_qpi++) {
 591                 i40evf_fill_virtchnl_vsi_txq_info(&vc_qpi->txq,
 592                         vc_vqci->vsi_id, i, dev->data->nb_tx_queues, txq[i]);
 593                 i40evf_fill_virtchnl_vsi_rxq_info(&vc_qpi->rxq,
 594                         vc_vqci->vsi_id, i, dev->data->nb_rx_queues,
 595                                         vf->max_pkt_len, rxq[i]);
 596         }
 597         memset(&args, 0, sizeof(args));
 598         args.ops = VIRTCHNL_OP_CONFIG_VSI_QUEUES;
 599         args.in_args = (uint8_t *)vc_vqci;
 600         args.in_args_size = size;
 601         args.out_buffer = vf->aq_resp;
 602         args.out_size = I40E_AQ_BUF_SZ;
 603         ret = i40evf_execute_vf_cmd(dev, &args);
 604         if (ret)
 605                 PMD_DRV_LOG(ERR, "Failed to execute command of "
 606                         "VIRTCHNL_OP_CONFIG_VSI_QUEUES");
 607
 608         return ret;
 609 }
 610
 611 static int
 612 i40evf_config_irq_map(struct rte_eth_dev *dev)
 613 {
 614         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 615         struct vf_cmd_info args;
 616         uint8_t cmd_buffer[sizeof(struct virtchnl_irq_map_info) + \
 617                 sizeof(struct virtchnl_vector_map)];
 618         struct virtchnl_irq_map_info *map_info;
 619         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
 620         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
 621         uint32_t vector_id;
 622         int i, err;
 623
 624         if (dev->data->dev_conf.intr_conf.rxq != 0 &&
 625             rte_intr_allow_others(intr_handle))
 626                 vector_id = I40E_RX_VEC_START;
 627         else
 628                 vector_id = I40E_MISC_VEC_ID;
 629
 630         map_info = (struct virtchnl_irq_map_info *)cmd_buffer;
 631         map_info->num_vectors = 1;
 632         map_info->vecmap[0].rxitr_idx = I40E_ITR_INDEX_DEFAULT;
 633         map_info->vecmap[0].vsi_id = vf->vsi_res->vsi_id;
 634         /* Alway use default dynamic MSIX interrupt */
 635         map_info->vecmap[0].vector_id = vector_id;
 636         /* Don't map any tx queue */
 637         map_info->vecmap[0].txq_map = 0;
 638         map_info->vecmap[0].rxq_map = 0;
 639         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 640                 map_info->vecmap[0].rxq_map |= 1 << i;
 641                 if (rte_intr_dp_is_en(intr_handle))
 642                         intr_handle->intr_vec[i] = vector_id;
 643         }
 644
 645         args.ops = VIRTCHNL_OP_CONFIG_IRQ_MAP;
 646         args.in_args = (u8 *)cmd_buffer;
 647         args.in_args_size = sizeof(cmd_buffer);
 648         args.out_buffer = vf->aq_resp;
 649         args.out_size = I40E_AQ_BUF_SZ;
 650         err = i40evf_execute_vf_cmd(dev, &args);
 651         if (err)
 652                 PMD_DRV_LOG(ERR, "fail to execute command OP_ENABLE_QUEUES");
 653
 654         return err;
 655 }
 656
 657 static int
 658 i40evf_switch_queue(struct rte_eth_dev *dev, bool isrx, uint16_t qid,
 659                                 bool on)
 660 {
 661         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 662         struct virtchnl_queue_select queue_select;
 663         int err;
 664         struct vf_cmd_info args;
 665         memset(&queue_select, 0, sizeof(queue_select));
 666         queue_select.vsi_id = vf->vsi_res->vsi_id;
 667
 668         if (isrx)
 669                 queue_select.rx_queues |= 1 << qid;
 670         else
 671                 queue_select.tx_queues |= 1 << qid;
 672
 673         if (on)
 674                 args.ops = VIRTCHNL_OP_ENABLE_QUEUES;
 675         else
 676                 args.ops = VIRTCHNL_OP_DISABLE_QUEUES;
 677         args.in_args = (u8 *)&queue_select;
 678         args.in_args_size = sizeof(queue_select);
 679         args.out_buffer = vf->aq_resp;
 680         args.out_size = I40E_AQ_BUF_SZ;
 681         err = i40evf_execute_vf_cmd(dev, &args);
 682         if (err)
 683                 PMD_DRV_LOG(ERR, "fail to switch %s %u %s",
 684                             isrx ? "RX" : "TX", qid, on ? "on" : "off");
 685
 686         return err;
 687 }
 688
 689 static int
 690 i40evf_start_queues(struct rte_eth_dev *dev)
 691 {
 692         struct rte_eth_dev_data *dev_data = dev->data;
 693         int i;
 694         struct i40e_rx_queue *rxq;
 695         struct i40e_tx_queue *txq;
 696
 697         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 698                 rxq = dev_data->rx_queues[i];
 699                 if (rxq->rx_deferred_start)
 700                         continue;
 701                 if (i40evf_dev_rx_queue_start(dev, i) != 0) {
 702                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
 703                         return -1;
 704                 }
 705         }
 706
 707         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 708                 txq = dev_data->tx_queues[i];
 709                 if (txq->tx_deferred_start)
 710                         continue;
 711                 if (i40evf_dev_tx_queue_start(dev, i) != 0) {
 712                         PMD_DRV_LOG(ERR, "Fail to start queue %u", i);
 713                         return -1;
 714                 }
 715         }
 716
 717         return 0;
 718 }
 719
 720 static int
 721 i40evf_stop_queues(struct rte_eth_dev *dev)
 722 {
 723         int i;
 724
 725         /* Stop TX queues first */
 726         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 727                 if (i40evf_dev_tx_queue_stop(dev, i) != 0) {
 728                         PMD_DRV_LOG(ERR, "Fail to stop queue %u", i);
 729                         return -1;
 730                 }
 731         }
 732
 733         /* Then stop RX queues */
 734         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 735                 if (i40evf_dev_rx_queue_stop(dev, i) != 0) {
 736                         PMD_DRV_LOG(ERR, "Fail to stop queue %u", i);
 737                         return -1;
 738                 }
 739         }
 740
 741         return 0;
 742 }
 743
 744 static int
 745 i40evf_add_mac_addr(struct rte_eth_dev *dev,
 746                     struct ether_addr *addr,
 747                     __rte_unused uint32_t index,
 748                     __rte_unused uint32_t pool)
 749 {
 750         struct virtchnl_ether_addr_list *list;
 751         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 752         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) + \
 753                         sizeof(struct virtchnl_ether_addr)];
 754         int err;
 755         struct vf_cmd_info args;
 756
 757         if (is_zero_ether_addr(addr)) {
 758                 PMD_DRV_LOG(ERR, "Invalid mac:%x:%x:%x:%x:%x:%x",
 759                             addr->addr_bytes[0], addr->addr_bytes[1],
 760                             addr->addr_bytes[2], addr->addr_bytes[3],
 761                             addr->addr_bytes[4], addr->addr_bytes[5]);
 762                 return I40E_ERR_INVALID_MAC_ADDR;
 763         }
 764
 765         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
 766         list->vsi_id = vf->vsi_res->vsi_id;
 767         list->num_elements = 1;
 768         rte_memcpy(list->list[0].addr, addr->addr_bytes,
 769                                         sizeof(addr->addr_bytes));
 770
 771         args.ops = VIRTCHNL_OP_ADD_ETH_ADDR;
 772         args.in_args = cmd_buffer;
 773         args.in_args_size = sizeof(cmd_buffer);
 774         args.out_buffer = vf->aq_resp;
 775         args.out_size = I40E_AQ_BUF_SZ;
 776         err = i40evf_execute_vf_cmd(dev, &args);
 777         if (err)
 778                 PMD_DRV_LOG(ERR, "fail to execute command "
 779                             "OP_ADD_ETHER_ADDRESS");
 780         else
 781                 vf->vsi.mac_num++;
 782
 783         return err;
 784 }
 785
 786 static void
 787 i40evf_del_mac_addr_by_addr(struct rte_eth_dev *dev,
 788                             struct ether_addr *addr)
 789 {
 790         struct virtchnl_ether_addr_list *list;
 791         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 792         uint8_t cmd_buffer[sizeof(struct virtchnl_ether_addr_list) + \
 793                         sizeof(struct virtchnl_ether_addr)];
 794         int err;
 795         struct vf_cmd_info args;
 796
 797         if (i40e_validate_mac_addr(addr->addr_bytes) != I40E_SUCCESS) {
 798                 PMD_DRV_LOG(ERR, "Invalid mac:%x-%x-%x-%x-%x-%x",
 799                             addr->addr_bytes[0], addr->addr_bytes[1],
 800                             addr->addr_bytes[2], addr->addr_bytes[3],
 801                             addr->addr_bytes[4], addr->addr_bytes[5]);
 802                 return;
 803         }
 804
 805         list = (struct virtchnl_ether_addr_list *)cmd_buffer;
 806         list->vsi_id = vf->vsi_res->vsi_id;
 807         list->num_elements = 1;
 808         rte_memcpy(list->list[0].addr, addr->addr_bytes,
 809                         sizeof(addr->addr_bytes));
 810
 811         args.ops = VIRTCHNL_OP_DEL_ETH_ADDR;
 812         args.in_args = cmd_buffer;
 813         args.in_args_size = sizeof(cmd_buffer);
 814         args.out_buffer = vf->aq_resp;
 815         args.out_size = I40E_AQ_BUF_SZ;
 816         err = i40evf_execute_vf_cmd(dev, &args);
 817         if (err)
 818                 PMD_DRV_LOG(ERR, "fail to execute command "
 819                             "OP_DEL_ETHER_ADDRESS");
 820         else
 821                 vf->vsi.mac_num--;
 822         return;
 823 }
 824
 825 static void
 826 i40evf_del_mac_addr(struct rte_eth_dev *dev, uint32_t index)
 827 {
 828         struct rte_eth_dev_data *data = dev->data;
 829         struct ether_addr *addr;
 830
 831         addr = &data->mac_addrs[index];
 832
 833         i40evf_del_mac_addr_by_addr(dev, addr);
 834 }
 835
 836 static int
 837 i40evf_query_stats(struct rte_eth_dev *dev, struct i40e_eth_stats **pstats)
 838 {
 839         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 840         struct virtchnl_queue_select q_stats;
 841         int err;
 842         struct vf_cmd_info args;
 843
 844         memset(&q_stats, 0, sizeof(q_stats));
 845         q_stats.vsi_id = vf->vsi_res->vsi_id;
 846         args.ops = VIRTCHNL_OP_GET_STATS;
 847         args.in_args = (u8 *)&q_stats;
 848         args.in_args_size = sizeof(q_stats);
 849         args.out_buffer = vf->aq_resp;
 850         args.out_size = I40E_AQ_BUF_SZ;
 851
 852         err = i40evf_execute_vf_cmd(dev, &args);
 853         if (err) {
 854                 PMD_DRV_LOG(ERR, "fail to execute command OP_GET_STATS");
 855                 *pstats = NULL;
 856                 return err;
 857         }
 858         *pstats = (struct i40e_eth_stats *)args.out_buffer;
 859         return 0;
 860 }
 861
 862 static void
 863 i40evf_stat_update_48(uint64_t *offset,
 864                    uint64_t *stat)
 865 {
 866         if (*stat >= *offset)
 867                 *stat = *stat - *offset;
 868         else
 869                 *stat = (uint64_t)((*stat +
 870                         ((uint64_t)1 << I40E_48_BIT_WIDTH)) - *offset);
 871
 872         *stat &= I40E_48_BIT_MASK;
 873 }
 874
 875 static void
 876 i40evf_stat_update_32(uint64_t *offset,
 877                    uint64_t *stat)
 878 {
 879         if (*stat >= *offset)
 880                 *stat = (uint64_t)(*stat - *offset);
 881         else
 882                 *stat = (uint64_t)((*stat +
 883                         ((uint64_t)1 << I40E_32_BIT_WIDTH)) - *offset);
 884 }
 885
 886 static void
 887 i40evf_update_stats(struct i40e_vsi *vsi,
 888                                         struct i40e_eth_stats *nes)
 889 {
 890         struct i40e_eth_stats *oes = &vsi->eth_stats_offset;
 891
 892         i40evf_stat_update_48(&oes->rx_bytes,
 893                             &nes->rx_bytes);
 894         i40evf_stat_update_48(&oes->rx_unicast,
 895                             &nes->rx_unicast);
 896         i40evf_stat_update_48(&oes->rx_multicast,
 897                             &nes->rx_multicast);
 898         i40evf_stat_update_48(&oes->rx_broadcast,
 899                             &nes->rx_broadcast);
 900         i40evf_stat_update_32(&oes->rx_discards,
 901                                 &nes->rx_discards);
 902         i40evf_stat_update_32(&oes->rx_unknown_protocol,
 903                             &nes->rx_unknown_protocol);
 904         i40evf_stat_update_48(&oes->tx_bytes,
 905                             &nes->tx_bytes);
 906         i40evf_stat_update_48(&oes->tx_unicast,
 907                             &nes->tx_unicast);
 908         i40evf_stat_update_48(&oes->tx_multicast,
 909                             &nes->tx_multicast);
 910         i40evf_stat_update_48(&oes->tx_broadcast,
 911                             &nes->tx_broadcast);
 912         i40evf_stat_update_32(&oes->tx_errors, &nes->tx_errors);
 913         i40evf_stat_update_32(&oes->tx_discards, &nes->tx_discards);
 914 }
 915
 916 static void
 917 i40evf_dev_xstats_reset(struct rte_eth_dev *dev)
 918 {
 919         int ret;
 920         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 921         struct i40e_eth_stats *pstats = NULL;
 922
 923         /* read stat values to clear hardware registers */
 924         ret = i40evf_query_stats(dev, &pstats);
 925
 926         /* set stats offset base on current values */
 927         if (ret == 0)
 928                 vf->vsi.eth_stats_offset = *pstats;
 929 }
 930
 931 static int i40evf_dev_xstats_get_names(__rte_unused struct rte_eth_dev *dev,
 932                                       struct rte_eth_xstat_name *xstats_names,
 933                                       __rte_unused unsigned limit)
 934 {
 935         unsigned i;
 936
 937         if (xstats_names != NULL)
 938                 for (i = 0; i < I40EVF_NB_XSTATS; i++) {
 939                         snprintf(xstats_names[i].name,
 940                                 sizeof(xstats_names[i].name),
 941                                 "%s", rte_i40evf_stats_strings[i].name);
 942                 }
 943         return I40EVF_NB_XSTATS;
 944 }
 945
 946 static int i40evf_dev_xstats_get(struct rte_eth_dev *dev,
 947                                  struct rte_eth_xstat *xstats, unsigned n)
 948 {
 949         int ret;
 950         unsigned i;
 951         struct i40e_eth_stats *pstats = NULL;
 952         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 953         struct i40e_vsi *vsi = &vf->vsi;
 954
 955         if (n < I40EVF_NB_XSTATS)
 956                 return I40EVF_NB_XSTATS;
 957
 958         ret = i40evf_query_stats(dev, &pstats);
 959         if (ret != 0)
 960                 return 0;
 961
 962         if (!xstats)
 963                 return 0;
 964
 965         i40evf_update_stats(vsi, pstats);
 966
 967         /* loop over xstats array and values from pstats */
 968         for (i = 0; i < I40EVF_NB_XSTATS; i++) {
 969                 xstats[i].id = i;
 970                 xstats[i].value = *(uint64_t *)(((char *)pstats) +
 971                         rte_i40evf_stats_strings[i].offset);
 972         }
 973
 974         return I40EVF_NB_XSTATS;
 975 }
 976
 977 static int
 978 i40evf_add_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
 979 {
 980         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
 981         struct virtchnl_vlan_filter_list *vlan_list;
 982         uint8_t cmd_buffer[sizeof(struct virtchnl_vlan_filter_list) +
 983                                                         sizeof(uint16_t)];
 984         int err;
 985         struct vf_cmd_info args;
 986
 987         vlan_list = (struct virtchnl_vlan_filter_list *)cmd_buffer;
 988         vlan_list->vsi_id = vf->vsi_res->vsi_id;
 989         vlan_list->num_elements = 1;
 990         vlan_list->vlan_id[0] = vlanid;
 991
 992         args.ops = VIRTCHNL_OP_ADD_VLAN;
 993         args.in_args = (u8 *)&cmd_buffer;
 994         args.in_args_size = sizeof(cmd_buffer);
 995         args.out_buffer = vf->aq_resp;
 996         args.out_size = I40E_AQ_BUF_SZ;
 997         err = i40evf_execute_vf_cmd(dev, &args);
 998         if (err)
 999                 PMD_DRV_LOG(ERR, "fail to execute command OP_ADD_VLAN");
1000
1001         return err;
1002 }
1003
1004 static int
1005 i40evf_del_vlan(struct rte_eth_dev *dev, uint16_t vlanid)
1006 {
1007         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1008         struct virtchnl_vlan_filter_list *vlan_list;
1009         uint8_t cmd_buffer[sizeof(struct virtchnl_vlan_filter_list) +
1010                                                         sizeof(uint16_t)];
1011         int err;
1012         struct vf_cmd_info args;
1013
1014         vlan_list = (struct virtchnl_vlan_filter_list *)cmd_buffer;
1015         vlan_list->vsi_id = vf->vsi_res->vsi_id;
1016         vlan_list->num_elements = 1;
1017         vlan_list->vlan_id[0] = vlanid;
1018
1019         args.ops = VIRTCHNL_OP_DEL_VLAN;
1020         args.in_args = (u8 *)&cmd_buffer;
1021         args.in_args_size = sizeof(cmd_buffer);
1022         args.out_buffer = vf->aq_resp;
1023         args.out_size = I40E_AQ_BUF_SZ;
1024         err = i40evf_execute_vf_cmd(dev, &args);
1025         if (err)
1026                 PMD_DRV_LOG(ERR, "fail to execute command OP_DEL_VLAN");
1027
1028         return err;
1029 }
1030
1031 static const struct rte_pci_id pci_id_i40evf_map[] = {
1032         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_VF) },
1033         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_VF_HV) },
1034         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_A0_VF) },
1035         { RTE_PCI_DEVICE(I40E_INTEL_VENDOR_ID, I40E_DEV_ID_X722_VF) },
1036         { .vendor_id = 0, /* sentinel */ },
1037 };
1038
1039 static inline int
1040 i40evf_dev_atomic_write_link_status(struct rte_eth_dev *dev,
1041                                     struct rte_eth_link *link)
1042 {
1043         struct rte_eth_link *dst = &(dev->data->dev_link);
1044         struct rte_eth_link *src = link;
1045
1046         if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1047                                         *(uint64_t *)src) == 0)
1048                 return -1;
1049
1050         return 0;
1051 }
1052
1053 /* Disable IRQ0 */
1054 static inline void
1055 i40evf_disable_irq0(struct i40e_hw *hw)
1056 {
1057         /* Disable all interrupt types */
1058         I40E_WRITE_REG(hw, I40E_VFINT_ICR0_ENA1, 0);
1059         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1060                        I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1061         I40EVF_WRITE_FLUSH(hw);
1062 }
1063
1064 /* Enable IRQ0 */
1065 static inline void
1066 i40evf_enable_irq0(struct i40e_hw *hw)
1067 {
1068         /* Enable admin queue interrupt trigger */
1069         uint32_t val;
1070
1071         i40evf_disable_irq0(hw);
1072         val = I40E_READ_REG(hw, I40E_VFINT_ICR0_ENA1);
1073         val |= I40E_VFINT_ICR0_ENA1_ADMINQ_MASK |
1074                 I40E_VFINT_ICR0_ENA1_LINK_STAT_CHANGE_MASK;
1075         I40E_WRITE_REG(hw, I40E_VFINT_ICR0_ENA1, val);
1076
1077         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1078                 I40E_VFINT_DYN_CTL01_INTENA_MASK |
1079                 I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1080                 I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1081
1082         I40EVF_WRITE_FLUSH(hw);
1083 }
1084
1085 static int
1086 i40evf_check_vf_reset_done(struct i40e_hw *hw)
1087 {
1088         int i, reset;
1089
1090         for (i = 0; i < MAX_RESET_WAIT_CNT; i++) {
1091                 reset = I40E_READ_REG(hw, I40E_VFGEN_RSTAT) &
1092                         I40E_VFGEN_RSTAT_VFR_STATE_MASK;
1093                 reset = reset >> I40E_VFGEN_RSTAT_VFR_STATE_SHIFT;
1094                 if (reset == VIRTCHNL_VFR_VFACTIVE ||
1095                     reset == VIRTCHNL_VFR_COMPLETED)
1096                         break;
1097                 rte_delay_ms(50);
1098         }
1099
1100         if (i >= MAX_RESET_WAIT_CNT)
1101                 return -1;
1102
1103         return 0;
1104 }
1105 static int
1106 i40evf_reset_vf(struct i40e_hw *hw)
1107 {
1108         int ret;
1109
1110         if (i40e_vf_reset(hw) != I40E_SUCCESS) {
1111                 PMD_INIT_LOG(ERR, "Reset VF NIC failed");
1112                 return -1;
1113         }
1114         /**
1115           * After issuing vf reset command to pf, pf won't necessarily
1116           * reset vf, it depends on what state it exactly is. If it's not
1117           * initialized yet, it won't have vf reset since it's in a certain
1118           * state. If not, it will try to reset. Even vf is reset, pf will
1119           * set I40E_VFGEN_RSTAT to COMPLETE first, then wait 10ms and set
1120           * it to ACTIVE. In this duration, vf may not catch the moment that
1121           * COMPLETE is set. So, for vf, we'll try to wait a long time.
1122           */
1123         rte_delay_ms(200);
1124
1125         ret = i40evf_check_vf_reset_done(hw);
1126         if (ret) {
1127                 PMD_INIT_LOG(ERR, "VF is still resetting");
1128                 return ret;
1129         }
1130
1131         return 0;
1132 }
1133
1134 static int
1135 i40evf_init_vf(struct rte_eth_dev *dev)
1136 {
1137         int i, err, bufsz;
1138         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1139         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1140         uint16_t interval =
1141                 i40e_calc_itr_interval(RTE_LIBRTE_I40E_ITR_INTERVAL, 0, 0);
1142
1143         vf->adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1144         vf->dev_data = dev->data;
1145         err = i40e_set_mac_type(hw);
1146         if (err) {
1147                 PMD_INIT_LOG(ERR, "set_mac_type failed: %d", err);
1148                 goto err;
1149         }
1150
1151         err = i40evf_check_vf_reset_done(hw);
1152         if (err)
1153                 goto err;
1154
1155         i40e_init_adminq_parameter(hw);
1156         err = i40e_init_adminq(hw);
1157         if (err) {
1158                 PMD_INIT_LOG(ERR, "init_adminq failed: %d", err);
1159                 goto err;
1160         }
1161
1162         /* Reset VF and wait until it's complete */
1163         if (i40evf_reset_vf(hw)) {
1164                 PMD_INIT_LOG(ERR, "reset NIC failed");
1165                 goto err_aq;
1166         }
1167
1168         /* VF reset, shutdown admin queue and initialize again */
1169         if (i40e_shutdown_adminq(hw) != I40E_SUCCESS) {
1170                 PMD_INIT_LOG(ERR, "i40e_shutdown_adminq failed");
1171                 goto err;
1172         }
1173
1174         i40e_init_adminq_parameter(hw);
1175         if (i40e_init_adminq(hw) != I40E_SUCCESS) {
1176                 PMD_INIT_LOG(ERR, "init_adminq failed");
1177                 goto err;
1178         }
1179
1180         vf->aq_resp = rte_zmalloc("vf_aq_resp", I40E_AQ_BUF_SZ, 0);
1181         if (!vf->aq_resp) {
1182                 PMD_INIT_LOG(ERR, "unable to allocate vf_aq_resp memory");
1183                 goto err_aq;
1184         }
1185         if (i40evf_check_api_version(dev) != 0) {
1186                 PMD_INIT_LOG(ERR, "check_api version failed");
1187                 goto err_api;
1188         }
1189         bufsz = sizeof(struct virtchnl_vf_resource) +
1190                 (I40E_MAX_VF_VSI * sizeof(struct virtchnl_vsi_resource));
1191         vf->vf_res = rte_zmalloc("vf_res", bufsz, 0);
1192         if (!vf->vf_res) {
1193                 PMD_INIT_LOG(ERR, "unable to allocate vf_res memory");
1194                 goto err_api;
1195         }
1196
1197         if (i40evf_get_vf_resource(dev) != 0) {
1198                 PMD_INIT_LOG(ERR, "i40evf_get_vf_config failed");
1199                 goto err_alloc;
1200         }
1201
1202         /* got VF config message back from PF, now we can parse it */
1203         for (i = 0; i < vf->vf_res->num_vsis; i++) {
1204                 if (vf->vf_res->vsi_res[i].vsi_type == VIRTCHNL_VSI_SRIOV)
1205                         vf->vsi_res = &vf->vf_res->vsi_res[i];
1206         }
1207
1208         if (!vf->vsi_res) {
1209                 PMD_INIT_LOG(ERR, "no LAN VSI found");
1210                 goto err_alloc;
1211         }
1212
1213         if (hw->mac.type == I40E_MAC_X722_VF)
1214                 vf->flags = I40E_FLAG_RSS_AQ_CAPABLE;
1215         vf->vsi.vsi_id = vf->vsi_res->vsi_id;
1216
1217         switch (vf->vsi_res->vsi_type) {
1218         case VIRTCHNL_VSI_SRIOV:
1219                 vf->vsi.type = I40E_VSI_SRIOV;
1220                 break;
1221         default:
1222                 vf->vsi.type = I40E_VSI_TYPE_UNKNOWN;
1223                 break;
1224         }
1225         vf->vsi.nb_qps = vf->vsi_res->num_queue_pairs;
1226         vf->vsi.adapter = I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1227
1228         /* Store the MAC address configured by host, or generate random one */
1229         if (is_valid_assigned_ether_addr((struct ether_addr *)hw->mac.addr))
1230                 vf->flags |= I40E_FLAG_VF_MAC_BY_PF;
1231         else
1232                 eth_random_addr(hw->mac.addr); /* Generate a random one */
1233
1234         I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1235                        (I40E_ITR_INDEX_DEFAULT <<
1236                         I40E_VFINT_DYN_CTL0_ITR_INDX_SHIFT) |
1237                        (interval <<
1238                         I40E_VFINT_DYN_CTL0_INTERVAL_SHIFT));
1239         I40EVF_WRITE_FLUSH(hw);
1240
1241         return 0;
1242
1243 err_alloc:
1244         rte_free(vf->vf_res);
1245         vf->vsi_res = NULL;
1246 err_api:
1247         rte_free(vf->aq_resp);
1248 err_aq:
1249         i40e_shutdown_adminq(hw); /* ignore error */
1250 err:
1251         return -1;
1252 }
1253
1254 static int
1255 i40evf_uninit_vf(struct rte_eth_dev *dev)
1256 {
1257         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1258         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1259
1260         PMD_INIT_FUNC_TRACE();
1261
1262         if (hw->adapter_stopped == 0)
1263                 i40evf_dev_close(dev);
1264         rte_free(vf->vf_res);
1265         vf->vf_res = NULL;
1266         rte_free(vf->aq_resp);
1267         vf->aq_resp = NULL;
1268
1269         return 0;
1270 }
1271
1272 static void
1273 i40evf_handle_pf_event(struct rte_eth_dev *dev, uint8_t *msg,
1274                 __rte_unused uint16_t msglen)
1275 {
1276         struct virtchnl_pf_event *pf_msg =
1277                         (struct virtchnl_pf_event *)msg;
1278         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1279
1280         switch (pf_msg->event) {
1281         case VIRTCHNL_EVENT_RESET_IMPENDING:
1282                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_RESET_IMPENDING event");
1283                 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_RESET,
1284                                               NULL);
1285                 break;
1286         case VIRTCHNL_EVENT_LINK_CHANGE:
1287                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_LINK_CHANGE event");
1288                 vf->link_up = pf_msg->event_data.link_event.link_status;
1289                 vf->link_speed = pf_msg->event_data.link_event.link_speed;
1290                 break;
1291         case VIRTCHNL_EVENT_PF_DRIVER_CLOSE:
1292                 PMD_DRV_LOG(DEBUG, "VIRTCHNL_EVENT_PF_DRIVER_CLOSE event");
1293                 break;
1294         default:
1295                 PMD_DRV_LOG(ERR, " unknown event received %u", pf_msg->event);
1296                 break;
1297         }
1298 }
1299
1300 static void
1301 i40evf_handle_aq_msg(struct rte_eth_dev *dev)
1302 {
1303         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1304         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1305         struct i40e_arq_event_info info;
1306         uint16_t pending, aq_opc;
1307         enum virtchnl_ops msg_opc;
1308         enum i40e_status_code msg_ret;
1309         int ret;
1310
1311         info.buf_len = I40E_AQ_BUF_SZ;
1312         if (!vf->aq_resp) {
1313                 PMD_DRV_LOG(ERR, "Buffer for adminq resp should not be NULL");
1314                 return;
1315         }
1316         info.msg_buf = vf->aq_resp;
1317
1318         pending = 1;
1319         while (pending) {
1320                 ret = i40e_clean_arq_element(hw, &info, &pending);
1321
1322                 if (ret != I40E_SUCCESS) {
1323                         PMD_DRV_LOG(INFO, "Failed to read msg from AdminQ,"
1324                                     "ret: %d", ret);
1325                         break;
1326                 }
1327                 aq_opc = rte_le_to_cpu_16(info.desc.opcode);
1328                 /* For the message sent from pf to vf, opcode is stored in
1329                  * cookie_high of struct i40e_aq_desc, while return error code
1330                  * are stored in cookie_low, Which is done by
1331                  * i40e_aq_send_msg_to_vf in PF driver.*/
1332                 msg_opc = (enum virtchnl_ops)rte_le_to_cpu_32(
1333                                                   info.desc.cookie_high);
1334                 msg_ret = (enum i40e_status_code)rte_le_to_cpu_32(
1335                                                   info.desc.cookie_low);
1336                 switch (aq_opc) {
1337                 case i40e_aqc_opc_send_msg_to_vf:
1338                         if (msg_opc == VIRTCHNL_OP_EVENT)
1339                                 /* process event*/
1340                                 i40evf_handle_pf_event(dev, info.msg_buf,
1341                                                        info.msg_len);
1342                         else {
1343                                 /* read message and it's expected one */
1344                                 if (msg_opc == vf->pend_cmd) {
1345                                         vf->cmd_retval = msg_ret;
1346                                         /* prevent compiler reordering */
1347                                         rte_compiler_barrier();
1348                                         _clear_cmd(vf);
1349                                 } else
1350                                         PMD_DRV_LOG(ERR, "command mismatch,"
1351                                                 "expect %u, get %u",
1352                                                 vf->pend_cmd, msg_opc);
1353                                 PMD_DRV_LOG(DEBUG, "adminq response is received,"
1354                                              " opcode = %d", msg_opc);
1355                         }
1356                         break;
1357                 default:
1358                         PMD_DRV_LOG(ERR, "Request %u is not supported yet",
1359                                     aq_opc);
1360                         break;
1361                 }
1362         }
1363 }
1364
1365 /**
1366  * Interrupt handler triggered by NIC  for handling
1367  * specific interrupt. Only adminq interrupt is processed in VF.
1368  *
1369  * @param handle
1370  *  Pointer to interrupt handle.
1371  * @param param
1372  *  The address of parameter (struct rte_eth_dev *) regsitered before.
1373  *
1374  * @return
1375  *  void
1376  */
1377 static void
1378 i40evf_dev_interrupt_handler(void *param)
1379 {
1380         struct rte_eth_dev *dev = (struct rte_eth_dev *)param;
1381         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1382         uint32_t icr0;
1383
1384         i40evf_disable_irq0(hw);
1385
1386         /* read out interrupt causes */
1387         icr0 = I40E_READ_REG(hw, I40E_VFINT_ICR01);
1388
1389         /* No interrupt event indicated */
1390         if (!(icr0 & I40E_VFINT_ICR01_INTEVENT_MASK)) {
1391                 PMD_DRV_LOG(DEBUG, "No interrupt event, nothing to do");
1392                 goto done;
1393         }
1394
1395         if (icr0 & I40E_VFINT_ICR01_ADMINQ_MASK) {
1396                 PMD_DRV_LOG(DEBUG, "ICR01_ADMINQ is reported");
1397                 i40evf_handle_aq_msg(dev);
1398         }
1399
1400         /* Link Status Change interrupt */
1401         if (icr0 & I40E_VFINT_ICR01_LINK_STAT_CHANGE_MASK)
1402                 PMD_DRV_LOG(DEBUG, "LINK_STAT_CHANGE is reported,"
1403                                    " do nothing");
1404
1405 done:
1406         i40evf_enable_irq0(hw);
1407 }
1408
1409 static int
1410 i40evf_dev_init(struct rte_eth_dev *eth_dev)
1411 {
1412         struct i40e_hw *hw
1413                 = I40E_DEV_PRIVATE_TO_HW(eth_dev->data->dev_private);
1414         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
1415
1416         PMD_INIT_FUNC_TRACE();
1417
1418         /* assign ops func pointer */
1419         eth_dev->dev_ops = &i40evf_eth_dev_ops;
1420         eth_dev->rx_pkt_burst = &i40e_recv_pkts;
1421         eth_dev->tx_pkt_burst = &i40e_xmit_pkts;
1422
1423         /*
1424          * For secondary processes, we don't initialise any further as primary
1425          * has already done this work.
1426          */
1427         if (rte_eal_process_type() != RTE_PROC_PRIMARY){
1428                 i40e_set_rx_function(eth_dev);
1429                 i40e_set_tx_function(eth_dev);
1430                 return 0;
1431         }
1432         i40e_set_default_ptype_table(eth_dev);
1433         i40e_set_default_pctype_table(eth_dev);
1434         rte_eth_copy_pci_info(eth_dev, pci_dev);
1435
1436         hw->vendor_id = pci_dev->id.vendor_id;
1437         hw->device_id = pci_dev->id.device_id;
1438         hw->subsystem_vendor_id = pci_dev->id.subsystem_vendor_id;
1439         hw->subsystem_device_id = pci_dev->id.subsystem_device_id;
1440         hw->bus.device = pci_dev->addr.devid;
1441         hw->bus.func = pci_dev->addr.function;
1442         hw->hw_addr = (void *)pci_dev->mem_resource[0].addr;
1443         hw->adapter_stopped = 0;
1444
1445         if(i40evf_init_vf(eth_dev) != 0) {
1446                 PMD_INIT_LOG(ERR, "Init vf failed");
1447                 return -1;
1448         }
1449
1450         /* register callback func to eal lib */
1451         rte_intr_callback_register(&pci_dev->intr_handle,
1452                 i40evf_dev_interrupt_handler, (void *)eth_dev);
1453
1454         /* enable uio intr after callback register */
1455         rte_intr_enable(&pci_dev->intr_handle);
1456
1457         /* configure and enable device interrupt */
1458         i40evf_enable_irq0(hw);
1459
1460         /* copy mac addr */
1461         eth_dev->data->mac_addrs = rte_zmalloc("i40evf_mac",
1462                                         ETHER_ADDR_LEN * I40E_NUM_MACADDR_MAX,
1463                                         0);
1464         if (eth_dev->data->mac_addrs == NULL) {
1465                 PMD_INIT_LOG(ERR, "Failed to allocate %d bytes needed to"
1466                                 " store MAC addresses",
1467                                 ETHER_ADDR_LEN * I40E_NUM_MACADDR_MAX);
1468                 return -ENOMEM;
1469         }
1470         ether_addr_copy((struct ether_addr *)hw->mac.addr,
1471                         &eth_dev->data->mac_addrs[0]);
1472
1473         return 0;
1474 }
1475
1476 static int
1477 i40evf_dev_uninit(struct rte_eth_dev *eth_dev)
1478 {
1479         PMD_INIT_FUNC_TRACE();
1480
1481         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1482                 return -EPERM;
1483
1484         eth_dev->dev_ops = NULL;
1485         eth_dev->rx_pkt_burst = NULL;
1486         eth_dev->tx_pkt_burst = NULL;
1487
1488         if (i40evf_uninit_vf(eth_dev) != 0) {
1489                 PMD_INIT_LOG(ERR, "i40evf_uninit_vf failed");
1490                 return -1;
1491         }
1492
1493         rte_free(eth_dev->data->mac_addrs);
1494         eth_dev->data->mac_addrs = NULL;
1495
1496         return 0;
1497 }
1498
1499 static int eth_i40evf_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
1500         struct rte_pci_device *pci_dev)
1501 {
1502         return rte_eth_dev_pci_generic_probe(pci_dev,
1503                 sizeof(struct i40e_adapter), i40evf_dev_init);
1504 }
1505
1506 static int eth_i40evf_pci_remove(struct rte_pci_device *pci_dev)
1507 {
1508         return rte_eth_dev_pci_generic_remove(pci_dev, i40evf_dev_uninit);
1509 }
1510
1511 /*
1512  * virtual function driver struct
1513  */
1514 static struct rte_pci_driver rte_i40evf_pmd = {
1515         .id_table = pci_id_i40evf_map,
1516         .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_IOVA_AS_VA,
1517         .probe = eth_i40evf_pci_probe,
1518         .remove = eth_i40evf_pci_remove,
1519 };
1520
1521 RTE_PMD_REGISTER_PCI(net_i40e_vf, rte_i40evf_pmd);
1522 RTE_PMD_REGISTER_PCI_TABLE(net_i40e_vf, pci_id_i40evf_map);
1523 RTE_PMD_REGISTER_KMOD_DEP(net_i40e_vf, "* igb_uio | vfio-pci");
1524
1525 static int
1526 i40evf_dev_configure(struct rte_eth_dev *dev)
1527 {
1528         struct i40e_adapter *ad =
1529                 I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
1530         struct rte_eth_conf *conf = &dev->data->dev_conf;
1531         struct i40e_vf *vf;
1532
1533         /* Initialize to TRUE. If any of Rx queues doesn't meet the bulk
1534          * allocation or vector Rx preconditions we will reset it.
1535          */
1536         ad->rx_bulk_alloc_allowed = true;
1537         ad->rx_vec_allowed = true;
1538         ad->tx_simple_allowed = true;
1539         ad->tx_vec_allowed = true;
1540
1541         /* For non-DPDK PF drivers, VF has no ability to disable HW
1542          * CRC strip, and is implicitly enabled by the PF.
1543          */
1544         if (!conf->rxmode.hw_strip_crc) {
1545                 vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1546                 if ((vf->version_major == VIRTCHNL_VERSION_MAJOR) &&
1547                     (vf->version_minor <= VIRTCHNL_VERSION_MINOR)) {
1548                         /* Peer is running non-DPDK PF driver. */
1549                         PMD_INIT_LOG(ERR, "VF can't disable HW CRC Strip");
1550                         return -EINVAL;
1551                 }
1552         }
1553
1554         return i40evf_init_vlan(dev);
1555 }
1556
1557 static int
1558 i40evf_init_vlan(struct rte_eth_dev *dev)
1559 {
1560         /* Apply vlan offload setting */
1561         i40evf_vlan_offload_set(dev, ETH_VLAN_STRIP_MASK);
1562
1563         return 0;
1564 }
1565
1566 static int
1567 i40evf_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1568 {
1569         struct rte_eth_conf *dev_conf = &dev->data->dev_conf;
1570         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1571
1572         if (!(vf->vf_res->vf_cap_flags & VIRTCHNL_VF_OFFLOAD_VLAN))
1573                 return -ENOTSUP;
1574
1575         /* Vlan stripping setting */
1576         if (mask & ETH_VLAN_STRIP_MASK) {
1577                 /* Enable or disable VLAN stripping */
1578                 if (dev_conf->rxmode.hw_vlan_strip)
1579                         i40evf_enable_vlan_strip(dev);
1580                 else
1581                         i40evf_disable_vlan_strip(dev);
1582         }
1583
1584         return 0;
1585 }
1586
1587 static int
1588 i40evf_dev_rx_queue_start(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1589 {
1590         struct i40e_rx_queue *rxq;
1591         int err = 0;
1592         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1593
1594         PMD_INIT_FUNC_TRACE();
1595
1596         if (rx_queue_id < dev->data->nb_rx_queues) {
1597                 rxq = dev->data->rx_queues[rx_queue_id];
1598
1599                 err = i40e_alloc_rx_queue_mbufs(rxq);
1600                 if (err) {
1601                         PMD_DRV_LOG(ERR, "Failed to allocate RX queue mbuf");
1602                         return err;
1603                 }
1604
1605                 rte_wmb();
1606
1607                 /* Init the RX tail register. */
1608                 I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1609                 I40EVF_WRITE_FLUSH(hw);
1610
1611                 /* Ready to switch the queue on */
1612                 err = i40evf_switch_queue(dev, TRUE, rx_queue_id, TRUE);
1613
1614                 if (err)
1615                         PMD_DRV_LOG(ERR, "Failed to switch RX queue %u on",
1616                                     rx_queue_id);
1617                 else
1618                         dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
1619         }
1620
1621         return err;
1622 }
1623
1624 static int
1625 i40evf_dev_rx_queue_stop(struct rte_eth_dev *dev, uint16_t rx_queue_id)
1626 {
1627         struct i40e_rx_queue *rxq;
1628         int err;
1629
1630         if (rx_queue_id < dev->data->nb_rx_queues) {
1631                 rxq = dev->data->rx_queues[rx_queue_id];
1632
1633                 err = i40evf_switch_queue(dev, TRUE, rx_queue_id, FALSE);
1634
1635                 if (err) {
1636                         PMD_DRV_LOG(ERR, "Failed to switch RX queue %u off",
1637                                     rx_queue_id);
1638                         return err;
1639                 }
1640
1641                 i40e_rx_queue_release_mbufs(rxq);
1642                 i40e_reset_rx_queue(rxq);
1643                 dev->data->rx_queue_state[rx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
1644         }
1645
1646         return 0;
1647 }
1648
1649 static int
1650 i40evf_dev_tx_queue_start(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1651 {
1652         int err = 0;
1653
1654         PMD_INIT_FUNC_TRACE();
1655
1656         if (tx_queue_id < dev->data->nb_tx_queues) {
1657
1658                 /* Ready to switch the queue on */
1659                 err = i40evf_switch_queue(dev, FALSE, tx_queue_id, TRUE);
1660
1661                 if (err)
1662                         PMD_DRV_LOG(ERR, "Failed to switch TX queue %u on",
1663                                     tx_queue_id);
1664                 else
1665                         dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STARTED;
1666         }
1667
1668         return err;
1669 }
1670
1671 static int
1672 i40evf_dev_tx_queue_stop(struct rte_eth_dev *dev, uint16_t tx_queue_id)
1673 {
1674         struct i40e_tx_queue *txq;
1675         int err;
1676
1677         if (tx_queue_id < dev->data->nb_tx_queues) {
1678                 txq = dev->data->tx_queues[tx_queue_id];
1679
1680                 err = i40evf_switch_queue(dev, FALSE, tx_queue_id, FALSE);
1681
1682                 if (err) {
1683                         PMD_DRV_LOG(ERR, "Failed to switch TX queue %u off",
1684                                     tx_queue_id);
1685                         return err;
1686                 }
1687
1688                 i40e_tx_queue_release_mbufs(txq);
1689                 i40e_reset_tx_queue(txq);
1690                 dev->data->tx_queue_state[tx_queue_id] = RTE_ETH_QUEUE_STATE_STOPPED;
1691         }
1692
1693         return 0;
1694 }
1695
1696 static int
1697 i40evf_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
1698 {
1699         int ret;
1700
1701         if (on)
1702                 ret = i40evf_add_vlan(dev, vlan_id);
1703         else
1704                 ret = i40evf_del_vlan(dev,vlan_id);
1705
1706         return ret;
1707 }
1708
1709 static int
1710 i40evf_rxq_init(struct rte_eth_dev *dev, struct i40e_rx_queue *rxq)
1711 {
1712         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1713         struct rte_eth_dev_data *dev_data = dev->data;
1714         struct rte_pktmbuf_pool_private *mbp_priv;
1715         uint16_t buf_size, len;
1716
1717         rxq->qrx_tail = hw->hw_addr + I40E_QRX_TAIL1(rxq->queue_id);
1718         I40E_PCI_REG_WRITE(rxq->qrx_tail, rxq->nb_rx_desc - 1);
1719         I40EVF_WRITE_FLUSH(hw);
1720
1721         /* Calculate the maximum packet length allowed */
1722         mbp_priv = rte_mempool_get_priv(rxq->mp);
1723         buf_size = (uint16_t)(mbp_priv->mbuf_data_room_size -
1724                                         RTE_PKTMBUF_HEADROOM);
1725         rxq->hs_mode = i40e_header_split_none;
1726         rxq->rx_hdr_len = 0;
1727         rxq->rx_buf_len = RTE_ALIGN(buf_size, (1 << I40E_RXQ_CTX_DBUFF_SHIFT));
1728         len = rxq->rx_buf_len * I40E_MAX_CHAINED_RX_BUFFERS;
1729         rxq->max_pkt_len = RTE_MIN(len,
1730                 dev_data->dev_conf.rxmode.max_rx_pkt_len);
1731
1732         /**
1733          * Check if the jumbo frame and maximum packet length are set correctly
1734          */
1735         if (dev_data->dev_conf.rxmode.jumbo_frame == 1) {
1736                 if (rxq->max_pkt_len <= ETHER_MAX_LEN ||
1737                     rxq->max_pkt_len > I40E_FRAME_SIZE_MAX) {
1738                         PMD_DRV_LOG(ERR, "maximum packet length must be "
1739                                 "larger than %u and smaller than %u, as jumbo "
1740                                 "frame is enabled", (uint32_t)ETHER_MAX_LEN,
1741                                         (uint32_t)I40E_FRAME_SIZE_MAX);
1742                         return I40E_ERR_CONFIG;
1743                 }
1744         } else {
1745                 if (rxq->max_pkt_len < ETHER_MIN_LEN ||
1746                     rxq->max_pkt_len > ETHER_MAX_LEN) {
1747                         PMD_DRV_LOG(ERR, "maximum packet length must be "
1748                                 "larger than %u and smaller than %u, as jumbo "
1749                                 "frame is disabled", (uint32_t)ETHER_MIN_LEN,
1750                                                 (uint32_t)ETHER_MAX_LEN);
1751                         return I40E_ERR_CONFIG;
1752                 }
1753         }
1754
1755         if (dev_data->dev_conf.rxmode.enable_scatter ||
1756             (rxq->max_pkt_len + 2 * I40E_VLAN_TAG_SIZE) > buf_size) {
1757                 dev_data->scattered_rx = 1;
1758         }
1759
1760         return 0;
1761 }
1762
1763 static int
1764 i40evf_rx_init(struct rte_eth_dev *dev)
1765 {
1766         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1767         uint16_t i;
1768         int ret = I40E_SUCCESS;
1769         struct i40e_rx_queue **rxq =
1770                 (struct i40e_rx_queue **)dev->data->rx_queues;
1771
1772         i40evf_config_rss(vf);
1773         for (i = 0; i < dev->data->nb_rx_queues; i++) {
1774                 if (!rxq[i] || !rxq[i]->q_set)
1775                         continue;
1776                 ret = i40evf_rxq_init(dev, rxq[i]);
1777                 if (ret != I40E_SUCCESS)
1778                         break;
1779         }
1780         if (ret == I40E_SUCCESS)
1781                 i40e_set_rx_function(dev);
1782
1783         return ret;
1784 }
1785
1786 static void
1787 i40evf_tx_init(struct rte_eth_dev *dev)
1788 {
1789         uint16_t i;
1790         struct i40e_tx_queue **txq =
1791                 (struct i40e_tx_queue **)dev->data->tx_queues;
1792         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1793
1794         for (i = 0; i < dev->data->nb_tx_queues; i++)
1795                 txq[i]->qtx_tail = hw->hw_addr + I40E_QTX_TAIL1(i);
1796
1797         i40e_set_tx_function(dev);
1798 }
1799
1800 static inline void
1801 i40evf_enable_queues_intr(struct rte_eth_dev *dev)
1802 {
1803         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1804         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1805         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1806
1807         if (!rte_intr_allow_others(intr_handle)) {
1808                 I40E_WRITE_REG(hw,
1809                                I40E_VFINT_DYN_CTL01,
1810                                I40E_VFINT_DYN_CTL01_INTENA_MASK |
1811                                I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1812                                I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1813                 I40EVF_WRITE_FLUSH(hw);
1814                 return;
1815         }
1816
1817         I40EVF_WRITE_FLUSH(hw);
1818 }
1819
1820 static inline void
1821 i40evf_disable_queues_intr(struct rte_eth_dev *dev)
1822 {
1823         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1824         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1825         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1826
1827         if (!rte_intr_allow_others(intr_handle)) {
1828                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1829                                I40E_VFINT_DYN_CTL01_ITR_INDX_MASK);
1830                 I40EVF_WRITE_FLUSH(hw);
1831                 return;
1832         }
1833
1834         I40EVF_WRITE_FLUSH(hw);
1835 }
1836
1837 static int
1838 i40evf_dev_rx_queue_intr_enable(struct rte_eth_dev *dev, uint16_t queue_id)
1839 {
1840         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1841         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1842         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1843         uint16_t interval =
1844                 i40e_calc_itr_interval(RTE_LIBRTE_I40E_ITR_INTERVAL, 0, 0);
1845         uint16_t msix_intr;
1846
1847         msix_intr = intr_handle->intr_vec[queue_id];
1848         if (msix_intr == I40E_MISC_VEC_ID)
1849                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01,
1850                                I40E_VFINT_DYN_CTL01_INTENA_MASK |
1851                                I40E_VFINT_DYN_CTL01_CLEARPBA_MASK |
1852                                (0 << I40E_VFINT_DYN_CTL01_ITR_INDX_SHIFT) |
1853                                (interval <<
1854                                 I40E_VFINT_DYN_CTL01_INTERVAL_SHIFT));
1855         else
1856                 I40E_WRITE_REG(hw,
1857                                I40E_VFINT_DYN_CTLN1(msix_intr -
1858                                                     I40E_RX_VEC_START),
1859                                I40E_VFINT_DYN_CTLN1_INTENA_MASK |
1860                                I40E_VFINT_DYN_CTLN1_CLEARPBA_MASK |
1861                                (0 << I40E_VFINT_DYN_CTLN1_ITR_INDX_SHIFT) |
1862                                (interval <<
1863                                 I40E_VFINT_DYN_CTLN1_INTERVAL_SHIFT));
1864
1865         I40EVF_WRITE_FLUSH(hw);
1866
1867         rte_intr_enable(&pci_dev->intr_handle);
1868
1869         return 0;
1870 }
1871
1872 static int
1873 i40evf_dev_rx_queue_intr_disable(struct rte_eth_dev *dev, uint16_t queue_id)
1874 {
1875         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1876         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1877         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1878         uint16_t msix_intr;
1879
1880         msix_intr = intr_handle->intr_vec[queue_id];
1881         if (msix_intr == I40E_MISC_VEC_ID)
1882                 I40E_WRITE_REG(hw, I40E_VFINT_DYN_CTL01, 0);
1883         else
1884                 I40E_WRITE_REG(hw,
1885                                I40E_VFINT_DYN_CTLN1(msix_intr -
1886                                                     I40E_RX_VEC_START),
1887                                0);
1888
1889         I40EVF_WRITE_FLUSH(hw);
1890
1891         return 0;
1892 }
1893
1894 static void
1895 i40evf_add_del_all_mac_addr(struct rte_eth_dev *dev, bool add)
1896 {
1897         struct virtchnl_ether_addr_list *list;
1898         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1899         int err, i, j;
1900         int next_begin = 0;
1901         int begin = 0;
1902         uint32_t len;
1903         struct ether_addr *addr;
1904         struct vf_cmd_info args;
1905
1906         do {
1907                 j = 0;
1908                 len = sizeof(struct virtchnl_ether_addr_list);
1909                 for (i = begin; i < I40E_NUM_MACADDR_MAX; i++, next_begin++) {
1910                         if (is_zero_ether_addr(&dev->data->mac_addrs[i]))
1911                                 continue;
1912                         len += sizeof(struct virtchnl_ether_addr);
1913                         if (len >= I40E_AQ_BUF_SZ) {
1914                                 next_begin = i + 1;
1915                                 break;
1916                         }
1917                 }
1918
1919                 list = rte_zmalloc("i40evf_del_mac_buffer", len, 0);
1920                 if (!list) {
1921                         PMD_DRV_LOG(ERR, "fail to allocate memory");
1922                         return;
1923                 }
1924
1925                 for (i = begin; i < next_begin; i++) {
1926                         addr = &dev->data->mac_addrs[i];
1927                         if (is_zero_ether_addr(addr))
1928                                 continue;
1929                         rte_memcpy(list->list[j].addr, addr->addr_bytes,
1930                                          sizeof(addr->addr_bytes));
1931                         PMD_DRV_LOG(DEBUG, "add/rm mac:%x:%x:%x:%x:%x:%x",
1932                                     addr->addr_bytes[0], addr->addr_bytes[1],
1933                                     addr->addr_bytes[2], addr->addr_bytes[3],
1934                                     addr->addr_bytes[4], addr->addr_bytes[5]);
1935                         j++;
1936                 }
1937                 list->vsi_id = vf->vsi_res->vsi_id;
1938                 list->num_elements = j;
1939                 args.ops = add ? VIRTCHNL_OP_ADD_ETH_ADDR :
1940                            VIRTCHNL_OP_DEL_ETH_ADDR;
1941                 args.in_args = (uint8_t *)list;
1942                 args.in_args_size = len;
1943                 args.out_buffer = vf->aq_resp;
1944                 args.out_size = I40E_AQ_BUF_SZ;
1945                 err = i40evf_execute_vf_cmd(dev, &args);
1946                 if (err) {
1947                         PMD_DRV_LOG(ERR, "fail to execute command %s",
1948                                     add ? "OP_ADD_ETHER_ADDRESS" :
1949                                     "OP_DEL_ETHER_ADDRESS");
1950                 } else {
1951                         if (add)
1952                                 vf->vsi.mac_num++;
1953                         else
1954                                 vf->vsi.mac_num--;
1955                 }
1956                 rte_free(list);
1957                 begin = next_begin;
1958         } while (begin < I40E_NUM_MACADDR_MAX);
1959 }
1960
1961 static int
1962 i40evf_dev_start(struct rte_eth_dev *dev)
1963 {
1964         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
1965         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1966         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
1967         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
1968         uint32_t intr_vector = 0;
1969
1970         PMD_INIT_FUNC_TRACE();
1971
1972         hw->adapter_stopped = 0;
1973
1974         vf->max_pkt_len = dev->data->dev_conf.rxmode.max_rx_pkt_len;
1975         vf->num_queue_pairs = RTE_MAX(dev->data->nb_rx_queues,
1976                                         dev->data->nb_tx_queues);
1977
1978         /* check and configure queue intr-vector mapping */
1979         if (rte_intr_cap_multiple(intr_handle) &&
1980             dev->data->dev_conf.intr_conf.rxq) {
1981                 intr_vector = dev->data->nb_rx_queues;
1982                 if (rte_intr_efd_enable(intr_handle, intr_vector))
1983                         return -1;
1984         }
1985
1986         if (rte_intr_dp_is_en(intr_handle) && !intr_handle->intr_vec) {
1987                 intr_handle->intr_vec =
1988                         rte_zmalloc("intr_vec",
1989                                     dev->data->nb_rx_queues * sizeof(int), 0);
1990                 if (!intr_handle->intr_vec) {
1991                         PMD_INIT_LOG(ERR, "Failed to allocate %d rx_queues"
1992                                      " intr_vec", dev->data->nb_rx_queues);
1993                         return -ENOMEM;
1994                 }
1995         }
1996
1997         if (i40evf_rx_init(dev) != 0){
1998                 PMD_DRV_LOG(ERR, "failed to do RX init");
1999                 return -1;
2000         }
2001
2002         i40evf_tx_init(dev);
2003
2004         if (i40evf_configure_vsi_queues(dev) != 0) {
2005                 PMD_DRV_LOG(ERR, "configure queues failed");
2006                 goto err_queue;
2007         }
2008         if (i40evf_config_irq_map(dev)) {
2009                 PMD_DRV_LOG(ERR, "config_irq_map failed");
2010                 goto err_queue;
2011         }
2012
2013         /* Set all mac addrs */
2014         i40evf_add_del_all_mac_addr(dev, TRUE);
2015
2016         if (i40evf_start_queues(dev) != 0) {
2017                 PMD_DRV_LOG(ERR, "enable queues failed");
2018                 goto err_mac;
2019         }
2020
2021         /* When a VF port is bound to VFIO-PCI, only miscellaneous interrupt
2022          * is mapped to VFIO vector 0 in i40evf_dev_init( ).
2023          * If previous VFIO interrupt mapping set in i40evf_dev_init( ) is
2024          * not cleared, it will fail when rte_intr_enable( ) tries to map Rx
2025          * queue interrupt to other VFIO vectors.
2026          * So clear uio/vfio intr/evevnfd first to avoid failure.
2027          */
2028         if (dev->data->dev_conf.intr_conf.rxq != 0) {
2029                 rte_intr_disable(intr_handle);
2030                 rte_intr_enable(intr_handle);
2031         }
2032
2033         i40evf_enable_queues_intr(dev);
2034
2035         return 0;
2036
2037 err_mac:
2038         i40evf_add_del_all_mac_addr(dev, FALSE);
2039 err_queue:
2040         return -1;
2041 }
2042
2043 static void
2044 i40evf_dev_stop(struct rte_eth_dev *dev)
2045 {
2046         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2047         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2048         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2049
2050         PMD_INIT_FUNC_TRACE();
2051
2052         if (hw->adapter_stopped == 1)
2053                 return;
2054         i40evf_stop_queues(dev);
2055         i40evf_disable_queues_intr(dev);
2056         i40e_dev_clear_queues(dev);
2057
2058         /* Clean datapath event and queue/vec mapping */
2059         rte_intr_efd_disable(intr_handle);
2060         if (intr_handle->intr_vec) {
2061                 rte_free(intr_handle->intr_vec);
2062                 intr_handle->intr_vec = NULL;
2063         }
2064         /* remove all mac addrs */
2065         i40evf_add_del_all_mac_addr(dev, FALSE);
2066         hw->adapter_stopped = 1;
2067
2068 }
2069
2070 static int
2071 i40evf_dev_link_update(struct rte_eth_dev *dev,
2072                        __rte_unused int wait_to_complete)
2073 {
2074         struct rte_eth_link new_link;
2075         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2076         /*
2077          * DPDK pf host provide interfacet to acquire link status
2078          * while Linux driver does not
2079          */
2080
2081         /* Linux driver PF host */
2082         switch (vf->link_speed) {
2083         case I40E_LINK_SPEED_100MB:
2084                 new_link.link_speed = ETH_SPEED_NUM_100M;
2085                 break;
2086         case I40E_LINK_SPEED_1GB:
2087                 new_link.link_speed = ETH_SPEED_NUM_1G;
2088                 break;
2089         case I40E_LINK_SPEED_10GB:
2090                 new_link.link_speed = ETH_SPEED_NUM_10G;
2091                 break;
2092         case I40E_LINK_SPEED_20GB:
2093                 new_link.link_speed = ETH_SPEED_NUM_20G;
2094                 break;
2095         case I40E_LINK_SPEED_25GB:
2096                 new_link.link_speed = ETH_SPEED_NUM_25G;
2097                 break;
2098         case I40E_LINK_SPEED_40GB:
2099                 new_link.link_speed = ETH_SPEED_NUM_40G;
2100                 break;
2101         default:
2102                 new_link.link_speed = ETH_SPEED_NUM_100M;
2103                 break;
2104         }
2105         /* full duplex only */
2106         new_link.link_duplex = ETH_LINK_FULL_DUPLEX;
2107         new_link.link_status = vf->link_up ? ETH_LINK_UP :
2108                                              ETH_LINK_DOWN;
2109         new_link.link_autoneg =
2110                 dev->data->dev_conf.link_speeds & ETH_LINK_SPEED_FIXED;
2111
2112         i40evf_dev_atomic_write_link_status(dev, &new_link);
2113
2114         return 0;
2115 }
2116
2117 static void
2118 i40evf_dev_promiscuous_enable(struct rte_eth_dev *dev)
2119 {
2120         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2121         int ret;
2122
2123         /* If enabled, just return */
2124         if (vf->promisc_unicast_enabled)
2125                 return;
2126
2127         ret = i40evf_config_promisc(dev, 1, vf->promisc_multicast_enabled);
2128         if (ret == 0)
2129                 vf->promisc_unicast_enabled = TRUE;
2130 }
2131
2132 static void
2133 i40evf_dev_promiscuous_disable(struct rte_eth_dev *dev)
2134 {
2135         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2136         int ret;
2137
2138         /* If disabled, just return */
2139         if (!vf->promisc_unicast_enabled)
2140                 return;
2141
2142         ret = i40evf_config_promisc(dev, 0, vf->promisc_multicast_enabled);
2143         if (ret == 0)
2144                 vf->promisc_unicast_enabled = FALSE;
2145 }
2146
2147 static void
2148 i40evf_dev_allmulticast_enable(struct rte_eth_dev *dev)
2149 {
2150         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2151         int ret;
2152
2153         /* If enabled, just return */
2154         if (vf->promisc_multicast_enabled)
2155                 return;
2156
2157         ret = i40evf_config_promisc(dev, vf->promisc_unicast_enabled, 1);
2158         if (ret == 0)
2159                 vf->promisc_multicast_enabled = TRUE;
2160 }
2161
2162 static void
2163 i40evf_dev_allmulticast_disable(struct rte_eth_dev *dev)
2164 {
2165         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2166         int ret;
2167
2168         /* If enabled, just return */
2169         if (!vf->promisc_multicast_enabled)
2170                 return;
2171
2172         ret = i40evf_config_promisc(dev, vf->promisc_unicast_enabled, 0);
2173         if (ret == 0)
2174                 vf->promisc_multicast_enabled = FALSE;
2175 }
2176
2177 static void
2178 i40evf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info)
2179 {
2180         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2181
2182         memset(dev_info, 0, sizeof(*dev_info));
2183         dev_info->pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2184         dev_info->max_rx_queues = vf->vsi_res->num_queue_pairs;
2185         dev_info->max_tx_queues = vf->vsi_res->num_queue_pairs;
2186         dev_info->min_rx_bufsize = I40E_BUF_SIZE_MIN;
2187         dev_info->max_rx_pktlen = I40E_FRAME_SIZE_MAX;
2188         dev_info->hash_key_size = (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
2189         dev_info->reta_size = ETH_RSS_RETA_SIZE_64;
2190         dev_info->flow_type_rss_offloads = vf->adapter->flow_types_mask;
2191         dev_info->max_mac_addrs = I40E_NUM_MACADDR_MAX;
2192         dev_info->rx_offload_capa =
2193                 DEV_RX_OFFLOAD_VLAN_STRIP |
2194                 DEV_RX_OFFLOAD_QINQ_STRIP |
2195                 DEV_RX_OFFLOAD_IPV4_CKSUM |
2196                 DEV_RX_OFFLOAD_UDP_CKSUM |
2197                 DEV_RX_OFFLOAD_TCP_CKSUM |
2198                 DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
2199                 DEV_RX_OFFLOAD_CRC_STRIP;
2200         dev_info->tx_offload_capa =
2201                 DEV_TX_OFFLOAD_VLAN_INSERT |
2202                 DEV_TX_OFFLOAD_QINQ_INSERT |
2203                 DEV_TX_OFFLOAD_IPV4_CKSUM |
2204                 DEV_TX_OFFLOAD_UDP_CKSUM |
2205                 DEV_TX_OFFLOAD_TCP_CKSUM |
2206                 DEV_TX_OFFLOAD_SCTP_CKSUM |
2207                 DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
2208                 DEV_TX_OFFLOAD_TCP_TSO |
2209                 DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
2210                 DEV_TX_OFFLOAD_GRE_TNL_TSO |
2211                 DEV_TX_OFFLOAD_IPIP_TNL_TSO |
2212                 DEV_TX_OFFLOAD_GENEVE_TNL_TSO;
2213
2214         dev_info->default_rxconf = (struct rte_eth_rxconf) {
2215                 .rx_thresh = {
2216                         .pthresh = I40E_DEFAULT_RX_PTHRESH,
2217                         .hthresh = I40E_DEFAULT_RX_HTHRESH,
2218                         .wthresh = I40E_DEFAULT_RX_WTHRESH,
2219                 },
2220                 .rx_free_thresh = I40E_DEFAULT_RX_FREE_THRESH,
2221                 .rx_drop_en = 0,
2222         };
2223
2224         dev_info->default_txconf = (struct rte_eth_txconf) {
2225                 .tx_thresh = {
2226                         .pthresh = I40E_DEFAULT_TX_PTHRESH,
2227                         .hthresh = I40E_DEFAULT_TX_HTHRESH,
2228                         .wthresh = I40E_DEFAULT_TX_WTHRESH,
2229                 },
2230                 .tx_free_thresh = I40E_DEFAULT_TX_FREE_THRESH,
2231                 .tx_rs_thresh = I40E_DEFAULT_TX_RSBIT_THRESH,
2232                 .txq_flags = ETH_TXQ_FLAGS_NOMULTSEGS |
2233                                 ETH_TXQ_FLAGS_NOOFFLOADS,
2234         };
2235
2236         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
2237                 .nb_max = I40E_MAX_RING_DESC,
2238                 .nb_min = I40E_MIN_RING_DESC,
2239                 .nb_align = I40E_ALIGN_RING_DESC,
2240         };
2241
2242         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
2243                 .nb_max = I40E_MAX_RING_DESC,
2244                 .nb_min = I40E_MIN_RING_DESC,
2245                 .nb_align = I40E_ALIGN_RING_DESC,
2246         };
2247 }
2248
2249 static int
2250 i40evf_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
2251 {
2252         int ret;
2253         struct i40e_eth_stats *pstats = NULL;
2254         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2255         struct i40e_vsi *vsi = &vf->vsi;
2256
2257         ret = i40evf_query_stats(dev, &pstats);
2258         if (ret == 0) {
2259                 i40evf_update_stats(vsi, pstats);
2260
2261                 stats->ipackets = pstats->rx_unicast + pstats->rx_multicast +
2262                                                 pstats->rx_broadcast;
2263                 stats->opackets = pstats->tx_broadcast + pstats->tx_multicast +
2264                                                 pstats->tx_unicast;
2265                 stats->imissed = pstats->rx_discards;
2266                 stats->oerrors = pstats->tx_errors + pstats->tx_discards;
2267                 stats->ibytes = pstats->rx_bytes;
2268                 stats->obytes = pstats->tx_bytes;
2269         } else {
2270                 PMD_DRV_LOG(ERR, "Get statistics failed");
2271         }
2272         return ret;
2273 }
2274
2275 static void
2276 i40evf_dev_close(struct rte_eth_dev *dev)
2277 {
2278         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2279         struct rte_pci_device *pci_dev = RTE_ETH_DEV_TO_PCI(dev);
2280         struct rte_intr_handle *intr_handle = &pci_dev->intr_handle;
2281
2282         i40evf_dev_stop(dev);
2283         i40e_dev_free_queues(dev);
2284         i40evf_reset_vf(hw);
2285         i40e_shutdown_adminq(hw);
2286         /* disable uio intr before callback unregister */
2287         rte_intr_disable(intr_handle);
2288
2289         /* unregister callback func from eal lib */
2290         rte_intr_callback_unregister(intr_handle,
2291                                      i40evf_dev_interrupt_handler, dev);
2292         i40evf_disable_irq0(hw);
2293 }
2294
2295 /*
2296  * Reset VF device only to re-initialize resources in PMD layer
2297  */
2298 static int
2299 i40evf_dev_reset(struct rte_eth_dev *dev)
2300 {
2301         int ret;
2302
2303         ret = i40evf_dev_uninit(dev);
2304         if (ret)
2305                 return ret;
2306
2307         ret = i40evf_dev_init(dev);
2308
2309         return ret;
2310 }
2311
2312 static int
2313 i40evf_get_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2314 {
2315         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2316         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2317         int ret;
2318
2319         if (!lut)
2320                 return -EINVAL;
2321
2322         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2323                 ret = i40e_aq_get_rss_lut(hw, vsi->vsi_id, FALSE,
2324                                           lut, lut_size);
2325                 if (ret) {
2326                         PMD_DRV_LOG(ERR, "Failed to get RSS lookup table");
2327                         return ret;
2328                 }
2329         } else {
2330                 uint32_t *lut_dw = (uint32_t *)lut;
2331                 uint16_t i, lut_size_dw = lut_size / 4;
2332
2333                 for (i = 0; i < lut_size_dw; i++)
2334                         lut_dw[i] = I40E_READ_REG(hw, I40E_VFQF_HLUT(i));
2335         }
2336
2337         return 0;
2338 }
2339
2340 static int
2341 i40evf_set_rss_lut(struct i40e_vsi *vsi, uint8_t *lut, uint16_t lut_size)
2342 {
2343         struct i40e_vf *vf;
2344         struct i40e_hw *hw;
2345         int ret;
2346
2347         if (!vsi || !lut)
2348                 return -EINVAL;
2349
2350         vf = I40E_VSI_TO_VF(vsi);
2351         hw = I40E_VSI_TO_HW(vsi);
2352
2353         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2354                 ret = i40e_aq_set_rss_lut(hw, vsi->vsi_id, FALSE,
2355                                           lut, lut_size);
2356                 if (ret) {
2357                         PMD_DRV_LOG(ERR, "Failed to set RSS lookup table");
2358                         return ret;
2359                 }
2360         } else {
2361                 uint32_t *lut_dw = (uint32_t *)lut;
2362                 uint16_t i, lut_size_dw = lut_size / 4;
2363
2364                 for (i = 0; i < lut_size_dw; i++)
2365                         I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i), lut_dw[i]);
2366                 I40EVF_WRITE_FLUSH(hw);
2367         }
2368
2369         return 0;
2370 }
2371
2372 static int
2373 i40evf_dev_rss_reta_update(struct rte_eth_dev *dev,
2374                            struct rte_eth_rss_reta_entry64 *reta_conf,
2375                            uint16_t reta_size)
2376 {
2377         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2378         uint8_t *lut;
2379         uint16_t i, idx, shift;
2380         int ret;
2381
2382         if (reta_size != ETH_RSS_RETA_SIZE_64) {
2383                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
2384                         "(%d) doesn't match the number of hardware can "
2385                         "support (%d)", reta_size, ETH_RSS_RETA_SIZE_64);
2386                 return -EINVAL;
2387         }
2388
2389         lut = rte_zmalloc("i40e_rss_lut", reta_size, 0);
2390         if (!lut) {
2391                 PMD_DRV_LOG(ERR, "No memory can be allocated");
2392                 return -ENOMEM;
2393         }
2394         ret = i40evf_get_rss_lut(&vf->vsi, lut, reta_size);
2395         if (ret)
2396                 goto out;
2397         for (i = 0; i < reta_size; i++) {
2398                 idx = i / RTE_RETA_GROUP_SIZE;
2399                 shift = i % RTE_RETA_GROUP_SIZE;
2400                 if (reta_conf[idx].mask & (1ULL << shift))
2401                         lut[i] = reta_conf[idx].reta[shift];
2402         }
2403         ret = i40evf_set_rss_lut(&vf->vsi, lut, reta_size);
2404
2405 out:
2406         rte_free(lut);
2407
2408         return ret;
2409 }
2410
2411 static int
2412 i40evf_dev_rss_reta_query(struct rte_eth_dev *dev,
2413                           struct rte_eth_rss_reta_entry64 *reta_conf,
2414                           uint16_t reta_size)
2415 {
2416         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2417         uint16_t i, idx, shift;
2418         uint8_t *lut;
2419         int ret;
2420
2421         if (reta_size != ETH_RSS_RETA_SIZE_64) {
2422                 PMD_DRV_LOG(ERR, "The size of hash lookup table configured "
2423                         "(%d) doesn't match the number of hardware can "
2424                         "support (%d)", reta_size, ETH_RSS_RETA_SIZE_64);
2425                 return -EINVAL;
2426         }
2427
2428         lut = rte_zmalloc("i40e_rss_lut", reta_size, 0);
2429         if (!lut) {
2430                 PMD_DRV_LOG(ERR, "No memory can be allocated");
2431                 return -ENOMEM;
2432         }
2433
2434         ret = i40evf_get_rss_lut(&vf->vsi, lut, reta_size);
2435         if (ret)
2436                 goto out;
2437         for (i = 0; i < reta_size; i++) {
2438                 idx = i / RTE_RETA_GROUP_SIZE;
2439                 shift = i % RTE_RETA_GROUP_SIZE;
2440                 if (reta_conf[idx].mask & (1ULL << shift))
2441                         reta_conf[idx].reta[shift] = lut[i];
2442         }
2443
2444 out:
2445         rte_free(lut);
2446
2447         return ret;
2448 }
2449
2450 static int
2451 i40evf_set_rss_key(struct i40e_vsi *vsi, uint8_t *key, uint8_t key_len)
2452 {
2453         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2454         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2455         int ret = 0;
2456
2457         if (!key || key_len == 0) {
2458                 PMD_DRV_LOG(DEBUG, "No key to be configured");
2459                 return 0;
2460         } else if (key_len != (I40E_VFQF_HKEY_MAX_INDEX + 1) *
2461                 sizeof(uint32_t)) {
2462                 PMD_DRV_LOG(ERR, "Invalid key length %u", key_len);
2463                 return -EINVAL;
2464         }
2465
2466         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2467                 struct i40e_aqc_get_set_rss_key_data *key_dw =
2468                         (struct i40e_aqc_get_set_rss_key_data *)key;
2469
2470                 ret = i40e_aq_set_rss_key(hw, vsi->vsi_id, key_dw);
2471                 if (ret)
2472                         PMD_INIT_LOG(ERR, "Failed to configure RSS key "
2473                                      "via AQ");
2474         } else {
2475                 uint32_t *hash_key = (uint32_t *)key;
2476                 uint16_t i;
2477
2478                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2479                         i40e_write_rx_ctl(hw, I40E_VFQF_HKEY(i), hash_key[i]);
2480                 I40EVF_WRITE_FLUSH(hw);
2481         }
2482
2483         return ret;
2484 }
2485
2486 static int
2487 i40evf_get_rss_key(struct i40e_vsi *vsi, uint8_t *key, uint8_t *key_len)
2488 {
2489         struct i40e_vf *vf = I40E_VSI_TO_VF(vsi);
2490         struct i40e_hw *hw = I40E_VSI_TO_HW(vsi);
2491         int ret;
2492
2493         if (!key || !key_len)
2494                 return -EINVAL;
2495
2496         if (vf->flags & I40E_FLAG_RSS_AQ_CAPABLE) {
2497                 ret = i40e_aq_get_rss_key(hw, vsi->vsi_id,
2498                         (struct i40e_aqc_get_set_rss_key_data *)key);
2499                 if (ret) {
2500                         PMD_INIT_LOG(ERR, "Failed to get RSS key via AQ");
2501                         return ret;
2502                 }
2503         } else {
2504                 uint32_t *key_dw = (uint32_t *)key;
2505                 uint16_t i;
2506
2507                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2508                         key_dw[i] = i40e_read_rx_ctl(hw, I40E_VFQF_HKEY(i));
2509         }
2510         *key_len = (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t);
2511
2512         return 0;
2513 }
2514
2515 static int
2516 i40evf_hw_rss_hash_set(struct i40e_vf *vf, struct rte_eth_rss_conf *rss_conf)
2517 {
2518         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2519         uint64_t hena;
2520         int ret;
2521
2522         ret = i40evf_set_rss_key(&vf->vsi, rss_conf->rss_key,
2523                                  rss_conf->rss_key_len);
2524         if (ret)
2525                 return ret;
2526
2527         hena = i40e_config_hena(vf->adapter, rss_conf->rss_hf);
2528         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(0), (uint32_t)hena);
2529         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(1), (uint32_t)(hena >> 32));
2530         I40EVF_WRITE_FLUSH(hw);
2531
2532         return 0;
2533 }
2534
2535 static void
2536 i40evf_disable_rss(struct i40e_vf *vf)
2537 {
2538         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2539
2540         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(0), 0);
2541         i40e_write_rx_ctl(hw, I40E_VFQF_HENA(1), 0);
2542         I40EVF_WRITE_FLUSH(hw);
2543 }
2544
2545 static int
2546 i40evf_config_rss(struct i40e_vf *vf)
2547 {
2548         struct i40e_hw *hw = I40E_VF_TO_HW(vf);
2549         struct rte_eth_rss_conf rss_conf;
2550         uint32_t i, j, lut = 0, nb_q = (I40E_VFQF_HLUT_MAX_INDEX + 1) * 4;
2551         uint16_t num;
2552
2553         if (vf->dev_data->dev_conf.rxmode.mq_mode != ETH_MQ_RX_RSS) {
2554                 i40evf_disable_rss(vf);
2555                 PMD_DRV_LOG(DEBUG, "RSS not configured");
2556                 return 0;
2557         }
2558
2559         num = RTE_MIN(vf->dev_data->nb_rx_queues, I40E_MAX_QP_NUM_PER_VF);
2560         /* Fill out the look up table */
2561         for (i = 0, j = 0; i < nb_q; i++, j++) {
2562                 if (j >= num)
2563                         j = 0;
2564                 lut = (lut << 8) | j;
2565                 if ((i & 3) == 3)
2566                         I40E_WRITE_REG(hw, I40E_VFQF_HLUT(i >> 2), lut);
2567         }
2568
2569         rss_conf = vf->dev_data->dev_conf.rx_adv_conf.rss_conf;
2570         if ((rss_conf.rss_hf & vf->adapter->flow_types_mask) == 0) {
2571                 i40evf_disable_rss(vf);
2572                 PMD_DRV_LOG(DEBUG, "No hash flag is set");
2573                 return 0;
2574         }
2575
2576         if (rss_conf.rss_key == NULL || rss_conf.rss_key_len <
2577                 (I40E_VFQF_HKEY_MAX_INDEX + 1) * sizeof(uint32_t)) {
2578                 /* Calculate the default hash key */
2579                 for (i = 0; i <= I40E_VFQF_HKEY_MAX_INDEX; i++)
2580                         rss_key_default[i] = (uint32_t)rte_rand();
2581                 rss_conf.rss_key = (uint8_t *)rss_key_default;
2582                 rss_conf.rss_key_len = (I40E_VFQF_HKEY_MAX_INDEX + 1) *
2583                         sizeof(uint32_t);
2584         }
2585
2586         return i40evf_hw_rss_hash_set(vf, &rss_conf);
2587 }
2588
2589 static int
2590 i40evf_dev_rss_hash_update(struct rte_eth_dev *dev,
2591                            struct rte_eth_rss_conf *rss_conf)
2592 {
2593         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2594         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2595         uint64_t rss_hf = rss_conf->rss_hf & vf->adapter->flow_types_mask;
2596         uint64_t hena;
2597
2598         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2599         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2600
2601         if (!(hena & vf->adapter->pctypes_mask)) { /* RSS disabled */
2602                 if (rss_hf != 0) /* Enable RSS */
2603                         return -EINVAL;
2604                 return 0;
2605         }
2606
2607         /* RSS enabled */
2608         if (rss_hf == 0) /* Disable RSS */
2609                 return -EINVAL;
2610
2611         return i40evf_hw_rss_hash_set(vf, rss_conf);
2612 }
2613
2614 static int
2615 i40evf_dev_rss_hash_conf_get(struct rte_eth_dev *dev,
2616                              struct rte_eth_rss_conf *rss_conf)
2617 {
2618         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2619         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2620         uint64_t hena;
2621
2622         i40evf_get_rss_key(&vf->vsi, rss_conf->rss_key,
2623                            &rss_conf->rss_key_len);
2624
2625         hena = (uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(0));
2626         hena |= ((uint64_t)i40e_read_rx_ctl(hw, I40E_VFQF_HENA(1))) << 32;
2627         rss_conf->rss_hf = i40e_parse_hena(vf->adapter, hena);
2628
2629         return 0;
2630 }
2631
2632 static int
2633 i40evf_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
2634 {
2635         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2636         struct rte_eth_dev_data *dev_data = vf->dev_data;
2637         uint32_t frame_size = mtu + I40E_ETH_OVERHEAD;
2638         int ret = 0;
2639
2640         /* check if mtu is within the allowed range */
2641         if ((mtu < ETHER_MIN_MTU) || (frame_size > I40E_FRAME_SIZE_MAX))
2642                 return -EINVAL;
2643
2644         /* mtu setting is forbidden if port is start */
2645         if (dev_data->dev_started) {
2646                 PMD_DRV_LOG(ERR, "port %d must be stopped before configuration",
2647                             dev_data->port_id);
2648                 return -EBUSY;
2649         }
2650
2651         if (frame_size > ETHER_MAX_LEN)
2652                 dev_data->dev_conf.rxmode.jumbo_frame = 1;
2653         else
2654                 dev_data->dev_conf.rxmode.jumbo_frame = 0;
2655
2656         dev_data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
2657
2658         return ret;
2659 }
2660
2661 static void
2662 i40evf_set_default_mac_addr(struct rte_eth_dev *dev,
2663                             struct ether_addr *mac_addr)
2664 {
2665         struct i40e_vf *vf = I40EVF_DEV_PRIVATE_TO_VF(dev->data->dev_private);
2666         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
2667
2668         if (!is_valid_assigned_ether_addr(mac_addr)) {
2669                 PMD_DRV_LOG(ERR, "Tried to set invalid MAC address.");
2670                 return;
2671         }
2672
2673         if (vf->flags & I40E_FLAG_VF_MAC_BY_PF)
2674                 return;
2675
2676         i40evf_del_mac_addr_by_addr(dev, (struct ether_addr *)hw->mac.addr);
2677
2678         i40evf_add_mac_addr(dev, mac_addr, 0, 0);
2679
2680         ether_addr_copy(mac_addr, (struct ether_addr *)hw->mac.addr);
2681 }