drivers/net/i40e/i40e_pf.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2010-2017 Intel Corporation. All rights reserved.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Intel Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <sys/queue.h>
  35 #include <stdio.h>
  36 #include <errno.h>
  37 #include <stdint.h>
  38 #include <string.h>
  39 #include <unistd.h>
  40 #include <stdarg.h>
  41 #include <inttypes.h>
  42
  43 #include <rte_string_fns.h>
  44 #include <rte_pci.h>
  45 #include <rte_ether.h>
  46 #include <rte_ethdev.h>
  47 #include <rte_memzone.h>
  48 #include <rte_malloc.h>
  49 #include <rte_memcpy.h>
  50
  51 #include "i40e_logs.h"
  52 #include "base/i40e_prototype.h"
  53 #include "base/i40e_adminq_cmd.h"
  54 #include "base/i40e_type.h"
  55 #include "i40e_ethdev.h"
  56 #include "i40e_rxtx.h"
  57 #include "i40e_pf.h"
  58 #include "rte_pmd_i40e.h"
  59
  60 #define I40E_CFG_CRCSTRIP_DEFAULT 1
  61
  62 static int
  63 i40e_pf_host_switch_queues(struct i40e_pf_vf *vf,
  64                            struct i40e_virtchnl_queue_select *qsel,
  65                            bool on);
  66
  67 /**
  68  * Bind PF queues with VSI and VF.
  69  **/
  70 static int
  71 i40e_pf_vf_queues_mapping(struct i40e_pf_vf *vf)
  72 {
  73         int i;
  74         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
  75         uint16_t vsi_id = vf->vsi->vsi_id;
  76         uint16_t vf_id  = vf->vf_idx;
  77         uint16_t nb_qps = vf->vsi->nb_qps;
  78         uint16_t qbase  = vf->vsi->base_queue;
  79         uint16_t q1, q2;
  80         uint32_t val;
  81
  82         /*
  83          * VF should use scatter range queues. So, it needn't
  84          * to set QBASE in this register.
  85          */
  86         i40e_write_rx_ctl(hw, I40E_VSILAN_QBASE(vsi_id),
  87                           I40E_VSILAN_QBASE_VSIQTABLE_ENA_MASK);
  88
  89         /* Set to enable VFLAN_QTABLE[] registers valid */
  90         I40E_WRITE_REG(hw, I40E_VPLAN_MAPENA(vf_id),
  91                 I40E_VPLAN_MAPENA_TXRX_ENA_MASK);
  92
  93         /* map PF queues to VF */
  94         for (i = 0; i < nb_qps; i++) {
  95                 val = ((qbase + i) & I40E_VPLAN_QTABLE_QINDEX_MASK);
  96                 I40E_WRITE_REG(hw, I40E_VPLAN_QTABLE(i, vf_id), val);
  97         }
  98
  99         /* map PF queues to VSI */
 100         for (i = 0; i < I40E_MAX_QP_NUM_PER_VF / 2; i++) {
 101                 if (2 * i > nb_qps - 1)
 102                         q1 = I40E_VSILAN_QTABLE_QINDEX_0_MASK;
 103                 else
 104                         q1 = qbase + 2 * i;
 105
 106                 if (2 * i + 1 > nb_qps - 1)
 107                         q2 = I40E_VSILAN_QTABLE_QINDEX_0_MASK;
 108                 else
 109                         q2 = qbase + 2 * i + 1;
 110
 111                 val = (q2 << I40E_VSILAN_QTABLE_QINDEX_1_SHIFT) + q1;
 112                 i40e_write_rx_ctl(hw, I40E_VSILAN_QTABLE(i, vsi_id), val);
 113         }
 114         I40E_WRITE_FLUSH(hw);
 115
 116         return I40E_SUCCESS;
 117 }
 118
 119
 120 /**
 121  * Proceed VF reset operation.
 122  */
 123 int
 124 i40e_pf_host_vf_reset(struct i40e_pf_vf *vf, bool do_hw_reset)
 125 {
 126         uint32_t val, i;
 127         struct i40e_hw *hw;
 128         struct i40e_pf *pf;
 129         uint16_t vf_id, abs_vf_id, vf_msix_num;
 130         int ret;
 131         struct i40e_virtchnl_queue_select qsel;
 132
 133         if (vf == NULL)
 134                 return -EINVAL;
 135
 136         pf = vf->pf;
 137         hw = I40E_PF_TO_HW(vf->pf);
 138         vf_id = vf->vf_idx;
 139         abs_vf_id = vf_id + hw->func_caps.vf_base_id;
 140
 141         /* Notify VF that we are in VFR progress */
 142         I40E_WRITE_REG(hw, I40E_VFGEN_RSTAT1(vf_id), I40E_VFR_INPROGRESS);
 143
 144         /*
 145          * If require a SW VF reset, a VFLR interrupt will be generated,
 146          * this function will be called again. To avoid it,
 147          * disable interrupt first.
 148          */
 149         if (do_hw_reset) {
 150                 vf->state = I40E_VF_INRESET;
 151                 val = I40E_READ_REG(hw, I40E_VPGEN_VFRTRIG(vf_id));
 152                 val |= I40E_VPGEN_VFRTRIG_VFSWR_MASK;
 153                 I40E_WRITE_REG(hw, I40E_VPGEN_VFRTRIG(vf_id), val);
 154                 I40E_WRITE_FLUSH(hw);
 155         }
 156
 157 #define VFRESET_MAX_WAIT_CNT 100
 158         /* Wait until VF reset is done */
 159         for (i = 0; i < VFRESET_MAX_WAIT_CNT; i++) {
 160                 rte_delay_us(10);
 161                 val = I40E_READ_REG(hw, I40E_VPGEN_VFRSTAT(vf_id));
 162                 if (val & I40E_VPGEN_VFRSTAT_VFRD_MASK)
 163                         break;
 164         }
 165
 166         if (i >= VFRESET_MAX_WAIT_CNT) {
 167                 PMD_DRV_LOG(ERR, "VF reset timeout");
 168                 return -ETIMEDOUT;
 169         }
 170
 171         /* This is not first time to do reset, do cleanup job first */
 172         if (vf->vsi) {
 173                 /* Disable queues */
 174                 memset(&qsel, 0, sizeof(qsel));
 175                 for (i = 0; i < vf->vsi->nb_qps; i++)
 176                         qsel.rx_queues |= 1 << i;
 177                 qsel.tx_queues = qsel.rx_queues;
 178                 ret = i40e_pf_host_switch_queues(vf, &qsel, false);
 179                 if (ret != I40E_SUCCESS) {
 180                         PMD_DRV_LOG(ERR, "Disable VF queues failed");
 181                         return -EFAULT;
 182                 }
 183
 184                 /* Disable VF interrupt setting */
 185                 vf_msix_num = hw->func_caps.num_msix_vectors_vf;
 186                 for (i = 0; i < vf_msix_num; i++) {
 187                         if (!i)
 188                                 val = I40E_VFINT_DYN_CTL0(vf_id);
 189                         else
 190                                 val = I40E_VFINT_DYN_CTLN(((vf_msix_num - 1) *
 191                                                         (vf_id)) + (i - 1));
 192                         I40E_WRITE_REG(hw, val, I40E_VFINT_DYN_CTLN_CLEARPBA_MASK);
 193                 }
 194                 I40E_WRITE_FLUSH(hw);
 195
 196                 /* remove VSI */
 197                 ret = i40e_vsi_release(vf->vsi);
 198                 if (ret != I40E_SUCCESS) {
 199                         PMD_DRV_LOG(ERR, "Release VSI failed");
 200                         return -EFAULT;
 201                 }
 202         }
 203
 204 #define I40E_VF_PCI_ADDR  0xAA
 205 #define I40E_VF_PEND_MASK 0x20
 206         /* Check the pending transactions of this VF */
 207         /* Use absolute VF id, refer to datasheet for details */
 208         I40E_WRITE_REG(hw, I40E_PF_PCI_CIAA, I40E_VF_PCI_ADDR |
 209                 (abs_vf_id << I40E_PF_PCI_CIAA_VF_NUM_SHIFT));
 210         for (i = 0; i < VFRESET_MAX_WAIT_CNT; i++) {
 211                 rte_delay_us(1);
 212                 val = I40E_READ_REG(hw, I40E_PF_PCI_CIAD);
 213                 if ((val & I40E_VF_PEND_MASK) == 0)
 214                         break;
 215         }
 216
 217         if (i >= VFRESET_MAX_WAIT_CNT) {
 218                 PMD_DRV_LOG(ERR, "Wait VF PCI transaction end timeout");
 219                 return -ETIMEDOUT;
 220         }
 221
 222         /* Reset done, Set COMPLETE flag and clear reset bit */
 223         I40E_WRITE_REG(hw, I40E_VFGEN_RSTAT1(vf_id), I40E_VFR_COMPLETED);
 224         val = I40E_READ_REG(hw, I40E_VPGEN_VFRTRIG(vf_id));
 225         val &= ~I40E_VPGEN_VFRTRIG_VFSWR_MASK;
 226         I40E_WRITE_REG(hw, I40E_VPGEN_VFRTRIG(vf_id), val);
 227         vf->reset_cnt++;
 228         I40E_WRITE_FLUSH(hw);
 229
 230         /* Allocate resource again */
 231         if (pf->floating_veb && pf->floating_veb_list[vf_id]) {
 232                 vf->vsi = i40e_vsi_setup(vf->pf, I40E_VSI_SRIOV,
 233                                          NULL, vf->vf_idx);
 234         } else {
 235                 vf->vsi = i40e_vsi_setup(vf->pf, I40E_VSI_SRIOV,
 236                                          vf->pf->main_vsi, vf->vf_idx);
 237         }
 238
 239         if (vf->vsi == NULL) {
 240                 PMD_DRV_LOG(ERR, "Add vsi failed");
 241                 return -EFAULT;
 242         }
 243
 244         ret = i40e_pf_vf_queues_mapping(vf);
 245         if (ret != I40E_SUCCESS) {
 246                 PMD_DRV_LOG(ERR, "queue mapping error");
 247                 i40e_vsi_release(vf->vsi);
 248                 return -EFAULT;
 249         }
 250
 251         I40E_WRITE_REG(hw, I40E_VFGEN_RSTAT1(vf_id), I40E_VFR_VFACTIVE);
 252
 253         return ret;
 254 }
 255
 256 int
 257 i40e_pf_host_send_msg_to_vf(struct i40e_pf_vf *vf,
 258                             uint32_t opcode,
 259                             uint32_t retval,
 260                             uint8_t *msg,
 261                             uint16_t msglen)
 262 {
 263         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 264         uint16_t abs_vf_id = hw->func_caps.vf_base_id + vf->vf_idx;
 265         int ret;
 266
 267         ret = i40e_aq_send_msg_to_vf(hw, abs_vf_id, opcode, retval,
 268                                                 msg, msglen, NULL);
 269         if (ret) {
 270                 PMD_INIT_LOG(ERR, "Fail to send message to VF, err %u",
 271                              hw->aq.asq_last_status);
 272         }
 273
 274         return ret;
 275 }
 276
 277 static void
 278 i40e_pf_host_process_cmd_version(struct i40e_pf_vf *vf, bool b_op)
 279 {
 280         struct i40e_virtchnl_version_info info;
 281
 282         /* Respond like a Linux PF host in order to support both DPDK VF and
 283          * Linux VF driver. The expense is original DPDK host specific feature
 284          * like CFG_VLAN_PVID and CONFIG_VSI_QUEUES_EXT will not available.
 285          *
 286          * DPDK VF also can't identify host driver by version number returned.
 287          * It always assume talking with Linux PF.
 288          */
 289         info.major = I40E_VIRTCHNL_VERSION_MAJOR;
 290         info.minor = I40E_VIRTCHNL_VERSION_MINOR_NO_VF_CAPS;
 291
 292         if (b_op)
 293                 i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_VERSION,
 294                                             I40E_SUCCESS,
 295                                             (uint8_t *)&info,
 296                                             sizeof(info));
 297         else
 298                 i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_VERSION,
 299                                             I40E_NOT_SUPPORTED,
 300                                             (uint8_t *)&info,
 301                                             sizeof(info));
 302 }
 303
 304 static int
 305 i40e_pf_host_process_cmd_reset_vf(struct i40e_pf_vf *vf)
 306 {
 307         i40e_pf_host_vf_reset(vf, 1);
 308
 309         /* No feedback will be sent to VF for VFLR */
 310         return I40E_SUCCESS;
 311 }
 312
 313 static int
 314 i40e_pf_host_process_cmd_get_vf_resource(struct i40e_pf_vf *vf, bool b_op)
 315 {
 316         struct i40e_virtchnl_vf_resource *vf_res = NULL;
 317         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 318         uint32_t len = 0;
 319         int ret = I40E_SUCCESS;
 320
 321         if (!b_op) {
 322                 i40e_pf_host_send_msg_to_vf(vf,
 323                                             I40E_VIRTCHNL_OP_GET_VF_RESOURCES,
 324                                             I40E_NOT_SUPPORTED, NULL, 0);
 325                 return ret;
 326         }
 327
 328         /* only have 1 VSI by default */
 329         len =  sizeof(struct i40e_virtchnl_vf_resource) +
 330                                 I40E_DEFAULT_VF_VSI_NUM *
 331                 sizeof(struct i40e_virtchnl_vsi_resource);
 332
 333         vf_res = rte_zmalloc("i40e_vf_res", len, 0);
 334         if (vf_res == NULL) {
 335                 PMD_DRV_LOG(ERR, "failed to allocate mem");
 336                 ret = I40E_ERR_NO_MEMORY;
 337                 vf_res = NULL;
 338                 len = 0;
 339                 goto send_msg;
 340         }
 341
 342         vf_res->vf_offload_flags = I40E_VIRTCHNL_VF_OFFLOAD_L2 |
 343                                 I40E_VIRTCHNL_VF_OFFLOAD_VLAN;
 344         vf_res->max_vectors = hw->func_caps.num_msix_vectors_vf;
 345         vf_res->num_queue_pairs = vf->vsi->nb_qps;
 346         vf_res->num_vsis = I40E_DEFAULT_VF_VSI_NUM;
 347
 348         /* Change below setting if PF host can support more VSIs for VF */
 349         vf_res->vsi_res[0].vsi_type = I40E_VSI_SRIOV;
 350         vf_res->vsi_res[0].vsi_id = vf->vsi->vsi_id;
 351         vf_res->vsi_res[0].num_queue_pairs = vf->vsi->nb_qps;
 352         ether_addr_copy(&vf->mac_addr,
 353                 (struct ether_addr *)vf_res->vsi_res[0].default_mac_addr);
 354
 355 send_msg:
 356         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_VF_RESOURCES,
 357                                         ret, (uint8_t *)vf_res, len);
 358         rte_free(vf_res);
 359
 360         return ret;
 361 }
 362
 363 static int
 364 i40e_pf_host_hmc_config_rxq(struct i40e_hw *hw,
 365                             struct i40e_pf_vf *vf,
 366                             struct i40e_virtchnl_rxq_info *rxq,
 367                             uint8_t crcstrip)
 368 {
 369         int err = I40E_SUCCESS;
 370         struct i40e_hmc_obj_rxq rx_ctx;
 371         uint16_t abs_queue_id = vf->vsi->base_queue + rxq->queue_id;
 372
 373         /* Clear the context structure first */
 374         memset(&rx_ctx, 0, sizeof(struct i40e_hmc_obj_rxq));
 375         rx_ctx.dbuff = rxq->databuffer_size >> I40E_RXQ_CTX_DBUFF_SHIFT;
 376         rx_ctx.hbuff = rxq->hdr_size >> I40E_RXQ_CTX_HBUFF_SHIFT;
 377         rx_ctx.base = rxq->dma_ring_addr / I40E_QUEUE_BASE_ADDR_UNIT;
 378         rx_ctx.qlen = rxq->ring_len;
 379 #ifndef RTE_LIBRTE_I40E_16BYTE_RX_DESC
 380         rx_ctx.dsize = 1;
 381 #endif
 382
 383         if (rxq->splithdr_enabled) {
 384                 rx_ctx.hsplit_0 = I40E_HEADER_SPLIT_ALL;
 385                 rx_ctx.dtype = i40e_header_split_enabled;
 386         } else {
 387                 rx_ctx.hsplit_0 = I40E_HEADER_SPLIT_NONE;
 388                 rx_ctx.dtype = i40e_header_split_none;
 389         }
 390         rx_ctx.rxmax = rxq->max_pkt_size;
 391         rx_ctx.tphrdesc_ena = 1;
 392         rx_ctx.tphwdesc_ena = 1;
 393         rx_ctx.tphdata_ena = 1;
 394         rx_ctx.tphhead_ena = 1;
 395         rx_ctx.lrxqthresh = 2;
 396         rx_ctx.crcstrip = crcstrip;
 397         rx_ctx.l2tsel = 1;
 398         rx_ctx.prefena = 1;
 399
 400         err = i40e_clear_lan_rx_queue_context(hw, abs_queue_id);
 401         if (err != I40E_SUCCESS)
 402                 return err;
 403         err = i40e_set_lan_rx_queue_context(hw, abs_queue_id, &rx_ctx);
 404
 405         return err;
 406 }
 407
 408 static inline uint8_t
 409 i40e_vsi_get_tc_of_queue(struct i40e_vsi *vsi,
 410                 uint16_t queue_id)
 411 {
 412         struct i40e_aqc_vsi_properties_data *info = &vsi->info;
 413         uint16_t bsf, qp_idx;
 414         uint8_t i;
 415
 416         for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
 417                 if (vsi->enabled_tc & (1 << i)) {
 418                         qp_idx = rte_le_to_cpu_16((info->tc_mapping[i] &
 419                                 I40E_AQ_VSI_TC_QUE_OFFSET_MASK) >>
 420                                 I40E_AQ_VSI_TC_QUE_OFFSET_SHIFT);
 421                         bsf = rte_le_to_cpu_16((info->tc_mapping[i] &
 422                                 I40E_AQ_VSI_TC_QUE_NUMBER_MASK) >>
 423                                 I40E_AQ_VSI_TC_QUE_NUMBER_SHIFT);
 424                         if (queue_id >= qp_idx && queue_id < qp_idx + (1 << bsf))
 425                                 return i;
 426                 }
 427         }
 428         return 0;
 429 }
 430
 431 static int
 432 i40e_pf_host_hmc_config_txq(struct i40e_hw *hw,
 433                             struct i40e_pf_vf *vf,
 434                             struct i40e_virtchnl_txq_info *txq)
 435 {
 436         int err = I40E_SUCCESS;
 437         struct i40e_hmc_obj_txq tx_ctx;
 438         struct i40e_vsi *vsi = vf->vsi;
 439         uint32_t qtx_ctl;
 440         uint16_t abs_queue_id = vsi->base_queue + txq->queue_id;
 441         uint8_t dcb_tc;
 442
 443         /* clear the context structure first */
 444         memset(&tx_ctx, 0, sizeof(tx_ctx));
 445         tx_ctx.base = txq->dma_ring_addr / I40E_QUEUE_BASE_ADDR_UNIT;
 446         tx_ctx.qlen = txq->ring_len;
 447         dcb_tc = i40e_vsi_get_tc_of_queue(vsi, txq->queue_id);
 448         tx_ctx.rdylist = rte_le_to_cpu_16(vsi->info.qs_handle[dcb_tc]);
 449         tx_ctx.head_wb_ena = txq->headwb_enabled;
 450         tx_ctx.head_wb_addr = txq->dma_headwb_addr;
 451
 452         err = i40e_clear_lan_tx_queue_context(hw, abs_queue_id);
 453         if (err != I40E_SUCCESS)
 454                 return err;
 455
 456         err = i40e_set_lan_tx_queue_context(hw, abs_queue_id, &tx_ctx);
 457         if (err != I40E_SUCCESS)
 458                 return err;
 459
 460         /* bind queue with VF function, since TX/QX will appear in pair,
 461          * so only has QTX_CTL to set.
 462          */
 463         qtx_ctl = (I40E_QTX_CTL_VF_QUEUE << I40E_QTX_CTL_PFVF_Q_SHIFT) |
 464                                 ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
 465                                 I40E_QTX_CTL_PF_INDX_MASK) |
 466                                 (((vf->vf_idx + hw->func_caps.vf_base_id) <<
 467                                 I40E_QTX_CTL_VFVM_INDX_SHIFT) &
 468                                 I40E_QTX_CTL_VFVM_INDX_MASK);
 469         I40E_WRITE_REG(hw, I40E_QTX_CTL(abs_queue_id), qtx_ctl);
 470         I40E_WRITE_FLUSH(hw);
 471
 472         return I40E_SUCCESS;
 473 }
 474
 475 static int
 476 i40e_pf_host_process_cmd_config_vsi_queues(struct i40e_pf_vf *vf,
 477                                            uint8_t *msg,
 478                                            uint16_t msglen,
 479                                            bool b_op)
 480 {
 481         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 482         struct i40e_vsi *vsi = vf->vsi;
 483         struct i40e_virtchnl_vsi_queue_config_info *vc_vqci =
 484                 (struct i40e_virtchnl_vsi_queue_config_info *)msg;
 485         struct i40e_virtchnl_queue_pair_info *vc_qpi;
 486         int i, ret = I40E_SUCCESS;
 487
 488         if (!b_op) {
 489                 i40e_pf_host_send_msg_to_vf(vf,
 490                                             I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES,
 491                                             I40E_NOT_SUPPORTED, NULL, 0);
 492                 return ret;
 493         }
 494
 495         if (!msg || vc_vqci->num_queue_pairs > vsi->nb_qps ||
 496                 vc_vqci->num_queue_pairs > I40E_MAX_VSI_QP ||
 497                 msglen < I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqci,
 498                                         vc_vqci->num_queue_pairs)) {
 499                 PMD_DRV_LOG(ERR, "vsi_queue_config_info argument wrong");
 500                 ret = I40E_ERR_PARAM;
 501                 goto send_msg;
 502         }
 503
 504         vc_qpi = vc_vqci->qpair;
 505         for (i = 0; i < vc_vqci->num_queue_pairs; i++) {
 506                 if (vc_qpi[i].rxq.queue_id > vsi->nb_qps - 1 ||
 507                         vc_qpi[i].txq.queue_id > vsi->nb_qps - 1) {
 508                         ret = I40E_ERR_PARAM;
 509                         goto send_msg;
 510                 }
 511
 512                 /*
 513                  * Apply VF RX queue setting to HMC.
 514                  * If the opcode is I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT,
 515                  * then the extra information of
 516                  * 'struct i40e_virtchnl_queue_pair_extra_info' is needed,
 517                  * otherwise set the last parameter to NULL.
 518                  */
 519                 if (i40e_pf_host_hmc_config_rxq(hw, vf, &vc_qpi[i].rxq,
 520                         I40E_CFG_CRCSTRIP_DEFAULT) != I40E_SUCCESS) {
 521                         PMD_DRV_LOG(ERR, "Configure RX queue HMC failed");
 522                         ret = I40E_ERR_PARAM;
 523                         goto send_msg;
 524                 }
 525
 526                 /* Apply VF TX queue setting to HMC */
 527                 if (i40e_pf_host_hmc_config_txq(hw, vf,
 528                         &vc_qpi[i].txq) != I40E_SUCCESS) {
 529                         PMD_DRV_LOG(ERR, "Configure TX queue HMC failed");
 530                         ret = I40E_ERR_PARAM;
 531                         goto send_msg;
 532                 }
 533         }
 534
 535 send_msg:
 536         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES,
 537                                                         ret, NULL, 0);
 538
 539         return ret;
 540 }
 541
 542 static int
 543 i40e_pf_host_process_cmd_config_vsi_queues_ext(struct i40e_pf_vf *vf,
 544                                                uint8_t *msg,
 545                                                uint16_t msglen,
 546                                                bool b_op)
 547 {
 548         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 549         struct i40e_vsi *vsi = vf->vsi;
 550         struct i40e_virtchnl_vsi_queue_config_ext_info *vc_vqcei =
 551                 (struct i40e_virtchnl_vsi_queue_config_ext_info *)msg;
 552         struct i40e_virtchnl_queue_pair_ext_info *vc_qpei;
 553         int i, ret = I40E_SUCCESS;
 554
 555         if (!b_op) {
 556                 i40e_pf_host_send_msg_to_vf(
 557                         vf,
 558                         I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT,
 559                         I40E_NOT_SUPPORTED, NULL, 0);
 560                 return ret;
 561         }
 562
 563         if (!msg || vc_vqcei->num_queue_pairs > vsi->nb_qps ||
 564                 vc_vqcei->num_queue_pairs > I40E_MAX_VSI_QP ||
 565                 msglen < I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqcei,
 566                                         vc_vqcei->num_queue_pairs)) {
 567                 PMD_DRV_LOG(ERR, "vsi_queue_config_ext_info argument wrong");
 568                 ret = I40E_ERR_PARAM;
 569                 goto send_msg;
 570         }
 571
 572         vc_qpei = vc_vqcei->qpair;
 573         for (i = 0; i < vc_vqcei->num_queue_pairs; i++) {
 574                 if (vc_qpei[i].rxq.queue_id > vsi->nb_qps - 1 ||
 575                         vc_qpei[i].txq.queue_id > vsi->nb_qps - 1) {
 576                         ret = I40E_ERR_PARAM;
 577                         goto send_msg;
 578                 }
 579                 /*
 580                  * Apply VF RX queue setting to HMC.
 581                  * If the opcode is I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT,
 582                  * then the extra information of
 583                  * 'struct i40e_virtchnl_queue_pair_ext_info' is needed,
 584                  * otherwise set the last parameter to NULL.
 585                  */
 586                 if (i40e_pf_host_hmc_config_rxq(hw, vf, &vc_qpei[i].rxq,
 587                         vc_qpei[i].rxq_ext.crcstrip) != I40E_SUCCESS) {
 588                         PMD_DRV_LOG(ERR, "Configure RX queue HMC failed");
 589                         ret = I40E_ERR_PARAM;
 590                         goto send_msg;
 591                 }
 592
 593                 /* Apply VF TX queue setting to HMC */
 594                 if (i40e_pf_host_hmc_config_txq(hw, vf, &vc_qpei[i].txq) !=
 595                                                         I40E_SUCCESS) {
 596                         PMD_DRV_LOG(ERR, "Configure TX queue HMC failed");
 597                         ret = I40E_ERR_PARAM;
 598                         goto send_msg;
 599                 }
 600         }
 601
 602 send_msg:
 603         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT,
 604                                                                 ret, NULL, 0);
 605
 606         return ret;
 607 }
 608
 609 static void
 610 i40e_pf_config_irq_link_list(struct i40e_pf_vf *vf,
 611                               struct i40e_virtchnl_vector_map *vvm)
 612 {
 613 #define BITS_PER_CHAR 8
 614         uint64_t linklistmap = 0, tempmap;
 615         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 616         uint16_t qid;
 617         bool b_first_q = true;
 618         enum i40e_queue_type qtype;
 619         uint16_t vector_id;
 620         uint32_t reg, reg_idx;
 621         uint16_t itr_idx = 0, i;
 622
 623         vector_id = vvm->vector_id;
 624         /* setup the head */
 625         if (!vector_id)
 626                 reg_idx = I40E_VPINT_LNKLST0(vf->vf_idx);
 627         else
 628                 reg_idx = I40E_VPINT_LNKLSTN(
 629                 ((hw->func_caps.num_msix_vectors_vf - 1) * vf->vf_idx)
 630                 + (vector_id - 1));
 631
 632         if (vvm->rxq_map == 0 && vvm->txq_map == 0) {
 633                 I40E_WRITE_REG(hw, reg_idx,
 634                         I40E_VPINT_LNKLST0_FIRSTQ_INDX_MASK);
 635                 goto cfg_irq_done;
 636         }
 637
 638         /* sort all rx and tx queues */
 639         tempmap = vvm->rxq_map;
 640         for (i = 0; i < sizeof(vvm->rxq_map) * BITS_PER_CHAR; i++) {
 641                 if (tempmap & 0x1)
 642                         linklistmap |= (1 << (2 * i));
 643                 tempmap >>= 1;
 644         }
 645
 646         tempmap = vvm->txq_map;
 647         for (i = 0; i < sizeof(vvm->txq_map) * BITS_PER_CHAR; i++) {
 648                 if (tempmap & 0x1)
 649                         linklistmap |= (1 << (2 * i + 1));
 650                 tempmap >>= 1;
 651         }
 652
 653         /* Link all rx and tx queues into a chained list */
 654         tempmap = linklistmap;
 655         i = 0;
 656         b_first_q = true;
 657         do {
 658                 if (tempmap & 0x1) {
 659                         qtype = (enum i40e_queue_type)(i % 2);
 660                         qid = vf->vsi->base_queue + i / 2;
 661                         if (b_first_q) {
 662                                 /* This is header */
 663                                 b_first_q = false;
 664                                 reg = ((qtype <<
 665                                 I40E_VPINT_LNKLSTN_FIRSTQ_TYPE_SHIFT)
 666                                 | qid);
 667                         } else {
 668                                 /* element in the link list */
 669                                 reg = (vector_id) |
 670                                 (qtype << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT) |
 671                                 (qid << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |
 672                                 BIT(I40E_QINT_RQCTL_CAUSE_ENA_SHIFT) |
 673                                 (itr_idx << I40E_QINT_RQCTL_ITR_INDX_SHIFT);
 674                         }
 675                         I40E_WRITE_REG(hw, reg_idx, reg);
 676                         /* find next register to program */
 677                         switch (qtype) {
 678                         case I40E_QUEUE_TYPE_RX:
 679                                 reg_idx = I40E_QINT_RQCTL(qid);
 680                                 itr_idx = vvm->rxitr_idx;
 681                                 break;
 682                         case I40E_QUEUE_TYPE_TX:
 683                                 reg_idx = I40E_QINT_TQCTL(qid);
 684                                 itr_idx = vvm->txitr_idx;
 685                                 break;
 686                         default:
 687                                 break;
 688                         }
 689                 }
 690                 i++;
 691                 tempmap >>= 1;
 692         } while (tempmap);
 693
 694         /* Terminate the link list */
 695         reg = (vector_id) |
 696                 (0 << I40E_QINT_RQCTL_NEXTQ_TYPE_SHIFT) |
 697                 (0x7FF << I40E_QINT_RQCTL_NEXTQ_INDX_SHIFT) |
 698                 BIT(I40E_QINT_RQCTL_CAUSE_ENA_SHIFT) |
 699                 (itr_idx << I40E_QINT_RQCTL_ITR_INDX_SHIFT);
 700         I40E_WRITE_REG(hw, reg_idx, reg);
 701
 702 cfg_irq_done:
 703         I40E_WRITE_FLUSH(hw);
 704 }
 705
 706 static int
 707 i40e_pf_host_process_cmd_config_irq_map(struct i40e_pf_vf *vf,
 708                                         uint8_t *msg, uint16_t msglen,
 709                                         bool b_op)
 710 {
 711         int ret = I40E_SUCCESS;
 712         struct i40e_pf *pf = vf->pf;
 713         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 714         struct i40e_virtchnl_irq_map_info *irqmap =
 715             (struct i40e_virtchnl_irq_map_info *)msg;
 716         struct i40e_virtchnl_vector_map *map;
 717         int i;
 718         uint16_t vector_id;
 719         unsigned long qbit_max;
 720
 721         if (!b_op) {
 722                 i40e_pf_host_send_msg_to_vf(
 723                         vf,
 724                         I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP,
 725                         I40E_NOT_SUPPORTED, NULL, 0);
 726                 return ret;
 727         }
 728
 729         if (msg == NULL || msglen < sizeof(struct i40e_virtchnl_irq_map_info)) {
 730                 PMD_DRV_LOG(ERR, "buffer too short");
 731                 ret = I40E_ERR_PARAM;
 732                 goto send_msg;
 733         }
 734
 735         /* PF host will support both DPDK VF or Linux VF driver, identify by
 736          * number of vectors requested.
 737          */
 738
 739         /* DPDK VF only requires single vector */
 740         if (irqmap->num_vectors == 1) {
 741                 /* This MSIX intr store the intr in VF range */
 742                 vf->vsi->msix_intr = irqmap->vecmap[0].vector_id;
 743                 vf->vsi->nb_msix = irqmap->num_vectors;
 744                 vf->vsi->nb_used_qps = vf->vsi->nb_qps;
 745
 746                 /* Don't care how the TX/RX queue mapping with this vector.
 747                  * Link all VF RX queues together. Only did mapping work.
 748                  * VF can disable/enable the intr by itself.
 749                  */
 750                 i40e_vsi_queues_bind_intr(vf->vsi);
 751                 goto send_msg;
 752         }
 753
 754         /* Then, it's Linux VF driver */
 755         qbit_max = 1 << pf->vf_nb_qp_max;
 756         for (i = 0; i < irqmap->num_vectors; i++) {
 757                 map = &irqmap->vecmap[i];
 758
 759                 vector_id = map->vector_id;
 760                 /* validate msg params */
 761                 if (vector_id >= hw->func_caps.num_msix_vectors_vf) {
 762                         ret = I40E_ERR_PARAM;
 763                         goto send_msg;
 764                 }
 765
 766                 if ((map->rxq_map < qbit_max) && (map->txq_map < qbit_max)) {
 767                         i40e_pf_config_irq_link_list(vf, map);
 768                 } else {
 769                         /* configured queue size excceed limit */
 770                         ret = I40E_ERR_PARAM;
 771                         goto send_msg;
 772                 }
 773         }
 774
 775 send_msg:
 776         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP,
 777                                                         ret, NULL, 0);
 778
 779         return ret;
 780 }
 781
 782 static int
 783 i40e_pf_host_switch_queues(struct i40e_pf_vf *vf,
 784                            struct i40e_virtchnl_queue_select *qsel,
 785                            bool on)
 786 {
 787         int ret = I40E_SUCCESS;
 788         int i;
 789         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 790         uint16_t baseq = vf->vsi->base_queue;
 791
 792         if (qsel->rx_queues + qsel->tx_queues == 0)
 793                 return I40E_ERR_PARAM;
 794
 795         /* always enable RX first and disable last */
 796         /* Enable RX if it's enable */
 797         if (on) {
 798                 for (i = 0; i < I40E_MAX_QP_NUM_PER_VF; i++)
 799                         if (qsel->rx_queues & (1 << i)) {
 800                                 ret = i40e_switch_rx_queue(hw, baseq + i, on);
 801                                 if (ret != I40E_SUCCESS)
 802                                         return ret;
 803                         }
 804         }
 805
 806         /* Enable/Disable TX */
 807         for (i = 0; i < I40E_MAX_QP_NUM_PER_VF; i++)
 808                 if (qsel->tx_queues & (1 << i)) {
 809                         ret = i40e_switch_tx_queue(hw, baseq + i, on);
 810                         if (ret != I40E_SUCCESS)
 811                                 return ret;
 812                 }
 813
 814         /* disable RX last if it's disable */
 815         if (!on) {
 816                 /* disable RX */
 817                 for (i = 0; i < I40E_MAX_QP_NUM_PER_VF; i++)
 818                         if (qsel->rx_queues & (1 << i)) {
 819                                 ret = i40e_switch_rx_queue(hw, baseq + i, on);
 820                                 if (ret != I40E_SUCCESS)
 821                                         return ret;
 822                         }
 823         }
 824
 825         return ret;
 826 }
 827
 828 static int
 829 i40e_pf_host_process_cmd_enable_queues(struct i40e_pf_vf *vf,
 830                                        uint8_t *msg,
 831                                        uint16_t msglen)
 832 {
 833         int ret = I40E_SUCCESS;
 834         struct i40e_virtchnl_queue_select *q_sel =
 835                 (struct i40e_virtchnl_queue_select *)msg;
 836
 837         if (msg == NULL || msglen != sizeof(*q_sel)) {
 838                 ret = I40E_ERR_PARAM;
 839                 goto send_msg;
 840         }
 841         ret = i40e_pf_host_switch_queues(vf, q_sel, true);
 842
 843 send_msg:
 844         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_ENABLE_QUEUES,
 845                                                         ret, NULL, 0);
 846
 847         return ret;
 848 }
 849
 850 static int
 851 i40e_pf_host_process_cmd_disable_queues(struct i40e_pf_vf *vf,
 852                                         uint8_t *msg,
 853                                         uint16_t msglen,
 854                                         bool b_op)
 855 {
 856         int ret = I40E_SUCCESS;
 857         struct i40e_virtchnl_queue_select *q_sel =
 858                 (struct i40e_virtchnl_queue_select *)msg;
 859
 860         if (!b_op) {
 861                 i40e_pf_host_send_msg_to_vf(
 862                         vf,
 863                         I40E_VIRTCHNL_OP_DISABLE_QUEUES,
 864                         I40E_NOT_SUPPORTED, NULL, 0);
 865                 return ret;
 866         }
 867
 868         if (msg == NULL || msglen != sizeof(*q_sel)) {
 869                 ret = I40E_ERR_PARAM;
 870                 goto send_msg;
 871         }
 872         ret = i40e_pf_host_switch_queues(vf, q_sel, false);
 873
 874 send_msg:
 875         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_DISABLE_QUEUES,
 876                                                         ret, NULL, 0);
 877
 878         return ret;
 879 }
 880
 881
 882 static int
 883 i40e_pf_host_process_cmd_add_ether_address(struct i40e_pf_vf *vf,
 884                                            uint8_t *msg,
 885                                            uint16_t msglen,
 886                                            bool b_op)
 887 {
 888         int ret = I40E_SUCCESS;
 889         struct i40e_virtchnl_ether_addr_list *addr_list =
 890                         (struct i40e_virtchnl_ether_addr_list *)msg;
 891         struct i40e_mac_filter_info filter;
 892         int i;
 893         struct ether_addr *mac;
 894
 895         if (!b_op) {
 896                 i40e_pf_host_send_msg_to_vf(
 897                         vf,
 898                         I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS,
 899                         I40E_NOT_SUPPORTED, NULL, 0);
 900                 return ret;
 901         }
 902
 903         memset(&filter, 0 , sizeof(struct i40e_mac_filter_info));
 904
 905         if (msg == NULL || msglen <= sizeof(*addr_list)) {
 906                 PMD_DRV_LOG(ERR, "add_ether_address argument too short");
 907                 ret = I40E_ERR_PARAM;
 908                 goto send_msg;
 909         }
 910
 911         for (i = 0; i < addr_list->num_elements; i++) {
 912                 mac = (struct ether_addr *)(addr_list->list[i].addr);
 913                 (void)rte_memcpy(&filter.mac_addr, mac, ETHER_ADDR_LEN);
 914                 filter.filter_type = RTE_MACVLAN_PERFECT_MATCH;
 915                 if (is_zero_ether_addr(mac) ||
 916                     i40e_vsi_add_mac(vf->vsi, &filter)) {
 917                         ret = I40E_ERR_INVALID_MAC_ADDR;
 918                         goto send_msg;
 919                 }
 920         }
 921
 922 send_msg:
 923         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS,
 924                                                         ret, NULL, 0);
 925
 926         return ret;
 927 }
 928
 929 static int
 930 i40e_pf_host_process_cmd_del_ether_address(struct i40e_pf_vf *vf,
 931                                            uint8_t *msg,
 932                                            uint16_t msglen,
 933                                            bool b_op)
 934 {
 935         int ret = I40E_SUCCESS;
 936         struct i40e_virtchnl_ether_addr_list *addr_list =
 937                 (struct i40e_virtchnl_ether_addr_list *)msg;
 938         int i;
 939         struct ether_addr *mac;
 940
 941         if (!b_op) {
 942                 i40e_pf_host_send_msg_to_vf(
 943                         vf,
 944                         I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS,
 945                         I40E_NOT_SUPPORTED, NULL, 0);
 946                 return ret;
 947         }
 948
 949         if (msg == NULL || msglen <= sizeof(*addr_list)) {
 950                 PMD_DRV_LOG(ERR, "delete_ether_address argument too short");
 951                 ret = I40E_ERR_PARAM;
 952                 goto send_msg;
 953         }
 954
 955         for (i = 0; i < addr_list->num_elements; i++) {
 956                 mac = (struct ether_addr *)(addr_list->list[i].addr);
 957                 if(is_zero_ether_addr(mac) ||
 958                         i40e_vsi_delete_mac(vf->vsi, mac)) {
 959                         ret = I40E_ERR_INVALID_MAC_ADDR;
 960                         goto send_msg;
 961                 }
 962         }
 963
 964 send_msg:
 965         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS,
 966                                                         ret, NULL, 0);
 967
 968         return ret;
 969 }
 970
 971 static int
 972 i40e_pf_host_process_cmd_add_vlan(struct i40e_pf_vf *vf,
 973                                 uint8_t *msg, uint16_t msglen,
 974                                 bool b_op)
 975 {
 976         int ret = I40E_SUCCESS;
 977         struct i40e_virtchnl_vlan_filter_list *vlan_filter_list =
 978                 (struct i40e_virtchnl_vlan_filter_list *)msg;
 979         int i;
 980         uint16_t *vid;
 981
 982         if (!b_op) {
 983                 i40e_pf_host_send_msg_to_vf(
 984                         vf,
 985                         I40E_VIRTCHNL_OP_ADD_VLAN,
 986                         I40E_NOT_SUPPORTED, NULL, 0);
 987                 return ret;
 988         }
 989
 990         if (msg == NULL || msglen <= sizeof(*vlan_filter_list)) {
 991                 PMD_DRV_LOG(ERR, "add_vlan argument too short");
 992                 ret = I40E_ERR_PARAM;
 993                 goto send_msg;
 994         }
 995
 996         vid = vlan_filter_list->vlan_id;
 997
 998         for (i = 0; i < vlan_filter_list->num_elements; i++) {
 999                 ret = i40e_vsi_add_vlan(vf->vsi, vid[i]);
1000                 if(ret != I40E_SUCCESS)
1001                         goto send_msg;
1002         }
1003
1004 send_msg:
1005         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_ADD_VLAN,
1006                                                 ret, NULL, 0);
1007
1008         return ret;
1009 }
1010
1011 static int
1012 i40e_pf_host_process_cmd_del_vlan(struct i40e_pf_vf *vf,
1013                                   uint8_t *msg,
1014                                   uint16_t msglen,
1015                                   bool b_op)
1016 {
1017         int ret = I40E_SUCCESS;
1018         struct i40e_virtchnl_vlan_filter_list *vlan_filter_list =
1019                         (struct i40e_virtchnl_vlan_filter_list *)msg;
1020         int i;
1021         uint16_t *vid;
1022
1023         if (!b_op) {
1024                 i40e_pf_host_send_msg_to_vf(
1025                         vf,
1026                         I40E_VIRTCHNL_OP_DEL_VLAN,
1027                         I40E_NOT_SUPPORTED, NULL, 0);
1028                 return ret;
1029         }
1030
1031         if (msg == NULL || msglen <= sizeof(*vlan_filter_list)) {
1032                 PMD_DRV_LOG(ERR, "delete_vlan argument too short");
1033                 ret = I40E_ERR_PARAM;
1034                 goto send_msg;
1035         }
1036
1037         vid = vlan_filter_list->vlan_id;
1038         for (i = 0; i < vlan_filter_list->num_elements; i++) {
1039                 ret = i40e_vsi_delete_vlan(vf->vsi, vid[i]);
1040                 if(ret != I40E_SUCCESS)
1041                         goto send_msg;
1042         }
1043
1044 send_msg:
1045         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_DEL_VLAN,
1046                                                 ret, NULL, 0);
1047
1048         return ret;
1049 }
1050
1051 static int
1052 i40e_pf_host_process_cmd_config_promisc_mode(
1053                                         struct i40e_pf_vf *vf,
1054                                         uint8_t *msg,
1055                                         uint16_t msglen,
1056                                         bool b_op)
1057 {
1058         int ret = I40E_SUCCESS;
1059         struct i40e_virtchnl_promisc_info *promisc =
1060                                 (struct i40e_virtchnl_promisc_info *)msg;
1061         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
1062         bool unicast = FALSE, multicast = FALSE;
1063
1064         if (!b_op) {
1065                 i40e_pf_host_send_msg_to_vf(
1066                         vf,
1067                         I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE,
1068                         I40E_NOT_SUPPORTED, NULL, 0);
1069                 return ret;
1070         }
1071
1072         if (msg == NULL || msglen != sizeof(*promisc)) {
1073                 ret = I40E_ERR_PARAM;
1074                 goto send_msg;
1075         }
1076
1077         if (promisc->flags & I40E_FLAG_VF_UNICAST_PROMISC)
1078                 unicast = TRUE;
1079         ret = i40e_aq_set_vsi_unicast_promiscuous(hw,
1080                         vf->vsi->seid, unicast, NULL, true);
1081         if (ret != I40E_SUCCESS)
1082                 goto send_msg;
1083
1084         if (promisc->flags & I40E_FLAG_VF_MULTICAST_PROMISC)
1085                 multicast = TRUE;
1086         ret = i40e_aq_set_vsi_multicast_promiscuous(hw, vf->vsi->seid,
1087                                                 multicast, NULL);
1088
1089 send_msg:
1090         i40e_pf_host_send_msg_to_vf(vf,
1091                 I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE, ret, NULL, 0);
1092
1093         return ret;
1094 }
1095
1096 static int
1097 i40e_pf_host_process_cmd_get_stats(struct i40e_pf_vf *vf, bool b_op)
1098 {
1099         i40e_update_vsi_stats(vf->vsi);
1100
1101         if (b_op)
1102                 i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_STATS,
1103                                             I40E_SUCCESS,
1104                                             (uint8_t *)&vf->vsi->eth_stats,
1105                                             sizeof(vf->vsi->eth_stats));
1106         else
1107                 i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_STATS,
1108                                             I40E_NOT_SUPPORTED,
1109                                             (uint8_t *)&vf->vsi->eth_stats,
1110                                             sizeof(vf->vsi->eth_stats));
1111
1112         return I40E_SUCCESS;
1113 }
1114
1115 static int
1116 i40e_pf_host_process_cmd_cfg_vlan_offload(
1117                                         struct i40e_pf_vf *vf,
1118                                         uint8_t *msg,
1119                                         uint16_t msglen,
1120                                         bool b_op)
1121 {
1122         int ret = I40E_SUCCESS;
1123         struct i40e_virtchnl_vlan_offload_info *offload =
1124                         (struct i40e_virtchnl_vlan_offload_info *)msg;
1125
1126         if (!b_op) {
1127                 i40e_pf_host_send_msg_to_vf(
1128                         vf,
1129                         I40E_VIRTCHNL_OP_CFG_VLAN_OFFLOAD,
1130                         I40E_NOT_SUPPORTED, NULL, 0);
1131                 return ret;
1132         }
1133
1134         if (msg == NULL || msglen != sizeof(*offload)) {
1135                 ret = I40E_ERR_PARAM;
1136                 goto send_msg;
1137         }
1138
1139         ret = i40e_vsi_config_vlan_stripping(vf->vsi,
1140                                                 !!offload->enable_vlan_strip);
1141         if (ret != 0)
1142                 PMD_DRV_LOG(ERR, "Failed to configure vlan stripping");
1143
1144 send_msg:
1145         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_CFG_VLAN_OFFLOAD,
1146                                         ret, NULL, 0);
1147
1148         return ret;
1149 }
1150
1151 static int
1152 i40e_pf_host_process_cmd_cfg_pvid(struct i40e_pf_vf *vf,
1153                                         uint8_t *msg,
1154                                         uint16_t msglen,
1155                                         bool b_op)
1156 {
1157         int ret = I40E_SUCCESS;
1158         struct i40e_virtchnl_pvid_info  *tpid_info =
1159                         (struct i40e_virtchnl_pvid_info *)msg;
1160
1161         if (!b_op) {
1162                 i40e_pf_host_send_msg_to_vf(
1163                         vf,
1164                         I40E_VIRTCHNL_OP_CFG_VLAN_PVID,
1165                         I40E_NOT_SUPPORTED, NULL, 0);
1166                 return ret;
1167         }
1168
1169         if (msg == NULL || msglen != sizeof(*tpid_info)) {
1170                 ret = I40E_ERR_PARAM;
1171                 goto send_msg;
1172         }
1173
1174         ret = i40e_vsi_vlan_pvid_set(vf->vsi, &tpid_info->info);
1175
1176 send_msg:
1177         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_CFG_VLAN_PVID,
1178                                         ret, NULL, 0);
1179
1180         return ret;
1181 }
1182
1183 void
1184 i40e_notify_vf_link_status(struct rte_eth_dev *dev, struct i40e_pf_vf *vf)
1185 {
1186         struct i40e_virtchnl_pf_event event;
1187
1188         event.event = I40E_VIRTCHNL_EVENT_LINK_CHANGE;
1189         event.event_data.link_event.link_status =
1190                 dev->data->dev_link.link_status;
1191
1192         /* need to convert the ETH_SPEED_xxx into I40E_LINK_SPEED_xxx */
1193         switch (dev->data->dev_link.link_speed) {
1194         case ETH_SPEED_NUM_100M:
1195                 event.event_data.link_event.link_speed = I40E_LINK_SPEED_100MB;
1196                 break;
1197         case ETH_SPEED_NUM_1G:
1198                 event.event_data.link_event.link_speed = I40E_LINK_SPEED_1GB;
1199                 break;
1200         case ETH_SPEED_NUM_10G:
1201                 event.event_data.link_event.link_speed = I40E_LINK_SPEED_10GB;
1202                 break;
1203         case ETH_SPEED_NUM_20G:
1204                 event.event_data.link_event.link_speed = I40E_LINK_SPEED_20GB;
1205                 break;
1206         case ETH_SPEED_NUM_25G:
1207                 event.event_data.link_event.link_speed = I40E_LINK_SPEED_25GB;
1208                 break;
1209         case ETH_SPEED_NUM_40G:
1210                 event.event_data.link_event.link_speed = I40E_LINK_SPEED_40GB;
1211                 break;
1212         default:
1213                 event.event_data.link_event.link_speed =
1214                         I40E_LINK_SPEED_UNKNOWN;
1215                 break;
1216         }
1217
1218         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_EVENT,
1219                 I40E_SUCCESS, (uint8_t *)&event, sizeof(event));
1220 }
1221
1222 void
1223 i40e_pf_host_handle_vf_msg(struct rte_eth_dev *dev,
1224                            uint16_t abs_vf_id, uint32_t opcode,
1225                            __rte_unused uint32_t retval,
1226                            uint8_t *msg,
1227                            uint16_t msglen)
1228 {
1229         struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
1230         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
1231         struct i40e_pf_vf *vf;
1232         /* AdminQ will pass absolute VF id, transfer to internal vf id */
1233         uint16_t vf_id = abs_vf_id - hw->func_caps.vf_base_id;
1234         struct rte_pmd_i40e_mb_event_param cb_param;
1235         bool b_op = TRUE;
1236
1237         if (vf_id > pf->vf_num - 1 || !pf->vfs) {
1238                 PMD_DRV_LOG(ERR, "invalid argument");
1239                 return;
1240         }
1241
1242         vf = &pf->vfs[vf_id];
1243         if (!vf->vsi) {
1244                 PMD_DRV_LOG(ERR, "NO VSI associated with VF found");
1245                 i40e_pf_host_send_msg_to_vf(vf, opcode,
1246                         I40E_ERR_NO_AVAILABLE_VSI, NULL, 0);
1247                 return;
1248         }
1249
1250         /**
1251          * initialise structure to send to user application
1252          * will return response from user in retval field
1253          */
1254         cb_param.retval = RTE_PMD_I40E_MB_EVENT_PROCEED;
1255         cb_param.vfid = vf_id;
1256         cb_param.msg_type = opcode;
1257         cb_param.msg = (void *)msg;
1258         cb_param.msglen = msglen;
1259
1260         /**
1261          * Ask user application if we're allowed to perform those functions.
1262          * If we get cb_param.retval == RTE_PMD_I40E_MB_EVENT_PROCEED,
1263          * then business as usual.
1264          * If RTE_PMD_I40E_MB_EVENT_NOOP_ACK or RTE_PMD_I40E_MB_EVENT_NOOP_NACK,
1265          * do nothing and send not_supported to VF. As PF must send a response
1266          * to VF and ACK/NACK is not defined.
1267          */
1268         _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_VF_MBOX, &cb_param);
1269         if (cb_param.retval != RTE_PMD_I40E_MB_EVENT_PROCEED) {
1270                 PMD_DRV_LOG(WARNING, "VF to PF message(%d) is not permitted!",
1271                             opcode);
1272                 b_op = FALSE;
1273         }
1274
1275         switch (opcode) {
1276         case I40E_VIRTCHNL_OP_VERSION :
1277                 PMD_DRV_LOG(INFO, "OP_VERSION received");
1278                 i40e_pf_host_process_cmd_version(vf, b_op);
1279                 break;
1280         case I40E_VIRTCHNL_OP_RESET_VF :
1281                 PMD_DRV_LOG(INFO, "OP_RESET_VF received");
1282                 i40e_pf_host_process_cmd_reset_vf(vf);
1283                 break;
1284         case I40E_VIRTCHNL_OP_GET_VF_RESOURCES:
1285                 PMD_DRV_LOG(INFO, "OP_GET_VF_RESOURCES received");
1286                 i40e_pf_host_process_cmd_get_vf_resource(vf, b_op);
1287                 break;
1288         case I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES:
1289                 PMD_DRV_LOG(INFO, "OP_CONFIG_VSI_QUEUES received");
1290                 i40e_pf_host_process_cmd_config_vsi_queues(vf, msg,
1291                                                            msglen, b_op);
1292                 break;
1293         case I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT:
1294                 PMD_DRV_LOG(INFO, "OP_CONFIG_VSI_QUEUES_EXT received");
1295                 i40e_pf_host_process_cmd_config_vsi_queues_ext(vf, msg,
1296                                                                msglen, b_op);
1297                 break;
1298         case I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP:
1299                 PMD_DRV_LOG(INFO, "OP_CONFIG_IRQ_MAP received");
1300                 i40e_pf_host_process_cmd_config_irq_map(vf, msg, msglen, b_op);
1301                 break;
1302         case I40E_VIRTCHNL_OP_ENABLE_QUEUES:
1303                 PMD_DRV_LOG(INFO, "OP_ENABLE_QUEUES received");
1304                 if (b_op) {
1305                         i40e_pf_host_process_cmd_enable_queues(vf, msg, msglen);
1306                         i40e_notify_vf_link_status(dev, vf);
1307                 } else {
1308                         i40e_pf_host_send_msg_to_vf(
1309                                 vf, I40E_VIRTCHNL_OP_ENABLE_QUEUES,
1310                                 I40E_NOT_SUPPORTED, NULL, 0);
1311                 }
1312                 break;
1313         case I40E_VIRTCHNL_OP_DISABLE_QUEUES:
1314                 PMD_DRV_LOG(INFO, "OP_DISABLE_QUEUE received");
1315                 i40e_pf_host_process_cmd_disable_queues(vf, msg, msglen, b_op);
1316                 break;
1317         case I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS:
1318                 PMD_DRV_LOG(INFO, "OP_ADD_ETHER_ADDRESS received");
1319                 i40e_pf_host_process_cmd_add_ether_address(vf, msg,
1320                                                            msglen, b_op);
1321                 break;
1322         case I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS:
1323                 PMD_DRV_LOG(INFO, "OP_DEL_ETHER_ADDRESS received");
1324                 i40e_pf_host_process_cmd_del_ether_address(vf, msg,
1325                                                            msglen, b_op);
1326                 break;
1327         case I40E_VIRTCHNL_OP_ADD_VLAN:
1328                 PMD_DRV_LOG(INFO, "OP_ADD_VLAN received");
1329                 i40e_pf_host_process_cmd_add_vlan(vf, msg, msglen, b_op);
1330                 break;
1331         case I40E_VIRTCHNL_OP_DEL_VLAN:
1332                 PMD_DRV_LOG(INFO, "OP_DEL_VLAN received");
1333                 i40e_pf_host_process_cmd_del_vlan(vf, msg, msglen, b_op);
1334                 break;
1335         case I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE:
1336                 PMD_DRV_LOG(INFO, "OP_CONFIG_PROMISCUOUS_MODE received");
1337                 i40e_pf_host_process_cmd_config_promisc_mode(vf, msg,
1338                                                              msglen, b_op);
1339                 break;
1340         case I40E_VIRTCHNL_OP_GET_STATS:
1341                 PMD_DRV_LOG(INFO, "OP_GET_STATS received");
1342                 i40e_pf_host_process_cmd_get_stats(vf, b_op);
1343                 break;
1344         case I40E_VIRTCHNL_OP_CFG_VLAN_OFFLOAD:
1345                 PMD_DRV_LOG(INFO, "OP_CFG_VLAN_OFFLOAD received");
1346                 i40e_pf_host_process_cmd_cfg_vlan_offload(vf, msg,
1347                                                           msglen, b_op);
1348                 break;
1349         case I40E_VIRTCHNL_OP_CFG_VLAN_PVID:
1350                 PMD_DRV_LOG(INFO, "OP_CFG_VLAN_PVID received");
1351                 i40e_pf_host_process_cmd_cfg_pvid(vf, msg, msglen, b_op);
1352                 break;
1353         /* Don't add command supported below, which will
1354          * return an error code.
1355          */
1356         default:
1357                 PMD_DRV_LOG(ERR, "%u received, not supported", opcode);
1358                 i40e_pf_host_send_msg_to_vf(vf, opcode, I40E_ERR_PARAM,
1359                                                                 NULL, 0);
1360                 break;
1361         }
1362 }
1363
1364 int
1365 i40e_pf_host_init(struct rte_eth_dev *dev)
1366 {
1367         struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
1368         struct i40e_hw *hw = I40E_PF_TO_HW(pf);
1369         int ret, i;
1370         uint32_t val;
1371
1372         PMD_INIT_FUNC_TRACE();
1373
1374         /**
1375          * return if SRIOV not enabled, VF number not configured or
1376          * no queue assigned.
1377          */
1378         if(!hw->func_caps.sr_iov_1_1 || pf->vf_num == 0 || pf->vf_nb_qps == 0)
1379                 return I40E_SUCCESS;
1380
1381         /* Allocate memory to store VF structure */
1382         pf->vfs = rte_zmalloc("i40e_pf_vf",sizeof(*pf->vfs) * pf->vf_num, 0);
1383         if(pf->vfs == NULL)
1384                 return -ENOMEM;
1385
1386         /* Disable irq0 for VFR event */
1387         i40e_pf_disable_irq0(hw);
1388
1389         /* Disable VF link status interrupt */
1390         val = I40E_READ_REG(hw, I40E_PFGEN_PORTMDIO_NUM);
1391         val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
1392         I40E_WRITE_REG(hw, I40E_PFGEN_PORTMDIO_NUM, val);
1393         I40E_WRITE_FLUSH(hw);
1394
1395         for (i = 0; i < pf->vf_num; i++) {
1396                 pf->vfs[i].pf = pf;
1397                 pf->vfs[i].state = I40E_VF_INACTIVE;
1398                 pf->vfs[i].vf_idx = i;
1399                 ret = i40e_pf_host_vf_reset(&pf->vfs[i], 0);
1400                 if (ret != I40E_SUCCESS)
1401                         goto fail;
1402         }
1403
1404         RTE_ETH_DEV_SRIOV(dev).active = pf->vf_num;
1405         /* restore irq0 */
1406         i40e_pf_enable_irq0(hw);
1407
1408         return I40E_SUCCESS;
1409
1410 fail:
1411         rte_free(pf->vfs);
1412         i40e_pf_enable_irq0(hw);
1413
1414         return ret;
1415 }
1416
1417 int
1418 i40e_pf_host_uninit(struct rte_eth_dev *dev)
1419 {
1420         struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
1421         struct i40e_hw *hw = I40E_PF_TO_HW(pf);
1422         uint32_t val;
1423
1424         PMD_INIT_FUNC_TRACE();
1425
1426         /**
1427          * return if SRIOV not enabled, VF number not configured or
1428          * no queue assigned.
1429          */
1430         if ((!hw->func_caps.sr_iov_1_1) ||
1431                 (pf->vf_num == 0) ||
1432                 (pf->vf_nb_qps == 0))
1433                 return I40E_SUCCESS;
1434
1435         /* free memory to store VF structure */
1436         rte_free(pf->vfs);
1437         pf->vfs = NULL;
1438
1439         /* Disable irq0 for VFR event */
1440         i40e_pf_disable_irq0(hw);
1441
1442         /* Disable VF link status interrupt */
1443         val = I40E_READ_REG(hw, I40E_PFGEN_PORTMDIO_NUM);
1444         val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
1445         I40E_WRITE_REG(hw, I40E_PFGEN_PORTMDIO_NUM, val);
1446         I40E_WRITE_FLUSH(hw);
1447
1448         return I40E_SUCCESS;
1449 }