drivers/net/i40e/i40e_pf.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2010-2015 Intel Corporation. All rights reserved.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Intel Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <sys/queue.h>
  35 #include <stdio.h>
  36 #include <errno.h>
  37 #include <stdint.h>
  38 #include <string.h>
  39 #include <unistd.h>
  40 #include <stdarg.h>
  41 #include <inttypes.h>
  42
  43 #include <rte_string_fns.h>
  44 #include <rte_pci.h>
  45 #include <rte_ether.h>
  46 #include <rte_ethdev.h>
  47 #include <rte_memzone.h>
  48 #include <rte_malloc.h>
  49 #include <rte_memcpy.h>
  50
  51 #include "i40e_logs.h"
  52 #include "base/i40e_prototype.h"
  53 #include "base/i40e_adminq_cmd.h"
  54 #include "base/i40e_type.h"
  55 #include "i40e_ethdev.h"
  56 #include "i40e_rxtx.h"
  57 #include "i40e_pf.h"
  58
  59 #define I40E_CFG_CRCSTRIP_DEFAULT 1
  60
  61 static int
  62 i40e_pf_host_switch_queues(struct i40e_pf_vf *vf,
  63                            struct i40e_virtchnl_queue_select *qsel,
  64                            bool on);
  65
  66 /**
  67  * Bind PF queues with VSI and VF.
  68  **/
  69 static int
  70 i40e_pf_vf_queues_mapping(struct i40e_pf_vf *vf)
  71 {
  72         int i;
  73         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
  74         uint16_t vsi_id = vf->vsi->vsi_id;
  75         uint16_t vf_id  = vf->vf_idx;
  76         uint16_t nb_qps = vf->vsi->nb_qps;
  77         uint16_t qbase  = vf->vsi->base_queue;
  78         uint16_t q1, q2;
  79         uint32_t val;
  80
  81         /*
  82          * VF should use scatter range queues. So, it needn't
  83          * to set QBASE in this register.
  84          */
  85         i40e_write_rx_ctl(hw, I40E_VSILAN_QBASE(vsi_id),
  86                           I40E_VSILAN_QBASE_VSIQTABLE_ENA_MASK);
  87
  88         /* Set to enable VFLAN_QTABLE[] registers valid */
  89         I40E_WRITE_REG(hw, I40E_VPLAN_MAPENA(vf_id),
  90                 I40E_VPLAN_MAPENA_TXRX_ENA_MASK);
  91
  92         /* map PF queues to VF */
  93         for (i = 0; i < nb_qps; i++) {
  94                 val = ((qbase + i) & I40E_VPLAN_QTABLE_QINDEX_MASK);
  95                 I40E_WRITE_REG(hw, I40E_VPLAN_QTABLE(i, vf_id), val);
  96         }
  97
  98         /* map PF queues to VSI */
  99         for (i = 0; i < I40E_MAX_QP_NUM_PER_VF / 2; i++) {
 100                 if (2 * i > nb_qps - 1)
 101                         q1 = I40E_VSILAN_QTABLE_QINDEX_0_MASK;
 102                 else
 103                         q1 = qbase + 2 * i;
 104
 105                 if (2 * i + 1 > nb_qps - 1)
 106                         q2 = I40E_VSILAN_QTABLE_QINDEX_0_MASK;
 107                 else
 108                         q2 = qbase + 2 * i + 1;
 109
 110                 val = (q2 << I40E_VSILAN_QTABLE_QINDEX_1_SHIFT) + q1;
 111                 i40e_write_rx_ctl(hw, I40E_VSILAN_QTABLE(i, vsi_id), val);
 112         }
 113         I40E_WRITE_FLUSH(hw);
 114
 115         return I40E_SUCCESS;
 116 }
 117
 118
 119 /**
 120  * Proceed VF reset operation.
 121  */
 122 int
 123 i40e_pf_host_vf_reset(struct i40e_pf_vf *vf, bool do_hw_reset)
 124 {
 125         uint32_t val, i;
 126         struct i40e_hw *hw;
 127         struct i40e_pf *pf;
 128         uint16_t vf_id, abs_vf_id, vf_msix_num;
 129         int ret;
 130         struct i40e_virtchnl_queue_select qsel;
 131
 132         if (vf == NULL)
 133                 return -EINVAL;
 134
 135         pf = vf->pf;
 136         hw = I40E_PF_TO_HW(vf->pf);
 137         vf_id = vf->vf_idx;
 138         abs_vf_id = vf_id + hw->func_caps.vf_base_id;
 139
 140         /* Notify VF that we are in VFR progress */
 141         I40E_WRITE_REG(hw, I40E_VFGEN_RSTAT1(vf_id), I40E_VFR_INPROGRESS);
 142
 143         /*
 144          * If require a SW VF reset, a VFLR interrupt will be generated,
 145          * this function will be called again. To avoid it,
 146          * disable interrupt first.
 147          */
 148         if (do_hw_reset) {
 149                 vf->state = I40E_VF_INRESET;
 150                 val = I40E_READ_REG(hw, I40E_VPGEN_VFRTRIG(vf_id));
 151                 val |= I40E_VPGEN_VFRTRIG_VFSWR_MASK;
 152                 I40E_WRITE_REG(hw, I40E_VPGEN_VFRTRIG(vf_id), val);
 153                 I40E_WRITE_FLUSH(hw);
 154         }
 155
 156 #define VFRESET_MAX_WAIT_CNT 100
 157         /* Wait until VF reset is done */
 158         for (i = 0; i < VFRESET_MAX_WAIT_CNT; i++) {
 159                 rte_delay_us(10);
 160                 val = I40E_READ_REG(hw, I40E_VPGEN_VFRSTAT(vf_id));
 161                 if (val & I40E_VPGEN_VFRSTAT_VFRD_MASK)
 162                         break;
 163         }
 164
 165         if (i >= VFRESET_MAX_WAIT_CNT) {
 166                 PMD_DRV_LOG(ERR, "VF reset timeout");
 167                 return -ETIMEDOUT;
 168         }
 169
 170         /* This is not first time to do reset, do cleanup job first */
 171         if (vf->vsi) {
 172                 /* Disable queues */
 173                 memset(&qsel, 0, sizeof(qsel));
 174                 for (i = 0; i < vf->vsi->nb_qps; i++)
 175                         qsel.rx_queues |= 1 << i;
 176                 qsel.tx_queues = qsel.rx_queues;
 177                 ret = i40e_pf_host_switch_queues(vf, &qsel, false);
 178                 if (ret != I40E_SUCCESS) {
 179                         PMD_DRV_LOG(ERR, "Disable VF queues failed");
 180                         return -EFAULT;
 181                 }
 182
 183                 /* Disable VF interrupt setting */
 184                 vf_msix_num = hw->func_caps.num_msix_vectors_vf;
 185                 for (i = 0; i < vf_msix_num; i++) {
 186                         if (!i)
 187                                 val = I40E_VFINT_DYN_CTL0(vf_id);
 188                         else
 189                                 val = I40E_VFINT_DYN_CTLN(((vf_msix_num - 1) *
 190                                                         (vf_id)) + (i - 1));
 191                         I40E_WRITE_REG(hw, val, I40E_VFINT_DYN_CTLN_CLEARPBA_MASK);
 192                 }
 193                 I40E_WRITE_FLUSH(hw);
 194
 195                 /* remove VSI */
 196                 ret = i40e_vsi_release(vf->vsi);
 197                 if (ret != I40E_SUCCESS) {
 198                         PMD_DRV_LOG(ERR, "Release VSI failed");
 199                         return -EFAULT;
 200                 }
 201         }
 202
 203 #define I40E_VF_PCI_ADDR  0xAA
 204 #define I40E_VF_PEND_MASK 0x20
 205         /* Check the pending transactions of this VF */
 206         /* Use absolute VF id, refer to datasheet for details */
 207         I40E_WRITE_REG(hw, I40E_PF_PCI_CIAA, I40E_VF_PCI_ADDR |
 208                 (abs_vf_id << I40E_PF_PCI_CIAA_VF_NUM_SHIFT));
 209         for (i = 0; i < VFRESET_MAX_WAIT_CNT; i++) {
 210                 rte_delay_us(1);
 211                 val = I40E_READ_REG(hw, I40E_PF_PCI_CIAD);
 212                 if ((val & I40E_VF_PEND_MASK) == 0)
 213                         break;
 214         }
 215
 216         if (i >= VFRESET_MAX_WAIT_CNT) {
 217                 PMD_DRV_LOG(ERR, "Wait VF PCI transaction end timeout");
 218                 return -ETIMEDOUT;
 219         }
 220
 221         /* Reset done, Set COMPLETE flag and clear reset bit */
 222         I40E_WRITE_REG(hw, I40E_VFGEN_RSTAT1(vf_id), I40E_VFR_COMPLETED);
 223         val = I40E_READ_REG(hw, I40E_VPGEN_VFRTRIG(vf_id));
 224         val &= ~I40E_VPGEN_VFRTRIG_VFSWR_MASK;
 225         I40E_WRITE_REG(hw, I40E_VPGEN_VFRTRIG(vf_id), val);
 226         vf->reset_cnt++;
 227         I40E_WRITE_FLUSH(hw);
 228
 229         /* Allocate resource again */
 230         if (pf->floating_veb && pf->floating_veb_list[vf_id]) {
 231                 vf->vsi = i40e_vsi_setup(vf->pf, I40E_VSI_SRIOV,
 232                                          NULL, vf->vf_idx);
 233         } else {
 234                 vf->vsi = i40e_vsi_setup(vf->pf, I40E_VSI_SRIOV,
 235                                          vf->pf->main_vsi, vf->vf_idx);
 236         }
 237
 238         if (vf->vsi == NULL) {
 239                 PMD_DRV_LOG(ERR, "Add vsi failed");
 240                 return -EFAULT;
 241         }
 242
 243         ret = i40e_pf_vf_queues_mapping(vf);
 244         if (ret != I40E_SUCCESS) {
 245                 PMD_DRV_LOG(ERR, "queue mapping error");
 246                 i40e_vsi_release(vf->vsi);
 247                 return -EFAULT;
 248         }
 249
 250         I40E_WRITE_REG(hw, I40E_VFGEN_RSTAT1(vf_id), I40E_VFR_VFACTIVE);
 251
 252         return ret;
 253 }
 254
 255 int
 256 i40e_pf_host_send_msg_to_vf(struct i40e_pf_vf *vf,
 257                             uint32_t opcode,
 258                             uint32_t retval,
 259                             uint8_t *msg,
 260                             uint16_t msglen)
 261 {
 262         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 263         uint16_t abs_vf_id = hw->func_caps.vf_base_id + vf->vf_idx;
 264         int ret;
 265
 266         ret = i40e_aq_send_msg_to_vf(hw, abs_vf_id, opcode, retval,
 267                                                 msg, msglen, NULL);
 268         if (ret) {
 269                 PMD_INIT_LOG(ERR, "Fail to send message to VF, err %u",
 270                              hw->aq.asq_last_status);
 271         }
 272
 273         return ret;
 274 }
 275
 276 static void
 277 i40e_pf_host_process_cmd_version(struct i40e_pf_vf *vf)
 278 {
 279         struct i40e_virtchnl_version_info info;
 280
 281         info.major = I40E_DPDK_VERSION_MAJOR;
 282         info.minor = I40E_DPDK_VERSION_MINOR;
 283         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_VERSION,
 284                 I40E_SUCCESS, (uint8_t *)&info, sizeof(info));
 285 }
 286
 287 static int
 288 i40e_pf_host_process_cmd_reset_vf(struct i40e_pf_vf *vf)
 289 {
 290         i40e_pf_host_vf_reset(vf, 1);
 291
 292         /* No feedback will be sent to VF for VFLR */
 293         return I40E_SUCCESS;
 294 }
 295
 296 static int
 297 i40e_pf_host_process_cmd_get_vf_resource(struct i40e_pf_vf *vf)
 298 {
 299         struct i40e_virtchnl_vf_resource *vf_res = NULL;
 300         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 301         uint32_t len = 0;
 302         int ret = I40E_SUCCESS;
 303
 304         /* only have 1 VSI by default */
 305         len =  sizeof(struct i40e_virtchnl_vf_resource) +
 306                                 I40E_DEFAULT_VF_VSI_NUM *
 307                 sizeof(struct i40e_virtchnl_vsi_resource);
 308
 309         vf_res = rte_zmalloc("i40e_vf_res", len, 0);
 310         if (vf_res == NULL) {
 311                 PMD_DRV_LOG(ERR, "failed to allocate mem");
 312                 ret = I40E_ERR_NO_MEMORY;
 313                 vf_res = NULL;
 314                 len = 0;
 315                 goto send_msg;
 316         }
 317
 318         vf_res->vf_offload_flags = I40E_VIRTCHNL_VF_OFFLOAD_L2 |
 319                                 I40E_VIRTCHNL_VF_OFFLOAD_VLAN;
 320         vf_res->max_vectors = hw->func_caps.num_msix_vectors_vf;
 321         vf_res->num_queue_pairs = vf->vsi->nb_qps;
 322         vf_res->num_vsis = I40E_DEFAULT_VF_VSI_NUM;
 323
 324         /* Change below setting if PF host can support more VSIs for VF */
 325         vf_res->vsi_res[0].vsi_type = I40E_VSI_SRIOV;
 326         /* As assume Vf only has single VSI now, always return 0 */
 327         vf_res->vsi_res[0].vsi_id = 0;
 328         vf_res->vsi_res[0].num_queue_pairs = vf->vsi->nb_qps;
 329         ether_addr_copy(&vf->mac_addr,
 330                 (struct ether_addr *)vf_res->vsi_res[0].default_mac_addr);
 331
 332 send_msg:
 333         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_VF_RESOURCES,
 334                                         ret, (uint8_t *)vf_res, len);
 335         rte_free(vf_res);
 336
 337         return ret;
 338 }
 339
 340 static int
 341 i40e_pf_host_hmc_config_rxq(struct i40e_hw *hw,
 342                             struct i40e_pf_vf *vf,
 343                             struct i40e_virtchnl_rxq_info *rxq,
 344                             uint8_t crcstrip)
 345 {
 346         int err = I40E_SUCCESS;
 347         struct i40e_hmc_obj_rxq rx_ctx;
 348         uint16_t abs_queue_id = vf->vsi->base_queue + rxq->queue_id;
 349
 350         /* Clear the context structure first */
 351         memset(&rx_ctx, 0, sizeof(struct i40e_hmc_obj_rxq));
 352         rx_ctx.dbuff = rxq->databuffer_size >> I40E_RXQ_CTX_DBUFF_SHIFT;
 353         rx_ctx.hbuff = rxq->hdr_size >> I40E_RXQ_CTX_HBUFF_SHIFT;
 354         rx_ctx.base = rxq->dma_ring_addr / I40E_QUEUE_BASE_ADDR_UNIT;
 355         rx_ctx.qlen = rxq->ring_len;
 356 #ifndef RTE_LIBRTE_I40E_16BYTE_RX_DESC
 357         rx_ctx.dsize = 1;
 358 #endif
 359
 360         if (rxq->splithdr_enabled) {
 361                 rx_ctx.hsplit_0 = I40E_HEADER_SPLIT_ALL;
 362                 rx_ctx.dtype = i40e_header_split_enabled;
 363         } else {
 364                 rx_ctx.hsplit_0 = I40E_HEADER_SPLIT_NONE;
 365                 rx_ctx.dtype = i40e_header_split_none;
 366         }
 367         rx_ctx.rxmax = rxq->max_pkt_size;
 368         rx_ctx.tphrdesc_ena = 1;
 369         rx_ctx.tphwdesc_ena = 1;
 370         rx_ctx.tphdata_ena = 1;
 371         rx_ctx.tphhead_ena = 1;
 372         rx_ctx.lrxqthresh = 2;
 373         rx_ctx.crcstrip = crcstrip;
 374         rx_ctx.l2tsel = 1;
 375         rx_ctx.prefena = 1;
 376
 377         err = i40e_clear_lan_rx_queue_context(hw, abs_queue_id);
 378         if (err != I40E_SUCCESS)
 379                 return err;
 380         err = i40e_set_lan_rx_queue_context(hw, abs_queue_id, &rx_ctx);
 381
 382         return err;
 383 }
 384
 385 static int
 386 i40e_pf_host_hmc_config_txq(struct i40e_hw *hw,
 387                             struct i40e_pf_vf *vf,
 388                             struct i40e_virtchnl_txq_info *txq)
 389 {
 390         int err = I40E_SUCCESS;
 391         struct i40e_hmc_obj_txq tx_ctx;
 392         uint32_t qtx_ctl;
 393         uint16_t abs_queue_id = vf->vsi->base_queue + txq->queue_id;
 394
 395
 396         /* clear the context structure first */
 397         memset(&tx_ctx, 0, sizeof(tx_ctx));
 398         tx_ctx.new_context = 1;
 399         tx_ctx.base = txq->dma_ring_addr / I40E_QUEUE_BASE_ADDR_UNIT;
 400         tx_ctx.qlen = txq->ring_len;
 401         tx_ctx.rdylist = rte_le_to_cpu_16(vf->vsi->info.qs_handle[0]);
 402         err = i40e_clear_lan_tx_queue_context(hw, abs_queue_id);
 403         if (err != I40E_SUCCESS)
 404                 return err;
 405
 406         err = i40e_set_lan_tx_queue_context(hw, abs_queue_id, &tx_ctx);
 407         if (err != I40E_SUCCESS)
 408                 return err;
 409
 410         /* bind queue with VF function, since TX/QX will appear in pair,
 411          * so only has QTX_CTL to set.
 412          */
 413         qtx_ctl = (I40E_QTX_CTL_VF_QUEUE << I40E_QTX_CTL_PFVF_Q_SHIFT) |
 414                                 ((hw->pf_id << I40E_QTX_CTL_PF_INDX_SHIFT) &
 415                                 I40E_QTX_CTL_PF_INDX_MASK) |
 416                                 (((vf->vf_idx + hw->func_caps.vf_base_id) <<
 417                                 I40E_QTX_CTL_VFVM_INDX_SHIFT) &
 418                                 I40E_QTX_CTL_VFVM_INDX_MASK);
 419         I40E_WRITE_REG(hw, I40E_QTX_CTL(abs_queue_id), qtx_ctl);
 420         I40E_WRITE_FLUSH(hw);
 421
 422         return I40E_SUCCESS;
 423 }
 424
 425 static int
 426 i40e_pf_host_process_cmd_config_vsi_queues(struct i40e_pf_vf *vf,
 427                                            uint8_t *msg,
 428                                            uint16_t msglen)
 429 {
 430         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 431         struct i40e_vsi *vsi = vf->vsi;
 432         struct i40e_virtchnl_vsi_queue_config_info *vc_vqci =
 433                 (struct i40e_virtchnl_vsi_queue_config_info *)msg;
 434         struct i40e_virtchnl_queue_pair_info *vc_qpi;
 435         int i, ret = I40E_SUCCESS;
 436
 437         if (!msg || vc_vqci->num_queue_pairs > vsi->nb_qps ||
 438                 vc_vqci->num_queue_pairs > I40E_MAX_VSI_QP ||
 439                 msglen < I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqci,
 440                                         vc_vqci->num_queue_pairs)) {
 441                 PMD_DRV_LOG(ERR, "vsi_queue_config_info argument wrong\n");
 442                 ret = I40E_ERR_PARAM;
 443                 goto send_msg;
 444         }
 445
 446         vc_qpi = vc_vqci->qpair;
 447         for (i = 0; i < vc_vqci->num_queue_pairs; i++) {
 448                 if (vc_qpi[i].rxq.queue_id > vsi->nb_qps - 1 ||
 449                         vc_qpi[i].txq.queue_id > vsi->nb_qps - 1) {
 450                         ret = I40E_ERR_PARAM;
 451                         goto send_msg;
 452                 }
 453
 454                 /*
 455                  * Apply VF RX queue setting to HMC.
 456                  * If the opcode is I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT,
 457                  * then the extra information of
 458                  * 'struct i40e_virtchnl_queue_pair_extra_info' is needed,
 459                  * otherwise set the last parameter to NULL.
 460                  */
 461                 if (i40e_pf_host_hmc_config_rxq(hw, vf, &vc_qpi[i].rxq,
 462                         I40E_CFG_CRCSTRIP_DEFAULT) != I40E_SUCCESS) {
 463                         PMD_DRV_LOG(ERR, "Configure RX queue HMC failed");
 464                         ret = I40E_ERR_PARAM;
 465                         goto send_msg;
 466                 }
 467
 468                 /* Apply VF TX queue setting to HMC */
 469                 if (i40e_pf_host_hmc_config_txq(hw, vf,
 470                         &vc_qpi[i].txq) != I40E_SUCCESS) {
 471                         PMD_DRV_LOG(ERR, "Configure TX queue HMC failed");
 472                         ret = I40E_ERR_PARAM;
 473                         goto send_msg;
 474                 }
 475         }
 476
 477 send_msg:
 478         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES,
 479                                                         ret, NULL, 0);
 480
 481         return ret;
 482 }
 483
 484 static int
 485 i40e_pf_host_process_cmd_config_vsi_queues_ext(struct i40e_pf_vf *vf,
 486                                                uint8_t *msg,
 487                                                uint16_t msglen)
 488 {
 489         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 490         struct i40e_vsi *vsi = vf->vsi;
 491         struct i40e_virtchnl_vsi_queue_config_ext_info *vc_vqcei =
 492                 (struct i40e_virtchnl_vsi_queue_config_ext_info *)msg;
 493         struct i40e_virtchnl_queue_pair_ext_info *vc_qpei;
 494         int i, ret = I40E_SUCCESS;
 495
 496         if (!msg || vc_vqcei->num_queue_pairs > vsi->nb_qps ||
 497                 vc_vqcei->num_queue_pairs > I40E_MAX_VSI_QP ||
 498                 msglen < I40E_VIRTCHNL_CONFIG_VSI_QUEUES_SIZE(vc_vqcei,
 499                                         vc_vqcei->num_queue_pairs)) {
 500                 PMD_DRV_LOG(ERR, "vsi_queue_config_ext_info argument wrong\n");
 501                 ret = I40E_ERR_PARAM;
 502                 goto send_msg;
 503         }
 504
 505         vc_qpei = vc_vqcei->qpair;
 506         for (i = 0; i < vc_vqcei->num_queue_pairs; i++) {
 507                 if (vc_qpei[i].rxq.queue_id > vsi->nb_qps - 1 ||
 508                         vc_qpei[i].txq.queue_id > vsi->nb_qps - 1) {
 509                         ret = I40E_ERR_PARAM;
 510                         goto send_msg;
 511                 }
 512                 /*
 513                  * Apply VF RX queue setting to HMC.
 514                  * If the opcode is I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT,
 515                  * then the extra information of
 516                  * 'struct i40e_virtchnl_queue_pair_ext_info' is needed,
 517                  * otherwise set the last parameter to NULL.
 518                  */
 519                 if (i40e_pf_host_hmc_config_rxq(hw, vf, &vc_qpei[i].rxq,
 520                         vc_qpei[i].rxq_ext.crcstrip) != I40E_SUCCESS) {
 521                         PMD_DRV_LOG(ERR, "Configure RX queue HMC failed");
 522                         ret = I40E_ERR_PARAM;
 523                         goto send_msg;
 524                 }
 525
 526                 /* Apply VF TX queue setting to HMC */
 527                 if (i40e_pf_host_hmc_config_txq(hw, vf, &vc_qpei[i].txq) !=
 528                                                         I40E_SUCCESS) {
 529                         PMD_DRV_LOG(ERR, "Configure TX queue HMC failed");
 530                         ret = I40E_ERR_PARAM;
 531                         goto send_msg;
 532                 }
 533         }
 534
 535 send_msg:
 536         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT,
 537                                                                 ret, NULL, 0);
 538
 539         return ret;
 540 }
 541
 542 static int
 543 i40e_pf_host_process_cmd_config_irq_map(struct i40e_pf_vf *vf,
 544                                         uint8_t *msg, uint16_t msglen)
 545 {
 546         int ret = I40E_SUCCESS;
 547         struct i40e_virtchnl_irq_map_info *irqmap =
 548             (struct i40e_virtchnl_irq_map_info *)msg;
 549
 550         if (msg == NULL || msglen < sizeof(struct i40e_virtchnl_irq_map_info)) {
 551                 PMD_DRV_LOG(ERR, "buffer too short");
 552                 ret = I40E_ERR_PARAM;
 553                 goto send_msg;
 554         }
 555
 556         /* Assume VF only have 1 vector to bind all queues */
 557         if (irqmap->num_vectors != 1) {
 558                 PMD_DRV_LOG(ERR, "DKDK host only support 1 vector");
 559                 ret = I40E_ERR_PARAM;
 560                 goto send_msg;
 561         }
 562
 563         /* This MSIX intr store the intr in VF range */
 564         vf->vsi->msix_intr = irqmap->vecmap[0].vector_id;
 565         vf->vsi->nb_msix = irqmap->num_vectors;
 566         vf->vsi->nb_used_qps = vf->vsi->nb_qps;
 567
 568         /* Don't care how the TX/RX queue mapping with this vector.
 569          * Link all VF RX queues together. Only did mapping work.
 570          * VF can disable/enable the intr by itself.
 571          */
 572         i40e_vsi_queues_bind_intr(vf->vsi);
 573 send_msg:
 574         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP,
 575                                                         ret, NULL, 0);
 576
 577         return ret;
 578 }
 579
 580 static int
 581 i40e_pf_host_switch_queues(struct i40e_pf_vf *vf,
 582                            struct i40e_virtchnl_queue_select *qsel,
 583                            bool on)
 584 {
 585         int ret = I40E_SUCCESS;
 586         int i;
 587         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 588         uint16_t baseq = vf->vsi->base_queue;
 589
 590         if (qsel->rx_queues + qsel->tx_queues == 0)
 591                 return I40E_ERR_PARAM;
 592
 593         /* always enable RX first and disable last */
 594         /* Enable RX if it's enable */
 595         if (on) {
 596                 for (i = 0; i < I40E_MAX_QP_NUM_PER_VF; i++)
 597                         if (qsel->rx_queues & (1 << i)) {
 598                                 ret = i40e_switch_rx_queue(hw, baseq + i, on);
 599                                 if (ret != I40E_SUCCESS)
 600                                         return ret;
 601                         }
 602         }
 603
 604         /* Enable/Disable TX */
 605         for (i = 0; i < I40E_MAX_QP_NUM_PER_VF; i++)
 606                 if (qsel->tx_queues & (1 << i)) {
 607                         ret = i40e_switch_tx_queue(hw, baseq + i, on);
 608                         if (ret != I40E_SUCCESS)
 609                                 return ret;
 610                 }
 611
 612         /* disable RX last if it's disable */
 613         if (!on) {
 614                 /* disable RX */
 615                 for (i = 0; i < I40E_MAX_QP_NUM_PER_VF; i++)
 616                         if (qsel->rx_queues & (1 << i)) {
 617                                 ret = i40e_switch_rx_queue(hw, baseq + i, on);
 618                                 if (ret != I40E_SUCCESS)
 619                                         return ret;
 620                         }
 621         }
 622
 623         return ret;
 624 }
 625
 626 static int
 627 i40e_pf_host_process_cmd_enable_queues(struct i40e_pf_vf *vf,
 628                                        uint8_t *msg,
 629                                        uint16_t msglen)
 630 {
 631         int ret = I40E_SUCCESS;
 632         struct i40e_virtchnl_queue_select *q_sel =
 633                 (struct i40e_virtchnl_queue_select *)msg;
 634
 635         if (msg == NULL || msglen != sizeof(*q_sel)) {
 636                 ret = I40E_ERR_PARAM;
 637                 goto send_msg;
 638         }
 639         ret = i40e_pf_host_switch_queues(vf, q_sel, true);
 640
 641 send_msg:
 642         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_ENABLE_QUEUES,
 643                                                         ret, NULL, 0);
 644
 645         return ret;
 646 }
 647
 648 static int
 649 i40e_pf_host_process_cmd_disable_queues(struct i40e_pf_vf *vf,
 650                                         uint8_t *msg,
 651                                         uint16_t msglen)
 652 {
 653         int ret = I40E_SUCCESS;
 654         struct i40e_virtchnl_queue_select *q_sel =
 655                 (struct i40e_virtchnl_queue_select *)msg;
 656
 657         if (msg == NULL || msglen != sizeof(*q_sel)) {
 658                 ret = I40E_ERR_PARAM;
 659                 goto send_msg;
 660         }
 661         ret = i40e_pf_host_switch_queues(vf, q_sel, false);
 662
 663 send_msg:
 664         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_DISABLE_QUEUES,
 665                                                         ret, NULL, 0);
 666
 667         return ret;
 668 }
 669
 670
 671 static int
 672 i40e_pf_host_process_cmd_add_ether_address(struct i40e_pf_vf *vf,
 673                                            uint8_t *msg,
 674                                            uint16_t msglen)
 675 {
 676         int ret = I40E_SUCCESS;
 677         struct i40e_virtchnl_ether_addr_list *addr_list =
 678                         (struct i40e_virtchnl_ether_addr_list *)msg;
 679         struct i40e_mac_filter_info filter;
 680         int i;
 681         struct ether_addr *mac;
 682
 683         memset(&filter, 0 , sizeof(struct i40e_mac_filter_info));
 684
 685         if (msg == NULL || msglen <= sizeof(*addr_list)) {
 686                 PMD_DRV_LOG(ERR, "add_ether_address argument too short");
 687                 ret = I40E_ERR_PARAM;
 688                 goto send_msg;
 689         }
 690
 691         for (i = 0; i < addr_list->num_elements; i++) {
 692                 mac = (struct ether_addr *)(addr_list->list[i].addr);
 693                 (void)rte_memcpy(&filter.mac_addr, mac, ETHER_ADDR_LEN);
 694                 filter.filter_type = RTE_MACVLAN_PERFECT_MATCH;
 695                 if(!is_valid_assigned_ether_addr(mac) ||
 696                         i40e_vsi_add_mac(vf->vsi, &filter)) {
 697                         ret = I40E_ERR_INVALID_MAC_ADDR;
 698                         goto send_msg;
 699                 }
 700         }
 701
 702 send_msg:
 703         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS,
 704                                                         ret, NULL, 0);
 705
 706         return ret;
 707 }
 708
 709 static int
 710 i40e_pf_host_process_cmd_del_ether_address(struct i40e_pf_vf *vf,
 711                                            uint8_t *msg,
 712                                            uint16_t msglen)
 713 {
 714         int ret = I40E_SUCCESS;
 715         struct i40e_virtchnl_ether_addr_list *addr_list =
 716                 (struct i40e_virtchnl_ether_addr_list *)msg;
 717         int i;
 718         struct ether_addr *mac;
 719
 720         if (msg == NULL || msglen <= sizeof(*addr_list)) {
 721                 PMD_DRV_LOG(ERR, "delete_ether_address argument too short");
 722                 ret = I40E_ERR_PARAM;
 723                 goto send_msg;
 724         }
 725
 726         for (i = 0; i < addr_list->num_elements; i++) {
 727                 mac = (struct ether_addr *)(addr_list->list[i].addr);
 728                 if(!is_valid_assigned_ether_addr(mac) ||
 729                         i40e_vsi_delete_mac(vf->vsi, mac)) {
 730                         ret = I40E_ERR_INVALID_MAC_ADDR;
 731                         goto send_msg;
 732                 }
 733         }
 734
 735 send_msg:
 736         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS,
 737                                                         ret, NULL, 0);
 738
 739         return ret;
 740 }
 741
 742 static int
 743 i40e_pf_host_process_cmd_add_vlan(struct i40e_pf_vf *vf,
 744                                 uint8_t *msg, uint16_t msglen)
 745 {
 746         int ret = I40E_SUCCESS;
 747         struct i40e_virtchnl_vlan_filter_list *vlan_filter_list =
 748                 (struct i40e_virtchnl_vlan_filter_list *)msg;
 749         int i;
 750         uint16_t *vid;
 751
 752         if (msg == NULL || msglen <= sizeof(*vlan_filter_list)) {
 753                 PMD_DRV_LOG(ERR, "add_vlan argument too short");
 754                 ret = I40E_ERR_PARAM;
 755                 goto send_msg;
 756         }
 757
 758         vid = vlan_filter_list->vlan_id;
 759
 760         for (i = 0; i < vlan_filter_list->num_elements; i++) {
 761                 ret = i40e_vsi_add_vlan(vf->vsi, vid[i]);
 762                 if(ret != I40E_SUCCESS)
 763                         goto send_msg;
 764         }
 765
 766 send_msg:
 767         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_ADD_VLAN,
 768                                                 ret, NULL, 0);
 769
 770         return ret;
 771 }
 772
 773 static int
 774 i40e_pf_host_process_cmd_del_vlan(struct i40e_pf_vf *vf,
 775                                   uint8_t *msg,
 776                                   uint16_t msglen)
 777 {
 778         int ret = I40E_SUCCESS;
 779         struct i40e_virtchnl_vlan_filter_list *vlan_filter_list =
 780                         (struct i40e_virtchnl_vlan_filter_list *)msg;
 781         int i;
 782         uint16_t *vid;
 783
 784         if (msg == NULL || msglen <= sizeof(*vlan_filter_list)) {
 785                 PMD_DRV_LOG(ERR, "delete_vlan argument too short");
 786                 ret = I40E_ERR_PARAM;
 787                 goto send_msg;
 788         }
 789
 790         vid = vlan_filter_list->vlan_id;
 791         for (i = 0; i < vlan_filter_list->num_elements; i++) {
 792                 ret = i40e_vsi_delete_vlan(vf->vsi, vid[i]);
 793                 if(ret != I40E_SUCCESS)
 794                         goto send_msg;
 795         }
 796
 797 send_msg:
 798         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_DEL_VLAN,
 799                                                 ret, NULL, 0);
 800
 801         return ret;
 802 }
 803
 804 static int
 805 i40e_pf_host_process_cmd_config_promisc_mode(
 806                                         struct i40e_pf_vf *vf,
 807                                         uint8_t *msg,
 808                                         uint16_t msglen)
 809 {
 810         int ret = I40E_SUCCESS;
 811         struct i40e_virtchnl_promisc_info *promisc =
 812                                 (struct i40e_virtchnl_promisc_info *)msg;
 813         struct i40e_hw *hw = I40E_PF_TO_HW(vf->pf);
 814         bool unicast = FALSE, multicast = FALSE;
 815
 816         if (msg == NULL || msglen != sizeof(*promisc)) {
 817                 ret = I40E_ERR_PARAM;
 818                 goto send_msg;
 819         }
 820
 821         if (promisc->flags & I40E_FLAG_VF_UNICAST_PROMISC)
 822                 unicast = TRUE;
 823         ret = i40e_aq_set_vsi_unicast_promiscuous(hw,
 824                         vf->vsi->seid, unicast, NULL, true);
 825         if (ret != I40E_SUCCESS)
 826                 goto send_msg;
 827
 828         if (promisc->flags & I40E_FLAG_VF_MULTICAST_PROMISC)
 829                 multicast = TRUE;
 830         ret = i40e_aq_set_vsi_multicast_promiscuous(hw, vf->vsi->seid,
 831                                                 multicast, NULL);
 832
 833 send_msg:
 834         i40e_pf_host_send_msg_to_vf(vf,
 835                 I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE, ret, NULL, 0);
 836
 837         return ret;
 838 }
 839
 840 static int
 841 i40e_pf_host_process_cmd_get_stats(struct i40e_pf_vf *vf)
 842 {
 843         i40e_update_vsi_stats(vf->vsi);
 844
 845         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_GET_STATS,
 846                 I40E_SUCCESS, (uint8_t *)&vf->vsi->eth_stats,
 847                                 sizeof(vf->vsi->eth_stats));
 848
 849         return I40E_SUCCESS;
 850 }
 851
 852 static int
 853 i40e_pf_host_process_cmd_cfg_vlan_offload(
 854                                         struct i40e_pf_vf *vf,
 855                                         uint8_t *msg,
 856                                         uint16_t msglen)
 857 {
 858         int ret = I40E_SUCCESS;
 859         struct i40e_virtchnl_vlan_offload_info *offload =
 860                         (struct i40e_virtchnl_vlan_offload_info *)msg;
 861
 862         if (msg == NULL || msglen != sizeof(*offload)) {
 863                 ret = I40E_ERR_PARAM;
 864                 goto send_msg;
 865         }
 866
 867         ret = i40e_vsi_config_vlan_stripping(vf->vsi,
 868                                                 !!offload->enable_vlan_strip);
 869         if (ret != 0)
 870                 PMD_DRV_LOG(ERR, "Failed to configure vlan stripping");
 871
 872 send_msg:
 873         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_CFG_VLAN_OFFLOAD,
 874                                         ret, NULL, 0);
 875
 876         return ret;
 877 }
 878
 879 static int
 880 i40e_pf_host_process_cmd_cfg_pvid(struct i40e_pf_vf *vf,
 881                                         uint8_t *msg,
 882                                         uint16_t msglen)
 883 {
 884         int ret = I40E_SUCCESS;
 885         struct i40e_virtchnl_pvid_info  *tpid_info =
 886                         (struct i40e_virtchnl_pvid_info *)msg;
 887
 888         if (msg == NULL || msglen != sizeof(*tpid_info)) {
 889                 ret = I40E_ERR_PARAM;
 890                 goto send_msg;
 891         }
 892
 893         ret = i40e_vsi_vlan_pvid_set(vf->vsi, &tpid_info->info);
 894
 895 send_msg:
 896         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_CFG_VLAN_PVID,
 897                                         ret, NULL, 0);
 898
 899         return ret;
 900 }
 901
 902 static void
 903 i40e_notify_vf_link_status(struct rte_eth_dev *dev, struct i40e_pf_vf *vf)
 904 {
 905         struct i40e_virtchnl_pf_event event;
 906
 907         event.event = I40E_VIRTCHNL_EVENT_LINK_CHANGE;
 908         event.event_data.link_event.link_status =
 909                 dev->data->dev_link.link_status;
 910         event.event_data.link_event.link_speed =
 911                 (enum i40e_aq_link_speed)dev->data->dev_link.link_speed;
 912         i40e_pf_host_send_msg_to_vf(vf, I40E_VIRTCHNL_OP_EVENT,
 913                 I40E_SUCCESS, (uint8_t *)&event, sizeof(event));
 914 }
 915
 916 void
 917 i40e_pf_host_handle_vf_msg(struct rte_eth_dev *dev,
 918                            uint16_t abs_vf_id, uint32_t opcode,
 919                            __rte_unused uint32_t retval,
 920                            uint8_t *msg,
 921                            uint16_t msglen)
 922 {
 923         struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
 924         struct i40e_hw *hw = I40E_DEV_PRIVATE_TO_HW(dev->data->dev_private);
 925         struct i40e_pf_vf *vf;
 926         /* AdminQ will pass absolute VF id, transfer to internal vf id */
 927         uint16_t vf_id = abs_vf_id - hw->func_caps.vf_base_id;
 928
 929         if (vf_id > pf->vf_num - 1 || !pf->vfs) {
 930                 PMD_DRV_LOG(ERR, "invalid argument");
 931                 return;
 932         }
 933
 934         vf = &pf->vfs[vf_id];
 935         if (!vf->vsi) {
 936                 PMD_DRV_LOG(ERR, "NO VSI associated with VF found");
 937                 i40e_pf_host_send_msg_to_vf(vf, opcode,
 938                         I40E_ERR_NO_AVAILABLE_VSI, NULL, 0);
 939                 return;
 940         }
 941
 942         switch (opcode) {
 943         case I40E_VIRTCHNL_OP_VERSION :
 944                 PMD_DRV_LOG(INFO, "OP_VERSION received");
 945                 i40e_pf_host_process_cmd_version(vf);
 946                 break;
 947         case I40E_VIRTCHNL_OP_RESET_VF :
 948                 PMD_DRV_LOG(INFO, "OP_RESET_VF received");
 949                 i40e_pf_host_process_cmd_reset_vf(vf);
 950                 break;
 951         case I40E_VIRTCHNL_OP_GET_VF_RESOURCES:
 952                 PMD_DRV_LOG(INFO, "OP_GET_VF_RESOURCES received");
 953                 i40e_pf_host_process_cmd_get_vf_resource(vf);
 954                 break;
 955         case I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES:
 956                 PMD_DRV_LOG(INFO, "OP_CONFIG_VSI_QUEUES received");
 957                 i40e_pf_host_process_cmd_config_vsi_queues(vf, msg, msglen);
 958                 break;
 959         case I40E_VIRTCHNL_OP_CONFIG_VSI_QUEUES_EXT:
 960                 PMD_DRV_LOG(INFO, "OP_CONFIG_VSI_QUEUES_EXT received");
 961                 i40e_pf_host_process_cmd_config_vsi_queues_ext(vf, msg,
 962                                                                 msglen);
 963                 break;
 964         case I40E_VIRTCHNL_OP_CONFIG_IRQ_MAP:
 965                 PMD_DRV_LOG(INFO, "OP_CONFIG_IRQ_MAP received");
 966                 i40e_pf_host_process_cmd_config_irq_map(vf, msg, msglen);
 967                 break;
 968         case I40E_VIRTCHNL_OP_ENABLE_QUEUES:
 969                 PMD_DRV_LOG(INFO, "OP_ENABLE_QUEUES received");
 970                 i40e_pf_host_process_cmd_enable_queues(vf, msg, msglen);
 971                 i40e_notify_vf_link_status(dev, vf);
 972                 break;
 973         case I40E_VIRTCHNL_OP_DISABLE_QUEUES:
 974                 PMD_DRV_LOG(INFO, "OP_DISABLE_QUEUE received");
 975                 i40e_pf_host_process_cmd_disable_queues(vf, msg, msglen);
 976                 break;
 977         case I40E_VIRTCHNL_OP_ADD_ETHER_ADDRESS:
 978                 PMD_DRV_LOG(INFO, "OP_ADD_ETHER_ADDRESS received");
 979                 i40e_pf_host_process_cmd_add_ether_address(vf, msg, msglen);
 980                 break;
 981         case I40E_VIRTCHNL_OP_DEL_ETHER_ADDRESS:
 982                 PMD_DRV_LOG(INFO, "OP_DEL_ETHER_ADDRESS received");
 983                 i40e_pf_host_process_cmd_del_ether_address(vf, msg, msglen);
 984                 break;
 985         case I40E_VIRTCHNL_OP_ADD_VLAN:
 986                 PMD_DRV_LOG(INFO, "OP_ADD_VLAN received");
 987                 i40e_pf_host_process_cmd_add_vlan(vf, msg, msglen);
 988                 break;
 989         case I40E_VIRTCHNL_OP_DEL_VLAN:
 990                 PMD_DRV_LOG(INFO, "OP_DEL_VLAN received");
 991                 i40e_pf_host_process_cmd_del_vlan(vf, msg, msglen);
 992                 break;
 993         case I40E_VIRTCHNL_OP_CONFIG_PROMISCUOUS_MODE:
 994                 PMD_DRV_LOG(INFO, "OP_CONFIG_PROMISCUOUS_MODE received");
 995                 i40e_pf_host_process_cmd_config_promisc_mode(vf, msg, msglen);
 996                 break;
 997         case I40E_VIRTCHNL_OP_GET_STATS:
 998                 PMD_DRV_LOG(INFO, "OP_GET_STATS received");
 999                 i40e_pf_host_process_cmd_get_stats(vf);
1000                 break;
1001         case I40E_VIRTCHNL_OP_CFG_VLAN_OFFLOAD:
1002                 PMD_DRV_LOG(INFO, "OP_CFG_VLAN_OFFLOAD received");
1003                 i40e_pf_host_process_cmd_cfg_vlan_offload(vf, msg, msglen);
1004                 break;
1005         case I40E_VIRTCHNL_OP_CFG_VLAN_PVID:
1006                 PMD_DRV_LOG(INFO, "OP_CFG_VLAN_PVID received");
1007                 i40e_pf_host_process_cmd_cfg_pvid(vf, msg, msglen);
1008                 break;
1009         /* Don't add command supported below, which will
1010          * return an error code.
1011          */
1012         default:
1013                 PMD_DRV_LOG(ERR, "%u received, not supported", opcode);
1014                 i40e_pf_host_send_msg_to_vf(vf, opcode, I40E_ERR_PARAM,
1015                                                                 NULL, 0);
1016                 break;
1017         }
1018 }
1019
1020 int
1021 i40e_pf_host_init(struct rte_eth_dev *dev)
1022 {
1023         struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
1024         struct i40e_hw *hw = I40E_PF_TO_HW(pf);
1025         int ret, i;
1026         uint32_t val;
1027
1028         PMD_INIT_FUNC_TRACE();
1029
1030         /**
1031          * return if SRIOV not enabled, VF number not configured or
1032          * no queue assigned.
1033          */
1034         if(!hw->func_caps.sr_iov_1_1 || pf->vf_num == 0 || pf->vf_nb_qps == 0)
1035                 return I40E_SUCCESS;
1036
1037         /* Allocate memory to store VF structure */
1038         pf->vfs = rte_zmalloc("i40e_pf_vf",sizeof(*pf->vfs) * pf->vf_num, 0);
1039         if(pf->vfs == NULL)
1040                 return -ENOMEM;
1041
1042         /* Disable irq0 for VFR event */
1043         i40e_pf_disable_irq0(hw);
1044
1045         /* Disable VF link status interrupt */
1046         val = I40E_READ_REG(hw, I40E_PFGEN_PORTMDIO_NUM);
1047         val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
1048         I40E_WRITE_REG(hw, I40E_PFGEN_PORTMDIO_NUM, val);
1049         I40E_WRITE_FLUSH(hw);
1050
1051         for (i = 0; i < pf->vf_num; i++) {
1052                 pf->vfs[i].pf = pf;
1053                 pf->vfs[i].state = I40E_VF_INACTIVE;
1054                 pf->vfs[i].vf_idx = i;
1055                 ret = i40e_pf_host_vf_reset(&pf->vfs[i], 0);
1056                 if (ret != I40E_SUCCESS)
1057                         goto fail;
1058                 eth_random_addr(pf->vfs[i].mac_addr.addr_bytes);
1059         }
1060
1061         /* restore irq0 */
1062         i40e_pf_enable_irq0(hw);
1063
1064         return I40E_SUCCESS;
1065
1066 fail:
1067         rte_free(pf->vfs);
1068         i40e_pf_enable_irq0(hw);
1069
1070         return ret;
1071 }
1072
1073 int
1074 i40e_pf_host_uninit(struct rte_eth_dev *dev)
1075 {
1076         struct i40e_pf *pf = I40E_DEV_PRIVATE_TO_PF(dev->data->dev_private);
1077         struct i40e_hw *hw = I40E_PF_TO_HW(pf);
1078         uint32_t val;
1079
1080         PMD_INIT_FUNC_TRACE();
1081
1082         /**
1083          * return if SRIOV not enabled, VF number not configured or
1084          * no queue assigned.
1085          */
1086         if ((!hw->func_caps.sr_iov_1_1) ||
1087                 (pf->vf_num == 0) ||
1088                 (pf->vf_nb_qps == 0))
1089                 return I40E_SUCCESS;
1090
1091         /* free memory to store VF structure */
1092         rte_free(pf->vfs);
1093         pf->vfs = NULL;
1094
1095         /* Disable irq0 for VFR event */
1096         i40e_pf_disable_irq0(hw);
1097
1098         /* Disable VF link status interrupt */
1099         val = I40E_READ_REG(hw, I40E_PFGEN_PORTMDIO_NUM);
1100         val &= ~I40E_PFGEN_PORTMDIO_NUM_VFLINK_STAT_ENA_MASK;
1101         I40E_WRITE_REG(hw, I40E_PFGEN_PORTMDIO_NUM, val);
1102         I40E_WRITE_FLUSH(hw);
1103
1104         return I40E_SUCCESS;
1105 }