drivers/net/ixgbe/base/ixgbe_api.h

   1 /*******************************************************************************
   2
   3 Copyright (c) 2001-2015, Intel Corporation
   4 All rights reserved.
   5
   6 Redistribution and use in source and binary forms, with or without
   7 modification, are permitted provided that the following conditions are met:
   8
   9  1. Redistributions of source code must retain the above copyright notice,
  10     this list of conditions and the following disclaimer.
  11
  12  2. Redistributions in binary form must reproduce the above copyright
  13     notice, this list of conditions and the following disclaimer in the
  14     documentation and/or other materials provided with the distribution.
  15
  16  3. Neither the name of the Intel Corporation nor the names of its
  17     contributors may be used to endorse or promote products derived from
  18     this software without specific prior written permission.
  19
  20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
  23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
  24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
  26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
  27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
  28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
  29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  30 POSSIBILITY OF SUCH DAMAGE.
  31
  32 ***************************************************************************/
  33
  34 #ifndef _IXGBE_API_H_
  35 #define _IXGBE_API_H_
  36
  37 #include "ixgbe_type.h"
  38
  39 void ixgbe_dcb_get_rtrup2tc(struct ixgbe_hw *hw, u8 *map);
  40
  41 s32 ixgbe_init_shared_code(struct ixgbe_hw *hw);
  42
  43 extern s32 ixgbe_init_ops_82598(struct ixgbe_hw *hw);
  44 extern s32 ixgbe_init_ops_82599(struct ixgbe_hw *hw);
  45 extern s32 ixgbe_init_ops_X540(struct ixgbe_hw *hw);
  46 extern s32 ixgbe_init_ops_X550(struct ixgbe_hw *hw);
  47 extern s32 ixgbe_init_ops_X550EM(struct ixgbe_hw *hw);
  48 extern s32 ixgbe_init_ops_X550EM_x(struct ixgbe_hw *hw);
  49 extern s32 ixgbe_init_ops_X550EM_a(struct ixgbe_hw *hw);
  50 extern s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw);
  51
  52 s32 ixgbe_set_mac_type(struct ixgbe_hw *hw);
  53 s32 ixgbe_init_hw(struct ixgbe_hw *hw);
  54 s32 ixgbe_reset_hw(struct ixgbe_hw *hw);
  55 s32 ixgbe_start_hw(struct ixgbe_hw *hw);
  56 void ixgbe_enable_relaxed_ordering(struct ixgbe_hw *hw);
  57 s32 ixgbe_clear_hw_cntrs(struct ixgbe_hw *hw);
  58 enum ixgbe_media_type ixgbe_get_media_type(struct ixgbe_hw *hw);
  59 s32 ixgbe_get_mac_addr(struct ixgbe_hw *hw, u8 *mac_addr);
  60 s32 ixgbe_get_bus_info(struct ixgbe_hw *hw);
  61 u32 ixgbe_get_num_of_tx_queues(struct ixgbe_hw *hw);
  62 u32 ixgbe_get_num_of_rx_queues(struct ixgbe_hw *hw);
  63 s32 ixgbe_stop_adapter(struct ixgbe_hw *hw);
  64 s32 ixgbe_read_pba_num(struct ixgbe_hw *hw, u32 *pba_num);
  65 s32 ixgbe_read_pba_string(struct ixgbe_hw *hw, u8 *pba_num, u32 pba_num_size);
  66
  67 s32 ixgbe_identify_phy(struct ixgbe_hw *hw);
  68 s32 ixgbe_reset_phy(struct ixgbe_hw *hw);
  69 s32 ixgbe_read_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
  70                        u16 *phy_data);
  71 s32 ixgbe_write_phy_reg(struct ixgbe_hw *hw, u32 reg_addr, u32 device_type,
  72                         u16 phy_data);
  73
  74 s32 ixgbe_setup_phy_link(struct ixgbe_hw *hw);
  75 s32 ixgbe_setup_internal_phy(struct ixgbe_hw *hw);
  76 s32 ixgbe_check_phy_link(struct ixgbe_hw *hw,
  77                          ixgbe_link_speed *speed,
  78                          bool *link_up);
  79 s32 ixgbe_setup_phy_link_speed(struct ixgbe_hw *hw,
  80                                ixgbe_link_speed speed,
  81                                bool autoneg_wait_to_complete);
  82 s32 ixgbe_set_phy_power(struct ixgbe_hw *, bool on);
  83 void ixgbe_disable_tx_laser(struct ixgbe_hw *hw);
  84 void ixgbe_enable_tx_laser(struct ixgbe_hw *hw);
  85 void ixgbe_flap_tx_laser(struct ixgbe_hw *hw);
  86 s32 ixgbe_setup_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
  87                      bool autoneg_wait_to_complete);
  88 s32 ixgbe_setup_mac_link(struct ixgbe_hw *hw, ixgbe_link_speed speed,
  89                          bool autoneg_wait_to_complete);
  90 s32 ixgbe_check_link(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
  91                      bool *link_up, bool link_up_wait_to_complete);
  92 s32 ixgbe_get_link_capabilities(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
  93                                 bool *autoneg);
  94 s32 ixgbe_led_on(struct ixgbe_hw *hw, u32 index);
  95 s32 ixgbe_led_off(struct ixgbe_hw *hw, u32 index);
  96 s32 ixgbe_blink_led_start(struct ixgbe_hw *hw, u32 index);
  97 s32 ixgbe_blink_led_stop(struct ixgbe_hw *hw, u32 index);
  98
  99 s32 ixgbe_init_eeprom_params(struct ixgbe_hw *hw);
 100 s32 ixgbe_write_eeprom(struct ixgbe_hw *hw, u16 offset, u16 data);
 101 s32 ixgbe_write_eeprom_buffer(struct ixgbe_hw *hw, u16 offset,
 102                               u16 words, u16 *data);
 103 s32 ixgbe_read_eeprom(struct ixgbe_hw *hw, u16 offset, u16 *data);
 104 s32 ixgbe_read_eeprom_buffer(struct ixgbe_hw *hw, u16 offset,
 105                              u16 words, u16 *data);
 106
 107 s32 ixgbe_validate_eeprom_checksum(struct ixgbe_hw *hw, u16 *checksum_val);
 108 s32 ixgbe_update_eeprom_checksum(struct ixgbe_hw *hw);
 109
 110 s32 ixgbe_insert_mac_addr(struct ixgbe_hw *hw, u8 *addr, u32 vmdq);
 111 s32 ixgbe_set_rar(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
 112                   u32 enable_addr);
 113 s32 ixgbe_clear_rar(struct ixgbe_hw *hw, u32 index);
 114 s32 ixgbe_set_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
 115 s32 ixgbe_set_vmdq_san_mac(struct ixgbe_hw *hw, u32 vmdq);
 116 s32 ixgbe_clear_vmdq(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
 117 s32 ixgbe_init_rx_addrs(struct ixgbe_hw *hw);
 118 u32 ixgbe_get_num_rx_addrs(struct ixgbe_hw *hw);
 119 s32 ixgbe_update_uc_addr_list(struct ixgbe_hw *hw, u8 *addr_list,
 120                               u32 addr_count, ixgbe_mc_addr_itr func);
 121 s32 ixgbe_update_mc_addr_list(struct ixgbe_hw *hw, u8 *mc_addr_list,
 122                               u32 mc_addr_count, ixgbe_mc_addr_itr func,
 123                               bool clear);
 124 void ixgbe_add_uc_addr(struct ixgbe_hw *hw, u8 *addr_list, u32 vmdq);
 125 s32 ixgbe_enable_mc(struct ixgbe_hw *hw);
 126 s32 ixgbe_disable_mc(struct ixgbe_hw *hw);
 127 s32 ixgbe_clear_vfta(struct ixgbe_hw *hw);
 128 s32 ixgbe_set_vfta(struct ixgbe_hw *hw, u32 vlan,
 129                    u32 vind, bool vlan_on, bool vlvf_bypass);
 130 s32 ixgbe_set_vlvf(struct ixgbe_hw *hw, u32 vlan, u32 vind,
 131                    bool vlan_on, u32 *vfta_delta, u32 vfta,
 132                    bool vlvf_bypass);
 133 s32 ixgbe_fc_enable(struct ixgbe_hw *hw);
 134 s32 ixgbe_setup_fc(struct ixgbe_hw *hw);
 135 s32 ixgbe_set_fw_drv_ver(struct ixgbe_hw *hw, u8 maj, u8 min, u8 build,
 136                          u8 ver, u16 len, char *driver_ver);
 137 s32 ixgbe_get_thermal_sensor_data(struct ixgbe_hw *hw);
 138 s32 ixgbe_init_thermal_sensor_thresh(struct ixgbe_hw *hw);
 139 void ixgbe_set_mta(struct ixgbe_hw *hw, u8 *mc_addr);
 140 s32 ixgbe_get_phy_firmware_version(struct ixgbe_hw *hw,
 141                                    u16 *firmware_version);
 142 s32 ixgbe_read_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 *val);
 143 s32 ixgbe_write_analog_reg8(struct ixgbe_hw *hw, u32 reg, u8 val);
 144 s32 ixgbe_init_uta_tables(struct ixgbe_hw *hw);
 145 s32 ixgbe_read_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 *eeprom_data);
 146 u64 ixgbe_get_supported_physical_layer(struct ixgbe_hw *hw);
 147 s32 ixgbe_enable_rx_dma(struct ixgbe_hw *hw, u32 regval);
 148 s32 ixgbe_disable_sec_rx_path(struct ixgbe_hw *hw);
 149 s32 ixgbe_enable_sec_rx_path(struct ixgbe_hw *hw);
 150 s32 ixgbe_mng_fw_enabled(struct ixgbe_hw *hw);
 151 s32 ixgbe_reinit_fdir_tables_82599(struct ixgbe_hw *hw);
 152 s32 ixgbe_init_fdir_signature_82599(struct ixgbe_hw *hw, u32 fdirctrl);
 153 s32 ixgbe_init_fdir_perfect_82599(struct ixgbe_hw *hw, u32 fdirctrl,
 154                                         bool cloud_mode);
 155 void ixgbe_fdir_add_signature_filter_82599(struct ixgbe_hw *hw,
 156                                            union ixgbe_atr_hash_dword input,
 157                                            union ixgbe_atr_hash_dword common,
 158                                            u8 queue);
 159 s32 ixgbe_fdir_set_input_mask_82599(struct ixgbe_hw *hw,
 160                                     union ixgbe_atr_input *input_mask, bool cloud_mode);
 161 s32 ixgbe_fdir_write_perfect_filter_82599(struct ixgbe_hw *hw,
 162                                           union ixgbe_atr_input *input,
 163                                           u16 soft_id, u8 queue, bool cloud_mode);
 164 s32 ixgbe_fdir_erase_perfect_filter_82599(struct ixgbe_hw *hw,
 165                                           union ixgbe_atr_input *input,
 166                                           u16 soft_id);
 167 s32 ixgbe_fdir_add_perfect_filter_82599(struct ixgbe_hw *hw,
 168                                         union ixgbe_atr_input *input,
 169                                         union ixgbe_atr_input *mask,
 170                                         u16 soft_id,
 171                                         u8 queue,
 172                                         bool cloud_mode);
 173 void ixgbe_atr_compute_perfect_hash_82599(union ixgbe_atr_input *input,
 174                                           union ixgbe_atr_input *mask);
 175 u32 ixgbe_atr_compute_sig_hash_82599(union ixgbe_atr_hash_dword input,
 176                                      union ixgbe_atr_hash_dword common);
 177 bool ixgbe_verify_lesm_fw_enabled_82599(struct ixgbe_hw *hw);
 178 s32 ixgbe_read_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
 179                         u8 *data);
 180 s32 ixgbe_read_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
 181                                  u8 dev_addr, u8 *data);
 182 s32 ixgbe_read_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val);
 183 s32 ixgbe_read_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 *val);
 184 s32 ixgbe_write_i2c_byte(struct ixgbe_hw *hw, u8 byte_offset, u8 dev_addr,
 185                          u8 data);
 186 void ixgbe_set_fdir_drop_queue_82599(struct ixgbe_hw *hw, u8 dropqueue);
 187 s32 ixgbe_write_i2c_byte_unlocked(struct ixgbe_hw *hw, u8 byte_offset,
 188                                   u8 dev_addr, u8 data);
 189 s32 ixgbe_write_link(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val);
 190 s32 ixgbe_write_link_unlocked(struct ixgbe_hw *hw, u8 addr, u16 reg, u16 val);
 191 s32 ixgbe_write_i2c_eeprom(struct ixgbe_hw *hw, u8 byte_offset, u8 eeprom_data);
 192 s32 ixgbe_get_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr);
 193 s32 ixgbe_set_san_mac_addr(struct ixgbe_hw *hw, u8 *san_mac_addr);
 194 s32 ixgbe_get_device_caps(struct ixgbe_hw *hw, u16 *device_caps);
 195 s32 ixgbe_acquire_swfw_semaphore(struct ixgbe_hw *hw, u32 mask);
 196 void ixgbe_release_swfw_semaphore(struct ixgbe_hw *hw, u32 mask);
 197 void ixgbe_init_swfw_semaphore(struct ixgbe_hw *hw);
 198 s32 ixgbe_get_wwn_prefix(struct ixgbe_hw *hw, u16 *wwnn_prefix,
 199                          u16 *wwpn_prefix);
 200 s32 ixgbe_get_fcoe_boot_status(struct ixgbe_hw *hw, u16 *bs);
 201 s32 ixgbe_dmac_config(struct ixgbe_hw *hw);
 202 s32 ixgbe_dmac_update_tcs(struct ixgbe_hw *hw);
 203 s32 ixgbe_dmac_config_tcs(struct ixgbe_hw *hw);
 204 s32 ixgbe_setup_eee(struct ixgbe_hw *hw, bool enable_eee);
 205 void ixgbe_set_source_address_pruning(struct ixgbe_hw *hw, bool enable,
 206                                       unsigned int vf);
 207 void ixgbe_set_ethertype_anti_spoofing(struct ixgbe_hw *hw, bool enable,
 208                                        int vf);
 209 s32 ixgbe_read_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
 210                         u32 device_type, u32 *phy_data);
 211 s32 ixgbe_write_iosf_sb_reg(struct ixgbe_hw *hw, u32 reg_addr,
 212                         u32 device_type, u32 phy_data);
 213 void ixgbe_disable_mdd(struct ixgbe_hw *hw);
 214 void ixgbe_enable_mdd(struct ixgbe_hw *hw);
 215 void ixgbe_mdd_event(struct ixgbe_hw *hw, u32 *vf_bitmap);
 216 void ixgbe_restore_mdd_vf(struct ixgbe_hw *hw, u32 vf);
 217 s32 ixgbe_enter_lplu(struct ixgbe_hw *hw);
 218 s32 ixgbe_handle_lasi(struct ixgbe_hw *hw);
 219 void ixgbe_set_rate_select_speed(struct ixgbe_hw *hw, ixgbe_link_speed speed);
 220 void ixgbe_disable_rx(struct ixgbe_hw *hw);
 221 void ixgbe_enable_rx(struct ixgbe_hw *hw);
 222 s32 ixgbe_negotiate_fc(struct ixgbe_hw *hw, u32 adv_reg, u32 lp_reg,
 223                         u32 adv_sym, u32 adv_asm, u32 lp_sym, u32 lp_asm);
 224
 225 #endif /* _IXGBE_API_H_ */