4 * Copyright 2015 6WIND S.A.
5 * Copyright 2015 Mellanox.
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47 #include <sys/ioctl.h>
48 #include <sys/socket.h>
49 #include <netinet/in.h>
50 #include <linux/ethtool.h>
51 #include <linux/sockios.h>
57 #include <rte_atomic.h>
58 #include <rte_ethdev.h>
59 #include <rte_bus_pci.h>
61 #include <rte_common.h>
62 #include <rte_interrupts.h>
63 #include <rte_malloc.h>
66 #include "mlx5_rxtx.h"
67 #include "mlx5_utils.h"
69 /* Supported speed values found in /usr/include/linux/ethtool.h */
70 #ifndef HAVE_SUPPORTED_40000baseKR4_Full
71 #define SUPPORTED_40000baseKR4_Full (1 << 23)
73 #ifndef HAVE_SUPPORTED_40000baseCR4_Full
74 #define SUPPORTED_40000baseCR4_Full (1 << 24)
76 #ifndef HAVE_SUPPORTED_40000baseSR4_Full
77 #define SUPPORTED_40000baseSR4_Full (1 << 25)
79 #ifndef HAVE_SUPPORTED_40000baseLR4_Full
80 #define SUPPORTED_40000baseLR4_Full (1 << 26)
82 #ifndef HAVE_SUPPORTED_56000baseKR4_Full
83 #define SUPPORTED_56000baseKR4_Full (1 << 27)
85 #ifndef HAVE_SUPPORTED_56000baseCR4_Full
86 #define SUPPORTED_56000baseCR4_Full (1 << 28)
88 #ifndef HAVE_SUPPORTED_56000baseSR4_Full
89 #define SUPPORTED_56000baseSR4_Full (1 << 29)
91 #ifndef HAVE_SUPPORTED_56000baseLR4_Full
92 #define SUPPORTED_56000baseLR4_Full (1 << 30)
95 /* Add defines in case the running kernel is not the same as user headers. */
96 #ifndef ETHTOOL_GLINKSETTINGS
97 struct ethtool_link_settings {
104 uint8_t mdio_support;
106 uint8_t eth_tp_mdix_ctrl;
107 int8_t link_mode_masks_nwords;
108 uint32_t reserved[8];
109 uint32_t link_mode_masks[];
112 #define ETHTOOL_GLINKSETTINGS 0x0000004c
113 #define ETHTOOL_LINK_MODE_1000baseT_Full_BIT 5
114 #define ETHTOOL_LINK_MODE_Autoneg_BIT 6
115 #define ETHTOOL_LINK_MODE_1000baseKX_Full_BIT 17
116 #define ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT 18
117 #define ETHTOOL_LINK_MODE_10000baseKR_Full_BIT 19
118 #define ETHTOOL_LINK_MODE_10000baseR_FEC_BIT 20
119 #define ETHTOOL_LINK_MODE_20000baseMLD2_Full_BIT 21
120 #define ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT 22
121 #define ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT 23
122 #define ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT 24
123 #define ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT 25
124 #define ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT 26
125 #define ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT 27
126 #define ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT 28
127 #define ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT 29
128 #define ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT 30
130 #ifndef HAVE_ETHTOOL_LINK_MODE_25G
131 #define ETHTOOL_LINK_MODE_25000baseCR_Full_BIT 31
132 #define ETHTOOL_LINK_MODE_25000baseKR_Full_BIT 32
133 #define ETHTOOL_LINK_MODE_25000baseSR_Full_BIT 33
135 #ifndef HAVE_ETHTOOL_LINK_MODE_50G
136 #define ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT 34
137 #define ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT 35
139 #ifndef HAVE_ETHTOOL_LINK_MODE_100G
140 #define ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT 36
141 #define ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT 37
142 #define ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT 38
143 #define ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT 39
147 * Get interface name from private structure.
150 * Pointer to Ethernet device.
152 * Interface name output buffer.
155 * 0 on success, a negative errno value otherwise and rte_errno is set.
158 mlx5_get_ifname(const struct rte_eth_dev *dev, char (*ifname)[IF_NAMESIZE])
160 struct priv *priv = dev->data->dev_private;
163 unsigned int dev_type = 0;
164 unsigned int dev_port_prev = ~0u;
165 char match[IF_NAMESIZE] = "";
168 MKSTR(path, "%s/device/net", priv->ibdev_path);
176 while ((dent = readdir(dir)) != NULL) {
177 char *name = dent->d_name;
179 unsigned int dev_port;
182 if ((name[0] == '.') &&
183 ((name[1] == '\0') ||
184 ((name[1] == '.') && (name[2] == '\0'))))
187 MKSTR(path, "%s/device/net/%s/%s",
188 priv->ibdev_path, name,
189 (dev_type ? "dev_id" : "dev_port"));
191 file = fopen(path, "rb");
196 * Switch to dev_id when dev_port does not exist as
197 * is the case with Linux kernel versions < 3.15.
208 r = fscanf(file, (dev_type ? "%x" : "%u"), &dev_port);
213 * Switch to dev_id when dev_port returns the same value for
214 * all ports. May happen when using a MOFED release older than
215 * 3.0 with a Linux kernel >= 3.15.
217 if (dev_port == dev_port_prev)
219 dev_port_prev = dev_port;
220 if (dev_port == (priv->port - 1u))
221 snprintf(match, sizeof(match), "%s", name);
224 if (match[0] == '\0') {
228 strncpy(*ifname, match, sizeof(*ifname));
233 * Perform ifreq ioctl() on associated Ethernet device.
236 * Pointer to Ethernet device.
238 * Request number to pass to ioctl().
240 * Interface request structure output buffer.
243 * 0 on success, a negative errno value otherwise and rte_errno is set.
246 mlx5_ifreq(const struct rte_eth_dev *dev, int req, struct ifreq *ifr)
248 int sock = socket(PF_INET, SOCK_DGRAM, IPPROTO_IP);
255 ret = mlx5_get_ifname(dev, &ifr->ifr_name);
258 ret = ioctl(sock, req, ifr);
274 * Pointer to Ethernet device.
276 * MTU value output buffer.
279 * 0 on success, a negative errno value otherwise and rte_errno is set.
282 mlx5_get_mtu(struct rte_eth_dev *dev, uint16_t *mtu)
284 struct ifreq request;
285 int ret = mlx5_ifreq(dev, SIOCGIFMTU, &request);
289 *mtu = request.ifr_mtu;
297 * Pointer to Ethernet device.
302 * 0 on success, a negative errno value otherwise and rte_errno is set.
305 mlx5_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
307 struct ifreq request = { .ifr_mtu = mtu, };
309 return mlx5_ifreq(dev, SIOCSIFMTU, &request);
316 * Pointer to Ethernet device.
318 * Bitmask for flags that must remain untouched.
320 * Bitmask for flags to modify.
323 * 0 on success, a negative errno value otherwise and rte_errno is set.
326 mlx5_set_flags(struct rte_eth_dev *dev, unsigned int keep, unsigned int flags)
328 struct ifreq request;
329 int ret = mlx5_ifreq(dev, SIOCGIFFLAGS, &request);
333 request.ifr_flags &= keep;
334 request.ifr_flags |= flags & ~keep;
335 return mlx5_ifreq(dev, SIOCSIFFLAGS, &request);
339 * DPDK callback for Ethernet device configuration.
342 * Pointer to Ethernet device structure.
345 * 0 on success, a negative errno value otherwise and rte_errno is set.
348 mlx5_dev_configure(struct rte_eth_dev *dev)
350 struct priv *priv = dev->data->dev_private;
351 unsigned int rxqs_n = dev->data->nb_rx_queues;
352 unsigned int txqs_n = dev->data->nb_tx_queues;
355 unsigned int reta_idx_n;
356 const uint8_t use_app_rss_key =
357 !!dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key;
360 if (use_app_rss_key &&
361 (dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key_len !=
362 rss_hash_default_key_len)) {
363 DRV_LOG(ERR, "port %u RSS key len must be %zu Bytes long",
364 dev->data->port_id, rss_hash_default_key_len);
368 priv->rss_conf.rss_key =
369 rte_realloc(priv->rss_conf.rss_key,
370 rss_hash_default_key_len, 0);
371 if (!priv->rss_conf.rss_key) {
372 DRV_LOG(ERR, "port %u cannot allocate RSS hash key memory (%u)",
373 dev->data->port_id, rxqs_n);
377 memcpy(priv->rss_conf.rss_key,
379 dev->data->dev_conf.rx_adv_conf.rss_conf.rss_key :
380 rss_hash_default_key,
381 rss_hash_default_key_len);
382 priv->rss_conf.rss_key_len = rss_hash_default_key_len;
383 priv->rss_conf.rss_hf = dev->data->dev_conf.rx_adv_conf.rss_conf.rss_hf;
384 priv->rxqs = (void *)dev->data->rx_queues;
385 priv->txqs = (void *)dev->data->tx_queues;
386 if (txqs_n != priv->txqs_n) {
387 DRV_LOG(INFO, "port %u Tx queues number update: %u -> %u",
388 dev->data->port_id, priv->txqs_n, txqs_n);
389 priv->txqs_n = txqs_n;
391 if (rxqs_n > priv->ind_table_max_size) {
392 DRV_LOG(ERR, "port %u cannot handle this many Rx queues (%u)",
393 dev->data->port_id, rxqs_n);
397 if (rxqs_n == priv->rxqs_n)
399 DRV_LOG(INFO, "port %u Rx queues number update: %u -> %u",
400 dev->data->port_id, priv->rxqs_n, rxqs_n);
401 priv->rxqs_n = rxqs_n;
402 /* If the requested number of RX queues is not a power of two, use the
403 * maximum indirection table size for better balancing.
404 * The result is always rounded to the next power of two. */
405 reta_idx_n = (1 << log2above((rxqs_n & (rxqs_n - 1)) ?
406 priv->ind_table_max_size :
408 ret = mlx5_rss_reta_index_resize(dev, reta_idx_n);
411 /* When the number of RX queues is not a power of two, the remaining
412 * table entries are padded with reused WQs and hashes are not spread
414 for (i = 0, j = 0; (i != reta_idx_n); ++i) {
415 (*priv->reta_idx)[i] = j;
423 * DPDK callback to get information about the device.
426 * Pointer to Ethernet device structure.
428 * Info structure output buffer.
431 mlx5_dev_infos_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *info)
433 struct priv *priv = dev->data->dev_private;
435 char ifname[IF_NAMESIZE];
437 info->pci_dev = RTE_ETH_DEV_TO_PCI(dev);
438 /* FIXME: we should ask the device for these values. */
439 info->min_rx_bufsize = 32;
440 info->max_rx_pktlen = 65536;
442 * Since we need one CQ per QP, the limit is the minimum number
443 * between the two values.
445 max = RTE_MIN(priv->device_attr.orig_attr.max_cq,
446 priv->device_attr.orig_attr.max_qp);
447 /* If max >= 65535 then max = 0, max_rx_queues is uint16_t. */
450 info->max_rx_queues = max;
451 info->max_tx_queues = max;
452 info->max_mac_addrs = RTE_DIM(priv->mac);
453 info->rx_offload_capa =
455 (DEV_RX_OFFLOAD_IPV4_CKSUM |
456 DEV_RX_OFFLOAD_UDP_CKSUM |
457 DEV_RX_OFFLOAD_TCP_CKSUM) :
459 (priv->hw_vlan_strip ? DEV_RX_OFFLOAD_VLAN_STRIP : 0) |
460 DEV_RX_OFFLOAD_TIMESTAMP;
463 info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT;
465 info->tx_offload_capa |=
466 (DEV_TX_OFFLOAD_IPV4_CKSUM |
467 DEV_TX_OFFLOAD_UDP_CKSUM |
468 DEV_TX_OFFLOAD_TCP_CKSUM);
470 info->tx_offload_capa |= DEV_TX_OFFLOAD_TCP_TSO;
472 info->tx_offload_capa |= (DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
473 DEV_TX_OFFLOAD_VXLAN_TNL_TSO |
474 DEV_TX_OFFLOAD_GRE_TNL_TSO);
475 if (mlx5_get_ifname(dev, &ifname) == 0)
476 info->if_index = if_nametoindex(ifname);
477 info->reta_size = priv->reta_idx_n ?
478 priv->reta_idx_n : priv->ind_table_max_size;
479 info->hash_key_size = rss_hash_default_key_len;
480 info->speed_capa = priv->link_speed_capa;
481 info->flow_type_rss_offloads = ~MLX5_RSS_HF_MASK;
485 * Get supported packet types.
488 * Pointer to Ethernet device structure.
491 * A pointer to the supported Packet types array.
494 mlx5_dev_supported_ptypes_get(struct rte_eth_dev *dev)
496 static const uint32_t ptypes[] = {
497 /* refers to rxq_cq_to_pkt_type() */
499 RTE_PTYPE_L3_IPV4_EXT_UNKNOWN,
500 RTE_PTYPE_L3_IPV6_EXT_UNKNOWN,
501 RTE_PTYPE_L4_NONFRAG,
505 RTE_PTYPE_INNER_L3_IPV4_EXT_UNKNOWN,
506 RTE_PTYPE_INNER_L3_IPV6_EXT_UNKNOWN,
507 RTE_PTYPE_INNER_L4_NONFRAG,
508 RTE_PTYPE_INNER_L4_FRAG,
509 RTE_PTYPE_INNER_L4_TCP,
510 RTE_PTYPE_INNER_L4_UDP,
514 if (dev->rx_pkt_burst == mlx5_rx_burst ||
515 dev->rx_pkt_burst == mlx5_rx_burst_vec)
521 * DPDK callback to retrieve physical link information.
524 * Pointer to Ethernet device structure.
526 * Storage for current link status.
529 * 0 on success, a negative errno value otherwise and rte_errno is set.
532 mlx5_link_update_unlocked_gset(struct rte_eth_dev *dev,
533 struct rte_eth_link *link)
535 struct priv *priv = dev->data->dev_private;
536 struct ethtool_cmd edata = {
537 .cmd = ETHTOOL_GSET /* Deprecated since Linux v4.5. */
540 struct rte_eth_link dev_link;
544 ret = mlx5_ifreq(dev, SIOCGIFFLAGS, &ifr);
546 DRV_LOG(WARNING, "port %u ioctl(SIOCGIFFLAGS) failed: %s",
547 dev->data->port_id, strerror(rte_errno));
550 memset(&dev_link, 0, sizeof(dev_link));
551 dev_link.link_status = ((ifr.ifr_flags & IFF_UP) &&
552 (ifr.ifr_flags & IFF_RUNNING));
553 ifr.ifr_data = (void *)&edata;
554 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr);
557 "port %u ioctl(SIOCETHTOOL, ETHTOOL_GSET) failed: %s",
558 dev->data->port_id, strerror(rte_errno));
561 link_speed = ethtool_cmd_speed(&edata);
562 if (link_speed == -1)
563 dev_link.link_speed = 0;
565 dev_link.link_speed = link_speed;
566 priv->link_speed_capa = 0;
567 if (edata.supported & SUPPORTED_Autoneg)
568 priv->link_speed_capa |= ETH_LINK_SPEED_AUTONEG;
569 if (edata.supported & (SUPPORTED_1000baseT_Full |
570 SUPPORTED_1000baseKX_Full))
571 priv->link_speed_capa |= ETH_LINK_SPEED_1G;
572 if (edata.supported & SUPPORTED_10000baseKR_Full)
573 priv->link_speed_capa |= ETH_LINK_SPEED_10G;
574 if (edata.supported & (SUPPORTED_40000baseKR4_Full |
575 SUPPORTED_40000baseCR4_Full |
576 SUPPORTED_40000baseSR4_Full |
577 SUPPORTED_40000baseLR4_Full))
578 priv->link_speed_capa |= ETH_LINK_SPEED_40G;
579 dev_link.link_duplex = ((edata.duplex == DUPLEX_HALF) ?
580 ETH_LINK_HALF_DUPLEX : ETH_LINK_FULL_DUPLEX);
581 dev_link.link_autoneg = !(dev->data->dev_conf.link_speeds &
582 ETH_LINK_SPEED_FIXED);
583 if ((dev_link.link_speed && !dev_link.link_status) ||
584 (!dev_link.link_speed && dev_link.link_status)) {
593 * Retrieve physical link information (unlocked version using new ioctl).
596 * Pointer to Ethernet device structure.
598 * Storage for current link status.
601 * 0 on success, a negative errno value otherwise and rte_errno is set.
604 mlx5_link_update_unlocked_gs(struct rte_eth_dev *dev,
605 struct rte_eth_link *link)
608 struct priv *priv = dev->data->dev_private;
609 struct ethtool_link_settings gcmd = { .cmd = ETHTOOL_GLINKSETTINGS };
611 struct rte_eth_link dev_link;
615 ret = mlx5_ifreq(dev, SIOCGIFFLAGS, &ifr);
617 DRV_LOG(WARNING, "port %u ioctl(SIOCGIFFLAGS) failed: %s",
618 dev->data->port_id, strerror(rte_errno));
621 memset(&dev_link, 0, sizeof(dev_link));
622 dev_link.link_status = ((ifr.ifr_flags & IFF_UP) &&
623 (ifr.ifr_flags & IFF_RUNNING));
624 ifr.ifr_data = (void *)&gcmd;
625 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr);
628 "port %u ioctl(SIOCETHTOOL, ETHTOOL_GLINKSETTINGS)"
630 dev->data->port_id, strerror(rte_errno));
633 gcmd.link_mode_masks_nwords = -gcmd.link_mode_masks_nwords;
635 alignas(struct ethtool_link_settings)
636 uint8_t data[offsetof(struct ethtool_link_settings, link_mode_masks) +
637 sizeof(uint32_t) * gcmd.link_mode_masks_nwords * 3];
638 struct ethtool_link_settings *ecmd = (void *)data;
641 ifr.ifr_data = (void *)ecmd;
642 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr);
645 "port %u ioctl(SIOCETHTOOL, ETHTOOL_GLINKSETTINGS)"
647 dev->data->port_id, strerror(rte_errno));
650 dev_link.link_speed = ecmd->speed;
651 sc = ecmd->link_mode_masks[0] |
652 ((uint64_t)ecmd->link_mode_masks[1] << 32);
653 priv->link_speed_capa = 0;
654 if (sc & MLX5_BITSHIFT(ETHTOOL_LINK_MODE_Autoneg_BIT))
655 priv->link_speed_capa |= ETH_LINK_SPEED_AUTONEG;
656 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_1000baseT_Full_BIT) |
657 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_1000baseKX_Full_BIT)))
658 priv->link_speed_capa |= ETH_LINK_SPEED_1G;
659 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT) |
660 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_10000baseKR_Full_BIT) |
661 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_10000baseR_FEC_BIT)))
662 priv->link_speed_capa |= ETH_LINK_SPEED_10G;
663 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_20000baseMLD2_Full_BIT) |
664 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_20000baseKR2_Full_BIT)))
665 priv->link_speed_capa |= ETH_LINK_SPEED_20G;
666 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT) |
667 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT) |
668 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseSR4_Full_BIT) |
669 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_40000baseLR4_Full_BIT)))
670 priv->link_speed_capa |= ETH_LINK_SPEED_40G;
671 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseKR4_Full_BIT) |
672 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseCR4_Full_BIT) |
673 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseSR4_Full_BIT) |
674 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_56000baseLR4_Full_BIT)))
675 priv->link_speed_capa |= ETH_LINK_SPEED_56G;
676 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_25000baseCR_Full_BIT) |
677 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_25000baseKR_Full_BIT) |
678 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_25000baseSR_Full_BIT)))
679 priv->link_speed_capa |= ETH_LINK_SPEED_25G;
680 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_50000baseCR2_Full_BIT) |
681 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_50000baseKR2_Full_BIT)))
682 priv->link_speed_capa |= ETH_LINK_SPEED_50G;
683 if (sc & (MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT) |
684 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseSR4_Full_BIT) |
685 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT) |
686 MLX5_BITSHIFT(ETHTOOL_LINK_MODE_100000baseLR4_ER4_Full_BIT)))
687 priv->link_speed_capa |= ETH_LINK_SPEED_100G;
688 dev_link.link_duplex = ((ecmd->duplex == DUPLEX_HALF) ?
689 ETH_LINK_HALF_DUPLEX : ETH_LINK_FULL_DUPLEX);
690 dev_link.link_autoneg = !(dev->data->dev_conf.link_speeds &
691 ETH_LINK_SPEED_FIXED);
692 if ((dev_link.link_speed && !dev_link.link_status) ||
693 (!dev_link.link_speed && dev_link.link_status)) {
702 * DPDK callback to retrieve physical link information.
705 * Pointer to Ethernet device structure.
706 * @param wait_to_complete
707 * Wait for request completion.
710 * 0 if link status was not updated, positive if it was, a negative errno
711 * value otherwise and rte_errno is set.
714 mlx5_link_update(struct rte_eth_dev *dev, int wait_to_complete)
717 struct rte_eth_link dev_link;
718 time_t start_time = time(NULL);
721 ret = mlx5_link_update_unlocked_gs(dev, &dev_link);
723 ret = mlx5_link_update_unlocked_gset(dev, &dev_link);
726 /* Handle wait to complete situation. */
727 if (wait_to_complete && ret == -EAGAIN) {
728 if (abs((int)difftime(time(NULL), start_time)) <
729 MLX5_LINK_STATUS_TIMEOUT) {
736 } else if (ret < 0) {
739 } while (wait_to_complete);
740 ret = !!memcmp(&dev->data->dev_link, &dev_link,
741 sizeof(struct rte_eth_link));
742 dev->data->dev_link = dev_link;
747 * DPDK callback to change the MTU.
750 * Pointer to Ethernet device structure.
755 * 0 on success, a negative errno value otherwise and rte_errno is set.
758 mlx5_dev_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
760 struct priv *priv = dev->data->dev_private;
761 uint16_t kern_mtu = 0;
764 ret = mlx5_get_mtu(dev, &kern_mtu);
767 /* Set kernel interface MTU first. */
768 ret = mlx5_set_mtu(dev, mtu);
771 ret = mlx5_get_mtu(dev, &kern_mtu);
774 if (kern_mtu == mtu) {
776 DRV_LOG(DEBUG, "port %u adapter MTU set to %u",
777 dev->data->port_id, mtu);
785 * DPDK callback to get flow control status.
788 * Pointer to Ethernet device structure.
789 * @param[out] fc_conf
790 * Flow control output buffer.
793 * 0 on success, a negative errno value otherwise and rte_errno is set.
796 mlx5_dev_get_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
799 struct ethtool_pauseparam ethpause = {
800 .cmd = ETHTOOL_GPAUSEPARAM
804 ifr.ifr_data = (void *)ðpause;
805 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr);
808 "port %u ioctl(SIOCETHTOOL, ETHTOOL_GPAUSEPARAM) failed:"
810 dev->data->port_id, strerror(rte_errno));
813 fc_conf->autoneg = ethpause.autoneg;
814 if (ethpause.rx_pause && ethpause.tx_pause)
815 fc_conf->mode = RTE_FC_FULL;
816 else if (ethpause.rx_pause)
817 fc_conf->mode = RTE_FC_RX_PAUSE;
818 else if (ethpause.tx_pause)
819 fc_conf->mode = RTE_FC_TX_PAUSE;
821 fc_conf->mode = RTE_FC_NONE;
826 * DPDK callback to modify flow control parameters.
829 * Pointer to Ethernet device structure.
831 * Flow control parameters.
834 * 0 on success, a negative errno value otherwise and rte_errno is set.
837 mlx5_dev_set_flow_ctrl(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
840 struct ethtool_pauseparam ethpause = {
841 .cmd = ETHTOOL_SPAUSEPARAM
845 ifr.ifr_data = (void *)ðpause;
846 ethpause.autoneg = fc_conf->autoneg;
847 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
848 (fc_conf->mode & RTE_FC_RX_PAUSE))
849 ethpause.rx_pause = 1;
851 ethpause.rx_pause = 0;
853 if (((fc_conf->mode & RTE_FC_FULL) == RTE_FC_FULL) ||
854 (fc_conf->mode & RTE_FC_TX_PAUSE))
855 ethpause.tx_pause = 1;
857 ethpause.tx_pause = 0;
858 ret = mlx5_ifreq(dev, SIOCETHTOOL, &ifr);
861 "port %u ioctl(SIOCETHTOOL, ETHTOOL_SPAUSEPARAM)"
863 dev->data->port_id, strerror(rte_errno));
870 * Get PCI information from struct ibv_device.
873 * Pointer to Ethernet device structure.
874 * @param[out] pci_addr
875 * PCI bus address output buffer.
878 * 0 on success, a negative errno value otherwise and rte_errno is set.
881 mlx5_ibv_device_to_pci_addr(const struct ibv_device *device,
882 struct rte_pci_addr *pci_addr)
886 MKSTR(path, "%s/device/uevent", device->ibdev_path);
888 file = fopen(path, "rb");
893 while (fgets(line, sizeof(line), file) == line) {
894 size_t len = strlen(line);
897 /* Truncate long lines. */
898 if (len == (sizeof(line) - 1))
899 while (line[(len - 1)] != '\n') {
903 line[(len - 1)] = ret;
905 /* Extract information. */
908 "%" SCNx32 ":%" SCNx8 ":%" SCNx8 ".%" SCNx8 "\n",
912 &pci_addr->function) == 4) {
922 * Device status handler.
925 * Pointer to Ethernet device.
927 * Pointer to event flags holder.
930 * Events bitmap of callback process which can be called immediately.
933 mlx5_dev_status_handler(struct rte_eth_dev *dev)
935 struct priv *priv = dev->data->dev_private;
936 struct ibv_async_event event;
939 if (mlx5_link_update(dev, 0) == -EAGAIN) {
943 /* Read all message and acknowledge them. */
945 if (ibv_get_async_event(priv->ctx, &event))
947 if ((event.event_type == IBV_EVENT_PORT_ACTIVE ||
948 event.event_type == IBV_EVENT_PORT_ERR) &&
949 (dev->data->dev_conf.intr_conf.lsc == 1))
950 ret |= (1 << RTE_ETH_EVENT_INTR_LSC);
951 else if (event.event_type == IBV_EVENT_DEVICE_FATAL &&
952 dev->data->dev_conf.intr_conf.rmv == 1)
953 ret |= (1 << RTE_ETH_EVENT_INTR_RMV);
956 "port %u event type %d on not handled",
957 dev->data->port_id, event.event_type);
958 ibv_ack_async_event(&event);
964 * Handle interrupts from the NIC.
966 * @param[in] intr_handle
972 mlx5_dev_interrupt_handler(void *cb_arg)
974 struct rte_eth_dev *dev = cb_arg;
977 events = mlx5_dev_status_handler(dev);
978 if (events & (1 << RTE_ETH_EVENT_INTR_LSC))
979 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_LSC, NULL,
981 if (events & (1 << RTE_ETH_EVENT_INTR_RMV))
982 _rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_INTR_RMV, NULL,
987 * Handle interrupts from the socket.
993 mlx5_dev_handler_socket(void *cb_arg)
995 struct rte_eth_dev *dev = cb_arg;
997 mlx5_socket_handle(dev);
1001 * Uninstall interrupt handler.
1004 * Pointer to Ethernet device.
1007 mlx5_dev_interrupt_handler_uninstall(struct rte_eth_dev *dev)
1009 struct priv *priv = dev->data->dev_private;
1011 if (dev->data->dev_conf.intr_conf.lsc ||
1012 dev->data->dev_conf.intr_conf.rmv)
1013 rte_intr_callback_unregister(&priv->intr_handle,
1014 mlx5_dev_interrupt_handler, dev);
1015 if (priv->primary_socket)
1016 rte_intr_callback_unregister(&priv->intr_handle_socket,
1017 mlx5_dev_handler_socket, dev);
1018 priv->intr_handle.fd = 0;
1019 priv->intr_handle.type = RTE_INTR_HANDLE_UNKNOWN;
1020 priv->intr_handle_socket.fd = 0;
1021 priv->intr_handle_socket.type = RTE_INTR_HANDLE_UNKNOWN;
1025 * Install interrupt handler.
1028 * Pointer to Ethernet device.
1031 mlx5_dev_interrupt_handler_install(struct rte_eth_dev *dev)
1033 struct priv *priv = dev->data->dev_private;
1037 assert(priv->ctx->async_fd > 0);
1038 flags = fcntl(priv->ctx->async_fd, F_GETFL);
1039 ret = fcntl(priv->ctx->async_fd, F_SETFL, flags | O_NONBLOCK);
1042 "port %u failed to change file descriptor async event"
1044 dev->data->port_id);
1045 dev->data->dev_conf.intr_conf.lsc = 0;
1046 dev->data->dev_conf.intr_conf.rmv = 0;
1048 if (dev->data->dev_conf.intr_conf.lsc ||
1049 dev->data->dev_conf.intr_conf.rmv) {
1050 priv->intr_handle.fd = priv->ctx->async_fd;
1051 priv->intr_handle.type = RTE_INTR_HANDLE_EXT;
1052 rte_intr_callback_register(&priv->intr_handle,
1053 mlx5_dev_interrupt_handler, dev);
1055 ret = mlx5_socket_init(dev);
1057 DRV_LOG(ERR, "port %u cannot initialise socket: %s",
1058 dev->data->port_id, strerror(rte_errno));
1059 else if (priv->primary_socket) {
1060 priv->intr_handle_socket.fd = priv->primary_socket;
1061 priv->intr_handle_socket.type = RTE_INTR_HANDLE_EXT;
1062 rte_intr_callback_register(&priv->intr_handle_socket,
1063 mlx5_dev_handler_socket, dev);
1068 * DPDK callback to bring the link DOWN.
1071 * Pointer to Ethernet device structure.
1074 * 0 on success, a negative errno value otherwise and rte_errno is set.
1077 mlx5_set_link_down(struct rte_eth_dev *dev)
1079 return mlx5_set_flags(dev, ~IFF_UP, ~IFF_UP);
1083 * DPDK callback to bring the link UP.
1086 * Pointer to Ethernet device structure.
1089 * 0 on success, a negative errno value otherwise and rte_errno is set.
1092 mlx5_set_link_up(struct rte_eth_dev *dev)
1094 return mlx5_set_flags(dev, ~IFF_UP, IFF_UP);
1098 * Configure the TX function to use.
1101 * Pointer to rte_eth_dev structure.
1104 * Pointer to selected Tx burst function.
1107 mlx5_select_tx_function(struct rte_eth_dev *dev)
1109 struct priv *priv = dev->data->dev_private;
1110 eth_tx_burst_t tx_pkt_burst = mlx5_tx_burst;
1112 /* Select appropriate TX function. */
1113 if (priv->mps == MLX5_MPW_ENHANCED) {
1114 if (mlx5_check_vec_tx_support(dev) > 0) {
1115 if (mlx5_check_raw_vec_tx_support(dev) > 0)
1116 tx_pkt_burst = mlx5_tx_burst_raw_vec;
1118 tx_pkt_burst = mlx5_tx_burst_vec;
1120 "port %u selected enhanced MPW Tx vectorized"
1122 dev->data->port_id);
1124 tx_pkt_burst = mlx5_tx_burst_empw;
1126 "port %u selected enhanced MPW Tx function",
1127 dev->data->port_id);
1129 } else if (priv->mps && priv->txq_inline) {
1130 tx_pkt_burst = mlx5_tx_burst_mpw_inline;
1131 DRV_LOG(DEBUG, "port %u selected MPW inline Tx function",
1132 dev->data->port_id);
1133 } else if (priv->mps) {
1134 tx_pkt_burst = mlx5_tx_burst_mpw;
1135 DRV_LOG(DEBUG, "port %u selected MPW Tx function",
1136 dev->data->port_id);
1138 return tx_pkt_burst;
1142 * Configure the RX function to use.
1145 * Pointer to rte_eth_dev structure.
1148 * Pointer to selected Rx burst function.
1151 mlx5_select_rx_function(struct rte_eth_dev *dev)
1153 eth_rx_burst_t rx_pkt_burst = mlx5_rx_burst;
1155 assert(dev != NULL);
1156 if (mlx5_check_vec_rx_support(dev) > 0) {
1157 rx_pkt_burst = mlx5_rx_burst_vec;
1158 DRV_LOG(DEBUG, "port %u selected Rx vectorized function",
1159 dev->data->port_id);
1161 return rx_pkt_burst;