drivers/net/octeontx/octeontx_ethdev.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2017 Cavium, Inc
   3  */
   4
   5 #ifndef __OCTEONTX_ETHDEV_H__
   6 #define __OCTEONTX_ETHDEV_H__
   7
   8 #include <stdbool.h>
   9
  10 #include <rte_common.h>
  11 #include <rte_ethdev_driver.h>
  12 #include <rte_eventdev.h>
  13 #include <rte_mempool.h>
  14 #include <rte_memory.h>
  15
  16 #include <octeontx_fpavf.h>
  17
  18 #include "base/octeontx_bgx.h"
  19 #include "base/octeontx_pki_var.h"
  20 #include "base/octeontx_pkivf.h"
  21 #include "base/octeontx_pkovf.h"
  22 #include "base/octeontx_io.h"
  23
  24 #define OCTEONTX_VDEV_DEFAULT_MAX_NR_PORT       12
  25 #define OCTEONTX_VDEV_NR_PORT_ARG               ("nr_port")
  26 #define OCTEONTX_MAX_NAME_LEN                   32
  27
  28 #define OCTEONTX_MAX_BGX_PORTS                  4
  29 #define OCTEONTX_MAX_LMAC_PER_BGX               4
  30
  31 #define OCTEONTX_RX_OFFLOADS                    (DEV_RX_OFFLOAD_CRC_STRIP \
  32                                                 | DEV_RX_OFFLOAD_CHECKSUM)
  33 #define OCTEONTX_TX_OFFLOADS                    DEV_TX_OFFLOAD_MT_LOCKFREE
  34
  35 static inline struct octeontx_nic *
  36 octeontx_pmd_priv(struct rte_eth_dev *dev)
  37 {
  38         return dev->data->dev_private;
  39 }
  40
  41 extern uint16_t
  42 rte_octeontx_pchan_map[OCTEONTX_MAX_BGX_PORTS][OCTEONTX_MAX_LMAC_PER_BGX];
  43
  44 /* Octeontx ethdev nic */
  45 struct octeontx_nic {
  46         struct rte_eth_dev *dev;
  47         int node;
  48         int port_id;
  49         int port_ena;
  50         int base_ichan;
  51         int num_ichans;
  52         int base_ochan;
  53         int num_ochans;
  54         uint8_t evdev;
  55         uint8_t bpen;
  56         uint8_t fcs_strip;
  57         uint8_t bcast_mode;
  58         uint8_t mcast_mode;
  59         uint16_t num_tx_queues;
  60         uint64_t hwcap;
  61         uint8_t link_up;
  62         uint8_t duplex;
  63         uint8_t speed;
  64         uint16_t mtu;
  65         uint8_t mac_addr[ETHER_ADDR_LEN];
  66         /* Rx port parameters */
  67         struct {
  68                 bool classifier_enable;
  69                 bool hash_enable;
  70                 bool initialized;
  71         } pki;
  72
  73         uint16_t ev_queues;
  74         uint16_t ev_ports;
  75 } __rte_cache_aligned;
  76
  77 struct octeontx_txq {
  78         uint16_t queue_id;
  79         octeontx_dq_t dq;
  80         struct rte_eth_dev *eth_dev;
  81 } __rte_cache_aligned;
  82
  83 struct octeontx_rxq {
  84         uint16_t queue_id;
  85         uint16_t port_id;
  86         uint8_t evdev;
  87         struct rte_eth_dev *eth_dev;
  88         uint16_t ev_queues;
  89         uint16_t ev_ports;
  90 } __rte_cache_aligned;
  91
  92 #endif /* __OCTEONTX_ETHDEV_H__ */