drivers/net/qede/base/ecore_gtt_reg_addr.h

   1 /*
   2  * Copyright (c) 2016 QLogic Corporation.
   3  * All rights reserved.
   4  * www.qlogic.com
   5  *
   6  * See LICENSE.qede_pmd for copyright and licensing details.
   7  */
   8
   9 #ifndef GTT_REG_ADDR_H
  10 #define GTT_REG_ADDR_H
  11
  12 /* Win 2 */
  13 /* Access:RW   DataWidth:0x20    Chips: BB_A0 BB_B0 K2 */
  14 #define GTT_BAR0_MAP_REG_IGU_CMD                                      0x00f000UL
  15
  16 /* Win 3 */
  17 /* Access:RW   DataWidth:0x20    Chips: BB_A0 BB_B0 K2 */
  18 #define GTT_BAR0_MAP_REG_TSDM_RAM                                     0x010000UL
  19
  20 /* Win 4 */
  21 /* Access:RW   DataWidth:0x20    Chips: BB_A0 BB_B0 K2 */
  22 #define GTT_BAR0_MAP_REG_MSDM_RAM                                     0x011000UL
  23
  24 /* Win 5 */
  25 /* Access:RW   DataWidth:0x20    Chips: BB_A0 BB_B0 K2 */
  26 #define GTT_BAR0_MAP_REG_MSDM_RAM_1024                                0x012000UL
  27
  28 /* Win 6 */
  29 /* Access:RW   DataWidth:0x20    Chips: BB_A0 BB_B0 K2 */
  30 #define GTT_BAR0_MAP_REG_USDM_RAM                                     0x013000UL
  31
  32 /* Win 7 */
  33 /* Access:RW   DataWidth:0x20    Chips: BB_A0 BB_B0 K2 */
  34 #define GTT_BAR0_MAP_REG_USDM_RAM_1024                                0x014000UL
  35
  36 /* Win 8 */
  37 /* Access:RW   DataWidth:0x20    Chips: BB_A0 BB_B0 K2 */
  38 #define GTT_BAR0_MAP_REG_USDM_RAM_2048                                0x015000UL
  39
  40 /* Win 9 */
  41 /* Access:RW   DataWidth:0x20    Chips: BB_A0 BB_B0 K2 */
  42 #define GTT_BAR0_MAP_REG_XSDM_RAM                                     0x016000UL
  43
  44 /* Win 10 */
  45 /* Access:RW   DataWidth:0x20    Chips: BB_A0 BB_B0 K2 */
  46 #define GTT_BAR0_MAP_REG_YSDM_RAM                                     0x017000UL
  47
  48 /* Win 11 */
  49 /* Access:RW   DataWidth:0x20    Chips: BB_A0 BB_B0 K2 */
  50 #define GTT_BAR0_MAP_REG_PSDM_RAM                                     0x018000UL
  51
  52 #endif