drivers/net/qede/base/ecore_init_ops.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright (c) 2016 - 2018 Cavium Inc.
   3  * All rights reserved.
   4  * www.cavium.com
   5  */
   6
   7 #ifndef __ECORE_INIT_OPS__
   8 #define __ECORE_INIT_OPS__
   9
  10 #include "ecore.h"
  11
  12 /**
  13  * @brief ecore_init_iro_array - init iro_arr.
  14  *
  15  *
  16  * @param p_dev
  17  */
  18 void ecore_init_iro_array(struct ecore_dev *p_dev);
  19
  20 /**
  21  * @brief ecore_init_run - Run the init-sequence.
  22  *
  23  *
  24  * @param p_hwfn
  25  * @param p_ptt
  26  * @param phase
  27  * @param phase_id
  28  * @param modes
  29  * @return _ecore_status_t
  30  */
  31 enum _ecore_status_t ecore_init_run(struct ecore_hwfn *p_hwfn,
  32                                     struct ecore_ptt *p_ptt,
  33                                     int               phase,
  34                                     int               phase_id,
  35                                     int               modes);
  36
  37 /**
  38  * @brief ecore_init_hwfn_allocate - Allocate RT array, Store 'values' ptrs.
  39  *
  40  *
  41  * @param p_hwfn
  42  *
  43  * @return _ecore_status_t
  44  */
  45 enum _ecore_status_t ecore_init_alloc(struct ecore_hwfn *p_hwfn);
  46
  47 /**
  48  * @brief ecore_init_hwfn_deallocate
  49  *
  50  *
  51  * @param p_hwfn
  52  */
  53 void ecore_init_free(struct ecore_hwfn *p_hwfn);
  54
  55
  56 /**
  57  * @brief ecore_init_clear_rt_data - Clears the runtime init array.
  58  *
  59  *
  60  * @param p_hwfn
  61  */
  62 void ecore_init_clear_rt_data(struct ecore_hwfn *p_hwfn);
  63
  64 /**
  65  * @brief ecore_init_store_rt_reg - Store a configuration value in the RT array.
  66  *
  67  *
  68  * @param p_hwfn
  69  * @param rt_offset
  70  * @param val
  71  */
  72 void ecore_init_store_rt_reg(struct ecore_hwfn *p_hwfn,
  73                              u32               rt_offset,
  74                              u32               val);
  75
  76 #define STORE_RT_REG(hwfn, offset, val)                         \
  77         ecore_init_store_rt_reg(hwfn, offset, val)
  78
  79 #define OVERWRITE_RT_REG(hwfn, offset, val)                     \
  80         ecore_init_store_rt_reg(hwfn, offset, val)
  81
  82 /**
  83 * @brief
  84 *
  85 *
  86 * @param p_hwfn
  87 * @param rt_offset
  88 * @param val
  89 * @param size
  90 */
  91
  92 void ecore_init_store_rt_agg(struct ecore_hwfn *p_hwfn,
  93                              u32               rt_offset,
  94                              u32               *val,
  95                              osal_size_t       size);
  96
  97 #define STORE_RT_REG_AGG(hwfn, offset, val)                     \
  98         ecore_init_store_rt_agg(hwfn, offset, (u32 *)&val, sizeof(val))
  99
 100
 101 /**
 102  * @brief
 103  *      Initialize GTT global windows and set admin window
 104  *      related params of GTT/PTT to default values.
 105  *
 106  * @param p_hwfn
 107  */
 108 void ecore_gtt_init(struct ecore_hwfn *p_hwfn,
 109                     struct ecore_ptt *p_ptt);
 110 #endif /* __ECORE_INIT_OPS__ */