New upstream version 18.08
[deb_dpdk.git] / drivers / net / qede / base / ecore_int_api.h
1 /* SPDX-License-Identifier: BSD-3-Clause
2  * Copyright (c) 2016 - 2018 Cavium Inc.
3  * All rights reserved.
4  * www.cavium.com
5  */
6
7 #ifndef __ECORE_INT_API_H__
8 #define __ECORE_INT_API_H__
9
10 #ifndef __EXTRACT__LINUX__
11 #define ECORE_SB_IDX            0x0002
12
13 #define RX_PI           0
14 #define TX_PI(tc)       (RX_PI + 1 + tc)
15
16 #ifndef ECORE_INT_MODE
17 #define ECORE_INT_MODE
18 enum ecore_int_mode {
19         ECORE_INT_MODE_INTA,
20         ECORE_INT_MODE_MSIX,
21         ECORE_INT_MODE_MSI,
22         ECORE_INT_MODE_POLL,
23 };
24 #endif
25
26 struct ecore_sb_info {
27         struct status_block_e4 *sb_virt;
28         dma_addr_t sb_phys;
29         u32 sb_ack;             /* Last given ack */
30         u16 igu_sb_id;
31         void OSAL_IOMEM *igu_addr;
32         u8 flags;
33 #define ECORE_SB_INFO_INIT      0x1
34 #define ECORE_SB_INFO_SETUP     0x2
35
36 #ifdef ECORE_CONFIG_DIRECT_HWFN
37         struct ecore_hwfn *p_hwfn;
38 #endif
39         struct ecore_dev *p_dev;
40 };
41
42 struct ecore_sb_info_dbg {
43         u32 igu_prod;
44         u32 igu_cons;
45         u16 pi[PIS_PER_SB_E4];
46 };
47
48 struct ecore_sb_cnt_info {
49         /* Original, current, and free SBs for PF */
50         int orig;
51         int cnt;
52         int free_cnt;
53
54         /* Original, current and free SBS for child VFs */
55         int iov_orig;
56         int iov_cnt;
57         int free_cnt_iov;
58 };
59
60 static OSAL_INLINE u16 ecore_sb_update_sb_idx(struct ecore_sb_info *sb_info)
61 {
62         u32 prod = 0;
63         u16 rc = 0;
64
65         /* barrier(); status block is written to by the chip */
66         /* FIXME: need some sort of barrier. */
67         prod = OSAL_LE32_TO_CPU(sb_info->sb_virt->prod_index) &
68             STATUS_BLOCK_E4_PROD_INDEX_MASK;
69         if (sb_info->sb_ack != prod) {
70                 sb_info->sb_ack = prod;
71                 rc |= ECORE_SB_IDX;
72         }
73
74         OSAL_MMIOWB(sb_info->p_dev);
75         return rc;
76 }
77
78 /**
79  *
80  * @brief This function creates an update command for interrupts that is
81  *        written to the IGU.
82  *
83  * @param sb_info       - This is the structure allocated and
84  *         initialized per status block. Assumption is
85  *         that it was initialized using ecore_sb_init
86  * @param int_cmd       - Enable/Disable/Nop
87  * @param upd_flg       - whether igu consumer should be
88  *         updated.
89  *
90  * @return OSAL_INLINE void
91  */
92 static OSAL_INLINE void ecore_sb_ack(struct ecore_sb_info *sb_info,
93                                      enum igu_int_cmd int_cmd, u8 upd_flg)
94 {
95         struct igu_prod_cons_update igu_ack = { 0 };
96
97         igu_ack.sb_id_and_flags =
98             ((sb_info->sb_ack << IGU_PROD_CONS_UPDATE_SB_INDEX_SHIFT) |
99              (upd_flg << IGU_PROD_CONS_UPDATE_UPDATE_FLAG_SHIFT) |
100              (int_cmd << IGU_PROD_CONS_UPDATE_ENABLE_INT_SHIFT) |
101              (IGU_SEG_ACCESS_REG << IGU_PROD_CONS_UPDATE_SEGMENT_ACCESS_SHIFT));
102
103 #ifdef ECORE_CONFIG_DIRECT_HWFN
104         DIRECT_REG_WR(sb_info->p_hwfn, sb_info->igu_addr,
105                       igu_ack.sb_id_and_flags);
106 #else
107         DIRECT_REG_WR(OSAL_NULL, sb_info->igu_addr, igu_ack.sb_id_and_flags);
108 #endif
109         /* Both segments (interrupts & acks) are written to same place address;
110          * Need to guarantee all commands will be received (in-order) by HW.
111          */
112         OSAL_MMIOWB(sb_info->p_dev);
113         OSAL_BARRIER(sb_info->p_dev);
114 }
115
116 #ifdef ECORE_CONFIG_DIRECT_HWFN
117 static OSAL_INLINE void __internal_ram_wr(struct ecore_hwfn *p_hwfn,
118                                           void OSAL_IOMEM *addr,
119                                           int size, u32 *data)
120 #else
121 static OSAL_INLINE void __internal_ram_wr(__rte_unused void *p_hwfn,
122                                           void OSAL_IOMEM *addr,
123                                           int size, u32 *data)
124 #endif
125 {
126         unsigned int i;
127
128         for (i = 0; i < size / sizeof(*data); i++)
129                 DIRECT_REG_WR(p_hwfn, &((u32 OSAL_IOMEM *)addr)[i], data[i]);
130 }
131
132 #ifdef ECORE_CONFIG_DIRECT_HWFN
133 static OSAL_INLINE void __internal_ram_wr_relaxed(struct ecore_hwfn *p_hwfn,
134                                                   void OSAL_IOMEM * addr,
135                                                   int size, u32 *data)
136 #else
137 static OSAL_INLINE void __internal_ram_wr_relaxed(__rte_unused void *p_hwfn,
138                                                   void OSAL_IOMEM * addr,
139                                                   int size, u32 *data)
140 #endif
141 {
142         unsigned int i;
143
144         for (i = 0; i < size / sizeof(*data); i++)
145                 DIRECT_REG_WR_RELAXED(p_hwfn, &((u32 OSAL_IOMEM *)addr)[i],
146                                       data[i]);
147 }
148
149 #ifdef ECORE_CONFIG_DIRECT_HWFN
150 static OSAL_INLINE void internal_ram_wr(struct ecore_hwfn *p_hwfn,
151                                                 void OSAL_IOMEM * addr,
152                                                 int size, u32 *data)
153 {
154         __internal_ram_wr_relaxed(p_hwfn, addr, size, data);
155 }
156 #else
157 static OSAL_INLINE void internal_ram_wr(void OSAL_IOMEM *addr,
158                                                 int size, u32 *data)
159 {
160         __internal_ram_wr_relaxed(OSAL_NULL, addr, size, data);
161 }
162 #endif
163
164 #endif
165
166 struct ecore_hwfn;
167 struct ecore_ptt;
168
169 enum ecore_coalescing_fsm {
170         ECORE_COAL_RX_STATE_MACHINE,
171         ECORE_COAL_TX_STATE_MACHINE
172 };
173
174 /**
175  * @brief ecore_int_cau_conf_pi - configure cau for a given
176  *        status block
177  *
178  * @param p_hwfn
179  * @param p_ptt
180  * @param p_sb
181  * @param pi_index
182  * @param state
183  * @param timeset
184  */
185 void ecore_int_cau_conf_pi(struct ecore_hwfn            *p_hwfn,
186                            struct ecore_ptt             *p_ptt,
187                            struct ecore_sb_info         *p_sb,
188                            u32                          pi_index,
189                            enum ecore_coalescing_fsm    coalescing_fsm,
190                            u8                           timeset);
191
192 /**
193  *
194  * @brief ecore_int_igu_enable_int - enable device interrupts
195  *
196  * @param p_hwfn
197  * @param p_ptt
198  * @param int_mode - interrupt mode to use
199  */
200 void ecore_int_igu_enable_int(struct ecore_hwfn *p_hwfn,
201                               struct ecore_ptt *p_ptt,
202                               enum ecore_int_mode int_mode);
203
204 /**
205  *
206  * @brief ecore_int_igu_disable_int - disable device interrupts
207  *
208  * @param p_hwfn
209  * @param p_ptt
210  */
211 void ecore_int_igu_disable_int(struct ecore_hwfn *p_hwfn,
212                                struct ecore_ptt *p_ptt);
213
214 /**
215  *
216  * @brief ecore_int_igu_read_sisr_reg - Reads the single isr multiple dpc
217  *        register from igu.
218  *
219  * @param p_hwfn
220  *
221  * @return u64
222  */
223 u64 ecore_int_igu_read_sisr_reg(struct ecore_hwfn *p_hwfn);
224
225 #define ECORE_SP_SB_ID 0xffff
226
227 /**
228  * @brief ecore_int_sb_init - Initializes the sb_info structure.
229  *
230  * once the structure is initialized it can be passed to sb related functions.
231  *
232  * @param p_hwfn
233  * @param p_ptt
234  * @param sb_info       points to an uninitialized (but
235  *                      allocated) sb_info structure
236  * @param sb_virt_addr
237  * @param sb_phy_addr
238  * @param sb_id         the sb_id to be used (zero based in driver)
239  *                      should use ECORE_SP_SB_ID for SP Status block
240  *
241  * @return enum _ecore_status_t
242  */
243 enum _ecore_status_t ecore_int_sb_init(struct ecore_hwfn *p_hwfn,
244                                        struct ecore_ptt *p_ptt,
245                                        struct ecore_sb_info *sb_info,
246                                        void *sb_virt_addr,
247                                        dma_addr_t sb_phy_addr, u16 sb_id);
248 /**
249  * @brief ecore_int_sb_setup - Setup the sb.
250  *
251  * @param p_hwfn
252  * @param p_ptt
253  * @param sb_info       initialized sb_info structure
254  */
255 void ecore_int_sb_setup(struct ecore_hwfn *p_hwfn,
256                         struct ecore_ptt *p_ptt, struct ecore_sb_info *sb_info);
257
258 /**
259  * @brief ecore_int_sb_release - releases the sb_info structure.
260  *
261  * once the structure is released, it's memory can be freed
262  *
263  * @param p_hwfn
264  * @param sb_info       points to an allocated sb_info structure
265  * @param sb_id         the sb_id to be used (zero based in driver)
266  *                      should never be equal to ECORE_SP_SB_ID
267  *                      (SP Status block)
268  *
269  * @return enum _ecore_status_t
270  */
271 enum _ecore_status_t ecore_int_sb_release(struct ecore_hwfn *p_hwfn,
272                                           struct ecore_sb_info *sb_info,
273                                           u16 sb_id);
274
275 /**
276  * @brief ecore_int_sp_dpc - To be called when an interrupt is received on the
277  *        default status block.
278  *
279  * @param p_hwfn - pointer to hwfn
280  *
281  */
282 void ecore_int_sp_dpc(osal_int_ptr_t hwfn_cookie);
283
284 /**
285  * @brief ecore_int_get_num_sbs - get the number of status
286  *        blocks configured for this funciton in the igu.
287  *
288  * @param p_hwfn
289  * @param p_sb_cnt_info
290  *
291  * @return
292  */
293 void ecore_int_get_num_sbs(struct ecore_hwfn *p_hwfn,
294                            struct ecore_sb_cnt_info *p_sb_cnt_info);
295
296 /**
297  * @brief ecore_int_disable_post_isr_release - performs the cleanup post ISR
298  *        release. The API need to be called after releasing all slowpath IRQs
299  *        of the device.
300  *
301  * @param p_dev
302  *
303  */
304 void ecore_int_disable_post_isr_release(struct ecore_dev *p_dev);
305
306 /**
307  * @brief ecore_int_attn_clr_enable - sets whether the general behavior is
308  *        preventing attentions from being reasserted, or following the
309  *        attributes of the specific attention.
310  *
311  * @param p_dev
312  * @param clr_enable
313  *
314  */
315 void ecore_int_attn_clr_enable(struct ecore_dev *p_dev, bool clr_enable);
316
317 /**
318  * @brief Read debug information regarding a given SB.
319  *
320  * @param p_hwfn
321  * @param p_ptt
322  * @param p_sb - point to Status block for which we want to get info.
323  * @param p_info - pointer to struct to fill with information regarding SB.
324  *
325  * @return ECORE_SUCCESS if pointer is filled; failure otherwise.
326  */
327 enum _ecore_status_t ecore_int_get_sb_dbg(struct ecore_hwfn *p_hwfn,
328                                           struct ecore_ptt *p_ptt,
329                                           struct ecore_sb_info *p_sb,
330                                           struct ecore_sb_info_dbg *p_info);
331
332 /**
333  * @brief - Move a free Status block between PF and child VF
334  *
335  * @param p_hwfn
336  * @param p_ptt
337  * @param sb_id - The PF fastpath vector to be moved [re-assigned if claiming
338  *                from VF, given-up if moving to VF]
339  * @param b_to_vf - PF->VF == true, VF->PF == false
340  *
341  * @return ECORE_SUCCESS if SB successfully moved.
342  */
343 enum _ecore_status_t
344 ecore_int_igu_relocate_sb(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
345                           u16 sb_id, bool b_to_vf);
346 #endif