New upstream version 18.02
[deb_dpdk.git] / drivers / net / qede / base / ecore_proto_if.h
1 /*
2  * Copyright (c) 2016 QLogic Corporation.
3  * All rights reserved.
4  * www.qlogic.com
5  *
6  * See LICENSE.qede_pmd for copyright and licensing details.
7  */
8
9 #ifndef __ECORE_PROTO_IF_H__
10 #define __ECORE_PROTO_IF_H__
11
12 /*
13  * PF parameters (according to personality/protocol)
14  */
15
16 #define ECORE_ROCE_PROTOCOL_INDEX       (3)
17
18 struct ecore_eth_pf_params {
19         /* The following parameters are used during HW-init
20          * and these parameters need to be passed as arguments
21          * to update_pf_params routine invoked before slowpath start
22          */
23         u16     num_cons;
24
25         /* per-VF number of CIDs */
26         u8      num_vf_cons;
27 #define ETH_PF_PARAMS_VF_CONS_DEFAULT   (32)
28
29         /* To enable arfs, previous to HW-init a positive number needs to be
30          * set [as filters require allocated searcher ILT memory].
31          * This will set the maximal number of configured steering-filters.
32          */
33         u32     num_arfs_filters;
34 };
35
36 /* Most of the parameters below are described in the FW iSCSI / TCP HSI */
37 struct ecore_iscsi_pf_params {
38         u64             glbl_q_params_addr;
39         u64             bdq_pbl_base_addr[2];
40         u16             cq_num_entries;
41         u16             cmdq_num_entries;
42         u32             two_msl_timer;
43         u16             tx_sws_timer;
44         /* The following parameters are used during HW-init
45          * and these parameters need to be passed as arguments
46          * to update_pf_params routine invoked before slowpath start
47          */
48         u16             num_cons;
49         u16             num_tasks;
50
51         /* The following parameters are used during protocol-init */
52         u16             half_way_close_timeout;
53         u16             bdq_xoff_threshold[2];
54         u16             bdq_xon_threshold[2];
55         u16             cmdq_xoff_threshold;
56         u16             cmdq_xon_threshold;
57         u16             rq_buffer_size;
58
59         u8              num_sq_pages_in_ring;
60         u8              num_r2tq_pages_in_ring;
61         u8              num_uhq_pages_in_ring;
62         u8              num_queues;
63         u8              log_page_size;
64         u8              rqe_log_size;
65         u8              max_fin_rt;
66         u8              gl_rq_pi;
67         u8              gl_cmd_pi;
68         u8              debug_mode;
69         u8              ll2_ooo_queue_id;
70         u8              ooo_enable;
71
72         u8              is_target;
73         u8              bdq_pbl_num_entries[2];
74         u8              disable_stats_collection;
75 };
76
77 enum ecore_rdma_protocol {
78         ECORE_RDMA_PROTOCOL_DEFAULT,
79         ECORE_RDMA_PROTOCOL_ROCE,
80         ECORE_RDMA_PROTOCOL_IWARP,
81 };
82
83 struct ecore_rdma_pf_params {
84         /* Supplied to ECORE during resource allocation (may affect the ILT and
85          * the doorbell BAR).
86          */
87         u32             min_dpis;       /* number of requested DPIs */
88         u32             num_mrs;        /* number of requested memory regions*/
89         u32             num_qps;        /* number of requested Queue Pairs */
90         u32             num_srqs;       /* number of requested SRQ */
91         u8              roce_edpm_mode; /* see QED_ROCE_EDPM_MODE_ENABLE */
92         u8              gl_pi;          /* protocol index */
93
94         /* Will allocate rate limiters to be used with QPs */
95         u8              enable_dcqcn;
96
97         /* TCP port number used for the iwarp traffic */
98         u16             iwarp_port;
99         enum ecore_rdma_protocol rdma_protocol;
100 };
101
102 struct ecore_pf_params {
103         struct ecore_eth_pf_params      eth_pf_params;
104         struct ecore_iscsi_pf_params    iscsi_pf_params;
105         struct ecore_rdma_pf_params     rdma_pf_params;
106 };
107
108 #endif