drivers/net/qede/base/ecore_sriov.c

   1 /*
   2  * Copyright (c) 2016 QLogic Corporation.
   3  * All rights reserved.
   4  * www.qlogic.com
   5  *
   6  * See LICENSE.qede_pmd for copyright and licensing details.
   7  */
   8
   9 #include "bcm_osal.h"
  10 #include "ecore.h"
  11 #include "reg_addr.h"
  12 #include "ecore_sriov.h"
  13 #include "ecore_status.h"
  14 #include "ecore_hw.h"
  15 #include "ecore_hw_defs.h"
  16 #include "ecore_int.h"
  17 #include "ecore_hsi_eth.h"
  18 #include "ecore_l2.h"
  19 #include "ecore_vfpf_if.h"
  20 #include "ecore_rt_defs.h"
  21 #include "ecore_init_ops.h"
  22 #include "ecore_gtt_reg_addr.h"
  23 #include "ecore_iro.h"
  24 #include "ecore_mcp.h"
  25 #include "ecore_cxt.h"
  26 #include "ecore_vf.h"
  27 #include "ecore_init_fw_funcs.h"
  28
  29 /* TEMPORARY until we implement print_enums... */
  30 const char *ecore_channel_tlvs_string[] = {
  31         "CHANNEL_TLV_NONE",     /* ends tlv sequence */
  32         "CHANNEL_TLV_ACQUIRE",
  33         "CHANNEL_TLV_VPORT_START",
  34         "CHANNEL_TLV_VPORT_UPDATE",
  35         "CHANNEL_TLV_VPORT_TEARDOWN",
  36         "CHANNEL_TLV_START_RXQ",
  37         "CHANNEL_TLV_START_TXQ",
  38         "CHANNEL_TLV_STOP_RXQ",
  39         "CHANNEL_TLV_STOP_TXQ",
  40         "CHANNEL_TLV_UPDATE_RXQ",
  41         "CHANNEL_TLV_INT_CLEANUP",
  42         "CHANNEL_TLV_CLOSE",
  43         "CHANNEL_TLV_RELEASE",
  44         "CHANNEL_TLV_LIST_END",
  45         "CHANNEL_TLV_UCAST_FILTER",
  46         "CHANNEL_TLV_VPORT_UPDATE_ACTIVATE",
  47         "CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH",
  48         "CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP",
  49         "CHANNEL_TLV_VPORT_UPDATE_MCAST",
  50         "CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM",
  51         "CHANNEL_TLV_VPORT_UPDATE_RSS",
  52         "CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN",
  53         "CHANNEL_TLV_VPORT_UPDATE_SGE_TPA",
  54         "CHANNEL_TLV_MAX"
  55 };
  56
  57 /* TODO - this is linux crc32; Need a way to ifdef it out for linux */
  58 u32 ecore_crc32(u32 crc, u8 *ptr, u32 length)
  59 {
  60         int i;
  61
  62         while (length--) {
  63                 crc ^= *ptr++;
  64                 for (i = 0; i < 8; i++)
  65                         crc = (crc >> 1) ^ ((crc & 1) ? 0xedb88320 : 0);
  66         }
  67         return crc;
  68 }
  69
  70 enum _ecore_status_t ecore_iov_post_vf_bulletin(struct ecore_hwfn *p_hwfn,
  71                                                 int vfid,
  72                                                 struct ecore_ptt *p_ptt)
  73 {
  74         struct ecore_bulletin_content *p_bulletin;
  75         struct ecore_dmae_params params;
  76         struct ecore_vf_info *p_vf;
  77         int crc_size = sizeof(p_bulletin->crc);
  78
  79         p_vf = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
  80         if (!p_vf)
  81                 return ECORE_INVAL;
  82
  83         /* TODO - check VF is in a state where it can accept message */
  84         if (!p_vf->vf_bulletin)
  85                 return ECORE_INVAL;
  86
  87         p_bulletin = p_vf->bulletin.p_virt;
  88
  89         /* Increment bulletin board version and compute crc */
  90         p_bulletin->version++;
  91         p_bulletin->crc = ecore_crc32(0, (u8 *)p_bulletin + crc_size,
  92                                       p_vf->bulletin.size - crc_size);
  93
  94         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
  95                    "Posting Bulletin 0x%08x to VF[%d] (CRC 0x%08x)\n",
  96                    p_bulletin->version, p_vf->relative_vf_id, p_bulletin->crc);
  97
  98         /* propagate bulletin board via dmae to vm memory */
  99         OSAL_MEMSET(&params, 0, sizeof(params));
 100         params.flags = ECORE_DMAE_FLAG_VF_DST;
 101         params.dst_vfid = p_vf->abs_vf_id;
 102         return ecore_dmae_host2host(p_hwfn, p_ptt, p_vf->bulletin.phys,
 103                                     p_vf->vf_bulletin, p_vf->bulletin.size / 4,
 104                                     &params);
 105 }
 106
 107 static enum _ecore_status_t ecore_iov_pci_cfg_info(struct ecore_dev *p_dev)
 108 {
 109         struct ecore_hw_sriov_info *iov = &p_dev->sriov_info;
 110         int pos = iov->pos;
 111
 112         DP_VERBOSE(p_dev, ECORE_MSG_IOV, "sriov ext pos %d\n", pos);
 113         OSAL_PCI_READ_CONFIG_WORD(p_dev, pos + PCI_SRIOV_CTRL, &iov->ctrl);
 114
 115         OSAL_PCI_READ_CONFIG_WORD(p_dev,
 116                                   pos + PCI_SRIOV_TOTAL_VF, &iov->total_vfs);
 117         OSAL_PCI_READ_CONFIG_WORD(p_dev,
 118                                   pos + PCI_SRIOV_INITIAL_VF,
 119                                   &iov->initial_vfs);
 120
 121         OSAL_PCI_READ_CONFIG_WORD(p_dev, pos + PCI_SRIOV_NUM_VF, &iov->num_vfs);
 122         if (iov->num_vfs) {
 123                 /* @@@TODO - in future we might want to add an OSAL here to
 124                  * allow each OS to decide on its own how to act.
 125                  */
 126                 DP_VERBOSE(p_dev, ECORE_MSG_IOV,
 127                            "Number of VFs are already set to non-zero value."
 128                            " Ignoring PCI configuration value\n");
 129                 iov->num_vfs = 0;
 130         }
 131
 132         OSAL_PCI_READ_CONFIG_WORD(p_dev,
 133                                   pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
 134
 135         OSAL_PCI_READ_CONFIG_WORD(p_dev,
 136                                   pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
 137
 138         OSAL_PCI_READ_CONFIG_WORD(p_dev,
 139                                   pos + PCI_SRIOV_VF_DID, &iov->vf_device_id);
 140
 141         OSAL_PCI_READ_CONFIG_DWORD(p_dev,
 142                                    pos + PCI_SRIOV_SUP_PGSIZE, &iov->pgsz);
 143
 144         OSAL_PCI_READ_CONFIG_DWORD(p_dev, pos + PCI_SRIOV_CAP, &iov->cap);
 145
 146         OSAL_PCI_READ_CONFIG_BYTE(p_dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
 147
 148         DP_VERBOSE(p_dev, ECORE_MSG_IOV, "IOV info[%d]: nres %d, cap 0x%x,"
 149                    "ctrl 0x%x, total %d, initial %d, num vfs %d, offset %d,"
 150                    " stride %d, page size 0x%x\n", 0,
 151                    iov->nres, iov->cap, iov->ctrl,
 152                    iov->total_vfs, iov->initial_vfs, iov->nr_virtfn,
 153                    iov->offset, iov->stride, iov->pgsz);
 154
 155         /* Some sanity checks */
 156         if (iov->num_vfs > NUM_OF_VFS(p_dev) ||
 157             iov->total_vfs > NUM_OF_VFS(p_dev)) {
 158                 /* This can happen only due to a bug. In this case we set
 159                  * num_vfs to zero to avoid memory corruption in the code that
 160                  * assumes max number of vfs
 161                  */
 162                 DP_NOTICE(p_dev, false,
 163                           "IOV: Unexpected number of vfs set: %d"
 164                           " setting num_vf to zero\n",
 165                           iov->num_vfs);
 166
 167                 iov->num_vfs = 0;
 168                 iov->total_vfs = 0;
 169         }
 170
 171         return ECORE_SUCCESS;
 172 }
 173
 174 static void ecore_iov_clear_vf_igu_blocks(struct ecore_hwfn *p_hwfn,
 175                                           struct ecore_ptt *p_ptt)
 176 {
 177         struct ecore_igu_block *p_sb;
 178         u16 sb_id;
 179         u32 val;
 180
 181         if (!p_hwfn->hw_info.p_igu_info) {
 182                 DP_ERR(p_hwfn,
 183                        "ecore_iov_clear_vf_igu_blocks IGU Info not inited\n");
 184                 return;
 185         }
 186
 187         for (sb_id = 0;
 188              sb_id < ECORE_MAPPING_MEMORY_SIZE(p_hwfn->p_dev); sb_id++) {
 189                 p_sb = &p_hwfn->hw_info.p_igu_info->igu_map.igu_blocks[sb_id];
 190                 if ((p_sb->status & ECORE_IGU_STATUS_FREE) &&
 191                     !(p_sb->status & ECORE_IGU_STATUS_PF)) {
 192                         val = ecore_rd(p_hwfn, p_ptt,
 193                                        IGU_REG_MAPPING_MEMORY + sb_id * 4);
 194                         SET_FIELD(val, IGU_MAPPING_LINE_VALID, 0);
 195                         ecore_wr(p_hwfn, p_ptt,
 196                                  IGU_REG_MAPPING_MEMORY + 4 * sb_id, val);
 197                 }
 198         }
 199 }
 200
 201 static void ecore_iov_setup_vfdb(struct ecore_hwfn *p_hwfn)
 202 {
 203         u16 num_vfs = p_hwfn->p_dev->sriov_info.total_vfs;
 204         union pfvf_tlvs *p_reply_virt_addr;
 205         union vfpf_tlvs *p_req_virt_addr;
 206         struct ecore_bulletin_content *p_bulletin_virt;
 207         struct ecore_pf_iov *p_iov_info;
 208         dma_addr_t req_p, rply_p, bulletin_p;
 209         u8 idx = 0;
 210
 211         p_iov_info = p_hwfn->pf_iov_info;
 212
 213         OSAL_MEMSET(p_iov_info->vfs_array, 0, sizeof(p_iov_info->vfs_array));
 214
 215         p_req_virt_addr = p_iov_info->mbx_msg_virt_addr;
 216         req_p = p_iov_info->mbx_msg_phys_addr;
 217         p_reply_virt_addr = p_iov_info->mbx_reply_virt_addr;
 218         rply_p = p_iov_info->mbx_reply_phys_addr;
 219         p_bulletin_virt = p_iov_info->p_bulletins;
 220         bulletin_p = p_iov_info->bulletins_phys;
 221         if (!p_req_virt_addr || !p_reply_virt_addr || !p_bulletin_virt) {
 222                 DP_ERR(p_hwfn,
 223                        "ecore_iov_setup_vfdb called without alloc mem first\n");
 224                 return;
 225         }
 226
 227         p_iov_info->base_vport_id = 1;  /* @@@TBD resource allocation */
 228
 229         for (idx = 0; idx < num_vfs; idx++) {
 230                 struct ecore_vf_info *vf = &p_iov_info->vfs_array[idx];
 231                 u32 concrete;
 232
 233                 vf->vf_mbx.req_virt = p_req_virt_addr + idx;
 234                 vf->vf_mbx.req_phys = req_p + idx * sizeof(union vfpf_tlvs);
 235                 vf->vf_mbx.reply_virt = p_reply_virt_addr + idx;
 236                 vf->vf_mbx.reply_phys = rply_p + idx * sizeof(union pfvf_tlvs);
 237
 238 #ifdef CONFIG_ECORE_SW_CHANNEL
 239                 vf->vf_mbx.sw_mbx.request_size = sizeof(union vfpf_tlvs);
 240                 vf->vf_mbx.sw_mbx.mbx_state = VF_PF_WAIT_FOR_START_REQUEST;
 241 #endif
 242                 vf->state = VF_STOPPED;
 243
 244                 vf->bulletin.phys = idx *
 245                     sizeof(struct ecore_bulletin_content) + bulletin_p;
 246                 vf->bulletin.p_virt = p_bulletin_virt + idx;
 247                 vf->bulletin.size = sizeof(struct ecore_bulletin_content);
 248
 249                 vf->relative_vf_id = idx;
 250                 vf->abs_vf_id = idx + p_hwfn->hw_info.first_vf_in_pf;
 251                 concrete = ecore_vfid_to_concrete(p_hwfn, vf->abs_vf_id);
 252                 vf->concrete_fid = concrete;
 253                 /* TODO - need to devise a better way of getting opaque */
 254                 vf->opaque_fid = (p_hwfn->hw_info.opaque_fid & 0xff) |
 255                     (vf->abs_vf_id << 8);
 256                 /* @@TBD MichalK - add base vport_id of VFs to equation */
 257                 vf->vport_id = p_iov_info->base_vport_id + idx;
 258         }
 259 }
 260
 261 static enum _ecore_status_t ecore_iov_allocate_vfdb(struct ecore_hwfn *p_hwfn)
 262 {
 263         struct ecore_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
 264         void **p_v_addr;
 265         u16 num_vfs = 0;
 266
 267         num_vfs = p_hwfn->p_dev->sriov_info.total_vfs;
 268
 269         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 270                    "ecore_iov_allocate_vfdb for %d VFs\n", num_vfs);
 271
 272         /* Allocate PF Mailbox buffer (per-VF) */
 273         p_iov_info->mbx_msg_size = sizeof(union vfpf_tlvs) * num_vfs;
 274         p_v_addr = &p_iov_info->mbx_msg_virt_addr;
 275         *p_v_addr = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev,
 276                                             &p_iov_info->mbx_msg_phys_addr,
 277                                             p_iov_info->mbx_msg_size);
 278         if (!*p_v_addr)
 279                 return ECORE_NOMEM;
 280
 281         /* Allocate PF Mailbox Reply buffer (per-VF) */
 282         p_iov_info->mbx_reply_size = sizeof(union pfvf_tlvs) * num_vfs;
 283         p_v_addr = &p_iov_info->mbx_reply_virt_addr;
 284         *p_v_addr = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev,
 285                                             &p_iov_info->mbx_reply_phys_addr,
 286                                             p_iov_info->mbx_reply_size);
 287         if (!*p_v_addr)
 288                 return ECORE_NOMEM;
 289
 290         p_iov_info->bulletins_size = sizeof(struct ecore_bulletin_content) *
 291             num_vfs;
 292         p_v_addr = &p_iov_info->p_bulletins;
 293         *p_v_addr = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev,
 294                                             &p_iov_info->bulletins_phys,
 295                                             p_iov_info->bulletins_size);
 296         if (!*p_v_addr)
 297                 return ECORE_NOMEM;
 298
 299         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 300                    "PF's Requests mailbox [%p virt 0x%" PRIx64 " phys], "
 301                    "Response mailbox [%p virt 0x%" PRIx64 " phys] Bulletins"
 302                    " [%p virt 0x%" PRIx64 " phys]\n",
 303                    p_iov_info->mbx_msg_virt_addr,
 304                    (u64)p_iov_info->mbx_msg_phys_addr,
 305                    p_iov_info->mbx_reply_virt_addr,
 306                    (u64)p_iov_info->mbx_reply_phys_addr,
 307                    p_iov_info->p_bulletins, (u64)p_iov_info->bulletins_phys);
 308
 309         /* @@@TBD MichalK - statistics / RSS */
 310
 311         return ECORE_SUCCESS;
 312 }
 313
 314 static void ecore_iov_free_vfdb(struct ecore_hwfn *p_hwfn)
 315 {
 316         struct ecore_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
 317
 318         if (p_hwfn->pf_iov_info->mbx_msg_virt_addr)
 319                 OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev,
 320                                        p_iov_info->mbx_msg_virt_addr,
 321                                        p_iov_info->mbx_msg_phys_addr,
 322                                        p_iov_info->mbx_msg_size);
 323
 324         if (p_hwfn->pf_iov_info->mbx_reply_virt_addr)
 325                 OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev,
 326                                        p_iov_info->mbx_reply_virt_addr,
 327                                        p_iov_info->mbx_reply_phys_addr,
 328                                        p_iov_info->mbx_reply_size);
 329
 330         if (p_iov_info->p_bulletins)
 331                 OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev,
 332                                        p_iov_info->p_bulletins,
 333                                        p_iov_info->bulletins_phys,
 334                                        p_iov_info->bulletins_size);
 335
 336         /* @@@TBD MichalK - statistics / RSS */
 337 }
 338
 339 enum _ecore_status_t ecore_iov_alloc(struct ecore_hwfn *p_hwfn)
 340 {
 341         enum _ecore_status_t rc = ECORE_SUCCESS;
 342         struct ecore_pf_iov *p_sriov;
 343
 344         if (!IS_PF_SRIOV(p_hwfn)) {
 345                 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 346                            "No SR-IOV - no need for IOV db\n");
 347                 return rc;
 348         }
 349
 350         p_sriov = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL, sizeof(*p_sriov));
 351         if (!p_sriov) {
 352                 DP_NOTICE(p_hwfn, true,
 353                           "Failed to allocate `struct ecore_sriov'");
 354                 return ECORE_NOMEM;
 355         }
 356
 357         p_hwfn->pf_iov_info = p_sriov;
 358
 359         rc = ecore_iov_allocate_vfdb(p_hwfn);
 360
 361         return rc;
 362 }
 363
 364 void ecore_iov_setup(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt)
 365 {
 366         if (!IS_PF_SRIOV(p_hwfn) || !p_hwfn->pf_iov_info)
 367                 return;
 368
 369         ecore_iov_setup_vfdb(p_hwfn);
 370         ecore_iov_clear_vf_igu_blocks(p_hwfn, p_ptt);
 371 }
 372
 373 void ecore_iov_free(struct ecore_hwfn *p_hwfn)
 374 {
 375         if (p_hwfn->pf_iov_info) {
 376                 ecore_iov_free_vfdb(p_hwfn);
 377                 OSAL_FREE(p_hwfn->p_dev, p_hwfn->pf_iov_info);
 378         }
 379 }
 380
 381 enum _ecore_status_t ecore_iov_hw_info(struct ecore_hwfn *p_hwfn,
 382                                        struct ecore_ptt *p_ptt)
 383 {
 384         enum _ecore_status_t rc;
 385
 386         /* @@@ TBD get this information from shmem / pci cfg */
 387         if (IS_VF(p_hwfn->p_dev))
 388                 return ECORE_SUCCESS;
 389
 390         /* First hwfn should learn the PCI configuration */
 391         if (IS_LEAD_HWFN(p_hwfn)) {
 392                 struct ecore_dev *p_dev = p_hwfn->p_dev;
 393                 int *pos = &p_hwfn->p_dev->sriov_info.pos;
 394
 395                 *pos = OSAL_PCI_FIND_EXT_CAPABILITY(p_hwfn->p_dev,
 396                                                     PCI_EXT_CAP_ID_SRIOV);
 397                 if (!*pos) {
 398                         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 399                                    "No PCIe IOV support\n");
 400                         return ECORE_SUCCESS;
 401                 }
 402
 403                 rc = ecore_iov_pci_cfg_info(p_dev);
 404                 if (rc)
 405                         return rc;
 406         } else if (!p_hwfn->p_dev->sriov_info.pos) {
 407                 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV, "No PCIe IOV support\n");
 408                 return ECORE_SUCCESS;
 409         }
 410
 411         /* Calculate the first VF index - this is a bit tricky; Basically,
 412          * VFs start at offset 16 relative to PF0, and 2nd engine VFs begin
 413          * after the first engine's VFs.
 414          */
 415         p_hwfn->hw_info.first_vf_in_pf = p_hwfn->p_dev->sriov_info.offset +
 416             p_hwfn->abs_pf_id - 16;
 417         if (ECORE_PATH_ID(p_hwfn))
 418                 p_hwfn->hw_info.first_vf_in_pf -= MAX_NUM_VFS_BB;
 419
 420         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 421                    "First VF in hwfn 0x%08x\n", p_hwfn->hw_info.first_vf_in_pf);
 422
 423         return ECORE_SUCCESS;
 424 }
 425
 426 struct ecore_vf_info *ecore_iov_get_vf_info(struct ecore_hwfn *p_hwfn,
 427                                             u16 relative_vf_id,
 428                                             bool b_enabled_only)
 429 {
 430         struct ecore_vf_info *vf = OSAL_NULL;
 431
 432         if (!p_hwfn->pf_iov_info) {
 433                 DP_NOTICE(p_hwfn->p_dev, true, "No iov info\n");
 434                 return OSAL_NULL;
 435         }
 436
 437         if (ecore_iov_is_valid_vfid(p_hwfn, relative_vf_id, b_enabled_only))
 438                 vf = &p_hwfn->pf_iov_info->vfs_array[relative_vf_id];
 439         else
 440                 DP_ERR(p_hwfn, "ecore_iov_get_vf_info: VF[%d] is not enabled\n",
 441                        relative_vf_id);
 442
 443         return vf;
 444 }
 445
 446 void ecore_iov_set_vf_to_disable(struct ecore_hwfn *p_hwfn,
 447                                  u16 rel_vf_id, u8 to_disable)
 448 {
 449         struct ecore_vf_info *vf;
 450
 451         vf = ecore_iov_get_vf_info(p_hwfn, rel_vf_id, false);
 452         if (!vf)
 453                 return;
 454
 455         vf->to_disable = to_disable;
 456 }
 457
 458 void ecore_iov_set_vfs_to_disable(struct ecore_hwfn *p_hwfn, u8 to_disable)
 459 {
 460         u16 i;
 461
 462         for (i = 0; i < p_hwfn->p_dev->sriov_info.total_vfs; i++)
 463                 ecore_iov_set_vf_to_disable(p_hwfn, i, to_disable);
 464 }
 465
 466 #ifndef LINUX_REMOVE
 467 /* @@@TBD Consider taking outside of ecore... */
 468 enum _ecore_status_t ecore_iov_set_vf_ctx(struct ecore_hwfn *p_hwfn,
 469                                           u16 vf_id, void *ctx)
 470 {
 471         enum _ecore_status_t rc = ECORE_SUCCESS;
 472         struct ecore_vf_info *vf = ecore_iov_get_vf_info(p_hwfn, vf_id, true);
 473
 474         if (vf != OSAL_NULL) {
 475                 vf->ctx = ctx;
 476 #ifdef CONFIG_ECORE_SW_CHANNEL
 477                 vf->vf_mbx.sw_mbx.mbx_state = VF_PF_WAIT_FOR_START_REQUEST;
 478 #endif
 479         } else {
 480                 rc = ECORE_UNKNOWN_ERROR;
 481         }
 482         return rc;
 483 }
 484 #endif
 485
 486 /**
 487  * VF enable primitives
 488  *
 489  * when pretend is required the caller is reponsible
 490  * for calling pretend prioir to calling these routines
 491  */
 492
 493 /* clears vf error in all semi blocks
 494  * Assumption: called under VF pretend...
 495  */
 496 static OSAL_INLINE void ecore_iov_vf_semi_clear_err(struct ecore_hwfn *p_hwfn,
 497                                                     struct ecore_ptt *p_ptt)
 498 {
 499         ecore_wr(p_hwfn, p_ptt, TSEM_REG_VF_ERROR, 1);
 500         ecore_wr(p_hwfn, p_ptt, USEM_REG_VF_ERROR, 1);
 501         ecore_wr(p_hwfn, p_ptt, MSEM_REG_VF_ERROR, 1);
 502         ecore_wr(p_hwfn, p_ptt, XSEM_REG_VF_ERROR, 1);
 503         ecore_wr(p_hwfn, p_ptt, YSEM_REG_VF_ERROR, 1);
 504         ecore_wr(p_hwfn, p_ptt, PSEM_REG_VF_ERROR, 1);
 505 }
 506
 507 static void ecore_iov_vf_pglue_clear_err(struct ecore_hwfn *p_hwfn,
 508                                          struct ecore_ptt *p_ptt, u8 abs_vfid)
 509 {
 510         ecore_wr(p_hwfn, p_ptt,
 511                  PGLUE_B_REG_WAS_ERROR_VF_31_0_CLR + (abs_vfid >> 5) * 4,
 512                  1 << (abs_vfid & 0x1f));
 513 }
 514
 515 static void ecore_iov_vf_igu_reset(struct ecore_hwfn *p_hwfn,
 516                                    struct ecore_ptt *p_ptt,
 517                                    struct ecore_vf_info *vf)
 518 {
 519         int i;
 520         u16 igu_sb_id;
 521
 522         /* Set VF masks and configuration - pretend */
 523         ecore_fid_pretend(p_hwfn, p_ptt, (u16)vf->concrete_fid);
 524
 525         ecore_wr(p_hwfn, p_ptt, IGU_REG_STATISTIC_NUM_VF_MSG_SENT, 0);
 526
 527         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 528                    "value in VF_CONFIGURATION of vf %d after write %x\n",
 529                    vf->abs_vf_id,
 530                    ecore_rd(p_hwfn, p_ptt, IGU_REG_VF_CONFIGURATION));
 531
 532         /* unpretend */
 533         ecore_fid_pretend(p_hwfn, p_ptt, (u16)p_hwfn->hw_info.concrete_fid);
 534
 535         /* iterate ove all queues, clear sb consumer */
 536         for (i = 0; i < vf->num_sbs; i++) {
 537                 igu_sb_id = vf->igu_sbs[i];
 538                 /* Set then clear... */
 539                 ecore_int_igu_cleanup_sb(p_hwfn, p_ptt, igu_sb_id, 1,
 540                                          vf->opaque_fid);
 541                 ecore_int_igu_cleanup_sb(p_hwfn, p_ptt, igu_sb_id, 0,
 542                                          vf->opaque_fid);
 543         }
 544 }
 545
 546 static void ecore_iov_vf_igu_set_int(struct ecore_hwfn *p_hwfn,
 547                                      struct ecore_ptt *p_ptt,
 548                                      struct ecore_vf_info *vf, bool enable)
 549 {
 550         u32 igu_vf_conf;
 551
 552         ecore_fid_pretend(p_hwfn, p_ptt, (u16)vf->concrete_fid);
 553
 554         igu_vf_conf = ecore_rd(p_hwfn, p_ptt, IGU_REG_VF_CONFIGURATION);
 555
 556         if (enable)
 557                 igu_vf_conf |= IGU_VF_CONF_MSI_MSIX_EN;
 558         else
 559                 igu_vf_conf &= ~IGU_VF_CONF_MSI_MSIX_EN;
 560
 561         ecore_wr(p_hwfn, p_ptt, IGU_REG_VF_CONFIGURATION, igu_vf_conf);
 562
 563         /* unpretend */
 564         ecore_fid_pretend(p_hwfn, p_ptt, (u16)p_hwfn->hw_info.concrete_fid);
 565 }
 566
 567 static enum _ecore_status_t
 568 ecore_iov_enable_vf_access(struct ecore_hwfn *p_hwfn,
 569                            struct ecore_ptt *p_ptt, struct ecore_vf_info *vf)
 570 {
 571         u32 igu_vf_conf = IGU_VF_CONF_FUNC_EN;
 572         enum _ecore_status_t rc;
 573
 574         if (vf->to_disable)
 575                 return ECORE_SUCCESS;
 576
 577         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 578                    "Enable internal access for vf %x [abs %x]\n", vf->abs_vf_id,
 579                    ECORE_VF_ABS_ID(p_hwfn, vf));
 580
 581         ecore_iov_vf_pglue_clear_err(p_hwfn, p_ptt,
 582                                      ECORE_VF_ABS_ID(p_hwfn, vf));
 583
 584         rc = ecore_mcp_config_vf_msix(p_hwfn, p_ptt,
 585                                       vf->abs_vf_id, vf->num_sbs);
 586         if (rc)
 587                 return rc;
 588
 589         ecore_fid_pretend(p_hwfn, p_ptt, (u16)vf->concrete_fid);
 590
 591         SET_FIELD(igu_vf_conf, IGU_VF_CONF_PARENT, p_hwfn->rel_pf_id);
 592         STORE_RT_REG(p_hwfn, IGU_REG_VF_CONFIGURATION_RT_OFFSET, igu_vf_conf);
 593
 594         ecore_init_run(p_hwfn, p_ptt, PHASE_VF, vf->abs_vf_id,
 595                        p_hwfn->hw_info.hw_mode);
 596
 597         /* unpretend */
 598         ecore_fid_pretend(p_hwfn, p_ptt, (u16)p_hwfn->hw_info.concrete_fid);
 599
 600         if (vf->state != VF_STOPPED) {
 601                 DP_NOTICE(p_hwfn, true, "VF[%02x] is already started\n",
 602                           vf->abs_vf_id);
 603                 return ECORE_INVAL;
 604         }
 605
 606         /* Start VF */
 607         rc = ecore_sp_vf_start(p_hwfn, vf->concrete_fid, vf->opaque_fid);
 608         if (rc != ECORE_SUCCESS)
 609                 DP_NOTICE(p_hwfn, true, "Failed to start VF[%02x]\n",
 610                           vf->abs_vf_id);
 611
 612         vf->state = VF_FREE;
 613
 614         return rc;
 615 }
 616
 617 /**
 618  *
 619  * @brief ecore_iov_config_perm_table - configure the permission
 620  *      zone table.
 621  *      In E4, queue zone permission table size is 320x9. There
 622  *      are 320 VF queues for single engine device (256 for dual
 623  *      engine device), and each entry has the following format:
 624  *      {Valid, VF[7:0]}
 625  * @param p_hwfn
 626  * @param p_ptt
 627  * @param vf
 628  * @param enable
 629  */
 630 static void ecore_iov_config_perm_table(struct ecore_hwfn *p_hwfn,
 631                                         struct ecore_ptt *p_ptt,
 632                                         struct ecore_vf_info *vf, u8 enable)
 633 {
 634         u32 reg_addr;
 635         u32 val;
 636         u16 qzone_id = 0;
 637         int qid;
 638
 639         for (qid = 0; qid < vf->num_rxqs; qid++) {
 640                 ecore_fw_l2_queue(p_hwfn, vf->vf_queues[qid].fw_rx_qid,
 641                                   &qzone_id);
 642
 643                 reg_addr = PSWHST_REG_ZONE_PERMISSION_TABLE + qzone_id * 4;
 644                 val = enable ? (vf->abs_vf_id | (1 << 8)) : 0;
 645                 ecore_wr(p_hwfn, p_ptt, reg_addr, val);
 646         }
 647 }
 648
 649 static void ecore_iov_enable_vf_traffic(struct ecore_hwfn *p_hwfn,
 650                                         struct ecore_ptt *p_ptt,
 651                                         struct ecore_vf_info *vf)
 652 {
 653         /* Reset vf in IGU interrupts are still disabled */
 654         ecore_iov_vf_igu_reset(p_hwfn, p_ptt, vf);
 655
 656         ecore_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 1 /* enable */);
 657
 658         /* Permission Table */
 659         ecore_iov_config_perm_table(p_hwfn, p_ptt, vf, true /* enable */);
 660 }
 661
 662 static u8 ecore_iov_alloc_vf_igu_sbs(struct ecore_hwfn *p_hwfn,
 663                                      struct ecore_ptt *p_ptt,
 664                                      struct ecore_vf_info *vf,
 665                                      u16 num_rx_queues)
 666 {
 667         int igu_id = 0;
 668         int qid = 0;
 669         u32 val = 0;
 670         struct ecore_igu_block *igu_blocks =
 671             p_hwfn->hw_info.p_igu_info->igu_map.igu_blocks;
 672
 673         if (num_rx_queues > p_hwfn->hw_info.p_igu_info->free_blks)
 674                 num_rx_queues = p_hwfn->hw_info.p_igu_info->free_blks;
 675
 676         p_hwfn->hw_info.p_igu_info->free_blks -= num_rx_queues;
 677
 678         SET_FIELD(val, IGU_MAPPING_LINE_FUNCTION_NUMBER, vf->abs_vf_id);
 679         SET_FIELD(val, IGU_MAPPING_LINE_VALID, 1);
 680         SET_FIELD(val, IGU_MAPPING_LINE_PF_VALID, 0);
 681
 682         while ((qid < num_rx_queues) &&
 683                (igu_id < ECORE_MAPPING_MEMORY_SIZE(p_hwfn->p_dev))) {
 684                 if (igu_blocks[igu_id].status & ECORE_IGU_STATUS_FREE) {
 685                         struct cau_sb_entry sb_entry;
 686
 687                         vf->igu_sbs[qid] = (u16)igu_id;
 688                         igu_blocks[igu_id].status &= ~ECORE_IGU_STATUS_FREE;
 689
 690                         SET_FIELD(val, IGU_MAPPING_LINE_VECTOR_NUMBER, qid);
 691
 692                         ecore_wr(p_hwfn, p_ptt,
 693                                  IGU_REG_MAPPING_MEMORY + sizeof(u32) * igu_id,
 694                                  val);
 695
 696                         /* Configure igu sb in CAU which were marked valid */
 697                         ecore_init_cau_sb_entry(p_hwfn, &sb_entry,
 698                                                 p_hwfn->rel_pf_id,
 699                                                 vf->abs_vf_id, 1);
 700                         ecore_dmae_host2grc(p_hwfn, p_ptt,
 701                                             (u64)(osal_uintptr_t)&sb_entry,
 702                                             CAU_REG_SB_VAR_MEMORY +
 703                                             igu_id * sizeof(u64), 2, 0);
 704                         qid++;
 705                 }
 706                 igu_id++;
 707         }
 708
 709         vf->num_sbs = (u8)num_rx_queues;
 710
 711         return vf->num_sbs;
 712 }
 713
 714 /**
 715  *
 716  * @brief The function invalidates all the VF entries,
 717  *        technically this isn't required, but added for
 718  *        cleaness and ease of debugging incase a VF attempts to
 719  *        produce an interrupt after it has been taken down.
 720  *
 721  * @param p_hwfn
 722  * @param p_ptt
 723  * @param vf
 724  */
 725 static void ecore_iov_free_vf_igu_sbs(struct ecore_hwfn *p_hwfn,
 726                                       struct ecore_ptt *p_ptt,
 727                                       struct ecore_vf_info *vf)
 728 {
 729         struct ecore_igu_info *p_info = p_hwfn->hw_info.p_igu_info;
 730         int idx, igu_id;
 731         u32 addr, val;
 732
 733         /* Invalidate igu CAM lines and mark them as free */
 734         for (idx = 0; idx < vf->num_sbs; idx++) {
 735                 igu_id = vf->igu_sbs[idx];
 736                 addr = IGU_REG_MAPPING_MEMORY + sizeof(u32) * igu_id;
 737
 738                 val = ecore_rd(p_hwfn, p_ptt, addr);
 739                 SET_FIELD(val, IGU_MAPPING_LINE_VALID, 0);
 740                 ecore_wr(p_hwfn, p_ptt, addr, val);
 741
 742                 p_info->igu_map.igu_blocks[igu_id].status |=
 743                     ECORE_IGU_STATUS_FREE;
 744
 745                 p_hwfn->hw_info.p_igu_info->free_blks++;
 746         }
 747
 748         vf->num_sbs = 0;
 749 }
 750
 751 enum _ecore_status_t ecore_iov_init_hw_for_vf(struct ecore_hwfn *p_hwfn,
 752                                               struct ecore_ptt *p_ptt,
 753                                               u16 rel_vf_id, u16 num_rx_queues)
 754 {
 755         enum _ecore_status_t rc = ECORE_SUCCESS;
 756         struct ecore_vf_info *vf = OSAL_NULL;
 757         u8 num_of_vf_available_chains = 0;
 758         u32 cids;
 759         u8 i;
 760
 761         if (ECORE_IS_VF_ACTIVE(p_hwfn->p_dev, rel_vf_id)) {
 762                 DP_NOTICE(p_hwfn, true, "VF[%d] is already active.\n",
 763                           rel_vf_id);
 764                 return ECORE_INVAL;
 765         }
 766
 767         vf = ecore_iov_get_vf_info(p_hwfn, rel_vf_id, false);
 768         if (!vf) {
 769                 DP_ERR(p_hwfn, "ecore_iov_init_hw_for_vf : vf is OSAL_NULL\n");
 770                 return ECORE_UNKNOWN_ERROR;
 771         }
 772
 773         /* Limit number of queues according to number of CIDs */
 774         ecore_cxt_get_proto_cid_count(p_hwfn, PROTOCOLID_ETH, &cids);
 775         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 776                    "VF[%d] - requesting to initialize for 0x%04x queues"
 777                    " [0x%04x CIDs available]\n",
 778                    vf->relative_vf_id, num_rx_queues, (u16)cids);
 779         num_rx_queues = OSAL_MIN_T(u16, num_rx_queues, ((u16)cids));
 780
 781         num_of_vf_available_chains = ecore_iov_alloc_vf_igu_sbs(p_hwfn,
 782                                                                p_ptt,
 783                                                                vf,
 784                                                                num_rx_queues);
 785         if (num_of_vf_available_chains == 0) {
 786                 DP_ERR(p_hwfn, "no available igu sbs\n");
 787                 return ECORE_NOMEM;
 788         }
 789
 790         /* Choose queue number and index ranges */
 791         vf->num_rxqs = num_of_vf_available_chains;
 792         vf->num_txqs = num_of_vf_available_chains;
 793
 794         for (i = 0; i < vf->num_rxqs; i++) {
 795                 u16 queue_id = ecore_int_queue_id_from_sb_id(p_hwfn,
 796                                                              vf->igu_sbs[i]);
 797
 798                 if (queue_id > RESC_NUM(p_hwfn, ECORE_L2_QUEUE)) {
 799                         DP_NOTICE(p_hwfn, true,
 800                                   "VF[%d] will require utilizing of"
 801                                   " out-of-bounds queues - %04x\n",
 802                                   vf->relative_vf_id, queue_id);
 803                         /* TODO - cleanup the already allocate SBs */
 804                         return ECORE_INVAL;
 805                 }
 806
 807                 /* CIDs are per-VF, so no problem having them 0-based. */
 808                 vf->vf_queues[i].fw_rx_qid = queue_id;
 809                 vf->vf_queues[i].fw_tx_qid = queue_id;
 810                 vf->vf_queues[i].fw_cid = i;
 811
 812                 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 813                            "VF[%d] - [%d] SB %04x, Tx/Rx queue %04x CID %04x\n",
 814                            vf->relative_vf_id, i, vf->igu_sbs[i], queue_id, i);
 815         }
 816
 817         rc = ecore_iov_enable_vf_access(p_hwfn, p_ptt, vf);
 818
 819         if (rc == ECORE_SUCCESS) {
 820                 struct ecore_hw_sriov_info *p_iov = &p_hwfn->p_dev->sriov_info;
 821                 u16 vf_id = vf->relative_vf_id;
 822
 823                 p_iov->num_vfs++;
 824                 p_iov->active_vfs[vf_id / 64] |= (1ULL << (vf_id % 64));
 825         }
 826
 827         return rc;
 828 }
 829
 830 enum _ecore_status_t ecore_iov_release_hw_for_vf(struct ecore_hwfn *p_hwfn,
 831                                                  struct ecore_ptt *p_ptt,
 832                                                  u16 rel_vf_id)
 833 {
 834         struct ecore_vf_info *vf = OSAL_NULL;
 835         enum _ecore_status_t rc = ECORE_SUCCESS;
 836
 837         vf = ecore_iov_get_vf_info(p_hwfn, rel_vf_id, true);
 838         if (!vf) {
 839                 DP_ERR(p_hwfn, "ecore_iov_release_hw_for_vf : vf is NULL\n");
 840                 return ECORE_UNKNOWN_ERROR;
 841         }
 842
 843         if (vf->state != VF_STOPPED) {
 844                 /* Stopping the VF */
 845                 rc = ecore_sp_vf_stop(p_hwfn, vf->concrete_fid, vf->opaque_fid);
 846
 847                 if (rc != ECORE_SUCCESS) {
 848                         DP_ERR(p_hwfn, "ecore_sp_vf_stop returned error %d\n",
 849                                rc);
 850                         return rc;
 851                 }
 852
 853                 vf->state = VF_STOPPED;
 854         }
 855
 856         /* disablng interrupts and resetting permission table was done during
 857          * vf-close, however, we could get here without going through vf_close
 858          */
 859         /* Disable Interrupts for VF */
 860         ecore_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 0 /* disable */);
 861
 862         /* Reset Permission table */
 863         ecore_iov_config_perm_table(p_hwfn, p_ptt, vf, 0 /* disable */);
 864
 865         vf->num_rxqs = 0;
 866         vf->num_txqs = 0;
 867         ecore_iov_free_vf_igu_sbs(p_hwfn, p_ptt, vf);
 868
 869         if (ECORE_IS_VF_ACTIVE(p_hwfn->p_dev, rel_vf_id)) {
 870                 struct ecore_hw_sriov_info *p_iov = &p_hwfn->p_dev->sriov_info;
 871                 u16 vf_id = vf->relative_vf_id;
 872
 873                 p_iov->num_vfs--;
 874                 p_iov->active_vfs[vf_id / 64] &= ~(1ULL << (vf_id % 64));
 875         }
 876
 877         return ECORE_SUCCESS;
 878 }
 879
 880 static bool ecore_iov_tlv_supported(u16 tlvtype)
 881 {
 882         return tlvtype > CHANNEL_TLV_NONE && tlvtype < CHANNEL_TLV_MAX;
 883 }
 884
 885 static void ecore_iov_lock_vf_pf_channel(struct ecore_hwfn *p_hwfn,
 886                                          struct ecore_vf_info *vf, u16 tlv)
 887 {
 888         /* we don't lock the channel for unsupported tlvs */
 889         if (!ecore_iov_tlv_supported(tlv))
 890                 return;
 891
 892         /* lock the channel */
 893         /* mutex_lock(&vf->op_mutex); @@@TBD MichalK - add lock... */
 894
 895         /* record the locking op */
 896         /* vf->op_current = tlv; @@@TBD MichalK */
 897
 898         /* log the lock */
 899         DP_VERBOSE(p_hwfn,
 900                    ECORE_MSG_IOV,
 901                    "VF[%d]: vf pf channel locked by     %s\n",
 902                    vf->abs_vf_id, ecore_channel_tlvs_string[tlv]);
 903 }
 904
 905 static void ecore_iov_unlock_vf_pf_channel(struct ecore_hwfn *p_hwfn,
 906                                            struct ecore_vf_info *vf,
 907                                            u16 expected_tlv)
 908 {
 909         /* we don't unlock the channel for unsupported tlvs */
 910         if (!ecore_iov_tlv_supported(expected_tlv))
 911                 return;
 912
 913         /* WARN(expected_tlv != vf->op_current,
 914          * "lock mismatch: expected %s found %s",
 915          * channel_tlvs_string[expected_tlv],
 916          * channel_tlvs_string[vf->op_current]);
 917          * @@@TBD MichalK
 918          */
 919
 920         /* lock the channel */
 921         /* mutex_unlock(&vf->op_mutex); @@@TBD MichalK add the lock */
 922
 923         /* log the unlock */
 924         DP_VERBOSE(p_hwfn,
 925                    ECORE_MSG_IOV,
 926                    "VF[%d]: vf pf channel unlocked by %s\n",
 927                    vf->abs_vf_id, ecore_channel_tlvs_string[expected_tlv]);
 928
 929         /* record the locking op */
 930         /* vf->op_current = CHANNEL_TLV_NONE; */
 931 }
 932
 933 /* place a given tlv on the tlv buffer, continuing current tlv list */
 934 void *ecore_add_tlv(struct ecore_hwfn *p_hwfn,
 935                     u8 **offset, u16 type, u16 length)
 936 {
 937         struct channel_tlv *tl = (struct channel_tlv *)*offset;
 938
 939         tl->type = type;
 940         tl->length = length;
 941
 942         /* Offset should keep pointing to next TLV (the end of the last) */
 943         *offset += length;
 944
 945         /* Return a pointer to the start of the added tlv */
 946         return *offset - length;
 947 }
 948
 949 /* list the types and lengths of the tlvs on the buffer */
 950 void ecore_dp_tlv_list(struct ecore_hwfn *p_hwfn, void *tlvs_list)
 951 {
 952         u16 i = 1, total_length = 0;
 953         struct channel_tlv *tlv;
 954
 955         do {
 956                 /* cast current tlv list entry to channel tlv header */
 957                 tlv = (struct channel_tlv *)((u8 *)tlvs_list + total_length);
 958
 959                 /* output tlv */
 960                 if (ecore_iov_tlv_supported(tlv->type))
 961                         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 962                                    "TLV number %d: type %s, length %d\n",
 963                                    i, ecore_channel_tlvs_string[tlv->type],
 964                                    tlv->length);
 965                 else
 966                         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 967                                    "TLV number %d: type %d, length %d\n",
 968                                    i, tlv->type, tlv->length);
 969
 970                 if (tlv->type == CHANNEL_TLV_LIST_END)
 971                         return;
 972
 973                 /* Validate entry - protect against malicious VFs */
 974                 if (!tlv->length) {
 975                         DP_NOTICE(p_hwfn, false, "TLV of length 0 found\n");
 976                         return;
 977                 }
 978                 total_length += tlv->length;
 979                 if (total_length >= sizeof(struct tlv_buffer_size)) {
 980                         DP_NOTICE(p_hwfn, false, "TLV ==> Buffer overflow\n");
 981                         return;
 982                 }
 983
 984                 i++;
 985         } while (1);
 986 }
 987
 988 static void ecore_iov_send_response(struct ecore_hwfn *p_hwfn,
 989                                     struct ecore_ptt *p_ptt,
 990                                     struct ecore_vf_info *p_vf,
 991                                     u16 length, u8 status)
 992 {
 993         struct ecore_iov_vf_mbx *mbx = &p_vf->vf_mbx;
 994         struct ecore_dmae_params params;
 995         u8 eng_vf_id;
 996
 997         mbx->reply_virt->default_resp.hdr.status = status;
 998
 999 #ifdef CONFIG_ECORE_SW_CHANNEL
1000         mbx->sw_mbx.response_size =
1001             length + sizeof(struct channel_list_end_tlv);
1002 #endif
1003
1004         ecore_dp_tlv_list(p_hwfn, mbx->reply_virt);
1005
1006         if (!p_hwfn->p_dev->sriov_info.b_hw_channel)
1007                 return;
1008
1009         eng_vf_id = p_vf->abs_vf_id;
1010
1011         OSAL_MEMSET(&params, 0, sizeof(struct ecore_dmae_params));
1012         params.flags = ECORE_DMAE_FLAG_VF_DST;
1013         params.dst_vfid = eng_vf_id;
1014
1015         ecore_dmae_host2host(p_hwfn, p_ptt, mbx->reply_phys + sizeof(u64),
1016                              mbx->req_virt->first_tlv.reply_address +
1017                              sizeof(u64),
1018                              (sizeof(union pfvf_tlvs) - sizeof(u64)) / 4,
1019                              &params);
1020
1021         ecore_dmae_host2host(p_hwfn, p_ptt, mbx->reply_phys,
1022                              mbx->req_virt->first_tlv.reply_address,
1023                              sizeof(u64) / 4, &params);
1024
1025         REG_WR(p_hwfn,
1026                GTT_BAR0_MAP_REG_USDM_RAM +
1027                USTORM_VF_PF_CHANNEL_READY_OFFSET(eng_vf_id), 1);
1028 }
1029
1030 static u16 ecore_iov_vport_to_tlv(struct ecore_hwfn *p_hwfn,
1031                                   enum ecore_iov_vport_update_flag flag)
1032 {
1033         switch (flag) {
1034         case ECORE_IOV_VP_UPDATE_ACTIVATE:
1035                 return CHANNEL_TLV_VPORT_UPDATE_ACTIVATE;
1036         case ECORE_IOV_VP_UPDATE_VLAN_STRIP:
1037                 return CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP;
1038         case ECORE_IOV_VP_UPDATE_TX_SWITCH:
1039                 return CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH;
1040         case ECORE_IOV_VP_UPDATE_MCAST:
1041                 return CHANNEL_TLV_VPORT_UPDATE_MCAST;
1042         case ECORE_IOV_VP_UPDATE_ACCEPT_PARAM:
1043                 return CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM;
1044         case ECORE_IOV_VP_UPDATE_RSS:
1045                 return CHANNEL_TLV_VPORT_UPDATE_RSS;
1046         case ECORE_IOV_VP_UPDATE_ACCEPT_ANY_VLAN:
1047                 return CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN;
1048         case ECORE_IOV_VP_UPDATE_SGE_TPA:
1049                 return CHANNEL_TLV_VPORT_UPDATE_SGE_TPA;
1050         default:
1051                 return 0;
1052         }
1053 }
1054
1055 static u16 ecore_iov_prep_vp_update_resp_tlvs(struct ecore_hwfn *p_hwfn,
1056                                               struct ecore_vf_info *p_vf,
1057                                               struct ecore_iov_vf_mbx *p_mbx,
1058                                               u8 status, u16 tlvs_mask,
1059                                               u16 tlvs_accepted)
1060 {
1061         struct pfvf_def_resp_tlv *resp;
1062         u16 size, total_len, i;
1063
1064         OSAL_MEMSET(p_mbx->reply_virt, 0, sizeof(union pfvf_tlvs));
1065         p_mbx->offset = (u8 *)(p_mbx->reply_virt);
1066         size = sizeof(struct pfvf_def_resp_tlv);
1067         total_len = size;
1068
1069         ecore_add_tlv(p_hwfn, &p_mbx->offset, CHANNEL_TLV_VPORT_UPDATE, size);
1070
1071         /* Prepare response for all extended tlvs if they are found by PF */
1072         for (i = 0; i < ECORE_IOV_VP_UPDATE_MAX; i++) {
1073                 if (!(tlvs_mask & (1 << i)))
1074                         continue;
1075
1076                 resp = ecore_add_tlv(p_hwfn, &p_mbx->offset,
1077                                      ecore_iov_vport_to_tlv(p_hwfn, i), size);
1078
1079                 if (tlvs_accepted & (1 << i))
1080                         resp->hdr.status = status;
1081                 else
1082                         resp->hdr.status = PFVF_STATUS_NOT_SUPPORTED;
1083
1084                 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
1085                            "VF[%d] - vport_update resp: TLV %d, status %02x\n",
1086                            p_vf->relative_vf_id,
1087                            ecore_iov_vport_to_tlv(p_hwfn, i), resp->hdr.status);
1088
1089                 total_len += size;
1090         }
1091
1092         ecore_add_tlv(p_hwfn, &p_mbx->offset, CHANNEL_TLV_LIST_END,
1093                       sizeof(struct channel_list_end_tlv));
1094
1095         return total_len;
1096 }
1097
1098 static void ecore_iov_prepare_resp(struct ecore_hwfn *p_hwfn,
1099                                    struct ecore_ptt *p_ptt,
1100                                    struct ecore_vf_info *vf_info,
1101                                    u16 type, u16 length, u8 status)
1102 {
1103         struct ecore_iov_vf_mbx *mbx = &vf_info->vf_mbx;
1104
1105         mbx->offset = (u8 *)(mbx->reply_virt);
1106
1107         ecore_add_tlv(p_hwfn, &mbx->offset, type, length);
1108         ecore_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
1109                       sizeof(struct channel_list_end_tlv));
1110
1111         ecore_iov_send_response(p_hwfn, p_ptt, vf_info, length, status);
1112 }
1113
1114 static void ecore_iov_vf_cleanup(struct ecore_hwfn *p_hwfn,
1115                                  struct ecore_vf_info *p_vf)
1116 {
1117         p_vf->vf_bulletin = 0;
1118         p_vf->vport_instance = 0;
1119         p_vf->num_mac_filters = 0;
1120         p_vf->num_vlan_filters = 0;
1121         p_vf->num_mc_filters = 0;
1122         p_vf->configured_features = 0;
1123
1124         /* If VF previously requested less resources, go back to default */
1125         p_vf->num_rxqs = p_vf->num_sbs;
1126         p_vf->num_txqs = p_vf->num_sbs;
1127
1128         p_vf->num_active_rxqs = 0;
1129
1130         OSAL_MEMSET(&p_vf->shadow_config, 0, sizeof(p_vf->shadow_config));
1131         OSAL_IOV_VF_CLEANUP(p_hwfn, p_vf->relative_vf_id);
1132 }
1133
1134 static void ecore_iov_vf_mbx_acquire(struct ecore_hwfn *p_hwfn,
1135                                      struct ecore_ptt *p_ptt,
1136                                      struct ecore_vf_info *vf)
1137 {
1138         struct ecore_iov_vf_mbx *mbx = &vf->vf_mbx;
1139         struct vfpf_acquire_tlv *req = &mbx->req_virt->acquire;
1140         struct pfvf_acquire_resp_tlv *resp = &mbx->reply_virt->acquire_resp;
1141         struct pf_vf_resc *resc = &resp->resc;
1142         struct pf_vf_pfdev_info *pfdev_info = &resp->pfdev_info;
1143         u16 length;
1144         u8 i, vfpf_status = PFVF_STATUS_SUCCESS;
1145
1146         /* Validate FW compatibility */
1147         if (req->vfdev_info.fw_major != FW_MAJOR_VERSION ||
1148             req->vfdev_info.fw_minor != FW_MINOR_VERSION ||
1149             req->vfdev_info.fw_revision != FW_REVISION_VERSION ||
1150             req->vfdev_info.fw_engineering != FW_ENGINEERING_VERSION) {
1151                 DP_INFO(p_hwfn,
1152                         "VF[%d] is running an incompatible driver [VF needs"
1153                         " FW %02x:%02x:%02x:%02x but Hypervisor is"
1154                         " using %02x:%02x:%02x:%02x]\n",
1155                         vf->abs_vf_id, req->vfdev_info.fw_major,
1156                         req->vfdev_info.fw_minor, req->vfdev_info.fw_revision,
1157                         req->vfdev_info.fw_engineering, FW_MAJOR_VERSION,
1158                         FW_MINOR_VERSION, FW_REVISION_VERSION,
1159                         FW_ENGINEERING_VERSION);
1160                 vfpf_status = PFVF_STATUS_NOT_SUPPORTED;
1161                 goto out;
1162         }
1163 #ifndef __EXTRACT__LINUX__
1164         if (OSAL_IOV_VF_ACQUIRE(p_hwfn, vf->relative_vf_id) != ECORE_SUCCESS) {
1165                 vfpf_status = PFVF_STATUS_NOT_SUPPORTED;
1166                 goto out;
1167         }
1168 #endif
1169
1170         OSAL_MEMSET(resp, 0, sizeof(*resp));
1171
1172         /* Fill in vf info stuff : @@@TBD MichalK Hard Coded for now... */
1173         vf->opaque_fid = req->vfdev_info.opaque_fid;
1174         vf->num_mac_filters = 1;
1175         vf->num_vlan_filters = ECORE_ETH_VF_NUM_VLAN_FILTERS;
1176         vf->num_mc_filters = ECORE_MAX_MC_ADDRS;
1177
1178         vf->vf_bulletin = req->bulletin_addr;
1179         vf->bulletin.size = (vf->bulletin.size < req->bulletin_size) ?
1180             vf->bulletin.size : req->bulletin_size;
1181
1182         /* fill in pfdev info */
1183         pfdev_info->chip_num = p_hwfn->p_dev->chip_num;
1184         pfdev_info->db_size = 0;        /* @@@ TBD MichalK Vf Doorbells */
1185         pfdev_info->indices_per_sb = PIS_PER_SB;
1186         pfdev_info->capabilities = PFVF_ACQUIRE_CAP_DEFAULT_UNTAGGED;
1187
1188         pfdev_info->stats_info.mstats.address =
1189             PXP_VF_BAR0_START_MSDM_ZONE_B +
1190             OFFSETOF(struct mstorm_vf_zone, non_trigger.eth_queue_stat);
1191         pfdev_info->stats_info.mstats.len =
1192             sizeof(struct eth_mstorm_per_queue_stat);
1193
1194         pfdev_info->stats_info.ustats.address =
1195             PXP_VF_BAR0_START_USDM_ZONE_B +
1196             OFFSETOF(struct ustorm_vf_zone, non_trigger.eth_queue_stat);
1197         pfdev_info->stats_info.ustats.len =
1198             sizeof(struct eth_ustorm_per_queue_stat);
1199
1200         pfdev_info->stats_info.pstats.address =
1201             PXP_VF_BAR0_START_PSDM_ZONE_B +
1202             OFFSETOF(struct pstorm_vf_zone, non_trigger.eth_queue_stat);
1203         pfdev_info->stats_info.pstats.len =
1204             sizeof(struct eth_pstorm_per_queue_stat);
1205
1206         pfdev_info->stats_info.tstats.address = 0;
1207         pfdev_info->stats_info.tstats.len = 0;
1208
1209         OSAL_MEMCPY(pfdev_info->port_mac, p_hwfn->hw_info.hw_mac_addr,
1210                     ETH_ALEN);
1211
1212         pfdev_info->fw_major = FW_MAJOR_VERSION;
1213         pfdev_info->fw_minor = FW_MINOR_VERSION;
1214         pfdev_info->fw_rev = FW_REVISION_VERSION;
1215         pfdev_info->fw_eng = FW_ENGINEERING_VERSION;
1216         pfdev_info->os_type = OSAL_IOV_GET_OS_TYPE();
1217         ecore_mcp_get_mfw_ver(p_hwfn->p_dev, p_ptt, &pfdev_info->mfw_ver,
1218                               OSAL_NULL);
1219
1220         pfdev_info->dev_type = p_hwfn->p_dev->type;
1221         pfdev_info->chip_rev = p_hwfn->p_dev->chip_rev;
1222
1223         /* Fill in resc : @@@TBD MichalK Hard Coded for now... */
1224         resc->num_rxqs = vf->num_rxqs;
1225         resc->num_txqs = vf->num_txqs;
1226         resc->num_sbs = vf->num_sbs;
1227         for (i = 0; i < resc->num_sbs; i++) {
1228                 resc->hw_sbs[i].hw_sb_id = vf->igu_sbs[i];
1229                 resc->hw_sbs[i].sb_qid = 0;
1230         }
1231
1232         for (i = 0; i < resc->num_rxqs; i++) {
1233                 ecore_fw_l2_queue(p_hwfn, vf->vf_queues[i].fw_rx_qid,
1234                                   (u16 *)&resc->hw_qid[i]);
1235                 resc->cid[i] = vf->vf_queues[i].fw_cid;
1236         }
1237
1238         resc->num_mac_filters = OSAL_MIN_T(u8, vf->num_mac_filters,
1239                                            req->resc_request.num_mac_filters);
1240         resc->num_vlan_filters = OSAL_MIN_T(u8, vf->num_vlan_filters,
1241                                             req->resc_request.num_vlan_filters);
1242         resc->num_mc_filters = OSAL_MIN_T(u8, vf->num_mc_filters,
1243                                           req->resc_request.num_mc_filters);
1244
1245         /* Fill agreed size of bulletin board in response, and post
1246          * an initial image to the bulletin board.
1247          */
1248         resp->bulletin_size = vf->bulletin.size;
1249         ecore_iov_post_vf_bulletin(p_hwfn, vf->relative_vf_id, p_ptt);
1250
1251         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
1252                    "VF[%d] ACQUIRE_RESPONSE: pfdev_info- chip_num=0x%x,"
1253                    " db_size=%d, idx_per_sb=%d, pf_cap=0x%" PRIx64 "\n"
1254                    "resources- n_rxq-%d, n_txq-%d, n_sbs-%d, n_macs-%d,"
1255                    " n_vlans-%d, n_mcs-%d\n",
1256                    vf->abs_vf_id, resp->pfdev_info.chip_num,
1257                    resp->pfdev_info.db_size, resp->pfdev_info.indices_per_sb,
1258                    resp->pfdev_info.capabilities, resc->num_rxqs,
1259                    resc->num_txqs, resc->num_sbs, resc->num_mac_filters,
1260                    resc->num_vlan_filters, resc->num_mc_filters);
1261
1262         vf->state = VF_ACQUIRED;
1263
1264         /* Prepare Response */
1265         length = sizeof(struct pfvf_acquire_resp_tlv);
1266
1267 out:
1268         ecore_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_ACQUIRE,
1269                                length, vfpf_status);
1270
1271         /* @@@TBD Bulletin */
1272 }
1273
1274 static enum _ecore_status_t
1275 __ecore_iov_spoofchk_set(struct ecore_hwfn *p_hwfn,
1276                          struct ecore_vf_info *p_vf, bool val)
1277 {
1278         struct ecore_sp_vport_update_params params;
1279         enum _ecore_status_t rc;
1280
1281         if (val == p_vf->spoof_chk) {
1282                 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
1283                            "Spoofchk value[%d] is already configured\n", val);
1284                 return ECORE_SUCCESS;
1285         }
1286
1287         OSAL_MEMSET(&params, 0, sizeof(struct ecore_sp_vport_update_params));
1288         params.opaque_fid = p_vf->opaque_fid;
1289         params.vport_id = p_vf->vport_id;
1290         params.update_anti_spoofing_en_flg = 1;
1291         params.anti_spoofing_en = val;
1292
1293         rc = ecore_sp_vport_update(p_hwfn, &params, ECORE_SPQ_MODE_EBLOCK,
1294                                    OSAL_NULL);
1295         if (rc == ECORE_SUCCESS) {
1296                 p_vf->spoof_chk = val;
1297                 p_vf->req_spoofchk_val = p_vf->spoof_chk;
1298                 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
1299                            "Spoofchk val[%d] configured\n", val);
1300         } else {
1301                 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
1302                            "Spoofchk configuration[val:%d] failed for VF[%d]\n",
1303                            val, p_vf->relative_vf_id);
1304         }
1305
1306         return rc;
1307 }
1308
1309 static enum _ecore_status_t
1310 ecore_iov_reconfigure_unicast_vlan(struct ecore_hwfn *p_hwfn,
1311                                    struct ecore_vf_info *p_vf)
1312 {
1313         enum _ecore_status_t rc = ECORE_SUCCESS;
1314         struct ecore_filter_ucast filter;
1315         int i;
1316
1317         OSAL_MEMSET(&filter, 0, sizeof(filter));
1318         filter.is_rx_filter = 1;
1319         filter.is_tx_filter = 1;
1320         filter.vport_to_add_to = p_vf->vport_id;
1321         filter.opcode = ECORE_FILTER_ADD;
1322
1323         /* Reconfigure vlans */
1324         for (i = 0; i < ECORE_ETH_VF_NUM_VLAN_FILTERS + 1; i++) {
1325                 if (p_vf->shadow_config.vlans[i].used) {
1326                         filter.type = ECORE_FILTER_VLAN;
1327                         filter.vlan = p_vf->shadow_config.vlans[i].vid;
1328                         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
1329                                    "Reconfig VLAN [0x%04x] for VF [%04x]\n",
1330                                    filter.vlan, p_vf->relative_vf_id);
1331                         rc = ecore_sp_eth_filter_ucast(p_hwfn,
1332                                                        p_vf->opaque_fid,
1333                                                        &filter,
1334                                                        ECORE_SPQ_MODE_CB,
1335                                                        OSAL_NULL);
1336                         if (rc) {
1337                                 DP_NOTICE(p_hwfn, true,
1338                                           "Failed to configure VLAN [%04x]"
1339                                           " to VF [%04x]\n",
1340                                           filter.vlan, p_vf->relative_vf_id);
1341                                 break;
1342                         }
1343                 }
1344         }
1345
1346         return rc;
1347 }
1348
1349 static enum _ecore_status_t
1350 ecore_iov_reconfigure_unicast_shadow(struct ecore_hwfn *p_hwfn,
1351                                      struct ecore_vf_info *p_vf, u64 events)
1352 {
1353         enum _ecore_status_t rc = ECORE_SUCCESS;
1354
1355         /*TODO - what about MACs? */
1356
1357         if ((events & (1 << VLAN_ADDR_FORCED)) &&
1358             !(p_vf->configured_features & (1 << VLAN_ADDR_FORCED)))
1359                 rc = ecore_iov_reconfigure_unicast_vlan(p_hwfn, p_vf);
1360
1361         return rc;
1362 }
1363
1364 static int ecore_iov_configure_vport_forced(struct ecore_hwfn *p_hwfn,
1365                                             struct ecore_vf_info *p_vf,
1366                                             u64 events)
1367 {
1368         enum _ecore_status_t rc = ECORE_SUCCESS;
1369         struct ecore_filter_ucast filter;
1370
1371         if (!p_vf->vport_instance)
1372                 return ECORE_INVAL;
1373
1374         if (events & (1 << MAC_ADDR_FORCED)) {
1375                 /* Since there's no way [currently] of removing the MAC,
1376                  * we can always assume this means we need to force it.
1377                  */
1378                 OSAL_MEMSET(&filter, 0, sizeof(filter));
1379                 filter.type = ECORE_FILTER_MAC;
1380                 filter.opcode = ECORE_FILTER_REPLACE;
1381                 filter.is_rx_filter = 1;
1382                 filter.is_tx_filter = 1;
1383                 filter.vport_to_add_to = p_vf->vport_id;
1384                 OSAL_MEMCPY(filter.mac, p_vf->bulletin.p_virt->mac, ETH_ALEN);
1385
1386                 rc = ecore_sp_eth_filter_ucast(p_hwfn, p_vf->opaque_fid,
1387                                                &filter,
1388                                                ECORE_SPQ_MODE_CB, OSAL_NULL);
1389                 if (rc) {
1390                         DP_NOTICE(p_hwfn, true,
1391                                   "PF failed to configure MAC for VF\n");
1392                         return rc;
1393                 }
1394
1395                 p_vf->configured_features |= 1 << MAC_ADDR_FORCED;
1396         }
1397
1398         if (events & (1 << VLAN_ADDR_FORCED)) {
1399                 struct ecore_sp_vport_update_params vport_update;
1400                 u8 removal;
1401                 int i;
1402
1403                 OSAL_MEMSET(&filter, 0, sizeof(filter));
1404                 filter.type = ECORE_FILTER_VLAN;
1405                 filter.is_rx_filter = 1;
1406                 filter.is_tx_filter = 1;
1407                 filter.vport_to_add_to = p_vf->vport_id;
1408                 filter.vlan = p_vf->bulletin.p_virt->pvid;
1409                 filter.opcode = filter.vlan ? ECORE_FILTER_REPLACE :
1410                     ECORE_FILTER_FLUSH;
1411
1412                 /* Send the ramrod */
1413                 rc = ecore_sp_eth_filter_ucast(p_hwfn, p_vf->opaque_fid,
1414                                                &filter,
1415                                                ECORE_SPQ_MODE_CB, OSAL_NULL);
1416                 if (rc) {
1417                         DP_NOTICE(p_hwfn, true,
1418                                   "PF failed to configure VLAN for VF\n");
1419                         return rc;
1420                 }
1421
1422                 /* Update the default-vlan & silent vlan stripping */
1423                 OSAL_MEMSET(&vport_update, 0, sizeof(vport_update));
1424                 vport_update.opaque_fid = p_vf->opaque_fid;
1425                 vport_update.vport_id = p_vf->vport_id;
1426                 vport_update.update_default_vlan_enable_flg = 1;
1427                 vport_update.default_vlan_enable_flg = filter.vlan ? 1 : 0;
1428                 vport_update.update_default_vlan_flg = 1;
1429                 vport_update.default_vlan = filter.vlan;
1430
1431                 vport_update.update_inner_vlan_removal_flg = 1;
1432                 removal = filter.vlan ?
1433                     1 : p_vf->shadow_config.inner_vlan_removal;
1434                 vport_update.inner_vlan_removal_flg = removal;
1435                 vport_update.silent_vlan_removal_flg = filter.vlan ? 1 : 0;
1436                 rc = ecore_sp_vport_update(p_hwfn, &vport_update,
1437                                            ECORE_SPQ_MODE_EBLOCK, OSAL_NULL);
1438                 if (rc) {
1439                         DP_NOTICE(p_hwfn, true,
1440                                   "PF failed to configure VF vport for vlan\n");
1441                         return rc;
1442                 }
1443
1444                 /* Update all the Rx queues */
1445                 for (i = 0; i < ECORE_MAX_VF_CHAINS_PER_PF; i++) {
1446                         u16 qid;
1447
1448                         if (!p_vf->vf_queues[i].rxq_active)
1449                                 continue;
1450
1451                         qid = p_vf->vf_queues[i].fw_rx_qid;
1452
1453                         rc = ecore_sp_eth_rx_queues_update(p_hwfn, qid,
1454                                                    1, 0, 1,
1455                                                    ECORE_SPQ_MODE_EBLOCK,
1456                                                    OSAL_NULL);
1457                         if (rc) {
1458                                 DP_NOTICE(p_hwfn, true,
1459                                           "Failed to send Rx update"
1460                                           " queue[0x%04x]\n",
1461                                           qid);
1462                                 return rc;
1463                         }
1464                 }
1465
1466                 if (filter.vlan)
1467                         p_vf->configured_features |= 1 << VLAN_ADDR_FORCED;
1468                 else
1469                         p_vf->configured_features &= ~(1 << VLAN_ADDR_FORCED);
1470         }
1471
1472         /* If forced features are terminated, we need to configure the shadow
1473          * configuration back again.
1474          */
1475         if (events)
1476                 ecore_iov_reconfigure_unicast_shadow(p_hwfn, p_vf, events);
1477
1478         return rc;
1479 }
1480
1481 static void ecore_iov_vf_mbx_start_vport(struct ecore_hwfn *p_hwfn,
1482                                          struct ecore_ptt *p_ptt,
1483                                          struct ecore_vf_info *vf)
1484 {
1485         struct ecore_iov_vf_mbx *mbx = &vf->vf_mbx;
1486         struct vfpf_vport_start_tlv *start = &mbx->req_virt->start_vport;
1487         struct ecore_sp_vport_start_params params = { 0 };
1488         u8 status = PFVF_STATUS_SUCCESS;
1489         struct ecore_vf_info *vf_info;
1490         enum _ecore_status_t rc;
1491         u64 *p_bitmap;
1492         int sb_id;
1493
1494         vf_info = ecore_iov_get_vf_info(p_hwfn, (u16)vf->relative_vf_id, true);
1495         if (!vf_info) {
1496                 DP_NOTICE(p_hwfn->p_dev, true,
1497                           "Failed to get VF info, invalid vfid [%d]\n",
1498                           vf->relative_vf_id);
1499                 return;
1500         }
1501
1502         vf->state = VF_ENABLED;
1503
1504         /* Initialize Status block in CAU */
1505         for (sb_id = 0; sb_id < vf->num_sbs; sb_id++) {
1506                 if (!start->sb_addr[sb_id]) {
1507                         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
1508                                    "VF[%d] did not fill the address of SB %d\n",
1509                                    vf->relative_vf_id, sb_id);
1510                         break;
1511                 }
1512
1513                 ecore_int_cau_conf_sb(p_hwfn, p_ptt,
1514                                       start->sb_addr[sb_id],
1515                                       vf->igu_sbs[sb_id],
1516                                       vf->abs_vf_id, 1 /* VF Valid */);
1517         }
1518         ecore_iov_enable_vf_traffic(p_hwfn, p_ptt, vf);
1519
1520         vf->mtu = start->mtu;
1521         vf->shadow_config.inner_vlan_removal = start->inner_vlan_removal;
1522
1523         /* Take into consideration configuration forced by hypervisor;
1524          * If none is configured, use the supplied VF values [for old
1525          * vfs that would still be fine, since they passed '0' as padding].
1526          */
1527         p_bitmap = &vf_info->bulletin.p_virt->valid_bitmap;
1528         if (!(*p_bitmap & (1 << VFPF_BULLETIN_UNTAGGED_DEFAULT_FORCED))) {
1529                 u8 vf_req = start->only_untagged;
1530
1531                 vf_info->bulletin.p_virt->default_only_untagged = vf_req;
1532                 *p_bitmap |= 1 << VFPF_BULLETIN_UNTAGGED_DEFAULT;
1533         }
1534
1535         params.tpa_mode = start->tpa_mode;
1536         params.remove_inner_vlan = start->inner_vlan_removal;
1537         params.tx_switching = true;
1538
1539 #ifndef ASIC_ONLY
1540         if (CHIP_REV_IS_FPGA(p_hwfn->p_dev)) {
1541                 DP_NOTICE(p_hwfn, false,
1542                           "FPGA: Don't confi VF for Tx-switching [no pVFC]\n");
1543                 params.tx_switching = false;
1544         }
1545 #endif
1546
1547         params.only_untagged = vf_info->bulletin.p_virt->default_only_untagged;
1548         params.drop_ttl0 = false;
1549         params.concrete_fid = vf->concrete_fid;
1550         params.opaque_fid = vf->opaque_fid;
1551         params.vport_id = vf->vport_id;
1552         params.max_buffers_per_cqe = start->max_buffers_per_cqe;
1553         params.mtu = vf->mtu;
1554
1555         rc = ecore_sp_eth_vport_start(p_hwfn, &params);
1556         if (rc != ECORE_SUCCESS) {
1557                 DP_ERR(p_hwfn,
1558                        "ecore_iov_vf_mbx_start_vport returned error %d\n", rc);
1559                 status = PFVF_STATUS_FAILURE;
1560         } else {
1561                 vf->vport_instance++;
1562
1563                 /* Force configuration if needed on the newly opened vport */
1564                 ecore_iov_configure_vport_forced(p_hwfn, vf, *p_bitmap);
1565                 OSAL_IOV_POST_START_VPORT(p_hwfn, vf->relative_vf_id,
1566                                           vf->vport_id, vf->opaque_fid);
1567                 __ecore_iov_spoofchk_set(p_hwfn, vf, vf->req_spoofchk_val);
1568         }
1569
1570         ecore_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_VPORT_START,
1571                                sizeof(struct pfvf_def_resp_tlv), status);
1572 }
1573
1574 static void ecore_iov_vf_mbx_stop_vport(struct ecore_hwfn *p_hwfn,
1575                                         struct ecore_ptt *p_ptt,
1576                                         struct ecore_vf_info *vf)
1577 {
1578         u8 status = PFVF_STATUS_SUCCESS;
1579         enum _ecore_status_t rc;
1580
1581         vf->vport_instance--;
1582         vf->spoof_chk = false;
1583
1584         rc = ecore_sp_vport_stop(p_hwfn, vf->opaque_fid, vf->vport_id);
1585         if (rc != ECORE_SUCCESS) {
1586                 DP_ERR(p_hwfn,
1587                        "ecore_iov_vf_mbx_stop_vport returned error %d\n", rc);
1588                 status = PFVF_STATUS_FAILURE;
1589         }
1590
1591         /* Forget the configuration on the vport */
1592         vf->configured_features = 0;
1593         OSAL_MEMSET(&vf->shadow_config, 0, sizeof(vf->shadow_config));
1594
1595         ecore_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_VPORT_TEARDOWN,
1596                                sizeof(struct pfvf_def_resp_tlv), status);
1597 }
1598
1599 static void ecore_iov_vf_mbx_start_rxq(struct ecore_hwfn *p_hwfn,
1600                                        struct ecore_ptt *p_ptt,
1601                                        struct ecore_vf_info *vf)
1602 {
1603         struct ecore_iov_vf_mbx *mbx = &vf->vf_mbx;
1604         struct vfpf_start_rxq_tlv *req = &mbx->req_virt->start_rxq;
1605         u16 length = sizeof(struct pfvf_def_resp_tlv);
1606         u8 status = PFVF_STATUS_SUCCESS;
1607         enum _ecore_status_t rc;
1608
1609         rc = ecore_sp_eth_rxq_start_ramrod(p_hwfn, vf->opaque_fid,
1610                                            vf->vf_queues[req->rx_qid].fw_cid,
1611                                            vf->vf_queues[req->rx_qid].fw_rx_qid,
1612                                            vf->vport_id,
1613                                            vf->abs_vf_id + 0x10,
1614                                            req->hw_sb,
1615                                            req->sb_index,
1616                                            req->bd_max_bytes,
1617                                            req->rxq_addr,
1618                                            req->cqe_pbl_addr,
1619                                            req->cqe_pbl_size);
1620
1621         if (rc) {
1622                 status = PFVF_STATUS_FAILURE;
1623         } else {
1624                 vf->vf_queues[req->rx_qid].rxq_active = true;
1625                 vf->num_active_rxqs++;
1626         }
1627
1628         ecore_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_START_RXQ,
1629                                length, status);
1630 }
1631
1632 static void ecore_iov_vf_mbx_start_txq(struct ecore_hwfn *p_hwfn,
1633                                        struct ecore_ptt *p_ptt,
1634                                        struct ecore_vf_info *vf)
1635 {
1636         struct ecore_iov_vf_mbx *mbx = &vf->vf_mbx;
1637         struct vfpf_start_txq_tlv *req = &mbx->req_virt->start_txq;
1638         u16 length = sizeof(struct pfvf_def_resp_tlv);
1639         union ecore_qm_pq_params pq_params;
1640         u8 status = PFVF_STATUS_SUCCESS;
1641         enum _ecore_status_t rc;
1642
1643         /* Prepare the parameters which would choose the right PQ */
1644         OSAL_MEMSET(&pq_params, 0, sizeof(pq_params));
1645         pq_params.eth.is_vf = 1;
1646         pq_params.eth.vf_id = vf->relative_vf_id;
1647
1648         rc = ecore_sp_eth_txq_start_ramrod(p_hwfn,
1649                                            vf->opaque_fid,
1650                                            vf->vf_queues[req->tx_qid].fw_tx_qid,
1651                                            vf->vf_queues[req->tx_qid].fw_cid,
1652                                            vf->vport_id,
1653                                            vf->abs_vf_id + 0x10,
1654                                            req->hw_sb,
1655                                            req->sb_index,
1656                                            req->pbl_addr,
1657                                            req->pbl_size, &pq_params);
1658
1659         if (rc)
1660                 status = PFVF_STATUS_FAILURE;
1661         else
1662                 vf->vf_queues[req->tx_qid].txq_active = true;
1663
1664         ecore_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_START_TXQ,
1665                                length, status);
1666 }
1667
1668 static enum _ecore_status_t ecore_iov_vf_stop_rxqs(struct ecore_hwfn *p_hwfn,
1669                                                    struct ecore_vf_info *vf,
1670                                                    u16 rxq_id,
1671                                                    u8 num_rxqs,
1672                                                    bool cqe_completion)
1673 {
1674         enum _ecore_status_t rc = ECORE_SUCCESS;
1675         int qid;
1676
1677         if (rxq_id + num_rxqs > OSAL_ARRAY_SIZE(vf->vf_queues))
1678                 return ECORE_INVAL;
1679
1680         for (qid = rxq_id; qid < rxq_id + num_rxqs; qid++) {
1681                 if (vf->vf_queues[qid].rxq_active) {
1682                         rc = ecore_sp_eth_rx_queue_stop(p_hwfn,
1683                                                         vf->vf_queues[qid].
1684                                                         fw_rx_qid, false,
1685                                                         cqe_completion);
1686
1687                         if (rc)
1688                                 return rc;
1689                 }
1690                 vf->vf_queues[qid].rxq_active = false;
1691                 vf->num_active_rxqs--;
1692         }
1693
1694         return rc;
1695 }
1696
1697 static enum _ecore_status_t ecore_iov_vf_stop_txqs(struct ecore_hwfn *p_hwfn,
1698                                                    struct ecore_vf_info *vf,
1699                                                    u16 txq_id, u8 num_txqs)
1700 {
1701         enum _ecore_status_t rc = ECORE_SUCCESS;
1702         int qid;
1703
1704         if (txq_id + num_txqs > OSAL_ARRAY_SIZE(vf->vf_queues))
1705                 return ECORE_INVAL;
1706
1707         for (qid = txq_id; qid < txq_id + num_txqs; qid++) {
1708                 if (vf->vf_queues[qid].txq_active) {
1709                         rc = ecore_sp_eth_tx_queue_stop(p_hwfn,
1710                                                         vf->vf_queues[qid].
1711                                                         fw_tx_qid);
1712
1713                         if (rc)
1714                                 return rc;
1715                 }
1716                 vf->vf_queues[qid].txq_active = false;
1717         }
1718         return rc;
1719 }
1720
1721 static void ecore_iov_vf_mbx_stop_rxqs(struct ecore_hwfn *p_hwfn,
1722                                        struct ecore_ptt *p_ptt,
1723                                        struct ecore_vf_info *vf)
1724 {
1725         struct ecore_iov_vf_mbx *mbx = &vf->vf_mbx;
1726         struct vfpf_stop_rxqs_tlv *req = &mbx->req_virt->stop_rxqs;
1727         u16 length = sizeof(struct pfvf_def_resp_tlv);
1728         u8 status = PFVF_STATUS_SUCCESS;
1729         enum _ecore_status_t rc;
1730
1731         /* We give the option of starting from qid != 0, in this case we
1732          * need to make sure that qid + num_qs doesn't exceed the actual
1733          * amount of queues that exist.
1734          */
1735         rc = ecore_iov_vf_stop_rxqs(p_hwfn, vf, req->rx_qid,
1736                                     req->num_rxqs, req->cqe_completion);
1737         if (rc)
1738                 status = PFVF_STATUS_FAILURE;
1739
1740         ecore_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_STOP_RXQS,
1741                                length, status);
1742 }
1743
1744 static void ecore_iov_vf_mbx_stop_txqs(struct ecore_hwfn *p_hwfn,
1745                                        struct ecore_ptt *p_ptt,
1746                                        struct ecore_vf_info *vf)
1747 {
1748         struct ecore_iov_vf_mbx *mbx = &vf->vf_mbx;
1749         struct vfpf_stop_txqs_tlv *req = &mbx->req_virt->stop_txqs;
1750         u16 length = sizeof(struct pfvf_def_resp_tlv);
1751         u8 status = PFVF_STATUS_SUCCESS;
1752         enum _ecore_status_t rc;
1753
1754         /* We give the option of starting from qid != 0, in this case we
1755          * need to make sure that qid + num_qs doesn't exceed the actual
1756          * amount of queues that exist.
1757          */
1758         rc = ecore_iov_vf_stop_txqs(p_hwfn, vf, req->tx_qid, req->num_txqs);
1759         if (rc)
1760                 status = PFVF_STATUS_FAILURE;
1761
1762         ecore_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_STOP_TXQS,
1763                                length, status);
1764 }
1765
1766 static void ecore_iov_vf_mbx_update_rxqs(struct ecore_hwfn *p_hwfn,
1767                                          struct ecore_ptt *p_ptt,
1768                                          struct ecore_vf_info *vf)
1769 {
1770         struct ecore_iov_vf_mbx *mbx = &vf->vf_mbx;
1771         struct vfpf_update_rxq_tlv *req = &mbx->req_virt->update_rxq;
1772         u16 length = sizeof(struct pfvf_def_resp_tlv);
1773         u8 status = PFVF_STATUS_SUCCESS;
1774         u8 complete_event_flg;
1775         u8 complete_cqe_flg;
1776         enum _ecore_status_t rc;
1777         u16 qid;
1778         u8 i;
1779
1780         complete_cqe_flg = !!(req->flags & VFPF_RXQ_UPD_COMPLETE_CQE_FLAG);
1781         complete_event_flg = !!(req->flags & VFPF_RXQ_UPD_COMPLETE_EVENT_FLAG);
1782
1783         for (i = 0; i < req->num_rxqs; i++) {
1784                 qid = req->rx_qid + i;
1785
1786                 if (!vf->vf_queues[qid].rxq_active) {
1787                         DP_NOTICE(p_hwfn, true,
1788                                   "VF rx_qid = %d isn`t active!\n", qid);
1789                         status = PFVF_STATUS_FAILURE;
1790                         break;
1791                 }
1792
1793                 rc = ecore_sp_eth_rx_queues_update(p_hwfn,
1794                                                    vf->vf_queues[qid].fw_rx_qid,
1795                                                    1,
1796                                                    complete_cqe_flg,
1797                                                    complete_event_flg,
1798                                                    ECORE_SPQ_MODE_EBLOCK,
1799                                                    OSAL_NULL);
1800
1801                 if (rc) {
1802                         status = PFVF_STATUS_FAILURE;
1803                         break;
1804                 }
1805         }
1806
1807         ecore_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_UPDATE_RXQ,
1808                                length, status);
1809 }
1810
1811 void *ecore_iov_search_list_tlvs(struct ecore_hwfn *p_hwfn,
1812                                  void *p_tlvs_list, u16 req_type)
1813 {
1814         struct channel_tlv *p_tlv = (struct channel_tlv *)p_tlvs_list;
1815         int len = 0;
1816
1817         do {
1818                 if (!p_tlv->length) {
1819                         DP_NOTICE(p_hwfn, true, "Zero length TLV found\n");
1820                         return OSAL_NULL;
1821                 }
1822
1823                 if (p_tlv->type == req_type) {
1824                         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
1825                                    "Extended tlv type %s, length %d found\n",
1826                                    ecore_channel_tlvs_string[p_tlv->type],
1827                                    p_tlv->length);
1828                         return p_tlv;
1829                 }
1830
1831                 len += p_tlv->length;
1832                 p_tlv = (struct channel_tlv *)((u8 *)p_tlv + p_tlv->length);
1833
1834                 if ((len + p_tlv->length) > TLV_BUFFER_SIZE) {
1835                         DP_NOTICE(p_hwfn, true,
1836                                   "TLVs has overrun the buffer size\n");
1837                         return OSAL_NULL;
1838                 }
1839         } while (p_tlv->type != CHANNEL_TLV_LIST_END);
1840
1841         return OSAL_NULL;
1842 }
1843
1844 static void
1845 ecore_iov_vp_update_act_param(struct ecore_hwfn *p_hwfn,
1846                               struct ecore_sp_vport_update_params *p_data,
1847                               struct ecore_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
1848 {
1849         struct vfpf_vport_update_activate_tlv *p_act_tlv;
1850         u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACTIVATE;
1851
1852         p_act_tlv = (struct vfpf_vport_update_activate_tlv *)
1853             ecore_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
1854         if (p_act_tlv) {
1855                 p_data->update_vport_active_rx_flg = p_act_tlv->update_rx;
1856                 p_data->vport_active_rx_flg = p_act_tlv->active_rx;
1857                 p_data->update_vport_active_tx_flg = p_act_tlv->update_tx;
1858                 p_data->vport_active_tx_flg = p_act_tlv->active_tx;
1859                 *tlvs_mask |= 1 << ECORE_IOV_VP_UPDATE_ACTIVATE;
1860         }
1861 }
1862
1863 static void
1864 ecore_iov_vp_update_vlan_param(struct ecore_hwfn *p_hwfn,
1865                                struct ecore_sp_vport_update_params *p_data,
1866                                struct ecore_vf_info *p_vf,
1867                                struct ecore_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
1868 {
1869         struct vfpf_vport_update_vlan_strip_tlv *p_vlan_tlv;
1870         u16 tlv = CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP;
1871
1872         p_vlan_tlv = (struct vfpf_vport_update_vlan_strip_tlv *)
1873             ecore_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
1874         if (!p_vlan_tlv)
1875                 return;
1876
1877         p_vf->shadow_config.inner_vlan_removal = p_vlan_tlv->remove_vlan;
1878
1879         /* Ignore the VF request if we're forcing a vlan */
1880         if (!(p_vf->configured_features & (1 << VLAN_ADDR_FORCED))) {
1881                 p_data->update_inner_vlan_removal_flg = 1;
1882                 p_data->inner_vlan_removal_flg = p_vlan_tlv->remove_vlan;
1883         }
1884
1885         *tlvs_mask |= 1 << ECORE_IOV_VP_UPDATE_VLAN_STRIP;
1886 }
1887
1888 static void
1889 ecore_iov_vp_update_tx_switch(struct ecore_hwfn *p_hwfn,
1890                               struct ecore_sp_vport_update_params *p_data,
1891                               struct ecore_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
1892 {
1893         struct vfpf_vport_update_tx_switch_tlv *p_tx_switch_tlv;
1894         u16 tlv = CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH;
1895
1896         p_tx_switch_tlv = (struct vfpf_vport_update_tx_switch_tlv *)
1897             ecore_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
1898
1899 #ifndef ASIC_ONLY
1900         if (CHIP_REV_IS_FPGA(p_hwfn->p_dev)) {
1901                 DP_NOTICE(p_hwfn, false,
1902                           "FPGA: Ignore tx-switching configuration originating from VFs\n");
1903                 return;
1904         }
1905 #endif
1906
1907         if (p_tx_switch_tlv) {
1908                 p_data->update_tx_switching_flg = 1;
1909                 p_data->tx_switching_flg = p_tx_switch_tlv->tx_switching;
1910                 *tlvs_mask |= 1 << ECORE_IOV_VP_UPDATE_TX_SWITCH;
1911         }
1912 }
1913
1914 static void
1915 ecore_iov_vp_update_mcast_bin_param(struct ecore_hwfn *p_hwfn,
1916                                     struct ecore_sp_vport_update_params *p_data,
1917                                     struct ecore_iov_vf_mbx *p_mbx,
1918                                     u16 *tlvs_mask)
1919 {
1920         struct vfpf_vport_update_mcast_bin_tlv *p_mcast_tlv;
1921         u16 tlv = CHANNEL_TLV_VPORT_UPDATE_MCAST;
1922
1923         p_mcast_tlv = (struct vfpf_vport_update_mcast_bin_tlv *)
1924             ecore_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
1925
1926         if (p_mcast_tlv) {
1927                 p_data->update_approx_mcast_flg = 1;
1928                 OSAL_MEMCPY(p_data->bins, p_mcast_tlv->bins,
1929                             sizeof(unsigned long) *
1930                             ETH_MULTICAST_MAC_BINS_IN_REGS);
1931                 *tlvs_mask |= 1 << ECORE_IOV_VP_UPDATE_MCAST;
1932         }
1933 }
1934
1935 static void
1936 ecore_iov_vp_update_accept_flag(struct ecore_hwfn *p_hwfn,
1937                                 struct ecore_sp_vport_update_params *p_data,
1938                                 struct ecore_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
1939 {
1940         struct vfpf_vport_update_accept_param_tlv *p_accept_tlv;
1941         u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM;
1942
1943         p_accept_tlv = (struct vfpf_vport_update_accept_param_tlv *)
1944             ecore_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
1945
1946         if (p_accept_tlv) {
1947                 p_data->accept_flags.update_rx_mode_config =
1948                     p_accept_tlv->update_rx_mode;
1949                 p_data->accept_flags.rx_accept_filter =
1950                     p_accept_tlv->rx_accept_filter;
1951                 p_data->accept_flags.update_tx_mode_config =
1952                     p_accept_tlv->update_tx_mode;
1953                 p_data->accept_flags.tx_accept_filter =
1954                     p_accept_tlv->tx_accept_filter;
1955                 *tlvs_mask |= 1 << ECORE_IOV_VP_UPDATE_ACCEPT_PARAM;
1956         }
1957 }
1958
1959 static void
1960 ecore_iov_vp_update_accept_any_vlan(struct ecore_hwfn *p_hwfn,
1961                                     struct ecore_sp_vport_update_params *p_data,
1962                                     struct ecore_iov_vf_mbx *p_mbx,
1963                                     u16 *tlvs_mask)
1964 {
1965         struct vfpf_vport_update_accept_any_vlan_tlv *p_accept_any_vlan;
1966         u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN;
1967
1968         p_accept_any_vlan = (struct vfpf_vport_update_accept_any_vlan_tlv *)
1969             ecore_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
1970
1971         if (p_accept_any_vlan) {
1972                 p_data->accept_any_vlan = p_accept_any_vlan->accept_any_vlan;
1973                 p_data->update_accept_any_vlan_flg =
1974                     p_accept_any_vlan->update_accept_any_vlan_flg;
1975                 *tlvs_mask |= 1 << ECORE_IOV_VP_UPDATE_ACCEPT_ANY_VLAN;
1976         }
1977 }
1978
1979 static void
1980 ecore_iov_vp_update_rss_param(struct ecore_hwfn *p_hwfn,
1981                               struct ecore_vf_info *vf,
1982                               struct ecore_sp_vport_update_params *p_data,
1983                               struct ecore_rss_params *p_rss,
1984                               struct ecore_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
1985 {
1986         struct vfpf_vport_update_rss_tlv *p_rss_tlv;
1987         u16 tlv = CHANNEL_TLV_VPORT_UPDATE_RSS;
1988         u16 table_size;
1989         u16 i, q_idx, max_q_idx;
1990
1991         p_rss_tlv = (struct vfpf_vport_update_rss_tlv *)
1992             ecore_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
1993         if (p_rss_tlv) {
1994                 OSAL_MEMSET(p_rss, 0, sizeof(struct ecore_rss_params));
1995
1996                 p_rss->update_rss_config =
1997                     !!(p_rss_tlv->update_rss_flags &
1998                         VFPF_UPDATE_RSS_CONFIG_FLAG);
1999                 p_rss->update_rss_capabilities =
2000                     !!(p_rss_tlv->update_rss_flags &
2001                         VFPF_UPDATE_RSS_CAPS_FLAG);
2002                 p_rss->update_rss_ind_table =
2003                     !!(p_rss_tlv->update_rss_flags &
2004                         VFPF_UPDATE_RSS_IND_TABLE_FLAG);
2005                 p_rss->update_rss_key =
2006                     !!(p_rss_tlv->update_rss_flags & VFPF_UPDATE_RSS_KEY_FLAG);
2007
2008                 p_rss->rss_enable = p_rss_tlv->rss_enable;
2009                 p_rss->rss_eng_id = vf->relative_vf_id + 1;
2010                 p_rss->rss_caps = p_rss_tlv->rss_caps;
2011                 p_rss->rss_table_size_log = p_rss_tlv->rss_table_size_log;
2012                 OSAL_MEMCPY(p_rss->rss_ind_table, p_rss_tlv->rss_ind_table,
2013                             sizeof(p_rss->rss_ind_table));
2014                 OSAL_MEMCPY(p_rss->rss_key, p_rss_tlv->rss_key,
2015                             sizeof(p_rss->rss_key));
2016
2017                 table_size = OSAL_MIN_T(u16,
2018                                         OSAL_ARRAY_SIZE(p_rss->rss_ind_table),
2019                                         (1 << p_rss_tlv->rss_table_size_log));
2020
2021                 max_q_idx = OSAL_ARRAY_SIZE(vf->vf_queues);
2022
2023                 for (i = 0; i < table_size; i++) {
2024                         q_idx = p_rss->rss_ind_table[i];
2025                         if (q_idx >= max_q_idx) {
2026                                 DP_NOTICE(p_hwfn, true,
2027                                           "rss_ind_table[%d] = %d, rxq is out of range\n",
2028                                           i, q_idx);
2029                                 /* TBD: fail the request mark VF as malicious */
2030                                 p_rss->rss_ind_table[i] =
2031                                     vf->vf_queues[0].fw_rx_qid;
2032                         } else if (!vf->vf_queues[q_idx].rxq_active) {
2033                                 DP_NOTICE(p_hwfn, true,
2034                                           "rss_ind_table[%d] = %d, rxq is not active\n",
2035                                           i, q_idx);
2036                                 /* TBD: fail the request mark VF as malicious */
2037                                 p_rss->rss_ind_table[i] =
2038                                     vf->vf_queues[0].fw_rx_qid;
2039                         } else {
2040                                 p_rss->rss_ind_table[i] =
2041                                     vf->vf_queues[q_idx].fw_rx_qid;
2042                         }
2043                 }
2044
2045                 p_data->rss_params = p_rss;
2046                 *tlvs_mask |= 1 << ECORE_IOV_VP_UPDATE_RSS;
2047         } else {
2048                 p_data->rss_params = OSAL_NULL;
2049         }
2050 }
2051
2052 static void
2053 ecore_iov_vp_update_sge_tpa_param(struct ecore_hwfn *p_hwfn,
2054                                   struct ecore_vf_info *vf,
2055                                   struct ecore_sp_vport_update_params *p_data,
2056                                   struct ecore_sge_tpa_params *p_sge_tpa,
2057                                   struct ecore_iov_vf_mbx *p_mbx,
2058                                   u16 *tlvs_mask)
2059 {
2060         struct vfpf_vport_update_sge_tpa_tlv *p_sge_tpa_tlv;
2061         u16 tlv = CHANNEL_TLV_VPORT_UPDATE_SGE_TPA;
2062
2063         p_sge_tpa_tlv = (struct vfpf_vport_update_sge_tpa_tlv *)
2064             ecore_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
2065
2066         if (!p_sge_tpa_tlv) {
2067                 p_data->sge_tpa_params = OSAL_NULL;
2068                 return;
2069         }
2070
2071         OSAL_MEMSET(p_sge_tpa, 0, sizeof(struct ecore_sge_tpa_params));
2072
2073         p_sge_tpa->update_tpa_en_flg =
2074             !!(p_sge_tpa_tlv->update_sge_tpa_flags & VFPF_UPDATE_TPA_EN_FLAG);
2075         p_sge_tpa->update_tpa_param_flg =
2076             !!(p_sge_tpa_tlv->update_sge_tpa_flags &
2077                 VFPF_UPDATE_TPA_PARAM_FLAG);
2078
2079         p_sge_tpa->tpa_ipv4_en_flg =
2080             !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_IPV4_EN_FLAG);
2081         p_sge_tpa->tpa_ipv6_en_flg =
2082             !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_IPV6_EN_FLAG);
2083         p_sge_tpa->tpa_pkt_split_flg =
2084             !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_PKT_SPLIT_FLAG);
2085         p_sge_tpa->tpa_hdr_data_split_flg =
2086             !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_HDR_DATA_SPLIT_FLAG);
2087         p_sge_tpa->tpa_gro_consistent_flg =
2088             !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_GRO_CONSIST_FLAG);
2089
2090         p_sge_tpa->tpa_max_aggs_num = p_sge_tpa_tlv->tpa_max_aggs_num;
2091         p_sge_tpa->tpa_max_size = p_sge_tpa_tlv->tpa_max_size;
2092         p_sge_tpa->tpa_min_size_to_start = p_sge_tpa_tlv->tpa_min_size_to_start;
2093         p_sge_tpa->tpa_min_size_to_cont = p_sge_tpa_tlv->tpa_min_size_to_cont;
2094         p_sge_tpa->max_buffers_per_cqe = p_sge_tpa_tlv->max_buffers_per_cqe;
2095
2096         p_data->sge_tpa_params = p_sge_tpa;
2097
2098         *tlvs_mask |= 1 << ECORE_IOV_VP_UPDATE_SGE_TPA;
2099 }
2100
2101 static void ecore_iov_vf_mbx_vport_update(struct ecore_hwfn *p_hwfn,
2102                                           struct ecore_ptt *p_ptt,
2103                                           struct ecore_vf_info *vf)
2104 {
2105         struct ecore_sp_vport_update_params params;
2106         struct ecore_iov_vf_mbx *mbx = &vf->vf_mbx;
2107         struct ecore_sge_tpa_params sge_tpa_params;
2108         struct ecore_rss_params rss_params;
2109         u8 status = PFVF_STATUS_SUCCESS;
2110         enum _ecore_status_t rc;
2111         u16 tlvs_mask = 0, tlvs_accepted;
2112         u16 length;
2113
2114         OSAL_MEMSET(&params, 0, sizeof(params));
2115         params.opaque_fid = vf->opaque_fid;
2116         params.vport_id = vf->vport_id;
2117         params.rss_params = OSAL_NULL;
2118
2119         /* Search for extended tlvs list and update values
2120          * from VF in struct ecore_sp_vport_update_params.
2121          */
2122         ecore_iov_vp_update_act_param(p_hwfn, &params, mbx, &tlvs_mask);
2123         ecore_iov_vp_update_vlan_param(p_hwfn, &params, vf, mbx, &tlvs_mask);
2124         ecore_iov_vp_update_tx_switch(p_hwfn, &params, mbx, &tlvs_mask);
2125         ecore_iov_vp_update_mcast_bin_param(p_hwfn, &params, mbx, &tlvs_mask);
2126         ecore_iov_vp_update_accept_flag(p_hwfn, &params, mbx, &tlvs_mask);
2127         ecore_iov_vp_update_rss_param(p_hwfn, vf, &params, &rss_params,
2128                                       mbx, &tlvs_mask);
2129         ecore_iov_vp_update_accept_any_vlan(p_hwfn, &params, mbx, &tlvs_mask);
2130         ecore_iov_vp_update_sge_tpa_param(p_hwfn, vf, &params,
2131                                           &sge_tpa_params, mbx, &tlvs_mask);
2132
2133         /* Just log a message if there is no single extended tlv in buffer.
2134          * When all features of vport update ramrod would be requested by VF
2135          * as extended TLVs in buffer then an error can be returned in response
2136          * if there is no extended TLV present in buffer.
2137          */
2138         tlvs_accepted = tlvs_mask;
2139
2140 #ifndef __EXTRACT__LINUX__
2141         if (OSAL_IOV_VF_VPORT_UPDATE(p_hwfn, vf->relative_vf_id,
2142                                      &params, &tlvs_accepted) !=
2143             ECORE_SUCCESS) {
2144                 tlvs_accepted = 0;
2145                 status = PFVF_STATUS_NOT_SUPPORTED;
2146                 goto out;
2147         }
2148 #endif
2149
2150         if (!tlvs_accepted) {
2151                 if (tlvs_mask)
2152                         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
2153                                    "Upper-layer prevents said VF configuration\n");
2154                 else
2155                         DP_NOTICE(p_hwfn, true,
2156                                   "No feature tlvs found for vport update\n");
2157                 status = PFVF_STATUS_NOT_SUPPORTED;
2158                 goto out;
2159         }
2160
2161         rc = ecore_sp_vport_update(p_hwfn, &params, ECORE_SPQ_MODE_EBLOCK,
2162                                    OSAL_NULL);
2163
2164         if (rc)
2165                 status = PFVF_STATUS_FAILURE;
2166
2167 out:
2168         length = ecore_iov_prep_vp_update_resp_tlvs(p_hwfn, vf, mbx, status,
2169                                                     tlvs_mask, tlvs_accepted);
2170         ecore_iov_send_response(p_hwfn, p_ptt, vf, length, status);
2171 }
2172
2173 static enum _ecore_status_t
2174 ecore_iov_vf_update_unicast_shadow(struct ecore_hwfn *p_hwfn,
2175                                    struct ecore_vf_info *p_vf,
2176                                    struct ecore_filter_ucast *p_params)
2177 {
2178         int i;
2179
2180         /* TODO - do we need a MAC shadow registery? */
2181         if (p_params->type == ECORE_FILTER_MAC)
2182                 return ECORE_SUCCESS;
2183
2184         /* First remove entries and then add new ones */
2185         if (p_params->opcode == ECORE_FILTER_REMOVE) {
2186                 for (i = 0; i < ECORE_ETH_VF_NUM_VLAN_FILTERS + 1; i++)
2187                         if (p_vf->shadow_config.vlans[i].used &&
2188                             p_vf->shadow_config.vlans[i].vid ==
2189                             p_params->vlan) {
2190                                 p_vf->shadow_config.vlans[i].used = false;
2191                                 break;
2192                         }
2193                 if (i == ECORE_ETH_VF_NUM_VLAN_FILTERS + 1) {
2194                         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
2195                                    "VF [%d] - Tries to remove a non-existing vlan\n",
2196                                    p_vf->relative_vf_id);
2197                         return ECORE_INVAL;
2198                 }
2199         } else if (p_params->opcode == ECORE_FILTER_REPLACE ||
2200                    p_params->opcode == ECORE_FILTER_FLUSH) {
2201                 for (i = 0; i < ECORE_ETH_VF_NUM_VLAN_FILTERS + 1; i++)
2202                         p_vf->shadow_config.vlans[i].used = false;
2203         }
2204
2205         /* In forced mode, we're willing to remove entries - but we don't add
2206          * new ones.
2207          */
2208         if (p_vf->bulletin.p_virt->valid_bitmap & (1 << VLAN_ADDR_FORCED))
2209                 return ECORE_SUCCESS;
2210
2211         if (p_params->opcode == ECORE_FILTER_ADD ||
2212             p_params->opcode == ECORE_FILTER_REPLACE) {
2213                 for (i = 0; i < ECORE_ETH_VF_NUM_VLAN_FILTERS + 1; i++)
2214                         if (!p_vf->shadow_config.vlans[i].used) {
2215                                 p_vf->shadow_config.vlans[i].used = true;
2216                                 p_vf->shadow_config.vlans[i].vid =
2217                                     p_params->vlan;
2218                                 break;
2219                         }
2220                 if (i == ECORE_ETH_VF_NUM_VLAN_FILTERS + 1) {
2221                         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
2222                                    "VF [%d] - Tries to configure more than %d vlan filters\n",
2223                                    p_vf->relative_vf_id,
2224                                    ECORE_ETH_VF_NUM_VLAN_FILTERS + 1);
2225                         return ECORE_INVAL;
2226                 }
2227         }
2228
2229         return ECORE_SUCCESS;
2230 }
2231
2232 static void ecore_iov_vf_mbx_ucast_filter(struct ecore_hwfn *p_hwfn,
2233                                           struct ecore_ptt *p_ptt,
2234                                           struct ecore_vf_info *vf)
2235 {
2236         struct ecore_iov_vf_mbx *mbx = &vf->vf_mbx;
2237         struct vfpf_ucast_filter_tlv *req = &mbx->req_virt->ucast_filter;
2238         struct ecore_bulletin_content *p_bulletin = vf->bulletin.p_virt;
2239         struct ecore_filter_ucast params;
2240         u8 status = PFVF_STATUS_SUCCESS;
2241         enum _ecore_status_t rc;
2242
2243         /* Prepare the unicast filter params */
2244         OSAL_MEMSET(&params, 0, sizeof(struct ecore_filter_ucast));
2245         params.opcode = (enum ecore_filter_opcode)req->opcode;
2246         params.type = (enum ecore_filter_ucast_type)req->type;
2247
2248         /* @@@TBD - We might need logic on HV side in determining this */
2249         params.is_rx_filter = 1;
2250         params.is_tx_filter = 1;
2251         params.vport_to_remove_from = vf->vport_id;
2252         params.vport_to_add_to = vf->vport_id;
2253         OSAL_MEMCPY(params.mac, req->mac, ETH_ALEN);
2254         params.vlan = req->vlan;
2255
2256         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
2257                    "VF[%d]: opcode 0x%02x type 0x%02x [%s %s] [vport 0x%02x] MAC %02x:%02x:%02x:%02x:%02x:%02x, vlan 0x%04x\n",
2258                    vf->abs_vf_id, params.opcode, params.type,
2259                    params.is_rx_filter ? "RX" : "",
2260                    params.is_tx_filter ? "TX" : "",
2261                    params.vport_to_add_to,
2262                    params.mac[0], params.mac[1], params.mac[2],
2263                    params.mac[3], params.mac[4], params.mac[5], params.vlan);
2264
2265         if (!vf->vport_instance) {
2266                 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
2267                            "No VPORT instance available for VF[%d], failing ucast MAC configuration\n",
2268                            vf->abs_vf_id);
2269                 status = PFVF_STATUS_FAILURE;
2270                 goto out;
2271         }
2272
2273         /* Update shadow copy of the VF configuration */
2274         if (ecore_iov_vf_update_unicast_shadow(p_hwfn, vf, &params) !=
2275             ECORE_SUCCESS) {
2276                 status = PFVF_STATUS_FAILURE;
2277                 goto out;
2278         }
2279
2280         /* Determine if the unicast filtering is acceptible by PF */
2281         if ((p_bulletin->valid_bitmap & (1 << VLAN_ADDR_FORCED)) &&
2282             (params.type == ECORE_FILTER_VLAN ||
2283              params.type == ECORE_FILTER_MAC_VLAN)) {
2284                 /* Once VLAN is forced or PVID is set, do not allow
2285                  * to add/replace any further VLANs.
2286                  */
2287                 if (params.opcode == ECORE_FILTER_ADD ||
2288                     params.opcode == ECORE_FILTER_REPLACE)
2289                         status = PFVF_STATUS_FORCED;
2290                 goto out;
2291         }
2292
2293         if ((p_bulletin->valid_bitmap & (1 << MAC_ADDR_FORCED)) &&
2294             (params.type == ECORE_FILTER_MAC ||
2295              params.type == ECORE_FILTER_MAC_VLAN)) {
2296                 if (OSAL_MEMCMP(p_bulletin->mac, params.mac, ETH_ALEN) ||
2297                     (params.opcode != ECORE_FILTER_ADD &&
2298                      params.opcode != ECORE_FILTER_REPLACE))
2299                         status = PFVF_STATUS_FORCED;
2300                 goto out;
2301         }
2302
2303         rc = OSAL_IOV_CHK_UCAST(p_hwfn, vf->relative_vf_id, &params);
2304         if (rc == ECORE_EXISTS) {
2305                 goto out;
2306         } else if (rc == ECORE_INVAL) {
2307                 status = PFVF_STATUS_FAILURE;
2308                 goto out;
2309         }
2310
2311         rc = ecore_sp_eth_filter_ucast(p_hwfn, vf->opaque_fid, &params,
2312                                        ECORE_SPQ_MODE_CB, OSAL_NULL);
2313         if (rc)
2314                 status = PFVF_STATUS_FAILURE;
2315
2316 out:
2317         ecore_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_UCAST_FILTER,
2318                                sizeof(struct pfvf_def_resp_tlv), status);
2319 }
2320
2321 static void ecore_iov_vf_mbx_int_cleanup(struct ecore_hwfn *p_hwfn,
2322                                          struct ecore_ptt *p_ptt,
2323                                          struct ecore_vf_info *vf)
2324 {
2325         int i;
2326
2327         /* Reset the SBs */
2328         for (i = 0; i < vf->num_sbs; i++)
2329                 ecore_int_igu_init_pure_rt_single(p_hwfn, p_ptt,
2330                                                   vf->igu_sbs[i],
2331                                                   vf->opaque_fid, false);
2332
2333         ecore_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_INT_CLEANUP,
2334                                sizeof(struct pfvf_def_resp_tlv),
2335                                PFVF_STATUS_SUCCESS);
2336 }
2337
2338 static void ecore_iov_vf_mbx_close(struct ecore_hwfn *p_hwfn,
2339                                    struct ecore_ptt *p_ptt,
2340                                    struct ecore_vf_info *vf)
2341 {
2342         u16 length = sizeof(struct pfvf_def_resp_tlv);
2343         u8 status = PFVF_STATUS_SUCCESS;
2344
2345         /* Disable Interrupts for VF */
2346         ecore_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 0 /* disable */);
2347
2348         /* Reset Permission table */
2349         ecore_iov_config_perm_table(p_hwfn, p_ptt, vf, 0 /* disable */);
2350
2351         ecore_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_CLOSE,
2352                                length, status);
2353 }
2354
2355 static void ecore_iov_vf_mbx_release(struct ecore_hwfn *p_hwfn,
2356                                      struct ecore_ptt *p_ptt,
2357                                      struct ecore_vf_info *p_vf)
2358 {
2359         u16 length = sizeof(struct pfvf_def_resp_tlv);
2360
2361         ecore_iov_vf_cleanup(p_hwfn, p_vf);
2362
2363         ecore_iov_prepare_resp(p_hwfn, p_ptt, p_vf, CHANNEL_TLV_RELEASE,
2364                                length, PFVF_STATUS_SUCCESS);
2365 }
2366
2367 static enum _ecore_status_t
2368 ecore_iov_vf_flr_poll_dorq(struct ecore_hwfn *p_hwfn,
2369                            struct ecore_vf_info *p_vf, struct ecore_ptt *p_ptt)
2370 {
2371         int cnt;
2372         u32 val;
2373
2374         ecore_fid_pretend(p_hwfn, p_ptt, (u16)p_vf->concrete_fid);
2375
2376         for (cnt = 0; cnt < 50; cnt++) {
2377                 val = ecore_rd(p_hwfn, p_ptt, DORQ_REG_VF_USAGE_CNT);
2378                 if (!val)
2379                         break;
2380                 OSAL_MSLEEP(20);
2381         }
2382         ecore_fid_pretend(p_hwfn, p_ptt, (u16)p_hwfn->hw_info.concrete_fid);
2383
2384         if (cnt == 50) {
2385                 DP_ERR(p_hwfn,
2386                        "VF[%d] - dorq failed to cleanup [usage 0x%08x]\n",
2387                        p_vf->abs_vf_id, val);
2388                 return ECORE_TIMEOUT;
2389         }
2390
2391         return ECORE_SUCCESS;
2392 }
2393
2394 static enum _ecore_status_t
2395 ecore_iov_vf_flr_poll_pbf(struct ecore_hwfn *p_hwfn,
2396                           struct ecore_vf_info *p_vf, struct ecore_ptt *p_ptt)
2397 {
2398         u32 cons[MAX_NUM_VOQS], distance[MAX_NUM_VOQS];
2399         int i, cnt;
2400
2401         /* Read initial consumers & producers */
2402         for (i = 0; i < MAX_NUM_VOQS; i++) {
2403                 u32 prod;
2404
2405                 cons[i] = ecore_rd(p_hwfn, p_ptt,
2406                                    PBF_REG_NUM_BLOCKS_ALLOCATED_CONS_VOQ0 +
2407                                    i * 0x40);
2408                 prod = ecore_rd(p_hwfn, p_ptt,
2409                                 PBF_REG_NUM_BLOCKS_ALLOCATED_PROD_VOQ0 +
2410                                 i * 0x40);
2411                 distance[i] = prod - cons[i];
2412         }
2413
2414         /* Wait for consumers to pass the producers */
2415         i = 0;
2416         for (cnt = 0; cnt < 50; cnt++) {
2417                 for (; i < MAX_NUM_VOQS; i++) {
2418                         u32 tmp;
2419
2420                         tmp = ecore_rd(p_hwfn, p_ptt,
2421                                        PBF_REG_NUM_BLOCKS_ALLOCATED_CONS_VOQ0 +
2422                                        i * 0x40);
2423                         if (distance[i] > tmp - cons[i])
2424                                 break;
2425                 }
2426
2427                 if (i == MAX_NUM_VOQS)
2428                         break;
2429
2430                 OSAL_MSLEEP(20);
2431         }
2432
2433         if (cnt == 50) {
2434                 DP_ERR(p_hwfn, "VF[%d] - pbf polling failed on VOQ %d\n",
2435                        p_vf->abs_vf_id, i);
2436                 return ECORE_TIMEOUT;
2437         }
2438
2439         return ECORE_SUCCESS;
2440 }
2441
2442 static enum _ecore_status_t
2443 ecore_iov_vf_flr_poll_prs(struct ecore_hwfn *p_hwfn,
2444                           struct ecore_vf_info *p_vf, struct ecore_ptt *p_ptt)
2445 {
2446         u16 tc_cons[NUM_OF_TCS], tc_lb_cons[NUM_OF_TCS];
2447         u16 prod[NUM_OF_TCS];
2448         int i, cnt;
2449
2450         /* Read initial consumers & producers */
2451         for (i = 0; i < NUM_OF_TCS; i++) {
2452                 tc_cons[i] = (u16)ecore_rd(p_hwfn, p_ptt,
2453                                            PRS_REG_MSG_CT_MAIN_0 + i * 0x4);
2454                 tc_lb_cons[i] = (u16)ecore_rd(p_hwfn, p_ptt,
2455                                               PRS_REG_MSG_CT_LB_0 + i * 0x4);
2456                 prod[i] = (u16)ecore_rd(p_hwfn, p_ptt,
2457                                         BRB_REG_PER_TC_COUNTERS +
2458                                         p_hwfn->port_id * 0x20 + i * 0x4);
2459         }
2460
2461         /* Wait for consumers to pass the producers */
2462         i = 0;
2463         for (cnt = 0; cnt < 50; cnt++) {
2464                 for (; i < NUM_OF_TCS; i++) {
2465                         u16 cons;
2466
2467                         cons = (u16)ecore_rd(p_hwfn, p_ptt,
2468                                              PRS_REG_MSG_CT_MAIN_0 + i * 0x4);
2469                         if (prod[i] - tc_cons[i] > cons - tc_cons[i])
2470                                 break;
2471
2472                         cons = (u16)ecore_rd(p_hwfn, p_ptt,
2473                                              PRS_REG_MSG_CT_LB_0 + i * 0x4);
2474                         if (prod[i] - tc_lb_cons[i] > cons - tc_lb_cons[i])
2475                                 break;
2476                 }
2477
2478                 if (i == NUM_OF_TCS)
2479                         break;
2480
2481                 /* 16-bit counters; Delay instead of sleep... */
2482                 OSAL_UDELAY(10);
2483         }
2484
2485         /* This is only optional polling for BB, since registers are only
2486          * 16-bit wide and guarantee is not good enough. Don't fail things
2487          * if polling didn't return the expected results.
2488          */
2489         if (cnt == 50)
2490                 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
2491                            "VF[%d] - prs polling failed on TC %d\n",
2492                            p_vf->abs_vf_id, i);
2493
2494         return ECORE_SUCCESS;
2495 }
2496
2497 static enum _ecore_status_t ecore_iov_vf_flr_poll(struct ecore_hwfn *p_hwfn,
2498                                                   struct ecore_vf_info *p_vf,
2499                                                   struct ecore_ptt *p_ptt)
2500 {
2501         enum _ecore_status_t rc;
2502
2503         /* TODO - add SRC and TM polling once we add storage IOV */
2504
2505         rc = ecore_iov_vf_flr_poll_dorq(p_hwfn, p_vf, p_ptt);
2506         if (rc)
2507                 return rc;
2508
2509         rc = ecore_iov_vf_flr_poll_pbf(p_hwfn, p_vf, p_ptt);
2510         if (rc)
2511                 return rc;
2512
2513         rc = ecore_iov_vf_flr_poll_prs(p_hwfn, p_vf, p_ptt);
2514         if (rc)
2515                 return rc;
2516
2517         return ECORE_SUCCESS;
2518 }
2519
2520 static enum _ecore_status_t
2521 ecore_iov_execute_vf_flr_cleanup(struct ecore_hwfn *p_hwfn,
2522                                  struct ecore_ptt *p_ptt,
2523                                  u16 rel_vf_id, u32 *ack_vfs)
2524 {
2525         enum _ecore_status_t rc = ECORE_SUCCESS;
2526         struct ecore_vf_info *p_vf;
2527
2528         p_vf = ecore_iov_get_vf_info(p_hwfn, rel_vf_id, false);
2529         if (!p_vf)
2530                 return ECORE_SUCCESS;
2531
2532         if (p_hwfn->pf_iov_info->pending_flr[rel_vf_id / 64] &
2533             (1ULL << (rel_vf_id % 64))) {
2534                 u16 vfid = p_vf->abs_vf_id;
2535
2536                 /* TODO - should we lock channel? */
2537
2538                 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
2539                            "VF[%d] - Handling FLR\n", vfid);
2540
2541                 ecore_iov_vf_cleanup(p_hwfn, p_vf);
2542
2543                 /* If VF isn't active, no need for anything but SW */
2544                 if (!ECORE_IS_VF_ACTIVE(p_hwfn->p_dev, p_vf->relative_vf_id))
2545                         goto cleanup;
2546
2547                 /* TODO - what to do in case of failure? */
2548                 rc = ecore_iov_vf_flr_poll(p_hwfn, p_vf, p_ptt);
2549                 if (rc != ECORE_SUCCESS)
2550                         goto cleanup;
2551
2552                 rc = ecore_final_cleanup(p_hwfn, p_ptt, vfid, true);
2553                 if (rc) {
2554                         /* TODO - what's now? What a mess.... */
2555                         DP_ERR(p_hwfn, "Failed handle FLR of VF[%d]\n", vfid);
2556                         return rc;
2557                 }
2558
2559                 /* VF_STOPPED has to be set only after final cleanup
2560                  * but prior to re-enabling the VF.
2561                  */
2562                 p_vf->state = VF_STOPPED;
2563
2564                 rc = ecore_iov_enable_vf_access(p_hwfn, p_ptt, p_vf);
2565                 if (rc) {
2566                         /* TODO - again, a mess... */
2567                         DP_ERR(p_hwfn, "Failed to re-enable VF[%d] acces\n",
2568                                vfid);
2569                         return rc;
2570                 }
2571 cleanup:
2572                 /* Mark VF for ack and clean pending state */
2573                 if (p_vf->state == VF_RESET)
2574                         p_vf->state = VF_STOPPED;
2575                 ack_vfs[vfid / 32] |= (1 << (vfid % 32));
2576                 p_hwfn->pf_iov_info->pending_flr[rel_vf_id / 64] &=
2577                     ~(1ULL << (rel_vf_id % 64));
2578                 p_hwfn->pf_iov_info->pending_events[rel_vf_id / 64] &=
2579                     ~(1ULL << (rel_vf_id % 64));
2580         }
2581
2582         return rc;
2583 }
2584
2585 enum _ecore_status_t ecore_iov_vf_flr_cleanup(struct ecore_hwfn *p_hwfn,
2586                                               struct ecore_ptt *p_ptt)
2587 {
2588         u32 ack_vfs[VF_MAX_STATIC / 32];
2589         enum _ecore_status_t rc = ECORE_SUCCESS;
2590         u16 i;
2591
2592         OSAL_MEMSET(ack_vfs, 0, sizeof(u32) * (VF_MAX_STATIC / 32));
2593
2594         for (i = 0; i < p_hwfn->p_dev->sriov_info.total_vfs; i++)
2595                 ecore_iov_execute_vf_flr_cleanup(p_hwfn, p_ptt, i, ack_vfs);
2596
2597         rc = ecore_mcp_ack_vf_flr(p_hwfn, p_ptt, ack_vfs);
2598         return rc;
2599 }
2600
2601 enum _ecore_status_t
2602 ecore_iov_single_vf_flr_cleanup(struct ecore_hwfn *p_hwfn,
2603                                 struct ecore_ptt *p_ptt, u16 rel_vf_id)
2604 {
2605         u32 ack_vfs[VF_MAX_STATIC / 32];
2606         enum _ecore_status_t rc = ECORE_SUCCESS;
2607
2608         OSAL_MEMSET(ack_vfs, 0, sizeof(u32) * (VF_MAX_STATIC / 32));
2609
2610         ecore_iov_execute_vf_flr_cleanup(p_hwfn, p_ptt, rel_vf_id, ack_vfs);
2611
2612         rc = ecore_mcp_ack_vf_flr(p_hwfn, p_ptt, ack_vfs);
2613         return rc;
2614 }
2615
2616 int ecore_iov_mark_vf_flr(struct ecore_hwfn *p_hwfn, u32 *p_disabled_vfs)
2617 {
2618         u16 i, found = 0;
2619
2620         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV, "Marking FLR-ed VFs\n");
2621         for (i = 0; i < (VF_MAX_STATIC / 32); i++)
2622                 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
2623                            "[%08x,...,%08x]: %08x\n",
2624                            i * 32, (i + 1) * 32 - 1, p_disabled_vfs[i]);
2625
2626         /* Mark VFs */
2627         for (i = 0; i < p_hwfn->p_dev->sriov_info.total_vfs; i++) {
2628                 struct ecore_vf_info *p_vf;
2629                 u8 vfid;
2630
2631                 p_vf = ecore_iov_get_vf_info(p_hwfn, i, false);
2632                 if (!p_vf)
2633                         continue;
2634
2635                 vfid = p_vf->abs_vf_id;
2636                 if ((1 << (vfid % 32)) & p_disabled_vfs[vfid / 32]) {
2637                         u64 *p_flr = p_hwfn->pf_iov_info->pending_flr;
2638                         u16 rel_vf_id = p_vf->relative_vf_id;
2639
2640                         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
2641                                    "VF[%d] [rel %d] got FLR-ed\n",
2642                                    vfid, rel_vf_id);
2643
2644                         p_vf->state = VF_RESET;
2645
2646                         /* No need to lock here, since pending_flr should
2647                          * only change here and before ACKing MFw. Since
2648                          * MFW will not trigger an additional attention for
2649                          * VF flr until ACKs, we're safe.
2650                          */
2651                         p_flr[rel_vf_id / 64] |= 1ULL << (rel_vf_id % 64);
2652                         found = 1;
2653                 }
2654         }
2655
2656         return found;
2657 }
2658
2659 void ecore_iov_set_link(struct ecore_hwfn *p_hwfn,
2660                         u16 vfid,
2661                         struct ecore_mcp_link_params *params,
2662                         struct ecore_mcp_link_state *link,
2663                         struct ecore_mcp_link_capabilities *p_caps)
2664 {
2665         struct ecore_vf_info *p_vf = ecore_iov_get_vf_info(p_hwfn, vfid, false);
2666         struct ecore_bulletin_content *p_bulletin;
2667
2668         if (!p_vf)
2669                 return;
2670
2671         p_bulletin = p_vf->bulletin.p_virt;
2672         p_bulletin->req_autoneg = params->speed.autoneg;
2673         p_bulletin->req_adv_speed = params->speed.advertised_speeds;
2674         p_bulletin->req_forced_speed = params->speed.forced_speed;
2675         p_bulletin->req_autoneg_pause = params->pause.autoneg;
2676         p_bulletin->req_forced_rx = params->pause.forced_rx;
2677         p_bulletin->req_forced_tx = params->pause.forced_tx;
2678         p_bulletin->req_loopback = params->loopback_mode;
2679
2680         p_bulletin->link_up = link->link_up;
2681         p_bulletin->speed = link->speed;
2682         p_bulletin->full_duplex = link->full_duplex;
2683         p_bulletin->autoneg = link->an;
2684         p_bulletin->autoneg_complete = link->an_complete;
2685         p_bulletin->parallel_detection = link->parallel_detection;
2686         p_bulletin->pfc_enabled = link->pfc_enabled;
2687         p_bulletin->partner_adv_speed = link->partner_adv_speed;
2688         p_bulletin->partner_tx_flow_ctrl_en = link->partner_tx_flow_ctrl_en;
2689         p_bulletin->partner_rx_flow_ctrl_en = link->partner_rx_flow_ctrl_en;
2690         p_bulletin->partner_adv_pause = link->partner_adv_pause;
2691         p_bulletin->sfp_tx_fault = link->sfp_tx_fault;
2692
2693         p_bulletin->capability_speed = p_caps->speed_capabilities;
2694 }
2695
2696 void ecore_iov_get_link(struct ecore_hwfn *p_hwfn,
2697                         u16 vfid,
2698                         struct ecore_mcp_link_params *p_params,
2699                         struct ecore_mcp_link_state *p_link,
2700                         struct ecore_mcp_link_capabilities *p_caps)
2701 {
2702         struct ecore_vf_info *p_vf = ecore_iov_get_vf_info(p_hwfn, vfid, false);
2703         struct ecore_bulletin_content *p_bulletin;
2704
2705         if (!p_vf)
2706                 return;
2707
2708         p_bulletin = p_vf->bulletin.p_virt;
2709
2710         if (p_params)
2711                 __ecore_vf_get_link_params(p_hwfn, p_params, p_bulletin);
2712         if (p_link)
2713                 __ecore_vf_get_link_state(p_hwfn, p_link, p_bulletin);
2714         if (p_caps)
2715                 __ecore_vf_get_link_caps(p_hwfn, p_caps, p_bulletin);
2716 }
2717
2718 void ecore_iov_process_mbx_req(struct ecore_hwfn *p_hwfn,
2719                                struct ecore_ptt *p_ptt, int vfid)
2720 {
2721         struct ecore_iov_vf_mbx *mbx;
2722         struct ecore_vf_info *p_vf;
2723         int i;
2724
2725         p_vf = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
2726         if (!p_vf)
2727                 return;
2728
2729         mbx = &p_vf->vf_mbx;
2730
2731         /* ecore_iov_process_mbx_request */
2732         DP_VERBOSE(p_hwfn,
2733                    ECORE_MSG_IOV,
2734                    "ecore_iov_process_mbx_req vfid %d\n", p_vf->abs_vf_id);
2735
2736         mbx->first_tlv = mbx->req_virt->first_tlv;
2737
2738         /* check if tlv type is known */
2739         if (ecore_iov_tlv_supported(mbx->first_tlv.tl.type)) {
2740                 /* Lock the per vf op mutex and note the locker's identity.
2741                  * The unlock will take place in mbx response.
2742                  */
2743                 ecore_iov_lock_vf_pf_channel(p_hwfn,
2744                                              p_vf, mbx->first_tlv.tl.type);
2745
2746                 /* switch on the opcode */
2747                 switch (mbx->first_tlv.tl.type) {
2748                 case CHANNEL_TLV_ACQUIRE:
2749                         ecore_iov_vf_mbx_acquire(p_hwfn, p_ptt, p_vf);
2750                         break;
2751                 case CHANNEL_TLV_VPORT_START:
2752                         ecore_iov_vf_mbx_start_vport(p_hwfn, p_ptt, p_vf);
2753                         break;
2754                 case CHANNEL_TLV_VPORT_TEARDOWN:
2755                         ecore_iov_vf_mbx_stop_vport(p_hwfn, p_ptt, p_vf);
2756                         break;
2757                 case CHANNEL_TLV_START_RXQ:
2758                         ecore_iov_vf_mbx_start_rxq(p_hwfn, p_ptt, p_vf);
2759                         break;
2760                 case CHANNEL_TLV_START_TXQ:
2761                         ecore_iov_vf_mbx_start_txq(p_hwfn, p_ptt, p_vf);
2762                         break;
2763                 case CHANNEL_TLV_STOP_RXQS:
2764                         ecore_iov_vf_mbx_stop_rxqs(p_hwfn, p_ptt, p_vf);
2765                         break;
2766                 case CHANNEL_TLV_STOP_TXQS:
2767                         ecore_iov_vf_mbx_stop_txqs(p_hwfn, p_ptt, p_vf);
2768                         break;
2769                 case CHANNEL_TLV_UPDATE_RXQ:
2770                         ecore_iov_vf_mbx_update_rxqs(p_hwfn, p_ptt, p_vf);
2771                         break;
2772                 case CHANNEL_TLV_VPORT_UPDATE:
2773                         ecore_iov_vf_mbx_vport_update(p_hwfn, p_ptt, p_vf);
2774                         break;
2775                 case CHANNEL_TLV_UCAST_FILTER:
2776                         ecore_iov_vf_mbx_ucast_filter(p_hwfn, p_ptt, p_vf);
2777                         break;
2778                 case CHANNEL_TLV_CLOSE:
2779                         ecore_iov_vf_mbx_close(p_hwfn, p_ptt, p_vf);
2780                         break;
2781                 case CHANNEL_TLV_INT_CLEANUP:
2782                         ecore_iov_vf_mbx_int_cleanup(p_hwfn, p_ptt, p_vf);
2783                         break;
2784                 case CHANNEL_TLV_RELEASE:
2785                         ecore_iov_vf_mbx_release(p_hwfn, p_ptt, p_vf);
2786                         break;
2787                 }
2788
2789                 ecore_iov_unlock_vf_pf_channel(p_hwfn,
2790                                                p_vf, mbx->first_tlv.tl.type);
2791
2792         } else {
2793                 /* unknown TLV - this may belong to a VF driver from the future
2794                  * - a version written after this PF driver was written, which
2795                  * supports features unknown as of yet. Too bad since we don't
2796                  * support them. Or this may be because someone wrote a crappy
2797                  * VF driver and is sending garbage over the channel.
2798                  */
2799                 DP_ERR(p_hwfn,
2800                        "unknown TLV. type %d length %d. first 20 bytes of mailbox buffer:\n",
2801                        mbx->first_tlv.tl.type, mbx->first_tlv.tl.length);
2802
2803                 for (i = 0; i < 20; i++) {
2804                         DP_VERBOSE(p_hwfn,
2805                                    ECORE_MSG_IOV,
2806                                    "%x ",
2807                                    mbx->req_virt->tlv_buf_size.tlv_buffer[i]);
2808                 }
2809
2810                 /* test whether we can respond to the VF (do we have an address
2811                  * for it?)
2812                  */
2813                 if (p_vf->state == VF_ACQUIRED)
2814                         DP_ERR(p_hwfn, "UNKNOWN TLV Not supported yet\n");
2815         }
2816
2817 #ifdef CONFIG_ECORE_SW_CHANNEL
2818         mbx->sw_mbx.mbx_state = VF_PF_RESPONSE_READY;
2819         mbx->sw_mbx.response_offset = 0;
2820 #endif
2821 }
2822
2823 static enum _ecore_status_t ecore_sriov_vfpf_msg(struct ecore_hwfn *p_hwfn,
2824                                                  __le16 vfid,
2825                                                  struct regpair *vf_msg)
2826 {
2827         struct ecore_vf_info *p_vf;
2828         u8 min, max;
2829
2830         if (!p_hwfn->pf_iov_info || !p_hwfn->pf_iov_info->vfs_array) {
2831                 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
2832                            "Got a message from VF while PF is not initialized for IOV support\n");
2833                 return ECORE_SUCCESS;
2834         }
2835
2836         /* Find the VF record - message comes with realtive [engine] vfid */
2837         min = (u8)p_hwfn->hw_info.first_vf_in_pf;
2838         max = min + p_hwfn->p_dev->sriov_info.total_vfs;
2839         /* @@@TBD - for BE machines, should echo field be reversed? */
2840         if ((u8)vfid < min || (u8)vfid >= max) {
2841                 DP_INFO(p_hwfn,
2842                         "Got a message from VF with relative id 0x%08x, but PF's range is [0x%02x,...,0x%02x)\n",
2843                         (u8)vfid, min, max);
2844                 return ECORE_INVAL;
2845         }
2846         p_vf = &p_hwfn->pf_iov_info->vfs_array[(u8)vfid - min];
2847
2848         /* List the physical address of the request so that handler
2849          * could later on copy the message from it.
2850          */
2851         p_vf->vf_mbx.pending_req = (((u64)vf_msg->hi) << 32) | vf_msg->lo;
2852
2853         return OSAL_PF_VF_MSG(p_hwfn, p_vf->relative_vf_id);
2854 }
2855
2856 enum _ecore_status_t ecore_sriov_eqe_event(struct ecore_hwfn *p_hwfn,
2857                                            u8 opcode,
2858                                            __le16 echo,
2859                                            union event_ring_data *data)
2860 {
2861         switch (opcode) {
2862         case COMMON_EVENT_VF_PF_CHANNEL:
2863                 return ecore_sriov_vfpf_msg(p_hwfn, echo,
2864                                             &data->vf_pf_channel.msg_addr);
2865         case COMMON_EVENT_VF_FLR:
2866                 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
2867                            "VF-FLR is still not supported\n");
2868                 return ECORE_SUCCESS;
2869         default:
2870                 DP_INFO(p_hwfn->p_dev, "Unknown sriov eqe event 0x%02x\n",
2871                         opcode);
2872                 return ECORE_INVAL;
2873         }
2874 }
2875
2876 bool ecore_iov_is_vf_pending_flr(struct ecore_hwfn *p_hwfn, u16 rel_vf_id)
2877 {
2878         return !!(p_hwfn->pf_iov_info->pending_flr[rel_vf_id / 64] &
2879                    (1ULL << (rel_vf_id % 64)));
2880 }
2881
2882 bool ecore_iov_is_valid_vfid(struct ecore_hwfn *p_hwfn, int rel_vf_id,
2883                              bool b_enabled_only)
2884 {
2885         if (!p_hwfn->pf_iov_info) {
2886                 DP_NOTICE(p_hwfn->p_dev, true, "No iov info\n");
2887                 return false;
2888         }
2889
2890         return b_enabled_only ? ECORE_IS_VF_ACTIVE(p_hwfn->p_dev, rel_vf_id) :
2891             (rel_vf_id < p_hwfn->p_dev->sriov_info.total_vfs);
2892 }
2893
2894 struct ecore_public_vf_info *ecore_iov_get_public_vf_info(struct ecore_hwfn
2895                                                           *p_hwfn,
2896                                                           u16 relative_vf_id,
2897                                                           bool b_enabled_only)
2898 {
2899         struct ecore_vf_info *vf = OSAL_NULL;
2900
2901         vf = ecore_iov_get_vf_info(p_hwfn, relative_vf_id, b_enabled_only);
2902         if (!vf)
2903                 return OSAL_NULL;
2904
2905         return &vf->p_vf_info;
2906 }
2907
2908 void ecore_iov_pf_add_pending_events(struct ecore_hwfn *p_hwfn, u8 vfid)
2909 {
2910         u64 add_bit = 1ULL << (vfid % 64);
2911
2912         /* TODO - add locking mechanisms [no atomics in ecore, so we can't
2913          * add the lock inside the ecore_pf_iov struct].
2914          */
2915         p_hwfn->pf_iov_info->pending_events[vfid / 64] |= add_bit;
2916 }
2917
2918 void ecore_iov_pf_get_and_clear_pending_events(struct ecore_hwfn *p_hwfn,
2919                                                u64 *events)
2920 {
2921         u64 *p_pending_events = p_hwfn->pf_iov_info->pending_events;
2922
2923         /* TODO - Take a lock */
2924         OSAL_MEMCPY(events, p_pending_events,
2925                     sizeof(u64) * ECORE_VF_ARRAY_LENGTH);
2926         OSAL_MEMSET(p_pending_events, 0, sizeof(u64) * ECORE_VF_ARRAY_LENGTH);
2927 }
2928
2929 enum _ecore_status_t ecore_iov_copy_vf_msg(struct ecore_hwfn *p_hwfn,
2930                                            struct ecore_ptt *ptt, int vfid)
2931 {
2932         struct ecore_dmae_params params;
2933         struct ecore_vf_info *vf_info;
2934
2935         vf_info = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
2936         if (!vf_info)
2937                 return ECORE_INVAL;
2938
2939         OSAL_MEMSET(&params, 0, sizeof(struct ecore_dmae_params));
2940         params.flags = ECORE_DMAE_FLAG_VF_SRC | ECORE_DMAE_FLAG_COMPLETION_DST;
2941         params.src_vfid = vf_info->abs_vf_id;
2942
2943         if (ecore_dmae_host2host(p_hwfn, ptt,
2944                                  vf_info->vf_mbx.pending_req,
2945                                  vf_info->vf_mbx.req_phys,
2946                                  sizeof(union vfpf_tlvs) / 4, &params)) {
2947                 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
2948                            "Failed to copy message from VF 0x%02x\n", vfid);
2949
2950                 return ECORE_IO;
2951         }
2952
2953         return ECORE_SUCCESS;
2954 }
2955
2956 void ecore_iov_bulletin_set_forced_mac(struct ecore_hwfn *p_hwfn,
2957                                        u8 *mac, int vfid)
2958 {
2959         struct ecore_vf_info *vf_info;
2960         u64 feature;
2961
2962         vf_info = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
2963         if (!vf_info) {
2964                 DP_NOTICE(p_hwfn->p_dev, true,
2965                           "Can not set forced MAC, invalid vfid [%d]\n", vfid);
2966                 return;
2967         }
2968
2969         feature = 1 << MAC_ADDR_FORCED;
2970         OSAL_MEMCPY(vf_info->bulletin.p_virt->mac, mac, ETH_ALEN);
2971
2972         vf_info->bulletin.p_virt->valid_bitmap |= feature;
2973         /* Forced MAC will disable MAC_ADDR */
2974         vf_info->bulletin.p_virt->valid_bitmap &=
2975             ~(1 << VFPF_BULLETIN_MAC_ADDR);
2976
2977         ecore_iov_configure_vport_forced(p_hwfn, vf_info, feature);
2978 }
2979
2980 enum _ecore_status_t ecore_iov_bulletin_set_mac(struct ecore_hwfn *p_hwfn,
2981                                                 u8 *mac, int vfid)
2982 {
2983         struct ecore_vf_info *vf_info;
2984         u64 feature;
2985
2986         vf_info = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
2987         if (!vf_info) {
2988                 DP_NOTICE(p_hwfn->p_dev, true,
2989                           "Can not set MAC, invalid vfid [%d]\n", vfid);
2990                 return ECORE_INVAL;
2991         }
2992
2993         if (vf_info->bulletin.p_virt->valid_bitmap & (1 << MAC_ADDR_FORCED)) {
2994                 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
2995                            "Can not set MAC, Forced MAC is configured\n");
2996                 return ECORE_INVAL;
2997         }
2998
2999         feature = 1 << VFPF_BULLETIN_MAC_ADDR;
3000         OSAL_MEMCPY(vf_info->bulletin.p_virt->mac, mac, ETH_ALEN);
3001
3002         vf_info->bulletin.p_virt->valid_bitmap |= feature;
3003
3004         return ECORE_SUCCESS;
3005 }
3006
3007 void ecore_iov_bulletin_set_forced_vlan(struct ecore_hwfn *p_hwfn,
3008                                         u16 pvid, int vfid)
3009 {
3010         struct ecore_vf_info *vf_info;
3011         u64 feature;
3012
3013         vf_info = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
3014         if (!vf_info) {
3015                 DP_NOTICE(p_hwfn->p_dev, true,
3016                           "Can not set forced MAC, invalid vfid [%d]\n", vfid);
3017                 return;
3018         }
3019
3020         feature = 1 << VLAN_ADDR_FORCED;
3021         vf_info->bulletin.p_virt->pvid = pvid;
3022         if (pvid)
3023                 vf_info->bulletin.p_virt->valid_bitmap |= feature;
3024         else
3025                 vf_info->bulletin.p_virt->valid_bitmap &= ~feature;
3026
3027         ecore_iov_configure_vport_forced(p_hwfn, vf_info, feature);
3028 }
3029
3030 enum _ecore_status_t
3031 ecore_iov_bulletin_set_forced_untagged_default(struct ecore_hwfn *p_hwfn,
3032                                                bool b_untagged_only, int vfid)
3033 {
3034         struct ecore_vf_info *vf_info;
3035         u64 feature;
3036
3037         vf_info = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
3038         if (!vf_info) {
3039                 DP_NOTICE(p_hwfn->p_dev, true,
3040                           "Can not set forced MAC, invalid vfid [%d]\n", vfid);
3041                 return ECORE_INVAL;
3042         }
3043
3044         /* Since this is configurable only during vport-start, don't take it
3045          * if we're past that point.
3046          */
3047         if (vf_info->state == VF_ENABLED) {
3048                 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
3049                            "Can't support untagged change for vfid[%d] - VF is already active\n",
3050                            vfid);
3051                 return ECORE_INVAL;
3052         }
3053
3054         /* Set configuration; This will later be taken into account during the
3055          * VF initialization.
3056          */
3057         feature = (1 << VFPF_BULLETIN_UNTAGGED_DEFAULT) |
3058             (1 << VFPF_BULLETIN_UNTAGGED_DEFAULT_FORCED);
3059         vf_info->bulletin.p_virt->valid_bitmap |= feature;
3060
3061         vf_info->bulletin.p_virt->default_only_untagged = b_untagged_only ? 1
3062             : 0;
3063
3064         return ECORE_SUCCESS;
3065 }
3066
3067 void ecore_iov_get_vfs_opaque_fid(struct ecore_hwfn *p_hwfn, int vfid,
3068                                   u16 *opaque_fid)
3069 {
3070         struct ecore_vf_info *vf_info;
3071
3072         vf_info = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
3073         if (!vf_info)
3074                 return;
3075
3076         *opaque_fid = vf_info->opaque_fid;
3077 }
3078
3079 void ecore_iov_get_vfs_vport_id(struct ecore_hwfn *p_hwfn, int vfid,
3080                                 u8 *p_vort_id)
3081 {
3082         struct ecore_vf_info *vf_info;
3083
3084         vf_info = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
3085         if (!vf_info)
3086                 return;
3087
3088         *p_vort_id = vf_info->vport_id;
3089 }
3090
3091 bool ecore_iov_vf_has_vport_instance(struct ecore_hwfn *p_hwfn, int vfid)
3092 {
3093         struct ecore_vf_info *p_vf_info;
3094
3095         p_vf_info = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
3096         if (!p_vf_info)
3097                 return false;
3098
3099         return !!p_vf_info->vport_instance;
3100 }
3101
3102 bool ecore_iov_is_vf_stopped(struct ecore_hwfn *p_hwfn, int vfid)
3103 {
3104         struct ecore_vf_info *p_vf_info;
3105
3106         p_vf_info = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
3107
3108         return p_vf_info->state == VF_STOPPED;
3109 }
3110
3111 bool ecore_iov_spoofchk_get(struct ecore_hwfn *p_hwfn, int vfid)
3112 {
3113         struct ecore_vf_info *vf_info;
3114
3115         vf_info = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
3116         if (!vf_info)
3117                 return false;
3118
3119         return vf_info->spoof_chk;
3120 }
3121
3122 bool ecore_iov_pf_sanity_check(struct ecore_hwfn *p_hwfn, int vfid)
3123 {
3124         if (IS_VF(p_hwfn->p_dev) || !IS_ECORE_SRIOV(p_hwfn->p_dev) ||
3125             !IS_PF_SRIOV_ALLOC(p_hwfn) ||
3126             !ECORE_IS_VF_ACTIVE(p_hwfn->p_dev, vfid))
3127                 return false;
3128         else
3129                 return true;
3130 }
3131
3132 enum _ecore_status_t ecore_iov_spoofchk_set(struct ecore_hwfn *p_hwfn,
3133                                             int vfid, bool val)
3134 {
3135         enum _ecore_status_t rc = ECORE_INVAL;
3136         struct ecore_vf_info *vf;
3137
3138         if (!ecore_iov_pf_sanity_check(p_hwfn, vfid)) {
3139                 DP_NOTICE(p_hwfn, true,
3140                           "SR-IOV sanity check failed, can't set spoofchk\n");
3141                 goto out;
3142         }
3143
3144         vf = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
3145         if (!vf)
3146                 goto out;
3147
3148         if (!ecore_iov_vf_has_vport_instance(p_hwfn, vfid)) {
3149                 /* After VF VPORT start PF will configure spoof check */
3150                 vf->req_spoofchk_val = val;
3151                 rc = ECORE_SUCCESS;
3152                 goto out;
3153         }
3154
3155         rc = __ecore_iov_spoofchk_set(p_hwfn, vf, val);
3156
3157 out:
3158         return rc;
3159 }
3160
3161 u8 ecore_iov_vf_chains_per_pf(struct ecore_hwfn *p_hwfn)
3162 {
3163         u8 max_chains_per_vf = p_hwfn->hw_info.max_chains_per_vf;
3164
3165         max_chains_per_vf = (max_chains_per_vf) ? max_chains_per_vf
3166             : ECORE_MAX_VF_CHAINS_PER_PF;
3167
3168         return max_chains_per_vf;
3169 }
3170
3171 void ecore_iov_get_vf_req_virt_mbx_params(struct ecore_hwfn *p_hwfn,
3172                                           u16 rel_vf_id,
3173                                           void **pp_req_virt_addr,
3174                                           u16 *p_req_virt_size)
3175 {
3176         struct ecore_vf_info *vf_info =
3177             ecore_iov_get_vf_info(p_hwfn, rel_vf_id, true);
3178
3179         if (!vf_info)
3180                 return;
3181
3182         if (pp_req_virt_addr)
3183                 *pp_req_virt_addr = vf_info->vf_mbx.req_virt;
3184
3185         if (p_req_virt_size)
3186                 *p_req_virt_size = sizeof(*vf_info->vf_mbx.req_virt);
3187 }
3188
3189 void ecore_iov_get_vf_reply_virt_mbx_params(struct ecore_hwfn *p_hwfn,
3190                                             u16 rel_vf_id,
3191                                             void **pp_reply_virt_addr,
3192                                             u16 *p_reply_virt_size)
3193 {
3194         struct ecore_vf_info *vf_info =
3195             ecore_iov_get_vf_info(p_hwfn, rel_vf_id, true);
3196
3197         if (!vf_info)
3198                 return;
3199
3200         if (pp_reply_virt_addr)
3201                 *pp_reply_virt_addr = vf_info->vf_mbx.reply_virt;
3202
3203         if (p_reply_virt_size)
3204                 *p_reply_virt_size = sizeof(*vf_info->vf_mbx.reply_virt);
3205 }
3206
3207 #ifdef CONFIG_ECORE_SW_CHANNEL
3208 struct ecore_iov_sw_mbx *ecore_iov_get_vf_sw_mbx(struct ecore_hwfn *p_hwfn,
3209                                                  u16 rel_vf_id)
3210 {
3211         struct ecore_vf_info *vf_info =
3212             ecore_iov_get_vf_info(p_hwfn, rel_vf_id, true);
3213
3214         if (!vf_info)
3215                 return OSAL_NULL;
3216
3217         return &vf_info->vf_mbx.sw_mbx;
3218 }
3219 #endif
3220
3221 bool ecore_iov_is_valid_vfpf_msg_length(u32 length)
3222 {
3223         return (length >= sizeof(struct vfpf_first_tlv) &&
3224                 (length <= sizeof(union vfpf_tlvs)));
3225 }
3226
3227 u32 ecore_iov_pfvf_msg_length(void)
3228 {
3229         return sizeof(union pfvf_tlvs);
3230 }
3231
3232 u8 *ecore_iov_bulletin_get_forced_mac(struct ecore_hwfn *p_hwfn, u16 rel_vf_id)
3233 {
3234         struct ecore_vf_info *p_vf;
3235
3236         p_vf = ecore_iov_get_vf_info(p_hwfn, rel_vf_id, true);
3237         if (!p_vf || !p_vf->bulletin.p_virt)
3238                 return OSAL_NULL;
3239
3240         if (!(p_vf->bulletin.p_virt->valid_bitmap & (1 << MAC_ADDR_FORCED)))
3241                 return OSAL_NULL;
3242
3243         return p_vf->bulletin.p_virt->mac;
3244 }
3245
3246 u16 ecore_iov_bulletin_get_forced_vlan(struct ecore_hwfn *p_hwfn,
3247                                        u16 rel_vf_id)
3248 {
3249         struct ecore_vf_info *p_vf;
3250
3251         p_vf = ecore_iov_get_vf_info(p_hwfn, rel_vf_id, true);
3252         if (!p_vf || !p_vf->bulletin.p_virt)
3253                 return 0;
3254
3255         if (!(p_vf->bulletin.p_virt->valid_bitmap & (1 << VLAN_ADDR_FORCED)))
3256                 return 0;
3257
3258         return p_vf->bulletin.p_virt->pvid;
3259 }
3260
3261 enum _ecore_status_t ecore_iov_configure_tx_rate(struct ecore_hwfn *p_hwfn,
3262                                                  struct ecore_ptt *p_ptt,
3263                                                  int vfid, int val)
3264 {
3265         struct ecore_vf_info *vf;
3266         enum _ecore_status_t rc;
3267         u8 abs_vp_id = 0;
3268
3269         vf = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
3270
3271         if (!vf)
3272                 return ECORE_INVAL;
3273
3274         rc = ecore_fw_vport(p_hwfn, vf->vport_id, &abs_vp_id);
3275         if (rc != ECORE_SUCCESS)
3276                 return rc;
3277
3278         rc = ecore_init_vport_rl(p_hwfn, p_ptt, abs_vp_id, (u32)val);
3279
3280         return rc;
3281 }
3282
3283 enum _ecore_status_t ecore_iov_configure_min_tx_rate(struct ecore_dev *p_dev,
3284                                                      int vfid, u32 rate)
3285 {
3286         struct ecore_vf_info *vf;
3287         enum _ecore_status_t rc;
3288         u8 vport_id;
3289         int i;
3290
3291         for_each_hwfn(p_dev, i) {
3292                 struct ecore_hwfn *p_hwfn = &p_dev->hwfns[i];
3293
3294                 if (!ecore_iov_pf_sanity_check(p_hwfn, vfid)) {
3295                         DP_NOTICE(p_hwfn, true,
3296                                   "SR-IOV sanity check failed, can't set min rate\n");
3297                         return ECORE_INVAL;
3298                 }
3299         }
3300
3301         vf = ecore_iov_get_vf_info(ECORE_LEADING_HWFN(p_dev), (u16)vfid, true);
3302         vport_id = vf->vport_id;
3303
3304         rc = ecore_configure_vport_wfq(p_dev, vport_id, rate);
3305
3306         return rc;
3307 }
3308
3309 enum _ecore_status_t ecore_iov_get_vf_stats(struct ecore_hwfn *p_hwfn,
3310                                             struct ecore_ptt *p_ptt,
3311                                             int vfid,
3312                                             struct ecore_eth_stats *p_stats)
3313 {
3314         struct ecore_vf_info *vf;
3315
3316         vf = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
3317         if (!vf)
3318                 return ECORE_INVAL;
3319
3320         if (vf->state != VF_ENABLED)
3321                 return ECORE_INVAL;
3322
3323         __ecore_get_vport_stats(p_hwfn, p_ptt, p_stats,
3324                                 vf->abs_vf_id + 0x10, false);
3325
3326         return ECORE_SUCCESS;
3327 }
3328
3329 u8 ecore_iov_get_vf_num_rxqs(struct ecore_hwfn *p_hwfn, u16 rel_vf_id)
3330 {
3331         struct ecore_vf_info *p_vf;
3332
3333         p_vf = ecore_iov_get_vf_info(p_hwfn, rel_vf_id, true);
3334         if (!p_vf)
3335                 return 0;
3336
3337         return p_vf->num_rxqs;
3338 }
3339
3340 u8 ecore_iov_get_vf_num_active_rxqs(struct ecore_hwfn *p_hwfn, u16 rel_vf_id)
3341 {
3342         struct ecore_vf_info *p_vf;
3343
3344         p_vf = ecore_iov_get_vf_info(p_hwfn, rel_vf_id, true);
3345         if (!p_vf)
3346                 return 0;
3347
3348         return p_vf->num_active_rxqs;
3349 }
3350
3351 void *ecore_iov_get_vf_ctx(struct ecore_hwfn *p_hwfn, u16 rel_vf_id)
3352 {
3353         struct ecore_vf_info *p_vf;
3354
3355         p_vf = ecore_iov_get_vf_info(p_hwfn, rel_vf_id, true);
3356         if (!p_vf)
3357                 return OSAL_NULL;
3358
3359         return p_vf->ctx;
3360 }
3361
3362 u8 ecore_iov_get_vf_num_sbs(struct ecore_hwfn *p_hwfn, u16 rel_vf_id)
3363 {
3364         struct ecore_vf_info *p_vf;
3365
3366         p_vf = ecore_iov_get_vf_info(p_hwfn, rel_vf_id, true);
3367         if (!p_vf)
3368                 return 0;
3369
3370         return p_vf->num_sbs;
3371 }
3372
3373 bool ecore_iov_is_vf_wait_for_acquire(struct ecore_hwfn *p_hwfn, u16 rel_vf_id)
3374 {
3375         struct ecore_vf_info *p_vf;
3376
3377         p_vf = ecore_iov_get_vf_info(p_hwfn, rel_vf_id, true);
3378         if (!p_vf)
3379                 return false;
3380
3381         return (p_vf->state == VF_FREE);
3382 }
3383
3384 bool ecore_iov_is_vf_acquired_not_initialized(struct ecore_hwfn *p_hwfn,
3385                                               u16 rel_vf_id)
3386 {
3387         struct ecore_vf_info *p_vf;
3388
3389         p_vf = ecore_iov_get_vf_info(p_hwfn, rel_vf_id, true);
3390         if (!p_vf)
3391                 return false;
3392
3393         return (p_vf->state == VF_ACQUIRED);
3394 }
3395
3396 bool ecore_iov_is_vf_initialized(struct ecore_hwfn *p_hwfn, u16 rel_vf_id)
3397 {
3398         struct ecore_vf_info *p_vf;
3399
3400         p_vf = ecore_iov_get_vf_info(p_hwfn, rel_vf_id, true);
3401         if (!p_vf)
3402                 return false;
3403
3404         return (p_vf->state == VF_ENABLED);
3405 }
3406
3407 int ecore_iov_get_vf_min_rate(struct ecore_hwfn *p_hwfn, int vfid)
3408 {
3409         struct ecore_wfq_data *vf_vp_wfq;
3410         struct ecore_vf_info *vf_info;
3411
3412         vf_info = ecore_iov_get_vf_info(p_hwfn, (u16)vfid, true);
3413         if (!vf_info)
3414                 return 0;
3415
3416         vf_vp_wfq = &p_hwfn->qm_info.wfq_data[vf_info->vport_id];
3417
3418         if (vf_vp_wfq->configured)
3419                 return vf_vp_wfq->min_speed;
3420         else
3421                 return 0;
3422 }