drivers/net/qede/base/ecore_vf.c

   1 /*
   2  * Copyright (c) 2016 QLogic Corporation.
   3  * All rights reserved.
   4  * www.qlogic.com
   5  *
   6  * See LICENSE.qede_pmd for copyright and licensing details.
   7  */
   8
   9 #include "bcm_osal.h"
  10 #include "ecore.h"
  11 #include "ecore_hsi_eth.h"
  12 #include "ecore_sriov.h"
  13 #include "ecore_l2_api.h"
  14 #include "ecore_vf.h"
  15 #include "ecore_vfpf_if.h"
  16 #include "ecore_status.h"
  17 #include "reg_addr.h"
  18 #include "ecore_int.h"
  19 #include "ecore_l2.h"
  20 #include "ecore_mcp_api.h"
  21 #include "ecore_vf_api.h"
  22
  23 static void *ecore_vf_pf_prep(struct ecore_hwfn *p_hwfn, u16 type, u16 length)
  24 {
  25         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
  26         void *p_tlv;
  27
  28         /* This lock is released when we receive PF's response
  29          * in ecore_send_msg2pf().
  30          * So, ecore_vf_pf_prep() and ecore_send_msg2pf()
  31          * must come in sequence.
  32          */
  33         OSAL_MUTEX_ACQUIRE(&p_iov->mutex);
  34
  35         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
  36                    "preparing to send %s tlv over vf pf channel\n",
  37                    ecore_channel_tlvs_string[type]);
  38
  39         /* Reset Request offset */
  40         p_iov->offset = (u8 *)(p_iov->vf2pf_request);
  41
  42         /* Clear mailbox - both request and reply */
  43         OSAL_MEMSET(p_iov->vf2pf_request, 0, sizeof(union vfpf_tlvs));
  44         OSAL_MEMSET(p_iov->pf2vf_reply, 0, sizeof(union pfvf_tlvs));
  45
  46         /* Init type and length */
  47         p_tlv = ecore_add_tlv(&p_iov->offset, type, length);
  48
  49         /* Init first tlv header */
  50         ((struct vfpf_first_tlv *)p_tlv)->reply_address =
  51             (u64)p_iov->pf2vf_reply_phys;
  52
  53         return p_tlv;
  54 }
  55
  56 static void ecore_vf_pf_req_end(struct ecore_hwfn *p_hwfn,
  57                                  enum _ecore_status_t req_status)
  58 {
  59         union pfvf_tlvs *resp = p_hwfn->vf_iov_info->pf2vf_reply;
  60
  61         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
  62                    "VF request status = 0x%x, PF reply status = 0x%x\n",
  63                    req_status, resp->default_resp.hdr.status);
  64
  65         OSAL_MUTEX_RELEASE(&p_hwfn->vf_iov_info->mutex);
  66 }
  67
  68 #ifdef CONFIG_ECORE_SW_CHANNEL
  69 /* The SW channel implementation of Windows needs to know the 'exact'
  70  * response size of any given message. That means that for future
  71  * messages we'd be unable to send TLVs to PF if he'll be unable to
  72  * answer them if the |response| != |default response|.
  73  * We'd need to handshake in acquire capabilities for any such.
  74  */
  75 #endif
  76 static enum _ecore_status_t
  77 ecore_send_msg2pf(struct ecore_hwfn *p_hwfn,
  78                   u8 *done, u32 resp_size)
  79 {
  80         union vfpf_tlvs *p_req = p_hwfn->vf_iov_info->vf2pf_request;
  81         struct ustorm_trigger_vf_zone trigger;
  82         struct ustorm_vf_zone *zone_data;
  83         enum _ecore_status_t rc = ECORE_SUCCESS;
  84         int time = 100;
  85
  86         zone_data = (struct ustorm_vf_zone *)PXP_VF_BAR0_START_USDM_ZONE_B;
  87
  88         /* output tlvs list */
  89         ecore_dp_tlv_list(p_hwfn, p_req);
  90
  91         /* need to add the END TLV to the message size */
  92         resp_size += sizeof(struct channel_list_end_tlv);
  93
  94         /* Send TLVs over HW channel */
  95         OSAL_MEMSET(&trigger, 0, sizeof(struct ustorm_trigger_vf_zone));
  96         trigger.vf_pf_msg_valid = 1;
  97
  98         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
  99                    "VF -> PF [%02x] message: [%08x, %08x] --> %p,"
 100                    " %08x --> %p\n",
 101                    GET_FIELD(p_hwfn->hw_info.concrete_fid,
 102                              PXP_CONCRETE_FID_PFID),
 103                    U64_HI(p_hwfn->vf_iov_info->vf2pf_request_phys),
 104                    U64_LO(p_hwfn->vf_iov_info->vf2pf_request_phys),
 105                    &zone_data->non_trigger.vf_pf_msg_addr,
 106                    *((u32 *)&trigger), &zone_data->trigger);
 107
 108         REG_WR(p_hwfn,
 109                (osal_uintptr_t)&zone_data->non_trigger.vf_pf_msg_addr.lo,
 110                U64_LO(p_hwfn->vf_iov_info->vf2pf_request_phys));
 111
 112         REG_WR(p_hwfn,
 113                (osal_uintptr_t)&zone_data->non_trigger.vf_pf_msg_addr.hi,
 114                U64_HI(p_hwfn->vf_iov_info->vf2pf_request_phys));
 115
 116         /* The message data must be written first, to prevent trigger before
 117          * data is written.
 118          */
 119         OSAL_WMB(p_hwfn->p_dev);
 120
 121         REG_WR(p_hwfn, (osal_uintptr_t)&zone_data->trigger,
 122                *((u32 *)&trigger));
 123
 124         /* When PF would be done with the response, it would write back to the
 125          * `done' address. Poll until then.
 126          */
 127         while ((!*done) && time) {
 128                 OSAL_MSLEEP(25);
 129                 time--;
 130         }
 131
 132         if (!*done) {
 133                 DP_NOTICE(p_hwfn, true,
 134                           "VF <-- PF Timeout [Type %d]\n",
 135                           p_req->first_tlv.tl.type);
 136                 rc = ECORE_TIMEOUT;
 137         } else {
 138                 if ((*done != PFVF_STATUS_SUCCESS) &&
 139                     (*done != PFVF_STATUS_NO_RESOURCE))
 140                         DP_NOTICE(p_hwfn, false,
 141                                   "PF response: %d [Type %d]\n",
 142                                   *done, p_req->first_tlv.tl.type);
 143                 else
 144                         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 145                                    "PF response: %d [Type %d]\n",
 146                                    *done, p_req->first_tlv.tl.type);
 147         }
 148
 149         return rc;
 150 }
 151
 152 static void ecore_vf_pf_add_qid(struct ecore_hwfn *p_hwfn,
 153                                 struct ecore_queue_cid *p_cid)
 154 {
 155         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
 156         struct vfpf_qid_tlv *p_qid_tlv;
 157
 158         /* Only add QIDs for the queue if it was negotiated with PF */
 159         if (!(p_iov->acquire_resp.pfdev_info.capabilities &
 160               PFVF_ACQUIRE_CAP_QUEUE_QIDS))
 161                 return;
 162
 163         p_qid_tlv = ecore_add_tlv(&p_iov->offset,
 164                                   CHANNEL_TLV_QID, sizeof(*p_qid_tlv));
 165         p_qid_tlv->qid = p_cid->qid_usage_idx;
 166 }
 167
 168 enum _ecore_status_t _ecore_vf_pf_release(struct ecore_hwfn *p_hwfn,
 169                                           bool b_final)
 170 {
 171         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
 172         struct pfvf_def_resp_tlv *resp;
 173         struct vfpf_first_tlv *req;
 174         u32 size;
 175         enum _ecore_status_t rc;
 176
 177         /* clear mailbox and prep first tlv */
 178         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_RELEASE, sizeof(*req));
 179
 180         /* add list termination tlv */
 181         ecore_add_tlv(&p_iov->offset,
 182                       CHANNEL_TLV_LIST_END,
 183                       sizeof(struct channel_list_end_tlv));
 184
 185         resp = &p_iov->pf2vf_reply->default_resp;
 186         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
 187
 188         if (rc == ECORE_SUCCESS && resp->hdr.status != PFVF_STATUS_SUCCESS)
 189                 rc = ECORE_AGAIN;
 190
 191         ecore_vf_pf_req_end(p_hwfn, rc);
 192         if (!b_final)
 193                 return rc;
 194
 195         p_hwfn->b_int_enabled = 0;
 196
 197         if (p_iov->vf2pf_request)
 198                 OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev,
 199                                        p_iov->vf2pf_request,
 200                                        p_iov->vf2pf_request_phys,
 201                                        sizeof(union vfpf_tlvs));
 202         if (p_iov->pf2vf_reply)
 203                 OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev,
 204                                        p_iov->pf2vf_reply,
 205                                        p_iov->pf2vf_reply_phys,
 206                                        sizeof(union pfvf_tlvs));
 207
 208         if (p_iov->bulletin.p_virt) {
 209                 size = sizeof(struct ecore_bulletin_content);
 210                 OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev,
 211                                        p_iov->bulletin.p_virt,
 212                                        p_iov->bulletin.phys,
 213                                        size);
 214         }
 215
 216 #ifdef CONFIG_ECORE_LOCK_ALLOC
 217         OSAL_MUTEX_DEALLOC(&p_iov->mutex);
 218 #endif
 219
 220         OSAL_FREE(p_hwfn->p_dev, p_hwfn->vf_iov_info);
 221         p_hwfn->vf_iov_info = OSAL_NULL;
 222
 223         return rc;
 224 }
 225
 226 enum _ecore_status_t ecore_vf_pf_release(struct ecore_hwfn *p_hwfn)
 227 {
 228         return _ecore_vf_pf_release(p_hwfn, true);
 229 }
 230
 231 #define VF_ACQUIRE_THRESH 3
 232 static void ecore_vf_pf_acquire_reduce_resc(struct ecore_hwfn *p_hwfn,
 233                                             struct vf_pf_resc_request *p_req,
 234                                             struct pf_vf_resc *p_resp)
 235 {
 236         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 237                    "PF unwilling to fullill resource request: rxq [%02x/%02x] txq [%02x/%02x] sbs [%02x/%02x] mac [%02x/%02x] vlan [%02x/%02x] mc [%02x/%02x] cids [%02x/%02x]. Try PF recommended amount\n",
 238                    p_req->num_rxqs, p_resp->num_rxqs,
 239                    p_req->num_rxqs, p_resp->num_txqs,
 240                    p_req->num_sbs, p_resp->num_sbs,
 241                    p_req->num_mac_filters, p_resp->num_mac_filters,
 242                    p_req->num_vlan_filters, p_resp->num_vlan_filters,
 243                    p_req->num_mc_filters, p_resp->num_mc_filters,
 244                    p_req->num_cids, p_resp->num_cids);
 245
 246         /* humble our request */
 247         p_req->num_txqs = p_resp->num_txqs;
 248         p_req->num_rxqs = p_resp->num_rxqs;
 249         p_req->num_sbs = p_resp->num_sbs;
 250         p_req->num_mac_filters = p_resp->num_mac_filters;
 251         p_req->num_vlan_filters = p_resp->num_vlan_filters;
 252         p_req->num_mc_filters = p_resp->num_mc_filters;
 253         p_req->num_cids = p_resp->num_cids;
 254 }
 255
 256 static enum _ecore_status_t ecore_vf_pf_acquire(struct ecore_hwfn *p_hwfn)
 257 {
 258         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
 259         struct pfvf_acquire_resp_tlv *resp = &p_iov->pf2vf_reply->acquire_resp;
 260         struct pf_vf_pfdev_info *pfdev_info = &resp->pfdev_info;
 261         struct ecore_vf_acquire_sw_info vf_sw_info;
 262         struct vf_pf_resc_request *p_resc;
 263         bool resources_acquired = false;
 264         struct vfpf_acquire_tlv *req;
 265         int attempts = 0;
 266         enum _ecore_status_t rc = ECORE_SUCCESS;
 267
 268         /* clear mailbox and prep first tlv */
 269         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_ACQUIRE, sizeof(*req));
 270         p_resc = &req->resc_request;
 271
 272         /* @@@ TBD: PF may not be ready bnx2x_get_vf_id... */
 273         req->vfdev_info.opaque_fid = p_hwfn->hw_info.opaque_fid;
 274
 275         p_resc->num_rxqs = ECORE_MAX_VF_CHAINS_PER_PF;
 276         p_resc->num_txqs = ECORE_MAX_VF_CHAINS_PER_PF;
 277         p_resc->num_sbs = ECORE_MAX_VF_CHAINS_PER_PF;
 278         p_resc->num_mac_filters = ECORE_ETH_VF_NUM_MAC_FILTERS;
 279         p_resc->num_vlan_filters = ECORE_ETH_VF_NUM_VLAN_FILTERS;
 280         p_resc->num_cids = ECORE_ETH_VF_DEFAULT_NUM_CIDS;
 281
 282         OSAL_MEMSET(&vf_sw_info, 0, sizeof(vf_sw_info));
 283         OSAL_VF_FILL_ACQUIRE_RESC_REQ(p_hwfn, &req->resc_request, &vf_sw_info);
 284
 285         req->vfdev_info.os_type = vf_sw_info.os_type;
 286         req->vfdev_info.driver_version = vf_sw_info.driver_version;
 287         req->vfdev_info.fw_major = FW_MAJOR_VERSION;
 288         req->vfdev_info.fw_minor = FW_MINOR_VERSION;
 289         req->vfdev_info.fw_revision = FW_REVISION_VERSION;
 290         req->vfdev_info.fw_engineering = FW_ENGINEERING_VERSION;
 291         req->vfdev_info.eth_fp_hsi_major = ETH_HSI_VER_MAJOR;
 292         req->vfdev_info.eth_fp_hsi_minor = ETH_HSI_VER_MINOR;
 293
 294         /* Fill capability field with any non-deprecated config we support */
 295         req->vfdev_info.capabilities |= VFPF_ACQUIRE_CAP_100G;
 296
 297         /* If we've mapped the doorbell bar, try using queue qids */
 298         if (p_iov->b_doorbell_bar)
 299                 req->vfdev_info.capabilities |= VFPF_ACQUIRE_CAP_PHYSICAL_BAR |
 300                                                 VFPF_ACQUIRE_CAP_QUEUE_QIDS;
 301
 302         /* pf 2 vf bulletin board address */
 303         req->bulletin_addr = p_iov->bulletin.phys;
 304         req->bulletin_size = p_iov->bulletin.size;
 305
 306         /* add list termination tlv */
 307         ecore_add_tlv(&p_iov->offset,
 308                       CHANNEL_TLV_LIST_END,
 309                       sizeof(struct channel_list_end_tlv));
 310
 311         while (!resources_acquired) {
 312                 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 313                            "attempting to acquire resources\n");
 314
 315                 /* Clear response buffer, as this might be a re-send */
 316                 OSAL_MEMSET(p_iov->pf2vf_reply, 0,
 317                             sizeof(union pfvf_tlvs));
 318
 319                 /* send acquire request */
 320                 rc = ecore_send_msg2pf(p_hwfn,
 321                                        &resp->hdr.status, sizeof(*resp));
 322                 if (rc != ECORE_SUCCESS)
 323                         goto exit;
 324
 325                 /* copy acquire response from buffer to p_hwfn */
 326                 OSAL_MEMCPY(&p_iov->acquire_resp,
 327                             resp, sizeof(p_iov->acquire_resp));
 328
 329                 attempts++;
 330
 331                 if (resp->hdr.status == PFVF_STATUS_SUCCESS) {
 332                         /* PF agrees to allocate our resources */
 333                         if (!(resp->pfdev_info.capabilities &
 334                               PFVF_ACQUIRE_CAP_POST_FW_OVERRIDE)) {
 335                                 /* It's possible legacy PF mistakenly accepted;
 336                                  * but we don't care - simply mark it as
 337                                  * legacy and continue.
 338                                  */
 339                                 req->vfdev_info.capabilities |=
 340                                         VFPF_ACQUIRE_CAP_PRE_FP_HSI;
 341                         }
 342                         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 343                                    "resources acquired\n");
 344                         resources_acquired = true;
 345                 } /* PF refuses to allocate our resources */
 346                 else if (resp->hdr.status == PFVF_STATUS_NO_RESOURCE &&
 347                          attempts < VF_ACQUIRE_THRESH) {
 348                         ecore_vf_pf_acquire_reduce_resc(p_hwfn, p_resc,
 349                                                         &resp->resc);
 350
 351                 } else if (resp->hdr.status == PFVF_STATUS_NOT_SUPPORTED) {
 352                         if (pfdev_info->major_fp_hsi &&
 353                             (pfdev_info->major_fp_hsi != ETH_HSI_VER_MAJOR)) {
 354                                 DP_NOTICE(p_hwfn, false,
 355                                           "PF uses an incompatible fastpath HSI"
 356                                           " %02x.%02x [VF requires %02x.%02x]."
 357                                           " Please change to a VF driver using"
 358                                           " %02x.xx.\n",
 359                                           pfdev_info->major_fp_hsi,
 360                                           pfdev_info->minor_fp_hsi,
 361                                           ETH_HSI_VER_MAJOR, ETH_HSI_VER_MINOR,
 362                                           pfdev_info->major_fp_hsi);
 363                                 rc = ECORE_INVAL;
 364                                 goto exit;
 365                         }
 366
 367                         if (!pfdev_info->major_fp_hsi) {
 368                                 if (req->vfdev_info.capabilities &
 369                                     VFPF_ACQUIRE_CAP_PRE_FP_HSI) {
 370                                         DP_NOTICE(p_hwfn, false,
 371                                                   "PF uses very old drivers."
 372                                                   " Please change to a VF"
 373                                                   " driver using no later than"
 374                                                   " 8.8.x.x.\n");
 375                                         rc = ECORE_INVAL;
 376                                         goto exit;
 377                                 } else {
 378                                         DP_INFO(p_hwfn,
 379                                                 "PF is old - try re-acquire to"
 380                                                 " see if it supports FW-version"
 381                                                 " override\n");
 382                                         req->vfdev_info.capabilities |=
 383                                                 VFPF_ACQUIRE_CAP_PRE_FP_HSI;
 384                                         continue;
 385                                 }
 386                         }
 387
 388                         /* If PF/VF are using same Major, PF must have had
 389                          * it's reasons. Simply fail.
 390                          */
 391                         DP_NOTICE(p_hwfn, false,
 392                                   "PF rejected acquisition by VF\n");
 393                         rc = ECORE_INVAL;
 394                         goto exit;
 395                 } else {
 396                         DP_ERR(p_hwfn,
 397                                "PF returned err %d to VF acquisition request\n",
 398                                resp->hdr.status);
 399                         rc = ECORE_AGAIN;
 400                         goto exit;
 401                 }
 402         }
 403
 404         /* Mark the PF as legacy, if needed */
 405         if (req->vfdev_info.capabilities &
 406             VFPF_ACQUIRE_CAP_PRE_FP_HSI)
 407                 p_iov->b_pre_fp_hsi = true;
 408
 409         /* In case PF doesn't support multi-queue Tx, update the number of
 410          * CIDs to reflect the number of queues [older PFs didn't fill that
 411          * field].
 412          */
 413         if (!(resp->pfdev_info.capabilities &
 414               PFVF_ACQUIRE_CAP_QUEUE_QIDS))
 415                 resp->resc.num_cids = resp->resc.num_rxqs +
 416                                       resp->resc.num_txqs;
 417
 418         rc = OSAL_VF_UPDATE_ACQUIRE_RESC_RESP(p_hwfn, &resp->resc);
 419         if (rc) {
 420                 DP_NOTICE(p_hwfn, true,
 421                           "VF_UPDATE_ACQUIRE_RESC_RESP Failed:"
 422                           " status = 0x%x.\n",
 423                           rc);
 424                 rc = ECORE_AGAIN;
 425                 goto exit;
 426         }
 427
 428         /* Update bulletin board size with response from PF */
 429         p_iov->bulletin.size = resp->bulletin_size;
 430
 431         /* get HW info */
 432         p_hwfn->p_dev->type = resp->pfdev_info.dev_type;
 433         p_hwfn->p_dev->chip_rev = (u8)resp->pfdev_info.chip_rev;
 434
 435         DP_INFO(p_hwfn, "Chip details - %s%d\n",
 436                 ECORE_IS_BB(p_hwfn->p_dev) ? "BB" : "AH",
 437                 CHIP_REV_IS_A0(p_hwfn->p_dev) ? 0 : 1);
 438
 439         p_hwfn->p_dev->chip_num = pfdev_info->chip_num & 0xffff;
 440
 441         /* Learn of the possibility of CMT */
 442         if (IS_LEAD_HWFN(p_hwfn)) {
 443                 if (resp->pfdev_info.capabilities & PFVF_ACQUIRE_CAP_100G) {
 444                         DP_INFO(p_hwfn, "100g VF\n");
 445                         p_hwfn->p_dev->num_hwfns = 2;
 446                 }
 447         }
 448
 449         /* @DPDK */
 450         if ((~p_iov->b_pre_fp_hsi &
 451             ETH_HSI_VER_MINOR) &&
 452             (resp->pfdev_info.minor_fp_hsi < ETH_HSI_VER_MINOR))
 453                 DP_INFO(p_hwfn,
 454                         "PF is using older fastpath HSI;"
 455                         " %02x.%02x is configured\n",
 456                         ETH_HSI_VER_MAJOR,
 457                         resp->pfdev_info.minor_fp_hsi);
 458
 459 exit:
 460         ecore_vf_pf_req_end(p_hwfn, rc);
 461
 462         return rc;
 463 }
 464
 465 u32 ecore_vf_hw_bar_size(struct ecore_hwfn *p_hwfn,
 466                          enum BAR_ID bar_id)
 467 {
 468         u32 bar_size;
 469
 470         /* Regview size is fixed */
 471         if (bar_id == BAR_ID_0)
 472                 return 1 << 17;
 473
 474         /* Doorbell is received from PF */
 475         bar_size = p_hwfn->vf_iov_info->acquire_resp.pfdev_info.bar_size;
 476         if (bar_size)
 477                 return 1 << bar_size;
 478         return 0;
 479 }
 480
 481 enum _ecore_status_t ecore_vf_hw_prepare(struct ecore_hwfn *p_hwfn)
 482 {
 483         struct ecore_hwfn *p_lead = ECORE_LEADING_HWFN(p_hwfn->p_dev);
 484         struct ecore_vf_iov *p_iov;
 485         u32 reg;
 486         enum _ecore_status_t rc;
 487
 488         /* Set number of hwfns - might be overridden once leading hwfn learns
 489          * actual configuration from PF.
 490          */
 491         if (IS_LEAD_HWFN(p_hwfn))
 492                 p_hwfn->p_dev->num_hwfns = 1;
 493
 494         reg = PXP_VF_BAR0_ME_OPAQUE_ADDRESS;
 495         p_hwfn->hw_info.opaque_fid = (u16)REG_RD(p_hwfn, reg);
 496
 497         reg = PXP_VF_BAR0_ME_CONCRETE_ADDRESS;
 498         p_hwfn->hw_info.concrete_fid = REG_RD(p_hwfn, reg);
 499
 500         /* Allocate vf sriov info */
 501         p_iov = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL, sizeof(*p_iov));
 502         if (!p_iov) {
 503                 DP_NOTICE(p_hwfn, true,
 504                           "Failed to allocate `struct ecore_sriov'\n");
 505                 return ECORE_NOMEM;
 506         }
 507
 508         /* Doorbells are tricky; Upper-layer has alreday set the hwfn doorbell
 509          * value, but there are several incompatibily scenarios where that
 510          * would be incorrect and we'd need to override it.
 511          */
 512         if (p_hwfn->doorbells == OSAL_NULL) {
 513                 p_hwfn->doorbells = (u8 OSAL_IOMEM *)p_hwfn->regview +
 514                                                      PXP_VF_BAR0_START_DQ;
 515         } else if (p_hwfn == p_lead) {
 516                 /* For leading hw-function, value is always correct, but need
 517                  * to handle scenario where legacy PF would not support 100g
 518                  * mapped bars later.
 519                  */
 520                 p_iov->b_doorbell_bar = true;
 521         } else {
 522                 /* here, value would be correct ONLY if the leading hwfn
 523                  * received indication that mapped-bars are supported.
 524                  */
 525                 if (p_lead->vf_iov_info->b_doorbell_bar)
 526                         p_iov->b_doorbell_bar = true;
 527                 else
 528                         p_hwfn->doorbells = (u8 OSAL_IOMEM *)
 529                                             p_hwfn->regview +
 530                                             PXP_VF_BAR0_START_DQ;
 531         }
 532
 533         /* Allocate vf2pf msg */
 534         p_iov->vf2pf_request = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev,
 535                                                          &p_iov->
 536                                                          vf2pf_request_phys,
 537                                                          sizeof(union
 538                                                                 vfpf_tlvs));
 539         if (!p_iov->vf2pf_request) {
 540                 DP_NOTICE(p_hwfn, true,
 541                          "Failed to allocate `vf2pf_request' DMA memory\n");
 542                 goto free_p_iov;
 543         }
 544
 545         p_iov->pf2vf_reply = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev,
 546                                                        &p_iov->
 547                                                        pf2vf_reply_phys,
 548                                                        sizeof(union pfvf_tlvs));
 549         if (!p_iov->pf2vf_reply) {
 550                 DP_NOTICE(p_hwfn, true,
 551                           "Failed to allocate `pf2vf_reply' DMA memory\n");
 552                 goto free_vf2pf_request;
 553         }
 554
 555         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 556                    "VF's Request mailbox [%p virt 0x%lx phys], "
 557                    "Response mailbox [%p virt 0x%lx phys]\n",
 558                    p_iov->vf2pf_request,
 559                    (unsigned long)p_iov->vf2pf_request_phys,
 560                    p_iov->pf2vf_reply,
 561                    (unsigned long)p_iov->pf2vf_reply_phys);
 562
 563         /* Allocate Bulletin board */
 564         p_iov->bulletin.size = sizeof(struct ecore_bulletin_content);
 565         p_iov->bulletin.p_virt = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev,
 566                                                            &p_iov->bulletin.
 567                                                            phys,
 568                                                            p_iov->bulletin.
 569                                                            size);
 570         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 571                    "VF's bulletin Board [%p virt 0x%lx phys 0x%08x bytes]\n",
 572                    p_iov->bulletin.p_virt, (unsigned long)p_iov->bulletin.phys,
 573                    p_iov->bulletin.size);
 574
 575 #ifdef CONFIG_ECORE_LOCK_ALLOC
 576         OSAL_MUTEX_ALLOC(p_hwfn, &p_iov->mutex);
 577 #endif
 578         OSAL_MUTEX_INIT(&p_iov->mutex);
 579
 580         p_hwfn->vf_iov_info = p_iov;
 581
 582         p_hwfn->hw_info.personality = ECORE_PCI_ETH;
 583
 584         rc = ecore_vf_pf_acquire(p_hwfn);
 585
 586         /* If VF is 100g using a mapped bar and PF is too old to support that,
 587          * acquisition would succeed - but the VF would have no way knowing
 588          * the size of the doorbell bar configured in HW and thus will not
 589          * know how to split it for 2nd hw-function.
 590          * In this case we re-try without the indication of the mapped
 591          * doorbell.
 592          */
 593         if (rc == ECORE_SUCCESS &&
 594             p_iov->b_doorbell_bar &&
 595             !ecore_vf_hw_bar_size(p_hwfn, BAR_ID_1) &&
 596             ECORE_IS_CMT(p_hwfn->p_dev)) {
 597                 rc = _ecore_vf_pf_release(p_hwfn, false);
 598                 if (rc != ECORE_SUCCESS)
 599                         return rc;
 600
 601                 p_iov->b_doorbell_bar = false;
 602                 p_hwfn->doorbells = (u8 OSAL_IOMEM *)p_hwfn->regview +
 603                                                      PXP_VF_BAR0_START_DQ;
 604                 rc = ecore_vf_pf_acquire(p_hwfn);
 605         }
 606
 607         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 608                    "Regview [%p], Doorbell [%p], Device-doorbell [%p]\n",
 609                    p_hwfn->regview, p_hwfn->doorbells,
 610                    p_hwfn->p_dev->doorbells);
 611
 612         return rc;
 613
 614 free_vf2pf_request:
 615         OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev, p_iov->vf2pf_request,
 616                                p_iov->vf2pf_request_phys,
 617                                sizeof(union vfpf_tlvs));
 618 free_p_iov:
 619         OSAL_FREE(p_hwfn->p_dev, p_iov);
 620
 621         return ECORE_NOMEM;
 622 }
 623
 624 #define TSTORM_QZONE_START   PXP_VF_BAR0_START_SDM_ZONE_A
 625 #define MSTORM_QZONE_START(dev)   (TSTORM_QZONE_START + \
 626                                    (TSTORM_QZONE_SIZE * NUM_OF_L2_QUEUES(dev)))
 627
 628 /* @DPDK - changed enum ecore_tunn_clss to enum ecore_tunn_mode */
 629 static void
 630 __ecore_vf_prep_tunn_req_tlv(struct vfpf_update_tunn_param_tlv *p_req,
 631                              struct ecore_tunn_update_type *p_src,
 632                              enum ecore_tunn_mode mask, u8 *p_cls)
 633 {
 634         if (p_src->b_update_mode) {
 635                 p_req->tun_mode_update_mask |= (1 << mask);
 636
 637                 if (p_src->b_mode_enabled)
 638                         p_req->tunn_mode |= (1 << mask);
 639         }
 640
 641         *p_cls = p_src->tun_cls;
 642 }
 643
 644 /* @DPDK - changed enum ecore_tunn_clss to enum ecore_tunn_mode */
 645 static void
 646 ecore_vf_prep_tunn_req_tlv(struct vfpf_update_tunn_param_tlv *p_req,
 647                            struct ecore_tunn_update_type *p_src,
 648                            enum ecore_tunn_mode mask, u8 *p_cls,
 649                            struct ecore_tunn_update_udp_port *p_port,
 650                            u8 *p_update_port, u16 *p_udp_port)
 651 {
 652         if (p_port->b_update_port) {
 653                 *p_update_port = 1;
 654                 *p_udp_port = p_port->port;
 655         }
 656
 657         __ecore_vf_prep_tunn_req_tlv(p_req, p_src, mask, p_cls);
 658 }
 659
 660 void ecore_vf_set_vf_start_tunn_update_param(struct ecore_tunnel_info *p_tun)
 661 {
 662         if (p_tun->vxlan.b_mode_enabled)
 663                 p_tun->vxlan.b_update_mode = true;
 664         if (p_tun->l2_geneve.b_mode_enabled)
 665                 p_tun->l2_geneve.b_update_mode = true;
 666         if (p_tun->ip_geneve.b_mode_enabled)
 667                 p_tun->ip_geneve.b_update_mode = true;
 668         if (p_tun->l2_gre.b_mode_enabled)
 669                 p_tun->l2_gre.b_update_mode = true;
 670         if (p_tun->ip_gre.b_mode_enabled)
 671                 p_tun->ip_gre.b_update_mode = true;
 672
 673         p_tun->b_update_rx_cls = true;
 674         p_tun->b_update_tx_cls = true;
 675 }
 676
 677 static void
 678 __ecore_vf_update_tunn_param(struct ecore_tunn_update_type *p_tun,
 679                              u16 feature_mask, u8 tunn_mode, u8 tunn_cls,
 680                              enum ecore_tunn_mode val)
 681 {
 682         if (feature_mask & (1 << val)) {
 683                 p_tun->b_mode_enabled = tunn_mode;
 684                 p_tun->tun_cls = tunn_cls;
 685         } else {
 686                 p_tun->b_mode_enabled = false;
 687         }
 688 }
 689
 690 static void
 691 ecore_vf_update_tunn_param(struct ecore_hwfn *p_hwfn,
 692                            struct ecore_tunnel_info *p_tun,
 693                            struct pfvf_update_tunn_param_tlv *p_resp)
 694 {
 695         /* Update mode and classes provided by PF */
 696         u16 feat_mask = p_resp->tunn_feature_mask;
 697
 698         __ecore_vf_update_tunn_param(&p_tun->vxlan, feat_mask,
 699                                      p_resp->vxlan_mode, p_resp->vxlan_clss,
 700                                      ECORE_MODE_VXLAN_TUNN);
 701         __ecore_vf_update_tunn_param(&p_tun->l2_geneve, feat_mask,
 702                                      p_resp->l2geneve_mode,
 703                                      p_resp->l2geneve_clss,
 704                                      ECORE_MODE_L2GENEVE_TUNN);
 705         __ecore_vf_update_tunn_param(&p_tun->ip_geneve, feat_mask,
 706                                      p_resp->ipgeneve_mode,
 707                                      p_resp->ipgeneve_clss,
 708                                      ECORE_MODE_IPGENEVE_TUNN);
 709         __ecore_vf_update_tunn_param(&p_tun->l2_gre, feat_mask,
 710                                      p_resp->l2gre_mode, p_resp->l2gre_clss,
 711                                      ECORE_MODE_L2GRE_TUNN);
 712         __ecore_vf_update_tunn_param(&p_tun->ip_gre, feat_mask,
 713                                      p_resp->ipgre_mode, p_resp->ipgre_clss,
 714                                      ECORE_MODE_IPGRE_TUNN);
 715         p_tun->geneve_port.port = p_resp->geneve_udp_port;
 716         p_tun->vxlan_port.port = p_resp->vxlan_udp_port;
 717
 718         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 719                    "tunn mode: vxlan=0x%x, l2geneve=0x%x, ipgeneve=0x%x, l2gre=0x%x, ipgre=0x%x",
 720                    p_tun->vxlan.b_mode_enabled, p_tun->l2_geneve.b_mode_enabled,
 721                    p_tun->ip_geneve.b_mode_enabled,
 722                    p_tun->l2_gre.b_mode_enabled,
 723                    p_tun->ip_gre.b_mode_enabled);
 724 }
 725
 726 enum _ecore_status_t
 727 ecore_vf_pf_tunnel_param_update(struct ecore_hwfn *p_hwfn,
 728                                 struct ecore_tunnel_info *p_src)
 729 {
 730         struct ecore_tunnel_info *p_tun = &p_hwfn->p_dev->tunnel;
 731         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
 732         struct pfvf_update_tunn_param_tlv *p_resp;
 733         struct vfpf_update_tunn_param_tlv *p_req;
 734         enum _ecore_status_t rc;
 735
 736         p_req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_UPDATE_TUNN_PARAM,
 737                                  sizeof(*p_req));
 738
 739         if (p_src->b_update_rx_cls && p_src->b_update_tx_cls)
 740                 p_req->update_tun_cls = 1;
 741
 742         ecore_vf_prep_tunn_req_tlv(p_req, &p_src->vxlan, ECORE_MODE_VXLAN_TUNN,
 743                                    &p_req->vxlan_clss, &p_src->vxlan_port,
 744                                    &p_req->update_vxlan_port,
 745                                    &p_req->vxlan_port);
 746         ecore_vf_prep_tunn_req_tlv(p_req, &p_src->l2_geneve,
 747                                    ECORE_MODE_L2GENEVE_TUNN,
 748                                    &p_req->l2geneve_clss, &p_src->geneve_port,
 749                                    &p_req->update_geneve_port,
 750                                    &p_req->geneve_port);
 751         __ecore_vf_prep_tunn_req_tlv(p_req, &p_src->ip_geneve,
 752                                      ECORE_MODE_IPGENEVE_TUNN,
 753                                      &p_req->ipgeneve_clss);
 754         __ecore_vf_prep_tunn_req_tlv(p_req, &p_src->l2_gre,
 755                                      ECORE_MODE_L2GRE_TUNN, &p_req->l2gre_clss);
 756         __ecore_vf_prep_tunn_req_tlv(p_req, &p_src->ip_gre,
 757                                      ECORE_MODE_IPGRE_TUNN, &p_req->ipgre_clss);
 758
 759         /* add list termination tlv */
 760         ecore_add_tlv(&p_iov->offset,
 761                       CHANNEL_TLV_LIST_END,
 762                       sizeof(struct channel_list_end_tlv));
 763
 764         p_resp = &p_iov->pf2vf_reply->tunn_param_resp;
 765         rc = ecore_send_msg2pf(p_hwfn, &p_resp->hdr.status, sizeof(*p_resp));
 766
 767         if (rc)
 768                 goto exit;
 769
 770         if (p_resp->hdr.status != PFVF_STATUS_SUCCESS) {
 771                 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 772                            "Failed to update tunnel parameters\n");
 773                 rc = ECORE_INVAL;
 774         }
 775
 776         ecore_vf_update_tunn_param(p_hwfn, p_tun, p_resp);
 777 exit:
 778         ecore_vf_pf_req_end(p_hwfn, rc);
 779         return rc;
 780 }
 781
 782 enum _ecore_status_t
 783 ecore_vf_pf_rxq_start(struct ecore_hwfn *p_hwfn,
 784                       struct ecore_queue_cid *p_cid,
 785                       u16 bd_max_bytes,
 786                       dma_addr_t bd_chain_phys_addr,
 787                       dma_addr_t cqe_pbl_addr,
 788                       u16 cqe_pbl_size,
 789                       void OSAL_IOMEM **pp_prod)
 790 {
 791         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
 792         struct pfvf_start_queue_resp_tlv *resp;
 793         struct vfpf_start_rxq_tlv *req;
 794         u16 rx_qid = p_cid->rel.queue_id;
 795         enum _ecore_status_t rc;
 796
 797         /* clear mailbox and prep first tlv */
 798         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_START_RXQ, sizeof(*req));
 799
 800         req->rx_qid = rx_qid;
 801         req->cqe_pbl_addr = cqe_pbl_addr;
 802         req->cqe_pbl_size = cqe_pbl_size;
 803         req->rxq_addr = bd_chain_phys_addr;
 804         req->hw_sb = p_cid->sb_igu_id;
 805         req->sb_index = p_cid->sb_idx;
 806         req->bd_max_bytes = bd_max_bytes;
 807         req->stat_id = -1; /* Keep initialized, for future compatibility */
 808
 809         /* If PF is legacy, we'll need to calculate producers ourselves
 810          * as well as clean them.
 811          */
 812         if (p_iov->b_pre_fp_hsi) {
 813                 u8 hw_qid = p_iov->acquire_resp.resc.hw_qid[rx_qid];
 814                 u32 init_prod_val = 0;
 815
 816                 *pp_prod = (u8 OSAL_IOMEM *)
 817                            p_hwfn->regview +
 818                            MSTORM_QZONE_START(p_hwfn->p_dev) +
 819                            (hw_qid) * MSTORM_QZONE_SIZE;
 820
 821                 /* Init the rcq, rx bd and rx sge (if valid) producers to 0 */
 822                 __internal_ram_wr(p_hwfn, *pp_prod, sizeof(u32),
 823                                   (u32 *)(&init_prod_val));
 824         }
 825
 826         ecore_vf_pf_add_qid(p_hwfn, p_cid);
 827
 828         /* add list termination tlv */
 829         ecore_add_tlv(&p_iov->offset,
 830                       CHANNEL_TLV_LIST_END,
 831                       sizeof(struct channel_list_end_tlv));
 832
 833         resp = &p_iov->pf2vf_reply->queue_start;
 834         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
 835         if (rc)
 836                 goto exit;
 837
 838         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
 839                 rc = ECORE_INVAL;
 840                 goto exit;
 841         }
 842
 843         /* Learn the address of the producer from the response */
 844         if (!p_iov->b_pre_fp_hsi) {
 845                 u32 init_prod_val = 0;
 846
 847                 *pp_prod = (u8 OSAL_IOMEM *)p_hwfn->regview + resp->offset;
 848                 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 849                            "Rxq[0x%02x]: producer at %p [offset 0x%08x]\n",
 850                            rx_qid, *pp_prod, resp->offset);
 851
 852                 /* Init the rcq, rx bd and rx sge (if valid) producers to 0.
 853                  * It was actually the PF's responsibility, but since some
 854                  * old PFs might fail to do so, we do this as well.
 855                  */
 856                 OSAL_BUILD_BUG_ON(ETH_HSI_VER_MAJOR != 3);
 857                 __internal_ram_wr(p_hwfn, *pp_prod, sizeof(u32),
 858                                   (u32 *)&init_prod_val);
 859         }
 860
 861 exit:
 862         ecore_vf_pf_req_end(p_hwfn, rc);
 863
 864         return rc;
 865 }
 866
 867 enum _ecore_status_t ecore_vf_pf_rxq_stop(struct ecore_hwfn *p_hwfn,
 868                                           struct ecore_queue_cid *p_cid,
 869                                           bool cqe_completion)
 870 {
 871         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
 872         struct vfpf_stop_rxqs_tlv *req;
 873         struct pfvf_def_resp_tlv *resp;
 874         enum _ecore_status_t rc;
 875
 876         /* clear mailbox and prep first tlv */
 877         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_STOP_RXQS, sizeof(*req));
 878
 879         req->rx_qid = p_cid->rel.queue_id;
 880         req->num_rxqs = 1;
 881         req->cqe_completion = cqe_completion;
 882
 883         ecore_vf_pf_add_qid(p_hwfn, p_cid);
 884
 885         /* add list termination tlv */
 886         ecore_add_tlv(&p_iov->offset,
 887                       CHANNEL_TLV_LIST_END,
 888                       sizeof(struct channel_list_end_tlv));
 889
 890         resp = &p_iov->pf2vf_reply->default_resp;
 891         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
 892         if (rc)
 893                 goto exit;
 894
 895         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
 896                 rc = ECORE_INVAL;
 897                 goto exit;
 898         }
 899
 900 exit:
 901         ecore_vf_pf_req_end(p_hwfn, rc);
 902
 903         return rc;
 904 }
 905
 906 enum _ecore_status_t
 907 ecore_vf_pf_txq_start(struct ecore_hwfn *p_hwfn,
 908                       struct ecore_queue_cid *p_cid,
 909                       dma_addr_t pbl_addr, u16 pbl_size,
 910                       void OSAL_IOMEM **pp_doorbell)
 911 {
 912         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
 913         struct pfvf_start_queue_resp_tlv *resp;
 914         struct vfpf_start_txq_tlv *req;
 915         u16 qid = p_cid->rel.queue_id;
 916         enum _ecore_status_t rc;
 917
 918         /* clear mailbox and prep first tlv */
 919         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_START_TXQ, sizeof(*req));
 920
 921         req->tx_qid = qid;
 922
 923         /* Tx */
 924         req->pbl_addr = pbl_addr;
 925         req->pbl_size = pbl_size;
 926         req->hw_sb = p_cid->sb_igu_id;
 927         req->sb_index = p_cid->sb_idx;
 928
 929         ecore_vf_pf_add_qid(p_hwfn, p_cid);
 930
 931         /* add list termination tlv */
 932         ecore_add_tlv(&p_iov->offset,
 933                       CHANNEL_TLV_LIST_END,
 934                       sizeof(struct channel_list_end_tlv));
 935
 936         resp  = &p_iov->pf2vf_reply->queue_start;
 937         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
 938         if (rc)
 939                 goto exit;
 940
 941         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
 942                 rc = ECORE_INVAL;
 943                 goto exit;
 944         }
 945
 946         /* Modern PFs provide the actual offsets, while legacy
 947          * provided only the queue id.
 948          */
 949         if (!p_iov->b_pre_fp_hsi) {
 950                 *pp_doorbell = (u8 OSAL_IOMEM *)p_hwfn->doorbells +
 951                                                 resp->offset;
 952         } else {
 953                 u8 cid = p_iov->acquire_resp.resc.cid[qid];
 954
 955                 *pp_doorbell = (u8 OSAL_IOMEM *)p_hwfn->doorbells +
 956                                                 DB_ADDR_VF(cid, DQ_DEMS_LEGACY);
 957         }
 958
 959         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 960                    "Txq[0x%02x]: doorbell at %p [offset 0x%08x]\n",
 961                    qid, *pp_doorbell, resp->offset);
 962 exit:
 963         ecore_vf_pf_req_end(p_hwfn, rc);
 964
 965         return rc;
 966 }
 967
 968 enum _ecore_status_t ecore_vf_pf_txq_stop(struct ecore_hwfn *p_hwfn,
 969                                           struct ecore_queue_cid *p_cid)
 970 {
 971         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
 972         struct vfpf_stop_txqs_tlv *req;
 973         struct pfvf_def_resp_tlv *resp;
 974         enum _ecore_status_t rc;
 975
 976         /* clear mailbox and prep first tlv */
 977         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_STOP_TXQS, sizeof(*req));
 978
 979         req->tx_qid = p_cid->rel.queue_id;
 980         req->num_txqs = 1;
 981
 982         ecore_vf_pf_add_qid(p_hwfn, p_cid);
 983
 984         /* add list termination tlv */
 985         ecore_add_tlv(&p_iov->offset,
 986                       CHANNEL_TLV_LIST_END,
 987                       sizeof(struct channel_list_end_tlv));
 988
 989         resp = &p_iov->pf2vf_reply->default_resp;
 990         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
 991         if (rc)
 992                 goto exit;
 993
 994         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
 995                 rc = ECORE_INVAL;
 996                 goto exit;
 997         }
 998
 999 exit:
1000         ecore_vf_pf_req_end(p_hwfn, rc);
1001
1002         return rc;
1003 }
1004
1005 enum _ecore_status_t ecore_vf_pf_rxqs_update(struct ecore_hwfn *p_hwfn,
1006                                              struct ecore_queue_cid **pp_cid,
1007                                              u8 num_rxqs,
1008                                              u8 comp_cqe_flg,
1009                                              u8 comp_event_flg)
1010 {
1011         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1012         struct pfvf_def_resp_tlv *resp = &p_iov->pf2vf_reply->default_resp;
1013         struct vfpf_update_rxq_tlv *req;
1014         enum _ecore_status_t rc;
1015
1016         /* Starting with CHANNEL_TLV_QID and the need for additional queue
1017          * information, this API stopped supporting multiple rxqs.
1018          * TODO - remove this and change the API to accept a single queue-cid
1019          * in a follow-up patch.
1020          */
1021         if (num_rxqs != 1) {
1022                 DP_NOTICE(p_hwfn, true,
1023                           "VFs can no longer update more than a single queue\n");
1024                 return ECORE_INVAL;
1025         }
1026
1027         /* clear mailbox and prep first tlv */
1028         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_UPDATE_RXQ, sizeof(*req));
1029
1030         req->rx_qid = (*pp_cid)->rel.queue_id;
1031         req->num_rxqs = 1;
1032
1033         if (comp_cqe_flg)
1034                 req->flags |= VFPF_RXQ_UPD_COMPLETE_CQE_FLAG;
1035         if (comp_event_flg)
1036                 req->flags |= VFPF_RXQ_UPD_COMPLETE_EVENT_FLAG;
1037
1038         ecore_vf_pf_add_qid(p_hwfn, *pp_cid);
1039
1040         /* add list termination tlv */
1041         ecore_add_tlv(&p_iov->offset,
1042                       CHANNEL_TLV_LIST_END,
1043                       sizeof(struct channel_list_end_tlv));
1044
1045         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1046         if (rc)
1047                 goto exit;
1048
1049         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
1050                 rc = ECORE_INVAL;
1051                 goto exit;
1052         }
1053
1054 exit:
1055         ecore_vf_pf_req_end(p_hwfn, rc);
1056         return rc;
1057 }
1058
1059 enum _ecore_status_t
1060 ecore_vf_pf_vport_start(struct ecore_hwfn *p_hwfn, u8 vport_id,
1061                         u16 mtu, u8 inner_vlan_removal,
1062                         enum ecore_tpa_mode tpa_mode, u8 max_buffers_per_cqe,
1063                         u8 only_untagged)
1064 {
1065         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1066         struct vfpf_vport_start_tlv *req;
1067         struct pfvf_def_resp_tlv *resp;
1068         enum _ecore_status_t rc;
1069         int i;
1070
1071         /* clear mailbox and prep first tlv */
1072         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_VPORT_START, sizeof(*req));
1073
1074         req->mtu = mtu;
1075         req->vport_id = vport_id;
1076         req->inner_vlan_removal = inner_vlan_removal;
1077         req->tpa_mode = tpa_mode;
1078         req->max_buffers_per_cqe = max_buffers_per_cqe;
1079         req->only_untagged = only_untagged;
1080
1081         /* status blocks */
1082         for (i = 0; i < p_hwfn->vf_iov_info->acquire_resp.resc.num_sbs; i++) {
1083                 struct ecore_sb_info *p_sb = p_hwfn->vf_iov_info->sbs_info[i];
1084
1085                 if (p_sb)
1086                         req->sb_addr[i] = p_sb->sb_phys;
1087         }
1088
1089         /* add list termination tlv */
1090         ecore_add_tlv(&p_iov->offset,
1091                       CHANNEL_TLV_LIST_END,
1092                       sizeof(struct channel_list_end_tlv));
1093
1094         resp  = &p_iov->pf2vf_reply->default_resp;
1095         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1096         if (rc)
1097                 goto exit;
1098
1099         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
1100                 rc = ECORE_INVAL;
1101                 goto exit;
1102         }
1103
1104 exit:
1105         ecore_vf_pf_req_end(p_hwfn, rc);
1106
1107         return rc;
1108 }
1109
1110 enum _ecore_status_t ecore_vf_pf_vport_stop(struct ecore_hwfn *p_hwfn)
1111 {
1112         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1113         struct pfvf_def_resp_tlv *resp = &p_iov->pf2vf_reply->default_resp;
1114         enum _ecore_status_t rc;
1115
1116         /* clear mailbox and prep first tlv */
1117         ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_VPORT_TEARDOWN,
1118                          sizeof(struct vfpf_first_tlv));
1119
1120         /* add list termination tlv */
1121         ecore_add_tlv(&p_iov->offset,
1122                       CHANNEL_TLV_LIST_END,
1123                       sizeof(struct channel_list_end_tlv));
1124
1125         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1126         if (rc)
1127                 goto exit;
1128
1129         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
1130                 rc = ECORE_INVAL;
1131                 goto exit;
1132         }
1133
1134 exit:
1135         ecore_vf_pf_req_end(p_hwfn, rc);
1136
1137         return rc;
1138 }
1139
1140 static bool
1141 ecore_vf_handle_vp_update_is_needed(struct ecore_hwfn *p_hwfn,
1142                                     struct ecore_sp_vport_update_params *p_data,
1143                                     u16 tlv)
1144 {
1145         switch (tlv) {
1146         case CHANNEL_TLV_VPORT_UPDATE_ACTIVATE:
1147                 return !!(p_data->update_vport_active_rx_flg ||
1148                           p_data->update_vport_active_tx_flg);
1149         case CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH:
1150 #ifndef ASIC_ONLY
1151                 /* FPGA doesn't have PVFC and so can't support tx-switching */
1152                 return !!(p_data->update_tx_switching_flg &&
1153                           !CHIP_REV_IS_FPGA(p_hwfn->p_dev));
1154 #else
1155                 return !!p_data->update_tx_switching_flg;
1156 #endif
1157         case CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP:
1158                 return !!p_data->update_inner_vlan_removal_flg;
1159         case CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN:
1160                 return !!p_data->update_accept_any_vlan_flg;
1161         case CHANNEL_TLV_VPORT_UPDATE_MCAST:
1162                 return !!p_data->update_approx_mcast_flg;
1163         case CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM:
1164                 return !!(p_data->accept_flags.update_rx_mode_config ||
1165                           p_data->accept_flags.update_tx_mode_config);
1166         case CHANNEL_TLV_VPORT_UPDATE_RSS:
1167                 return !!p_data->rss_params;
1168         case CHANNEL_TLV_VPORT_UPDATE_SGE_TPA:
1169                 return !!p_data->sge_tpa_params;
1170         default:
1171                 DP_INFO(p_hwfn, "Unexpected vport-update TLV[%d] %s\n",
1172                         tlv, ecore_channel_tlvs_string[tlv]);
1173                 return false;
1174         }
1175 }
1176
1177 static void
1178 ecore_vf_handle_vp_update_tlvs_resp(struct ecore_hwfn *p_hwfn,
1179                                     struct ecore_sp_vport_update_params *p_data)
1180 {
1181         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1182         struct pfvf_def_resp_tlv *p_resp;
1183         u16 tlv;
1184
1185         for (tlv = CHANNEL_TLV_VPORT_UPDATE_ACTIVATE;
1186              tlv < CHANNEL_TLV_VPORT_UPDATE_MAX;
1187              tlv++) {
1188                 if (!ecore_vf_handle_vp_update_is_needed(p_hwfn, p_data, tlv))
1189                         continue;
1190
1191                 p_resp = (struct pfvf_def_resp_tlv *)
1192                     ecore_iov_search_list_tlvs(p_hwfn, p_iov->pf2vf_reply, tlv);
1193                 if (p_resp && p_resp->hdr.status)
1194                         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
1195                                    "TLV[%d] type %s Configuration %s\n",
1196                                    tlv, ecore_channel_tlvs_string[tlv],
1197                                    (p_resp && p_resp->hdr.status) ? "succeeded"
1198                                                                   : "failed");
1199         }
1200 }
1201
1202 enum _ecore_status_t
1203 ecore_vf_pf_vport_update(struct ecore_hwfn *p_hwfn,
1204                          struct ecore_sp_vport_update_params *p_params)
1205 {
1206         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1207         struct vfpf_vport_update_tlv *req;
1208         struct pfvf_def_resp_tlv *resp;
1209         u8 update_rx, update_tx;
1210         u32 resp_size = 0;
1211         u16 size, tlv;
1212         enum _ecore_status_t rc;
1213
1214         resp = &p_iov->pf2vf_reply->default_resp;
1215         resp_size = sizeof(*resp);
1216
1217         update_rx = p_params->update_vport_active_rx_flg;
1218         update_tx = p_params->update_vport_active_tx_flg;
1219
1220         /* clear mailbox and prep header tlv */
1221         ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_VPORT_UPDATE, sizeof(*req));
1222
1223         /* Prepare extended tlvs */
1224         if (update_rx || update_tx) {
1225                 struct vfpf_vport_update_activate_tlv *p_act_tlv;
1226
1227                 size = sizeof(struct vfpf_vport_update_activate_tlv);
1228                 p_act_tlv = ecore_add_tlv(&p_iov->offset,
1229                                           CHANNEL_TLV_VPORT_UPDATE_ACTIVATE,
1230                                           size);
1231                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1232
1233                 if (update_rx) {
1234                         p_act_tlv->update_rx = update_rx;
1235                         p_act_tlv->active_rx = p_params->vport_active_rx_flg;
1236                 }
1237
1238                 if (update_tx) {
1239                         p_act_tlv->update_tx = update_tx;
1240                         p_act_tlv->active_tx = p_params->vport_active_tx_flg;
1241                 }
1242         }
1243
1244         if (p_params->update_inner_vlan_removal_flg) {
1245                 struct vfpf_vport_update_vlan_strip_tlv *p_vlan_tlv;
1246
1247                 size = sizeof(struct vfpf_vport_update_vlan_strip_tlv);
1248                 p_vlan_tlv = ecore_add_tlv(&p_iov->offset,
1249                                            CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP,
1250                                            size);
1251                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1252
1253                 p_vlan_tlv->remove_vlan = p_params->inner_vlan_removal_flg;
1254         }
1255
1256         if (p_params->update_tx_switching_flg) {
1257                 struct vfpf_vport_update_tx_switch_tlv *p_tx_switch_tlv;
1258
1259                 size = sizeof(struct vfpf_vport_update_tx_switch_tlv);
1260                 tlv = CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH;
1261                 p_tx_switch_tlv = ecore_add_tlv(&p_iov->offset,
1262                                                 tlv, size);
1263                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1264
1265                 p_tx_switch_tlv->tx_switching = p_params->tx_switching_flg;
1266         }
1267
1268         if (p_params->update_approx_mcast_flg) {
1269                 struct vfpf_vport_update_mcast_bin_tlv *p_mcast_tlv;
1270
1271                 size = sizeof(struct vfpf_vport_update_mcast_bin_tlv);
1272                 p_mcast_tlv = ecore_add_tlv(&p_iov->offset,
1273                                             CHANNEL_TLV_VPORT_UPDATE_MCAST,
1274                                             size);
1275                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1276
1277                 OSAL_MEMCPY(p_mcast_tlv->bins, p_params->bins,
1278                             sizeof(u32) * ETH_MULTICAST_MAC_BINS_IN_REGS);
1279         }
1280
1281         update_rx = p_params->accept_flags.update_rx_mode_config;
1282         update_tx = p_params->accept_flags.update_tx_mode_config;
1283
1284         if (update_rx || update_tx) {
1285                 struct vfpf_vport_update_accept_param_tlv *p_accept_tlv;
1286
1287                 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM;
1288                 size = sizeof(struct vfpf_vport_update_accept_param_tlv);
1289                 p_accept_tlv = ecore_add_tlv(&p_iov->offset, tlv, size);
1290                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1291
1292                 if (update_rx) {
1293                         p_accept_tlv->update_rx_mode = update_rx;
1294                         p_accept_tlv->rx_accept_filter =
1295                             p_params->accept_flags.rx_accept_filter;
1296                 }
1297
1298                 if (update_tx) {
1299                         p_accept_tlv->update_tx_mode = update_tx;
1300                         p_accept_tlv->tx_accept_filter =
1301                             p_params->accept_flags.tx_accept_filter;
1302                 }
1303         }
1304
1305         if (p_params->rss_params) {
1306                 struct ecore_rss_params *rss_params = p_params->rss_params;
1307                 struct vfpf_vport_update_rss_tlv *p_rss_tlv;
1308                 int i, table_size;
1309
1310                 size = sizeof(struct vfpf_vport_update_rss_tlv);
1311                 p_rss_tlv = ecore_add_tlv(&p_iov->offset,
1312                                           CHANNEL_TLV_VPORT_UPDATE_RSS, size);
1313                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1314
1315                 if (rss_params->update_rss_config)
1316                         p_rss_tlv->update_rss_flags |=
1317                             VFPF_UPDATE_RSS_CONFIG_FLAG;
1318                 if (rss_params->update_rss_capabilities)
1319                         p_rss_tlv->update_rss_flags |=
1320                             VFPF_UPDATE_RSS_CAPS_FLAG;
1321                 if (rss_params->update_rss_ind_table)
1322                         p_rss_tlv->update_rss_flags |=
1323                             VFPF_UPDATE_RSS_IND_TABLE_FLAG;
1324                 if (rss_params->update_rss_key)
1325                         p_rss_tlv->update_rss_flags |= VFPF_UPDATE_RSS_KEY_FLAG;
1326
1327                 p_rss_tlv->rss_enable = rss_params->rss_enable;
1328                 p_rss_tlv->rss_caps = rss_params->rss_caps;
1329                 p_rss_tlv->rss_table_size_log = rss_params->rss_table_size_log;
1330
1331                 table_size = OSAL_MIN_T(int, T_ETH_INDIRECTION_TABLE_SIZE,
1332                                         1 << p_rss_tlv->rss_table_size_log);
1333                 for (i = 0; i < table_size; i++) {
1334                         struct ecore_queue_cid *p_queue;
1335
1336                         p_queue = rss_params->rss_ind_table[i];
1337                         p_rss_tlv->rss_ind_table[i] = p_queue->rel.queue_id;
1338                 }
1339
1340                 OSAL_MEMCPY(p_rss_tlv->rss_key, rss_params->rss_key,
1341                             sizeof(rss_params->rss_key));
1342         }
1343
1344         if (p_params->update_accept_any_vlan_flg) {
1345                 struct vfpf_vport_update_accept_any_vlan_tlv *p_any_vlan_tlv;
1346
1347                 size = sizeof(struct vfpf_vport_update_accept_any_vlan_tlv);
1348                 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN;
1349                 p_any_vlan_tlv = ecore_add_tlv(&p_iov->offset, tlv, size);
1350
1351                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1352                 p_any_vlan_tlv->accept_any_vlan = p_params->accept_any_vlan;
1353                 p_any_vlan_tlv->update_accept_any_vlan_flg =
1354                     p_params->update_accept_any_vlan_flg;
1355         }
1356
1357         if (p_params->sge_tpa_params) {
1358                 struct ecore_sge_tpa_params *sge_tpa_params;
1359                 struct vfpf_vport_update_sge_tpa_tlv *p_sge_tpa_tlv;
1360
1361                 sge_tpa_params = p_params->sge_tpa_params;
1362                 size = sizeof(struct vfpf_vport_update_sge_tpa_tlv);
1363                 p_sge_tpa_tlv = ecore_add_tlv(&p_iov->offset,
1364                                               CHANNEL_TLV_VPORT_UPDATE_SGE_TPA,
1365                                               size);
1366                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1367
1368                 if (sge_tpa_params->update_tpa_en_flg)
1369                         p_sge_tpa_tlv->update_sge_tpa_flags |=
1370                             VFPF_UPDATE_TPA_EN_FLAG;
1371                 if (sge_tpa_params->update_tpa_param_flg)
1372                         p_sge_tpa_tlv->update_sge_tpa_flags |=
1373                             VFPF_UPDATE_TPA_PARAM_FLAG;
1374
1375                 if (sge_tpa_params->tpa_ipv4_en_flg)
1376                         p_sge_tpa_tlv->sge_tpa_flags |= VFPF_TPA_IPV4_EN_FLAG;
1377                 if (sge_tpa_params->tpa_ipv6_en_flg)
1378                         p_sge_tpa_tlv->sge_tpa_flags |= VFPF_TPA_IPV6_EN_FLAG;
1379                 if (sge_tpa_params->tpa_pkt_split_flg)
1380                         p_sge_tpa_tlv->sge_tpa_flags |= VFPF_TPA_PKT_SPLIT_FLAG;
1381                 if (sge_tpa_params->tpa_hdr_data_split_flg)
1382                         p_sge_tpa_tlv->sge_tpa_flags |=
1383                             VFPF_TPA_HDR_DATA_SPLIT_FLAG;
1384                 if (sge_tpa_params->tpa_gro_consistent_flg)
1385                         p_sge_tpa_tlv->sge_tpa_flags |=
1386                             VFPF_TPA_GRO_CONSIST_FLAG;
1387                 if (sge_tpa_params->tpa_ipv4_tunn_en_flg)
1388                         p_sge_tpa_tlv->sge_tpa_flags |=
1389                             VFPF_TPA_TUNN_IPV4_EN_FLAG;
1390                 if (sge_tpa_params->tpa_ipv6_tunn_en_flg)
1391                         p_sge_tpa_tlv->sge_tpa_flags |=
1392                             VFPF_TPA_TUNN_IPV6_EN_FLAG;
1393
1394                 p_sge_tpa_tlv->tpa_max_aggs_num =
1395                     sge_tpa_params->tpa_max_aggs_num;
1396                 p_sge_tpa_tlv->tpa_max_size = sge_tpa_params->tpa_max_size;
1397                 p_sge_tpa_tlv->tpa_min_size_to_start =
1398                     sge_tpa_params->tpa_min_size_to_start;
1399                 p_sge_tpa_tlv->tpa_min_size_to_cont =
1400                     sge_tpa_params->tpa_min_size_to_cont;
1401
1402                 p_sge_tpa_tlv->max_buffers_per_cqe =
1403                     sge_tpa_params->max_buffers_per_cqe;
1404         }
1405
1406         /* add list termination tlv */
1407         ecore_add_tlv(&p_iov->offset,
1408                       CHANNEL_TLV_LIST_END,
1409                       sizeof(struct channel_list_end_tlv));
1410
1411         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, resp_size);
1412         if (rc)
1413                 goto exit;
1414
1415         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
1416                 rc = ECORE_INVAL;
1417                 goto exit;
1418         }
1419
1420         ecore_vf_handle_vp_update_tlvs_resp(p_hwfn, p_params);
1421
1422 exit:
1423         ecore_vf_pf_req_end(p_hwfn, rc);
1424
1425         return rc;
1426 }
1427
1428 enum _ecore_status_t ecore_vf_pf_reset(struct ecore_hwfn *p_hwfn)
1429 {
1430         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1431         struct pfvf_def_resp_tlv *resp;
1432         struct vfpf_first_tlv *req;
1433         enum _ecore_status_t rc;
1434
1435         /* clear mailbox and prep first tlv */
1436         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_CLOSE, sizeof(*req));
1437
1438         /* add list termination tlv */
1439         ecore_add_tlv(&p_iov->offset,
1440                       CHANNEL_TLV_LIST_END,
1441                       sizeof(struct channel_list_end_tlv));
1442
1443         resp = &p_iov->pf2vf_reply->default_resp;
1444         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1445         if (rc)
1446                 goto exit;
1447
1448         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
1449                 rc = ECORE_AGAIN;
1450                 goto exit;
1451         }
1452
1453         p_hwfn->b_int_enabled = 0;
1454
1455 exit:
1456         ecore_vf_pf_req_end(p_hwfn, rc);
1457
1458         return rc;
1459 }
1460
1461 void ecore_vf_pf_filter_mcast(struct ecore_hwfn *p_hwfn,
1462                               struct ecore_filter_mcast *p_filter_cmd)
1463 {
1464         struct ecore_sp_vport_update_params sp_params;
1465         int i;
1466
1467         OSAL_MEMSET(&sp_params, 0, sizeof(sp_params));
1468         sp_params.update_approx_mcast_flg = 1;
1469
1470         if (p_filter_cmd->opcode == ECORE_FILTER_ADD) {
1471                 for (i = 0; i < p_filter_cmd->num_mc_addrs; i++) {
1472                         u32 bit;
1473
1474                         bit = ecore_mcast_bin_from_mac(p_filter_cmd->mac[i]);
1475                         sp_params.bins[bit / 32] |= 1 << (bit % 32);
1476                 }
1477         }
1478
1479         ecore_vf_pf_vport_update(p_hwfn, &sp_params);
1480 }
1481
1482 enum _ecore_status_t ecore_vf_pf_filter_ucast(struct ecore_hwfn *p_hwfn,
1483                                               struct ecore_filter_ucast
1484                                               *p_ucast)
1485 {
1486         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1487         struct vfpf_ucast_filter_tlv *req;
1488         struct pfvf_def_resp_tlv *resp;
1489         enum _ecore_status_t rc;
1490
1491         /* Sanitize */
1492         if (p_ucast->opcode == ECORE_FILTER_MOVE) {
1493                 DP_NOTICE(p_hwfn, true,
1494                           "VFs don't support Moving of filters\n");
1495                 return ECORE_INVAL;
1496         }
1497
1498         /* clear mailbox and prep first tlv */
1499         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_UCAST_FILTER, sizeof(*req));
1500         req->opcode = (u8)p_ucast->opcode;
1501         req->type = (u8)p_ucast->type;
1502         OSAL_MEMCPY(req->mac, p_ucast->mac, ETH_ALEN);
1503         req->vlan = p_ucast->vlan;
1504
1505         /* add list termination tlv */
1506         ecore_add_tlv(&p_iov->offset,
1507                       CHANNEL_TLV_LIST_END,
1508                       sizeof(struct channel_list_end_tlv));
1509
1510         resp = &p_iov->pf2vf_reply->default_resp;
1511         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1512         if (rc)
1513                 goto exit;
1514
1515         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
1516                 rc = ECORE_AGAIN;
1517                 goto exit;
1518         }
1519
1520 exit:
1521         ecore_vf_pf_req_end(p_hwfn, rc);
1522
1523         return rc;
1524 }
1525
1526 enum _ecore_status_t ecore_vf_pf_int_cleanup(struct ecore_hwfn *p_hwfn)
1527 {
1528         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1529         struct pfvf_def_resp_tlv *resp = &p_iov->pf2vf_reply->default_resp;
1530         enum _ecore_status_t rc;
1531
1532         /* clear mailbox and prep first tlv */
1533         ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_INT_CLEANUP,
1534                          sizeof(struct vfpf_first_tlv));
1535
1536         /* add list termination tlv */
1537         ecore_add_tlv(&p_iov->offset,
1538                       CHANNEL_TLV_LIST_END,
1539                       sizeof(struct channel_list_end_tlv));
1540
1541         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1542         if (rc)
1543                 goto exit;
1544
1545         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
1546                 rc = ECORE_INVAL;
1547                 goto exit;
1548         }
1549
1550 exit:
1551         ecore_vf_pf_req_end(p_hwfn, rc);
1552
1553         return rc;
1554 }
1555
1556 enum _ecore_status_t ecore_vf_pf_get_coalesce(struct ecore_hwfn *p_hwfn,
1557                                               u16 *p_coal,
1558                                               struct ecore_queue_cid *p_cid)
1559 {
1560         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1561         struct pfvf_read_coal_resp_tlv *resp;
1562         struct vfpf_read_coal_req_tlv *req;
1563         enum _ecore_status_t rc;
1564
1565         /* clear mailbox and prep header tlv */
1566         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_COALESCE_READ,
1567                                sizeof(*req));
1568         req->qid = p_cid->rel.queue_id;
1569         req->is_rx = p_cid->b_is_rx ? 1 : 0;
1570
1571         ecore_add_tlv(&p_iov->offset, CHANNEL_TLV_LIST_END,
1572                       sizeof(struct channel_list_end_tlv));
1573         resp = &p_iov->pf2vf_reply->read_coal_resp;
1574
1575         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1576         if (rc != ECORE_SUCCESS)
1577                 goto exit;
1578
1579         if (resp->hdr.status != PFVF_STATUS_SUCCESS)
1580                 goto exit;
1581
1582         *p_coal = resp->coal;
1583 exit:
1584         ecore_vf_pf_req_end(p_hwfn, rc);
1585
1586         return rc;
1587 }
1588
1589 enum _ecore_status_t
1590 ecore_vf_pf_set_coalesce(struct ecore_hwfn *p_hwfn, u16 rx_coal, u16 tx_coal,
1591                          struct ecore_queue_cid     *p_cid)
1592 {
1593         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1594         struct vfpf_update_coalesce *req;
1595         struct pfvf_def_resp_tlv *resp;
1596         enum _ecore_status_t rc;
1597
1598         /* clear mailbox and prep header tlv */
1599         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_COALESCE_UPDATE,
1600                                sizeof(*req));
1601
1602         req->rx_coal = rx_coal;
1603         req->tx_coal = tx_coal;
1604         req->qid = p_cid->rel.queue_id;
1605
1606         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
1607                    "Setting coalesce rx_coal = %d, tx_coal = %d at queue = %d\n",
1608                    rx_coal, tx_coal, req->qid);
1609
1610         /* add list termination tlv */
1611         ecore_add_tlv(&p_iov->offset, CHANNEL_TLV_LIST_END,
1612                       sizeof(struct channel_list_end_tlv));
1613
1614         resp = &p_iov->pf2vf_reply->default_resp;
1615         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1616
1617         if (rc != ECORE_SUCCESS)
1618                 goto exit;
1619
1620         if (resp->hdr.status != PFVF_STATUS_SUCCESS)
1621                 goto exit;
1622
1623         p_hwfn->p_dev->rx_coalesce_usecs = rx_coal;
1624         p_hwfn->p_dev->tx_coalesce_usecs = tx_coal;
1625
1626 exit:
1627         ecore_vf_pf_req_end(p_hwfn, rc);
1628         return rc;
1629 }
1630
1631 enum _ecore_status_t
1632 ecore_vf_pf_update_mtu(struct ecore_hwfn *p_hwfn, u16 mtu)
1633 {
1634         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1635         struct vfpf_update_mtu_tlv *p_req;
1636         struct pfvf_def_resp_tlv *p_resp;
1637         enum _ecore_status_t rc;
1638
1639         if (!mtu)
1640                 return ECORE_INVAL;
1641
1642         /* clear mailbox and prep header tlv */
1643         p_req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_UPDATE_MTU,
1644                                  sizeof(*p_req));
1645         p_req->mtu = mtu;
1646         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
1647                    "Requesting MTU update to %d\n", mtu);
1648
1649         /* add list termination tlv */
1650         ecore_add_tlv(&p_iov->offset,
1651                       CHANNEL_TLV_LIST_END,
1652                       sizeof(struct channel_list_end_tlv));
1653
1654         p_resp = &p_iov->pf2vf_reply->default_resp;
1655         rc = ecore_send_msg2pf(p_hwfn, &p_resp->hdr.status, sizeof(*p_resp));
1656         if (p_resp->hdr.status == PFVF_STATUS_NOT_SUPPORTED)
1657                 rc = ECORE_INVAL;
1658
1659         ecore_vf_pf_req_end(p_hwfn, rc);
1660
1661         return rc;
1662 }
1663
1664 u16 ecore_vf_get_igu_sb_id(struct ecore_hwfn *p_hwfn,
1665                            u16               sb_id)
1666 {
1667         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1668
1669         if (!p_iov) {
1670                 DP_NOTICE(p_hwfn, true, "vf_sriov_info isn't initialized\n");
1671                 return 0;
1672         }
1673
1674         return p_iov->acquire_resp.resc.hw_sbs[sb_id].hw_sb_id;
1675 }
1676
1677 void ecore_vf_set_sb_info(struct ecore_hwfn *p_hwfn,
1678                           u16 sb_id, struct ecore_sb_info *p_sb)
1679 {
1680         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1681
1682         if (!p_iov) {
1683                 DP_NOTICE(p_hwfn, true, "vf_sriov_info isn't initialized\n");
1684                 return;
1685         }
1686
1687         if (sb_id >= PFVF_MAX_SBS_PER_VF) {
1688                 DP_NOTICE(p_hwfn, true, "Can't configure SB %04x\n", sb_id);
1689                 return;
1690         }
1691
1692         p_iov->sbs_info[sb_id] = p_sb;
1693 }
1694
1695 enum _ecore_status_t ecore_vf_read_bulletin(struct ecore_hwfn *p_hwfn,
1696                                             u8 *p_change)
1697 {
1698         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1699         struct ecore_bulletin_content shadow;
1700         u32 crc, crc_size;
1701
1702         crc_size = sizeof(p_iov->bulletin.p_virt->crc);
1703         *p_change = 0;
1704
1705         /* Need to guarantee PF is not in the middle of writing it */
1706         OSAL_MEMCPY(&shadow, p_iov->bulletin.p_virt, p_iov->bulletin.size);
1707
1708         /* If version did not update, no need to do anything */
1709         if (shadow.version == p_iov->bulletin_shadow.version)
1710                 return ECORE_SUCCESS;
1711
1712         /* Verify the bulletin we see is valid */
1713         crc = OSAL_CRC32(0, (u8 *)&shadow + crc_size,
1714                          p_iov->bulletin.size - crc_size);
1715         if (crc != shadow.crc)
1716                 return ECORE_AGAIN;
1717
1718         /* Set the shadow bulletin and process it */
1719         OSAL_MEMCPY(&p_iov->bulletin_shadow, &shadow, p_iov->bulletin.size);
1720
1721         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
1722                    "Read a bulletin update %08x\n", shadow.version);
1723
1724         *p_change = 1;
1725
1726         return ECORE_SUCCESS;
1727 }
1728
1729 void __ecore_vf_get_link_params(struct ecore_mcp_link_params *p_params,
1730                                 struct ecore_bulletin_content *p_bulletin)
1731 {
1732         OSAL_MEMSET(p_params, 0, sizeof(*p_params));
1733
1734         p_params->speed.autoneg = p_bulletin->req_autoneg;
1735         p_params->speed.advertised_speeds = p_bulletin->req_adv_speed;
1736         p_params->speed.forced_speed = p_bulletin->req_forced_speed;
1737         p_params->pause.autoneg = p_bulletin->req_autoneg_pause;
1738         p_params->pause.forced_rx = p_bulletin->req_forced_rx;
1739         p_params->pause.forced_tx = p_bulletin->req_forced_tx;
1740         p_params->loopback_mode = p_bulletin->req_loopback;
1741 }
1742
1743 void ecore_vf_get_link_params(struct ecore_hwfn *p_hwfn,
1744                               struct ecore_mcp_link_params *params)
1745 {
1746         __ecore_vf_get_link_params(params,
1747                                    &p_hwfn->vf_iov_info->bulletin_shadow);
1748 }
1749
1750 void __ecore_vf_get_link_state(struct ecore_mcp_link_state *p_link,
1751                                struct ecore_bulletin_content *p_bulletin)
1752 {
1753         OSAL_MEMSET(p_link, 0, sizeof(*p_link));
1754
1755         p_link->link_up = p_bulletin->link_up;
1756         p_link->speed = p_bulletin->speed;
1757         p_link->full_duplex = p_bulletin->full_duplex;
1758         p_link->an = p_bulletin->autoneg;
1759         p_link->an_complete = p_bulletin->autoneg_complete;
1760         p_link->parallel_detection = p_bulletin->parallel_detection;
1761         p_link->pfc_enabled = p_bulletin->pfc_enabled;
1762         p_link->partner_adv_speed = p_bulletin->partner_adv_speed;
1763         p_link->partner_tx_flow_ctrl_en = p_bulletin->partner_tx_flow_ctrl_en;
1764         p_link->partner_rx_flow_ctrl_en = p_bulletin->partner_rx_flow_ctrl_en;
1765         p_link->partner_adv_pause = p_bulletin->partner_adv_pause;
1766         p_link->sfp_tx_fault = p_bulletin->sfp_tx_fault;
1767 }
1768
1769 void ecore_vf_get_link_state(struct ecore_hwfn *p_hwfn,
1770                              struct ecore_mcp_link_state *link)
1771 {
1772         __ecore_vf_get_link_state(link,
1773                                   &p_hwfn->vf_iov_info->bulletin_shadow);
1774 }
1775
1776 void __ecore_vf_get_link_caps(struct ecore_mcp_link_capabilities *p_link_caps,
1777                               struct ecore_bulletin_content *p_bulletin)
1778 {
1779         OSAL_MEMSET(p_link_caps, 0, sizeof(*p_link_caps));
1780         p_link_caps->speed_capabilities = p_bulletin->capability_speed;
1781 }
1782
1783 void ecore_vf_get_link_caps(struct ecore_hwfn *p_hwfn,
1784                             struct ecore_mcp_link_capabilities *p_link_caps)
1785 {
1786         __ecore_vf_get_link_caps(p_link_caps,
1787                                  &p_hwfn->vf_iov_info->bulletin_shadow);
1788 }
1789
1790 void ecore_vf_get_num_rxqs(struct ecore_hwfn *p_hwfn, u8 *num_rxqs)
1791 {
1792         *num_rxqs = p_hwfn->vf_iov_info->acquire_resp.resc.num_rxqs;
1793 }
1794
1795 void ecore_vf_get_num_txqs(struct ecore_hwfn *p_hwfn,
1796                            u8 *num_txqs)
1797 {
1798         *num_txqs = p_hwfn->vf_iov_info->acquire_resp.resc.num_txqs;
1799 }
1800
1801 void ecore_vf_get_port_mac(struct ecore_hwfn *p_hwfn, u8 *port_mac)
1802 {
1803         OSAL_MEMCPY(port_mac,
1804                     p_hwfn->vf_iov_info->acquire_resp.pfdev_info.port_mac,
1805                     ETH_ALEN);
1806 }
1807
1808 void ecore_vf_get_num_vlan_filters(struct ecore_hwfn *p_hwfn,
1809                                    u8 *num_vlan_filters)
1810 {
1811         struct ecore_vf_iov *p_vf;
1812
1813         p_vf = p_hwfn->vf_iov_info;
1814         *num_vlan_filters = p_vf->acquire_resp.resc.num_vlan_filters;
1815 }
1816
1817 void ecore_vf_get_num_sbs(struct ecore_hwfn *p_hwfn,
1818                           u32 *num_sbs)
1819 {
1820         struct ecore_vf_iov *p_vf;
1821
1822         p_vf = p_hwfn->vf_iov_info;
1823         *num_sbs = (u32)p_vf->acquire_resp.resc.num_sbs;
1824 }
1825
1826 void ecore_vf_get_num_mac_filters(struct ecore_hwfn *p_hwfn,
1827                                   u32 *num_mac_filters)
1828 {
1829         struct ecore_vf_iov *p_vf = p_hwfn->vf_iov_info;
1830
1831         *num_mac_filters = p_vf->acquire_resp.resc.num_mac_filters;
1832 }
1833
1834 bool ecore_vf_check_mac(struct ecore_hwfn *p_hwfn, u8 *mac)
1835 {
1836         struct ecore_bulletin_content *bulletin;
1837
1838         bulletin = &p_hwfn->vf_iov_info->bulletin_shadow;
1839         if (!(bulletin->valid_bitmap & (1 << MAC_ADDR_FORCED)))
1840                 return true;
1841
1842         /* Forbid VF from changing a MAC enforced by PF */
1843         if (OSAL_MEMCMP(bulletin->mac, mac, ETH_ALEN))
1844                 return false;
1845
1846         return false;
1847 }
1848
1849 bool ecore_vf_bulletin_get_forced_mac(struct ecore_hwfn *hwfn, u8 *dst_mac,
1850                                       u8 *p_is_forced)
1851 {
1852         struct ecore_bulletin_content *bulletin;
1853
1854         bulletin = &hwfn->vf_iov_info->bulletin_shadow;
1855
1856         if (bulletin->valid_bitmap & (1 << MAC_ADDR_FORCED)) {
1857                 if (p_is_forced)
1858                         *p_is_forced = 1;
1859         } else if (bulletin->valid_bitmap & (1 << VFPF_BULLETIN_MAC_ADDR)) {
1860                 if (p_is_forced)
1861                         *p_is_forced = 0;
1862         } else {
1863                 return false;
1864         }
1865
1866         OSAL_MEMCPY(dst_mac, bulletin->mac, ETH_ALEN);
1867
1868         return true;
1869 }
1870
1871 void ecore_vf_bulletin_get_udp_ports(struct ecore_hwfn *p_hwfn,
1872                                      u16 *p_vxlan_port,
1873                                      u16 *p_geneve_port)
1874 {
1875         struct ecore_bulletin_content *p_bulletin;
1876
1877         p_bulletin = &p_hwfn->vf_iov_info->bulletin_shadow;
1878
1879         *p_vxlan_port = p_bulletin->vxlan_udp_port;
1880         *p_geneve_port = p_bulletin->geneve_udp_port;
1881 }
1882
1883 bool ecore_vf_bulletin_get_forced_vlan(struct ecore_hwfn *hwfn, u16 *dst_pvid)
1884 {
1885         struct ecore_bulletin_content *bulletin;
1886
1887         bulletin = &hwfn->vf_iov_info->bulletin_shadow;
1888
1889         if (!(bulletin->valid_bitmap & (1 << VLAN_ADDR_FORCED)))
1890                 return false;
1891
1892         if (dst_pvid)
1893                 *dst_pvid = bulletin->pvid;
1894
1895         return true;
1896 }
1897
1898 bool ecore_vf_get_pre_fp_hsi(struct ecore_hwfn *p_hwfn)
1899 {
1900         return p_hwfn->vf_iov_info->b_pre_fp_hsi;
1901 }
1902
1903 void ecore_vf_get_fw_version(struct ecore_hwfn *p_hwfn,
1904                              u16 *fw_major, u16 *fw_minor, u16 *fw_rev,
1905                              u16 *fw_eng)
1906 {
1907         struct pf_vf_pfdev_info *info;
1908
1909         info = &p_hwfn->vf_iov_info->acquire_resp.pfdev_info;
1910
1911         *fw_major = info->fw_major;
1912         *fw_minor = info->fw_minor;
1913         *fw_rev = info->fw_rev;
1914         *fw_eng = info->fw_eng;
1915 }
1916
1917 #ifdef CONFIG_ECORE_SW_CHANNEL
1918 void ecore_vf_set_hw_channel(struct ecore_hwfn *p_hwfn, bool b_is_hw)
1919 {
1920         p_hwfn->vf_iov_info->b_hw_channel = b_is_hw;
1921 }
1922 #endif