drivers/net/qede/base/ecore_vf.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright (c) 2016 - 2018 Cavium Inc.
   3  * All rights reserved.
   4  * www.cavium.com
   5  */
   6
   7 #include "bcm_osal.h"
   8 #include "ecore.h"
   9 #include "ecore_hsi_eth.h"
  10 #include "ecore_sriov.h"
  11 #include "ecore_l2_api.h"
  12 #include "ecore_vf.h"
  13 #include "ecore_vfpf_if.h"
  14 #include "ecore_status.h"
  15 #include "reg_addr.h"
  16 #include "ecore_int.h"
  17 #include "ecore_l2.h"
  18 #include "ecore_mcp_api.h"
  19 #include "ecore_vf_api.h"
  20
  21 static void *ecore_vf_pf_prep(struct ecore_hwfn *p_hwfn, u16 type, u16 length)
  22 {
  23         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
  24         void *p_tlv;
  25
  26         /* This lock is released when we receive PF's response
  27          * in ecore_send_msg2pf().
  28          * So, ecore_vf_pf_prep() and ecore_send_msg2pf()
  29          * must come in sequence.
  30          */
  31         OSAL_MUTEX_ACQUIRE(&p_iov->mutex);
  32
  33         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
  34                    "preparing to send %s tlv over vf pf channel\n",
  35                    qede_ecore_channel_tlvs_string[type]);
  36
  37         /* Reset Request offset */
  38         p_iov->offset = (u8 *)(p_iov->vf2pf_request);
  39
  40         /* Clear mailbox - both request and reply */
  41         OSAL_MEMSET(p_iov->vf2pf_request, 0, sizeof(union vfpf_tlvs));
  42         OSAL_MEMSET(p_iov->pf2vf_reply, 0, sizeof(union pfvf_tlvs));
  43
  44         /* Init type and length */
  45         p_tlv = ecore_add_tlv(&p_iov->offset, type, length);
  46
  47         /* Init first tlv header */
  48         ((struct vfpf_first_tlv *)p_tlv)->reply_address =
  49             (u64)p_iov->pf2vf_reply_phys;
  50
  51         return p_tlv;
  52 }
  53
  54 static void ecore_vf_pf_req_end(struct ecore_hwfn *p_hwfn,
  55                                  enum _ecore_status_t req_status)
  56 {
  57         union pfvf_tlvs *resp = p_hwfn->vf_iov_info->pf2vf_reply;
  58
  59         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
  60                    "VF request status = 0x%x, PF reply status = 0x%x\n",
  61                    req_status, resp->default_resp.hdr.status);
  62
  63         OSAL_MUTEX_RELEASE(&p_hwfn->vf_iov_info->mutex);
  64 }
  65
  66 #ifdef CONFIG_ECORE_SW_CHANNEL
  67 /* The SW channel implementation of Windows needs to know the 'exact'
  68  * response size of any given message. That means that for future
  69  * messages we'd be unable to send TLVs to PF if he'll be unable to
  70  * answer them if the |response| != |default response|.
  71  * We'd need to handshake in acquire capabilities for any such.
  72  */
  73 #endif
  74 static enum _ecore_status_t
  75 ecore_send_msg2pf(struct ecore_hwfn *p_hwfn,
  76                   u8 *done, u32 resp_size)
  77 {
  78         union vfpf_tlvs *p_req = p_hwfn->vf_iov_info->vf2pf_request;
  79         struct ustorm_trigger_vf_zone trigger;
  80         struct ustorm_vf_zone *zone_data;
  81         enum _ecore_status_t rc = ECORE_SUCCESS;
  82         int time = 100;
  83
  84         zone_data = (struct ustorm_vf_zone *)PXP_VF_BAR0_START_USDM_ZONE_B;
  85
  86         /* output tlvs list */
  87         ecore_dp_tlv_list(p_hwfn, p_req);
  88
  89         /* need to add the END TLV to the message size */
  90         resp_size += sizeof(struct channel_list_end_tlv);
  91
  92         /* Send TLVs over HW channel */
  93         OSAL_MEMSET(&trigger, 0, sizeof(struct ustorm_trigger_vf_zone));
  94         trigger.vf_pf_msg_valid = 1;
  95
  96         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
  97                    "VF -> PF [%02x] message: [%08x, %08x] --> %p,"
  98                    " %08x --> %p\n",
  99                    GET_FIELD(p_hwfn->hw_info.concrete_fid,
 100                              PXP_CONCRETE_FID_PFID),
 101                    U64_HI(p_hwfn->vf_iov_info->vf2pf_request_phys),
 102                    U64_LO(p_hwfn->vf_iov_info->vf2pf_request_phys),
 103                    &zone_data->non_trigger.vf_pf_msg_addr,
 104                    *((u32 *)&trigger), &zone_data->trigger);
 105
 106         REG_WR(p_hwfn,
 107                (osal_uintptr_t)&zone_data->non_trigger.vf_pf_msg_addr.lo,
 108                U64_LO(p_hwfn->vf_iov_info->vf2pf_request_phys));
 109
 110         REG_WR(p_hwfn,
 111                (osal_uintptr_t)&zone_data->non_trigger.vf_pf_msg_addr.hi,
 112                U64_HI(p_hwfn->vf_iov_info->vf2pf_request_phys));
 113
 114         /* The message data must be written first, to prevent trigger before
 115          * data is written.
 116          */
 117         OSAL_WMB(p_hwfn->p_dev);
 118
 119         REG_WR(p_hwfn, (osal_uintptr_t)&zone_data->trigger,
 120                *((u32 *)&trigger));
 121
 122         /* When PF would be done with the response, it would write back to the
 123          * `done' address. Poll until then.
 124          */
 125         while ((!*done) && time) {
 126                 OSAL_MSLEEP(25);
 127                 time--;
 128         }
 129
 130         if (!*done) {
 131                 DP_NOTICE(p_hwfn, true,
 132                           "VF <-- PF Timeout [Type %d]\n",
 133                           p_req->first_tlv.tl.type);
 134                 rc = ECORE_TIMEOUT;
 135         } else {
 136                 if ((*done != PFVF_STATUS_SUCCESS) &&
 137                     (*done != PFVF_STATUS_NO_RESOURCE))
 138                         DP_NOTICE(p_hwfn, false,
 139                                   "PF response: %d [Type %d]\n",
 140                                   *done, p_req->first_tlv.tl.type);
 141                 else
 142                         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 143                                    "PF response: %d [Type %d]\n",
 144                                    *done, p_req->first_tlv.tl.type);
 145         }
 146
 147         return rc;
 148 }
 149
 150 static void ecore_vf_pf_add_qid(struct ecore_hwfn *p_hwfn,
 151                                 struct ecore_queue_cid *p_cid)
 152 {
 153         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
 154         struct vfpf_qid_tlv *p_qid_tlv;
 155
 156         /* Only add QIDs for the queue if it was negotiated with PF */
 157         if (!(p_iov->acquire_resp.pfdev_info.capabilities &
 158               PFVF_ACQUIRE_CAP_QUEUE_QIDS))
 159                 return;
 160
 161         p_qid_tlv = ecore_add_tlv(&p_iov->offset,
 162                                   CHANNEL_TLV_QID, sizeof(*p_qid_tlv));
 163         p_qid_tlv->qid = p_cid->qid_usage_idx;
 164 }
 165
 166 enum _ecore_status_t _ecore_vf_pf_release(struct ecore_hwfn *p_hwfn,
 167                                           bool b_final)
 168 {
 169         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
 170         struct pfvf_def_resp_tlv *resp;
 171         struct vfpf_first_tlv *req;
 172         u32 size;
 173         enum _ecore_status_t rc;
 174
 175         /* clear mailbox and prep first tlv */
 176         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_RELEASE, sizeof(*req));
 177
 178         /* add list termination tlv */
 179         ecore_add_tlv(&p_iov->offset,
 180                       CHANNEL_TLV_LIST_END,
 181                       sizeof(struct channel_list_end_tlv));
 182
 183         resp = &p_iov->pf2vf_reply->default_resp;
 184         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
 185
 186         if (rc == ECORE_SUCCESS && resp->hdr.status != PFVF_STATUS_SUCCESS)
 187                 rc = ECORE_AGAIN;
 188
 189         ecore_vf_pf_req_end(p_hwfn, rc);
 190         if (!b_final)
 191                 return rc;
 192
 193         p_hwfn->b_int_enabled = 0;
 194
 195         if (p_iov->vf2pf_request)
 196                 OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev,
 197                                        p_iov->vf2pf_request,
 198                                        p_iov->vf2pf_request_phys,
 199                                        sizeof(union vfpf_tlvs));
 200         if (p_iov->pf2vf_reply)
 201                 OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev,
 202                                        p_iov->pf2vf_reply,
 203                                        p_iov->pf2vf_reply_phys,
 204                                        sizeof(union pfvf_tlvs));
 205
 206         if (p_iov->bulletin.p_virt) {
 207                 size = sizeof(struct ecore_bulletin_content);
 208                 OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev,
 209                                        p_iov->bulletin.p_virt,
 210                                        p_iov->bulletin.phys,
 211                                        size);
 212         }
 213
 214 #ifdef CONFIG_ECORE_LOCK_ALLOC
 215         OSAL_MUTEX_DEALLOC(&p_iov->mutex);
 216 #endif
 217
 218         OSAL_FREE(p_hwfn->p_dev, p_hwfn->vf_iov_info);
 219         p_hwfn->vf_iov_info = OSAL_NULL;
 220
 221         return rc;
 222 }
 223
 224 enum _ecore_status_t ecore_vf_pf_release(struct ecore_hwfn *p_hwfn)
 225 {
 226         return _ecore_vf_pf_release(p_hwfn, true);
 227 }
 228
 229 #define VF_ACQUIRE_THRESH 3
 230 static void ecore_vf_pf_acquire_reduce_resc(struct ecore_hwfn *p_hwfn,
 231                                             struct vf_pf_resc_request *p_req,
 232                                             struct pf_vf_resc *p_resp)
 233 {
 234         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 235                    "PF unwilling to fullill resource request: rxq [%02x/%02x] txq [%02x/%02x] sbs [%02x/%02x] mac [%02x/%02x] vlan [%02x/%02x] mc [%02x/%02x] cids [%02x/%02x]. Try PF recommended amount\n",
 236                    p_req->num_rxqs, p_resp->num_rxqs,
 237                    p_req->num_rxqs, p_resp->num_txqs,
 238                    p_req->num_sbs, p_resp->num_sbs,
 239                    p_req->num_mac_filters, p_resp->num_mac_filters,
 240                    p_req->num_vlan_filters, p_resp->num_vlan_filters,
 241                    p_req->num_mc_filters, p_resp->num_mc_filters,
 242                    p_req->num_cids, p_resp->num_cids);
 243
 244         /* humble our request */
 245         p_req->num_txqs = p_resp->num_txqs;
 246         p_req->num_rxqs = p_resp->num_rxqs;
 247         p_req->num_sbs = p_resp->num_sbs;
 248         p_req->num_mac_filters = p_resp->num_mac_filters;
 249         p_req->num_vlan_filters = p_resp->num_vlan_filters;
 250         p_req->num_mc_filters = p_resp->num_mc_filters;
 251         p_req->num_cids = p_resp->num_cids;
 252 }
 253
 254 static enum _ecore_status_t ecore_vf_pf_acquire(struct ecore_hwfn *p_hwfn)
 255 {
 256         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
 257         struct pfvf_acquire_resp_tlv *resp = &p_iov->pf2vf_reply->acquire_resp;
 258         struct pf_vf_pfdev_info *pfdev_info = &resp->pfdev_info;
 259         struct ecore_vf_acquire_sw_info vf_sw_info;
 260         struct vf_pf_resc_request *p_resc;
 261         bool resources_acquired = false;
 262         struct vfpf_acquire_tlv *req;
 263         int attempts = 0;
 264         enum _ecore_status_t rc = ECORE_SUCCESS;
 265
 266         /* clear mailbox and prep first tlv */
 267         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_ACQUIRE, sizeof(*req));
 268         p_resc = &req->resc_request;
 269
 270         /* @@@ TBD: PF may not be ready bnx2x_get_vf_id... */
 271         req->vfdev_info.opaque_fid = p_hwfn->hw_info.opaque_fid;
 272
 273         p_resc->num_rxqs = ECORE_MAX_VF_CHAINS_PER_PF;
 274         p_resc->num_txqs = ECORE_MAX_VF_CHAINS_PER_PF;
 275         p_resc->num_sbs = ECORE_MAX_VF_CHAINS_PER_PF;
 276         p_resc->num_mac_filters = ECORE_ETH_VF_NUM_MAC_FILTERS;
 277         p_resc->num_vlan_filters = ECORE_ETH_VF_NUM_VLAN_FILTERS;
 278         p_resc->num_cids = ECORE_ETH_VF_DEFAULT_NUM_CIDS;
 279
 280         OSAL_MEMSET(&vf_sw_info, 0, sizeof(vf_sw_info));
 281         OSAL_VF_FILL_ACQUIRE_RESC_REQ(p_hwfn, &req->resc_request, &vf_sw_info);
 282
 283         req->vfdev_info.os_type = vf_sw_info.os_type;
 284         req->vfdev_info.driver_version = vf_sw_info.driver_version;
 285         req->vfdev_info.fw_major = FW_MAJOR_VERSION;
 286         req->vfdev_info.fw_minor = FW_MINOR_VERSION;
 287         req->vfdev_info.fw_revision = FW_REVISION_VERSION;
 288         req->vfdev_info.fw_engineering = FW_ENGINEERING_VERSION;
 289         req->vfdev_info.eth_fp_hsi_major = ETH_HSI_VER_MAJOR;
 290         req->vfdev_info.eth_fp_hsi_minor = ETH_HSI_VER_MINOR;
 291
 292         /* Fill capability field with any non-deprecated config we support */
 293         req->vfdev_info.capabilities |= VFPF_ACQUIRE_CAP_100G;
 294
 295         /* If we've mapped the doorbell bar, try using queue qids */
 296         if (p_iov->b_doorbell_bar)
 297                 req->vfdev_info.capabilities |= VFPF_ACQUIRE_CAP_PHYSICAL_BAR |
 298                                                 VFPF_ACQUIRE_CAP_QUEUE_QIDS;
 299
 300         /* pf 2 vf bulletin board address */
 301         req->bulletin_addr = p_iov->bulletin.phys;
 302         req->bulletin_size = p_iov->bulletin.size;
 303
 304         /* add list termination tlv */
 305         ecore_add_tlv(&p_iov->offset,
 306                       CHANNEL_TLV_LIST_END,
 307                       sizeof(struct channel_list_end_tlv));
 308
 309         while (!resources_acquired) {
 310                 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 311                            "attempting to acquire resources\n");
 312
 313                 /* Clear response buffer, as this might be a re-send */
 314                 OSAL_MEMSET(p_iov->pf2vf_reply, 0,
 315                             sizeof(union pfvf_tlvs));
 316
 317                 /* send acquire request */
 318                 rc = ecore_send_msg2pf(p_hwfn,
 319                                        &resp->hdr.status, sizeof(*resp));
 320                 if (rc != ECORE_SUCCESS)
 321                         goto exit;
 322
 323                 /* copy acquire response from buffer to p_hwfn */
 324                 OSAL_MEMCPY(&p_iov->acquire_resp,
 325                             resp, sizeof(p_iov->acquire_resp));
 326
 327                 attempts++;
 328
 329                 if (resp->hdr.status == PFVF_STATUS_SUCCESS) {
 330                         /* PF agrees to allocate our resources */
 331                         if (!(resp->pfdev_info.capabilities &
 332                               PFVF_ACQUIRE_CAP_POST_FW_OVERRIDE)) {
 333                                 /* It's possible legacy PF mistakenly accepted;
 334                                  * but we don't care - simply mark it as
 335                                  * legacy and continue.
 336                                  */
 337                                 req->vfdev_info.capabilities |=
 338                                         VFPF_ACQUIRE_CAP_PRE_FP_HSI;
 339                         }
 340                         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 341                                    "resources acquired\n");
 342                         resources_acquired = true;
 343                 } /* PF refuses to allocate our resources */
 344                 else if (resp->hdr.status == PFVF_STATUS_NO_RESOURCE &&
 345                          attempts < VF_ACQUIRE_THRESH) {
 346                         ecore_vf_pf_acquire_reduce_resc(p_hwfn, p_resc,
 347                                                         &resp->resc);
 348
 349                 } else if (resp->hdr.status == PFVF_STATUS_NOT_SUPPORTED) {
 350                         if (pfdev_info->major_fp_hsi &&
 351                             (pfdev_info->major_fp_hsi != ETH_HSI_VER_MAJOR)) {
 352                                 DP_NOTICE(p_hwfn, false,
 353                                           "PF uses an incompatible fastpath HSI"
 354                                           " %02x.%02x [VF requires %02x.%02x]."
 355                                           " Please change to a VF driver using"
 356                                           " %02x.xx.\n",
 357                                           pfdev_info->major_fp_hsi,
 358                                           pfdev_info->minor_fp_hsi,
 359                                           ETH_HSI_VER_MAJOR, ETH_HSI_VER_MINOR,
 360                                           pfdev_info->major_fp_hsi);
 361                                 rc = ECORE_INVAL;
 362                                 goto exit;
 363                         }
 364
 365                         if (!pfdev_info->major_fp_hsi) {
 366                                 if (req->vfdev_info.capabilities &
 367                                     VFPF_ACQUIRE_CAP_PRE_FP_HSI) {
 368                                         DP_NOTICE(p_hwfn, false,
 369                                                   "PF uses very old drivers."
 370                                                   " Please change to a VF"
 371                                                   " driver using no later than"
 372                                                   " 8.8.x.x.\n");
 373                                         rc = ECORE_INVAL;
 374                                         goto exit;
 375                                 } else {
 376                                         DP_INFO(p_hwfn,
 377                                                 "PF is old - try re-acquire to"
 378                                                 " see if it supports FW-version"
 379                                                 " override\n");
 380                                         req->vfdev_info.capabilities |=
 381                                                 VFPF_ACQUIRE_CAP_PRE_FP_HSI;
 382                                         continue;
 383                                 }
 384                         }
 385
 386                         /* If PF/VF are using same Major, PF must have had
 387                          * it's reasons. Simply fail.
 388                          */
 389                         DP_NOTICE(p_hwfn, false,
 390                                   "PF rejected acquisition by VF\n");
 391                         rc = ECORE_INVAL;
 392                         goto exit;
 393                 } else {
 394                         DP_ERR(p_hwfn,
 395                                "PF returned err %d to VF acquisition request\n",
 396                                resp->hdr.status);
 397                         rc = ECORE_AGAIN;
 398                         goto exit;
 399                 }
 400         }
 401
 402         /* Mark the PF as legacy, if needed */
 403         if (req->vfdev_info.capabilities &
 404             VFPF_ACQUIRE_CAP_PRE_FP_HSI)
 405                 p_iov->b_pre_fp_hsi = true;
 406
 407         /* In case PF doesn't support multi-queue Tx, update the number of
 408          * CIDs to reflect the number of queues [older PFs didn't fill that
 409          * field].
 410          */
 411         if (!(resp->pfdev_info.capabilities &
 412               PFVF_ACQUIRE_CAP_QUEUE_QIDS))
 413                 resp->resc.num_cids = resp->resc.num_rxqs +
 414                                       resp->resc.num_txqs;
 415
 416         rc = OSAL_VF_UPDATE_ACQUIRE_RESC_RESP(p_hwfn, &resp->resc);
 417         if (rc) {
 418                 DP_NOTICE(p_hwfn, true,
 419                           "VF_UPDATE_ACQUIRE_RESC_RESP Failed:"
 420                           " status = 0x%x.\n",
 421                           rc);
 422                 rc = ECORE_AGAIN;
 423                 goto exit;
 424         }
 425
 426         /* Update bulletin board size with response from PF */
 427         p_iov->bulletin.size = resp->bulletin_size;
 428
 429         /* get HW info */
 430         p_hwfn->p_dev->type = resp->pfdev_info.dev_type;
 431         p_hwfn->p_dev->chip_rev = (u8)resp->pfdev_info.chip_rev;
 432
 433         DP_INFO(p_hwfn, "Chip details - %s%d\n",
 434                 ECORE_IS_BB(p_hwfn->p_dev) ? "BB" : "AH",
 435                 CHIP_REV_IS_A0(p_hwfn->p_dev) ? 0 : 1);
 436
 437         p_hwfn->p_dev->chip_num = pfdev_info->chip_num & 0xffff;
 438
 439         /* Learn of the possibility of CMT */
 440         if (IS_LEAD_HWFN(p_hwfn)) {
 441                 if (resp->pfdev_info.capabilities & PFVF_ACQUIRE_CAP_100G) {
 442                         DP_INFO(p_hwfn, "100g VF\n");
 443                         p_hwfn->p_dev->num_hwfns = 2;
 444                 }
 445         }
 446
 447         /* @DPDK */
 448         if ((~p_iov->b_pre_fp_hsi &
 449             ETH_HSI_VER_MINOR) &&
 450             (resp->pfdev_info.minor_fp_hsi < ETH_HSI_VER_MINOR))
 451                 DP_INFO(p_hwfn,
 452                         "PF is using older fastpath HSI;"
 453                         " %02x.%02x is configured\n",
 454                         ETH_HSI_VER_MAJOR,
 455                         resp->pfdev_info.minor_fp_hsi);
 456
 457 exit:
 458         ecore_vf_pf_req_end(p_hwfn, rc);
 459
 460         return rc;
 461 }
 462
 463 u32 ecore_vf_hw_bar_size(struct ecore_hwfn *p_hwfn,
 464                          enum BAR_ID bar_id)
 465 {
 466         u32 bar_size;
 467
 468         /* Regview size is fixed */
 469         if (bar_id == BAR_ID_0)
 470                 return 1 << 17;
 471
 472         /* Doorbell is received from PF */
 473         bar_size = p_hwfn->vf_iov_info->acquire_resp.pfdev_info.bar_size;
 474         if (bar_size)
 475                 return 1 << bar_size;
 476         return 0;
 477 }
 478
 479 enum _ecore_status_t ecore_vf_hw_prepare(struct ecore_hwfn *p_hwfn)
 480 {
 481         struct ecore_hwfn *p_lead = ECORE_LEADING_HWFN(p_hwfn->p_dev);
 482         struct ecore_vf_iov *p_iov;
 483         u32 reg;
 484         enum _ecore_status_t rc;
 485
 486         /* Set number of hwfns - might be overridden once leading hwfn learns
 487          * actual configuration from PF.
 488          */
 489         if (IS_LEAD_HWFN(p_hwfn))
 490                 p_hwfn->p_dev->num_hwfns = 1;
 491
 492         reg = PXP_VF_BAR0_ME_OPAQUE_ADDRESS;
 493         p_hwfn->hw_info.opaque_fid = (u16)REG_RD(p_hwfn, reg);
 494
 495         reg = PXP_VF_BAR0_ME_CONCRETE_ADDRESS;
 496         p_hwfn->hw_info.concrete_fid = REG_RD(p_hwfn, reg);
 497
 498         /* Allocate vf sriov info */
 499         p_iov = OSAL_ZALLOC(p_hwfn->p_dev, GFP_KERNEL, sizeof(*p_iov));
 500         if (!p_iov) {
 501                 DP_NOTICE(p_hwfn, true,
 502                           "Failed to allocate `struct ecore_sriov'\n");
 503                 return ECORE_NOMEM;
 504         }
 505
 506         /* Doorbells are tricky; Upper-layer has alreday set the hwfn doorbell
 507          * value, but there are several incompatibily scenarios where that
 508          * would be incorrect and we'd need to override it.
 509          */
 510         if (p_hwfn->doorbells == OSAL_NULL) {
 511                 p_hwfn->doorbells = (u8 OSAL_IOMEM *)p_hwfn->regview +
 512                                                      PXP_VF_BAR0_START_DQ;
 513         } else if (p_hwfn == p_lead) {
 514                 /* For leading hw-function, value is always correct, but need
 515                  * to handle scenario where legacy PF would not support 100g
 516                  * mapped bars later.
 517                  */
 518                 p_iov->b_doorbell_bar = true;
 519         } else {
 520                 /* here, value would be correct ONLY if the leading hwfn
 521                  * received indication that mapped-bars are supported.
 522                  */
 523                 if (p_lead->vf_iov_info->b_doorbell_bar)
 524                         p_iov->b_doorbell_bar = true;
 525                 else
 526                         p_hwfn->doorbells = (u8 OSAL_IOMEM *)
 527                                             p_hwfn->regview +
 528                                             PXP_VF_BAR0_START_DQ;
 529         }
 530
 531         /* Allocate vf2pf msg */
 532         p_iov->vf2pf_request = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev,
 533                                                          &p_iov->
 534                                                          vf2pf_request_phys,
 535                                                          sizeof(union
 536                                                                 vfpf_tlvs));
 537         if (!p_iov->vf2pf_request) {
 538                 DP_NOTICE(p_hwfn, true,
 539                          "Failed to allocate `vf2pf_request' DMA memory\n");
 540                 goto free_p_iov;
 541         }
 542
 543         p_iov->pf2vf_reply = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev,
 544                                                        &p_iov->
 545                                                        pf2vf_reply_phys,
 546                                                        sizeof(union pfvf_tlvs));
 547         if (!p_iov->pf2vf_reply) {
 548                 DP_NOTICE(p_hwfn, true,
 549                           "Failed to allocate `pf2vf_reply' DMA memory\n");
 550                 goto free_vf2pf_request;
 551         }
 552
 553         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 554                    "VF's Request mailbox [%p virt 0x%lx phys], "
 555                    "Response mailbox [%p virt 0x%lx phys]\n",
 556                    p_iov->vf2pf_request,
 557                    (unsigned long)p_iov->vf2pf_request_phys,
 558                    p_iov->pf2vf_reply,
 559                    (unsigned long)p_iov->pf2vf_reply_phys);
 560
 561         /* Allocate Bulletin board */
 562         p_iov->bulletin.size = sizeof(struct ecore_bulletin_content);
 563         p_iov->bulletin.p_virt = OSAL_DMA_ALLOC_COHERENT(p_hwfn->p_dev,
 564                                                            &p_iov->bulletin.
 565                                                            phys,
 566                                                            p_iov->bulletin.
 567                                                            size);
 568         if (!p_iov->bulletin.p_virt) {
 569                 DP_NOTICE(p_hwfn, false, "Failed to alloc bulletin memory\n");
 570                 goto free_pf2vf_reply;
 571         }
 572         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 573                    "VF's bulletin Board [%p virt 0x%lx phys 0x%08x bytes]\n",
 574                    p_iov->bulletin.p_virt, (unsigned long)p_iov->bulletin.phys,
 575                    p_iov->bulletin.size);
 576
 577 #ifdef CONFIG_ECORE_LOCK_ALLOC
 578         if (OSAL_MUTEX_ALLOC(p_hwfn, &p_iov->mutex)) {
 579                 DP_NOTICE(p_hwfn, false, "Failed to allocate p_iov->mutex\n");
 580                 goto free_bulletin_mem;
 581         }
 582 #endif
 583         OSAL_MUTEX_INIT(&p_iov->mutex);
 584
 585         p_hwfn->vf_iov_info = p_iov;
 586
 587         p_hwfn->hw_info.personality = ECORE_PCI_ETH;
 588
 589         rc = ecore_vf_pf_acquire(p_hwfn);
 590
 591         /* If VF is 100g using a mapped bar and PF is too old to support that,
 592          * acquisition would succeed - but the VF would have no way knowing
 593          * the size of the doorbell bar configured in HW and thus will not
 594          * know how to split it for 2nd hw-function.
 595          * In this case we re-try without the indication of the mapped
 596          * doorbell.
 597          */
 598         if (rc == ECORE_SUCCESS &&
 599             p_iov->b_doorbell_bar &&
 600             !ecore_vf_hw_bar_size(p_hwfn, BAR_ID_1) &&
 601             ECORE_IS_CMT(p_hwfn->p_dev)) {
 602                 rc = _ecore_vf_pf_release(p_hwfn, false);
 603                 if (rc != ECORE_SUCCESS)
 604                         return rc;
 605
 606                 p_iov->b_doorbell_bar = false;
 607                 p_hwfn->doorbells = (u8 OSAL_IOMEM *)p_hwfn->regview +
 608                                                      PXP_VF_BAR0_START_DQ;
 609                 rc = ecore_vf_pf_acquire(p_hwfn);
 610         }
 611
 612         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 613                    "Regview [%p], Doorbell [%p], Device-doorbell [%p]\n",
 614                    p_hwfn->regview, p_hwfn->doorbells,
 615                    p_hwfn->p_dev->doorbells);
 616
 617         return rc;
 618
 619 #ifdef CONFIG_ECORE_LOCK_ALLOC
 620 free_bulletin_mem:
 621         OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev, p_iov->bulletin.p_virt,
 622                                p_iov->bulletin.phys,
 623                                p_iov->bulletin.size);
 624 #endif
 625 free_pf2vf_reply:
 626         OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev, p_iov->pf2vf_reply,
 627                                p_iov->pf2vf_reply_phys,
 628                                sizeof(union pfvf_tlvs));
 629 free_vf2pf_request:
 630         OSAL_DMA_FREE_COHERENT(p_hwfn->p_dev, p_iov->vf2pf_request,
 631                                p_iov->vf2pf_request_phys,
 632                                sizeof(union vfpf_tlvs));
 633 free_p_iov:
 634         OSAL_FREE(p_hwfn->p_dev, p_iov);
 635
 636         return ECORE_NOMEM;
 637 }
 638
 639 #define TSTORM_QZONE_START   PXP_VF_BAR0_START_SDM_ZONE_A
 640 #define MSTORM_QZONE_START(dev)   (TSTORM_QZONE_START + \
 641                                    (TSTORM_QZONE_SIZE * NUM_OF_L2_QUEUES(dev)))
 642
 643 /* @DPDK - changed enum ecore_tunn_clss to enum ecore_tunn_mode */
 644 static void
 645 __ecore_vf_prep_tunn_req_tlv(struct vfpf_update_tunn_param_tlv *p_req,
 646                              struct ecore_tunn_update_type *p_src,
 647                              enum ecore_tunn_mode mask, u8 *p_cls)
 648 {
 649         if (p_src->b_update_mode) {
 650                 p_req->tun_mode_update_mask |= (1 << mask);
 651
 652                 if (p_src->b_mode_enabled)
 653                         p_req->tunn_mode |= (1 << mask);
 654         }
 655
 656         *p_cls = p_src->tun_cls;
 657 }
 658
 659 /* @DPDK - changed enum ecore_tunn_clss to enum ecore_tunn_mode */
 660 static void
 661 ecore_vf_prep_tunn_req_tlv(struct vfpf_update_tunn_param_tlv *p_req,
 662                            struct ecore_tunn_update_type *p_src,
 663                            enum ecore_tunn_mode mask, u8 *p_cls,
 664                            struct ecore_tunn_update_udp_port *p_port,
 665                            u8 *p_update_port, u16 *p_udp_port)
 666 {
 667         if (p_port->b_update_port) {
 668                 *p_update_port = 1;
 669                 *p_udp_port = p_port->port;
 670         }
 671
 672         __ecore_vf_prep_tunn_req_tlv(p_req, p_src, mask, p_cls);
 673 }
 674
 675 void ecore_vf_set_vf_start_tunn_update_param(struct ecore_tunnel_info *p_tun)
 676 {
 677         if (p_tun->vxlan.b_mode_enabled)
 678                 p_tun->vxlan.b_update_mode = true;
 679         if (p_tun->l2_geneve.b_mode_enabled)
 680                 p_tun->l2_geneve.b_update_mode = true;
 681         if (p_tun->ip_geneve.b_mode_enabled)
 682                 p_tun->ip_geneve.b_update_mode = true;
 683         if (p_tun->l2_gre.b_mode_enabled)
 684                 p_tun->l2_gre.b_update_mode = true;
 685         if (p_tun->ip_gre.b_mode_enabled)
 686                 p_tun->ip_gre.b_update_mode = true;
 687
 688         p_tun->b_update_rx_cls = true;
 689         p_tun->b_update_tx_cls = true;
 690 }
 691
 692 static void
 693 __ecore_vf_update_tunn_param(struct ecore_tunn_update_type *p_tun,
 694                              u16 feature_mask, u8 tunn_mode, u8 tunn_cls,
 695                              enum ecore_tunn_mode val)
 696 {
 697         if (feature_mask & (1 << val)) {
 698                 p_tun->b_mode_enabled = tunn_mode;
 699                 p_tun->tun_cls = tunn_cls;
 700         } else {
 701                 p_tun->b_mode_enabled = false;
 702         }
 703 }
 704
 705 static void
 706 ecore_vf_update_tunn_param(struct ecore_hwfn *p_hwfn,
 707                            struct ecore_tunnel_info *p_tun,
 708                            struct pfvf_update_tunn_param_tlv *p_resp)
 709 {
 710         /* Update mode and classes provided by PF */
 711         u16 feat_mask = p_resp->tunn_feature_mask;
 712
 713         __ecore_vf_update_tunn_param(&p_tun->vxlan, feat_mask,
 714                                      p_resp->vxlan_mode, p_resp->vxlan_clss,
 715                                      ECORE_MODE_VXLAN_TUNN);
 716         __ecore_vf_update_tunn_param(&p_tun->l2_geneve, feat_mask,
 717                                      p_resp->l2geneve_mode,
 718                                      p_resp->l2geneve_clss,
 719                                      ECORE_MODE_L2GENEVE_TUNN);
 720         __ecore_vf_update_tunn_param(&p_tun->ip_geneve, feat_mask,
 721                                      p_resp->ipgeneve_mode,
 722                                      p_resp->ipgeneve_clss,
 723                                      ECORE_MODE_IPGENEVE_TUNN);
 724         __ecore_vf_update_tunn_param(&p_tun->l2_gre, feat_mask,
 725                                      p_resp->l2gre_mode, p_resp->l2gre_clss,
 726                                      ECORE_MODE_L2GRE_TUNN);
 727         __ecore_vf_update_tunn_param(&p_tun->ip_gre, feat_mask,
 728                                      p_resp->ipgre_mode, p_resp->ipgre_clss,
 729                                      ECORE_MODE_IPGRE_TUNN);
 730         p_tun->geneve_port.port = p_resp->geneve_udp_port;
 731         p_tun->vxlan_port.port = p_resp->vxlan_udp_port;
 732
 733         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 734                    "tunn mode: vxlan=0x%x, l2geneve=0x%x, ipgeneve=0x%x, l2gre=0x%x, ipgre=0x%x",
 735                    p_tun->vxlan.b_mode_enabled, p_tun->l2_geneve.b_mode_enabled,
 736                    p_tun->ip_geneve.b_mode_enabled,
 737                    p_tun->l2_gre.b_mode_enabled,
 738                    p_tun->ip_gre.b_mode_enabled);
 739 }
 740
 741 enum _ecore_status_t
 742 ecore_vf_pf_tunnel_param_update(struct ecore_hwfn *p_hwfn,
 743                                 struct ecore_tunnel_info *p_src)
 744 {
 745         struct ecore_tunnel_info *p_tun = &p_hwfn->p_dev->tunnel;
 746         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
 747         struct pfvf_update_tunn_param_tlv *p_resp;
 748         struct vfpf_update_tunn_param_tlv *p_req;
 749         enum _ecore_status_t rc;
 750
 751         p_req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_UPDATE_TUNN_PARAM,
 752                                  sizeof(*p_req));
 753
 754         if (p_src->b_update_rx_cls && p_src->b_update_tx_cls)
 755                 p_req->update_tun_cls = 1;
 756
 757         ecore_vf_prep_tunn_req_tlv(p_req, &p_src->vxlan, ECORE_MODE_VXLAN_TUNN,
 758                                    &p_req->vxlan_clss, &p_src->vxlan_port,
 759                                    &p_req->update_vxlan_port,
 760                                    &p_req->vxlan_port);
 761         ecore_vf_prep_tunn_req_tlv(p_req, &p_src->l2_geneve,
 762                                    ECORE_MODE_L2GENEVE_TUNN,
 763                                    &p_req->l2geneve_clss, &p_src->geneve_port,
 764                                    &p_req->update_geneve_port,
 765                                    &p_req->geneve_port);
 766         __ecore_vf_prep_tunn_req_tlv(p_req, &p_src->ip_geneve,
 767                                      ECORE_MODE_IPGENEVE_TUNN,
 768                                      &p_req->ipgeneve_clss);
 769         __ecore_vf_prep_tunn_req_tlv(p_req, &p_src->l2_gre,
 770                                      ECORE_MODE_L2GRE_TUNN, &p_req->l2gre_clss);
 771         __ecore_vf_prep_tunn_req_tlv(p_req, &p_src->ip_gre,
 772                                      ECORE_MODE_IPGRE_TUNN, &p_req->ipgre_clss);
 773
 774         /* add list termination tlv */
 775         ecore_add_tlv(&p_iov->offset,
 776                       CHANNEL_TLV_LIST_END,
 777                       sizeof(struct channel_list_end_tlv));
 778
 779         p_resp = &p_iov->pf2vf_reply->tunn_param_resp;
 780         rc = ecore_send_msg2pf(p_hwfn, &p_resp->hdr.status, sizeof(*p_resp));
 781
 782         if (rc)
 783                 goto exit;
 784
 785         if (p_resp->hdr.status != PFVF_STATUS_SUCCESS) {
 786                 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 787                            "Failed to update tunnel parameters\n");
 788                 rc = ECORE_INVAL;
 789         }
 790
 791         ecore_vf_update_tunn_param(p_hwfn, p_tun, p_resp);
 792 exit:
 793         ecore_vf_pf_req_end(p_hwfn, rc);
 794         return rc;
 795 }
 796
 797 enum _ecore_status_t
 798 ecore_vf_pf_rxq_start(struct ecore_hwfn *p_hwfn,
 799                       struct ecore_queue_cid *p_cid,
 800                       u16 bd_max_bytes,
 801                       dma_addr_t bd_chain_phys_addr,
 802                       dma_addr_t cqe_pbl_addr,
 803                       u16 cqe_pbl_size,
 804                       void OSAL_IOMEM **pp_prod)
 805 {
 806         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
 807         struct pfvf_start_queue_resp_tlv *resp;
 808         struct vfpf_start_rxq_tlv *req;
 809         u16 rx_qid = p_cid->rel.queue_id;
 810         enum _ecore_status_t rc;
 811
 812         /* clear mailbox and prep first tlv */
 813         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_START_RXQ, sizeof(*req));
 814
 815         req->rx_qid = rx_qid;
 816         req->cqe_pbl_addr = cqe_pbl_addr;
 817         req->cqe_pbl_size = cqe_pbl_size;
 818         req->rxq_addr = bd_chain_phys_addr;
 819         req->hw_sb = p_cid->sb_igu_id;
 820         req->sb_index = p_cid->sb_idx;
 821         req->bd_max_bytes = bd_max_bytes;
 822         req->stat_id = -1; /* Keep initialized, for future compatibility */
 823
 824         /* If PF is legacy, we'll need to calculate producers ourselves
 825          * as well as clean them.
 826          */
 827         if (p_iov->b_pre_fp_hsi) {
 828                 u8 hw_qid = p_iov->acquire_resp.resc.hw_qid[rx_qid];
 829                 u32 init_prod_val = 0;
 830
 831                 *pp_prod = (u8 OSAL_IOMEM *)
 832                            p_hwfn->regview +
 833                            MSTORM_QZONE_START(p_hwfn->p_dev) +
 834                            (hw_qid) * MSTORM_QZONE_SIZE;
 835
 836                 /* Init the rcq, rx bd and rx sge (if valid) producers to 0 */
 837                 __internal_ram_wr(p_hwfn, *pp_prod, sizeof(u32),
 838                                   (u32 *)(&init_prod_val));
 839         }
 840
 841         ecore_vf_pf_add_qid(p_hwfn, p_cid);
 842
 843         /* add list termination tlv */
 844         ecore_add_tlv(&p_iov->offset,
 845                       CHANNEL_TLV_LIST_END,
 846                       sizeof(struct channel_list_end_tlv));
 847
 848         resp = &p_iov->pf2vf_reply->queue_start;
 849         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
 850         if (rc)
 851                 goto exit;
 852
 853         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
 854                 rc = ECORE_INVAL;
 855                 goto exit;
 856         }
 857
 858         /* Learn the address of the producer from the response */
 859         if (!p_iov->b_pre_fp_hsi) {
 860                 u32 init_prod_val = 0;
 861
 862                 *pp_prod = (u8 OSAL_IOMEM *)p_hwfn->regview + resp->offset;
 863                 DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 864                            "Rxq[0x%02x]: producer at %p [offset 0x%08x]\n",
 865                            rx_qid, *pp_prod, resp->offset);
 866
 867                 /* Init the rcq, rx bd and rx sge (if valid) producers to 0.
 868                  * It was actually the PF's responsibility, but since some
 869                  * old PFs might fail to do so, we do this as well.
 870                  */
 871                 OSAL_BUILD_BUG_ON(ETH_HSI_VER_MAJOR != 3);
 872                 __internal_ram_wr(p_hwfn, *pp_prod, sizeof(u32),
 873                                   (u32 *)&init_prod_val);
 874         }
 875
 876 exit:
 877         ecore_vf_pf_req_end(p_hwfn, rc);
 878
 879         return rc;
 880 }
 881
 882 enum _ecore_status_t ecore_vf_pf_rxq_stop(struct ecore_hwfn *p_hwfn,
 883                                           struct ecore_queue_cid *p_cid,
 884                                           bool cqe_completion)
 885 {
 886         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
 887         struct vfpf_stop_rxqs_tlv *req;
 888         struct pfvf_def_resp_tlv *resp;
 889         enum _ecore_status_t rc;
 890
 891         /* clear mailbox and prep first tlv */
 892         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_STOP_RXQS, sizeof(*req));
 893
 894         req->rx_qid = p_cid->rel.queue_id;
 895         req->num_rxqs = 1;
 896         req->cqe_completion = cqe_completion;
 897
 898         ecore_vf_pf_add_qid(p_hwfn, p_cid);
 899
 900         /* add list termination tlv */
 901         ecore_add_tlv(&p_iov->offset,
 902                       CHANNEL_TLV_LIST_END,
 903                       sizeof(struct channel_list_end_tlv));
 904
 905         resp = &p_iov->pf2vf_reply->default_resp;
 906         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
 907         if (rc)
 908                 goto exit;
 909
 910         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
 911                 rc = ECORE_INVAL;
 912                 goto exit;
 913         }
 914
 915 exit:
 916         ecore_vf_pf_req_end(p_hwfn, rc);
 917
 918         return rc;
 919 }
 920
 921 enum _ecore_status_t
 922 ecore_vf_pf_txq_start(struct ecore_hwfn *p_hwfn,
 923                       struct ecore_queue_cid *p_cid,
 924                       dma_addr_t pbl_addr, u16 pbl_size,
 925                       void OSAL_IOMEM **pp_doorbell)
 926 {
 927         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
 928         struct pfvf_start_queue_resp_tlv *resp;
 929         struct vfpf_start_txq_tlv *req;
 930         u16 qid = p_cid->rel.queue_id;
 931         enum _ecore_status_t rc;
 932
 933         /* clear mailbox and prep first tlv */
 934         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_START_TXQ, sizeof(*req));
 935
 936         req->tx_qid = qid;
 937
 938         /* Tx */
 939         req->pbl_addr = pbl_addr;
 940         req->pbl_size = pbl_size;
 941         req->hw_sb = p_cid->sb_igu_id;
 942         req->sb_index = p_cid->sb_idx;
 943
 944         ecore_vf_pf_add_qid(p_hwfn, p_cid);
 945
 946         /* add list termination tlv */
 947         ecore_add_tlv(&p_iov->offset,
 948                       CHANNEL_TLV_LIST_END,
 949                       sizeof(struct channel_list_end_tlv));
 950
 951         resp  = &p_iov->pf2vf_reply->queue_start;
 952         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
 953         if (rc)
 954                 goto exit;
 955
 956         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
 957                 rc = ECORE_INVAL;
 958                 goto exit;
 959         }
 960
 961         /* Modern PFs provide the actual offsets, while legacy
 962          * provided only the queue id.
 963          */
 964         if (!p_iov->b_pre_fp_hsi) {
 965                 *pp_doorbell = (u8 OSAL_IOMEM *)p_hwfn->doorbells +
 966                                                 resp->offset;
 967         } else {
 968                 u8 cid = p_iov->acquire_resp.resc.cid[qid];
 969
 970                 *pp_doorbell = (u8 OSAL_IOMEM *)p_hwfn->doorbells +
 971                                                 DB_ADDR_VF(cid, DQ_DEMS_LEGACY);
 972         }
 973
 974         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
 975                    "Txq[0x%02x]: doorbell at %p [offset 0x%08x]\n",
 976                    qid, *pp_doorbell, resp->offset);
 977 exit:
 978         ecore_vf_pf_req_end(p_hwfn, rc);
 979
 980         return rc;
 981 }
 982
 983 enum _ecore_status_t ecore_vf_pf_txq_stop(struct ecore_hwfn *p_hwfn,
 984                                           struct ecore_queue_cid *p_cid)
 985 {
 986         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
 987         struct vfpf_stop_txqs_tlv *req;
 988         struct pfvf_def_resp_tlv *resp;
 989         enum _ecore_status_t rc;
 990
 991         /* clear mailbox and prep first tlv */
 992         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_STOP_TXQS, sizeof(*req));
 993
 994         req->tx_qid = p_cid->rel.queue_id;
 995         req->num_txqs = 1;
 996
 997         ecore_vf_pf_add_qid(p_hwfn, p_cid);
 998
 999         /* add list termination tlv */
1000         ecore_add_tlv(&p_iov->offset,
1001                       CHANNEL_TLV_LIST_END,
1002                       sizeof(struct channel_list_end_tlv));
1003
1004         resp = &p_iov->pf2vf_reply->default_resp;
1005         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1006         if (rc)
1007                 goto exit;
1008
1009         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
1010                 rc = ECORE_INVAL;
1011                 goto exit;
1012         }
1013
1014 exit:
1015         ecore_vf_pf_req_end(p_hwfn, rc);
1016
1017         return rc;
1018 }
1019
1020 enum _ecore_status_t ecore_vf_pf_rxqs_update(struct ecore_hwfn *p_hwfn,
1021                                              struct ecore_queue_cid **pp_cid,
1022                                              u8 num_rxqs,
1023                                              u8 comp_cqe_flg,
1024                                              u8 comp_event_flg)
1025 {
1026         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1027         struct pfvf_def_resp_tlv *resp = &p_iov->pf2vf_reply->default_resp;
1028         struct vfpf_update_rxq_tlv *req;
1029         enum _ecore_status_t rc;
1030
1031         /* Starting with CHANNEL_TLV_QID and the need for additional queue
1032          * information, this API stopped supporting multiple rxqs.
1033          * TODO - remove this and change the API to accept a single queue-cid
1034          * in a follow-up patch.
1035          */
1036         if (num_rxqs != 1) {
1037                 DP_NOTICE(p_hwfn, true,
1038                           "VFs can no longer update more than a single queue\n");
1039                 return ECORE_INVAL;
1040         }
1041
1042         /* clear mailbox and prep first tlv */
1043         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_UPDATE_RXQ, sizeof(*req));
1044
1045         req->rx_qid = (*pp_cid)->rel.queue_id;
1046         req->num_rxqs = 1;
1047
1048         if (comp_cqe_flg)
1049                 req->flags |= VFPF_RXQ_UPD_COMPLETE_CQE_FLAG;
1050         if (comp_event_flg)
1051                 req->flags |= VFPF_RXQ_UPD_COMPLETE_EVENT_FLAG;
1052
1053         ecore_vf_pf_add_qid(p_hwfn, *pp_cid);
1054
1055         /* add list termination tlv */
1056         ecore_add_tlv(&p_iov->offset,
1057                       CHANNEL_TLV_LIST_END,
1058                       sizeof(struct channel_list_end_tlv));
1059
1060         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1061         if (rc)
1062                 goto exit;
1063
1064         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
1065                 rc = ECORE_INVAL;
1066                 goto exit;
1067         }
1068
1069 exit:
1070         ecore_vf_pf_req_end(p_hwfn, rc);
1071         return rc;
1072 }
1073
1074 enum _ecore_status_t
1075 ecore_vf_pf_vport_start(struct ecore_hwfn *p_hwfn, u8 vport_id,
1076                         u16 mtu, u8 inner_vlan_removal,
1077                         enum ecore_tpa_mode tpa_mode, u8 max_buffers_per_cqe,
1078                         u8 only_untagged)
1079 {
1080         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1081         struct vfpf_vport_start_tlv *req;
1082         struct pfvf_def_resp_tlv *resp;
1083         enum _ecore_status_t rc;
1084         int i;
1085
1086         /* clear mailbox and prep first tlv */
1087         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_VPORT_START, sizeof(*req));
1088
1089         req->mtu = mtu;
1090         req->vport_id = vport_id;
1091         req->inner_vlan_removal = inner_vlan_removal;
1092         req->tpa_mode = tpa_mode;
1093         req->max_buffers_per_cqe = max_buffers_per_cqe;
1094         req->only_untagged = only_untagged;
1095
1096         /* status blocks */
1097         for (i = 0; i < p_hwfn->vf_iov_info->acquire_resp.resc.num_sbs; i++) {
1098                 struct ecore_sb_info *p_sb = p_hwfn->vf_iov_info->sbs_info[i];
1099
1100                 if (p_sb)
1101                         req->sb_addr[i] = p_sb->sb_phys;
1102         }
1103
1104         /* add list termination tlv */
1105         ecore_add_tlv(&p_iov->offset,
1106                       CHANNEL_TLV_LIST_END,
1107                       sizeof(struct channel_list_end_tlv));
1108
1109         resp  = &p_iov->pf2vf_reply->default_resp;
1110         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1111         if (rc)
1112                 goto exit;
1113
1114         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
1115                 rc = ECORE_INVAL;
1116                 goto exit;
1117         }
1118
1119 exit:
1120         ecore_vf_pf_req_end(p_hwfn, rc);
1121
1122         return rc;
1123 }
1124
1125 enum _ecore_status_t ecore_vf_pf_vport_stop(struct ecore_hwfn *p_hwfn)
1126 {
1127         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1128         struct pfvf_def_resp_tlv *resp = &p_iov->pf2vf_reply->default_resp;
1129         enum _ecore_status_t rc;
1130
1131         /* clear mailbox and prep first tlv */
1132         ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_VPORT_TEARDOWN,
1133                          sizeof(struct vfpf_first_tlv));
1134
1135         /* add list termination tlv */
1136         ecore_add_tlv(&p_iov->offset,
1137                       CHANNEL_TLV_LIST_END,
1138                       sizeof(struct channel_list_end_tlv));
1139
1140         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1141         if (rc)
1142                 goto exit;
1143
1144         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
1145                 rc = ECORE_INVAL;
1146                 goto exit;
1147         }
1148
1149 exit:
1150         ecore_vf_pf_req_end(p_hwfn, rc);
1151
1152         return rc;
1153 }
1154
1155 static bool
1156 ecore_vf_handle_vp_update_is_needed(struct ecore_hwfn *p_hwfn,
1157                                     struct ecore_sp_vport_update_params *p_data,
1158                                     u16 tlv)
1159 {
1160         switch (tlv) {
1161         case CHANNEL_TLV_VPORT_UPDATE_ACTIVATE:
1162                 return !!(p_data->update_vport_active_rx_flg ||
1163                           p_data->update_vport_active_tx_flg);
1164         case CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH:
1165 #ifndef ASIC_ONLY
1166                 /* FPGA doesn't have PVFC and so can't support tx-switching */
1167                 return !!(p_data->update_tx_switching_flg &&
1168                           !CHIP_REV_IS_FPGA(p_hwfn->p_dev));
1169 #else
1170                 return !!p_data->update_tx_switching_flg;
1171 #endif
1172         case CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP:
1173                 return !!p_data->update_inner_vlan_removal_flg;
1174         case CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN:
1175                 return !!p_data->update_accept_any_vlan_flg;
1176         case CHANNEL_TLV_VPORT_UPDATE_MCAST:
1177                 return !!p_data->update_approx_mcast_flg;
1178         case CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM:
1179                 return !!(p_data->accept_flags.update_rx_mode_config ||
1180                           p_data->accept_flags.update_tx_mode_config);
1181         case CHANNEL_TLV_VPORT_UPDATE_RSS:
1182                 return !!p_data->rss_params;
1183         case CHANNEL_TLV_VPORT_UPDATE_SGE_TPA:
1184                 return !!p_data->sge_tpa_params;
1185         default:
1186                 DP_INFO(p_hwfn, "Unexpected vport-update TLV[%d] %s\n",
1187                         tlv, qede_ecore_channel_tlvs_string[tlv]);
1188                 return false;
1189         }
1190 }
1191
1192 static void
1193 ecore_vf_handle_vp_update_tlvs_resp(struct ecore_hwfn *p_hwfn,
1194                                     struct ecore_sp_vport_update_params *p_data)
1195 {
1196         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1197         struct pfvf_def_resp_tlv *p_resp;
1198         u16 tlv;
1199
1200         for (tlv = CHANNEL_TLV_VPORT_UPDATE_ACTIVATE;
1201              tlv < CHANNEL_TLV_VPORT_UPDATE_MAX;
1202              tlv++) {
1203                 if (!ecore_vf_handle_vp_update_is_needed(p_hwfn, p_data, tlv))
1204                         continue;
1205
1206                 p_resp = (struct pfvf_def_resp_tlv *)
1207                     ecore_iov_search_list_tlvs(p_hwfn, p_iov->pf2vf_reply, tlv);
1208                 if (p_resp && p_resp->hdr.status)
1209                         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
1210                                    "TLV[%d] type %s Configuration %s\n",
1211                                    tlv, qede_ecore_channel_tlvs_string[tlv],
1212                                    (p_resp && p_resp->hdr.status) ? "succeeded"
1213                                                                   : "failed");
1214         }
1215 }
1216
1217 enum _ecore_status_t
1218 ecore_vf_pf_vport_update(struct ecore_hwfn *p_hwfn,
1219                          struct ecore_sp_vport_update_params *p_params)
1220 {
1221         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1222         struct vfpf_vport_update_tlv *req;
1223         struct pfvf_def_resp_tlv *resp;
1224         u8 update_rx, update_tx;
1225         u32 resp_size = 0;
1226         u16 size, tlv;
1227         enum _ecore_status_t rc;
1228
1229         resp = &p_iov->pf2vf_reply->default_resp;
1230         resp_size = sizeof(*resp);
1231
1232         update_rx = p_params->update_vport_active_rx_flg;
1233         update_tx = p_params->update_vport_active_tx_flg;
1234
1235         /* clear mailbox and prep header tlv */
1236         ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_VPORT_UPDATE, sizeof(*req));
1237
1238         /* Prepare extended tlvs */
1239         if (update_rx || update_tx) {
1240                 struct vfpf_vport_update_activate_tlv *p_act_tlv;
1241
1242                 size = sizeof(struct vfpf_vport_update_activate_tlv);
1243                 p_act_tlv = ecore_add_tlv(&p_iov->offset,
1244                                           CHANNEL_TLV_VPORT_UPDATE_ACTIVATE,
1245                                           size);
1246                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1247
1248                 if (update_rx) {
1249                         p_act_tlv->update_rx = update_rx;
1250                         p_act_tlv->active_rx = p_params->vport_active_rx_flg;
1251                 }
1252
1253                 if (update_tx) {
1254                         p_act_tlv->update_tx = update_tx;
1255                         p_act_tlv->active_tx = p_params->vport_active_tx_flg;
1256                 }
1257         }
1258
1259         if (p_params->update_inner_vlan_removal_flg) {
1260                 struct vfpf_vport_update_vlan_strip_tlv *p_vlan_tlv;
1261
1262                 size = sizeof(struct vfpf_vport_update_vlan_strip_tlv);
1263                 p_vlan_tlv = ecore_add_tlv(&p_iov->offset,
1264                                            CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP,
1265                                            size);
1266                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1267
1268                 p_vlan_tlv->remove_vlan = p_params->inner_vlan_removal_flg;
1269         }
1270
1271         if (p_params->update_tx_switching_flg) {
1272                 struct vfpf_vport_update_tx_switch_tlv *p_tx_switch_tlv;
1273
1274                 size = sizeof(struct vfpf_vport_update_tx_switch_tlv);
1275                 tlv = CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH;
1276                 p_tx_switch_tlv = ecore_add_tlv(&p_iov->offset,
1277                                                 tlv, size);
1278                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1279
1280                 p_tx_switch_tlv->tx_switching = p_params->tx_switching_flg;
1281         }
1282
1283         if (p_params->update_approx_mcast_flg) {
1284                 struct vfpf_vport_update_mcast_bin_tlv *p_mcast_tlv;
1285
1286                 size = sizeof(struct vfpf_vport_update_mcast_bin_tlv);
1287                 p_mcast_tlv = ecore_add_tlv(&p_iov->offset,
1288                                             CHANNEL_TLV_VPORT_UPDATE_MCAST,
1289                                             size);
1290                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1291
1292                 OSAL_MEMCPY(p_mcast_tlv->bins, p_params->bins,
1293                             sizeof(u32) * ETH_MULTICAST_MAC_BINS_IN_REGS);
1294         }
1295
1296         update_rx = p_params->accept_flags.update_rx_mode_config;
1297         update_tx = p_params->accept_flags.update_tx_mode_config;
1298
1299         if (update_rx || update_tx) {
1300                 struct vfpf_vport_update_accept_param_tlv *p_accept_tlv;
1301
1302                 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM;
1303                 size = sizeof(struct vfpf_vport_update_accept_param_tlv);
1304                 p_accept_tlv = ecore_add_tlv(&p_iov->offset, tlv, size);
1305                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1306
1307                 if (update_rx) {
1308                         p_accept_tlv->update_rx_mode = update_rx;
1309                         p_accept_tlv->rx_accept_filter =
1310                             p_params->accept_flags.rx_accept_filter;
1311                 }
1312
1313                 if (update_tx) {
1314                         p_accept_tlv->update_tx_mode = update_tx;
1315                         p_accept_tlv->tx_accept_filter =
1316                             p_params->accept_flags.tx_accept_filter;
1317                 }
1318         }
1319
1320         if (p_params->rss_params) {
1321                 struct ecore_rss_params *rss_params = p_params->rss_params;
1322                 struct vfpf_vport_update_rss_tlv *p_rss_tlv;
1323                 int i, table_size;
1324
1325                 size = sizeof(struct vfpf_vport_update_rss_tlv);
1326                 p_rss_tlv = ecore_add_tlv(&p_iov->offset,
1327                                           CHANNEL_TLV_VPORT_UPDATE_RSS, size);
1328                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1329
1330                 if (rss_params->update_rss_config)
1331                         p_rss_tlv->update_rss_flags |=
1332                             VFPF_UPDATE_RSS_CONFIG_FLAG;
1333                 if (rss_params->update_rss_capabilities)
1334                         p_rss_tlv->update_rss_flags |=
1335                             VFPF_UPDATE_RSS_CAPS_FLAG;
1336                 if (rss_params->update_rss_ind_table)
1337                         p_rss_tlv->update_rss_flags |=
1338                             VFPF_UPDATE_RSS_IND_TABLE_FLAG;
1339                 if (rss_params->update_rss_key)
1340                         p_rss_tlv->update_rss_flags |= VFPF_UPDATE_RSS_KEY_FLAG;
1341
1342                 p_rss_tlv->rss_enable = rss_params->rss_enable;
1343                 p_rss_tlv->rss_caps = rss_params->rss_caps;
1344                 p_rss_tlv->rss_table_size_log = rss_params->rss_table_size_log;
1345
1346                 table_size = OSAL_MIN_T(int, T_ETH_INDIRECTION_TABLE_SIZE,
1347                                         1 << p_rss_tlv->rss_table_size_log);
1348                 for (i = 0; i < table_size; i++) {
1349                         struct ecore_queue_cid *p_queue;
1350
1351                         p_queue = rss_params->rss_ind_table[i];
1352                         p_rss_tlv->rss_ind_table[i] = p_queue->rel.queue_id;
1353                 }
1354
1355                 OSAL_MEMCPY(p_rss_tlv->rss_key, rss_params->rss_key,
1356                             sizeof(rss_params->rss_key));
1357         }
1358
1359         if (p_params->update_accept_any_vlan_flg) {
1360                 struct vfpf_vport_update_accept_any_vlan_tlv *p_any_vlan_tlv;
1361
1362                 size = sizeof(struct vfpf_vport_update_accept_any_vlan_tlv);
1363                 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN;
1364                 p_any_vlan_tlv = ecore_add_tlv(&p_iov->offset, tlv, size);
1365
1366                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1367                 p_any_vlan_tlv->accept_any_vlan = p_params->accept_any_vlan;
1368                 p_any_vlan_tlv->update_accept_any_vlan_flg =
1369                     p_params->update_accept_any_vlan_flg;
1370         }
1371
1372         if (p_params->sge_tpa_params) {
1373                 struct ecore_sge_tpa_params *sge_tpa_params;
1374                 struct vfpf_vport_update_sge_tpa_tlv *p_sge_tpa_tlv;
1375
1376                 sge_tpa_params = p_params->sge_tpa_params;
1377                 size = sizeof(struct vfpf_vport_update_sge_tpa_tlv);
1378                 p_sge_tpa_tlv = ecore_add_tlv(&p_iov->offset,
1379                                               CHANNEL_TLV_VPORT_UPDATE_SGE_TPA,
1380                                               size);
1381                 resp_size += sizeof(struct pfvf_def_resp_tlv);
1382
1383                 if (sge_tpa_params->update_tpa_en_flg)
1384                         p_sge_tpa_tlv->update_sge_tpa_flags |=
1385                             VFPF_UPDATE_TPA_EN_FLAG;
1386                 if (sge_tpa_params->update_tpa_param_flg)
1387                         p_sge_tpa_tlv->update_sge_tpa_flags |=
1388                             VFPF_UPDATE_TPA_PARAM_FLAG;
1389
1390                 if (sge_tpa_params->tpa_ipv4_en_flg)
1391                         p_sge_tpa_tlv->sge_tpa_flags |= VFPF_TPA_IPV4_EN_FLAG;
1392                 if (sge_tpa_params->tpa_ipv6_en_flg)
1393                         p_sge_tpa_tlv->sge_tpa_flags |= VFPF_TPA_IPV6_EN_FLAG;
1394                 if (sge_tpa_params->tpa_pkt_split_flg)
1395                         p_sge_tpa_tlv->sge_tpa_flags |= VFPF_TPA_PKT_SPLIT_FLAG;
1396                 if (sge_tpa_params->tpa_hdr_data_split_flg)
1397                         p_sge_tpa_tlv->sge_tpa_flags |=
1398                             VFPF_TPA_HDR_DATA_SPLIT_FLAG;
1399                 if (sge_tpa_params->tpa_gro_consistent_flg)
1400                         p_sge_tpa_tlv->sge_tpa_flags |=
1401                             VFPF_TPA_GRO_CONSIST_FLAG;
1402                 if (sge_tpa_params->tpa_ipv4_tunn_en_flg)
1403                         p_sge_tpa_tlv->sge_tpa_flags |=
1404                             VFPF_TPA_TUNN_IPV4_EN_FLAG;
1405                 if (sge_tpa_params->tpa_ipv6_tunn_en_flg)
1406                         p_sge_tpa_tlv->sge_tpa_flags |=
1407                             VFPF_TPA_TUNN_IPV6_EN_FLAG;
1408
1409                 p_sge_tpa_tlv->tpa_max_aggs_num =
1410                     sge_tpa_params->tpa_max_aggs_num;
1411                 p_sge_tpa_tlv->tpa_max_size = sge_tpa_params->tpa_max_size;
1412                 p_sge_tpa_tlv->tpa_min_size_to_start =
1413                     sge_tpa_params->tpa_min_size_to_start;
1414                 p_sge_tpa_tlv->tpa_min_size_to_cont =
1415                     sge_tpa_params->tpa_min_size_to_cont;
1416
1417                 p_sge_tpa_tlv->max_buffers_per_cqe =
1418                     sge_tpa_params->max_buffers_per_cqe;
1419         }
1420
1421         /* add list termination tlv */
1422         ecore_add_tlv(&p_iov->offset,
1423                       CHANNEL_TLV_LIST_END,
1424                       sizeof(struct channel_list_end_tlv));
1425
1426         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, resp_size);
1427         if (rc)
1428                 goto exit;
1429
1430         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
1431                 rc = ECORE_INVAL;
1432                 goto exit;
1433         }
1434
1435         ecore_vf_handle_vp_update_tlvs_resp(p_hwfn, p_params);
1436
1437 exit:
1438         ecore_vf_pf_req_end(p_hwfn, rc);
1439
1440         return rc;
1441 }
1442
1443 enum _ecore_status_t ecore_vf_pf_reset(struct ecore_hwfn *p_hwfn)
1444 {
1445         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1446         struct pfvf_def_resp_tlv *resp;
1447         struct vfpf_first_tlv *req;
1448         enum _ecore_status_t rc;
1449
1450         /* clear mailbox and prep first tlv */
1451         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_CLOSE, sizeof(*req));
1452
1453         /* add list termination tlv */
1454         ecore_add_tlv(&p_iov->offset,
1455                       CHANNEL_TLV_LIST_END,
1456                       sizeof(struct channel_list_end_tlv));
1457
1458         resp = &p_iov->pf2vf_reply->default_resp;
1459         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1460         if (rc)
1461                 goto exit;
1462
1463         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
1464                 rc = ECORE_AGAIN;
1465                 goto exit;
1466         }
1467
1468         p_hwfn->b_int_enabled = 0;
1469
1470 exit:
1471         ecore_vf_pf_req_end(p_hwfn, rc);
1472
1473         return rc;
1474 }
1475
1476 void ecore_vf_pf_filter_mcast(struct ecore_hwfn *p_hwfn,
1477                               struct ecore_filter_mcast *p_filter_cmd)
1478 {
1479         struct ecore_sp_vport_update_params sp_params;
1480         int i;
1481
1482         OSAL_MEMSET(&sp_params, 0, sizeof(sp_params));
1483         sp_params.update_approx_mcast_flg = 1;
1484
1485         if (p_filter_cmd->opcode == ECORE_FILTER_ADD) {
1486                 for (i = 0; i < p_filter_cmd->num_mc_addrs; i++) {
1487                         u32 bit;
1488
1489                         bit = ecore_mcast_bin_from_mac(p_filter_cmd->mac[i]);
1490                         sp_params.bins[bit / 32] |= 1 << (bit % 32);
1491                 }
1492         }
1493
1494         ecore_vf_pf_vport_update(p_hwfn, &sp_params);
1495 }
1496
1497 enum _ecore_status_t ecore_vf_pf_filter_ucast(struct ecore_hwfn *p_hwfn,
1498                                               struct ecore_filter_ucast
1499                                               *p_ucast)
1500 {
1501         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1502         struct vfpf_ucast_filter_tlv *req;
1503         struct pfvf_def_resp_tlv *resp;
1504         enum _ecore_status_t rc;
1505
1506         /* Sanitize */
1507         if (p_ucast->opcode == ECORE_FILTER_MOVE) {
1508                 DP_NOTICE(p_hwfn, true,
1509                           "VFs don't support Moving of filters\n");
1510                 return ECORE_INVAL;
1511         }
1512
1513         /* clear mailbox and prep first tlv */
1514         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_UCAST_FILTER, sizeof(*req));
1515         req->opcode = (u8)p_ucast->opcode;
1516         req->type = (u8)p_ucast->type;
1517         OSAL_MEMCPY(req->mac, p_ucast->mac, ETH_ALEN);
1518         req->vlan = p_ucast->vlan;
1519
1520         /* add list termination tlv */
1521         ecore_add_tlv(&p_iov->offset,
1522                       CHANNEL_TLV_LIST_END,
1523                       sizeof(struct channel_list_end_tlv));
1524
1525         resp = &p_iov->pf2vf_reply->default_resp;
1526         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1527         if (rc)
1528                 goto exit;
1529
1530         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
1531                 rc = ECORE_AGAIN;
1532                 goto exit;
1533         }
1534
1535 exit:
1536         ecore_vf_pf_req_end(p_hwfn, rc);
1537
1538         return rc;
1539 }
1540
1541 enum _ecore_status_t ecore_vf_pf_int_cleanup(struct ecore_hwfn *p_hwfn)
1542 {
1543         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1544         struct pfvf_def_resp_tlv *resp = &p_iov->pf2vf_reply->default_resp;
1545         enum _ecore_status_t rc;
1546
1547         /* clear mailbox and prep first tlv */
1548         ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_INT_CLEANUP,
1549                          sizeof(struct vfpf_first_tlv));
1550
1551         /* add list termination tlv */
1552         ecore_add_tlv(&p_iov->offset,
1553                       CHANNEL_TLV_LIST_END,
1554                       sizeof(struct channel_list_end_tlv));
1555
1556         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1557         if (rc)
1558                 goto exit;
1559
1560         if (resp->hdr.status != PFVF_STATUS_SUCCESS) {
1561                 rc = ECORE_INVAL;
1562                 goto exit;
1563         }
1564
1565 exit:
1566         ecore_vf_pf_req_end(p_hwfn, rc);
1567
1568         return rc;
1569 }
1570
1571 enum _ecore_status_t ecore_vf_pf_get_coalesce(struct ecore_hwfn *p_hwfn,
1572                                               u16 *p_coal,
1573                                               struct ecore_queue_cid *p_cid)
1574 {
1575         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1576         struct pfvf_read_coal_resp_tlv *resp;
1577         struct vfpf_read_coal_req_tlv *req;
1578         enum _ecore_status_t rc;
1579
1580         /* clear mailbox and prep header tlv */
1581         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_COALESCE_READ,
1582                                sizeof(*req));
1583         req->qid = p_cid->rel.queue_id;
1584         req->is_rx = p_cid->b_is_rx ? 1 : 0;
1585
1586         ecore_add_tlv(&p_iov->offset, CHANNEL_TLV_LIST_END,
1587                       sizeof(struct channel_list_end_tlv));
1588         resp = &p_iov->pf2vf_reply->read_coal_resp;
1589
1590         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1591         if (rc != ECORE_SUCCESS)
1592                 goto exit;
1593
1594         if (resp->hdr.status != PFVF_STATUS_SUCCESS)
1595                 goto exit;
1596
1597         *p_coal = resp->coal;
1598 exit:
1599         ecore_vf_pf_req_end(p_hwfn, rc);
1600
1601         return rc;
1602 }
1603
1604 enum _ecore_status_t
1605 ecore_vf_pf_set_coalesce(struct ecore_hwfn *p_hwfn, u16 rx_coal, u16 tx_coal,
1606                          struct ecore_queue_cid     *p_cid)
1607 {
1608         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1609         struct vfpf_update_coalesce *req;
1610         struct pfvf_def_resp_tlv *resp;
1611         enum _ecore_status_t rc;
1612
1613         /* clear mailbox and prep header tlv */
1614         req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_COALESCE_UPDATE,
1615                                sizeof(*req));
1616
1617         req->rx_coal = rx_coal;
1618         req->tx_coal = tx_coal;
1619         req->qid = p_cid->rel.queue_id;
1620
1621         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
1622                    "Setting coalesce rx_coal = %d, tx_coal = %d at queue = %d\n",
1623                    rx_coal, tx_coal, req->qid);
1624
1625         /* add list termination tlv */
1626         ecore_add_tlv(&p_iov->offset, CHANNEL_TLV_LIST_END,
1627                       sizeof(struct channel_list_end_tlv));
1628
1629         resp = &p_iov->pf2vf_reply->default_resp;
1630         rc = ecore_send_msg2pf(p_hwfn, &resp->hdr.status, sizeof(*resp));
1631
1632         if (rc != ECORE_SUCCESS)
1633                 goto exit;
1634
1635         if (resp->hdr.status != PFVF_STATUS_SUCCESS)
1636                 goto exit;
1637
1638         p_hwfn->p_dev->rx_coalesce_usecs = rx_coal;
1639         p_hwfn->p_dev->tx_coalesce_usecs = tx_coal;
1640
1641 exit:
1642         ecore_vf_pf_req_end(p_hwfn, rc);
1643         return rc;
1644 }
1645
1646 enum _ecore_status_t
1647 ecore_vf_pf_update_mtu(struct ecore_hwfn *p_hwfn, u16 mtu)
1648 {
1649         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1650         struct vfpf_update_mtu_tlv *p_req;
1651         struct pfvf_def_resp_tlv *p_resp;
1652         enum _ecore_status_t rc;
1653
1654         if (!mtu)
1655                 return ECORE_INVAL;
1656
1657         /* clear mailbox and prep header tlv */
1658         p_req = ecore_vf_pf_prep(p_hwfn, CHANNEL_TLV_UPDATE_MTU,
1659                                  sizeof(*p_req));
1660         p_req->mtu = mtu;
1661         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
1662                    "Requesting MTU update to %d\n", mtu);
1663
1664         /* add list termination tlv */
1665         ecore_add_tlv(&p_iov->offset,
1666                       CHANNEL_TLV_LIST_END,
1667                       sizeof(struct channel_list_end_tlv));
1668
1669         p_resp = &p_iov->pf2vf_reply->default_resp;
1670         rc = ecore_send_msg2pf(p_hwfn, &p_resp->hdr.status, sizeof(*p_resp));
1671         if (p_resp->hdr.status == PFVF_STATUS_NOT_SUPPORTED)
1672                 rc = ECORE_INVAL;
1673
1674         ecore_vf_pf_req_end(p_hwfn, rc);
1675
1676         return rc;
1677 }
1678
1679 u16 ecore_vf_get_igu_sb_id(struct ecore_hwfn *p_hwfn,
1680                            u16               sb_id)
1681 {
1682         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1683
1684         if (!p_iov) {
1685                 DP_NOTICE(p_hwfn, true, "vf_sriov_info isn't initialized\n");
1686                 return 0;
1687         }
1688
1689         return p_iov->acquire_resp.resc.hw_sbs[sb_id].hw_sb_id;
1690 }
1691
1692 void ecore_vf_set_sb_info(struct ecore_hwfn *p_hwfn,
1693                           u16 sb_id, struct ecore_sb_info *p_sb)
1694 {
1695         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1696
1697         if (!p_iov) {
1698                 DP_NOTICE(p_hwfn, true, "vf_sriov_info isn't initialized\n");
1699                 return;
1700         }
1701
1702         if (sb_id >= PFVF_MAX_SBS_PER_VF) {
1703                 DP_NOTICE(p_hwfn, true, "Can't configure SB %04x\n", sb_id);
1704                 return;
1705         }
1706
1707         p_iov->sbs_info[sb_id] = p_sb;
1708 }
1709
1710 enum _ecore_status_t ecore_vf_read_bulletin(struct ecore_hwfn *p_hwfn,
1711                                             u8 *p_change)
1712 {
1713         struct ecore_vf_iov *p_iov = p_hwfn->vf_iov_info;
1714         struct ecore_bulletin_content shadow;
1715         u32 crc, crc_size;
1716
1717         crc_size = sizeof(p_iov->bulletin.p_virt->crc);
1718         *p_change = 0;
1719
1720         /* Need to guarantee PF is not in the middle of writing it */
1721         OSAL_MEMCPY(&shadow, p_iov->bulletin.p_virt, p_iov->bulletin.size);
1722
1723         /* If version did not update, no need to do anything */
1724         if (shadow.version == p_iov->bulletin_shadow.version)
1725                 return ECORE_SUCCESS;
1726
1727         /* Verify the bulletin we see is valid */
1728         crc = OSAL_CRC32(0, (u8 *)&shadow + crc_size,
1729                          p_iov->bulletin.size - crc_size);
1730         if (crc != shadow.crc)
1731                 return ECORE_AGAIN;
1732
1733         /* Set the shadow bulletin and process it */
1734         OSAL_MEMCPY(&p_iov->bulletin_shadow, &shadow, p_iov->bulletin.size);
1735
1736         DP_VERBOSE(p_hwfn, ECORE_MSG_IOV,
1737                    "Read a bulletin update %08x\n", shadow.version);
1738
1739         *p_change = 1;
1740
1741         return ECORE_SUCCESS;
1742 }
1743
1744 void __ecore_vf_get_link_params(struct ecore_mcp_link_params *p_params,
1745                                 struct ecore_bulletin_content *p_bulletin)
1746 {
1747         OSAL_MEMSET(p_params, 0, sizeof(*p_params));
1748
1749         p_params->speed.autoneg = p_bulletin->req_autoneg;
1750         p_params->speed.advertised_speeds = p_bulletin->req_adv_speed;
1751         p_params->speed.forced_speed = p_bulletin->req_forced_speed;
1752         p_params->pause.autoneg = p_bulletin->req_autoneg_pause;
1753         p_params->pause.forced_rx = p_bulletin->req_forced_rx;
1754         p_params->pause.forced_tx = p_bulletin->req_forced_tx;
1755         p_params->loopback_mode = p_bulletin->req_loopback;
1756 }
1757
1758 void ecore_vf_get_link_params(struct ecore_hwfn *p_hwfn,
1759                               struct ecore_mcp_link_params *params)
1760 {
1761         __ecore_vf_get_link_params(params,
1762                                    &p_hwfn->vf_iov_info->bulletin_shadow);
1763 }
1764
1765 void __ecore_vf_get_link_state(struct ecore_mcp_link_state *p_link,
1766                                struct ecore_bulletin_content *p_bulletin)
1767 {
1768         OSAL_MEMSET(p_link, 0, sizeof(*p_link));
1769
1770         p_link->link_up = p_bulletin->link_up;
1771         p_link->speed = p_bulletin->speed;
1772         p_link->full_duplex = p_bulletin->full_duplex;
1773         p_link->an = p_bulletin->autoneg;
1774         p_link->an_complete = p_bulletin->autoneg_complete;
1775         p_link->parallel_detection = p_bulletin->parallel_detection;
1776         p_link->pfc_enabled = p_bulletin->pfc_enabled;
1777         p_link->partner_adv_speed = p_bulletin->partner_adv_speed;
1778         p_link->partner_tx_flow_ctrl_en = p_bulletin->partner_tx_flow_ctrl_en;
1779         p_link->partner_rx_flow_ctrl_en = p_bulletin->partner_rx_flow_ctrl_en;
1780         p_link->partner_adv_pause = p_bulletin->partner_adv_pause;
1781         p_link->sfp_tx_fault = p_bulletin->sfp_tx_fault;
1782 }
1783
1784 void ecore_vf_get_link_state(struct ecore_hwfn *p_hwfn,
1785                              struct ecore_mcp_link_state *link)
1786 {
1787         __ecore_vf_get_link_state(link,
1788                                   &p_hwfn->vf_iov_info->bulletin_shadow);
1789 }
1790
1791 void __ecore_vf_get_link_caps(struct ecore_mcp_link_capabilities *p_link_caps,
1792                               struct ecore_bulletin_content *p_bulletin)
1793 {
1794         OSAL_MEMSET(p_link_caps, 0, sizeof(*p_link_caps));
1795         p_link_caps->speed_capabilities = p_bulletin->capability_speed;
1796 }
1797
1798 void ecore_vf_get_link_caps(struct ecore_hwfn *p_hwfn,
1799                             struct ecore_mcp_link_capabilities *p_link_caps)
1800 {
1801         __ecore_vf_get_link_caps(p_link_caps,
1802                                  &p_hwfn->vf_iov_info->bulletin_shadow);
1803 }
1804
1805 void ecore_vf_get_num_rxqs(struct ecore_hwfn *p_hwfn, u8 *num_rxqs)
1806 {
1807         *num_rxqs = p_hwfn->vf_iov_info->acquire_resp.resc.num_rxqs;
1808 }
1809
1810 void ecore_vf_get_num_txqs(struct ecore_hwfn *p_hwfn,
1811                            u8 *num_txqs)
1812 {
1813         *num_txqs = p_hwfn->vf_iov_info->acquire_resp.resc.num_txqs;
1814 }
1815
1816 void ecore_vf_get_port_mac(struct ecore_hwfn *p_hwfn, u8 *port_mac)
1817 {
1818         OSAL_MEMCPY(port_mac,
1819                     p_hwfn->vf_iov_info->acquire_resp.pfdev_info.port_mac,
1820                     ETH_ALEN);
1821 }
1822
1823 void ecore_vf_get_num_vlan_filters(struct ecore_hwfn *p_hwfn,
1824                                    u8 *num_vlan_filters)
1825 {
1826         struct ecore_vf_iov *p_vf;
1827
1828         p_vf = p_hwfn->vf_iov_info;
1829         *num_vlan_filters = p_vf->acquire_resp.resc.num_vlan_filters;
1830 }
1831
1832 void ecore_vf_get_num_sbs(struct ecore_hwfn *p_hwfn,
1833                           u32 *num_sbs)
1834 {
1835         struct ecore_vf_iov *p_vf;
1836
1837         p_vf = p_hwfn->vf_iov_info;
1838         *num_sbs = (u32)p_vf->acquire_resp.resc.num_sbs;
1839 }
1840
1841 void ecore_vf_get_num_mac_filters(struct ecore_hwfn *p_hwfn,
1842                                   u32 *num_mac_filters)
1843 {
1844         struct ecore_vf_iov *p_vf = p_hwfn->vf_iov_info;
1845
1846         *num_mac_filters = p_vf->acquire_resp.resc.num_mac_filters;
1847 }
1848
1849 bool ecore_vf_check_mac(struct ecore_hwfn *p_hwfn, u8 *mac)
1850 {
1851         struct ecore_bulletin_content *bulletin;
1852
1853         bulletin = &p_hwfn->vf_iov_info->bulletin_shadow;
1854         if (!(bulletin->valid_bitmap & (1 << MAC_ADDR_FORCED)))
1855                 return true;
1856
1857         /* Forbid VF from changing a MAC enforced by PF */
1858         if (OSAL_MEMCMP(bulletin->mac, mac, ETH_ALEN))
1859                 return false;
1860
1861         return false;
1862 }
1863
1864 bool ecore_vf_bulletin_get_forced_mac(struct ecore_hwfn *hwfn, u8 *dst_mac,
1865                                       u8 *p_is_forced)
1866 {
1867         struct ecore_bulletin_content *bulletin;
1868
1869         bulletin = &hwfn->vf_iov_info->bulletin_shadow;
1870
1871         if (bulletin->valid_bitmap & (1 << MAC_ADDR_FORCED)) {
1872                 if (p_is_forced)
1873                         *p_is_forced = 1;
1874         } else if (bulletin->valid_bitmap & (1 << VFPF_BULLETIN_MAC_ADDR)) {
1875                 if (p_is_forced)
1876                         *p_is_forced = 0;
1877         } else {
1878                 return false;
1879         }
1880
1881         OSAL_MEMCPY(dst_mac, bulletin->mac, ETH_ALEN);
1882
1883         return true;
1884 }
1885
1886 void ecore_vf_bulletin_get_udp_ports(struct ecore_hwfn *p_hwfn,
1887                                      u16 *p_vxlan_port,
1888                                      u16 *p_geneve_port)
1889 {
1890         struct ecore_bulletin_content *p_bulletin;
1891
1892         p_bulletin = &p_hwfn->vf_iov_info->bulletin_shadow;
1893
1894         *p_vxlan_port = p_bulletin->vxlan_udp_port;
1895         *p_geneve_port = p_bulletin->geneve_udp_port;
1896 }
1897
1898 bool ecore_vf_bulletin_get_forced_vlan(struct ecore_hwfn *hwfn, u16 *dst_pvid)
1899 {
1900         struct ecore_bulletin_content *bulletin;
1901
1902         bulletin = &hwfn->vf_iov_info->bulletin_shadow;
1903
1904         if (!(bulletin->valid_bitmap & (1 << VLAN_ADDR_FORCED)))
1905                 return false;
1906
1907         if (dst_pvid)
1908                 *dst_pvid = bulletin->pvid;
1909
1910         return true;
1911 }
1912
1913 bool ecore_vf_get_pre_fp_hsi(struct ecore_hwfn *p_hwfn)
1914 {
1915         return p_hwfn->vf_iov_info->b_pre_fp_hsi;
1916 }
1917
1918 void ecore_vf_get_fw_version(struct ecore_hwfn *p_hwfn,
1919                              u16 *fw_major, u16 *fw_minor, u16 *fw_rev,
1920                              u16 *fw_eng)
1921 {
1922         struct pf_vf_pfdev_info *info;
1923
1924         info = &p_hwfn->vf_iov_info->acquire_resp.pfdev_info;
1925
1926         *fw_major = info->fw_major;
1927         *fw_minor = info->fw_minor;
1928         *fw_rev = info->fw_rev;
1929         *fw_eng = info->fw_eng;
1930 }
1931
1932 #ifdef CONFIG_ECORE_SW_CHANNEL
1933 void ecore_vf_set_hw_channel(struct ecore_hwfn *p_hwfn, bool b_is_hw)
1934 {
1935         p_hwfn->vf_iov_info->b_hw_channel = b_is_hw;
1936 }
1937 #endif