drivers/net/qede/qede_ethdev.c

   1 /*
   2  * Copyright (c) 2016 QLogic Corporation.
   3  * All rights reserved.
   4  * www.qlogic.com
   5  *
   6  * See LICENSE.qede_pmd for copyright and licensing details.
   7  */
   8
   9 #include "qede_ethdev.h"
  10 #include <rte_alarm.h>
  11 #include <rte_version.h>
  12
  13 /* Globals */
  14 static const struct qed_eth_ops *qed_ops;
  15 static const char *drivername = "qede pmd";
  16 static int64_t timer_period = 1;
  17
  18 struct rte_qede_xstats_name_off {
  19         char name[RTE_ETH_XSTATS_NAME_SIZE];
  20         uint64_t offset;
  21 };
  22
  23 static const struct rte_qede_xstats_name_off qede_xstats_strings[] = {
  24         {"rx_unicast_bytes", offsetof(struct ecore_eth_stats, rx_ucast_bytes)},
  25         {"rx_multicast_bytes",
  26                 offsetof(struct ecore_eth_stats, rx_mcast_bytes)},
  27         {"rx_broadcast_bytes",
  28                 offsetof(struct ecore_eth_stats, rx_bcast_bytes)},
  29         {"rx_unicast_packets", offsetof(struct ecore_eth_stats, rx_ucast_pkts)},
  30         {"rx_multicast_packets",
  31                 offsetof(struct ecore_eth_stats, rx_mcast_pkts)},
  32         {"rx_broadcast_packets",
  33                 offsetof(struct ecore_eth_stats, rx_bcast_pkts)},
  34
  35         {"tx_unicast_bytes", offsetof(struct ecore_eth_stats, tx_ucast_bytes)},
  36         {"tx_multicast_bytes",
  37                 offsetof(struct ecore_eth_stats, tx_mcast_bytes)},
  38         {"tx_broadcast_bytes",
  39                 offsetof(struct ecore_eth_stats, tx_bcast_bytes)},
  40         {"tx_unicast_packets", offsetof(struct ecore_eth_stats, tx_ucast_pkts)},
  41         {"tx_multicast_packets",
  42                 offsetof(struct ecore_eth_stats, tx_mcast_pkts)},
  43         {"tx_broadcast_packets",
  44                 offsetof(struct ecore_eth_stats, tx_bcast_pkts)},
  45
  46         {"rx_64_byte_packets",
  47                 offsetof(struct ecore_eth_stats, rx_64_byte_packets)},
  48         {"rx_65_to_127_byte_packets",
  49                 offsetof(struct ecore_eth_stats, rx_65_to_127_byte_packets)},
  50         {"rx_128_to_255_byte_packets",
  51                 offsetof(struct ecore_eth_stats, rx_128_to_255_byte_packets)},
  52         {"rx_256_to_511_byte_packets",
  53                 offsetof(struct ecore_eth_stats, rx_256_to_511_byte_packets)},
  54         {"rx_512_to_1023_byte_packets",
  55                 offsetof(struct ecore_eth_stats, rx_512_to_1023_byte_packets)},
  56         {"rx_1024_to_1518_byte_packets",
  57                 offsetof(struct ecore_eth_stats, rx_1024_to_1518_byte_packets)},
  58         {"rx_1519_to_1522_byte_packets",
  59                 offsetof(struct ecore_eth_stats, rx_1519_to_1522_byte_packets)},
  60         {"rx_1519_to_2047_byte_packets",
  61                 offsetof(struct ecore_eth_stats, rx_1519_to_2047_byte_packets)},
  62         {"rx_2048_to_4095_byte_packets",
  63                 offsetof(struct ecore_eth_stats, rx_2048_to_4095_byte_packets)},
  64         {"rx_4096_to_9216_byte_packets",
  65                 offsetof(struct ecore_eth_stats, rx_4096_to_9216_byte_packets)},
  66         {"rx_9217_to_16383_byte_packets",
  67                 offsetof(struct ecore_eth_stats,
  68                          rx_9217_to_16383_byte_packets)},
  69         {"tx_64_byte_packets",
  70                 offsetof(struct ecore_eth_stats, tx_64_byte_packets)},
  71         {"tx_65_to_127_byte_packets",
  72                 offsetof(struct ecore_eth_stats, tx_65_to_127_byte_packets)},
  73         {"tx_128_to_255_byte_packets",
  74                 offsetof(struct ecore_eth_stats, tx_128_to_255_byte_packets)},
  75         {"tx_256_to_511_byte_packets",
  76                 offsetof(struct ecore_eth_stats, tx_256_to_511_byte_packets)},
  77         {"tx_512_to_1023_byte_packets",
  78                 offsetof(struct ecore_eth_stats, tx_512_to_1023_byte_packets)},
  79         {"tx_1024_to_1518_byte_packets",
  80                 offsetof(struct ecore_eth_stats, tx_1024_to_1518_byte_packets)},
  81         {"trx_1519_to_1522_byte_packets",
  82                 offsetof(struct ecore_eth_stats, tx_1519_to_2047_byte_packets)},
  83         {"tx_2048_to_4095_byte_packets",
  84                 offsetof(struct ecore_eth_stats, tx_2048_to_4095_byte_packets)},
  85         {"tx_4096_to_9216_byte_packets",
  86                 offsetof(struct ecore_eth_stats, tx_4096_to_9216_byte_packets)},
  87         {"tx_9217_to_16383_byte_packets",
  88                 offsetof(struct ecore_eth_stats,
  89                          tx_9217_to_16383_byte_packets)},
  90
  91         {"rx_mac_crtl_frames",
  92                 offsetof(struct ecore_eth_stats, rx_mac_crtl_frames)},
  93         {"tx_mac_control_frames",
  94                 offsetof(struct ecore_eth_stats, tx_mac_ctrl_frames)},
  95         {"rx_pause_frames", offsetof(struct ecore_eth_stats, rx_pause_frames)},
  96         {"tx_pause_frames", offsetof(struct ecore_eth_stats, tx_pause_frames)},
  97         {"rx_priority_flow_control_frames",
  98                 offsetof(struct ecore_eth_stats, rx_pfc_frames)},
  99         {"tx_priority_flow_control_frames",
 100                 offsetof(struct ecore_eth_stats, tx_pfc_frames)},
 101
 102         {"rx_crc_errors", offsetof(struct ecore_eth_stats, rx_crc_errors)},
 103         {"rx_align_errors", offsetof(struct ecore_eth_stats, rx_align_errors)},
 104         {"rx_carrier_errors",
 105                 offsetof(struct ecore_eth_stats, rx_carrier_errors)},
 106         {"rx_oversize_packet_errors",
 107                 offsetof(struct ecore_eth_stats, rx_oversize_packets)},
 108         {"rx_jabber_errors", offsetof(struct ecore_eth_stats, rx_jabbers)},
 109         {"rx_undersize_packet_errors",
 110                 offsetof(struct ecore_eth_stats, rx_undersize_packets)},
 111         {"rx_fragments", offsetof(struct ecore_eth_stats, rx_fragments)},
 112         {"rx_host_buffer_not_available",
 113                 offsetof(struct ecore_eth_stats, no_buff_discards)},
 114         /* Number of packets discarded because they are bigger than MTU */
 115         {"rx_packet_too_big_discards",
 116                 offsetof(struct ecore_eth_stats, packet_too_big_discard)},
 117         {"rx_ttl_zero_discards",
 118                 offsetof(struct ecore_eth_stats, ttl0_discard)},
 119         {"rx_multi_function_tag_filter_discards",
 120                 offsetof(struct ecore_eth_stats, mftag_filter_discards)},
 121         {"rx_mac_filter_discards",
 122                 offsetof(struct ecore_eth_stats, mac_filter_discards)},
 123         {"rx_hw_buffer_truncates",
 124                 offsetof(struct ecore_eth_stats, brb_truncates)},
 125         {"rx_hw_buffer_discards",
 126                 offsetof(struct ecore_eth_stats, brb_discards)},
 127         {"tx_lpi_entry_count",
 128                 offsetof(struct ecore_eth_stats, tx_lpi_entry_count)},
 129         {"tx_total_collisions",
 130                 offsetof(struct ecore_eth_stats, tx_total_collisions)},
 131         {"tx_error_drop_packets",
 132                 offsetof(struct ecore_eth_stats, tx_err_drop_pkts)},
 133
 134         {"rx_mac_bytes", offsetof(struct ecore_eth_stats, rx_mac_bytes)},
 135         {"rx_mac_unicast_packets",
 136                 offsetof(struct ecore_eth_stats, rx_mac_uc_packets)},
 137         {"rx_mac_multicast_packets",
 138                 offsetof(struct ecore_eth_stats, rx_mac_mc_packets)},
 139         {"rx_mac_broadcast_packets",
 140                 offsetof(struct ecore_eth_stats, rx_mac_bc_packets)},
 141         {"rx_mac_frames_ok",
 142                 offsetof(struct ecore_eth_stats, rx_mac_frames_ok)},
 143         {"tx_mac_bytes", offsetof(struct ecore_eth_stats, tx_mac_bytes)},
 144         {"tx_mac_unicast_packets",
 145                 offsetof(struct ecore_eth_stats, tx_mac_uc_packets)},
 146         {"tx_mac_multicast_packets",
 147                 offsetof(struct ecore_eth_stats, tx_mac_mc_packets)},
 148         {"tx_mac_broadcast_packets",
 149                 offsetof(struct ecore_eth_stats, tx_mac_bc_packets)},
 150
 151         {"lro_coalesced_packets",
 152                 offsetof(struct ecore_eth_stats, tpa_coalesced_pkts)},
 153         {"lro_coalesced_events",
 154                 offsetof(struct ecore_eth_stats, tpa_coalesced_events)},
 155         {"lro_aborts_num",
 156                 offsetof(struct ecore_eth_stats, tpa_aborts_num)},
 157         {"lro_not_coalesced_packets",
 158                 offsetof(struct ecore_eth_stats, tpa_not_coalesced_pkts)},
 159         {"lro_coalesced_bytes",
 160                 offsetof(struct ecore_eth_stats, tpa_coalesced_bytes)},
 161 };
 162
 163 static const struct rte_qede_xstats_name_off qede_rxq_xstats_strings[] = {
 164         {"rx_q_segments",
 165                 offsetof(struct qede_rx_queue, rx_segs)},
 166         {"rx_q_hw_errors",
 167                 offsetof(struct qede_rx_queue, rx_hw_errors)},
 168         {"rx_q_allocation_errors",
 169                 offsetof(struct qede_rx_queue, rx_alloc_errors)}
 170 };
 171
 172 static void qede_interrupt_action(struct ecore_hwfn *p_hwfn)
 173 {
 174         ecore_int_sp_dpc((osal_int_ptr_t)(p_hwfn));
 175 }
 176
 177 static void
 178 qede_interrupt_handler(__rte_unused struct rte_intr_handle *handle, void *param)
 179 {
 180         struct rte_eth_dev *eth_dev = (struct rte_eth_dev *)param;
 181         struct qede_dev *qdev = eth_dev->data->dev_private;
 182         struct ecore_dev *edev = &qdev->edev;
 183
 184         qede_interrupt_action(ECORE_LEADING_HWFN(edev));
 185         if (rte_intr_enable(&eth_dev->pci_dev->intr_handle))
 186                 DP_ERR(edev, "rte_intr_enable failed\n");
 187 }
 188
 189 static void
 190 qede_alloc_etherdev(struct qede_dev *qdev, struct qed_dev_eth_info *info)
 191 {
 192         rte_memcpy(&qdev->dev_info, info, sizeof(*info));
 193         qdev->num_tc = qdev->dev_info.num_tc;
 194         qdev->ops = qed_ops;
 195 }
 196
 197 static void qede_print_adapter_info(struct qede_dev *qdev)
 198 {
 199         struct ecore_dev *edev = &qdev->edev;
 200         struct qed_dev_info *info = &qdev->dev_info.common;
 201         static char drv_ver[QEDE_PMD_DRV_VER_STR_SIZE];
 202         static char ver_str[QEDE_PMD_DRV_VER_STR_SIZE];
 203
 204         DP_INFO(edev, "*********************************\n");
 205         DP_INFO(edev, " DPDK version:%s\n", rte_version());
 206         DP_INFO(edev, " Chip details : %s%d\n",
 207                   ECORE_IS_BB(edev) ? "BB" : "AH",
 208                   CHIP_REV_IS_A0(edev) ? 0 : 1);
 209         snprintf(ver_str, QEDE_PMD_DRV_VER_STR_SIZE, "%d.%d.%d.%d",
 210                  info->fw_major, info->fw_minor, info->fw_rev, info->fw_eng);
 211         snprintf(drv_ver, QEDE_PMD_DRV_VER_STR_SIZE, "%s_%s",
 212                  ver_str, QEDE_PMD_VERSION);
 213         DP_INFO(edev, " Driver version : %s\n", drv_ver);
 214         DP_INFO(edev, " Firmware version : %s\n", ver_str);
 215
 216         snprintf(ver_str, MCP_DRV_VER_STR_SIZE,
 217                  "%d.%d.%d.%d",
 218                 (info->mfw_rev >> 24) & 0xff,
 219                 (info->mfw_rev >> 16) & 0xff,
 220                 (info->mfw_rev >> 8) & 0xff, (info->mfw_rev) & 0xff);
 221         DP_INFO(edev, " Management Firmware version : %s\n", ver_str);
 222         DP_INFO(edev, " Firmware file : %s\n", fw_file);
 223         DP_INFO(edev, "*********************************\n");
 224 }
 225
 226 static void qede_set_ucast_cmn_params(struct ecore_filter_ucast *ucast)
 227 {
 228         memset(ucast, 0, sizeof(struct ecore_filter_ucast));
 229         ucast->is_rx_filter = true;
 230         ucast->is_tx_filter = true;
 231         /* ucast->assert_on_error = true; - For debug */
 232 }
 233
 234 static int
 235 qede_ucast_filter(struct rte_eth_dev *eth_dev, struct ecore_filter_ucast *ucast,
 236                   bool add)
 237 {
 238         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
 239         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
 240         struct qede_ucast_entry *tmp = NULL;
 241         struct qede_ucast_entry *u;
 242         struct ether_addr *mac_addr;
 243
 244         mac_addr  = (struct ether_addr *)ucast->mac;
 245         if (add) {
 246                 SLIST_FOREACH(tmp, &qdev->uc_list_head, list) {
 247                         if ((memcmp(mac_addr, &tmp->mac,
 248                                     ETHER_ADDR_LEN) == 0) &&
 249                              ucast->vlan == tmp->vlan) {
 250                                 DP_ERR(edev, "Unicast MAC is already added"
 251                                        " with vlan = %u, vni = %u\n",
 252                                        ucast->vlan,  ucast->vni);
 253                                         return -EEXIST;
 254                         }
 255                 }
 256                 u = rte_malloc(NULL, sizeof(struct qede_ucast_entry),
 257                                RTE_CACHE_LINE_SIZE);
 258                 if (!u) {
 259                         DP_ERR(edev, "Did not allocate memory for ucast\n");
 260                         return -ENOMEM;
 261                 }
 262                 ether_addr_copy(mac_addr, &u->mac);
 263                 u->vlan = ucast->vlan;
 264                 SLIST_INSERT_HEAD(&qdev->uc_list_head, u, list);
 265                 qdev->num_uc_addr++;
 266         } else {
 267                 SLIST_FOREACH(tmp, &qdev->uc_list_head, list) {
 268                         if ((memcmp(mac_addr, &tmp->mac,
 269                                     ETHER_ADDR_LEN) == 0) &&
 270                             ucast->vlan == tmp->vlan)
 271                         break;
 272                 }
 273                 if (tmp == NULL) {
 274                         DP_INFO(edev, "Unicast MAC is not found\n");
 275                         return -EINVAL;
 276                 }
 277                 SLIST_REMOVE(&qdev->uc_list_head, tmp, qede_ucast_entry, list);
 278                 qdev->num_uc_addr--;
 279         }
 280
 281         return 0;
 282 }
 283
 284 static int
 285 qede_mcast_filter(struct rte_eth_dev *eth_dev, struct ecore_filter_ucast *mcast,
 286                   bool add)
 287 {
 288         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
 289         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
 290         struct ether_addr *mac_addr;
 291         struct qede_mcast_entry *tmp = NULL;
 292         struct qede_mcast_entry *m;
 293
 294         mac_addr  = (struct ether_addr *)mcast->mac;
 295         if (add) {
 296                 SLIST_FOREACH(tmp, &qdev->mc_list_head, list) {
 297                         if (memcmp(mac_addr, &tmp->mac, ETHER_ADDR_LEN) == 0) {
 298                                 DP_ERR(edev,
 299                                         "Multicast MAC is already added\n");
 300                                 return -EEXIST;
 301                         }
 302                 }
 303                 m = rte_malloc(NULL, sizeof(struct qede_mcast_entry),
 304                         RTE_CACHE_LINE_SIZE);
 305                 if (!m) {
 306                         DP_ERR(edev,
 307                                 "Did not allocate memory for mcast\n");
 308                         return -ENOMEM;
 309                 }
 310                 ether_addr_copy(mac_addr, &m->mac);
 311                 SLIST_INSERT_HEAD(&qdev->mc_list_head, m, list);
 312                 qdev->num_mc_addr++;
 313         } else {
 314                 SLIST_FOREACH(tmp, &qdev->mc_list_head, list) {
 315                         if (memcmp(mac_addr, &tmp->mac, ETHER_ADDR_LEN) == 0)
 316                                 break;
 317                 }
 318                 if (tmp == NULL) {
 319                         DP_INFO(edev, "Multicast mac is not found\n");
 320                         return -EINVAL;
 321                 }
 322                 SLIST_REMOVE(&qdev->mc_list_head, tmp,
 323                              qede_mcast_entry, list);
 324                 qdev->num_mc_addr--;
 325         }
 326
 327         return 0;
 328 }
 329
 330 static enum _ecore_status_t
 331 qede_mac_int_ops(struct rte_eth_dev *eth_dev, struct ecore_filter_ucast *ucast,
 332                  bool add)
 333 {
 334         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
 335         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
 336         enum _ecore_status_t rc;
 337         struct ecore_filter_mcast mcast;
 338         struct qede_mcast_entry *tmp;
 339         uint16_t j = 0;
 340
 341         /* Multicast */
 342         if (is_multicast_ether_addr((struct ether_addr *)ucast->mac)) {
 343                 if (add) {
 344                         if (qdev->num_mc_addr >= ECORE_MAX_MC_ADDRS) {
 345                                 DP_ERR(edev,
 346                                        "Mcast filter table limit exceeded, "
 347                                        "Please enable mcast promisc mode\n");
 348                                 return -ECORE_INVAL;
 349                         }
 350                 }
 351                 rc = qede_mcast_filter(eth_dev, ucast, add);
 352                 if (rc == 0) {
 353                         DP_INFO(edev, "num_mc_addrs = %u\n", qdev->num_mc_addr);
 354                         memset(&mcast, 0, sizeof(mcast));
 355                         mcast.num_mc_addrs = qdev->num_mc_addr;
 356                         mcast.opcode = ECORE_FILTER_ADD;
 357                         SLIST_FOREACH(tmp, &qdev->mc_list_head, list) {
 358                                 ether_addr_copy(&tmp->mac,
 359                                         (struct ether_addr *)&mcast.mac[j]);
 360                                 j++;
 361                         }
 362                         rc = ecore_filter_mcast_cmd(edev, &mcast,
 363                                                     ECORE_SPQ_MODE_CB, NULL);
 364                 }
 365                 if (rc != ECORE_SUCCESS) {
 366                         DP_ERR(edev, "Failed to add multicast filter"
 367                                " rc = %d, op = %d\n", rc, add);
 368                 }
 369         } else { /* Unicast */
 370                 if (add) {
 371                         if (qdev->num_uc_addr >= qdev->dev_info.num_mac_addrs) {
 372                                 DP_ERR(edev,
 373                                        "Ucast filter table limit exceeded,"
 374                                        " Please enable promisc mode\n");
 375                                 return -ECORE_INVAL;
 376                         }
 377                 }
 378                 rc = qede_ucast_filter(eth_dev, ucast, add);
 379                 if (rc == 0)
 380                         rc = ecore_filter_ucast_cmd(edev, ucast,
 381                                                     ECORE_SPQ_MODE_CB, NULL);
 382                 if (rc != ECORE_SUCCESS) {
 383                         DP_ERR(edev, "MAC filter failed, rc = %d, op = %d\n",
 384                                rc, add);
 385                 }
 386         }
 387
 388         return rc;
 389 }
 390
 391 static void
 392 qede_mac_addr_add(struct rte_eth_dev *eth_dev, struct ether_addr *mac_addr,
 393                   uint32_t index, __rte_unused uint32_t pool)
 394 {
 395         struct ecore_filter_ucast ucast;
 396
 397         qede_set_ucast_cmn_params(&ucast);
 398         ucast.type = ECORE_FILTER_MAC;
 399         ether_addr_copy(mac_addr, (struct ether_addr *)&ucast.mac);
 400         (void)qede_mac_int_ops(eth_dev, &ucast, 1);
 401 }
 402
 403 static void
 404 qede_mac_addr_remove(struct rte_eth_dev *eth_dev, uint32_t index)
 405 {
 406         struct qede_dev *qdev = eth_dev->data->dev_private;
 407         struct ecore_dev *edev = &qdev->edev;
 408         struct ether_addr mac_addr;
 409         struct ecore_filter_ucast ucast;
 410         int rc;
 411
 412         PMD_INIT_FUNC_TRACE(edev);
 413
 414         if (index >= qdev->dev_info.num_mac_addrs) {
 415                 DP_ERR(edev, "Index %u is above MAC filter limit %u\n",
 416                        index, qdev->dev_info.num_mac_addrs);
 417                 return;
 418         }
 419
 420         qede_set_ucast_cmn_params(&ucast);
 421         ucast.opcode = ECORE_FILTER_REMOVE;
 422         ucast.type = ECORE_FILTER_MAC;
 423
 424         /* Use the index maintained by rte */
 425         ether_addr_copy(&eth_dev->data->mac_addrs[index],
 426                         (struct ether_addr *)&ucast.mac);
 427
 428         ecore_filter_ucast_cmd(edev, &ucast, ECORE_SPQ_MODE_CB, NULL);
 429 }
 430
 431 static void
 432 qede_mac_addr_set(struct rte_eth_dev *eth_dev, struct ether_addr *mac_addr)
 433 {
 434         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
 435         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
 436
 437         if (IS_VF(edev) && !ecore_vf_check_mac(ECORE_LEADING_HWFN(edev),
 438                                                mac_addr->addr_bytes)) {
 439                 DP_ERR(edev, "Setting MAC address is not allowed\n");
 440                 ether_addr_copy(&qdev->primary_mac,
 441                                 &eth_dev->data->mac_addrs[0]);
 442                 return;
 443         }
 444
 445         qede_mac_addr_add(eth_dev, mac_addr, 0, 0);
 446 }
 447
 448 static void qede_config_accept_any_vlan(struct qede_dev *qdev, bool action)
 449 {
 450         struct ecore_dev *edev = &qdev->edev;
 451         struct qed_update_vport_params params = {
 452                 .vport_id = 0,
 453                 .accept_any_vlan = action,
 454                 .update_accept_any_vlan_flg = 1,
 455         };
 456         int rc;
 457
 458         /* Proceed only if action actually needs to be performed */
 459         if (qdev->accept_any_vlan == action)
 460                 return;
 461
 462         rc = qdev->ops->vport_update(edev, &params);
 463         if (rc) {
 464                 DP_ERR(edev, "Failed to %s accept-any-vlan\n",
 465                        action ? "enable" : "disable");
 466         } else {
 467                 DP_INFO(edev, "%s accept-any-vlan\n",
 468                         action ? "enabled" : "disabled");
 469                 qdev->accept_any_vlan = action;
 470         }
 471 }
 472
 473 static int qede_vlan_stripping(struct rte_eth_dev *eth_dev, bool set_stripping)
 474 {
 475         struct qed_update_vport_params vport_update_params;
 476         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
 477         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
 478         int rc;
 479
 480         memset(&vport_update_params, 0, sizeof(vport_update_params));
 481         vport_update_params.vport_id = 0;
 482         vport_update_params.update_inner_vlan_removal_flg = 1;
 483         vport_update_params.inner_vlan_removal_flg = set_stripping;
 484         rc = qdev->ops->vport_update(edev, &vport_update_params);
 485         if (rc) {
 486                 DP_ERR(edev, "Update V-PORT failed %d\n", rc);
 487                 return rc;
 488         }
 489
 490         return 0;
 491 }
 492
 493 static void qede_vlan_offload_set(struct rte_eth_dev *eth_dev, int mask)
 494 {
 495         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
 496         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
 497         struct rte_eth_rxmode *rxmode = &eth_dev->data->dev_conf.rxmode;
 498
 499         if (mask & ETH_VLAN_STRIP_MASK) {
 500                 if (rxmode->hw_vlan_strip)
 501                         (void)qede_vlan_stripping(eth_dev, 1);
 502                 else
 503                         (void)qede_vlan_stripping(eth_dev, 0);
 504         }
 505
 506         if (mask & ETH_VLAN_FILTER_MASK) {
 507                 /* VLAN filtering kicks in when a VLAN is added */
 508                 if (rxmode->hw_vlan_filter) {
 509                         qede_vlan_filter_set(eth_dev, 0, 1);
 510                 } else {
 511                         if (qdev->configured_vlans > 1) { /* Excluding VLAN0 */
 512                                 DP_NOTICE(edev, false,
 513                                   " Please remove existing VLAN filters"
 514                                   " before disabling VLAN filtering\n");
 515                                 /* Signal app that VLAN filtering is still
 516                                  * enabled
 517                                  */
 518                                 rxmode->hw_vlan_filter = true;
 519                         } else {
 520                                 qede_vlan_filter_set(eth_dev, 0, 0);
 521                         }
 522                 }
 523         }
 524
 525         if (mask & ETH_VLAN_EXTEND_MASK)
 526                 DP_INFO(edev, "No offloads are supported with VLAN Q-in-Q"
 527                         " and classification is based on outer tag only\n");
 528
 529         DP_INFO(edev, "vlan offload mask %d vlan-strip %d vlan-filter %d\n",
 530                 mask, rxmode->hw_vlan_strip, rxmode->hw_vlan_filter);
 531 }
 532
 533 static int qede_vlan_filter_set(struct rte_eth_dev *eth_dev,
 534                                 uint16_t vlan_id, int on)
 535 {
 536         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
 537         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
 538         struct qed_dev_eth_info *dev_info = &qdev->dev_info;
 539         struct qede_vlan_entry *tmp = NULL;
 540         struct qede_vlan_entry *vlan;
 541         struct ecore_filter_ucast ucast;
 542         int rc;
 543
 544         if (on) {
 545                 if (qdev->configured_vlans == dev_info->num_vlan_filters) {
 546                         DP_INFO(edev, "Reached max VLAN filter limit"
 547                                       " enabling accept_any_vlan\n");
 548                         qede_config_accept_any_vlan(qdev, true);
 549                         return 0;
 550                 }
 551
 552                 SLIST_FOREACH(tmp, &qdev->vlan_list_head, list) {
 553                         if (tmp->vid == vlan_id) {
 554                                 DP_ERR(edev, "VLAN %u already configured\n",
 555                                        vlan_id);
 556                                 return -EEXIST;
 557                         }
 558                 }
 559
 560                 vlan = rte_malloc(NULL, sizeof(struct qede_vlan_entry),
 561                                   RTE_CACHE_LINE_SIZE);
 562
 563                 if (!vlan) {
 564                         DP_ERR(edev, "Did not allocate memory for VLAN\n");
 565                         return -ENOMEM;
 566                 }
 567
 568                 qede_set_ucast_cmn_params(&ucast);
 569                 ucast.opcode = ECORE_FILTER_ADD;
 570                 ucast.type = ECORE_FILTER_VLAN;
 571                 ucast.vlan = vlan_id;
 572                 rc = ecore_filter_ucast_cmd(edev, &ucast, ECORE_SPQ_MODE_CB,
 573                                             NULL);
 574                 if (rc != 0) {
 575                         DP_ERR(edev, "Failed to add VLAN %u rc %d\n", vlan_id,
 576                                rc);
 577                         rte_free(vlan);
 578                 } else {
 579                         vlan->vid = vlan_id;
 580                         SLIST_INSERT_HEAD(&qdev->vlan_list_head, vlan, list);
 581                         qdev->configured_vlans++;
 582                         DP_INFO(edev, "VLAN %u added, configured_vlans %u\n",
 583                                 vlan_id, qdev->configured_vlans);
 584                 }
 585         } else {
 586                 SLIST_FOREACH(tmp, &qdev->vlan_list_head, list) {
 587                         if (tmp->vid == vlan_id)
 588                                 break;
 589                 }
 590
 591                 if (!tmp) {
 592                         if (qdev->configured_vlans == 0) {
 593                                 DP_INFO(edev,
 594                                         "No VLAN filters configured yet\n");
 595                                 return 0;
 596                         }
 597
 598                         DP_ERR(edev, "VLAN %u not configured\n", vlan_id);
 599                         return -EINVAL;
 600                 }
 601
 602                 SLIST_REMOVE(&qdev->vlan_list_head, tmp, qede_vlan_entry, list);
 603
 604                 qede_set_ucast_cmn_params(&ucast);
 605                 ucast.opcode = ECORE_FILTER_REMOVE;
 606                 ucast.type = ECORE_FILTER_VLAN;
 607                 ucast.vlan = vlan_id;
 608                 rc = ecore_filter_ucast_cmd(edev, &ucast, ECORE_SPQ_MODE_CB,
 609                                             NULL);
 610                 if (rc != 0) {
 611                         DP_ERR(edev, "Failed to delete VLAN %u rc %d\n",
 612                                vlan_id, rc);
 613                 } else {
 614                         qdev->configured_vlans--;
 615                         DP_INFO(edev, "VLAN %u removed configured_vlans %u\n",
 616                                 vlan_id, qdev->configured_vlans);
 617                 }
 618         }
 619
 620         return rc;
 621 }
 622
 623 static int qede_init_vport(struct qede_dev *qdev)
 624 {
 625         struct ecore_dev *edev = &qdev->edev;
 626         struct qed_start_vport_params start = {0};
 627         int rc;
 628
 629         start.remove_inner_vlan = 1;
 630         start.gro_enable = 0;
 631         start.mtu = ETHER_MTU + QEDE_ETH_OVERHEAD;
 632         start.vport_id = 0;
 633         start.drop_ttl0 = false;
 634         start.clear_stats = 1;
 635         start.handle_ptp_pkts = 0;
 636
 637         rc = qdev->ops->vport_start(edev, &start);
 638         if (rc) {
 639                 DP_ERR(edev, "Start V-PORT failed %d\n", rc);
 640                 return rc;
 641         }
 642
 643         DP_INFO(edev,
 644                 "Start vport ramrod passed, vport_id = %d, MTU = %u\n",
 645                 start.vport_id, ETHER_MTU);
 646
 647         return 0;
 648 }
 649
 650 static int qede_dev_configure(struct rte_eth_dev *eth_dev)
 651 {
 652         struct qede_dev *qdev = eth_dev->data->dev_private;
 653         struct ecore_dev *edev = &qdev->edev;
 654         struct rte_eth_rxmode *rxmode = &eth_dev->data->dev_conf.rxmode;
 655         int rc, i, j;
 656
 657         PMD_INIT_FUNC_TRACE(edev);
 658
 659         /* Check requirements for 100G mode */
 660         if (edev->num_hwfns > 1) {
 661                 if (eth_dev->data->nb_rx_queues < 2 ||
 662                     eth_dev->data->nb_tx_queues < 2) {
 663                         DP_NOTICE(edev, false,
 664                                   "100G mode needs min. 2 RX/TX queues\n");
 665                         return -EINVAL;
 666                 }
 667
 668                 if ((eth_dev->data->nb_rx_queues % 2 != 0) ||
 669                     (eth_dev->data->nb_tx_queues % 2 != 0)) {
 670                         DP_NOTICE(edev, false,
 671                                   "100G mode needs even no. of RX/TX queues\n");
 672                         return -EINVAL;
 673                 }
 674         }
 675
 676         /* Sanity checks and throw warnings */
 677         if (rxmode->enable_scatter == 1)
 678                 eth_dev->data->scattered_rx = 1;
 679
 680         if (rxmode->enable_lro == 1) {
 681                 DP_INFO(edev, "LRO is not supported\n");
 682                 return -EINVAL;
 683         }
 684
 685         if (!rxmode->hw_strip_crc)
 686                 DP_INFO(edev, "L2 CRC stripping is always enabled in hw\n");
 687
 688         if (!rxmode->hw_ip_checksum)
 689                 DP_INFO(edev, "IP/UDP/TCP checksum offload is always enabled "
 690                               "in hw\n");
 691
 692         /* Check for the port restart case */
 693         if (qdev->state != QEDE_DEV_INIT) {
 694                 rc = qdev->ops->vport_stop(edev, 0);
 695                 if (rc != 0)
 696                         return rc;
 697                 qede_dealloc_fp_resc(eth_dev);
 698         }
 699
 700         qdev->fp_num_tx = eth_dev->data->nb_tx_queues;
 701         qdev->fp_num_rx = eth_dev->data->nb_rx_queues;
 702         qdev->num_queues = qdev->fp_num_tx + qdev->fp_num_rx;
 703
 704         /* Fastpath status block should be initialized before sending
 705          * VPORT-START in the case of VF. Anyway, do it for both VF/PF.
 706          */
 707         rc = qede_alloc_fp_resc(qdev);
 708         if (rc != 0)
 709                 return rc;
 710
 711         /* Issue VPORT-START with default config values to allow
 712          * other port configurations early on.
 713          */
 714         rc = qede_init_vport(qdev);
 715         if (rc != 0)
 716                 return rc;
 717
 718         SLIST_INIT(&qdev->vlan_list_head);
 719
 720         /* Enable VLAN offloads by default */
 721         qede_vlan_offload_set(eth_dev, ETH_VLAN_STRIP_MASK  |
 722                                        ETH_VLAN_FILTER_MASK |
 723                                        ETH_VLAN_EXTEND_MASK);
 724
 725         qdev->state = QEDE_DEV_CONFIG;
 726
 727         DP_INFO(edev, "Allocated RSS=%d TSS=%d (with CoS=%d)\n",
 728                 (int)QEDE_RSS_COUNT(qdev), (int)QEDE_TSS_COUNT(qdev),
 729                 qdev->num_tc);
 730
 731         return 0;
 732 }
 733
 734 /* Info about HW descriptor ring limitations */
 735 static const struct rte_eth_desc_lim qede_rx_desc_lim = {
 736         .nb_max = NUM_RX_BDS_MAX,
 737         .nb_min = 128,
 738         .nb_align = 128 /* lowest common multiple */
 739 };
 740
 741 static const struct rte_eth_desc_lim qede_tx_desc_lim = {
 742         .nb_max = NUM_TX_BDS_MAX,
 743         .nb_min = 256,
 744         .nb_align = 256
 745 };
 746
 747 static void
 748 qede_dev_info_get(struct rte_eth_dev *eth_dev,
 749                   struct rte_eth_dev_info *dev_info)
 750 {
 751         struct qede_dev *qdev = eth_dev->data->dev_private;
 752         struct ecore_dev *edev = &qdev->edev;
 753         struct qed_link_output link;
 754         uint32_t speed_cap = 0;
 755
 756         PMD_INIT_FUNC_TRACE(edev);
 757
 758         dev_info->min_rx_bufsize = (uint32_t)(ETHER_MIN_MTU +
 759                                               QEDE_ETH_OVERHEAD);
 760         dev_info->max_rx_pktlen = (uint32_t)ETH_TX_MAX_NON_LSO_PKT_LEN;
 761         dev_info->rx_desc_lim = qede_rx_desc_lim;
 762         dev_info->tx_desc_lim = qede_tx_desc_lim;
 763         dev_info->max_rx_queues = (uint16_t)QEDE_MAX_RSS_CNT(qdev);
 764         dev_info->max_tx_queues = dev_info->max_rx_queues;
 765         dev_info->max_mac_addrs = qdev->dev_info.num_mac_addrs;
 766         if (IS_VF(edev))
 767                 dev_info->max_vfs = 0;
 768         else
 769                 dev_info->max_vfs = (uint16_t)NUM_OF_VFS(&qdev->edev);
 770         dev_info->driver_name = qdev->drv_ver;
 771         dev_info->reta_size = ECORE_RSS_IND_TABLE_SIZE;
 772         dev_info->flow_type_rss_offloads = (uint64_t)QEDE_RSS_OFFLOAD_ALL;
 773
 774         dev_info->default_txconf = (struct rte_eth_txconf) {
 775                 .txq_flags = QEDE_TXQ_FLAGS,
 776         };
 777
 778         dev_info->rx_offload_capa = (DEV_RX_OFFLOAD_VLAN_STRIP |
 779                                      DEV_RX_OFFLOAD_IPV4_CKSUM |
 780                                      DEV_RX_OFFLOAD_UDP_CKSUM |
 781                                      DEV_RX_OFFLOAD_TCP_CKSUM);
 782         dev_info->tx_offload_capa = (DEV_TX_OFFLOAD_VLAN_INSERT |
 783                                      DEV_TX_OFFLOAD_IPV4_CKSUM |
 784                                      DEV_TX_OFFLOAD_UDP_CKSUM |
 785                                      DEV_TX_OFFLOAD_TCP_CKSUM);
 786
 787         memset(&link, 0, sizeof(struct qed_link_output));
 788         qdev->ops->common->get_link(edev, &link);
 789         if (link.adv_speed & NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_1G)
 790                 speed_cap |= ETH_LINK_SPEED_1G;
 791         if (link.adv_speed & NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_10G)
 792                 speed_cap |= ETH_LINK_SPEED_10G;
 793         if (link.adv_speed & NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_25G)
 794                 speed_cap |= ETH_LINK_SPEED_25G;
 795         if (link.adv_speed & NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_40G)
 796                 speed_cap |= ETH_LINK_SPEED_40G;
 797         if (link.adv_speed & NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_50G)
 798                 speed_cap |= ETH_LINK_SPEED_50G;
 799         if (link.adv_speed & NVM_CFG1_PORT_DRV_SPEED_CAPABILITY_MASK_BB_100G)
 800                 speed_cap |= ETH_LINK_SPEED_100G;
 801         dev_info->speed_capa = speed_cap;
 802 }
 803
 804 /* return 0 means link status changed, -1 means not changed */
 805 static int
 806 qede_link_update(struct rte_eth_dev *eth_dev, __rte_unused int wait_to_complete)
 807 {
 808         struct qede_dev *qdev = eth_dev->data->dev_private;
 809         struct ecore_dev *edev = &qdev->edev;
 810         uint16_t link_duplex;
 811         struct qed_link_output link;
 812         struct rte_eth_link *curr = &eth_dev->data->dev_link;
 813
 814         memset(&link, 0, sizeof(struct qed_link_output));
 815         qdev->ops->common->get_link(edev, &link);
 816
 817         /* Link Speed */
 818         curr->link_speed = link.speed;
 819
 820         /* Link Mode */
 821         switch (link.duplex) {
 822         case QEDE_DUPLEX_HALF:
 823                 link_duplex = ETH_LINK_HALF_DUPLEX;
 824                 break;
 825         case QEDE_DUPLEX_FULL:
 826                 link_duplex = ETH_LINK_FULL_DUPLEX;
 827                 break;
 828         case QEDE_DUPLEX_UNKNOWN:
 829         default:
 830                 link_duplex = -1;
 831         }
 832         curr->link_duplex = link_duplex;
 833
 834         /* Link Status */
 835         curr->link_status = (link.link_up) ? ETH_LINK_UP : ETH_LINK_DOWN;
 836
 837         /* AN */
 838         curr->link_autoneg = (link.supported_caps & QEDE_SUPPORTED_AUTONEG) ?
 839                              ETH_LINK_AUTONEG : ETH_LINK_FIXED;
 840
 841         DP_INFO(edev, "Link - Speed %u Mode %u AN %u Status %u\n",
 842                 curr->link_speed, curr->link_duplex,
 843                 curr->link_autoneg, curr->link_status);
 844
 845         /* return 0 means link status changed, -1 means not changed */
 846         return ((curr->link_status == link.link_up) ? -1 : 0);
 847 }
 848
 849 static void qede_promiscuous_enable(struct rte_eth_dev *eth_dev)
 850 {
 851         struct qede_dev *qdev = eth_dev->data->dev_private;
 852         struct ecore_dev *edev = &qdev->edev;
 853
 854         PMD_INIT_FUNC_TRACE(edev);
 855
 856         enum qed_filter_rx_mode_type type = QED_FILTER_RX_MODE_TYPE_PROMISC;
 857
 858         if (rte_eth_allmulticast_get(eth_dev->data->port_id) == 1)
 859                 type |= QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC;
 860
 861         qed_configure_filter_rx_mode(eth_dev, type);
 862 }
 863
 864 static void qede_promiscuous_disable(struct rte_eth_dev *eth_dev)
 865 {
 866         struct qede_dev *qdev = eth_dev->data->dev_private;
 867         struct ecore_dev *edev = &qdev->edev;
 868
 869         PMD_INIT_FUNC_TRACE(edev);
 870
 871         if (rte_eth_allmulticast_get(eth_dev->data->port_id) == 1)
 872                 qed_configure_filter_rx_mode(eth_dev,
 873                                 QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC);
 874         else
 875                 qed_configure_filter_rx_mode(eth_dev,
 876                                 QED_FILTER_RX_MODE_TYPE_REGULAR);
 877 }
 878
 879 static void qede_poll_sp_sb_cb(void *param)
 880 {
 881         struct rte_eth_dev *eth_dev = (struct rte_eth_dev *)param;
 882         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
 883         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
 884         int rc;
 885
 886         qede_interrupt_action(ECORE_LEADING_HWFN(edev));
 887         qede_interrupt_action(&edev->hwfns[1]);
 888
 889         rc = rte_eal_alarm_set(timer_period * US_PER_S,
 890                                qede_poll_sp_sb_cb,
 891                                (void *)eth_dev);
 892         if (rc != 0) {
 893                 DP_ERR(edev, "Unable to start periodic"
 894                              " timer rc %d\n", rc);
 895                 assert(false && "Unable to start periodic timer");
 896         }
 897 }
 898
 899 static void qede_dev_close(struct rte_eth_dev *eth_dev)
 900 {
 901         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
 902         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
 903         int rc;
 904
 905         PMD_INIT_FUNC_TRACE(edev);
 906
 907         /* dev_stop() shall cleanup fp resources in hw but without releasing
 908          * dma memories and sw structures so that dev_start() can be called
 909          * by the app without reconfiguration. However, in dev_close() we
 910          * can release all the resources and device can be brought up newly
 911          */
 912         if (qdev->state != QEDE_DEV_STOP)
 913                 qede_dev_stop(eth_dev);
 914         else
 915                 DP_INFO(edev, "Device is already stopped\n");
 916
 917         rc = qdev->ops->vport_stop(edev, 0);
 918         if (rc != 0)
 919                 DP_ERR(edev, "Failed to stop VPORT\n");
 920
 921         qede_dealloc_fp_resc(eth_dev);
 922
 923         qdev->ops->common->slowpath_stop(edev);
 924
 925         qdev->ops->common->remove(edev);
 926
 927         rte_intr_disable(&eth_dev->pci_dev->intr_handle);
 928
 929         rte_intr_callback_unregister(&eth_dev->pci_dev->intr_handle,
 930                                      qede_interrupt_handler, (void *)eth_dev);
 931
 932         if (edev->num_hwfns > 1)
 933                 rte_eal_alarm_cancel(qede_poll_sp_sb_cb, (void *)eth_dev);
 934
 935         qdev->state = QEDE_DEV_INIT; /* Go back to init state */
 936 }
 937
 938 static void
 939 qede_get_stats(struct rte_eth_dev *eth_dev, struct rte_eth_stats *eth_stats)
 940 {
 941         struct qede_dev *qdev = eth_dev->data->dev_private;
 942         struct ecore_dev *edev = &qdev->edev;
 943         struct ecore_eth_stats stats;
 944         unsigned int i = 0, j = 0, qid;
 945         unsigned int rxq_stat_cntrs, txq_stat_cntrs;
 946         struct qede_tx_queue *txq;
 947
 948         qdev->ops->get_vport_stats(edev, &stats);
 949
 950         /* RX Stats */
 951         eth_stats->ipackets = stats.rx_ucast_pkts +
 952             stats.rx_mcast_pkts + stats.rx_bcast_pkts;
 953
 954         eth_stats->ibytes = stats.rx_ucast_bytes +
 955             stats.rx_mcast_bytes + stats.rx_bcast_bytes;
 956
 957         eth_stats->ierrors = stats.rx_crc_errors +
 958             stats.rx_align_errors +
 959             stats.rx_carrier_errors +
 960             stats.rx_oversize_packets +
 961             stats.rx_jabbers + stats.rx_undersize_packets;
 962
 963         eth_stats->rx_nombuf = stats.no_buff_discards;
 964
 965         eth_stats->imissed = stats.mftag_filter_discards +
 966             stats.mac_filter_discards +
 967             stats.no_buff_discards + stats.brb_truncates + stats.brb_discards;
 968
 969         /* TX stats */
 970         eth_stats->opackets = stats.tx_ucast_pkts +
 971             stats.tx_mcast_pkts + stats.tx_bcast_pkts;
 972
 973         eth_stats->obytes = stats.tx_ucast_bytes +
 974             stats.tx_mcast_bytes + stats.tx_bcast_bytes;
 975
 976         eth_stats->oerrors = stats.tx_err_drop_pkts;
 977
 978         /* Queue stats */
 979         rxq_stat_cntrs = RTE_MIN(QEDE_RSS_COUNT(qdev),
 980                                RTE_ETHDEV_QUEUE_STAT_CNTRS);
 981         txq_stat_cntrs = RTE_MIN(QEDE_TSS_COUNT(qdev),
 982                                RTE_ETHDEV_QUEUE_STAT_CNTRS);
 983         if ((rxq_stat_cntrs != QEDE_RSS_COUNT(qdev)) ||
 984             (txq_stat_cntrs != QEDE_TSS_COUNT(qdev)))
 985                 DP_VERBOSE(edev, ECORE_MSG_DEBUG,
 986                        "Not all the queue stats will be displayed. Set"
 987                        " RTE_ETHDEV_QUEUE_STAT_CNTRS config param"
 988                        " appropriately and retry.\n");
 989
 990         for (qid = 0; qid < QEDE_QUEUE_CNT(qdev); qid++) {
 991                 if (qdev->fp_array[qid].type & QEDE_FASTPATH_RX) {
 992                         eth_stats->q_ipackets[i] =
 993                                 *(uint64_t *)(
 994                                         ((char *)(qdev->fp_array[(qid)].rxq)) +
 995                                         offsetof(struct qede_rx_queue,
 996                                         rcv_pkts));
 997                         eth_stats->q_errors[i] =
 998                                 *(uint64_t *)(
 999                                         ((char *)(qdev->fp_array[(qid)].rxq)) +
1000                                         offsetof(struct qede_rx_queue,
1001                                         rx_hw_errors)) +
1002                                 *(uint64_t *)(
1003                                         ((char *)(qdev->fp_array[(qid)].rxq)) +
1004                                         offsetof(struct qede_rx_queue,
1005                                         rx_alloc_errors));
1006                         i++;
1007                 }
1008                 if (i == rxq_stat_cntrs)
1009                         break;
1010         }
1011
1012         for (qid = 0; qid < QEDE_QUEUE_CNT(qdev); qid++) {
1013                 if (qdev->fp_array[qid].type & QEDE_FASTPATH_TX) {
1014                         txq = qdev->fp_array[(qid)].txqs[0];
1015                         eth_stats->q_opackets[j] =
1016                                 *((uint64_t *)(uintptr_t)
1017                                         (((uint64_t)(uintptr_t)(txq)) +
1018                                          offsetof(struct qede_tx_queue,
1019                                                   xmit_pkts)));
1020                         j++;
1021                 }
1022                 if (j == txq_stat_cntrs)
1023                         break;
1024         }
1025 }
1026
1027 static unsigned
1028 qede_get_xstats_count(struct qede_dev *qdev) {
1029         return RTE_DIM(qede_xstats_strings) +
1030                 (RTE_DIM(qede_rxq_xstats_strings) *
1031                  RTE_MIN(QEDE_RSS_COUNT(qdev),
1032                          RTE_ETHDEV_QUEUE_STAT_CNTRS));
1033 }
1034
1035 static int
1036 qede_get_xstats_names(__rte_unused struct rte_eth_dev *dev,
1037                       struct rte_eth_xstat_name *xstats_names, unsigned limit)
1038 {
1039         struct qede_dev *qdev = dev->data->dev_private;
1040         const unsigned int stat_cnt = qede_get_xstats_count(qdev);
1041         unsigned int i, qid, stat_idx = 0;
1042         unsigned int rxq_stat_cntrs;
1043
1044         if (xstats_names != NULL) {
1045                 for (i = 0; i < RTE_DIM(qede_xstats_strings); i++) {
1046                         snprintf(xstats_names[stat_idx].name,
1047                                 sizeof(xstats_names[stat_idx].name),
1048                                 "%s",
1049                                 qede_xstats_strings[i].name);
1050                         stat_idx++;
1051                 }
1052
1053                 rxq_stat_cntrs = RTE_MIN(QEDE_RSS_COUNT(qdev),
1054                                          RTE_ETHDEV_QUEUE_STAT_CNTRS);
1055                 for (qid = 0; qid < rxq_stat_cntrs; qid++) {
1056                         for (i = 0; i < RTE_DIM(qede_rxq_xstats_strings); i++) {
1057                                 snprintf(xstats_names[stat_idx].name,
1058                                         sizeof(xstats_names[stat_idx].name),
1059                                         "%.4s%d%s",
1060                                         qede_rxq_xstats_strings[i].name, qid,
1061                                         qede_rxq_xstats_strings[i].name + 4);
1062                                 stat_idx++;
1063                         }
1064                 }
1065         }
1066
1067         return stat_cnt;
1068 }
1069
1070 static int
1071 qede_get_xstats(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
1072                 unsigned int n)
1073 {
1074         struct qede_dev *qdev = dev->data->dev_private;
1075         struct ecore_dev *edev = &qdev->edev;
1076         struct ecore_eth_stats stats;
1077         const unsigned int num = qede_get_xstats_count(qdev);
1078         unsigned int i, qid, stat_idx = 0;
1079         unsigned int rxq_stat_cntrs;
1080
1081         if (n < num)
1082                 return num;
1083
1084         qdev->ops->get_vport_stats(edev, &stats);
1085
1086         for (i = 0; i < RTE_DIM(qede_xstats_strings); i++) {
1087                 xstats[stat_idx].value = *(uint64_t *)(((char *)&stats) +
1088                                              qede_xstats_strings[i].offset);
1089                 xstats[stat_idx].id = stat_idx;
1090                 stat_idx++;
1091         }
1092
1093         rxq_stat_cntrs = RTE_MIN(QEDE_RSS_COUNT(qdev),
1094                                  RTE_ETHDEV_QUEUE_STAT_CNTRS);
1095         for (qid = 0; qid < rxq_stat_cntrs; qid++) {
1096                 if (qdev->fp_array[qid].type & QEDE_FASTPATH_RX) {
1097                         for (i = 0; i < RTE_DIM(qede_rxq_xstats_strings); i++) {
1098                                 xstats[stat_idx].value = *(uint64_t *)(
1099                                         ((char *)(qdev->fp_array[(qid)].rxq)) +
1100                                          qede_rxq_xstats_strings[i].offset);
1101                                 xstats[stat_idx].id = stat_idx;
1102                                 stat_idx++;
1103                         }
1104                 }
1105         }
1106
1107         return stat_idx;
1108 }
1109
1110 static void
1111 qede_reset_xstats(struct rte_eth_dev *dev)
1112 {
1113         struct qede_dev *qdev = dev->data->dev_private;
1114         struct ecore_dev *edev = &qdev->edev;
1115
1116         ecore_reset_vport_stats(edev);
1117 }
1118
1119 int qede_dev_set_link_state(struct rte_eth_dev *eth_dev, bool link_up)
1120 {
1121         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
1122         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
1123         struct qed_link_params link_params;
1124         int rc;
1125
1126         DP_INFO(edev, "setting link state %d\n", link_up);
1127         memset(&link_params, 0, sizeof(link_params));
1128         link_params.link_up = link_up;
1129         rc = qdev->ops->common->set_link(edev, &link_params);
1130         if (rc != ECORE_SUCCESS)
1131                 DP_ERR(edev, "Unable to set link state %d\n", link_up);
1132
1133         return rc;
1134 }
1135
1136 static int qede_dev_set_link_up(struct rte_eth_dev *eth_dev)
1137 {
1138         return qede_dev_set_link_state(eth_dev, true);
1139 }
1140
1141 static int qede_dev_set_link_down(struct rte_eth_dev *eth_dev)
1142 {
1143         return qede_dev_set_link_state(eth_dev, false);
1144 }
1145
1146 static void qede_reset_stats(struct rte_eth_dev *eth_dev)
1147 {
1148         struct qede_dev *qdev = eth_dev->data->dev_private;
1149         struct ecore_dev *edev = &qdev->edev;
1150
1151         ecore_reset_vport_stats(edev);
1152 }
1153
1154 static void qede_allmulticast_enable(struct rte_eth_dev *eth_dev)
1155 {
1156         enum qed_filter_rx_mode_type type =
1157             QED_FILTER_RX_MODE_TYPE_MULTI_PROMISC;
1158
1159         if (rte_eth_promiscuous_get(eth_dev->data->port_id) == 1)
1160                 type |= QED_FILTER_RX_MODE_TYPE_PROMISC;
1161
1162         qed_configure_filter_rx_mode(eth_dev, type);
1163 }
1164
1165 static void qede_allmulticast_disable(struct rte_eth_dev *eth_dev)
1166 {
1167         if (rte_eth_promiscuous_get(eth_dev->data->port_id) == 1)
1168                 qed_configure_filter_rx_mode(eth_dev,
1169                                 QED_FILTER_RX_MODE_TYPE_PROMISC);
1170         else
1171                 qed_configure_filter_rx_mode(eth_dev,
1172                                 QED_FILTER_RX_MODE_TYPE_REGULAR);
1173 }
1174
1175 static int qede_flow_ctrl_set(struct rte_eth_dev *eth_dev,
1176                               struct rte_eth_fc_conf *fc_conf)
1177 {
1178         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
1179         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
1180         struct qed_link_output current_link;
1181         struct qed_link_params params;
1182
1183         memset(&current_link, 0, sizeof(current_link));
1184         qdev->ops->common->get_link(edev, &current_link);
1185
1186         memset(&params, 0, sizeof(params));
1187         params.override_flags |= QED_LINK_OVERRIDE_PAUSE_CONFIG;
1188         if (fc_conf->autoneg) {
1189                 if (!(current_link.supported_caps & QEDE_SUPPORTED_AUTONEG)) {
1190                         DP_ERR(edev, "Autoneg not supported\n");
1191                         return -EINVAL;
1192                 }
1193                 params.pause_config |= QED_LINK_PAUSE_AUTONEG_ENABLE;
1194         }
1195
1196         /* Pause is assumed to be supported (SUPPORTED_Pause) */
1197         if (fc_conf->mode == RTE_FC_FULL)
1198                 params.pause_config |= (QED_LINK_PAUSE_TX_ENABLE |
1199                                         QED_LINK_PAUSE_RX_ENABLE);
1200         if (fc_conf->mode == RTE_FC_TX_PAUSE)
1201                 params.pause_config |= QED_LINK_PAUSE_TX_ENABLE;
1202         if (fc_conf->mode == RTE_FC_RX_PAUSE)
1203                 params.pause_config |= QED_LINK_PAUSE_RX_ENABLE;
1204
1205         params.link_up = true;
1206         (void)qdev->ops->common->set_link(edev, &params);
1207
1208         return 0;
1209 }
1210
1211 static int qede_flow_ctrl_get(struct rte_eth_dev *eth_dev,
1212                               struct rte_eth_fc_conf *fc_conf)
1213 {
1214         struct qede_dev *qdev = QEDE_INIT_QDEV(eth_dev);
1215         struct ecore_dev *edev = QEDE_INIT_EDEV(qdev);
1216         struct qed_link_output current_link;
1217
1218         memset(&current_link, 0, sizeof(current_link));
1219         qdev->ops->common->get_link(edev, &current_link);
1220
1221         if (current_link.pause_config & QED_LINK_PAUSE_AUTONEG_ENABLE)
1222                 fc_conf->autoneg = true;
1223
1224         if (current_link.pause_config & (QED_LINK_PAUSE_RX_ENABLE |
1225                                          QED_LINK_PAUSE_TX_ENABLE))
1226                 fc_conf->mode = RTE_FC_FULL;
1227         else if (current_link.pause_config & QED_LINK_PAUSE_RX_ENABLE)
1228                 fc_conf->mode = RTE_FC_RX_PAUSE;
1229         else if (current_link.pause_config & QED_LINK_PAUSE_TX_ENABLE)
1230                 fc_conf->mode = RTE_FC_TX_PAUSE;
1231         else
1232                 fc_conf->mode = RTE_FC_NONE;
1233
1234         return 0;
1235 }
1236
1237 static const uint32_t *
1238 qede_dev_supported_ptypes_get(struct rte_eth_dev *eth_dev)
1239 {
1240         static const uint32_t ptypes[] = {
1241                 RTE_PTYPE_L3_IPV4,
1242                 RTE_PTYPE_L3_IPV6,
1243                 RTE_PTYPE_UNKNOWN
1244         };
1245
1246         if (eth_dev->rx_pkt_burst == qede_recv_pkts)
1247                 return ptypes;
1248
1249         return NULL;
1250 }
1251
1252 void qede_init_rss_caps(uint8_t *rss_caps, uint64_t hf)
1253 {
1254         *rss_caps = 0;
1255         *rss_caps |= (hf & ETH_RSS_IPV4)              ? ECORE_RSS_IPV4 : 0;
1256         *rss_caps |= (hf & ETH_RSS_IPV6)              ? ECORE_RSS_IPV6 : 0;
1257         *rss_caps |= (hf & ETH_RSS_IPV6_EX)           ? ECORE_RSS_IPV6 : 0;
1258         *rss_caps |= (hf & ETH_RSS_NONFRAG_IPV4_TCP)  ? ECORE_RSS_IPV4_TCP : 0;
1259         *rss_caps |= (hf & ETH_RSS_NONFRAG_IPV6_TCP)  ? ECORE_RSS_IPV6_TCP : 0;
1260         *rss_caps |= (hf & ETH_RSS_IPV6_TCP_EX)       ? ECORE_RSS_IPV6_TCP : 0;
1261         *rss_caps |= (hf & ETH_RSS_NONFRAG_IPV4_UDP)  ? ECORE_RSS_IPV4_UDP : 0;
1262         *rss_caps |= (hf & ETH_RSS_NONFRAG_IPV6_UDP)  ? ECORE_RSS_IPV6_UDP : 0;
1263 }
1264
1265 static int qede_rss_hash_update(struct rte_eth_dev *eth_dev,
1266                                 struct rte_eth_rss_conf *rss_conf)
1267 {
1268         struct qed_update_vport_params vport_update_params;
1269         struct qede_dev *qdev = eth_dev->data->dev_private;
1270         struct ecore_dev *edev = &qdev->edev;
1271         uint32_t *key = (uint32_t *)rss_conf->rss_key;
1272         uint64_t hf = rss_conf->rss_hf;
1273         int i;
1274
1275         memset(&vport_update_params, 0, sizeof(vport_update_params));
1276
1277         if (hf != 0) {
1278                 /* Enable RSS */
1279                 qede_init_rss_caps(&qdev->rss_params.rss_caps, hf);
1280                 memcpy(&vport_update_params.rss_params, &qdev->rss_params,
1281                        sizeof(vport_update_params.rss_params));
1282                 if (key)
1283                         memcpy(qdev->rss_params.rss_key, rss_conf->rss_key,
1284                                rss_conf->rss_key_len);
1285                 vport_update_params.update_rss_flg = 1;
1286                 qdev->rss_enabled = 1;
1287         } else {
1288                 /* Disable RSS */
1289                 qdev->rss_enabled = 0;
1290         }
1291
1292         /* If the mapping doesn't fit any supported, return */
1293         if (qdev->rss_params.rss_caps == 0 && hf != 0)
1294                 return -EINVAL;
1295
1296         DP_INFO(edev, "%s\n", (vport_update_params.update_rss_flg) ?
1297                                 "Enabling RSS" : "Disabling RSS");
1298
1299         vport_update_params.vport_id = 0;
1300
1301         return qdev->ops->vport_update(edev, &vport_update_params);
1302 }
1303
1304 int qede_rss_hash_conf_get(struct rte_eth_dev *eth_dev,
1305                            struct rte_eth_rss_conf *rss_conf)
1306 {
1307         struct qede_dev *qdev = eth_dev->data->dev_private;
1308         uint64_t hf;
1309
1310         if (rss_conf->rss_key_len < sizeof(qdev->rss_params.rss_key))
1311                 return -EINVAL;
1312
1313         if (rss_conf->rss_key)
1314                 memcpy(rss_conf->rss_key, qdev->rss_params.rss_key,
1315                        sizeof(qdev->rss_params.rss_key));
1316
1317         hf = 0;
1318         hf |= (qdev->rss_params.rss_caps & ECORE_RSS_IPV4)     ?
1319                         ETH_RSS_IPV4 : 0;
1320         hf |= (qdev->rss_params.rss_caps & ECORE_RSS_IPV6)     ?
1321                         ETH_RSS_IPV6 : 0;
1322         hf |= (qdev->rss_params.rss_caps & ECORE_RSS_IPV6)     ?
1323                         ETH_RSS_IPV6_EX : 0;
1324         hf |= (qdev->rss_params.rss_caps & ECORE_RSS_IPV4_TCP) ?
1325                         ETH_RSS_NONFRAG_IPV4_TCP : 0;
1326         hf |= (qdev->rss_params.rss_caps & ECORE_RSS_IPV6_TCP) ?
1327                         ETH_RSS_NONFRAG_IPV6_TCP : 0;
1328         hf |= (qdev->rss_params.rss_caps & ECORE_RSS_IPV6_TCP) ?
1329                         ETH_RSS_IPV6_TCP_EX : 0;
1330
1331         rss_conf->rss_hf = hf;
1332
1333         return 0;
1334 }
1335
1336 static int qede_rss_reta_update(struct rte_eth_dev *eth_dev,
1337                                 struct rte_eth_rss_reta_entry64 *reta_conf,
1338                                 uint16_t reta_size)
1339 {
1340         struct qed_update_vport_params vport_update_params;
1341         struct qede_dev *qdev = eth_dev->data->dev_private;
1342         struct ecore_dev *edev = &qdev->edev;
1343         uint16_t i, idx, shift;
1344
1345         if (reta_size > ETH_RSS_RETA_SIZE_128) {
1346                 DP_ERR(edev, "reta_size %d is not supported by hardware\n",
1347                        reta_size);
1348                 return -EINVAL;
1349         }
1350
1351         memset(&vport_update_params, 0, sizeof(vport_update_params));
1352         memcpy(&vport_update_params.rss_params, &qdev->rss_params,
1353                sizeof(vport_update_params.rss_params));
1354
1355         for (i = 0; i < reta_size; i++) {
1356                 idx = i / RTE_RETA_GROUP_SIZE;
1357                 shift = i % RTE_RETA_GROUP_SIZE;
1358                 if (reta_conf[idx].mask & (1ULL << shift)) {
1359                         uint8_t entry = reta_conf[idx].reta[shift];
1360                         qdev->rss_params.rss_ind_table[i] = entry;
1361                 }
1362         }
1363
1364         vport_update_params.update_rss_flg = 1;
1365         vport_update_params.vport_id = 0;
1366
1367         return qdev->ops->vport_update(edev, &vport_update_params);
1368 }
1369
1370 int qede_rss_reta_query(struct rte_eth_dev *eth_dev,
1371                         struct rte_eth_rss_reta_entry64 *reta_conf,
1372                         uint16_t reta_size)
1373 {
1374         struct qede_dev *qdev = eth_dev->data->dev_private;
1375         uint16_t i, idx, shift;
1376
1377         if (reta_size > ETH_RSS_RETA_SIZE_128) {
1378                 struct ecore_dev *edev = &qdev->edev;
1379                 DP_ERR(edev, "reta_size %d is not supported\n",
1380                        reta_size);
1381         }
1382
1383         for (i = 0; i < reta_size; i++) {
1384                 idx = i / RTE_RETA_GROUP_SIZE;
1385                 shift = i % RTE_RETA_GROUP_SIZE;
1386                 if (reta_conf[idx].mask & (1ULL << shift)) {
1387                         uint8_t entry = qdev->rss_params.rss_ind_table[i];
1388                         reta_conf[idx].reta[shift] = entry;
1389                 }
1390         }
1391
1392         return 0;
1393 }
1394
1395 int qede_set_mtu(struct rte_eth_dev *dev, uint16_t mtu)
1396 {
1397         uint32_t frame_size;
1398         struct qede_dev *qdev = dev->data->dev_private;
1399         struct rte_eth_dev_info dev_info = {0};
1400
1401         qede_dev_info_get(dev, &dev_info);
1402
1403         /* VLAN_TAG = 4 */
1404         frame_size = mtu + ETHER_HDR_LEN + ETHER_CRC_LEN + 4;
1405
1406         if ((mtu < ETHER_MIN_MTU) || (frame_size > dev_info.max_rx_pktlen))
1407                 return -EINVAL;
1408
1409         if (!dev->data->scattered_rx &&
1410             frame_size > dev->data->min_rx_buf_size - RTE_PKTMBUF_HEADROOM)
1411                 return -EINVAL;
1412
1413         if (frame_size > ETHER_MAX_LEN)
1414                 dev->data->dev_conf.rxmode.jumbo_frame = 1;
1415         else
1416                 dev->data->dev_conf.rxmode.jumbo_frame = 0;
1417
1418         /* update max frame size */
1419         dev->data->dev_conf.rxmode.max_rx_pkt_len = frame_size;
1420         qdev->mtu = mtu;
1421         qede_dev_stop(dev);
1422         qede_dev_start(dev);
1423
1424         return 0;
1425 }
1426
1427 static const struct eth_dev_ops qede_eth_dev_ops = {
1428         .dev_configure = qede_dev_configure,
1429         .dev_infos_get = qede_dev_info_get,
1430         .rx_queue_setup = qede_rx_queue_setup,
1431         .rx_queue_release = qede_rx_queue_release,
1432         .tx_queue_setup = qede_tx_queue_setup,
1433         .tx_queue_release = qede_tx_queue_release,
1434         .dev_start = qede_dev_start,
1435         .dev_set_link_up = qede_dev_set_link_up,
1436         .dev_set_link_down = qede_dev_set_link_down,
1437         .link_update = qede_link_update,
1438         .promiscuous_enable = qede_promiscuous_enable,
1439         .promiscuous_disable = qede_promiscuous_disable,
1440         .allmulticast_enable = qede_allmulticast_enable,
1441         .allmulticast_disable = qede_allmulticast_disable,
1442         .dev_stop = qede_dev_stop,
1443         .dev_close = qede_dev_close,
1444         .stats_get = qede_get_stats,
1445         .stats_reset = qede_reset_stats,
1446         .xstats_get = qede_get_xstats,
1447         .xstats_reset = qede_reset_xstats,
1448         .xstats_get_names = qede_get_xstats_names,
1449         .mac_addr_add = qede_mac_addr_add,
1450         .mac_addr_remove = qede_mac_addr_remove,
1451         .mac_addr_set = qede_mac_addr_set,
1452         .vlan_offload_set = qede_vlan_offload_set,
1453         .vlan_filter_set = qede_vlan_filter_set,
1454         .flow_ctrl_set = qede_flow_ctrl_set,
1455         .flow_ctrl_get = qede_flow_ctrl_get,
1456         .dev_supported_ptypes_get = qede_dev_supported_ptypes_get,
1457         .rss_hash_update = qede_rss_hash_update,
1458         .rss_hash_conf_get = qede_rss_hash_conf_get,
1459         .reta_update  = qede_rss_reta_update,
1460         .reta_query  = qede_rss_reta_query,
1461         .mtu_set = qede_set_mtu,
1462 };
1463
1464 static const struct eth_dev_ops qede_eth_vf_dev_ops = {
1465         .dev_configure = qede_dev_configure,
1466         .dev_infos_get = qede_dev_info_get,
1467         .rx_queue_setup = qede_rx_queue_setup,
1468         .rx_queue_release = qede_rx_queue_release,
1469         .tx_queue_setup = qede_tx_queue_setup,
1470         .tx_queue_release = qede_tx_queue_release,
1471         .dev_start = qede_dev_start,
1472         .dev_set_link_up = qede_dev_set_link_up,
1473         .dev_set_link_down = qede_dev_set_link_down,
1474         .link_update = qede_link_update,
1475         .promiscuous_enable = qede_promiscuous_enable,
1476         .promiscuous_disable = qede_promiscuous_disable,
1477         .allmulticast_enable = qede_allmulticast_enable,
1478         .allmulticast_disable = qede_allmulticast_disable,
1479         .dev_stop = qede_dev_stop,
1480         .dev_close = qede_dev_close,
1481         .stats_get = qede_get_stats,
1482         .stats_reset = qede_reset_stats,
1483         .xstats_get = qede_get_xstats,
1484         .xstats_reset = qede_reset_xstats,
1485         .xstats_get_names = qede_get_xstats_names,
1486         .vlan_offload_set = qede_vlan_offload_set,
1487         .vlan_filter_set = qede_vlan_filter_set,
1488         .dev_supported_ptypes_get = qede_dev_supported_ptypes_get,
1489         .rss_hash_update = qede_rss_hash_update,
1490         .rss_hash_conf_get = qede_rss_hash_conf_get,
1491         .reta_update  = qede_rss_reta_update,
1492         .reta_query  = qede_rss_reta_query,
1493         .mtu_set = qede_set_mtu,
1494 };
1495
1496 static void qede_update_pf_params(struct ecore_dev *edev)
1497 {
1498         struct ecore_pf_params pf_params;
1499         /* 32 rx + 32 tx */
1500         memset(&pf_params, 0, sizeof(struct ecore_pf_params));
1501         pf_params.eth_pf_params.num_cons = 64;
1502         qed_ops->common->update_pf_params(edev, &pf_params);
1503 }
1504
1505 static int qede_common_dev_init(struct rte_eth_dev *eth_dev, bool is_vf)
1506 {
1507         struct rte_pci_device *pci_dev;
1508         struct rte_pci_addr pci_addr;
1509         struct qede_dev *adapter;
1510         struct ecore_dev *edev;
1511         struct qed_dev_eth_info dev_info;
1512         struct qed_slowpath_params params;
1513         static bool do_once = true;
1514         uint8_t bulletin_change;
1515         uint8_t vf_mac[ETHER_ADDR_LEN];
1516         uint8_t is_mac_forced;
1517         bool is_mac_exist;
1518         /* Fix up ecore debug level */
1519         uint32_t dp_module = ~0 & ~ECORE_MSG_HW;
1520         uint8_t dp_level = ECORE_LEVEL_VERBOSE;
1521         uint32_t max_mac_addrs;
1522         int rc;
1523
1524         /* Extract key data structures */
1525         adapter = eth_dev->data->dev_private;
1526         edev = &adapter->edev;
1527         pci_addr = eth_dev->pci_dev->addr;
1528
1529         PMD_INIT_FUNC_TRACE(edev);
1530
1531         snprintf(edev->name, NAME_SIZE, PCI_SHORT_PRI_FMT ":dpdk-port-%u",
1532                  pci_addr.bus, pci_addr.devid, pci_addr.function,
1533                  eth_dev->data->port_id);
1534
1535         eth_dev->rx_pkt_burst = qede_recv_pkts;
1536         eth_dev->tx_pkt_burst = qede_xmit_pkts;
1537
1538         if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
1539                 DP_NOTICE(edev, false,
1540                           "Skipping device init from secondary process\n");
1541                 return 0;
1542         }
1543
1544         pci_dev = eth_dev->pci_dev;
1545
1546         rte_eth_copy_pci_info(eth_dev, pci_dev);
1547
1548         /* @DPDK */
1549         edev->vendor_id = pci_dev->id.vendor_id;
1550         edev->device_id = pci_dev->id.device_id;
1551
1552         qed_ops = qed_get_eth_ops();
1553         if (!qed_ops) {
1554                 DP_ERR(edev, "Failed to get qed_eth_ops_pass\n");
1555                 return -EINVAL;
1556         }
1557
1558         DP_INFO(edev, "Starting qede probe\n");
1559
1560         rc = qed_ops->common->probe(edev, pci_dev, QED_PROTOCOL_ETH,
1561                                     dp_module, dp_level, is_vf);
1562
1563         if (rc != 0) {
1564                 DP_ERR(edev, "qede probe failed rc %d\n", rc);
1565                 return -ENODEV;
1566         }
1567
1568         qede_update_pf_params(edev);
1569
1570         rte_intr_callback_register(&eth_dev->pci_dev->intr_handle,
1571                                    qede_interrupt_handler, (void *)eth_dev);
1572
1573         if (rte_intr_enable(&eth_dev->pci_dev->intr_handle)) {
1574                 DP_ERR(edev, "rte_intr_enable() failed\n");
1575                 return -ENODEV;
1576         }
1577
1578         /* Start the Slowpath-process */
1579         memset(&params, 0, sizeof(struct qed_slowpath_params));
1580         params.int_mode = ECORE_INT_MODE_MSIX;
1581         params.drv_major = QEDE_PMD_VERSION_MAJOR;
1582         params.drv_minor = QEDE_PMD_VERSION_MINOR;
1583         params.drv_rev = QEDE_PMD_VERSION_REVISION;
1584         params.drv_eng = QEDE_PMD_VERSION_PATCH;
1585         strncpy((char *)params.name, QEDE_PMD_VER_PREFIX,
1586                 QEDE_PMD_DRV_VER_STR_SIZE);
1587
1588         /* For CMT mode device do periodic polling for slowpath events.
1589          * This is required since uio device uses only one MSI-x
1590          * interrupt vector but we need one for each engine.
1591          */
1592         if (edev->num_hwfns > 1 && IS_PF(edev)) {
1593                 rc = rte_eal_alarm_set(timer_period * US_PER_S,
1594                                        qede_poll_sp_sb_cb,
1595                                        (void *)eth_dev);
1596                 if (rc != 0) {
1597                         DP_ERR(edev, "Unable to start periodic"
1598                                      " timer rc %d\n", rc);
1599                         return -EINVAL;
1600                 }
1601         }
1602
1603         rc = qed_ops->common->slowpath_start(edev, &params);
1604         if (rc) {
1605                 DP_ERR(edev, "Cannot start slowpath rc = %d\n", rc);
1606                 rte_eal_alarm_cancel(qede_poll_sp_sb_cb,
1607                                      (void *)eth_dev);
1608                 return -ENODEV;
1609         }
1610
1611         rc = qed_ops->fill_dev_info(edev, &dev_info);
1612         if (rc) {
1613                 DP_ERR(edev, "Cannot get device_info rc %d\n", rc);
1614                 qed_ops->common->slowpath_stop(edev);
1615                 qed_ops->common->remove(edev);
1616                 rte_eal_alarm_cancel(qede_poll_sp_sb_cb,
1617                                      (void *)eth_dev);
1618                 return -ENODEV;
1619         }
1620
1621         qede_alloc_etherdev(adapter, &dev_info);
1622
1623         adapter->ops->common->set_id(edev, edev->name, QEDE_PMD_VERSION);
1624
1625         if (!is_vf)
1626                 adapter->dev_info.num_mac_addrs =
1627                         (uint32_t)RESC_NUM(ECORE_LEADING_HWFN(edev),
1628                                             ECORE_MAC);
1629         else
1630                 ecore_vf_get_num_mac_filters(ECORE_LEADING_HWFN(edev),
1631                                              &adapter->dev_info.num_mac_addrs);
1632
1633         /* Allocate memory for storing MAC addr */
1634         eth_dev->data->mac_addrs = rte_zmalloc(edev->name,
1635                                         (ETHER_ADDR_LEN *
1636                                         adapter->dev_info.num_mac_addrs),
1637                                         RTE_CACHE_LINE_SIZE);
1638
1639         if (eth_dev->data->mac_addrs == NULL) {
1640                 DP_ERR(edev, "Failed to allocate MAC address\n");
1641                 qed_ops->common->slowpath_stop(edev);
1642                 qed_ops->common->remove(edev);
1643                 rte_eal_alarm_cancel(qede_poll_sp_sb_cb,
1644                                      (void *)eth_dev);
1645                 return -ENOMEM;
1646         }
1647
1648         if (!is_vf) {
1649                 ether_addr_copy((struct ether_addr *)edev->hwfns[0].
1650                                 hw_info.hw_mac_addr,
1651                                 &eth_dev->data->mac_addrs[0]);
1652                 ether_addr_copy(&eth_dev->data->mac_addrs[0],
1653                                 &adapter->primary_mac);
1654         } else {
1655                 ecore_vf_read_bulletin(ECORE_LEADING_HWFN(edev),
1656                                        &bulletin_change);
1657                 if (bulletin_change) {
1658                         is_mac_exist =
1659                             ecore_vf_bulletin_get_forced_mac(
1660                                                 ECORE_LEADING_HWFN(edev),
1661                                                 vf_mac,
1662                                                 &is_mac_forced);
1663                         if (is_mac_exist && is_mac_forced) {
1664                                 DP_INFO(edev, "VF macaddr received from PF\n");
1665                                 ether_addr_copy((struct ether_addr *)&vf_mac,
1666                                                 &eth_dev->data->mac_addrs[0]);
1667                                 ether_addr_copy(&eth_dev->data->mac_addrs[0],
1668                                                 &adapter->primary_mac);
1669                         } else {
1670                                 DP_NOTICE(edev, false,
1671                                           "No VF macaddr assigned\n");
1672                         }
1673                 }
1674         }
1675
1676         eth_dev->dev_ops = (is_vf) ? &qede_eth_vf_dev_ops : &qede_eth_dev_ops;
1677
1678         if (do_once) {
1679                 qede_print_adapter_info(adapter);
1680                 do_once = false;
1681         }
1682
1683         adapter->state = QEDE_DEV_INIT;
1684
1685         DP_NOTICE(edev, false, "MAC address : %02x:%02x:%02x:%02x:%02x:%02x\n",
1686                   adapter->primary_mac.addr_bytes[0],
1687                   adapter->primary_mac.addr_bytes[1],
1688                   adapter->primary_mac.addr_bytes[2],
1689                   adapter->primary_mac.addr_bytes[3],
1690                   adapter->primary_mac.addr_bytes[4],
1691                   adapter->primary_mac.addr_bytes[5]);
1692
1693         return rc;
1694 }
1695
1696 static int qedevf_eth_dev_init(struct rte_eth_dev *eth_dev)
1697 {
1698         return qede_common_dev_init(eth_dev, 1);
1699 }
1700
1701 static int qede_eth_dev_init(struct rte_eth_dev *eth_dev)
1702 {
1703         return qede_common_dev_init(eth_dev, 0);
1704 }
1705
1706 static int qede_dev_common_uninit(struct rte_eth_dev *eth_dev)
1707 {
1708         /* only uninitialize in the primary process */
1709         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
1710                 return 0;
1711
1712         /* safe to close dev here */
1713         qede_dev_close(eth_dev);
1714
1715         eth_dev->dev_ops = NULL;
1716         eth_dev->rx_pkt_burst = NULL;
1717         eth_dev->tx_pkt_burst = NULL;
1718
1719         if (eth_dev->data->mac_addrs)
1720                 rte_free(eth_dev->data->mac_addrs);
1721
1722         eth_dev->data->mac_addrs = NULL;
1723
1724         return 0;
1725 }
1726
1727 static int qede_eth_dev_uninit(struct rte_eth_dev *eth_dev)
1728 {
1729         return qede_dev_common_uninit(eth_dev);
1730 }
1731
1732 static int qedevf_eth_dev_uninit(struct rte_eth_dev *eth_dev)
1733 {
1734         return qede_dev_common_uninit(eth_dev);
1735 }
1736
1737 static struct rte_pci_id pci_id_qedevf_map[] = {
1738 #define QEDEVF_RTE_PCI_DEVICE(dev) RTE_PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, dev)
1739         {
1740                 QEDEVF_RTE_PCI_DEVICE(PCI_DEVICE_ID_NX2_VF)
1741         },
1742         {
1743                 QEDEVF_RTE_PCI_DEVICE(PCI_DEVICE_ID_57980S_IOV)
1744         },
1745         {.vendor_id = 0,}
1746 };
1747
1748 static struct rte_pci_id pci_id_qede_map[] = {
1749 #define QEDE_RTE_PCI_DEVICE(dev) RTE_PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, dev)
1750         {
1751                 QEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_NX2_57980E)
1752         },
1753         {
1754                 QEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_NX2_57980S)
1755         },
1756         {
1757                 QEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_57980S_40)
1758         },
1759         {
1760                 QEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_57980S_25)
1761         },
1762         {
1763                 QEDE_RTE_PCI_DEVICE(PCI_DEVICE_ID_57980S_100)
1764         },
1765         {.vendor_id = 0,}
1766 };
1767
1768 static struct eth_driver rte_qedevf_pmd = {
1769         .pci_drv = {
1770                     .id_table = pci_id_qedevf_map,
1771                     .drv_flags =
1772                     RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
1773                     .probe = rte_eth_dev_pci_probe,
1774                     .remove = rte_eth_dev_pci_remove,
1775                    },
1776         .eth_dev_init = qedevf_eth_dev_init,
1777         .eth_dev_uninit = qedevf_eth_dev_uninit,
1778         .dev_private_size = sizeof(struct qede_dev),
1779 };
1780
1781 static struct eth_driver rte_qede_pmd = {
1782         .pci_drv = {
1783                     .id_table = pci_id_qede_map,
1784                     .drv_flags =
1785                     RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
1786                     .probe = rte_eth_dev_pci_probe,
1787                     .remove = rte_eth_dev_pci_remove,
1788                    },
1789         .eth_dev_init = qede_eth_dev_init,
1790         .eth_dev_uninit = qede_eth_dev_uninit,
1791         .dev_private_size = sizeof(struct qede_dev),
1792 };
1793
1794 RTE_PMD_REGISTER_PCI(net_qede, rte_qede_pmd.pci_drv);
1795 RTE_PMD_REGISTER_PCI_TABLE(net_qede, pci_id_qede_map);
1796 RTE_PMD_REGISTER_PCI(net_qede_vf, rte_qedevf_pmd.pci_drv);
1797 RTE_PMD_REGISTER_PCI_TABLE(net_qede_vf, pci_id_qedevf_map);