drivers/net/sfc/base/ef10_mac.c

   1 /*
   2  * Copyright (c) 2012-2016 Solarflare Communications Inc.
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are met:
   7  *
   8  * 1. Redistributions of source code must retain the above copyright notice,
   9  *    this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright notice,
  11  *    this list of conditions and the following disclaimer in the documentation
  12  *    and/or other materials provided with the distribution.
  13  *
  14  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  15  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
  16  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  17  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
  18  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
  19  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  20  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
  21  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  22  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
  23  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
  24  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  25  *
  26  * The views and conclusions contained in the software and documentation are
  27  * those of the authors and should not be interpreted as representing official
  28  * policies, either expressed or implied, of the FreeBSD Project.
  29  */
  30
  31 #include "efx.h"
  32 #include "efx_impl.h"
  33
  34
  35 #if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD
  36
  37         __checkReturn   efx_rc_t
  38 ef10_mac_poll(
  39         __in            efx_nic_t *enp,
  40         __out           efx_link_mode_t *link_modep)
  41 {
  42         efx_port_t *epp = &(enp->en_port);
  43         ef10_link_state_t els;
  44         efx_rc_t rc;
  45
  46         if ((rc = ef10_phy_get_link(enp, &els)) != 0)
  47                 goto fail1;
  48
  49         epp->ep_adv_cap_mask = els.els_adv_cap_mask;
  50         epp->ep_fcntl = els.els_fcntl;
  51
  52         *link_modep = els.els_link_mode;
  53
  54         return (0);
  55
  56 fail1:
  57         EFSYS_PROBE1(fail1, efx_rc_t, rc);
  58
  59         *link_modep = EFX_LINK_UNKNOWN;
  60
  61         return (rc);
  62 }
  63
  64         __checkReturn   efx_rc_t
  65 ef10_mac_up(
  66         __in            efx_nic_t *enp,
  67         __out           boolean_t *mac_upp)
  68 {
  69         ef10_link_state_t els;
  70         efx_rc_t rc;
  71
  72         /*
  73          * Because EF10 doesn't *require* polling, we can't rely on
  74          * ef10_mac_poll() being executed to populate epp->ep_mac_up.
  75          */
  76         if ((rc = ef10_phy_get_link(enp, &els)) != 0)
  77                 goto fail1;
  78
  79         *mac_upp = els.els_mac_up;
  80
  81         return (0);
  82
  83 fail1:
  84         EFSYS_PROBE1(fail1, efx_rc_t, rc);
  85
  86         return (rc);
  87 }
  88
  89 /*
  90  * EF10 adapters use MC_CMD_VADAPTOR_SET_MAC to set the
  91  * MAC address; the address field in MC_CMD_SET_MAC has no
  92  * effect.
  93  * MC_CMD_VADAPTOR_SET_MAC requires mac-spoofing privilege and
  94  * the port to have no filters or queues active.
  95  */
  96 static  __checkReturn   efx_rc_t
  97 efx_mcdi_vadapter_set_mac(
  98         __in            efx_nic_t *enp)
  99 {
 100         efx_port_t *epp = &(enp->en_port);
 101         efx_mcdi_req_t req;
 102         EFX_MCDI_DECLARE_BUF(payload, MC_CMD_VADAPTOR_SET_MAC_IN_LEN,
 103                 MC_CMD_VADAPTOR_SET_MAC_OUT_LEN);
 104         efx_rc_t rc;
 105
 106         req.emr_cmd = MC_CMD_VADAPTOR_SET_MAC;
 107         req.emr_in_buf = payload;
 108         req.emr_in_length = MC_CMD_VADAPTOR_SET_MAC_IN_LEN;
 109         req.emr_out_buf = payload;
 110         req.emr_out_length = MC_CMD_VADAPTOR_SET_MAC_OUT_LEN;
 111
 112         MCDI_IN_SET_DWORD(req, VADAPTOR_SET_MAC_IN_UPSTREAM_PORT_ID,
 113             enp->en_vport_id);
 114         EFX_MAC_ADDR_COPY(MCDI_IN2(req, uint8_t, VADAPTOR_SET_MAC_IN_MACADDR),
 115             epp->ep_mac_addr);
 116
 117         efx_mcdi_execute(enp, &req);
 118
 119         if (req.emr_rc != 0) {
 120                 rc = req.emr_rc;
 121                 goto fail1;
 122         }
 123
 124         return (0);
 125
 126 fail1:
 127         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 128
 129         return (rc);
 130 }
 131
 132         __checkReturn   efx_rc_t
 133 ef10_mac_addr_set(
 134         __in            efx_nic_t *enp)
 135 {
 136         efx_rc_t rc;
 137
 138         if ((rc = efx_mcdi_vadapter_set_mac(enp)) != 0) {
 139                 if (rc != ENOTSUP)
 140                         goto fail1;
 141
 142                 /*
 143                  * Fallback for older Huntington firmware without Vadapter
 144                  * support.
 145                  */
 146                 if ((rc = ef10_mac_reconfigure(enp)) != 0)
 147                         goto fail2;
 148         }
 149
 150         return (0);
 151
 152 fail2:
 153         EFSYS_PROBE(fail2);
 154
 155 fail1:
 156         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 157
 158         return (rc);
 159 }
 160
 161 static  __checkReturn   efx_rc_t
 162 efx_mcdi_mtu_set(
 163         __in            efx_nic_t *enp,
 164         __in            uint32_t mtu)
 165 {
 166         efx_mcdi_req_t req;
 167         EFX_MCDI_DECLARE_BUF(payload, MC_CMD_SET_MAC_EXT_IN_LEN,
 168                 MC_CMD_SET_MAC_OUT_LEN);
 169         efx_rc_t rc;
 170
 171         req.emr_cmd = MC_CMD_SET_MAC;
 172         req.emr_in_buf = payload;
 173         req.emr_in_length = MC_CMD_SET_MAC_EXT_IN_LEN;
 174         req.emr_out_buf = payload;
 175         req.emr_out_length = MC_CMD_SET_MAC_OUT_LEN;
 176
 177         /* Only configure the MTU in this call to MC_CMD_SET_MAC */
 178         MCDI_IN_SET_DWORD(req, SET_MAC_EXT_IN_MTU, mtu);
 179         MCDI_IN_POPULATE_DWORD_1(req, SET_MAC_EXT_IN_CONTROL,
 180                             SET_MAC_EXT_IN_CFG_MTU, 1);
 181
 182         efx_mcdi_execute(enp, &req);
 183
 184         if (req.emr_rc != 0) {
 185                 rc = req.emr_rc;
 186                 goto fail1;
 187         }
 188
 189         return (0);
 190
 191 fail1:
 192         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 193
 194         return (rc);
 195 }
 196
 197 static  __checkReturn           efx_rc_t
 198 efx_mcdi_mtu_get(
 199         __in            efx_nic_t *enp,
 200         __out           size_t *mtu)
 201 {
 202         efx_mcdi_req_t req;
 203         EFX_MCDI_DECLARE_BUF(payload, MC_CMD_SET_MAC_EXT_IN_LEN,
 204                 MC_CMD_SET_MAC_V2_OUT_LEN);
 205         efx_rc_t rc;
 206
 207         req.emr_cmd = MC_CMD_SET_MAC;
 208         req.emr_in_buf = payload;
 209         req.emr_in_length = MC_CMD_SET_MAC_EXT_IN_LEN;
 210         req.emr_out_buf = payload;
 211         req.emr_out_length = MC_CMD_SET_MAC_V2_OUT_LEN;
 212
 213         /*
 214          * With MC_CMD_SET_MAC_EXT_IN_CONTROL set to 0, this just queries the
 215          * MTU.  This should always be supported on Medford, but it is not
 216          * supported on older Huntington firmware.
 217          */
 218         MCDI_IN_SET_DWORD(req, SET_MAC_EXT_IN_CONTROL, 0);
 219
 220         efx_mcdi_execute(enp, &req);
 221
 222         if (req.emr_rc != 0) {
 223                 rc = req.emr_rc;
 224                 goto fail1;
 225         }
 226         if (req.emr_out_length_used < MC_CMD_SET_MAC_V2_OUT_MTU_OFST + 4) {
 227                 rc = EMSGSIZE;
 228                 goto fail2;
 229         }
 230
 231         *mtu = MCDI_OUT_DWORD(req, SET_MAC_V2_OUT_MTU);
 232
 233         return (0);
 234
 235 fail2:
 236         EFSYS_PROBE(fail2);
 237 fail1:
 238         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 239
 240         return (rc);
 241 }
 242
 243         __checkReturn   efx_rc_t
 244 ef10_mac_pdu_set(
 245         __in            efx_nic_t *enp)
 246 {
 247         efx_port_t *epp = &(enp->en_port);
 248         efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
 249         efx_rc_t rc;
 250
 251         if (encp->enc_enhanced_set_mac_supported) {
 252                 if ((rc = efx_mcdi_mtu_set(enp, epp->ep_mac_pdu)) != 0)
 253                         goto fail1;
 254         } else {
 255                 /*
 256                  * Fallback for older Huntington firmware, which always
 257                  * configure all of the parameters to MC_CMD_SET_MAC. This isn't
 258                  * suitable for setting the MTU on unpriviliged functions.
 259                  */
 260                 if ((rc = ef10_mac_reconfigure(enp)) != 0)
 261                         goto fail2;
 262         }
 263
 264         return (0);
 265
 266 fail2:
 267         EFSYS_PROBE(fail2);
 268 fail1:
 269         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 270
 271         return (rc);
 272 }
 273
 274         __checkReturn           efx_rc_t
 275 ef10_mac_pdu_get(
 276         __in            efx_nic_t *enp,
 277         __out           size_t *pdu)
 278 {
 279         efx_rc_t rc;
 280
 281         if ((rc = efx_mcdi_mtu_get(enp, pdu)) != 0)
 282                 goto fail1;
 283
 284         return (0);
 285
 286 fail1:
 287         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 288
 289         return (rc);
 290 }
 291
 292 __checkReturn   efx_rc_t
 293 ef10_mac_reconfigure(
 294         __in            efx_nic_t *enp)
 295 {
 296         efx_port_t *epp = &(enp->en_port);
 297         efx_mcdi_req_t req;
 298         EFX_MCDI_DECLARE_BUF(payload, MC_CMD_SET_MAC_IN_LEN,
 299                 MC_CMD_SET_MAC_OUT_LEN);
 300         efx_rc_t rc;
 301
 302         req.emr_cmd = MC_CMD_SET_MAC;
 303         req.emr_in_buf = payload;
 304         req.emr_in_length = MC_CMD_SET_MAC_IN_LEN;
 305         req.emr_out_buf = payload;
 306         req.emr_out_length = MC_CMD_SET_MAC_OUT_LEN;
 307
 308         MCDI_IN_SET_DWORD(req, SET_MAC_IN_MTU, epp->ep_mac_pdu);
 309         MCDI_IN_SET_DWORD(req, SET_MAC_IN_DRAIN, epp->ep_mac_drain ? 1 : 0);
 310         EFX_MAC_ADDR_COPY(MCDI_IN2(req, uint8_t, SET_MAC_IN_ADDR),
 311                             epp->ep_mac_addr);
 312
 313         /*
 314          * Note: The Huntington MAC does not support REJECT_BRDCST.
 315          * The REJECT_UNCST flag will also prevent multicast traffic
 316          * from reaching the filters. As Huntington filters drop any
 317          * traffic that does not match a filter it is ok to leave the
 318          * MAC running in promiscuous mode. See bug41141.
 319          *
 320          * FIXME: Does REJECT_UNCST behave the same way on Medford?
 321          */
 322         MCDI_IN_POPULATE_DWORD_2(req, SET_MAC_IN_REJECT,
 323                                     SET_MAC_IN_REJECT_UNCST, 0,
 324                                     SET_MAC_IN_REJECT_BRDCST, 0);
 325
 326         /*
 327          * Flow control, whether it is auto-negotiated or not,
 328          * is set via the PHY advertised capabilities.  When set to
 329          * automatic the MAC will use the PHY settings to determine
 330          * the flow control settings.
 331          */
 332         MCDI_IN_SET_DWORD(req, SET_MAC_IN_FCNTL, MC_CMD_FCNTL_AUTO);
 333
 334         /* Do not include the Ethernet frame checksum in RX packets */
 335         MCDI_IN_POPULATE_DWORD_1(req, SET_MAC_IN_FLAGS,
 336                                     SET_MAC_IN_FLAG_INCLUDE_FCS, 0);
 337
 338         efx_mcdi_execute_quiet(enp, &req);
 339
 340         if (req.emr_rc != 0) {
 341                 /*
 342                  * Unprivileged functions cannot control link state,
 343                  * but still need to configure filters.
 344                  */
 345                 if (req.emr_rc != EACCES) {
 346                         rc = req.emr_rc;
 347                         goto fail1;
 348                 }
 349         }
 350
 351         /*
 352          * Apply the filters for the MAC configuration.
 353          * If the NIC isn't ready to accept filters this may
 354          * return success without setting anything.
 355          */
 356         rc = efx_filter_reconfigure(enp, epp->ep_mac_addr,
 357                                     epp->ep_all_unicst, epp->ep_mulcst,
 358                                     epp->ep_all_mulcst, epp->ep_brdcst,
 359                                     epp->ep_mulcst_addr_list,
 360                                     epp->ep_mulcst_addr_count);
 361
 362         return (0);
 363
 364 fail1:
 365         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 366
 367         return (rc);
 368 }
 369
 370         __checkReturn                   efx_rc_t
 371 ef10_mac_multicast_list_set(
 372         __in                            efx_nic_t *enp)
 373 {
 374         efx_port_t *epp = &(enp->en_port);
 375         const efx_mac_ops_t *emop = epp->ep_emop;
 376         efx_rc_t rc;
 377
 378         EFSYS_ASSERT(enp->en_family == EFX_FAMILY_HUNTINGTON ||
 379                     enp->en_family == EFX_FAMILY_MEDFORD);
 380
 381         if ((rc = emop->emo_reconfigure(enp)) != 0)
 382                 goto fail1;
 383
 384         return (0);
 385
 386 fail1:
 387         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 388
 389         return (rc);
 390 }
 391
 392         __checkReturn   efx_rc_t
 393 ef10_mac_filter_default_rxq_set(
 394         __in            efx_nic_t *enp,
 395         __in            efx_rxq_t *erp,
 396         __in            boolean_t using_rss)
 397 {
 398         efx_port_t *epp = &(enp->en_port);
 399         efx_rxq_t *old_rxq;
 400         boolean_t old_using_rss;
 401         efx_rc_t rc;
 402
 403         ef10_filter_get_default_rxq(enp, &old_rxq, &old_using_rss);
 404
 405         ef10_filter_default_rxq_set(enp, erp, using_rss);
 406
 407         rc = efx_filter_reconfigure(enp, epp->ep_mac_addr,
 408                                     epp->ep_all_unicst, epp->ep_mulcst,
 409                                     epp->ep_all_mulcst, epp->ep_brdcst,
 410                                     epp->ep_mulcst_addr_list,
 411                                     epp->ep_mulcst_addr_count);
 412
 413         if (rc != 0)
 414                 goto fail1;
 415
 416         return (0);
 417
 418 fail1:
 419         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 420
 421         ef10_filter_default_rxq_set(enp, old_rxq, old_using_rss);
 422
 423         return (rc);
 424 }
 425
 426                         void
 427 ef10_mac_filter_default_rxq_clear(
 428         __in            efx_nic_t *enp)
 429 {
 430         efx_port_t *epp = &(enp->en_port);
 431
 432         ef10_filter_default_rxq_clear(enp);
 433
 434         (void) efx_filter_reconfigure(enp, epp->ep_mac_addr,
 435                                     epp->ep_all_unicst, epp->ep_mulcst,
 436                                     epp->ep_all_mulcst, epp->ep_brdcst,
 437                                     epp->ep_mulcst_addr_list,
 438                                     epp->ep_mulcst_addr_count);
 439 }
 440
 441
 442 #if EFSYS_OPT_LOOPBACK
 443
 444         __checkReturn   efx_rc_t
 445 ef10_mac_loopback_set(
 446         __in            efx_nic_t *enp,
 447         __in            efx_link_mode_t link_mode,
 448         __in            efx_loopback_type_t loopback_type)
 449 {
 450         efx_port_t *epp = &(enp->en_port);
 451         const efx_phy_ops_t *epop = epp->ep_epop;
 452         efx_loopback_type_t old_loopback_type;
 453         efx_link_mode_t old_loopback_link_mode;
 454         efx_rc_t rc;
 455
 456         /* The PHY object handles this on EF10 */
 457         old_loopback_type = epp->ep_loopback_type;
 458         old_loopback_link_mode = epp->ep_loopback_link_mode;
 459         epp->ep_loopback_type = loopback_type;
 460         epp->ep_loopback_link_mode = link_mode;
 461
 462         if ((rc = epop->epo_reconfigure(enp)) != 0)
 463                 goto fail1;
 464
 465         return (0);
 466
 467 fail1:
 468         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 469
 470         epp->ep_loopback_type = old_loopback_type;
 471         epp->ep_loopback_link_mode = old_loopback_link_mode;
 472
 473         return (rc);
 474 }
 475
 476 #endif  /* EFSYS_OPT_LOOPBACK */
 477
 478 #if EFSYS_OPT_MAC_STATS
 479
 480         __checkReturn                   efx_rc_t
 481 ef10_mac_stats_get_mask(
 482         __in                            efx_nic_t *enp,
 483         __inout_bcount(mask_size)       uint32_t *maskp,
 484         __in                            size_t mask_size)
 485 {
 486         const struct efx_mac_stats_range ef10_common[] = {
 487                 { EFX_MAC_RX_OCTETS, EFX_MAC_RX_GE_15XX_PKTS },
 488                 { EFX_MAC_RX_FCS_ERRORS, EFX_MAC_RX_DROP_EVENTS },
 489                 { EFX_MAC_RX_JABBER_PKTS, EFX_MAC_RX_JABBER_PKTS },
 490                 { EFX_MAC_RX_NODESC_DROP_CNT, EFX_MAC_TX_PAUSE_PKTS },
 491         };
 492         const struct efx_mac_stats_range ef10_tx_size_bins[] = {
 493                 { EFX_MAC_TX_LE_64_PKTS, EFX_MAC_TX_GE_15XX_PKTS },
 494         };
 495         efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
 496         efx_port_t *epp = &(enp->en_port);
 497         efx_rc_t rc;
 498
 499         if ((rc = efx_mac_stats_mask_add_ranges(maskp, mask_size,
 500             ef10_common, EFX_ARRAY_SIZE(ef10_common))) != 0)
 501                 goto fail1;
 502
 503         if (epp->ep_phy_cap_mask & (1 << MC_CMD_PHY_CAP_40000FDX_LBN)) {
 504                 const struct efx_mac_stats_range ef10_40g_extra[] = {
 505                         { EFX_MAC_RX_ALIGN_ERRORS, EFX_MAC_RX_ALIGN_ERRORS },
 506                 };
 507
 508                 if ((rc = efx_mac_stats_mask_add_ranges(maskp, mask_size,
 509                     ef10_40g_extra, EFX_ARRAY_SIZE(ef10_40g_extra))) != 0)
 510                         goto fail2;
 511
 512                 if (encp->enc_mac_stats_40g_tx_size_bins) {
 513                         if ((rc = efx_mac_stats_mask_add_ranges(maskp,
 514                             mask_size, ef10_tx_size_bins,
 515                             EFX_ARRAY_SIZE(ef10_tx_size_bins))) != 0)
 516                                 goto fail3;
 517                 }
 518         } else {
 519                 if ((rc = efx_mac_stats_mask_add_ranges(maskp, mask_size,
 520                     ef10_tx_size_bins, EFX_ARRAY_SIZE(ef10_tx_size_bins))) != 0)
 521                         goto fail4;
 522         }
 523
 524         if (encp->enc_pm_and_rxdp_counters) {
 525                 const struct efx_mac_stats_range ef10_pm_and_rxdp[] = {
 526                         { EFX_MAC_PM_TRUNC_BB_OVERFLOW, EFX_MAC_RXDP_HLB_WAIT },
 527                 };
 528
 529                 if ((rc = efx_mac_stats_mask_add_ranges(maskp, mask_size,
 530                     ef10_pm_and_rxdp, EFX_ARRAY_SIZE(ef10_pm_and_rxdp))) != 0)
 531                         goto fail5;
 532         }
 533
 534         if (encp->enc_datapath_cap_evb) {
 535                 const struct efx_mac_stats_range ef10_vadaptor[] = {
 536                         { EFX_MAC_VADAPTER_RX_UNICAST_PACKETS,
 537                             EFX_MAC_VADAPTER_TX_OVERFLOW },
 538                 };
 539
 540                 if ((rc = efx_mac_stats_mask_add_ranges(maskp, mask_size,
 541                     ef10_vadaptor, EFX_ARRAY_SIZE(ef10_vadaptor))) != 0)
 542                         goto fail6;
 543         }
 544
 545         return (0);
 546
 547 fail6:
 548         EFSYS_PROBE(fail6);
 549 fail5:
 550         EFSYS_PROBE(fail5);
 551 fail4:
 552         EFSYS_PROBE(fail4);
 553 fail3:
 554         EFSYS_PROBE(fail3);
 555 fail2:
 556         EFSYS_PROBE(fail2);
 557 fail1:
 558         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 559
 560         return (rc);
 561 }
 562
 563 #define EF10_MAC_STAT_READ(_esmp, _field, _eqp)                 \
 564         EFSYS_MEM_READQ((_esmp), (_field) * sizeof (efx_qword_t), _eqp)
 565
 566
 567         __checkReturn                   efx_rc_t
 568 ef10_mac_stats_update(
 569         __in                            efx_nic_t *enp,
 570         __in                            efsys_mem_t *esmp,
 571         __inout_ecount(EFX_MAC_NSTATS)  efsys_stat_t *stat,
 572         __inout_opt                     uint32_t *generationp)
 573 {
 574         efx_qword_t value;
 575         efx_qword_t generation_start;
 576         efx_qword_t generation_end;
 577
 578         _NOTE(ARGUNUSED(enp))
 579
 580         /* Read END first so we don't race with the MC */
 581         EFSYS_DMA_SYNC_FOR_KERNEL(esmp, 0, EFX_MAC_STATS_SIZE);
 582         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_GENERATION_END,
 583                             &generation_end);
 584         EFSYS_MEM_READ_BARRIER();
 585
 586         /* TX */
 587         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_PKTS, &value);
 588         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_PKTS]), &value);
 589
 590         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_CONTROL_PKTS, &value);
 591         EFSYS_STAT_SUBR_QWORD(&(stat[EFX_MAC_TX_PKTS]), &value);
 592
 593         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_PAUSE_PKTS, &value);
 594         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_PAUSE_PKTS]), &value);
 595
 596         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_UNICAST_PKTS, &value);
 597         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_UNICST_PKTS]), &value);
 598
 599         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_MULTICAST_PKTS, &value);
 600         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_MULTICST_PKTS]), &value);
 601
 602         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_BROADCAST_PKTS, &value);
 603         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_BRDCST_PKTS]), &value);
 604
 605         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_BYTES, &value);
 606         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_OCTETS]), &value);
 607
 608         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_LT64_PKTS, &value);
 609         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_LE_64_PKTS]), &value);
 610         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_64_PKTS, &value);
 611         EFSYS_STAT_INCR_QWORD(&(stat[EFX_MAC_TX_LE_64_PKTS]), &value);
 612
 613         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_65_TO_127_PKTS, &value);
 614         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_65_TO_127_PKTS]), &value);
 615
 616         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_128_TO_255_PKTS, &value);
 617         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_128_TO_255_PKTS]), &value);
 618
 619         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_256_TO_511_PKTS, &value);
 620         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_256_TO_511_PKTS]), &value);
 621
 622         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_512_TO_1023_PKTS, &value);
 623         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_512_TO_1023_PKTS]), &value);
 624
 625         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_1024_TO_15XX_PKTS, &value);
 626         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_1024_TO_15XX_PKTS]), &value);
 627
 628         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_15XX_TO_JUMBO_PKTS, &value);
 629         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_GE_15XX_PKTS]), &value);
 630         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_GTJUMBO_PKTS, &value);
 631         EFSYS_STAT_INCR_QWORD(&(stat[EFX_MAC_TX_GE_15XX_PKTS]), &value);
 632
 633         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_BAD_FCS_PKTS, &value);
 634         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_ERRORS]), &value);
 635
 636         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_SINGLE_COLLISION_PKTS, &value);
 637         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_SGL_COL_PKTS]), &value);
 638
 639         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_MULTIPLE_COLLISION_PKTS,
 640                             &value);
 641         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_MULT_COL_PKTS]), &value);
 642
 643         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_EXCESSIVE_COLLISION_PKTS,
 644                             &value);
 645         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_EX_COL_PKTS]), &value);
 646
 647         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_LATE_COLLISION_PKTS, &value);
 648         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_LATE_COL_PKTS]), &value);
 649
 650         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_DEFERRED_PKTS, &value);
 651         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_DEF_PKTS]), &value);
 652
 653         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_TX_EXCESSIVE_DEFERRED_PKTS,
 654             &value);
 655         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_TX_EX_DEF_PKTS]), &value);
 656
 657         /* RX */
 658         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_BYTES, &value);
 659         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_OCTETS]), &value);
 660
 661         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_PKTS, &value);
 662         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_PKTS]), &value);
 663
 664         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_UNICAST_PKTS, &value);
 665         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_UNICST_PKTS]), &value);
 666
 667         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_MULTICAST_PKTS, &value);
 668         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_MULTICST_PKTS]), &value);
 669
 670         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_BROADCAST_PKTS, &value);
 671         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_BRDCST_PKTS]), &value);
 672
 673         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_PAUSE_PKTS, &value);
 674         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_PAUSE_PKTS]), &value);
 675
 676         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_UNDERSIZE_PKTS, &value);
 677         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_LE_64_PKTS]), &value);
 678         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_64_PKTS, &value);
 679         EFSYS_STAT_INCR_QWORD(&(stat[EFX_MAC_RX_LE_64_PKTS]), &value);
 680
 681         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_65_TO_127_PKTS, &value);
 682         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_65_TO_127_PKTS]), &value);
 683
 684         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_128_TO_255_PKTS, &value);
 685         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_128_TO_255_PKTS]), &value);
 686
 687         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_256_TO_511_PKTS, &value);
 688         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_256_TO_511_PKTS]), &value);
 689
 690         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_512_TO_1023_PKTS, &value);
 691         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_512_TO_1023_PKTS]), &value);
 692
 693         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_1024_TO_15XX_PKTS, &value);
 694         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_1024_TO_15XX_PKTS]), &value);
 695
 696         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_15XX_TO_JUMBO_PKTS, &value);
 697         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_GE_15XX_PKTS]), &value);
 698         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_GTJUMBO_PKTS, &value);
 699         EFSYS_STAT_INCR_QWORD(&(stat[EFX_MAC_RX_GE_15XX_PKTS]), &value);
 700
 701         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_BAD_FCS_PKTS, &value);
 702         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_FCS_ERRORS]), &value);
 703
 704         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_OVERFLOW_PKTS, &value);
 705         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_DROP_EVENTS]), &value);
 706
 707         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_FALSE_CARRIER_PKTS, &value);
 708         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_FALSE_CARRIER_ERRORS]), &value);
 709
 710         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_SYMBOL_ERROR_PKTS, &value);
 711         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_SYMBOL_ERRORS]), &value);
 712
 713         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_ALIGN_ERROR_PKTS, &value);
 714         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_ALIGN_ERRORS]), &value);
 715
 716         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_INTERNAL_ERROR_PKTS, &value);
 717         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_INTERNAL_ERRORS]), &value);
 718
 719         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_JABBER_PKTS, &value);
 720         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_JABBER_PKTS]), &value);
 721
 722         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_LANES01_CHAR_ERR, &value);
 723         EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE0_CHAR_ERR]),
 724                             &(value.eq_dword[0]));
 725         EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE1_CHAR_ERR]),
 726                             &(value.eq_dword[1]));
 727
 728         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_LANES23_CHAR_ERR, &value);
 729         EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE2_CHAR_ERR]),
 730                             &(value.eq_dword[0]));
 731         EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE3_CHAR_ERR]),
 732                             &(value.eq_dword[1]));
 733
 734         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_LANES01_DISP_ERR, &value);
 735         EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE0_DISP_ERR]),
 736                             &(value.eq_dword[0]));
 737         EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE1_DISP_ERR]),
 738                             &(value.eq_dword[1]));
 739
 740         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_LANES23_DISP_ERR, &value);
 741         EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE2_DISP_ERR]),
 742                             &(value.eq_dword[0]));
 743         EFSYS_STAT_SET_DWORD(&(stat[EFX_MAC_RX_LANE3_DISP_ERR]),
 744                             &(value.eq_dword[1]));
 745
 746         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_MATCH_FAULT, &value);
 747         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_MATCH_FAULT]), &value);
 748
 749         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RX_NODESC_DROPS, &value);
 750         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RX_NODESC_DROP_CNT]), &value);
 751
 752         /* Packet memory (EF10 only) */
 753         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_PM_TRUNC_BB_OVERFLOW, &value);
 754         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_PM_TRUNC_BB_OVERFLOW]), &value);
 755
 756         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_PM_DISCARD_BB_OVERFLOW, &value);
 757         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_PM_DISCARD_BB_OVERFLOW]), &value);
 758
 759         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_PM_TRUNC_VFIFO_FULL, &value);
 760         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_PM_TRUNC_VFIFO_FULL]), &value);
 761
 762         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_PM_DISCARD_VFIFO_FULL, &value);
 763         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_PM_DISCARD_VFIFO_FULL]), &value);
 764
 765         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_PM_TRUNC_QBB, &value);
 766         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_PM_TRUNC_QBB]), &value);
 767
 768         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_PM_DISCARD_QBB, &value);
 769         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_PM_DISCARD_QBB]), &value);
 770
 771         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_PM_DISCARD_MAPPING, &value);
 772         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_PM_DISCARD_MAPPING]), &value);
 773
 774         /* RX datapath */
 775         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RXDP_Q_DISABLED_PKTS, &value);
 776         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RXDP_Q_DISABLED_PKTS]), &value);
 777
 778         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RXDP_DI_DROPPED_PKTS, &value);
 779         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RXDP_DI_DROPPED_PKTS]), &value);
 780
 781         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RXDP_STREAMING_PKTS, &value);
 782         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RXDP_STREAMING_PKTS]), &value);
 783
 784         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RXDP_HLB_FETCH_CONDITIONS, &value);
 785         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RXDP_HLB_FETCH]), &value);
 786
 787         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_RXDP_HLB_WAIT_CONDITIONS, &value);
 788         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_RXDP_HLB_WAIT]), &value);
 789
 790
 791         /* VADAPTER RX */
 792         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_RX_UNICAST_PACKETS,
 793             &value);
 794         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_RX_UNICAST_PACKETS]),
 795             &value);
 796
 797         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_RX_UNICAST_BYTES,
 798             &value);
 799         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_RX_UNICAST_BYTES]),
 800             &value);
 801
 802         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_RX_MULTICAST_PACKETS,
 803             &value);
 804         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_RX_MULTICAST_PACKETS]),
 805             &value);
 806
 807         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_RX_MULTICAST_BYTES,
 808             &value);
 809         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_RX_MULTICAST_BYTES]),
 810             &value);
 811
 812         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_RX_BROADCAST_PACKETS,
 813             &value);
 814         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_RX_BROADCAST_PACKETS]),
 815             &value);
 816
 817         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_RX_BROADCAST_BYTES,
 818             &value);
 819         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_RX_BROADCAST_BYTES]),
 820             &value);
 821
 822         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_RX_BAD_PACKETS,
 823             &value);
 824         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_RX_BAD_PACKETS]),
 825             &value);
 826
 827         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_RX_BAD_BYTES, &value);
 828         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_RX_BAD_BYTES]), &value);
 829
 830         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_RX_OVERFLOW, &value);
 831         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_RX_OVERFLOW]), &value);
 832
 833         /* VADAPTER TX */
 834         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_TX_UNICAST_PACKETS,
 835             &value);
 836         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_TX_UNICAST_PACKETS]),
 837             &value);
 838
 839         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_TX_UNICAST_BYTES,
 840             &value);
 841         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_TX_UNICAST_BYTES]),
 842             &value);
 843
 844         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_TX_MULTICAST_PACKETS,
 845             &value);
 846         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_TX_MULTICAST_PACKETS]),
 847             &value);
 848
 849         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_TX_MULTICAST_BYTES,
 850             &value);
 851         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_TX_MULTICAST_BYTES]),
 852             &value);
 853
 854         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_TX_BROADCAST_PACKETS,
 855             &value);
 856         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_TX_BROADCAST_PACKETS]),
 857             &value);
 858
 859         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_TX_BROADCAST_BYTES,
 860             &value);
 861         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_TX_BROADCAST_BYTES]),
 862             &value);
 863
 864         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_TX_BAD_PACKETS, &value);
 865         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_TX_BAD_PACKETS]), &value);
 866
 867         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_TX_BAD_BYTES, &value);
 868         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_TX_BAD_BYTES]), &value);
 869
 870         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_VADAPTER_TX_OVERFLOW, &value);
 871         EFSYS_STAT_SET_QWORD(&(stat[EFX_MAC_VADAPTER_TX_OVERFLOW]), &value);
 872
 873
 874         EFSYS_DMA_SYNC_FOR_KERNEL(esmp, 0, EFX_MAC_STATS_SIZE);
 875         EFSYS_MEM_READ_BARRIER();
 876         EF10_MAC_STAT_READ(esmp, MC_CMD_MAC_GENERATION_START,
 877                             &generation_start);
 878
 879         /* Check that we didn't read the stats in the middle of a DMA */
 880         /* Not a good enough check ? */
 881         if (memcmp(&generation_start, &generation_end,
 882             sizeof (generation_start)))
 883                 return (EAGAIN);
 884
 885         if (generationp)
 886                 *generationp = EFX_QWORD_FIELD(generation_start, EFX_DWORD_0);
 887
 888         return (0);
 889 }
 890
 891 #endif  /* EFSYS_OPT_MAC_STATS */
 892
 893 #endif  /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD */