drivers/net/sfc/base/ef10_rx.c

   1 /*
   2  * Copyright (c) 2012-2016 Solarflare Communications Inc.
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are met:
   7  *
   8  * 1. Redistributions of source code must retain the above copyright notice,
   9  *    this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright notice,
  11  *    this list of conditions and the following disclaimer in the documentation
  12  *    and/or other materials provided with the distribution.
  13  *
  14  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  15  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
  16  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  17  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
  18  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
  19  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  20  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
  21  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  22  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
  23  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
  24  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  25  *
  26  * The views and conclusions contained in the software and documentation are
  27  * those of the authors and should not be interpreted as representing official
  28  * policies, either expressed or implied, of the FreeBSD Project.
  29  */
  30
  31 #include "efx.h"
  32 #include "efx_impl.h"
  33
  34
  35 #if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD
  36
  37
  38 static  __checkReturn   efx_rc_t
  39 efx_mcdi_init_rxq(
  40         __in            efx_nic_t *enp,
  41         __in            uint32_t size,
  42         __in            uint32_t target_evq,
  43         __in            uint32_t label,
  44         __in            uint32_t instance,
  45         __in            efsys_mem_t *esmp,
  46         __in            boolean_t disable_scatter,
  47         __in            uint32_t ps_bufsize)
  48 {
  49         efx_mcdi_req_t req;
  50         uint8_t payload[MAX(MC_CMD_INIT_RXQ_EXT_IN_LEN,
  51                             MC_CMD_INIT_RXQ_EXT_OUT_LEN)];
  52         int npages = EFX_RXQ_NBUFS(size);
  53         int i;
  54         efx_qword_t *dma_addr;
  55         uint64_t addr;
  56         efx_rc_t rc;
  57         uint32_t dma_mode;
  58
  59         /* If this changes, then the payload size might need to change. */
  60         EFSYS_ASSERT3U(MC_CMD_INIT_RXQ_OUT_LEN, ==, 0);
  61         EFSYS_ASSERT3U(size, <=, EFX_RXQ_MAXNDESCS);
  62
  63         if (ps_bufsize > 0)
  64                 dma_mode = MC_CMD_INIT_RXQ_EXT_IN_PACKED_STREAM;
  65         else
  66                 dma_mode = MC_CMD_INIT_RXQ_EXT_IN_SINGLE_PACKET;
  67
  68         (void) memset(payload, 0, sizeof (payload));
  69         req.emr_cmd = MC_CMD_INIT_RXQ;
  70         req.emr_in_buf = payload;
  71         req.emr_in_length = MC_CMD_INIT_RXQ_EXT_IN_LEN;
  72         req.emr_out_buf = payload;
  73         req.emr_out_length = MC_CMD_INIT_RXQ_EXT_OUT_LEN;
  74
  75         MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_SIZE, size);
  76         MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_TARGET_EVQ, target_evq);
  77         MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_LABEL, label);
  78         MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_INSTANCE, instance);
  79         MCDI_IN_POPULATE_DWORD_8(req, INIT_RXQ_EXT_IN_FLAGS,
  80             INIT_RXQ_EXT_IN_FLAG_BUFF_MODE, 0,
  81             INIT_RXQ_EXT_IN_FLAG_HDR_SPLIT, 0,
  82             INIT_RXQ_EXT_IN_FLAG_TIMESTAMP, 0,
  83             INIT_RXQ_EXT_IN_CRC_MODE, 0,
  84             INIT_RXQ_EXT_IN_FLAG_PREFIX, 1,
  85             INIT_RXQ_EXT_IN_FLAG_DISABLE_SCATTER, disable_scatter,
  86             INIT_RXQ_EXT_IN_DMA_MODE,
  87             dma_mode,
  88             INIT_RXQ_EXT_IN_PACKED_STREAM_BUFF_SIZE, ps_bufsize);
  89         MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_OWNER_ID, 0);
  90         MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_PORT_ID, EVB_PORT_ID_ASSIGNED);
  91
  92         dma_addr = MCDI_IN2(req, efx_qword_t, INIT_RXQ_IN_DMA_ADDR);
  93         addr = EFSYS_MEM_ADDR(esmp);
  94
  95         for (i = 0; i < npages; i++) {
  96                 EFX_POPULATE_QWORD_2(*dma_addr,
  97                     EFX_DWORD_1, (uint32_t)(addr >> 32),
  98                     EFX_DWORD_0, (uint32_t)(addr & 0xffffffff));
  99
 100                 dma_addr++;
 101                 addr += EFX_BUF_SIZE;
 102         }
 103
 104         efx_mcdi_execute(enp, &req);
 105
 106         if (req.emr_rc != 0) {
 107                 rc = req.emr_rc;
 108                 goto fail1;
 109         }
 110
 111         return (0);
 112
 113 fail1:
 114         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 115
 116         return (rc);
 117 }
 118
 119 static  __checkReturn   efx_rc_t
 120 efx_mcdi_fini_rxq(
 121         __in            efx_nic_t *enp,
 122         __in            uint32_t instance)
 123 {
 124         efx_mcdi_req_t req;
 125         uint8_t payload[MAX(MC_CMD_FINI_RXQ_IN_LEN,
 126                             MC_CMD_FINI_RXQ_OUT_LEN)];
 127         efx_rc_t rc;
 128
 129         (void) memset(payload, 0, sizeof (payload));
 130         req.emr_cmd = MC_CMD_FINI_RXQ;
 131         req.emr_in_buf = payload;
 132         req.emr_in_length = MC_CMD_FINI_RXQ_IN_LEN;
 133         req.emr_out_buf = payload;
 134         req.emr_out_length = MC_CMD_FINI_RXQ_OUT_LEN;
 135
 136         MCDI_IN_SET_DWORD(req, FINI_RXQ_IN_INSTANCE, instance);
 137
 138         efx_mcdi_execute_quiet(enp, &req);
 139
 140         if (req.emr_rc != 0) {
 141                 rc = req.emr_rc;
 142                 goto fail1;
 143         }
 144
 145         return (0);
 146
 147 fail1:
 148         /*
 149          * EALREADY is not an error, but indicates that the MC has rebooted and
 150          * that the RXQ has already been destroyed.
 151          */
 152         if (rc != EALREADY)
 153                 EFSYS_PROBE1(fail1, efx_rc_t, rc);
 154
 155         return (rc);
 156 }
 157
 158 #if EFSYS_OPT_RX_SCALE
 159 static  __checkReturn   efx_rc_t
 160 efx_mcdi_rss_context_alloc(
 161         __in            efx_nic_t *enp,
 162         __in            efx_rx_scale_support_t scale_support,
 163         __in            uint32_t num_queues,
 164         __out           uint32_t *rss_contextp)
 165 {
 166         efx_mcdi_req_t req;
 167         uint8_t payload[MAX(MC_CMD_RSS_CONTEXT_ALLOC_IN_LEN,
 168                             MC_CMD_RSS_CONTEXT_ALLOC_OUT_LEN)];
 169         uint32_t rss_context;
 170         uint32_t context_type;
 171         efx_rc_t rc;
 172
 173         if (num_queues > EFX_MAXRSS) {
 174                 rc = EINVAL;
 175                 goto fail1;
 176         }
 177
 178         switch (scale_support) {
 179         case EFX_RX_SCALE_EXCLUSIVE:
 180                 context_type = MC_CMD_RSS_CONTEXT_ALLOC_IN_TYPE_EXCLUSIVE;
 181                 break;
 182         case EFX_RX_SCALE_SHARED:
 183                 context_type = MC_CMD_RSS_CONTEXT_ALLOC_IN_TYPE_SHARED;
 184                 break;
 185         default:
 186                 rc = EINVAL;
 187                 goto fail2;
 188         }
 189
 190         (void) memset(payload, 0, sizeof (payload));
 191         req.emr_cmd = MC_CMD_RSS_CONTEXT_ALLOC;
 192         req.emr_in_buf = payload;
 193         req.emr_in_length = MC_CMD_RSS_CONTEXT_ALLOC_IN_LEN;
 194         req.emr_out_buf = payload;
 195         req.emr_out_length = MC_CMD_RSS_CONTEXT_ALLOC_OUT_LEN;
 196
 197         MCDI_IN_SET_DWORD(req, RSS_CONTEXT_ALLOC_IN_UPSTREAM_PORT_ID,
 198             EVB_PORT_ID_ASSIGNED);
 199         MCDI_IN_SET_DWORD(req, RSS_CONTEXT_ALLOC_IN_TYPE, context_type);
 200         /* NUM_QUEUES is only used to validate indirection table offsets */
 201         MCDI_IN_SET_DWORD(req, RSS_CONTEXT_ALLOC_IN_NUM_QUEUES, num_queues);
 202
 203         efx_mcdi_execute(enp, &req);
 204
 205         if (req.emr_rc != 0) {
 206                 rc = req.emr_rc;
 207                 goto fail3;
 208         }
 209
 210         if (req.emr_out_length_used < MC_CMD_RSS_CONTEXT_ALLOC_OUT_LEN) {
 211                 rc = EMSGSIZE;
 212                 goto fail4;
 213         }
 214
 215         rss_context = MCDI_OUT_DWORD(req, RSS_CONTEXT_ALLOC_OUT_RSS_CONTEXT_ID);
 216         if (rss_context == EF10_RSS_CONTEXT_INVALID) {
 217                 rc = ENOENT;
 218                 goto fail5;
 219         }
 220
 221         *rss_contextp = rss_context;
 222
 223         return (0);
 224
 225 fail5:
 226         EFSYS_PROBE(fail5);
 227 fail4:
 228         EFSYS_PROBE(fail4);
 229 fail3:
 230         EFSYS_PROBE(fail3);
 231 fail2:
 232         EFSYS_PROBE(fail2);
 233 fail1:
 234         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 235
 236         return (rc);
 237 }
 238 #endif /* EFSYS_OPT_RX_SCALE */
 239
 240 #if EFSYS_OPT_RX_SCALE
 241 static                  efx_rc_t
 242 efx_mcdi_rss_context_free(
 243         __in            efx_nic_t *enp,
 244         __in            uint32_t rss_context)
 245 {
 246         efx_mcdi_req_t req;
 247         uint8_t payload[MAX(MC_CMD_RSS_CONTEXT_FREE_IN_LEN,
 248                             MC_CMD_RSS_CONTEXT_FREE_OUT_LEN)];
 249         efx_rc_t rc;
 250
 251         if (rss_context == EF10_RSS_CONTEXT_INVALID) {
 252                 rc = EINVAL;
 253                 goto fail1;
 254         }
 255
 256         (void) memset(payload, 0, sizeof (payload));
 257         req.emr_cmd = MC_CMD_RSS_CONTEXT_FREE;
 258         req.emr_in_buf = payload;
 259         req.emr_in_length = MC_CMD_RSS_CONTEXT_FREE_IN_LEN;
 260         req.emr_out_buf = payload;
 261         req.emr_out_length = MC_CMD_RSS_CONTEXT_FREE_OUT_LEN;
 262
 263         MCDI_IN_SET_DWORD(req, RSS_CONTEXT_FREE_IN_RSS_CONTEXT_ID, rss_context);
 264
 265         efx_mcdi_execute_quiet(enp, &req);
 266
 267         if (req.emr_rc != 0) {
 268                 rc = req.emr_rc;
 269                 goto fail2;
 270         }
 271
 272         return (0);
 273
 274 fail2:
 275         EFSYS_PROBE(fail2);
 276 fail1:
 277         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 278
 279         return (rc);
 280 }
 281 #endif /* EFSYS_OPT_RX_SCALE */
 282
 283 #if EFSYS_OPT_RX_SCALE
 284 static                  efx_rc_t
 285 efx_mcdi_rss_context_set_flags(
 286         __in            efx_nic_t *enp,
 287         __in            uint32_t rss_context,
 288         __in            efx_rx_hash_type_t type)
 289 {
 290         efx_mcdi_req_t req;
 291         uint8_t payload[MAX(MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_LEN,
 292                             MC_CMD_RSS_CONTEXT_SET_FLAGS_OUT_LEN)];
 293         efx_rc_t rc;
 294
 295         if (rss_context == EF10_RSS_CONTEXT_INVALID) {
 296                 rc = EINVAL;
 297                 goto fail1;
 298         }
 299
 300         (void) memset(payload, 0, sizeof (payload));
 301         req.emr_cmd = MC_CMD_RSS_CONTEXT_SET_FLAGS;
 302         req.emr_in_buf = payload;
 303         req.emr_in_length = MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_LEN;
 304         req.emr_out_buf = payload;
 305         req.emr_out_length = MC_CMD_RSS_CONTEXT_SET_FLAGS_OUT_LEN;
 306
 307         MCDI_IN_SET_DWORD(req, RSS_CONTEXT_SET_FLAGS_IN_RSS_CONTEXT_ID,
 308             rss_context);
 309
 310         MCDI_IN_POPULATE_DWORD_4(req, RSS_CONTEXT_SET_FLAGS_IN_FLAGS,
 311             RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_IPV4_EN,
 312             (type & EFX_RX_HASH_IPV4) ? 1 : 0,
 313             RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_TCPV4_EN,
 314             (type & EFX_RX_HASH_TCPIPV4) ? 1 : 0,
 315             RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_IPV6_EN,
 316             (type & EFX_RX_HASH_IPV6) ? 1 : 0,
 317             RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_TCPV6_EN,
 318             (type & EFX_RX_HASH_TCPIPV6) ? 1 : 0);
 319
 320         efx_mcdi_execute(enp, &req);
 321
 322         if (req.emr_rc != 0) {
 323                 rc = req.emr_rc;
 324                 goto fail2;
 325         }
 326
 327         return (0);
 328
 329 fail2:
 330         EFSYS_PROBE(fail2);
 331 fail1:
 332         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 333
 334         return (rc);
 335 }
 336 #endif /* EFSYS_OPT_RX_SCALE */
 337
 338 #if EFSYS_OPT_RX_SCALE
 339 static                  efx_rc_t
 340 efx_mcdi_rss_context_set_key(
 341         __in            efx_nic_t *enp,
 342         __in            uint32_t rss_context,
 343         __in_ecount(n)  uint8_t *key,
 344         __in            size_t n)
 345 {
 346         efx_mcdi_req_t req;
 347         uint8_t payload[MAX(MC_CMD_RSS_CONTEXT_SET_KEY_IN_LEN,
 348                             MC_CMD_RSS_CONTEXT_SET_KEY_OUT_LEN)];
 349         efx_rc_t rc;
 350
 351         if (rss_context == EF10_RSS_CONTEXT_INVALID) {
 352                 rc = EINVAL;
 353                 goto fail1;
 354         }
 355
 356         (void) memset(payload, 0, sizeof (payload));
 357         req.emr_cmd = MC_CMD_RSS_CONTEXT_SET_KEY;
 358         req.emr_in_buf = payload;
 359         req.emr_in_length = MC_CMD_RSS_CONTEXT_SET_KEY_IN_LEN;
 360         req.emr_out_buf = payload;
 361         req.emr_out_length = MC_CMD_RSS_CONTEXT_SET_KEY_OUT_LEN;
 362
 363         MCDI_IN_SET_DWORD(req, RSS_CONTEXT_SET_KEY_IN_RSS_CONTEXT_ID,
 364             rss_context);
 365
 366         EFSYS_ASSERT3U(n, ==, MC_CMD_RSS_CONTEXT_SET_KEY_IN_TOEPLITZ_KEY_LEN);
 367         if (n != MC_CMD_RSS_CONTEXT_SET_KEY_IN_TOEPLITZ_KEY_LEN) {
 368                 rc = EINVAL;
 369                 goto fail2;
 370         }
 371
 372         memcpy(MCDI_IN2(req, uint8_t, RSS_CONTEXT_SET_KEY_IN_TOEPLITZ_KEY),
 373             key, n);
 374
 375         efx_mcdi_execute(enp, &req);
 376
 377         if (req.emr_rc != 0) {
 378                 rc = req.emr_rc;
 379                 goto fail3;
 380         }
 381
 382         return (0);
 383
 384 fail3:
 385         EFSYS_PROBE(fail3);
 386 fail2:
 387         EFSYS_PROBE(fail2);
 388 fail1:
 389         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 390
 391         return (rc);
 392 }
 393 #endif /* EFSYS_OPT_RX_SCALE */
 394
 395 #if EFSYS_OPT_RX_SCALE
 396 static                  efx_rc_t
 397 efx_mcdi_rss_context_set_table(
 398         __in            efx_nic_t *enp,
 399         __in            uint32_t rss_context,
 400         __in_ecount(n)  unsigned int *table,
 401         __in            size_t n)
 402 {
 403         efx_mcdi_req_t req;
 404         uint8_t payload[MAX(MC_CMD_RSS_CONTEXT_SET_TABLE_IN_LEN,
 405                             MC_CMD_RSS_CONTEXT_SET_TABLE_OUT_LEN)];
 406         uint8_t *req_table;
 407         int i, rc;
 408
 409         if (rss_context == EF10_RSS_CONTEXT_INVALID) {
 410                 rc = EINVAL;
 411                 goto fail1;
 412         }
 413
 414         (void) memset(payload, 0, sizeof (payload));
 415         req.emr_cmd = MC_CMD_RSS_CONTEXT_SET_TABLE;
 416         req.emr_in_buf = payload;
 417         req.emr_in_length = MC_CMD_RSS_CONTEXT_SET_TABLE_IN_LEN;
 418         req.emr_out_buf = payload;
 419         req.emr_out_length = MC_CMD_RSS_CONTEXT_SET_TABLE_OUT_LEN;
 420
 421         MCDI_IN_SET_DWORD(req, RSS_CONTEXT_SET_TABLE_IN_RSS_CONTEXT_ID,
 422             rss_context);
 423
 424         req_table =
 425             MCDI_IN2(req, uint8_t, RSS_CONTEXT_SET_TABLE_IN_INDIRECTION_TABLE);
 426
 427         for (i = 0;
 428             i < MC_CMD_RSS_CONTEXT_SET_TABLE_IN_INDIRECTION_TABLE_LEN;
 429             i++) {
 430                 req_table[i] = (n > 0) ? (uint8_t)table[i % n] : 0;
 431         }
 432
 433         efx_mcdi_execute(enp, &req);
 434
 435         if (req.emr_rc != 0) {
 436                 rc = req.emr_rc;
 437                 goto fail2;
 438         }
 439
 440         return (0);
 441
 442 fail2:
 443         EFSYS_PROBE(fail2);
 444 fail1:
 445         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 446
 447         return (rc);
 448 }
 449 #endif /* EFSYS_OPT_RX_SCALE */
 450
 451
 452         __checkReturn   efx_rc_t
 453 ef10_rx_init(
 454         __in            efx_nic_t *enp)
 455 {
 456 #if EFSYS_OPT_RX_SCALE
 457
 458         if (efx_mcdi_rss_context_alloc(enp, EFX_RX_SCALE_EXCLUSIVE, EFX_MAXRSS,
 459                 &enp->en_rss_context) == 0) {
 460                 /*
 461                  * Allocated an exclusive RSS context, which allows both the
 462                  * indirection table and key to be modified.
 463                  */
 464                 enp->en_rss_support = EFX_RX_SCALE_EXCLUSIVE;
 465                 enp->en_hash_support = EFX_RX_HASH_AVAILABLE;
 466         } else {
 467                 /*
 468                  * Failed to allocate an exclusive RSS context. Continue
 469                  * operation without support for RSS. The pseudo-header in
 470                  * received packets will not contain a Toeplitz hash value.
 471                  */
 472                 enp->en_rss_support = EFX_RX_SCALE_UNAVAILABLE;
 473                 enp->en_hash_support = EFX_RX_HASH_UNAVAILABLE;
 474         }
 475
 476 #endif /* EFSYS_OPT_RX_SCALE */
 477
 478         return (0);
 479 }
 480
 481 #if EFSYS_OPT_RX_SCATTER
 482         __checkReturn   efx_rc_t
 483 ef10_rx_scatter_enable(
 484         __in            efx_nic_t *enp,
 485         __in            unsigned int buf_size)
 486 {
 487         _NOTE(ARGUNUSED(enp, buf_size))
 488         return (0);
 489 }
 490 #endif  /* EFSYS_OPT_RX_SCATTER */
 491
 492 #if EFSYS_OPT_RX_SCALE
 493         __checkReturn   efx_rc_t
 494 ef10_rx_scale_mode_set(
 495         __in            efx_nic_t *enp,
 496         __in            efx_rx_hash_alg_t alg,
 497         __in            efx_rx_hash_type_t type,
 498         __in            boolean_t insert)
 499 {
 500         efx_rc_t rc;
 501
 502         EFSYS_ASSERT3U(alg, ==, EFX_RX_HASHALG_TOEPLITZ);
 503         EFSYS_ASSERT3U(insert, ==, B_TRUE);
 504
 505         if ((alg != EFX_RX_HASHALG_TOEPLITZ) || (insert == B_FALSE)) {
 506                 rc = EINVAL;
 507                 goto fail1;
 508         }
 509
 510         if (enp->en_rss_support == EFX_RX_SCALE_UNAVAILABLE) {
 511                 rc = ENOTSUP;
 512                 goto fail2;
 513         }
 514
 515         if ((rc = efx_mcdi_rss_context_set_flags(enp,
 516                     enp->en_rss_context, type)) != 0)
 517                 goto fail3;
 518
 519         return (0);
 520
 521 fail3:
 522         EFSYS_PROBE(fail3);
 523 fail2:
 524         EFSYS_PROBE(fail2);
 525 fail1:
 526         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 527
 528         return (rc);
 529 }
 530 #endif /* EFSYS_OPT_RX_SCALE */
 531
 532 #if EFSYS_OPT_RX_SCALE
 533         __checkReturn   efx_rc_t
 534 ef10_rx_scale_key_set(
 535         __in            efx_nic_t *enp,
 536         __in_ecount(n)  uint8_t *key,
 537         __in            size_t n)
 538 {
 539         efx_rc_t rc;
 540
 541         if (enp->en_rss_support == EFX_RX_SCALE_UNAVAILABLE) {
 542                 rc = ENOTSUP;
 543                 goto fail1;
 544         }
 545
 546         if ((rc = efx_mcdi_rss_context_set_key(enp,
 547             enp->en_rss_context, key, n)) != 0)
 548                 goto fail2;
 549
 550         return (0);
 551
 552 fail2:
 553         EFSYS_PROBE(fail2);
 554 fail1:
 555         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 556
 557         return (rc);
 558 }
 559 #endif /* EFSYS_OPT_RX_SCALE */
 560
 561 #if EFSYS_OPT_RX_SCALE
 562         __checkReturn   efx_rc_t
 563 ef10_rx_scale_tbl_set(
 564         __in            efx_nic_t *enp,
 565         __in_ecount(n)  unsigned int *table,
 566         __in            size_t n)
 567 {
 568         efx_rc_t rc;
 569
 570         if (enp->en_rss_support == EFX_RX_SCALE_UNAVAILABLE) {
 571                 rc = ENOTSUP;
 572                 goto fail1;
 573         }
 574
 575         if ((rc = efx_mcdi_rss_context_set_table(enp,
 576             enp->en_rss_context, table, n)) != 0)
 577                 goto fail2;
 578
 579         return (0);
 580
 581 fail2:
 582         EFSYS_PROBE(fail2);
 583 fail1:
 584         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 585
 586         return (rc);
 587 }
 588 #endif /* EFSYS_OPT_RX_SCALE */
 589
 590
 591 /*
 592  * EF10 RX pseudo-header
 593  * ---------------------
 594  *
 595  * Receive packets are prefixed by an (optional) 14 byte pseudo-header:
 596  *
 597  *  +00: Toeplitz hash value.
 598  *       (32bit little-endian)
 599  *  +04: Outer VLAN tag. Zero if the packet did not have an outer VLAN tag.
 600  *       (16bit big-endian)
 601  *  +06: Inner VLAN tag. Zero if the packet did not have an inner VLAN tag.
 602  *       (16bit big-endian)
 603  *  +08: Packet Length. Zero if the RX datapath was in cut-through mode.
 604  *       (16bit little-endian)
 605  *  +10: MAC timestamp. Zero if timestamping is not enabled.
 606  *       (32bit little-endian)
 607  *
 608  * See "The RX Pseudo-header" in SF-109306-TC.
 609  */
 610
 611         __checkReturn   efx_rc_t
 612 ef10_rx_prefix_pktlen(
 613         __in            efx_nic_t *enp,
 614         __in            uint8_t *buffer,
 615         __out           uint16_t *lengthp)
 616 {
 617         _NOTE(ARGUNUSED(enp))
 618
 619         /*
 620          * The RX pseudo-header contains the packet length, excluding the
 621          * pseudo-header. If the hardware receive datapath was operating in
 622          * cut-through mode then the length in the RX pseudo-header will be
 623          * zero, and the packet length must be obtained from the DMA length
 624          * reported in the RX event.
 625          */
 626         *lengthp = buffer[8] | (buffer[9] << 8);
 627         return (0);
 628 }
 629
 630 #if EFSYS_OPT_RX_SCALE
 631         __checkReturn   uint32_t
 632 ef10_rx_prefix_hash(
 633         __in            efx_nic_t *enp,
 634         __in            efx_rx_hash_alg_t func,
 635         __in            uint8_t *buffer)
 636 {
 637         _NOTE(ARGUNUSED(enp))
 638
 639         switch (func) {
 640         case EFX_RX_HASHALG_TOEPLITZ:
 641                 return (buffer[0] |
 642                     (buffer[1] << 8) |
 643                     (buffer[2] << 16) |
 644                     (buffer[3] << 24));
 645
 646         default:
 647                 EFSYS_ASSERT(0);
 648                 return (0);
 649         }
 650 }
 651 #endif /* EFSYS_OPT_RX_SCALE */
 652
 653                         void
 654 ef10_rx_qpost(
 655         __in            efx_rxq_t *erp,
 656         __in_ecount(n)  efsys_dma_addr_t *addrp,
 657         __in            size_t size,
 658         __in            unsigned int n,
 659         __in            unsigned int completed,
 660         __in            unsigned int added)
 661 {
 662         efx_qword_t qword;
 663         unsigned int i;
 664         unsigned int offset;
 665         unsigned int id;
 666
 667         /* The client driver must not overfill the queue */
 668         EFSYS_ASSERT3U(added - completed + n, <=,
 669             EFX_RXQ_LIMIT(erp->er_mask + 1));
 670
 671         id = added & (erp->er_mask);
 672         for (i = 0; i < n; i++) {
 673                 EFSYS_PROBE4(rx_post, unsigned int, erp->er_index,
 674                     unsigned int, id, efsys_dma_addr_t, addrp[i],
 675                     size_t, size);
 676
 677                 EFX_POPULATE_QWORD_3(qword,
 678                     ESF_DZ_RX_KER_BYTE_CNT, (uint32_t)(size),
 679                     ESF_DZ_RX_KER_BUF_ADDR_DW0,
 680                     (uint32_t)(addrp[i] & 0xffffffff),
 681                     ESF_DZ_RX_KER_BUF_ADDR_DW1,
 682                     (uint32_t)(addrp[i] >> 32));
 683
 684                 offset = id * sizeof (efx_qword_t);
 685                 EFSYS_MEM_WRITEQ(erp->er_esmp, offset, &qword);
 686
 687                 id = (id + 1) & (erp->er_mask);
 688         }
 689 }
 690
 691                         void
 692 ef10_rx_qpush(
 693         __in    efx_rxq_t *erp,
 694         __in    unsigned int added,
 695         __inout unsigned int *pushedp)
 696 {
 697         efx_nic_t *enp = erp->er_enp;
 698         unsigned int pushed = *pushedp;
 699         uint32_t wptr;
 700         efx_dword_t dword;
 701
 702         /* Hardware has alignment restriction for WPTR */
 703         wptr = P2ALIGN(added, EF10_RX_WPTR_ALIGN);
 704         if (pushed == wptr)
 705                 return;
 706
 707         *pushedp = wptr;
 708
 709         /* Push the populated descriptors out */
 710         wptr &= erp->er_mask;
 711
 712         EFX_POPULATE_DWORD_1(dword, ERF_DZ_RX_DESC_WPTR, wptr);
 713
 714         /* Guarantee ordering of memory (descriptors) and PIO (doorbell) */
 715         EFX_DMA_SYNC_QUEUE_FOR_DEVICE(erp->er_esmp, erp->er_mask + 1,
 716             wptr, pushed & erp->er_mask);
 717         EFSYS_PIO_WRITE_BARRIER();
 718         EFX_BAR_TBL_WRITED(enp, ER_DZ_RX_DESC_UPD_REG,
 719                             erp->er_index, &dword, B_FALSE);
 720 }
 721
 722 #if EFSYS_OPT_RX_PACKED_STREAM
 723
 724                         void
 725 ef10_rx_qps_update_credits(
 726         __in    efx_rxq_t *erp)
 727 {
 728         efx_nic_t *enp = erp->er_enp;
 729         efx_dword_t dword;
 730         efx_evq_rxq_state_t *rxq_state =
 731                 &erp->er_eep->ee_rxq_state[erp->er_label];
 732
 733         EFSYS_ASSERT(rxq_state->eers_rx_packed_stream);
 734
 735         if (rxq_state->eers_rx_packed_stream_credits == 0)
 736                 return;
 737
 738         EFX_POPULATE_DWORD_3(dword,
 739             ERF_DZ_RX_DESC_MAGIC_DOORBELL, 1,
 740             ERF_DZ_RX_DESC_MAGIC_CMD,
 741             ERE_DZ_RX_DESC_MAGIC_CMD_PS_CREDITS,
 742             ERF_DZ_RX_DESC_MAGIC_DATA,
 743             rxq_state->eers_rx_packed_stream_credits);
 744         EFX_BAR_TBL_WRITED(enp, ER_DZ_RX_DESC_UPD_REG,
 745             erp->er_index, &dword, B_FALSE);
 746
 747         rxq_state->eers_rx_packed_stream_credits = 0;
 748 }
 749
 750         __checkReturn   uint8_t *
 751 ef10_rx_qps_packet_info(
 752         __in            efx_rxq_t *erp,
 753         __in            uint8_t *buffer,
 754         __in            uint32_t buffer_length,
 755         __in            uint32_t current_offset,
 756         __out           uint16_t *lengthp,
 757         __out           uint32_t *next_offsetp,
 758         __out           uint32_t *timestamp)
 759 {
 760         uint16_t buf_len;
 761         uint8_t *pkt_start;
 762         efx_qword_t *qwordp;
 763         efx_evq_rxq_state_t *rxq_state =
 764                 &erp->er_eep->ee_rxq_state[erp->er_label];
 765
 766         EFSYS_ASSERT(rxq_state->eers_rx_packed_stream);
 767
 768         buffer += current_offset;
 769         pkt_start = buffer + EFX_RX_PACKED_STREAM_RX_PREFIX_SIZE;
 770
 771         qwordp = (efx_qword_t *)buffer;
 772         *timestamp = EFX_QWORD_FIELD(*qwordp, ES_DZ_PS_RX_PREFIX_TSTAMP);
 773         *lengthp   = EFX_QWORD_FIELD(*qwordp, ES_DZ_PS_RX_PREFIX_ORIG_LEN);
 774         buf_len    = EFX_QWORD_FIELD(*qwordp, ES_DZ_PS_RX_PREFIX_CAP_LEN);
 775
 776         buf_len = P2ROUNDUP(buf_len + EFX_RX_PACKED_STREAM_RX_PREFIX_SIZE,
 777                             EFX_RX_PACKED_STREAM_ALIGNMENT);
 778         *next_offsetp =
 779             current_offset + buf_len + EFX_RX_PACKED_STREAM_ALIGNMENT;
 780
 781         EFSYS_ASSERT3U(*next_offsetp, <=, buffer_length);
 782         EFSYS_ASSERT3U(current_offset + *lengthp, <, *next_offsetp);
 783
 784         if ((*next_offsetp ^ current_offset) &
 785             EFX_RX_PACKED_STREAM_MEM_PER_CREDIT) {
 786                 if (rxq_state->eers_rx_packed_stream_credits <
 787                     EFX_RX_PACKED_STREAM_MAX_CREDITS)
 788                         rxq_state->eers_rx_packed_stream_credits++;
 789         }
 790
 791         return (pkt_start);
 792 }
 793
 794
 795 #endif
 796
 797         __checkReturn   efx_rc_t
 798 ef10_rx_qflush(
 799         __in    efx_rxq_t *erp)
 800 {
 801         efx_nic_t *enp = erp->er_enp;
 802         efx_rc_t rc;
 803
 804         if ((rc = efx_mcdi_fini_rxq(enp, erp->er_index)) != 0)
 805                 goto fail1;
 806
 807         return (0);
 808
 809 fail1:
 810         /*
 811          * EALREADY is not an error, but indicates that the MC has rebooted and
 812          * that the RXQ has already been destroyed. Callers need to know that
 813          * the RXQ flush has completed to avoid waiting until timeout for a
 814          * flush done event that will not be delivered.
 815          */
 816         if (rc != EALREADY)
 817                 EFSYS_PROBE1(fail1, efx_rc_t, rc);
 818
 819         return (rc);
 820 }
 821
 822                 void
 823 ef10_rx_qenable(
 824         __in    efx_rxq_t *erp)
 825 {
 826         /* FIXME */
 827         _NOTE(ARGUNUSED(erp))
 828         /* FIXME */
 829 }
 830
 831         __checkReturn   efx_rc_t
 832 ef10_rx_qcreate(
 833         __in            efx_nic_t *enp,
 834         __in            unsigned int index,
 835         __in            unsigned int label,
 836         __in            efx_rxq_type_t type,
 837         __in            efsys_mem_t *esmp,
 838         __in            size_t n,
 839         __in            uint32_t id,
 840         __in            efx_evq_t *eep,
 841         __in            efx_rxq_t *erp)
 842 {
 843         efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
 844         efx_rc_t rc;
 845         boolean_t disable_scatter;
 846         unsigned int ps_buf_size;
 847
 848         _NOTE(ARGUNUSED(id, erp))
 849
 850         EFX_STATIC_ASSERT(EFX_EV_RX_NLABELS == (1 << ESF_DZ_RX_QLABEL_WIDTH));
 851         EFSYS_ASSERT3U(label, <, EFX_EV_RX_NLABELS);
 852         EFSYS_ASSERT3U(enp->en_rx_qcount + 1, <, encp->enc_rxq_limit);
 853
 854         EFX_STATIC_ASSERT(ISP2(EFX_RXQ_MAXNDESCS));
 855         EFX_STATIC_ASSERT(ISP2(EFX_RXQ_MINNDESCS));
 856
 857         if (!ISP2(n) || (n < EFX_RXQ_MINNDESCS) || (n > EFX_RXQ_MAXNDESCS)) {
 858                 rc = EINVAL;
 859                 goto fail1;
 860         }
 861         if (index >= encp->enc_rxq_limit) {
 862                 rc = EINVAL;
 863                 goto fail2;
 864         }
 865
 866         switch (type) {
 867         case EFX_RXQ_TYPE_DEFAULT:
 868         case EFX_RXQ_TYPE_SCATTER:
 869                 ps_buf_size = 0;
 870                 break;
 871 #if EFSYS_OPT_RX_PACKED_STREAM
 872         case EFX_RXQ_TYPE_PACKED_STREAM_1M:
 873                 ps_buf_size = MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_1M;
 874                 break;
 875         case EFX_RXQ_TYPE_PACKED_STREAM_512K:
 876                 ps_buf_size = MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_512K;
 877                 break;
 878         case EFX_RXQ_TYPE_PACKED_STREAM_256K:
 879                 ps_buf_size = MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_256K;
 880                 break;
 881         case EFX_RXQ_TYPE_PACKED_STREAM_128K:
 882                 ps_buf_size = MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_128K;
 883                 break;
 884         case EFX_RXQ_TYPE_PACKED_STREAM_64K:
 885                 ps_buf_size = MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_64K;
 886                 break;
 887 #endif /* EFSYS_OPT_RX_PACKED_STREAM */
 888         default:
 889                 rc = ENOTSUP;
 890                 goto fail3;
 891         }
 892
 893 #if EFSYS_OPT_RX_PACKED_STREAM
 894         if (ps_buf_size != 0) {
 895                 /* Check if datapath firmware supports packed stream mode */
 896                 if (encp->enc_rx_packed_stream_supported == B_FALSE) {
 897                         rc = ENOTSUP;
 898                         goto fail4;
 899                 }
 900                 /* Check if packed stream allows configurable buffer sizes */
 901                 if ((type != EFX_RXQ_TYPE_PACKED_STREAM_1M) &&
 902                     (encp->enc_rx_var_packed_stream_supported == B_FALSE)) {
 903                         rc = ENOTSUP;
 904                         goto fail5;
 905                 }
 906         }
 907 #else /* EFSYS_OPT_RX_PACKED_STREAM */
 908         EFSYS_ASSERT(ps_buf_size == 0);
 909 #endif /* EFSYS_OPT_RX_PACKED_STREAM */
 910
 911         /* Scatter can only be disabled if the firmware supports doing so */
 912         if (type == EFX_RXQ_TYPE_SCATTER)
 913                 disable_scatter = B_FALSE;
 914         else
 915                 disable_scatter = encp->enc_rx_disable_scatter_supported;
 916
 917         if ((rc = efx_mcdi_init_rxq(enp, n, eep->ee_index, label, index,
 918                     esmp, disable_scatter, ps_buf_size)) != 0)
 919                 goto fail6;
 920
 921         erp->er_eep = eep;
 922         erp->er_label = label;
 923
 924         ef10_ev_rxlabel_init(eep, erp, label, ps_buf_size != 0);
 925
 926         return (0);
 927
 928 fail6:
 929         EFSYS_PROBE(fail6);
 930 #if EFSYS_OPT_RX_PACKED_STREAM
 931 fail5:
 932         EFSYS_PROBE(fail5);
 933 fail4:
 934         EFSYS_PROBE(fail4);
 935 #endif /* EFSYS_OPT_RX_PACKED_STREAM */
 936 fail3:
 937         EFSYS_PROBE(fail3);
 938 fail2:
 939         EFSYS_PROBE(fail2);
 940 fail1:
 941         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 942
 943         return (rc);
 944 }
 945
 946                 void
 947 ef10_rx_qdestroy(
 948         __in    efx_rxq_t *erp)
 949 {
 950         efx_nic_t *enp = erp->er_enp;
 951         efx_evq_t *eep = erp->er_eep;
 952         unsigned int label = erp->er_label;
 953
 954         ef10_ev_rxlabel_fini(eep, label);
 955
 956         EFSYS_ASSERT(enp->en_rx_qcount != 0);
 957         --enp->en_rx_qcount;
 958
 959         EFSYS_KMEM_FREE(enp->en_esip, sizeof (efx_rxq_t), erp);
 960 }
 961
 962                 void
 963 ef10_rx_fini(
 964         __in    efx_nic_t *enp)
 965 {
 966 #if EFSYS_OPT_RX_SCALE
 967         if (enp->en_rss_support != EFX_RX_SCALE_UNAVAILABLE) {
 968                 (void) efx_mcdi_rss_context_free(enp, enp->en_rss_context);
 969         }
 970         enp->en_rss_context = 0;
 971         enp->en_rss_support = EFX_RX_SCALE_UNAVAILABLE;
 972 #else
 973         _NOTE(ARGUNUSED(enp))
 974 #endif /* EFSYS_OPT_RX_SCALE */
 975 }
 976
 977 #endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD */