2 * Copyright (c) 2012-2016 Solarflare Communications Inc.
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions are met:
8 * 1. Redistributions of source code must retain the above copyright notice,
9 * this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright notice,
11 * this list of conditions and the following disclaimer in the documentation
12 * and/or other materials provided with the distribution.
14 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
15 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
16 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
17 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
18 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
19 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
20 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
21 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
22 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
23 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
24 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26 * The views and conclusions contained in the software and documentation are
27 * those of the authors and should not be interpreted as representing official
28 * policies, either expressed or implied, of the FreeBSD Project.
35 #if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD
38 static __checkReturn efx_rc_t
42 __in uint32_t target_evq,
44 __in uint32_t instance,
45 __in efsys_mem_t *esmp,
46 __in boolean_t disable_scatter,
47 __in uint32_t ps_bufsize)
50 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_INIT_RXQ_EXT_IN_LEN,
51 MC_CMD_INIT_RXQ_EXT_OUT_LEN);
52 int npages = EFX_RXQ_NBUFS(size);
54 efx_qword_t *dma_addr;
59 /* If this changes, then the payload size might need to change. */
60 EFSYS_ASSERT3U(MC_CMD_INIT_RXQ_OUT_LEN, ==, 0);
61 EFSYS_ASSERT3U(size, <=, EFX_RXQ_MAXNDESCS);
64 dma_mode = MC_CMD_INIT_RXQ_EXT_IN_PACKED_STREAM;
66 dma_mode = MC_CMD_INIT_RXQ_EXT_IN_SINGLE_PACKET;
68 req.emr_cmd = MC_CMD_INIT_RXQ;
69 req.emr_in_buf = payload;
70 req.emr_in_length = MC_CMD_INIT_RXQ_EXT_IN_LEN;
71 req.emr_out_buf = payload;
72 req.emr_out_length = MC_CMD_INIT_RXQ_EXT_OUT_LEN;
74 MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_SIZE, size);
75 MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_TARGET_EVQ, target_evq);
76 MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_LABEL, label);
77 MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_INSTANCE, instance);
78 MCDI_IN_POPULATE_DWORD_8(req, INIT_RXQ_EXT_IN_FLAGS,
79 INIT_RXQ_EXT_IN_FLAG_BUFF_MODE, 0,
80 INIT_RXQ_EXT_IN_FLAG_HDR_SPLIT, 0,
81 INIT_RXQ_EXT_IN_FLAG_TIMESTAMP, 0,
82 INIT_RXQ_EXT_IN_CRC_MODE, 0,
83 INIT_RXQ_EXT_IN_FLAG_PREFIX, 1,
84 INIT_RXQ_EXT_IN_FLAG_DISABLE_SCATTER, disable_scatter,
85 INIT_RXQ_EXT_IN_DMA_MODE,
87 INIT_RXQ_EXT_IN_PACKED_STREAM_BUFF_SIZE, ps_bufsize);
88 MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_OWNER_ID, 0);
89 MCDI_IN_SET_DWORD(req, INIT_RXQ_EXT_IN_PORT_ID, EVB_PORT_ID_ASSIGNED);
91 dma_addr = MCDI_IN2(req, efx_qword_t, INIT_RXQ_IN_DMA_ADDR);
92 addr = EFSYS_MEM_ADDR(esmp);
94 for (i = 0; i < npages; i++) {
95 EFX_POPULATE_QWORD_2(*dma_addr,
96 EFX_DWORD_1, (uint32_t)(addr >> 32),
97 EFX_DWORD_0, (uint32_t)(addr & 0xffffffff));
100 addr += EFX_BUF_SIZE;
103 efx_mcdi_execute(enp, &req);
105 if (req.emr_rc != 0) {
113 EFSYS_PROBE1(fail1, efx_rc_t, rc);
118 static __checkReturn efx_rc_t
121 __in uint32_t instance)
124 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_FINI_RXQ_IN_LEN,
125 MC_CMD_FINI_RXQ_OUT_LEN);
128 req.emr_cmd = MC_CMD_FINI_RXQ;
129 req.emr_in_buf = payload;
130 req.emr_in_length = MC_CMD_FINI_RXQ_IN_LEN;
131 req.emr_out_buf = payload;
132 req.emr_out_length = MC_CMD_FINI_RXQ_OUT_LEN;
134 MCDI_IN_SET_DWORD(req, FINI_RXQ_IN_INSTANCE, instance);
136 efx_mcdi_execute_quiet(enp, &req);
138 if (req.emr_rc != 0) {
147 * EALREADY is not an error, but indicates that the MC has rebooted and
148 * that the RXQ has already been destroyed.
151 EFSYS_PROBE1(fail1, efx_rc_t, rc);
156 #if EFSYS_OPT_RX_SCALE
157 static __checkReturn efx_rc_t
158 efx_mcdi_rss_context_alloc(
160 __in efx_rx_scale_context_type_t type,
161 __in uint32_t num_queues,
162 __out uint32_t *rss_contextp)
165 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_RSS_CONTEXT_ALLOC_IN_LEN,
166 MC_CMD_RSS_CONTEXT_ALLOC_OUT_LEN);
167 uint32_t rss_context;
168 uint32_t context_type;
171 if (num_queues > EFX_MAXRSS) {
177 case EFX_RX_SCALE_EXCLUSIVE:
178 context_type = MC_CMD_RSS_CONTEXT_ALLOC_IN_TYPE_EXCLUSIVE;
180 case EFX_RX_SCALE_SHARED:
181 context_type = MC_CMD_RSS_CONTEXT_ALLOC_IN_TYPE_SHARED;
188 req.emr_cmd = MC_CMD_RSS_CONTEXT_ALLOC;
189 req.emr_in_buf = payload;
190 req.emr_in_length = MC_CMD_RSS_CONTEXT_ALLOC_IN_LEN;
191 req.emr_out_buf = payload;
192 req.emr_out_length = MC_CMD_RSS_CONTEXT_ALLOC_OUT_LEN;
194 MCDI_IN_SET_DWORD(req, RSS_CONTEXT_ALLOC_IN_UPSTREAM_PORT_ID,
195 EVB_PORT_ID_ASSIGNED);
196 MCDI_IN_SET_DWORD(req, RSS_CONTEXT_ALLOC_IN_TYPE, context_type);
197 /* NUM_QUEUES is only used to validate indirection table offsets */
198 MCDI_IN_SET_DWORD(req, RSS_CONTEXT_ALLOC_IN_NUM_QUEUES, num_queues);
200 efx_mcdi_execute(enp, &req);
202 if (req.emr_rc != 0) {
207 if (req.emr_out_length_used < MC_CMD_RSS_CONTEXT_ALLOC_OUT_LEN) {
212 rss_context = MCDI_OUT_DWORD(req, RSS_CONTEXT_ALLOC_OUT_RSS_CONTEXT_ID);
213 if (rss_context == EF10_RSS_CONTEXT_INVALID) {
218 *rss_contextp = rss_context;
231 EFSYS_PROBE1(fail1, efx_rc_t, rc);
235 #endif /* EFSYS_OPT_RX_SCALE */
237 #if EFSYS_OPT_RX_SCALE
239 efx_mcdi_rss_context_free(
241 __in uint32_t rss_context)
244 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_RSS_CONTEXT_FREE_IN_LEN,
245 MC_CMD_RSS_CONTEXT_FREE_OUT_LEN);
248 if (rss_context == EF10_RSS_CONTEXT_INVALID) {
253 req.emr_cmd = MC_CMD_RSS_CONTEXT_FREE;
254 req.emr_in_buf = payload;
255 req.emr_in_length = MC_CMD_RSS_CONTEXT_FREE_IN_LEN;
256 req.emr_out_buf = payload;
257 req.emr_out_length = MC_CMD_RSS_CONTEXT_FREE_OUT_LEN;
259 MCDI_IN_SET_DWORD(req, RSS_CONTEXT_FREE_IN_RSS_CONTEXT_ID, rss_context);
261 efx_mcdi_execute_quiet(enp, &req);
263 if (req.emr_rc != 0) {
273 EFSYS_PROBE1(fail1, efx_rc_t, rc);
277 #endif /* EFSYS_OPT_RX_SCALE */
279 #if EFSYS_OPT_RX_SCALE
281 efx_mcdi_rss_context_set_flags(
283 __in uint32_t rss_context,
284 __in efx_rx_hash_type_t type)
287 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_LEN,
288 MC_CMD_RSS_CONTEXT_SET_FLAGS_OUT_LEN);
291 if (rss_context == EF10_RSS_CONTEXT_INVALID) {
296 req.emr_cmd = MC_CMD_RSS_CONTEXT_SET_FLAGS;
297 req.emr_in_buf = payload;
298 req.emr_in_length = MC_CMD_RSS_CONTEXT_SET_FLAGS_IN_LEN;
299 req.emr_out_buf = payload;
300 req.emr_out_length = MC_CMD_RSS_CONTEXT_SET_FLAGS_OUT_LEN;
302 MCDI_IN_SET_DWORD(req, RSS_CONTEXT_SET_FLAGS_IN_RSS_CONTEXT_ID,
305 MCDI_IN_POPULATE_DWORD_4(req, RSS_CONTEXT_SET_FLAGS_IN_FLAGS,
306 RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_IPV4_EN,
307 (type & EFX_RX_HASH_IPV4) ? 1 : 0,
308 RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_TCPV4_EN,
309 (type & EFX_RX_HASH_TCPIPV4) ? 1 : 0,
310 RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_IPV6_EN,
311 (type & EFX_RX_HASH_IPV6) ? 1 : 0,
312 RSS_CONTEXT_SET_FLAGS_IN_TOEPLITZ_TCPV6_EN,
313 (type & EFX_RX_HASH_TCPIPV6) ? 1 : 0);
315 efx_mcdi_execute(enp, &req);
317 if (req.emr_rc != 0) {
327 EFSYS_PROBE1(fail1, efx_rc_t, rc);
331 #endif /* EFSYS_OPT_RX_SCALE */
333 #if EFSYS_OPT_RX_SCALE
335 efx_mcdi_rss_context_set_key(
337 __in uint32_t rss_context,
338 __in_ecount(n) uint8_t *key,
342 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_RSS_CONTEXT_SET_KEY_IN_LEN,
343 MC_CMD_RSS_CONTEXT_SET_KEY_OUT_LEN);
346 if (rss_context == EF10_RSS_CONTEXT_INVALID) {
351 req.emr_cmd = MC_CMD_RSS_CONTEXT_SET_KEY;
352 req.emr_in_buf = payload;
353 req.emr_in_length = MC_CMD_RSS_CONTEXT_SET_KEY_IN_LEN;
354 req.emr_out_buf = payload;
355 req.emr_out_length = MC_CMD_RSS_CONTEXT_SET_KEY_OUT_LEN;
357 MCDI_IN_SET_DWORD(req, RSS_CONTEXT_SET_KEY_IN_RSS_CONTEXT_ID,
360 EFSYS_ASSERT3U(n, ==, MC_CMD_RSS_CONTEXT_SET_KEY_IN_TOEPLITZ_KEY_LEN);
361 if (n != MC_CMD_RSS_CONTEXT_SET_KEY_IN_TOEPLITZ_KEY_LEN) {
366 memcpy(MCDI_IN2(req, uint8_t, RSS_CONTEXT_SET_KEY_IN_TOEPLITZ_KEY),
369 efx_mcdi_execute(enp, &req);
371 if (req.emr_rc != 0) {
383 EFSYS_PROBE1(fail1, efx_rc_t, rc);
387 #endif /* EFSYS_OPT_RX_SCALE */
389 #if EFSYS_OPT_RX_SCALE
391 efx_mcdi_rss_context_set_table(
393 __in uint32_t rss_context,
394 __in_ecount(n) unsigned int *table,
398 EFX_MCDI_DECLARE_BUF(payload, MC_CMD_RSS_CONTEXT_SET_TABLE_IN_LEN,
399 MC_CMD_RSS_CONTEXT_SET_TABLE_OUT_LEN);
403 if (rss_context == EF10_RSS_CONTEXT_INVALID) {
408 req.emr_cmd = MC_CMD_RSS_CONTEXT_SET_TABLE;
409 req.emr_in_buf = payload;
410 req.emr_in_length = MC_CMD_RSS_CONTEXT_SET_TABLE_IN_LEN;
411 req.emr_out_buf = payload;
412 req.emr_out_length = MC_CMD_RSS_CONTEXT_SET_TABLE_OUT_LEN;
414 MCDI_IN_SET_DWORD(req, RSS_CONTEXT_SET_TABLE_IN_RSS_CONTEXT_ID,
418 MCDI_IN2(req, uint8_t, RSS_CONTEXT_SET_TABLE_IN_INDIRECTION_TABLE);
421 i < MC_CMD_RSS_CONTEXT_SET_TABLE_IN_INDIRECTION_TABLE_LEN;
423 req_table[i] = (n > 0) ? (uint8_t)table[i % n] : 0;
426 efx_mcdi_execute(enp, &req);
428 if (req.emr_rc != 0) {
438 EFSYS_PROBE1(fail1, efx_rc_t, rc);
442 #endif /* EFSYS_OPT_RX_SCALE */
445 __checkReturn efx_rc_t
449 #if EFSYS_OPT_RX_SCALE
451 if (efx_mcdi_rss_context_alloc(enp, EFX_RX_SCALE_EXCLUSIVE, EFX_MAXRSS,
452 &enp->en_rss_context) == 0) {
454 * Allocated an exclusive RSS context, which allows both the
455 * indirection table and key to be modified.
457 enp->en_rss_context_type = EFX_RX_SCALE_EXCLUSIVE;
458 enp->en_hash_support = EFX_RX_HASH_AVAILABLE;
461 * Failed to allocate an exclusive RSS context. Continue
462 * operation without support for RSS. The pseudo-header in
463 * received packets will not contain a Toeplitz hash value.
465 enp->en_rss_context_type = EFX_RX_SCALE_UNAVAILABLE;
466 enp->en_hash_support = EFX_RX_HASH_UNAVAILABLE;
469 #endif /* EFSYS_OPT_RX_SCALE */
474 #if EFSYS_OPT_RX_SCATTER
475 __checkReturn efx_rc_t
476 ef10_rx_scatter_enable(
478 __in unsigned int buf_size)
480 _NOTE(ARGUNUSED(enp, buf_size))
483 #endif /* EFSYS_OPT_RX_SCATTER */
485 #if EFSYS_OPT_RX_SCALE
486 __checkReturn efx_rc_t
487 ef10_rx_scale_context_alloc(
489 __in efx_rx_scale_context_type_t type,
490 __in uint32_t num_queues,
491 __out uint32_t *rss_contextp)
495 rc = efx_mcdi_rss_context_alloc(enp, type, num_queues, rss_contextp);
502 EFSYS_PROBE1(fail1, efx_rc_t, rc);
505 #endif /* EFSYS_OPT_RX_SCALE */
507 #if EFSYS_OPT_RX_SCALE
508 __checkReturn efx_rc_t
509 ef10_rx_scale_context_free(
511 __in uint32_t rss_context)
515 rc = efx_mcdi_rss_context_free(enp, rss_context);
522 EFSYS_PROBE1(fail1, efx_rc_t, rc);
525 #endif /* EFSYS_OPT_RX_SCALE */
527 #if EFSYS_OPT_RX_SCALE
528 __checkReturn efx_rc_t
529 ef10_rx_scale_mode_set(
531 __in uint32_t rss_context,
532 __in efx_rx_hash_alg_t alg,
533 __in efx_rx_hash_type_t type,
534 __in boolean_t insert)
538 EFSYS_ASSERT3U(alg, ==, EFX_RX_HASHALG_TOEPLITZ);
539 EFSYS_ASSERT3U(insert, ==, B_TRUE);
541 if ((alg != EFX_RX_HASHALG_TOEPLITZ) || (insert == B_FALSE)) {
546 if (rss_context == EFX_RSS_CONTEXT_DEFAULT) {
547 if (enp->en_rss_context_type == EFX_RX_SCALE_UNAVAILABLE) {
551 rss_context = enp->en_rss_context;
554 if ((rc = efx_mcdi_rss_context_set_flags(enp,
555 rss_context, type)) != 0)
565 EFSYS_PROBE1(fail1, efx_rc_t, rc);
569 #endif /* EFSYS_OPT_RX_SCALE */
571 #if EFSYS_OPT_RX_SCALE
572 __checkReturn efx_rc_t
573 ef10_rx_scale_key_set(
575 __in uint32_t rss_context,
576 __in_ecount(n) uint8_t *key,
581 EFX_STATIC_ASSERT(EFX_RSS_KEY_SIZE ==
582 MC_CMD_RSS_CONTEXT_SET_KEY_IN_TOEPLITZ_KEY_LEN);
584 if (rss_context == EFX_RSS_CONTEXT_DEFAULT) {
585 if (enp->en_rss_context_type == EFX_RX_SCALE_UNAVAILABLE) {
589 rss_context = enp->en_rss_context;
592 if ((rc = efx_mcdi_rss_context_set_key(enp, rss_context, key, n)) != 0)
600 EFSYS_PROBE1(fail1, efx_rc_t, rc);
604 #endif /* EFSYS_OPT_RX_SCALE */
606 #if EFSYS_OPT_RX_SCALE
607 __checkReturn efx_rc_t
608 ef10_rx_scale_tbl_set(
610 __in uint32_t rss_context,
611 __in_ecount(n) unsigned int *table,
617 if (rss_context == EFX_RSS_CONTEXT_DEFAULT) {
618 if (enp->en_rss_context_type == EFX_RX_SCALE_UNAVAILABLE) {
622 rss_context = enp->en_rss_context;
625 if ((rc = efx_mcdi_rss_context_set_table(enp,
626 rss_context, table, n)) != 0)
634 EFSYS_PROBE1(fail1, efx_rc_t, rc);
638 #endif /* EFSYS_OPT_RX_SCALE */
642 * EF10 RX pseudo-header
643 * ---------------------
645 * Receive packets are prefixed by an (optional) 14 byte pseudo-header:
647 * +00: Toeplitz hash value.
648 * (32bit little-endian)
649 * +04: Outer VLAN tag. Zero if the packet did not have an outer VLAN tag.
651 * +06: Inner VLAN tag. Zero if the packet did not have an inner VLAN tag.
653 * +08: Packet Length. Zero if the RX datapath was in cut-through mode.
654 * (16bit little-endian)
655 * +10: MAC timestamp. Zero if timestamping is not enabled.
656 * (32bit little-endian)
658 * See "The RX Pseudo-header" in SF-109306-TC.
661 __checkReturn efx_rc_t
662 ef10_rx_prefix_pktlen(
664 __in uint8_t *buffer,
665 __out uint16_t *lengthp)
667 _NOTE(ARGUNUSED(enp))
670 * The RX pseudo-header contains the packet length, excluding the
671 * pseudo-header. If the hardware receive datapath was operating in
672 * cut-through mode then the length in the RX pseudo-header will be
673 * zero, and the packet length must be obtained from the DMA length
674 * reported in the RX event.
676 *lengthp = buffer[8] | (buffer[9] << 8);
680 #if EFSYS_OPT_RX_SCALE
681 __checkReturn uint32_t
684 __in efx_rx_hash_alg_t func,
685 __in uint8_t *buffer)
687 _NOTE(ARGUNUSED(enp))
690 case EFX_RX_HASHALG_TOEPLITZ:
701 #endif /* EFSYS_OPT_RX_SCALE */
706 __in_ecount(n) efsys_dma_addr_t *addrp,
709 __in unsigned int completed,
710 __in unsigned int added)
717 /* The client driver must not overfill the queue */
718 EFSYS_ASSERT3U(added - completed + n, <=,
719 EFX_RXQ_LIMIT(erp->er_mask + 1));
721 id = added & (erp->er_mask);
722 for (i = 0; i < n; i++) {
723 EFSYS_PROBE4(rx_post, unsigned int, erp->er_index,
724 unsigned int, id, efsys_dma_addr_t, addrp[i],
727 EFX_POPULATE_QWORD_3(qword,
728 ESF_DZ_RX_KER_BYTE_CNT, (uint32_t)(size),
729 ESF_DZ_RX_KER_BUF_ADDR_DW0,
730 (uint32_t)(addrp[i] & 0xffffffff),
731 ESF_DZ_RX_KER_BUF_ADDR_DW1,
732 (uint32_t)(addrp[i] >> 32));
734 offset = id * sizeof (efx_qword_t);
735 EFSYS_MEM_WRITEQ(erp->er_esmp, offset, &qword);
737 id = (id + 1) & (erp->er_mask);
744 __in unsigned int added,
745 __inout unsigned int *pushedp)
747 efx_nic_t *enp = erp->er_enp;
748 unsigned int pushed = *pushedp;
752 /* Hardware has alignment restriction for WPTR */
753 wptr = P2ALIGN(added, EF10_RX_WPTR_ALIGN);
759 /* Push the populated descriptors out */
760 wptr &= erp->er_mask;
762 EFX_POPULATE_DWORD_1(dword, ERF_DZ_RX_DESC_WPTR, wptr);
764 /* Guarantee ordering of memory (descriptors) and PIO (doorbell) */
765 EFX_DMA_SYNC_QUEUE_FOR_DEVICE(erp->er_esmp, erp->er_mask + 1,
766 wptr, pushed & erp->er_mask);
767 EFSYS_PIO_WRITE_BARRIER();
768 EFX_BAR_TBL_WRITED(enp, ER_DZ_RX_DESC_UPD_REG,
769 erp->er_index, &dword, B_FALSE);
772 #if EFSYS_OPT_RX_PACKED_STREAM
775 ef10_rx_qps_update_credits(
778 efx_nic_t *enp = erp->er_enp;
780 efx_evq_rxq_state_t *rxq_state =
781 &erp->er_eep->ee_rxq_state[erp->er_label];
783 EFSYS_ASSERT(rxq_state->eers_rx_packed_stream);
785 if (rxq_state->eers_rx_packed_stream_credits == 0)
788 EFX_POPULATE_DWORD_3(dword,
789 ERF_DZ_RX_DESC_MAGIC_DOORBELL, 1,
790 ERF_DZ_RX_DESC_MAGIC_CMD,
791 ERE_DZ_RX_DESC_MAGIC_CMD_PS_CREDITS,
792 ERF_DZ_RX_DESC_MAGIC_DATA,
793 rxq_state->eers_rx_packed_stream_credits);
794 EFX_BAR_TBL_WRITED(enp, ER_DZ_RX_DESC_UPD_REG,
795 erp->er_index, &dword, B_FALSE);
797 rxq_state->eers_rx_packed_stream_credits = 0;
800 __checkReturn uint8_t *
801 ef10_rx_qps_packet_info(
803 __in uint8_t *buffer,
804 __in uint32_t buffer_length,
805 __in uint32_t current_offset,
806 __out uint16_t *lengthp,
807 __out uint32_t *next_offsetp,
808 __out uint32_t *timestamp)
813 efx_evq_rxq_state_t *rxq_state =
814 &erp->er_eep->ee_rxq_state[erp->er_label];
816 EFSYS_ASSERT(rxq_state->eers_rx_packed_stream);
818 buffer += current_offset;
819 pkt_start = buffer + EFX_RX_PACKED_STREAM_RX_PREFIX_SIZE;
821 qwordp = (efx_qword_t *)buffer;
822 *timestamp = EFX_QWORD_FIELD(*qwordp, ES_DZ_PS_RX_PREFIX_TSTAMP);
823 *lengthp = EFX_QWORD_FIELD(*qwordp, ES_DZ_PS_RX_PREFIX_ORIG_LEN);
824 buf_len = EFX_QWORD_FIELD(*qwordp, ES_DZ_PS_RX_PREFIX_CAP_LEN);
826 buf_len = P2ROUNDUP(buf_len + EFX_RX_PACKED_STREAM_RX_PREFIX_SIZE,
827 EFX_RX_PACKED_STREAM_ALIGNMENT);
829 current_offset + buf_len + EFX_RX_PACKED_STREAM_ALIGNMENT;
831 EFSYS_ASSERT3U(*next_offsetp, <=, buffer_length);
832 EFSYS_ASSERT3U(current_offset + *lengthp, <, *next_offsetp);
834 if ((*next_offsetp ^ current_offset) &
835 EFX_RX_PACKED_STREAM_MEM_PER_CREDIT) {
836 if (rxq_state->eers_rx_packed_stream_credits <
837 EFX_RX_PACKED_STREAM_MAX_CREDITS)
838 rxq_state->eers_rx_packed_stream_credits++;
847 __checkReturn efx_rc_t
851 efx_nic_t *enp = erp->er_enp;
854 if ((rc = efx_mcdi_fini_rxq(enp, erp->er_index)) != 0)
861 * EALREADY is not an error, but indicates that the MC has rebooted and
862 * that the RXQ has already been destroyed. Callers need to know that
863 * the RXQ flush has completed to avoid waiting until timeout for a
864 * flush done event that will not be delivered.
867 EFSYS_PROBE1(fail1, efx_rc_t, rc);
877 _NOTE(ARGUNUSED(erp))
881 __checkReturn efx_rc_t
884 __in unsigned int index,
885 __in unsigned int label,
886 __in efx_rxq_type_t type,
887 __in efsys_mem_t *esmp,
893 efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
895 boolean_t disable_scatter;
896 unsigned int ps_buf_size;
898 _NOTE(ARGUNUSED(id, erp))
900 EFX_STATIC_ASSERT(EFX_EV_RX_NLABELS == (1 << ESF_DZ_RX_QLABEL_WIDTH));
901 EFSYS_ASSERT3U(label, <, EFX_EV_RX_NLABELS);
902 EFSYS_ASSERT3U(enp->en_rx_qcount + 1, <, encp->enc_rxq_limit);
904 EFX_STATIC_ASSERT(ISP2(EFX_RXQ_MAXNDESCS));
905 EFX_STATIC_ASSERT(ISP2(EFX_RXQ_MINNDESCS));
907 if (!ISP2(n) || (n < EFX_RXQ_MINNDESCS) || (n > EFX_RXQ_MAXNDESCS)) {
911 if (index >= encp->enc_rxq_limit) {
917 case EFX_RXQ_TYPE_DEFAULT:
918 case EFX_RXQ_TYPE_SCATTER:
921 #if EFSYS_OPT_RX_PACKED_STREAM
922 case EFX_RXQ_TYPE_PACKED_STREAM_1M:
923 ps_buf_size = MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_1M;
925 case EFX_RXQ_TYPE_PACKED_STREAM_512K:
926 ps_buf_size = MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_512K;
928 case EFX_RXQ_TYPE_PACKED_STREAM_256K:
929 ps_buf_size = MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_256K;
931 case EFX_RXQ_TYPE_PACKED_STREAM_128K:
932 ps_buf_size = MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_128K;
934 case EFX_RXQ_TYPE_PACKED_STREAM_64K:
935 ps_buf_size = MC_CMD_INIT_RXQ_EXT_IN_PS_BUFF_64K;
937 #endif /* EFSYS_OPT_RX_PACKED_STREAM */
943 #if EFSYS_OPT_RX_PACKED_STREAM
944 if (ps_buf_size != 0) {
945 /* Check if datapath firmware supports packed stream mode */
946 if (encp->enc_rx_packed_stream_supported == B_FALSE) {
950 /* Check if packed stream allows configurable buffer sizes */
951 if ((type != EFX_RXQ_TYPE_PACKED_STREAM_1M) &&
952 (encp->enc_rx_var_packed_stream_supported == B_FALSE)) {
957 #else /* EFSYS_OPT_RX_PACKED_STREAM */
958 EFSYS_ASSERT(ps_buf_size == 0);
959 #endif /* EFSYS_OPT_RX_PACKED_STREAM */
961 /* Scatter can only be disabled if the firmware supports doing so */
962 if (type == EFX_RXQ_TYPE_SCATTER)
963 disable_scatter = B_FALSE;
965 disable_scatter = encp->enc_rx_disable_scatter_supported;
967 if ((rc = efx_mcdi_init_rxq(enp, n, eep->ee_index, label, index,
968 esmp, disable_scatter, ps_buf_size)) != 0)
972 erp->er_label = label;
974 ef10_ev_rxlabel_init(eep, erp, label, ps_buf_size != 0);
980 #if EFSYS_OPT_RX_PACKED_STREAM
985 #endif /* EFSYS_OPT_RX_PACKED_STREAM */
991 EFSYS_PROBE1(fail1, efx_rc_t, rc);
1000 efx_nic_t *enp = erp->er_enp;
1001 efx_evq_t *eep = erp->er_eep;
1002 unsigned int label = erp->er_label;
1004 ef10_ev_rxlabel_fini(eep, label);
1006 EFSYS_ASSERT(enp->en_rx_qcount != 0);
1007 --enp->en_rx_qcount;
1009 EFSYS_KMEM_FREE(enp->en_esip, sizeof (efx_rxq_t), erp);
1014 __in efx_nic_t *enp)
1016 #if EFSYS_OPT_RX_SCALE
1017 if (enp->en_rss_context_type != EFX_RX_SCALE_UNAVAILABLE)
1018 (void) efx_mcdi_rss_context_free(enp, enp->en_rss_context);
1019 enp->en_rss_context = 0;
1020 enp->en_rss_context_type = EFX_RX_SCALE_UNAVAILABLE;
1022 _NOTE(ARGUNUSED(enp))
1023 #endif /* EFSYS_OPT_RX_SCALE */
1026 #endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD */