drivers/net/sfc/base/efx_ev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  *
   3  * Copyright (c) 2007-2018 Solarflare Communications Inc.
   4  * All rights reserved.
   5  */
   6
   7 #include "efx.h"
   8 #include "efx_impl.h"
   9 #if EFSYS_OPT_MON_MCDI
  10 #include "mcdi_mon.h"
  11 #endif
  12
  13 #if EFSYS_OPT_QSTATS
  14 #define EFX_EV_QSTAT_INCR(_eep, _stat)                                  \
  15         do {                                                            \
  16                 (_eep)->ee_stat[_stat]++;                               \
  17         _NOTE(CONSTANTCONDITION)                                        \
  18         } while (B_FALSE)
  19 #else
  20 #define EFX_EV_QSTAT_INCR(_eep, _stat)
  21 #endif
  22
  23 #define EFX_EV_PRESENT(_qword)                                          \
  24         (EFX_QWORD_FIELD((_qword), EFX_DWORD_0) != 0xffffffff &&        \
  25         EFX_QWORD_FIELD((_qword), EFX_DWORD_1) != 0xffffffff)
  26
  27
  28
  29 #if EFSYS_OPT_SIENA
  30
  31 static  __checkReturn   efx_rc_t
  32 siena_ev_init(
  33         __in            efx_nic_t *enp);
  34
  35 static                  void
  36 siena_ev_fini(
  37         __in            efx_nic_t *enp);
  38
  39 static  __checkReturn   efx_rc_t
  40 siena_ev_qcreate(
  41         __in            efx_nic_t *enp,
  42         __in            unsigned int index,
  43         __in            efsys_mem_t *esmp,
  44         __in            size_t ndescs,
  45         __in            uint32_t id,
  46         __in            uint32_t us,
  47         __in            uint32_t flags,
  48         __in            efx_evq_t *eep);
  49
  50 static                  void
  51 siena_ev_qdestroy(
  52         __in            efx_evq_t *eep);
  53
  54 static  __checkReturn   efx_rc_t
  55 siena_ev_qprime(
  56         __in            efx_evq_t *eep,
  57         __in            unsigned int count);
  58
  59 static                  void
  60 siena_ev_qpost(
  61         __in    efx_evq_t *eep,
  62         __in    uint16_t data);
  63
  64 static  __checkReturn   efx_rc_t
  65 siena_ev_qmoderate(
  66         __in            efx_evq_t *eep,
  67         __in            unsigned int us);
  68
  69 #if EFSYS_OPT_QSTATS
  70 static                  void
  71 siena_ev_qstats_update(
  72         __in                            efx_evq_t *eep,
  73         __inout_ecount(EV_NQSTATS)      efsys_stat_t *stat);
  74
  75 #endif
  76
  77 #endif /* EFSYS_OPT_SIENA */
  78
  79 #if EFSYS_OPT_SIENA
  80 static const efx_ev_ops_t       __efx_ev_siena_ops = {
  81         siena_ev_init,                          /* eevo_init */
  82         siena_ev_fini,                          /* eevo_fini */
  83         siena_ev_qcreate,                       /* eevo_qcreate */
  84         siena_ev_qdestroy,                      /* eevo_qdestroy */
  85         siena_ev_qprime,                        /* eevo_qprime */
  86         siena_ev_qpost,                         /* eevo_qpost */
  87         siena_ev_qmoderate,                     /* eevo_qmoderate */
  88 #if EFSYS_OPT_QSTATS
  89         siena_ev_qstats_update,                 /* eevo_qstats_update */
  90 #endif
  91 };
  92 #endif /* EFSYS_OPT_SIENA */
  93
  94 #if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
  95 static const efx_ev_ops_t       __efx_ev_ef10_ops = {
  96         ef10_ev_init,                           /* eevo_init */
  97         ef10_ev_fini,                           /* eevo_fini */
  98         ef10_ev_qcreate,                        /* eevo_qcreate */
  99         ef10_ev_qdestroy,                       /* eevo_qdestroy */
 100         ef10_ev_qprime,                         /* eevo_qprime */
 101         ef10_ev_qpost,                          /* eevo_qpost */
 102         ef10_ev_qmoderate,                      /* eevo_qmoderate */
 103 #if EFSYS_OPT_QSTATS
 104         ef10_ev_qstats_update,                  /* eevo_qstats_update */
 105 #endif
 106 };
 107 #endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
 108
 109
 110         __checkReturn   efx_rc_t
 111 efx_ev_init(
 112         __in            efx_nic_t *enp)
 113 {
 114         const efx_ev_ops_t *eevop;
 115         efx_rc_t rc;
 116
 117         EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
 118         EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_INTR);
 119
 120         if (enp->en_mod_flags & EFX_MOD_EV) {
 121                 rc = EINVAL;
 122                 goto fail1;
 123         }
 124
 125         switch (enp->en_family) {
 126 #if EFSYS_OPT_SIENA
 127         case EFX_FAMILY_SIENA:
 128                 eevop = &__efx_ev_siena_ops;
 129                 break;
 130 #endif /* EFSYS_OPT_SIENA */
 131
 132 #if EFSYS_OPT_HUNTINGTON
 133         case EFX_FAMILY_HUNTINGTON:
 134                 eevop = &__efx_ev_ef10_ops;
 135                 break;
 136 #endif /* EFSYS_OPT_HUNTINGTON */
 137
 138 #if EFSYS_OPT_MEDFORD
 139         case EFX_FAMILY_MEDFORD:
 140                 eevop = &__efx_ev_ef10_ops;
 141                 break;
 142 #endif /* EFSYS_OPT_MEDFORD */
 143
 144 #if EFSYS_OPT_MEDFORD2
 145         case EFX_FAMILY_MEDFORD2:
 146                 eevop = &__efx_ev_ef10_ops;
 147                 break;
 148 #endif /* EFSYS_OPT_MEDFORD2 */
 149
 150         default:
 151                 EFSYS_ASSERT(0);
 152                 rc = ENOTSUP;
 153                 goto fail1;
 154         }
 155
 156         EFSYS_ASSERT3U(enp->en_ev_qcount, ==, 0);
 157
 158         if ((rc = eevop->eevo_init(enp)) != 0)
 159                 goto fail2;
 160
 161         enp->en_eevop = eevop;
 162         enp->en_mod_flags |= EFX_MOD_EV;
 163         return (0);
 164
 165 fail2:
 166         EFSYS_PROBE(fail2);
 167
 168 fail1:
 169         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 170
 171         enp->en_eevop = NULL;
 172         enp->en_mod_flags &= ~EFX_MOD_EV;
 173         return (rc);
 174 }
 175
 176                 void
 177 efx_ev_fini(
 178         __in    efx_nic_t *enp)
 179 {
 180         const efx_ev_ops_t *eevop = enp->en_eevop;
 181
 182         EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
 183         EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_INTR);
 184         EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_EV);
 185         EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_RX));
 186         EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_TX));
 187         EFSYS_ASSERT3U(enp->en_ev_qcount, ==, 0);
 188
 189         eevop->eevo_fini(enp);
 190
 191         enp->en_eevop = NULL;
 192         enp->en_mod_flags &= ~EFX_MOD_EV;
 193 }
 194
 195
 196         __checkReturn   efx_rc_t
 197 efx_ev_qcreate(
 198         __in            efx_nic_t *enp,
 199         __in            unsigned int index,
 200         __in            efsys_mem_t *esmp,
 201         __in            size_t ndescs,
 202         __in            uint32_t id,
 203         __in            uint32_t us,
 204         __in            uint32_t flags,
 205         __deref_out     efx_evq_t **eepp)
 206 {
 207         const efx_ev_ops_t *eevop = enp->en_eevop;
 208         efx_evq_t *eep;
 209         efx_rc_t rc;
 210
 211         EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
 212         EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_EV);
 213
 214         EFSYS_ASSERT3U(enp->en_ev_qcount + 1, <,
 215             enp->en_nic_cfg.enc_evq_limit);
 216
 217         switch (flags & EFX_EVQ_FLAGS_NOTIFY_MASK) {
 218         case EFX_EVQ_FLAGS_NOTIFY_INTERRUPT:
 219                 break;
 220         case EFX_EVQ_FLAGS_NOTIFY_DISABLED:
 221                 if (us != 0) {
 222                         rc = EINVAL;
 223                         goto fail1;
 224                 }
 225                 break;
 226         default:
 227                 rc = EINVAL;
 228                 goto fail2;
 229         }
 230
 231         /* Allocate an EVQ object */
 232         EFSYS_KMEM_ALLOC(enp->en_esip, sizeof (efx_evq_t), eep);
 233         if (eep == NULL) {
 234                 rc = ENOMEM;
 235                 goto fail3;
 236         }
 237
 238         eep->ee_magic = EFX_EVQ_MAGIC;
 239         eep->ee_enp = enp;
 240         eep->ee_index = index;
 241         eep->ee_mask = ndescs - 1;
 242         eep->ee_flags = flags;
 243         eep->ee_esmp = esmp;
 244
 245         /*
 246          * Set outputs before the queue is created because interrupts may be
 247          * raised for events immediately after the queue is created, before the
 248          * function call below returns. See bug58606.
 249          *
 250          * The eepp pointer passed in by the client must therefore point to data
 251          * shared with the client's event processing context.
 252          */
 253         enp->en_ev_qcount++;
 254         *eepp = eep;
 255
 256         if ((rc = eevop->eevo_qcreate(enp, index, esmp, ndescs, id, us, flags,
 257             eep)) != 0)
 258                 goto fail4;
 259
 260         return (0);
 261
 262 fail4:
 263         EFSYS_PROBE(fail4);
 264
 265         *eepp = NULL;
 266         enp->en_ev_qcount--;
 267         EFSYS_KMEM_FREE(enp->en_esip, sizeof (efx_evq_t), eep);
 268 fail3:
 269         EFSYS_PROBE(fail3);
 270 fail2:
 271         EFSYS_PROBE(fail2);
 272 fail1:
 273         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 274         return (rc);
 275 }
 276
 277                 void
 278 efx_ev_qdestroy(
 279         __in    efx_evq_t *eep)
 280 {
 281         efx_nic_t *enp = eep->ee_enp;
 282         const efx_ev_ops_t *eevop = enp->en_eevop;
 283
 284         EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
 285
 286         EFSYS_ASSERT(enp->en_ev_qcount != 0);
 287         --enp->en_ev_qcount;
 288
 289         eevop->eevo_qdestroy(eep);
 290
 291         /* Free the EVQ object */
 292         EFSYS_KMEM_FREE(enp->en_esip, sizeof (efx_evq_t), eep);
 293 }
 294
 295         __checkReturn   efx_rc_t
 296 efx_ev_qprime(
 297         __in            efx_evq_t *eep,
 298         __in            unsigned int count)
 299 {
 300         efx_nic_t *enp = eep->ee_enp;
 301         const efx_ev_ops_t *eevop = enp->en_eevop;
 302         efx_rc_t rc;
 303
 304         EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
 305
 306         if (!(enp->en_mod_flags & EFX_MOD_INTR)) {
 307                 rc = EINVAL;
 308                 goto fail1;
 309         }
 310
 311         if ((rc = eevop->eevo_qprime(eep, count)) != 0)
 312                 goto fail2;
 313
 314         return (0);
 315
 316 fail2:
 317         EFSYS_PROBE(fail2);
 318 fail1:
 319         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 320         return (rc);
 321 }
 322
 323         __checkReturn   boolean_t
 324 efx_ev_qpending(
 325         __in            efx_evq_t *eep,
 326         __in            unsigned int count)
 327 {
 328         size_t offset;
 329         efx_qword_t qword;
 330
 331         EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
 332
 333         offset = (count & eep->ee_mask) * sizeof (efx_qword_t);
 334         EFSYS_MEM_READQ(eep->ee_esmp, offset, &qword);
 335
 336         return (EFX_EV_PRESENT(qword));
 337 }
 338
 339 #if EFSYS_OPT_EV_PREFETCH
 340
 341                         void
 342 efx_ev_qprefetch(
 343         __in            efx_evq_t *eep,
 344         __in            unsigned int count)
 345 {
 346         unsigned int offset;
 347
 348         EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
 349
 350         offset = (count & eep->ee_mask) * sizeof (efx_qword_t);
 351         EFSYS_MEM_PREFETCH(eep->ee_esmp, offset);
 352 }
 353
 354 #endif  /* EFSYS_OPT_EV_PREFETCH */
 355
 356 #define EFX_EV_BATCH    8
 357
 358                         void
 359 efx_ev_qpoll(
 360         __in            efx_evq_t *eep,
 361         __inout         unsigned int *countp,
 362         __in            const efx_ev_callbacks_t *eecp,
 363         __in_opt        void *arg)
 364 {
 365         efx_qword_t ev[EFX_EV_BATCH];
 366         unsigned int batch;
 367         unsigned int total;
 368         unsigned int count;
 369         unsigned int index;
 370         size_t offset;
 371
 372         /* Ensure events codes match for EF10 (Huntington/Medford) and Siena */
 373         EFX_STATIC_ASSERT(ESF_DZ_EV_CODE_LBN == FSF_AZ_EV_CODE_LBN);
 374         EFX_STATIC_ASSERT(ESF_DZ_EV_CODE_WIDTH == FSF_AZ_EV_CODE_WIDTH);
 375
 376         EFX_STATIC_ASSERT(ESE_DZ_EV_CODE_RX_EV == FSE_AZ_EV_CODE_RX_EV);
 377         EFX_STATIC_ASSERT(ESE_DZ_EV_CODE_TX_EV == FSE_AZ_EV_CODE_TX_EV);
 378         EFX_STATIC_ASSERT(ESE_DZ_EV_CODE_DRIVER_EV == FSE_AZ_EV_CODE_DRIVER_EV);
 379         EFX_STATIC_ASSERT(ESE_DZ_EV_CODE_DRV_GEN_EV ==
 380             FSE_AZ_EV_CODE_DRV_GEN_EV);
 381 #if EFSYS_OPT_MCDI
 382         EFX_STATIC_ASSERT(ESE_DZ_EV_CODE_MCDI_EV ==
 383             FSE_AZ_EV_CODE_MCDI_EVRESPONSE);
 384 #endif
 385
 386         EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
 387         EFSYS_ASSERT(countp != NULL);
 388         EFSYS_ASSERT(eecp != NULL);
 389
 390         count = *countp;
 391         do {
 392                 /* Read up until the end of the batch period */
 393                 batch = EFX_EV_BATCH - (count & (EFX_EV_BATCH - 1));
 394                 offset = (count & eep->ee_mask) * sizeof (efx_qword_t);
 395                 for (total = 0; total < batch; ++total) {
 396                         EFSYS_MEM_READQ(eep->ee_esmp, offset, &(ev[total]));
 397
 398                         if (!EFX_EV_PRESENT(ev[total]))
 399                                 break;
 400
 401                         EFSYS_PROBE3(event, unsigned int, eep->ee_index,
 402                             uint32_t, EFX_QWORD_FIELD(ev[total], EFX_DWORD_1),
 403                             uint32_t, EFX_QWORD_FIELD(ev[total], EFX_DWORD_0));
 404
 405                         offset += sizeof (efx_qword_t);
 406                 }
 407
 408 #if EFSYS_OPT_EV_PREFETCH && (EFSYS_OPT_EV_PREFETCH_PERIOD > 1)
 409                 /*
 410                  * Prefetch the next batch when we get within PREFETCH_PERIOD
 411                  * of a completed batch. If the batch is smaller, then prefetch
 412                  * immediately.
 413                  */
 414                 if (total == batch && total < EFSYS_OPT_EV_PREFETCH_PERIOD)
 415                         EFSYS_MEM_PREFETCH(eep->ee_esmp, offset);
 416 #endif  /* EFSYS_OPT_EV_PREFETCH */
 417
 418                 /* Process the batch of events */
 419                 for (index = 0; index < total; ++index) {
 420                         boolean_t should_abort;
 421                         uint32_t code;
 422
 423 #if EFSYS_OPT_EV_PREFETCH
 424                         /* Prefetch if we've now reached the batch period */
 425                         if (total == batch &&
 426                             index + EFSYS_OPT_EV_PREFETCH_PERIOD == total) {
 427                                 offset = (count + batch) & eep->ee_mask;
 428                                 offset *= sizeof (efx_qword_t);
 429
 430                                 EFSYS_MEM_PREFETCH(eep->ee_esmp, offset);
 431                         }
 432 #endif  /* EFSYS_OPT_EV_PREFETCH */
 433
 434                         EFX_EV_QSTAT_INCR(eep, EV_ALL);
 435
 436                         code = EFX_QWORD_FIELD(ev[index], FSF_AZ_EV_CODE);
 437                         switch (code) {
 438                         case FSE_AZ_EV_CODE_RX_EV:
 439                                 should_abort = eep->ee_rx(eep,
 440                                     &(ev[index]), eecp, arg);
 441                                 break;
 442                         case FSE_AZ_EV_CODE_TX_EV:
 443                                 should_abort = eep->ee_tx(eep,
 444                                     &(ev[index]), eecp, arg);
 445                                 break;
 446                         case FSE_AZ_EV_CODE_DRIVER_EV:
 447                                 should_abort = eep->ee_driver(eep,
 448                                     &(ev[index]), eecp, arg);
 449                                 break;
 450                         case FSE_AZ_EV_CODE_DRV_GEN_EV:
 451                                 should_abort = eep->ee_drv_gen(eep,
 452                                     &(ev[index]), eecp, arg);
 453                                 break;
 454 #if EFSYS_OPT_MCDI
 455                         case FSE_AZ_EV_CODE_MCDI_EVRESPONSE:
 456                                 should_abort = eep->ee_mcdi(eep,
 457                                     &(ev[index]), eecp, arg);
 458                                 break;
 459 #endif
 460                         case FSE_AZ_EV_CODE_GLOBAL_EV:
 461                                 if (eep->ee_global) {
 462                                         should_abort = eep->ee_global(eep,
 463                                             &(ev[index]), eecp, arg);
 464                                         break;
 465                                 }
 466                                 /* else fallthrough */
 467                         default:
 468                                 EFSYS_PROBE3(bad_event,
 469                                     unsigned int, eep->ee_index,
 470                                     uint32_t,
 471                                     EFX_QWORD_FIELD(ev[index], EFX_DWORD_1),
 472                                     uint32_t,
 473                                     EFX_QWORD_FIELD(ev[index], EFX_DWORD_0));
 474
 475                                 EFSYS_ASSERT(eecp->eec_exception != NULL);
 476                                 (void) eecp->eec_exception(arg,
 477                                         EFX_EXCEPTION_EV_ERROR, code);
 478                                 should_abort = B_TRUE;
 479                         }
 480                         if (should_abort) {
 481                                 /* Ignore subsequent events */
 482                                 total = index + 1;
 483                                 break;
 484                         }
 485                 }
 486
 487                 /*
 488                  * Now that the hardware has most likely moved onto dma'ing
 489                  * into the next cache line, clear the processed events. Take
 490                  * care to only clear out events that we've processed
 491                  */
 492                 EFX_SET_QWORD(ev[0]);
 493                 offset = (count & eep->ee_mask) * sizeof (efx_qword_t);
 494                 for (index = 0; index < total; ++index) {
 495                         EFSYS_MEM_WRITEQ(eep->ee_esmp, offset, &(ev[0]));
 496                         offset += sizeof (efx_qword_t);
 497                 }
 498
 499                 count += total;
 500
 501         } while (total == batch);
 502
 503         *countp = count;
 504 }
 505
 506                         void
 507 efx_ev_qpost(
 508         __in    efx_evq_t *eep,
 509         __in    uint16_t data)
 510 {
 511         efx_nic_t *enp = eep->ee_enp;
 512         const efx_ev_ops_t *eevop = enp->en_eevop;
 513
 514         EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
 515
 516         EFSYS_ASSERT(eevop != NULL &&
 517             eevop->eevo_qpost != NULL);
 518
 519         eevop->eevo_qpost(eep, data);
 520 }
 521
 522         __checkReturn   efx_rc_t
 523 efx_ev_usecs_to_ticks(
 524         __in            efx_nic_t *enp,
 525         __in            unsigned int us,
 526         __out           unsigned int *ticksp)
 527 {
 528         efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
 529         unsigned int ticks;
 530
 531         /* Convert microseconds to a timer tick count */
 532         if (us == 0)
 533                 ticks = 0;
 534         else if (us * 1000 < encp->enc_evq_timer_quantum_ns)
 535                 ticks = 1;      /* Never round down to zero */
 536         else
 537                 ticks = us * 1000 / encp->enc_evq_timer_quantum_ns;
 538
 539         *ticksp = ticks;
 540         return (0);
 541 }
 542
 543         __checkReturn   efx_rc_t
 544 efx_ev_qmoderate(
 545         __in            efx_evq_t *eep,
 546         __in            unsigned int us)
 547 {
 548         efx_nic_t *enp = eep->ee_enp;
 549         const efx_ev_ops_t *eevop = enp->en_eevop;
 550         efx_rc_t rc;
 551
 552         EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
 553
 554         if ((eep->ee_flags & EFX_EVQ_FLAGS_NOTIFY_MASK) ==
 555             EFX_EVQ_FLAGS_NOTIFY_DISABLED) {
 556                 rc = EINVAL;
 557                 goto fail1;
 558         }
 559
 560         if ((rc = eevop->eevo_qmoderate(eep, us)) != 0)
 561                 goto fail2;
 562
 563         return (0);
 564
 565 fail2:
 566         EFSYS_PROBE(fail2);
 567 fail1:
 568         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 569         return (rc);
 570 }
 571
 572 #if EFSYS_OPT_QSTATS
 573                                         void
 574 efx_ev_qstats_update(
 575         __in                            efx_evq_t *eep,
 576         __inout_ecount(EV_NQSTATS)      efsys_stat_t *stat)
 577
 578 {       efx_nic_t *enp = eep->ee_enp;
 579         const efx_ev_ops_t *eevop = enp->en_eevop;
 580
 581         EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
 582
 583         eevop->eevo_qstats_update(eep, stat);
 584 }
 585
 586 #endif  /* EFSYS_OPT_QSTATS */
 587
 588 #if EFSYS_OPT_SIENA
 589
 590 static  __checkReturn   efx_rc_t
 591 siena_ev_init(
 592         __in            efx_nic_t *enp)
 593 {
 594         efx_oword_t oword;
 595
 596         /*
 597          * Program the event queue for receive and transmit queue
 598          * flush events.
 599          */
 600         EFX_BAR_READO(enp, FR_AZ_DP_CTRL_REG, &oword);
 601         EFX_SET_OWORD_FIELD(oword, FRF_AZ_FLS_EVQ_ID, 0);
 602         EFX_BAR_WRITEO(enp, FR_AZ_DP_CTRL_REG, &oword);
 603
 604         return (0);
 605
 606 }
 607
 608 static  __checkReturn   boolean_t
 609 siena_ev_rx_not_ok(
 610         __in            efx_evq_t *eep,
 611         __in            efx_qword_t *eqp,
 612         __in            uint32_t label,
 613         __in            uint32_t id,
 614         __inout         uint16_t *flagsp)
 615 {
 616         boolean_t ignore = B_FALSE;
 617
 618         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_TOBE_DISC) != 0) {
 619                 EFX_EV_QSTAT_INCR(eep, EV_RX_TOBE_DISC);
 620                 EFSYS_PROBE(tobe_disc);
 621                 /*
 622                  * Assume this is a unicast address mismatch, unless below
 623                  * we find either FSF_AZ_RX_EV_ETH_CRC_ERR or
 624                  * EV_RX_PAUSE_FRM_ERR is set.
 625                  */
 626                 (*flagsp) |= EFX_ADDR_MISMATCH;
 627         }
 628
 629         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_FRM_TRUNC) != 0) {
 630                 EFSYS_PROBE2(frm_trunc, uint32_t, label, uint32_t, id);
 631                 EFX_EV_QSTAT_INCR(eep, EV_RX_FRM_TRUNC);
 632                 (*flagsp) |= EFX_DISCARD;
 633
 634 #if EFSYS_OPT_RX_SCATTER
 635                 /*
 636                  * Lookout for payload queue ran dry errors and ignore them.
 637                  *
 638                  * Sadly for the header/data split cases, the descriptor
 639                  * pointer in this event refers to the header queue and
 640                  * therefore cannot be easily detected as duplicate.
 641                  * So we drop these and rely on the receive processing seeing
 642                  * a subsequent packet with FSF_AZ_RX_EV_SOP set to discard
 643                  * the partially received packet.
 644                  */
 645                 if ((EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_SOP) == 0) &&
 646                     (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_JUMBO_CONT) == 0) &&
 647                     (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_BYTE_CNT) == 0))
 648                         ignore = B_TRUE;
 649 #endif  /* EFSYS_OPT_RX_SCATTER */
 650         }
 651
 652         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_ETH_CRC_ERR) != 0) {
 653                 EFX_EV_QSTAT_INCR(eep, EV_RX_ETH_CRC_ERR);
 654                 EFSYS_PROBE(crc_err);
 655                 (*flagsp) &= ~EFX_ADDR_MISMATCH;
 656                 (*flagsp) |= EFX_DISCARD;
 657         }
 658
 659         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_PAUSE_FRM_ERR) != 0) {
 660                 EFX_EV_QSTAT_INCR(eep, EV_RX_PAUSE_FRM_ERR);
 661                 EFSYS_PROBE(pause_frm_err);
 662                 (*flagsp) &= ~EFX_ADDR_MISMATCH;
 663                 (*flagsp) |= EFX_DISCARD;
 664         }
 665
 666         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_BUF_OWNER_ID_ERR) != 0) {
 667                 EFX_EV_QSTAT_INCR(eep, EV_RX_BUF_OWNER_ID_ERR);
 668                 EFSYS_PROBE(owner_id_err);
 669                 (*flagsp) |= EFX_DISCARD;
 670         }
 671
 672         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_IP_HDR_CHKSUM_ERR) != 0) {
 673                 EFX_EV_QSTAT_INCR(eep, EV_RX_IPV4_HDR_CHKSUM_ERR);
 674                 EFSYS_PROBE(ipv4_err);
 675                 (*flagsp) &= ~EFX_CKSUM_IPV4;
 676         }
 677
 678         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_TCP_UDP_CHKSUM_ERR) != 0) {
 679                 EFX_EV_QSTAT_INCR(eep, EV_RX_TCP_UDP_CHKSUM_ERR);
 680                 EFSYS_PROBE(udp_chk_err);
 681                 (*flagsp) &= ~EFX_CKSUM_TCPUDP;
 682         }
 683
 684         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_IP_FRAG_ERR) != 0) {
 685                 EFX_EV_QSTAT_INCR(eep, EV_RX_IP_FRAG_ERR);
 686
 687                 /*
 688                  * If IP is fragmented FSF_AZ_RX_EV_IP_FRAG_ERR is set. This
 689                  * causes FSF_AZ_RX_EV_PKT_OK to be clear. This is not an error
 690                  * condition.
 691                  */
 692                 (*flagsp) &= ~(EFX_PKT_TCP | EFX_PKT_UDP | EFX_CKSUM_TCPUDP);
 693         }
 694
 695         return (ignore);
 696 }
 697
 698 static  __checkReturn   boolean_t
 699 siena_ev_rx(
 700         __in            efx_evq_t *eep,
 701         __in            efx_qword_t *eqp,
 702         __in            const efx_ev_callbacks_t *eecp,
 703         __in_opt        void *arg)
 704 {
 705         uint32_t id;
 706         uint32_t size;
 707         uint32_t label;
 708         boolean_t ok;
 709 #if EFSYS_OPT_RX_SCATTER
 710         boolean_t sop;
 711         boolean_t jumbo_cont;
 712 #endif  /* EFSYS_OPT_RX_SCATTER */
 713         uint32_t hdr_type;
 714         boolean_t is_v6;
 715         uint16_t flags;
 716         boolean_t ignore;
 717         boolean_t should_abort;
 718
 719         EFX_EV_QSTAT_INCR(eep, EV_RX);
 720
 721         /* Basic packet information */
 722         id = EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_DESC_PTR);
 723         size = EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_BYTE_CNT);
 724         label = EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_Q_LABEL);
 725         ok = (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_PKT_OK) != 0);
 726
 727 #if EFSYS_OPT_RX_SCATTER
 728         sop = (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_SOP) != 0);
 729         jumbo_cont = (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_JUMBO_CONT) != 0);
 730 #endif  /* EFSYS_OPT_RX_SCATTER */
 731
 732         hdr_type = EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_HDR_TYPE);
 733
 734         is_v6 = (EFX_QWORD_FIELD(*eqp, FSF_CZ_RX_EV_IPV6_PKT) != 0);
 735
 736         /*
 737          * If packet is marked as OK and packet type is TCP/IP or
 738          * UDP/IP or other IP, then we can rely on the hardware checksums.
 739          */
 740         switch (hdr_type) {
 741         case FSE_AZ_RX_EV_HDR_TYPE_IPV4V6_TCP:
 742                 flags = EFX_PKT_TCP | EFX_CKSUM_TCPUDP;
 743                 if (is_v6) {
 744                         EFX_EV_QSTAT_INCR(eep, EV_RX_TCP_IPV6);
 745                         flags |= EFX_PKT_IPV6;
 746                 } else {
 747                         EFX_EV_QSTAT_INCR(eep, EV_RX_TCP_IPV4);
 748                         flags |= EFX_PKT_IPV4 | EFX_CKSUM_IPV4;
 749                 }
 750                 break;
 751
 752         case FSE_AZ_RX_EV_HDR_TYPE_IPV4V6_UDP:
 753                 flags = EFX_PKT_UDP | EFX_CKSUM_TCPUDP;
 754                 if (is_v6) {
 755                         EFX_EV_QSTAT_INCR(eep, EV_RX_UDP_IPV6);
 756                         flags |= EFX_PKT_IPV6;
 757                 } else {
 758                         EFX_EV_QSTAT_INCR(eep, EV_RX_UDP_IPV4);
 759                         flags |= EFX_PKT_IPV4 | EFX_CKSUM_IPV4;
 760                 }
 761                 break;
 762
 763         case FSE_AZ_RX_EV_HDR_TYPE_IPV4V6_OTHER:
 764                 if (is_v6) {
 765                         EFX_EV_QSTAT_INCR(eep, EV_RX_OTHER_IPV6);
 766                         flags = EFX_PKT_IPV6;
 767                 } else {
 768                         EFX_EV_QSTAT_INCR(eep, EV_RX_OTHER_IPV4);
 769                         flags = EFX_PKT_IPV4 | EFX_CKSUM_IPV4;
 770                 }
 771                 break;
 772
 773         case FSE_AZ_RX_EV_HDR_TYPE_OTHER:
 774                 EFX_EV_QSTAT_INCR(eep, EV_RX_NON_IP);
 775                 flags = 0;
 776                 break;
 777
 778         default:
 779                 EFSYS_ASSERT(B_FALSE);
 780                 flags = 0;
 781                 break;
 782         }
 783
 784 #if EFSYS_OPT_RX_SCATTER
 785         /* Report scatter and header/lookahead split buffer flags */
 786         if (sop)
 787                 flags |= EFX_PKT_START;
 788         if (jumbo_cont)
 789                 flags |= EFX_PKT_CONT;
 790 #endif  /* EFSYS_OPT_RX_SCATTER */
 791
 792         /* Detect errors included in the FSF_AZ_RX_EV_PKT_OK indication */
 793         if (!ok) {
 794                 ignore = siena_ev_rx_not_ok(eep, eqp, label, id, &flags);
 795                 if (ignore) {
 796                         EFSYS_PROBE4(rx_complete, uint32_t, label, uint32_t, id,
 797                             uint32_t, size, uint16_t, flags);
 798
 799                         return (B_FALSE);
 800                 }
 801         }
 802
 803         /* If we're not discarding the packet then it is ok */
 804         if (~flags & EFX_DISCARD)
 805                 EFX_EV_QSTAT_INCR(eep, EV_RX_OK);
 806
 807         /* Detect multicast packets that didn't match the filter */
 808         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_MCAST_PKT) != 0) {
 809                 EFX_EV_QSTAT_INCR(eep, EV_RX_MCAST_PKT);
 810
 811                 if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_MCAST_HASH_MATCH) != 0) {
 812                         EFX_EV_QSTAT_INCR(eep, EV_RX_MCAST_HASH_MATCH);
 813                 } else {
 814                         EFSYS_PROBE(mcast_mismatch);
 815                         flags |= EFX_ADDR_MISMATCH;
 816                 }
 817         } else {
 818                 flags |= EFX_PKT_UNICAST;
 819         }
 820
 821         /*
 822          * The packet parser in Siena can abort parsing packets under
 823          * certain error conditions, setting the PKT_NOT_PARSED bit
 824          * (which clears PKT_OK). If this is set, then don't trust
 825          * the PKT_TYPE field.
 826          */
 827         if (!ok) {
 828                 uint32_t parse_err;
 829
 830                 parse_err = EFX_QWORD_FIELD(*eqp, FSF_CZ_RX_EV_PKT_NOT_PARSED);
 831                 if (parse_err != 0)
 832                         flags |= EFX_CHECK_VLAN;
 833         }
 834
 835         if (~flags & EFX_CHECK_VLAN) {
 836                 uint32_t pkt_type;
 837
 838                 pkt_type = EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_PKT_TYPE);
 839                 if (pkt_type >= FSE_AZ_RX_EV_PKT_TYPE_VLAN)
 840                         flags |= EFX_PKT_VLAN_TAGGED;
 841         }
 842
 843         EFSYS_PROBE4(rx_complete, uint32_t, label, uint32_t, id,
 844             uint32_t, size, uint16_t, flags);
 845
 846         EFSYS_ASSERT(eecp->eec_rx != NULL);
 847         should_abort = eecp->eec_rx(arg, label, id, size, flags);
 848
 849         return (should_abort);
 850 }
 851
 852 static  __checkReturn   boolean_t
 853 siena_ev_tx(
 854         __in            efx_evq_t *eep,
 855         __in            efx_qword_t *eqp,
 856         __in            const efx_ev_callbacks_t *eecp,
 857         __in_opt        void *arg)
 858 {
 859         uint32_t id;
 860         uint32_t label;
 861         boolean_t should_abort;
 862
 863         EFX_EV_QSTAT_INCR(eep, EV_TX);
 864
 865         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_COMP) != 0 &&
 866             EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_PKT_ERR) == 0 &&
 867             EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_PKT_TOO_BIG) == 0 &&
 868             EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_WQ_FF_FULL) == 0) {
 869
 870                 id = EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_DESC_PTR);
 871                 label = EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_Q_LABEL);
 872
 873                 EFSYS_PROBE2(tx_complete, uint32_t, label, uint32_t, id);
 874
 875                 EFSYS_ASSERT(eecp->eec_tx != NULL);
 876                 should_abort = eecp->eec_tx(arg, label, id);
 877
 878                 return (should_abort);
 879         }
 880
 881         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_COMP) != 0)
 882                 EFSYS_PROBE3(bad_event, unsigned int, eep->ee_index,
 883                             uint32_t, EFX_QWORD_FIELD(*eqp, EFX_DWORD_1),
 884                             uint32_t, EFX_QWORD_FIELD(*eqp, EFX_DWORD_0));
 885
 886         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_PKT_ERR) != 0)
 887                 EFX_EV_QSTAT_INCR(eep, EV_TX_PKT_ERR);
 888
 889         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_PKT_TOO_BIG) != 0)
 890                 EFX_EV_QSTAT_INCR(eep, EV_TX_PKT_TOO_BIG);
 891
 892         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_WQ_FF_FULL) != 0)
 893                 EFX_EV_QSTAT_INCR(eep, EV_TX_WQ_FF_FULL);
 894
 895         EFX_EV_QSTAT_INCR(eep, EV_TX_UNEXPECTED);
 896         return (B_FALSE);
 897 }
 898
 899 static  __checkReturn   boolean_t
 900 siena_ev_global(
 901         __in            efx_evq_t *eep,
 902         __in            efx_qword_t *eqp,
 903         __in            const efx_ev_callbacks_t *eecp,
 904         __in_opt        void *arg)
 905 {
 906         _NOTE(ARGUNUSED(eqp, eecp, arg))
 907
 908         EFX_EV_QSTAT_INCR(eep, EV_GLOBAL);
 909
 910         return (B_FALSE);
 911 }
 912
 913 static  __checkReturn   boolean_t
 914 siena_ev_driver(
 915         __in            efx_evq_t *eep,
 916         __in            efx_qword_t *eqp,
 917         __in            const efx_ev_callbacks_t *eecp,
 918         __in_opt        void *arg)
 919 {
 920         boolean_t should_abort;
 921
 922         EFX_EV_QSTAT_INCR(eep, EV_DRIVER);
 923         should_abort = B_FALSE;
 924
 925         switch (EFX_QWORD_FIELD(*eqp, FSF_AZ_DRIVER_EV_SUBCODE)) {
 926         case FSE_AZ_TX_DESCQ_FLS_DONE_EV: {
 927                 uint32_t txq_index;
 928
 929                 EFX_EV_QSTAT_INCR(eep, EV_DRIVER_TX_DESCQ_FLS_DONE);
 930
 931                 txq_index = EFX_QWORD_FIELD(*eqp, FSF_AZ_DRIVER_EV_SUBDATA);
 932
 933                 EFSYS_PROBE1(tx_descq_fls_done, uint32_t, txq_index);
 934
 935                 EFSYS_ASSERT(eecp->eec_txq_flush_done != NULL);
 936                 should_abort = eecp->eec_txq_flush_done(arg, txq_index);
 937
 938                 break;
 939         }
 940         case FSE_AZ_RX_DESCQ_FLS_DONE_EV: {
 941                 uint32_t rxq_index;
 942                 uint32_t failed;
 943
 944                 rxq_index = EFX_QWORD_FIELD(*eqp, FSF_AZ_DRIVER_EV_RX_DESCQ_ID);
 945                 failed = EFX_QWORD_FIELD(*eqp, FSF_AZ_DRIVER_EV_RX_FLUSH_FAIL);
 946
 947                 EFSYS_ASSERT(eecp->eec_rxq_flush_done != NULL);
 948                 EFSYS_ASSERT(eecp->eec_rxq_flush_failed != NULL);
 949
 950                 if (failed) {
 951                         EFX_EV_QSTAT_INCR(eep, EV_DRIVER_RX_DESCQ_FLS_FAILED);
 952
 953                         EFSYS_PROBE1(rx_descq_fls_failed, uint32_t, rxq_index);
 954
 955                         should_abort = eecp->eec_rxq_flush_failed(arg,
 956                                                                     rxq_index);
 957                 } else {
 958                         EFX_EV_QSTAT_INCR(eep, EV_DRIVER_RX_DESCQ_FLS_DONE);
 959
 960                         EFSYS_PROBE1(rx_descq_fls_done, uint32_t, rxq_index);
 961
 962                         should_abort = eecp->eec_rxq_flush_done(arg, rxq_index);
 963                 }
 964
 965                 break;
 966         }
 967         case FSE_AZ_EVQ_INIT_DONE_EV:
 968                 EFSYS_ASSERT(eecp->eec_initialized != NULL);
 969                 should_abort = eecp->eec_initialized(arg);
 970
 971                 break;
 972
 973         case FSE_AZ_EVQ_NOT_EN_EV:
 974                 EFSYS_PROBE(evq_not_en);
 975                 break;
 976
 977         case FSE_AZ_SRM_UPD_DONE_EV: {
 978                 uint32_t code;
 979
 980                 EFX_EV_QSTAT_INCR(eep, EV_DRIVER_SRM_UPD_DONE);
 981
 982                 code = EFX_QWORD_FIELD(*eqp, FSF_AZ_DRIVER_EV_SUBDATA);
 983
 984                 EFSYS_ASSERT(eecp->eec_sram != NULL);
 985                 should_abort = eecp->eec_sram(arg, code);
 986
 987                 break;
 988         }
 989         case FSE_AZ_WAKE_UP_EV: {
 990                 uint32_t id;
 991
 992                 id = EFX_QWORD_FIELD(*eqp, FSF_AZ_DRIVER_EV_SUBDATA);
 993
 994                 EFSYS_ASSERT(eecp->eec_wake_up != NULL);
 995                 should_abort = eecp->eec_wake_up(arg, id);
 996
 997                 break;
 998         }
 999         case FSE_AZ_TX_PKT_NON_TCP_UDP:
1000                 EFSYS_PROBE(tx_pkt_non_tcp_udp);
1001                 break;
1002
1003         case FSE_AZ_TIMER_EV: {
1004                 uint32_t id;
1005
1006                 id = EFX_QWORD_FIELD(*eqp, FSF_AZ_DRIVER_EV_SUBDATA);
1007
1008                 EFSYS_ASSERT(eecp->eec_timer != NULL);
1009                 should_abort = eecp->eec_timer(arg, id);
1010
1011                 break;
1012         }
1013         case FSE_AZ_RX_DSC_ERROR_EV:
1014                 EFX_EV_QSTAT_INCR(eep, EV_DRIVER_RX_DSC_ERROR);
1015
1016                 EFSYS_PROBE(rx_dsc_error);
1017
1018                 EFSYS_ASSERT(eecp->eec_exception != NULL);
1019                 should_abort = eecp->eec_exception(arg,
1020                         EFX_EXCEPTION_RX_DSC_ERROR, 0);
1021
1022                 break;
1023
1024         case FSE_AZ_TX_DSC_ERROR_EV:
1025                 EFX_EV_QSTAT_INCR(eep, EV_DRIVER_TX_DSC_ERROR);
1026
1027                 EFSYS_PROBE(tx_dsc_error);
1028
1029                 EFSYS_ASSERT(eecp->eec_exception != NULL);
1030                 should_abort = eecp->eec_exception(arg,
1031                         EFX_EXCEPTION_TX_DSC_ERROR, 0);
1032
1033                 break;
1034
1035         default:
1036                 break;
1037         }
1038
1039         return (should_abort);
1040 }
1041
1042 static  __checkReturn   boolean_t
1043 siena_ev_drv_gen(
1044         __in            efx_evq_t *eep,
1045         __in            efx_qword_t *eqp,
1046         __in            const efx_ev_callbacks_t *eecp,
1047         __in_opt        void *arg)
1048 {
1049         uint32_t data;
1050         boolean_t should_abort;
1051
1052         EFX_EV_QSTAT_INCR(eep, EV_DRV_GEN);
1053
1054         data = EFX_QWORD_FIELD(*eqp, FSF_AZ_EV_DATA_DW0);
1055         if (data >= ((uint32_t)1 << 16)) {
1056                 EFSYS_PROBE3(bad_event, unsigned int, eep->ee_index,
1057                             uint32_t, EFX_QWORD_FIELD(*eqp, EFX_DWORD_1),
1058                             uint32_t, EFX_QWORD_FIELD(*eqp, EFX_DWORD_0));
1059                 return (B_TRUE);
1060         }
1061
1062         EFSYS_ASSERT(eecp->eec_software != NULL);
1063         should_abort = eecp->eec_software(arg, (uint16_t)data);
1064
1065         return (should_abort);
1066 }
1067
1068 #if EFSYS_OPT_MCDI
1069
1070 static  __checkReturn   boolean_t
1071 siena_ev_mcdi(
1072         __in            efx_evq_t *eep,
1073         __in            efx_qword_t *eqp,
1074         __in            const efx_ev_callbacks_t *eecp,
1075         __in_opt        void *arg)
1076 {
1077         efx_nic_t *enp = eep->ee_enp;
1078         unsigned int code;
1079         boolean_t should_abort = B_FALSE;
1080
1081         EFSYS_ASSERT3U(enp->en_family, ==, EFX_FAMILY_SIENA);
1082
1083         if (enp->en_family != EFX_FAMILY_SIENA)
1084                 goto out;
1085
1086         EFSYS_ASSERT(eecp->eec_link_change != NULL);
1087         EFSYS_ASSERT(eecp->eec_exception != NULL);
1088 #if EFSYS_OPT_MON_STATS
1089         EFSYS_ASSERT(eecp->eec_monitor != NULL);
1090 #endif
1091
1092         EFX_EV_QSTAT_INCR(eep, EV_MCDI_RESPONSE);
1093
1094         code = EFX_QWORD_FIELD(*eqp, MCDI_EVENT_CODE);
1095         switch (code) {
1096         case MCDI_EVENT_CODE_BADSSERT:
1097                 efx_mcdi_ev_death(enp, EINTR);
1098                 break;
1099
1100         case MCDI_EVENT_CODE_CMDDONE:
1101                 efx_mcdi_ev_cpl(enp,
1102                     MCDI_EV_FIELD(eqp, CMDDONE_SEQ),
1103                     MCDI_EV_FIELD(eqp, CMDDONE_DATALEN),
1104                     MCDI_EV_FIELD(eqp, CMDDONE_ERRNO));
1105                 break;
1106
1107         case MCDI_EVENT_CODE_LINKCHANGE: {
1108                 efx_link_mode_t link_mode;
1109
1110                 siena_phy_link_ev(enp, eqp, &link_mode);
1111                 should_abort = eecp->eec_link_change(arg, link_mode);
1112                 break;
1113         }
1114         case MCDI_EVENT_CODE_SENSOREVT: {
1115 #if EFSYS_OPT_MON_STATS
1116                 efx_mon_stat_t id;
1117                 efx_mon_stat_value_t value;
1118                 efx_rc_t rc;
1119
1120                 if ((rc = mcdi_mon_ev(enp, eqp, &id, &value)) == 0)
1121                         should_abort = eecp->eec_monitor(arg, id, value);
1122                 else if (rc == ENOTSUP) {
1123                         should_abort = eecp->eec_exception(arg,
1124                                 EFX_EXCEPTION_UNKNOWN_SENSOREVT,
1125                                 MCDI_EV_FIELD(eqp, DATA));
1126                 } else
1127                         EFSYS_ASSERT(rc == ENODEV);     /* Wrong port */
1128 #else
1129                 should_abort = B_FALSE;
1130 #endif
1131                 break;
1132         }
1133         case MCDI_EVENT_CODE_SCHEDERR:
1134                 /* Informational only */
1135                 break;
1136
1137         case MCDI_EVENT_CODE_REBOOT:
1138                 efx_mcdi_ev_death(enp, EIO);
1139                 break;
1140
1141         case MCDI_EVENT_CODE_MAC_STATS_DMA:
1142 #if EFSYS_OPT_MAC_STATS
1143                 if (eecp->eec_mac_stats != NULL) {
1144                         eecp->eec_mac_stats(arg,
1145                             MCDI_EV_FIELD(eqp, MAC_STATS_DMA_GENERATION));
1146                 }
1147 #endif
1148                 break;
1149
1150         case MCDI_EVENT_CODE_FWALERT: {
1151                 uint32_t reason = MCDI_EV_FIELD(eqp, FWALERT_REASON);
1152
1153                 if (reason == MCDI_EVENT_FWALERT_REASON_SRAM_ACCESS)
1154                         should_abort = eecp->eec_exception(arg,
1155                                 EFX_EXCEPTION_FWALERT_SRAM,
1156                                 MCDI_EV_FIELD(eqp, FWALERT_DATA));
1157                 else
1158                         should_abort = eecp->eec_exception(arg,
1159                                 EFX_EXCEPTION_UNKNOWN_FWALERT,
1160                                 MCDI_EV_FIELD(eqp, DATA));
1161                 break;
1162         }
1163
1164         default:
1165                 EFSYS_PROBE1(mc_pcol_error, int, code);
1166                 break;
1167         }
1168
1169 out:
1170         return (should_abort);
1171 }
1172
1173 #endif  /* EFSYS_OPT_MCDI */
1174
1175 static  __checkReturn   efx_rc_t
1176 siena_ev_qprime(
1177         __in            efx_evq_t *eep,
1178         __in            unsigned int count)
1179 {
1180         efx_nic_t *enp = eep->ee_enp;
1181         uint32_t rptr;
1182         efx_dword_t dword;
1183
1184         rptr = count & eep->ee_mask;
1185
1186         EFX_POPULATE_DWORD_1(dword, FRF_AZ_EVQ_RPTR, rptr);
1187
1188         EFX_BAR_TBL_WRITED(enp, FR_AZ_EVQ_RPTR_REG, eep->ee_index,
1189                             &dword, B_FALSE);
1190
1191         return (0);
1192 }
1193
1194 static          void
1195 siena_ev_qpost(
1196         __in    efx_evq_t *eep,
1197         __in    uint16_t data)
1198 {
1199         efx_nic_t *enp = eep->ee_enp;
1200         efx_qword_t ev;
1201         efx_oword_t oword;
1202
1203         EFX_POPULATE_QWORD_2(ev, FSF_AZ_EV_CODE, FSE_AZ_EV_CODE_DRV_GEN_EV,
1204             FSF_AZ_EV_DATA_DW0, (uint32_t)data);
1205
1206         EFX_POPULATE_OWORD_3(oword, FRF_AZ_DRV_EV_QID, eep->ee_index,
1207             EFX_DWORD_0, EFX_QWORD_FIELD(ev, EFX_DWORD_0),
1208             EFX_DWORD_1, EFX_QWORD_FIELD(ev, EFX_DWORD_1));
1209
1210         EFX_BAR_WRITEO(enp, FR_AZ_DRV_EV_REG, &oword);
1211 }
1212
1213 static  __checkReturn   efx_rc_t
1214 siena_ev_qmoderate(
1215         __in            efx_evq_t *eep,
1216         __in            unsigned int us)
1217 {
1218         efx_nic_t *enp = eep->ee_enp;
1219         efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
1220         unsigned int locked;
1221         efx_dword_t dword;
1222         efx_rc_t rc;
1223
1224         if (us > encp->enc_evq_timer_max_us) {
1225                 rc = EINVAL;
1226                 goto fail1;
1227         }
1228
1229         /* If the value is zero then disable the timer */
1230         if (us == 0) {
1231                 EFX_POPULATE_DWORD_2(dword,
1232                     FRF_CZ_TC_TIMER_MODE, FFE_CZ_TIMER_MODE_DIS,
1233                     FRF_CZ_TC_TIMER_VAL, 0);
1234         } else {
1235                 unsigned int ticks;
1236
1237                 if ((rc = efx_ev_usecs_to_ticks(enp, us, &ticks)) != 0)
1238                         goto fail2;
1239
1240                 EFSYS_ASSERT(ticks > 0);
1241                 EFX_POPULATE_DWORD_2(dword,
1242                     FRF_CZ_TC_TIMER_MODE, FFE_CZ_TIMER_MODE_INT_HLDOFF,
1243                     FRF_CZ_TC_TIMER_VAL, ticks - 1);
1244         }
1245
1246         locked = (eep->ee_index == 0) ? 1 : 0;
1247
1248         EFX_BAR_TBL_WRITED(enp, FR_BZ_TIMER_COMMAND_REGP0,
1249             eep->ee_index, &dword, locked);
1250
1251         return (0);
1252
1253 fail2:
1254         EFSYS_PROBE(fail2);
1255 fail1:
1256         EFSYS_PROBE1(fail1, efx_rc_t, rc);
1257
1258         return (rc);
1259 }
1260
1261 static  __checkReturn   efx_rc_t
1262 siena_ev_qcreate(
1263         __in            efx_nic_t *enp,
1264         __in            unsigned int index,
1265         __in            efsys_mem_t *esmp,
1266         __in            size_t ndescs,
1267         __in            uint32_t id,
1268         __in            uint32_t us,
1269         __in            uint32_t flags,
1270         __in            efx_evq_t *eep)
1271 {
1272         efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
1273         uint32_t size;
1274         efx_oword_t oword;
1275         efx_rc_t rc;
1276         boolean_t notify_mode;
1277
1278         _NOTE(ARGUNUSED(esmp))
1279
1280         EFX_STATIC_ASSERT(ISP2(EFX_EVQ_MAXNEVS));
1281         EFX_STATIC_ASSERT(ISP2(EFX_EVQ_MINNEVS));
1282
1283         if (!ISP2(ndescs) ||
1284             (ndescs < EFX_EVQ_MINNEVS) || (ndescs > EFX_EVQ_MAXNEVS)) {
1285                 rc = EINVAL;
1286                 goto fail1;
1287         }
1288         if (index >= encp->enc_evq_limit) {
1289                 rc = EINVAL;
1290                 goto fail2;
1291         }
1292 #if EFSYS_OPT_RX_SCALE
1293         if (enp->en_intr.ei_type == EFX_INTR_LINE &&
1294             index >= EFX_MAXRSS_LEGACY) {
1295                 rc = EINVAL;
1296                 goto fail3;
1297         }
1298 #endif
1299         for (size = 0; (1 << size) <= (EFX_EVQ_MAXNEVS / EFX_EVQ_MINNEVS);
1300             size++)
1301                 if ((1 << size) == (int)(ndescs / EFX_EVQ_MINNEVS))
1302                         break;
1303         if (id + (1 << size) >= encp->enc_buftbl_limit) {
1304                 rc = EINVAL;
1305                 goto fail4;
1306         }
1307
1308         /* Set up the handler table */
1309         eep->ee_rx      = siena_ev_rx;
1310         eep->ee_tx      = siena_ev_tx;
1311         eep->ee_driver  = siena_ev_driver;
1312         eep->ee_global  = siena_ev_global;
1313         eep->ee_drv_gen = siena_ev_drv_gen;
1314 #if EFSYS_OPT_MCDI
1315         eep->ee_mcdi    = siena_ev_mcdi;
1316 #endif  /* EFSYS_OPT_MCDI */
1317
1318         notify_mode = ((flags & EFX_EVQ_FLAGS_NOTIFY_MASK) !=
1319             EFX_EVQ_FLAGS_NOTIFY_INTERRUPT);
1320
1321         /* Set up the new event queue */
1322         EFX_POPULATE_OWORD_3(oword, FRF_CZ_TIMER_Q_EN, 1,
1323             FRF_CZ_HOST_NOTIFY_MODE, notify_mode,
1324             FRF_CZ_TIMER_MODE, FFE_CZ_TIMER_MODE_DIS);
1325         EFX_BAR_TBL_WRITEO(enp, FR_AZ_TIMER_TBL, index, &oword, B_TRUE);
1326
1327         EFX_POPULATE_OWORD_3(oword, FRF_AZ_EVQ_EN, 1, FRF_AZ_EVQ_SIZE, size,
1328             FRF_AZ_EVQ_BUF_BASE_ID, id);
1329
1330         EFX_BAR_TBL_WRITEO(enp, FR_AZ_EVQ_PTR_TBL, index, &oword, B_TRUE);
1331
1332         /* Set initial interrupt moderation */
1333         siena_ev_qmoderate(eep, us);
1334
1335         return (0);
1336
1337 fail4:
1338         EFSYS_PROBE(fail4);
1339 #if EFSYS_OPT_RX_SCALE
1340 fail3:
1341         EFSYS_PROBE(fail3);
1342 #endif
1343 fail2:
1344         EFSYS_PROBE(fail2);
1345 fail1:
1346         EFSYS_PROBE1(fail1, efx_rc_t, rc);
1347
1348         return (rc);
1349 }
1350
1351 #endif /* EFSYS_OPT_SIENA */
1352
1353 #if EFSYS_OPT_QSTATS
1354 #if EFSYS_OPT_NAMES
1355 /* START MKCONFIG GENERATED EfxEventQueueStatNamesBlock c0f3bc5083b40532 */
1356 static const char * const __efx_ev_qstat_name[] = {
1357         "all",
1358         "rx",
1359         "rx_ok",
1360         "rx_frm_trunc",
1361         "rx_tobe_disc",
1362         "rx_pause_frm_err",
1363         "rx_buf_owner_id_err",
1364         "rx_ipv4_hdr_chksum_err",
1365         "rx_tcp_udp_chksum_err",
1366         "rx_eth_crc_err",
1367         "rx_ip_frag_err",
1368         "rx_mcast_pkt",
1369         "rx_mcast_hash_match",
1370         "rx_tcp_ipv4",
1371         "rx_tcp_ipv6",
1372         "rx_udp_ipv4",
1373         "rx_udp_ipv6",
1374         "rx_other_ipv4",
1375         "rx_other_ipv6",
1376         "rx_non_ip",
1377         "rx_batch",
1378         "tx",
1379         "tx_wq_ff_full",
1380         "tx_pkt_err",
1381         "tx_pkt_too_big",
1382         "tx_unexpected",
1383         "global",
1384         "global_mnt",
1385         "driver",
1386         "driver_srm_upd_done",
1387         "driver_tx_descq_fls_done",
1388         "driver_rx_descq_fls_done",
1389         "driver_rx_descq_fls_failed",
1390         "driver_rx_dsc_error",
1391         "driver_tx_dsc_error",
1392         "drv_gen",
1393         "mcdi_response",
1394 };
1395 /* END MKCONFIG GENERATED EfxEventQueueStatNamesBlock */
1396
1397                 const char *
1398 efx_ev_qstat_name(
1399         __in    efx_nic_t *enp,
1400         __in    unsigned int id)
1401 {
1402         _NOTE(ARGUNUSED(enp))
1403
1404         EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
1405         EFSYS_ASSERT3U(id, <, EV_NQSTATS);
1406
1407         return (__efx_ev_qstat_name[id]);
1408 }
1409 #endif  /* EFSYS_OPT_NAMES */
1410 #endif  /* EFSYS_OPT_QSTATS */
1411
1412 #if EFSYS_OPT_SIENA
1413
1414 #if EFSYS_OPT_QSTATS
1415 static                                  void
1416 siena_ev_qstats_update(
1417         __in                            efx_evq_t *eep,
1418         __inout_ecount(EV_NQSTATS)      efsys_stat_t *stat)
1419 {
1420         unsigned int id;
1421
1422         for (id = 0; id < EV_NQSTATS; id++) {
1423                 efsys_stat_t *essp = &stat[id];
1424
1425                 EFSYS_STAT_INCR(essp, eep->ee_stat[id]);
1426                 eep->ee_stat[id] = 0;
1427         }
1428 }
1429 #endif  /* EFSYS_OPT_QSTATS */
1430
1431 static          void
1432 siena_ev_qdestroy(
1433         __in    efx_evq_t *eep)
1434 {
1435         efx_nic_t *enp = eep->ee_enp;
1436         efx_oword_t oword;
1437
1438         /* Purge event queue */
1439         EFX_ZERO_OWORD(oword);
1440
1441         EFX_BAR_TBL_WRITEO(enp, FR_AZ_EVQ_PTR_TBL,
1442             eep->ee_index, &oword, B_TRUE);
1443
1444         EFX_ZERO_OWORD(oword);
1445         EFX_BAR_TBL_WRITEO(enp, FR_AZ_TIMER_TBL, eep->ee_index, &oword, B_TRUE);
1446 }
1447
1448 static          void
1449 siena_ev_fini(
1450         __in    efx_nic_t *enp)
1451 {
1452         _NOTE(ARGUNUSED(enp))
1453 }
1454
1455 #endif /* EFSYS_OPT_SIENA */