drivers/net/sfc/base/efx_ev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  *
   3  * Copyright (c) 2007-2018 Solarflare Communications Inc.
   4  * All rights reserved.
   5  */
   6
   7 #include "efx.h"
   8 #include "efx_impl.h"
   9 #if EFSYS_OPT_MON_MCDI
  10 #include "mcdi_mon.h"
  11 #endif
  12
  13 #if EFSYS_OPT_QSTATS
  14 #define EFX_EV_QSTAT_INCR(_eep, _stat)                                  \
  15         do {                                                            \
  16                 (_eep)->ee_stat[_stat]++;                               \
  17         _NOTE(CONSTANTCONDITION)                                        \
  18         } while (B_FALSE)
  19 #else
  20 #define EFX_EV_QSTAT_INCR(_eep, _stat)
  21 #endif
  22
  23 #define EFX_EV_PRESENT(_qword)                                          \
  24         (EFX_QWORD_FIELD((_qword), EFX_DWORD_0) != 0xffffffff &&        \
  25         EFX_QWORD_FIELD((_qword), EFX_DWORD_1) != 0xffffffff)
  26
  27
  28
  29 #if EFSYS_OPT_SIENA
  30
  31 static  __checkReturn   efx_rc_t
  32 siena_ev_init(
  33         __in            efx_nic_t *enp);
  34
  35 static                  void
  36 siena_ev_fini(
  37         __in            efx_nic_t *enp);
  38
  39 static  __checkReturn   efx_rc_t
  40 siena_ev_qcreate(
  41         __in            efx_nic_t *enp,
  42         __in            unsigned int index,
  43         __in            efsys_mem_t *esmp,
  44         __in            size_t ndescs,
  45         __in            uint32_t id,
  46         __in            uint32_t us,
  47         __in            uint32_t flags,
  48         __in            efx_evq_t *eep);
  49
  50 static                  void
  51 siena_ev_qdestroy(
  52         __in            efx_evq_t *eep);
  53
  54 static  __checkReturn   efx_rc_t
  55 siena_ev_qprime(
  56         __in            efx_evq_t *eep,
  57         __in            unsigned int count);
  58
  59 static                  void
  60 siena_ev_qpost(
  61         __in    efx_evq_t *eep,
  62         __in    uint16_t data);
  63
  64 static  __checkReturn   efx_rc_t
  65 siena_ev_qmoderate(
  66         __in            efx_evq_t *eep,
  67         __in            unsigned int us);
  68
  69 #if EFSYS_OPT_QSTATS
  70 static                  void
  71 siena_ev_qstats_update(
  72         __in                            efx_evq_t *eep,
  73         __inout_ecount(EV_NQSTATS)      efsys_stat_t *stat);
  74
  75 #endif
  76
  77 #endif /* EFSYS_OPT_SIENA */
  78
  79 #if EFSYS_OPT_SIENA
  80 static const efx_ev_ops_t       __efx_ev_siena_ops = {
  81         siena_ev_init,                          /* eevo_init */
  82         siena_ev_fini,                          /* eevo_fini */
  83         siena_ev_qcreate,                       /* eevo_qcreate */
  84         siena_ev_qdestroy,                      /* eevo_qdestroy */
  85         siena_ev_qprime,                        /* eevo_qprime */
  86         siena_ev_qpost,                         /* eevo_qpost */
  87         siena_ev_qmoderate,                     /* eevo_qmoderate */
  88 #if EFSYS_OPT_QSTATS
  89         siena_ev_qstats_update,                 /* eevo_qstats_update */
  90 #endif
  91 };
  92 #endif /* EFSYS_OPT_SIENA */
  93
  94 #if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD
  95 static const efx_ev_ops_t       __efx_ev_ef10_ops = {
  96         ef10_ev_init,                           /* eevo_init */
  97         ef10_ev_fini,                           /* eevo_fini */
  98         ef10_ev_qcreate,                        /* eevo_qcreate */
  99         ef10_ev_qdestroy,                       /* eevo_qdestroy */
 100         ef10_ev_qprime,                         /* eevo_qprime */
 101         ef10_ev_qpost,                          /* eevo_qpost */
 102         ef10_ev_qmoderate,                      /* eevo_qmoderate */
 103 #if EFSYS_OPT_QSTATS
 104         ef10_ev_qstats_update,                  /* eevo_qstats_update */
 105 #endif
 106 };
 107 #endif /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD */
 108
 109
 110         __checkReturn   efx_rc_t
 111 efx_ev_init(
 112         __in            efx_nic_t *enp)
 113 {
 114         const efx_ev_ops_t *eevop;
 115         efx_rc_t rc;
 116
 117         EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
 118         EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_INTR);
 119
 120         if (enp->en_mod_flags & EFX_MOD_EV) {
 121                 rc = EINVAL;
 122                 goto fail1;
 123         }
 124
 125         switch (enp->en_family) {
 126 #if EFSYS_OPT_SIENA
 127         case EFX_FAMILY_SIENA:
 128                 eevop = &__efx_ev_siena_ops;
 129                 break;
 130 #endif /* EFSYS_OPT_SIENA */
 131
 132 #if EFSYS_OPT_HUNTINGTON
 133         case EFX_FAMILY_HUNTINGTON:
 134                 eevop = &__efx_ev_ef10_ops;
 135                 break;
 136 #endif /* EFSYS_OPT_HUNTINGTON */
 137
 138 #if EFSYS_OPT_MEDFORD
 139         case EFX_FAMILY_MEDFORD:
 140                 eevop = &__efx_ev_ef10_ops;
 141                 break;
 142 #endif /* EFSYS_OPT_MEDFORD */
 143
 144         default:
 145                 EFSYS_ASSERT(0);
 146                 rc = ENOTSUP;
 147                 goto fail1;
 148         }
 149
 150         EFSYS_ASSERT3U(enp->en_ev_qcount, ==, 0);
 151
 152         if ((rc = eevop->eevo_init(enp)) != 0)
 153                 goto fail2;
 154
 155         enp->en_eevop = eevop;
 156         enp->en_mod_flags |= EFX_MOD_EV;
 157         return (0);
 158
 159 fail2:
 160         EFSYS_PROBE(fail2);
 161
 162 fail1:
 163         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 164
 165         enp->en_eevop = NULL;
 166         enp->en_mod_flags &= ~EFX_MOD_EV;
 167         return (rc);
 168 }
 169
 170                 void
 171 efx_ev_fini(
 172         __in    efx_nic_t *enp)
 173 {
 174         const efx_ev_ops_t *eevop = enp->en_eevop;
 175
 176         EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
 177         EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_INTR);
 178         EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_EV);
 179         EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_RX));
 180         EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_TX));
 181         EFSYS_ASSERT3U(enp->en_ev_qcount, ==, 0);
 182
 183         eevop->eevo_fini(enp);
 184
 185         enp->en_eevop = NULL;
 186         enp->en_mod_flags &= ~EFX_MOD_EV;
 187 }
 188
 189
 190         __checkReturn   efx_rc_t
 191 efx_ev_qcreate(
 192         __in            efx_nic_t *enp,
 193         __in            unsigned int index,
 194         __in            efsys_mem_t *esmp,
 195         __in            size_t ndescs,
 196         __in            uint32_t id,
 197         __in            uint32_t us,
 198         __in            uint32_t flags,
 199         __deref_out     efx_evq_t **eepp)
 200 {
 201         const efx_ev_ops_t *eevop = enp->en_eevop;
 202         efx_evq_t *eep;
 203         efx_rc_t rc;
 204
 205         EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
 206         EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_EV);
 207
 208         EFSYS_ASSERT3U(enp->en_ev_qcount + 1, <,
 209             enp->en_nic_cfg.enc_evq_limit);
 210
 211         switch (flags & EFX_EVQ_FLAGS_NOTIFY_MASK) {
 212         case EFX_EVQ_FLAGS_NOTIFY_INTERRUPT:
 213                 break;
 214         case EFX_EVQ_FLAGS_NOTIFY_DISABLED:
 215                 if (us != 0) {
 216                         rc = EINVAL;
 217                         goto fail1;
 218                 }
 219                 break;
 220         default:
 221                 rc = EINVAL;
 222                 goto fail2;
 223         }
 224
 225         /* Allocate an EVQ object */
 226         EFSYS_KMEM_ALLOC(enp->en_esip, sizeof (efx_evq_t), eep);
 227         if (eep == NULL) {
 228                 rc = ENOMEM;
 229                 goto fail3;
 230         }
 231
 232         eep->ee_magic = EFX_EVQ_MAGIC;
 233         eep->ee_enp = enp;
 234         eep->ee_index = index;
 235         eep->ee_mask = ndescs - 1;
 236         eep->ee_flags = flags;
 237         eep->ee_esmp = esmp;
 238
 239         /*
 240          * Set outputs before the queue is created because interrupts may be
 241          * raised for events immediately after the queue is created, before the
 242          * function call below returns. See bug58606.
 243          *
 244          * The eepp pointer passed in by the client must therefore point to data
 245          * shared with the client's event processing context.
 246          */
 247         enp->en_ev_qcount++;
 248         *eepp = eep;
 249
 250         if ((rc = eevop->eevo_qcreate(enp, index, esmp, ndescs, id, us, flags,
 251             eep)) != 0)
 252                 goto fail4;
 253
 254         return (0);
 255
 256 fail4:
 257         EFSYS_PROBE(fail4);
 258
 259         *eepp = NULL;
 260         enp->en_ev_qcount--;
 261         EFSYS_KMEM_FREE(enp->en_esip, sizeof (efx_evq_t), eep);
 262 fail3:
 263         EFSYS_PROBE(fail3);
 264 fail2:
 265         EFSYS_PROBE(fail2);
 266 fail1:
 267         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 268         return (rc);
 269 }
 270
 271                 void
 272 efx_ev_qdestroy(
 273         __in    efx_evq_t *eep)
 274 {
 275         efx_nic_t *enp = eep->ee_enp;
 276         const efx_ev_ops_t *eevop = enp->en_eevop;
 277
 278         EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
 279
 280         EFSYS_ASSERT(enp->en_ev_qcount != 0);
 281         --enp->en_ev_qcount;
 282
 283         eevop->eevo_qdestroy(eep);
 284
 285         /* Free the EVQ object */
 286         EFSYS_KMEM_FREE(enp->en_esip, sizeof (efx_evq_t), eep);
 287 }
 288
 289         __checkReturn   efx_rc_t
 290 efx_ev_qprime(
 291         __in            efx_evq_t *eep,
 292         __in            unsigned int count)
 293 {
 294         efx_nic_t *enp = eep->ee_enp;
 295         const efx_ev_ops_t *eevop = enp->en_eevop;
 296         efx_rc_t rc;
 297
 298         EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
 299
 300         if (!(enp->en_mod_flags & EFX_MOD_INTR)) {
 301                 rc = EINVAL;
 302                 goto fail1;
 303         }
 304
 305         if ((rc = eevop->eevo_qprime(eep, count)) != 0)
 306                 goto fail2;
 307
 308         return (0);
 309
 310 fail2:
 311         EFSYS_PROBE(fail2);
 312 fail1:
 313         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 314         return (rc);
 315 }
 316
 317         __checkReturn   boolean_t
 318 efx_ev_qpending(
 319         __in            efx_evq_t *eep,
 320         __in            unsigned int count)
 321 {
 322         size_t offset;
 323         efx_qword_t qword;
 324
 325         EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
 326
 327         offset = (count & eep->ee_mask) * sizeof (efx_qword_t);
 328         EFSYS_MEM_READQ(eep->ee_esmp, offset, &qword);
 329
 330         return (EFX_EV_PRESENT(qword));
 331 }
 332
 333 #if EFSYS_OPT_EV_PREFETCH
 334
 335                         void
 336 efx_ev_qprefetch(
 337         __in            efx_evq_t *eep,
 338         __in            unsigned int count)
 339 {
 340         unsigned int offset;
 341
 342         EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
 343
 344         offset = (count & eep->ee_mask) * sizeof (efx_qword_t);
 345         EFSYS_MEM_PREFETCH(eep->ee_esmp, offset);
 346 }
 347
 348 #endif  /* EFSYS_OPT_EV_PREFETCH */
 349
 350 #define EFX_EV_BATCH    8
 351
 352                         void
 353 efx_ev_qpoll(
 354         __in            efx_evq_t *eep,
 355         __inout         unsigned int *countp,
 356         __in            const efx_ev_callbacks_t *eecp,
 357         __in_opt        void *arg)
 358 {
 359         efx_qword_t ev[EFX_EV_BATCH];
 360         unsigned int batch;
 361         unsigned int total;
 362         unsigned int count;
 363         unsigned int index;
 364         size_t offset;
 365
 366         /* Ensure events codes match for EF10 (Huntington/Medford) and Siena */
 367         EFX_STATIC_ASSERT(ESF_DZ_EV_CODE_LBN == FSF_AZ_EV_CODE_LBN);
 368         EFX_STATIC_ASSERT(ESF_DZ_EV_CODE_WIDTH == FSF_AZ_EV_CODE_WIDTH);
 369
 370         EFX_STATIC_ASSERT(ESE_DZ_EV_CODE_RX_EV == FSE_AZ_EV_CODE_RX_EV);
 371         EFX_STATIC_ASSERT(ESE_DZ_EV_CODE_TX_EV == FSE_AZ_EV_CODE_TX_EV);
 372         EFX_STATIC_ASSERT(ESE_DZ_EV_CODE_DRIVER_EV == FSE_AZ_EV_CODE_DRIVER_EV);
 373         EFX_STATIC_ASSERT(ESE_DZ_EV_CODE_DRV_GEN_EV ==
 374             FSE_AZ_EV_CODE_DRV_GEN_EV);
 375 #if EFSYS_OPT_MCDI
 376         EFX_STATIC_ASSERT(ESE_DZ_EV_CODE_MCDI_EV ==
 377             FSE_AZ_EV_CODE_MCDI_EVRESPONSE);
 378 #endif
 379
 380         EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
 381         EFSYS_ASSERT(countp != NULL);
 382         EFSYS_ASSERT(eecp != NULL);
 383
 384         count = *countp;
 385         do {
 386                 /* Read up until the end of the batch period */
 387                 batch = EFX_EV_BATCH - (count & (EFX_EV_BATCH - 1));
 388                 offset = (count & eep->ee_mask) * sizeof (efx_qword_t);
 389                 for (total = 0; total < batch; ++total) {
 390                         EFSYS_MEM_READQ(eep->ee_esmp, offset, &(ev[total]));
 391
 392                         if (!EFX_EV_PRESENT(ev[total]))
 393                                 break;
 394
 395                         EFSYS_PROBE3(event, unsigned int, eep->ee_index,
 396                             uint32_t, EFX_QWORD_FIELD(ev[total], EFX_DWORD_1),
 397                             uint32_t, EFX_QWORD_FIELD(ev[total], EFX_DWORD_0));
 398
 399                         offset += sizeof (efx_qword_t);
 400                 }
 401
 402 #if EFSYS_OPT_EV_PREFETCH && (EFSYS_OPT_EV_PREFETCH_PERIOD > 1)
 403                 /*
 404                  * Prefetch the next batch when we get within PREFETCH_PERIOD
 405                  * of a completed batch. If the batch is smaller, then prefetch
 406                  * immediately.
 407                  */
 408                 if (total == batch && total < EFSYS_OPT_EV_PREFETCH_PERIOD)
 409                         EFSYS_MEM_PREFETCH(eep->ee_esmp, offset);
 410 #endif  /* EFSYS_OPT_EV_PREFETCH */
 411
 412                 /* Process the batch of events */
 413                 for (index = 0; index < total; ++index) {
 414                         boolean_t should_abort;
 415                         uint32_t code;
 416
 417 #if EFSYS_OPT_EV_PREFETCH
 418                         /* Prefetch if we've now reached the batch period */
 419                         if (total == batch &&
 420                             index + EFSYS_OPT_EV_PREFETCH_PERIOD == total) {
 421                                 offset = (count + batch) & eep->ee_mask;
 422                                 offset *= sizeof (efx_qword_t);
 423
 424                                 EFSYS_MEM_PREFETCH(eep->ee_esmp, offset);
 425                         }
 426 #endif  /* EFSYS_OPT_EV_PREFETCH */
 427
 428                         EFX_EV_QSTAT_INCR(eep, EV_ALL);
 429
 430                         code = EFX_QWORD_FIELD(ev[index], FSF_AZ_EV_CODE);
 431                         switch (code) {
 432                         case FSE_AZ_EV_CODE_RX_EV:
 433                                 should_abort = eep->ee_rx(eep,
 434                                     &(ev[index]), eecp, arg);
 435                                 break;
 436                         case FSE_AZ_EV_CODE_TX_EV:
 437                                 should_abort = eep->ee_tx(eep,
 438                                     &(ev[index]), eecp, arg);
 439                                 break;
 440                         case FSE_AZ_EV_CODE_DRIVER_EV:
 441                                 should_abort = eep->ee_driver(eep,
 442                                     &(ev[index]), eecp, arg);
 443                                 break;
 444                         case FSE_AZ_EV_CODE_DRV_GEN_EV:
 445                                 should_abort = eep->ee_drv_gen(eep,
 446                                     &(ev[index]), eecp, arg);
 447                                 break;
 448 #if EFSYS_OPT_MCDI
 449                         case FSE_AZ_EV_CODE_MCDI_EVRESPONSE:
 450                                 should_abort = eep->ee_mcdi(eep,
 451                                     &(ev[index]), eecp, arg);
 452                                 break;
 453 #endif
 454                         case FSE_AZ_EV_CODE_GLOBAL_EV:
 455                                 if (eep->ee_global) {
 456                                         should_abort = eep->ee_global(eep,
 457                                             &(ev[index]), eecp, arg);
 458                                         break;
 459                                 }
 460                                 /* else fallthrough */
 461                         default:
 462                                 EFSYS_PROBE3(bad_event,
 463                                     unsigned int, eep->ee_index,
 464                                     uint32_t,
 465                                     EFX_QWORD_FIELD(ev[index], EFX_DWORD_1),
 466                                     uint32_t,
 467                                     EFX_QWORD_FIELD(ev[index], EFX_DWORD_0));
 468
 469                                 EFSYS_ASSERT(eecp->eec_exception != NULL);
 470                                 (void) eecp->eec_exception(arg,
 471                                         EFX_EXCEPTION_EV_ERROR, code);
 472                                 should_abort = B_TRUE;
 473                         }
 474                         if (should_abort) {
 475                                 /* Ignore subsequent events */
 476                                 total = index + 1;
 477                                 break;
 478                         }
 479                 }
 480
 481                 /*
 482                  * Now that the hardware has most likely moved onto dma'ing
 483                  * into the next cache line, clear the processed events. Take
 484                  * care to only clear out events that we've processed
 485                  */
 486                 EFX_SET_QWORD(ev[0]);
 487                 offset = (count & eep->ee_mask) * sizeof (efx_qword_t);
 488                 for (index = 0; index < total; ++index) {
 489                         EFSYS_MEM_WRITEQ(eep->ee_esmp, offset, &(ev[0]));
 490                         offset += sizeof (efx_qword_t);
 491                 }
 492
 493                 count += total;
 494
 495         } while (total == batch);
 496
 497         *countp = count;
 498 }
 499
 500                         void
 501 efx_ev_qpost(
 502         __in    efx_evq_t *eep,
 503         __in    uint16_t data)
 504 {
 505         efx_nic_t *enp = eep->ee_enp;
 506         const efx_ev_ops_t *eevop = enp->en_eevop;
 507
 508         EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
 509
 510         EFSYS_ASSERT(eevop != NULL &&
 511             eevop->eevo_qpost != NULL);
 512
 513         eevop->eevo_qpost(eep, data);
 514 }
 515
 516         __checkReturn   efx_rc_t
 517 efx_ev_usecs_to_ticks(
 518         __in            efx_nic_t *enp,
 519         __in            unsigned int us,
 520         __out           unsigned int *ticksp)
 521 {
 522         efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
 523         unsigned int ticks;
 524
 525         /* Convert microseconds to a timer tick count */
 526         if (us == 0)
 527                 ticks = 0;
 528         else if (us * 1000 < encp->enc_evq_timer_quantum_ns)
 529                 ticks = 1;      /* Never round down to zero */
 530         else
 531                 ticks = us * 1000 / encp->enc_evq_timer_quantum_ns;
 532
 533         *ticksp = ticks;
 534         return (0);
 535 }
 536
 537         __checkReturn   efx_rc_t
 538 efx_ev_qmoderate(
 539         __in            efx_evq_t *eep,
 540         __in            unsigned int us)
 541 {
 542         efx_nic_t *enp = eep->ee_enp;
 543         const efx_ev_ops_t *eevop = enp->en_eevop;
 544         efx_rc_t rc;
 545
 546         EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
 547
 548         if ((eep->ee_flags & EFX_EVQ_FLAGS_NOTIFY_MASK) ==
 549             EFX_EVQ_FLAGS_NOTIFY_DISABLED) {
 550                 rc = EINVAL;
 551                 goto fail1;
 552         }
 553
 554         if ((rc = eevop->eevo_qmoderate(eep, us)) != 0)
 555                 goto fail2;
 556
 557         return (0);
 558
 559 fail2:
 560         EFSYS_PROBE(fail2);
 561 fail1:
 562         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 563         return (rc);
 564 }
 565
 566 #if EFSYS_OPT_QSTATS
 567                                         void
 568 efx_ev_qstats_update(
 569         __in                            efx_evq_t *eep,
 570         __inout_ecount(EV_NQSTATS)      efsys_stat_t *stat)
 571
 572 {       efx_nic_t *enp = eep->ee_enp;
 573         const efx_ev_ops_t *eevop = enp->en_eevop;
 574
 575         EFSYS_ASSERT3U(eep->ee_magic, ==, EFX_EVQ_MAGIC);
 576
 577         eevop->eevo_qstats_update(eep, stat);
 578 }
 579
 580 #endif  /* EFSYS_OPT_QSTATS */
 581
 582 #if EFSYS_OPT_SIENA
 583
 584 static  __checkReturn   efx_rc_t
 585 siena_ev_init(
 586         __in            efx_nic_t *enp)
 587 {
 588         efx_oword_t oword;
 589
 590         /*
 591          * Program the event queue for receive and transmit queue
 592          * flush events.
 593          */
 594         EFX_BAR_READO(enp, FR_AZ_DP_CTRL_REG, &oword);
 595         EFX_SET_OWORD_FIELD(oword, FRF_AZ_FLS_EVQ_ID, 0);
 596         EFX_BAR_WRITEO(enp, FR_AZ_DP_CTRL_REG, &oword);
 597
 598         return (0);
 599
 600 }
 601
 602 static  __checkReturn   boolean_t
 603 siena_ev_rx_not_ok(
 604         __in            efx_evq_t *eep,
 605         __in            efx_qword_t *eqp,
 606         __in            uint32_t label,
 607         __in            uint32_t id,
 608         __inout         uint16_t *flagsp)
 609 {
 610         boolean_t ignore = B_FALSE;
 611
 612         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_TOBE_DISC) != 0) {
 613                 EFX_EV_QSTAT_INCR(eep, EV_RX_TOBE_DISC);
 614                 EFSYS_PROBE(tobe_disc);
 615                 /*
 616                  * Assume this is a unicast address mismatch, unless below
 617                  * we find either FSF_AZ_RX_EV_ETH_CRC_ERR or
 618                  * EV_RX_PAUSE_FRM_ERR is set.
 619                  */
 620                 (*flagsp) |= EFX_ADDR_MISMATCH;
 621         }
 622
 623         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_FRM_TRUNC) != 0) {
 624                 EFSYS_PROBE2(frm_trunc, uint32_t, label, uint32_t, id);
 625                 EFX_EV_QSTAT_INCR(eep, EV_RX_FRM_TRUNC);
 626                 (*flagsp) |= EFX_DISCARD;
 627
 628 #if EFSYS_OPT_RX_SCATTER
 629                 /*
 630                  * Lookout for payload queue ran dry errors and ignore them.
 631                  *
 632                  * Sadly for the header/data split cases, the descriptor
 633                  * pointer in this event refers to the header queue and
 634                  * therefore cannot be easily detected as duplicate.
 635                  * So we drop these and rely on the receive processing seeing
 636                  * a subsequent packet with FSF_AZ_RX_EV_SOP set to discard
 637                  * the partially received packet.
 638                  */
 639                 if ((EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_SOP) == 0) &&
 640                     (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_JUMBO_CONT) == 0) &&
 641                     (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_BYTE_CNT) == 0))
 642                         ignore = B_TRUE;
 643 #endif  /* EFSYS_OPT_RX_SCATTER */
 644         }
 645
 646         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_ETH_CRC_ERR) != 0) {
 647                 EFX_EV_QSTAT_INCR(eep, EV_RX_ETH_CRC_ERR);
 648                 EFSYS_PROBE(crc_err);
 649                 (*flagsp) &= ~EFX_ADDR_MISMATCH;
 650                 (*flagsp) |= EFX_DISCARD;
 651         }
 652
 653         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_PAUSE_FRM_ERR) != 0) {
 654                 EFX_EV_QSTAT_INCR(eep, EV_RX_PAUSE_FRM_ERR);
 655                 EFSYS_PROBE(pause_frm_err);
 656                 (*flagsp) &= ~EFX_ADDR_MISMATCH;
 657                 (*flagsp) |= EFX_DISCARD;
 658         }
 659
 660         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_BUF_OWNER_ID_ERR) != 0) {
 661                 EFX_EV_QSTAT_INCR(eep, EV_RX_BUF_OWNER_ID_ERR);
 662                 EFSYS_PROBE(owner_id_err);
 663                 (*flagsp) |= EFX_DISCARD;
 664         }
 665
 666         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_IP_HDR_CHKSUM_ERR) != 0) {
 667                 EFX_EV_QSTAT_INCR(eep, EV_RX_IPV4_HDR_CHKSUM_ERR);
 668                 EFSYS_PROBE(ipv4_err);
 669                 (*flagsp) &= ~EFX_CKSUM_IPV4;
 670         }
 671
 672         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_TCP_UDP_CHKSUM_ERR) != 0) {
 673                 EFX_EV_QSTAT_INCR(eep, EV_RX_TCP_UDP_CHKSUM_ERR);
 674                 EFSYS_PROBE(udp_chk_err);
 675                 (*flagsp) &= ~EFX_CKSUM_TCPUDP;
 676         }
 677
 678         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_IP_FRAG_ERR) != 0) {
 679                 EFX_EV_QSTAT_INCR(eep, EV_RX_IP_FRAG_ERR);
 680
 681                 /*
 682                  * If IP is fragmented FSF_AZ_RX_EV_IP_FRAG_ERR is set. This
 683                  * causes FSF_AZ_RX_EV_PKT_OK to be clear. This is not an error
 684                  * condition.
 685                  */
 686                 (*flagsp) &= ~(EFX_PKT_TCP | EFX_PKT_UDP | EFX_CKSUM_TCPUDP);
 687         }
 688
 689         return (ignore);
 690 }
 691
 692 static  __checkReturn   boolean_t
 693 siena_ev_rx(
 694         __in            efx_evq_t *eep,
 695         __in            efx_qword_t *eqp,
 696         __in            const efx_ev_callbacks_t *eecp,
 697         __in_opt        void *arg)
 698 {
 699         uint32_t id;
 700         uint32_t size;
 701         uint32_t label;
 702         boolean_t ok;
 703 #if EFSYS_OPT_RX_SCATTER
 704         boolean_t sop;
 705         boolean_t jumbo_cont;
 706 #endif  /* EFSYS_OPT_RX_SCATTER */
 707         uint32_t hdr_type;
 708         boolean_t is_v6;
 709         uint16_t flags;
 710         boolean_t ignore;
 711         boolean_t should_abort;
 712
 713         EFX_EV_QSTAT_INCR(eep, EV_RX);
 714
 715         /* Basic packet information */
 716         id = EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_DESC_PTR);
 717         size = EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_BYTE_CNT);
 718         label = EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_Q_LABEL);
 719         ok = (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_PKT_OK) != 0);
 720
 721 #if EFSYS_OPT_RX_SCATTER
 722         sop = (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_SOP) != 0);
 723         jumbo_cont = (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_JUMBO_CONT) != 0);
 724 #endif  /* EFSYS_OPT_RX_SCATTER */
 725
 726         hdr_type = EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_HDR_TYPE);
 727
 728         is_v6 = (EFX_QWORD_FIELD(*eqp, FSF_CZ_RX_EV_IPV6_PKT) != 0);
 729
 730         /*
 731          * If packet is marked as OK and packet type is TCP/IP or
 732          * UDP/IP or other IP, then we can rely on the hardware checksums.
 733          */
 734         switch (hdr_type) {
 735         case FSE_AZ_RX_EV_HDR_TYPE_IPV4V6_TCP:
 736                 flags = EFX_PKT_TCP | EFX_CKSUM_TCPUDP;
 737                 if (is_v6) {
 738                         EFX_EV_QSTAT_INCR(eep, EV_RX_TCP_IPV6);
 739                         flags |= EFX_PKT_IPV6;
 740                 } else {
 741                         EFX_EV_QSTAT_INCR(eep, EV_RX_TCP_IPV4);
 742                         flags |= EFX_PKT_IPV4 | EFX_CKSUM_IPV4;
 743                 }
 744                 break;
 745
 746         case FSE_AZ_RX_EV_HDR_TYPE_IPV4V6_UDP:
 747                 flags = EFX_PKT_UDP | EFX_CKSUM_TCPUDP;
 748                 if (is_v6) {
 749                         EFX_EV_QSTAT_INCR(eep, EV_RX_UDP_IPV6);
 750                         flags |= EFX_PKT_IPV6;
 751                 } else {
 752                         EFX_EV_QSTAT_INCR(eep, EV_RX_UDP_IPV4);
 753                         flags |= EFX_PKT_IPV4 | EFX_CKSUM_IPV4;
 754                 }
 755                 break;
 756
 757         case FSE_AZ_RX_EV_HDR_TYPE_IPV4V6_OTHER:
 758                 if (is_v6) {
 759                         EFX_EV_QSTAT_INCR(eep, EV_RX_OTHER_IPV6);
 760                         flags = EFX_PKT_IPV6;
 761                 } else {
 762                         EFX_EV_QSTAT_INCR(eep, EV_RX_OTHER_IPV4);
 763                         flags = EFX_PKT_IPV4 | EFX_CKSUM_IPV4;
 764                 }
 765                 break;
 766
 767         case FSE_AZ_RX_EV_HDR_TYPE_OTHER:
 768                 EFX_EV_QSTAT_INCR(eep, EV_RX_NON_IP);
 769                 flags = 0;
 770                 break;
 771
 772         default:
 773                 EFSYS_ASSERT(B_FALSE);
 774                 flags = 0;
 775                 break;
 776         }
 777
 778 #if EFSYS_OPT_RX_SCATTER
 779         /* Report scatter and header/lookahead split buffer flags */
 780         if (sop)
 781                 flags |= EFX_PKT_START;
 782         if (jumbo_cont)
 783                 flags |= EFX_PKT_CONT;
 784 #endif  /* EFSYS_OPT_RX_SCATTER */
 785
 786         /* Detect errors included in the FSF_AZ_RX_EV_PKT_OK indication */
 787         if (!ok) {
 788                 ignore = siena_ev_rx_not_ok(eep, eqp, label, id, &flags);
 789                 if (ignore) {
 790                         EFSYS_PROBE4(rx_complete, uint32_t, label, uint32_t, id,
 791                             uint32_t, size, uint16_t, flags);
 792
 793                         return (B_FALSE);
 794                 }
 795         }
 796
 797         /* If we're not discarding the packet then it is ok */
 798         if (~flags & EFX_DISCARD)
 799                 EFX_EV_QSTAT_INCR(eep, EV_RX_OK);
 800
 801         /* Detect multicast packets that didn't match the filter */
 802         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_MCAST_PKT) != 0) {
 803                 EFX_EV_QSTAT_INCR(eep, EV_RX_MCAST_PKT);
 804
 805                 if (EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_MCAST_HASH_MATCH) != 0) {
 806                         EFX_EV_QSTAT_INCR(eep, EV_RX_MCAST_HASH_MATCH);
 807                 } else {
 808                         EFSYS_PROBE(mcast_mismatch);
 809                         flags |= EFX_ADDR_MISMATCH;
 810                 }
 811         } else {
 812                 flags |= EFX_PKT_UNICAST;
 813         }
 814
 815         /*
 816          * The packet parser in Siena can abort parsing packets under
 817          * certain error conditions, setting the PKT_NOT_PARSED bit
 818          * (which clears PKT_OK). If this is set, then don't trust
 819          * the PKT_TYPE field.
 820          */
 821         if (!ok) {
 822                 uint32_t parse_err;
 823
 824                 parse_err = EFX_QWORD_FIELD(*eqp, FSF_CZ_RX_EV_PKT_NOT_PARSED);
 825                 if (parse_err != 0)
 826                         flags |= EFX_CHECK_VLAN;
 827         }
 828
 829         if (~flags & EFX_CHECK_VLAN) {
 830                 uint32_t pkt_type;
 831
 832                 pkt_type = EFX_QWORD_FIELD(*eqp, FSF_AZ_RX_EV_PKT_TYPE);
 833                 if (pkt_type >= FSE_AZ_RX_EV_PKT_TYPE_VLAN)
 834                         flags |= EFX_PKT_VLAN_TAGGED;
 835         }
 836
 837         EFSYS_PROBE4(rx_complete, uint32_t, label, uint32_t, id,
 838             uint32_t, size, uint16_t, flags);
 839
 840         EFSYS_ASSERT(eecp->eec_rx != NULL);
 841         should_abort = eecp->eec_rx(arg, label, id, size, flags);
 842
 843         return (should_abort);
 844 }
 845
 846 static  __checkReturn   boolean_t
 847 siena_ev_tx(
 848         __in            efx_evq_t *eep,
 849         __in            efx_qword_t *eqp,
 850         __in            const efx_ev_callbacks_t *eecp,
 851         __in_opt        void *arg)
 852 {
 853         uint32_t id;
 854         uint32_t label;
 855         boolean_t should_abort;
 856
 857         EFX_EV_QSTAT_INCR(eep, EV_TX);
 858
 859         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_COMP) != 0 &&
 860             EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_PKT_ERR) == 0 &&
 861             EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_PKT_TOO_BIG) == 0 &&
 862             EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_WQ_FF_FULL) == 0) {
 863
 864                 id = EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_DESC_PTR);
 865                 label = EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_Q_LABEL);
 866
 867                 EFSYS_PROBE2(tx_complete, uint32_t, label, uint32_t, id);
 868
 869                 EFSYS_ASSERT(eecp->eec_tx != NULL);
 870                 should_abort = eecp->eec_tx(arg, label, id);
 871
 872                 return (should_abort);
 873         }
 874
 875         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_COMP) != 0)
 876                 EFSYS_PROBE3(bad_event, unsigned int, eep->ee_index,
 877                             uint32_t, EFX_QWORD_FIELD(*eqp, EFX_DWORD_1),
 878                             uint32_t, EFX_QWORD_FIELD(*eqp, EFX_DWORD_0));
 879
 880         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_PKT_ERR) != 0)
 881                 EFX_EV_QSTAT_INCR(eep, EV_TX_PKT_ERR);
 882
 883         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_PKT_TOO_BIG) != 0)
 884                 EFX_EV_QSTAT_INCR(eep, EV_TX_PKT_TOO_BIG);
 885
 886         if (EFX_QWORD_FIELD(*eqp, FSF_AZ_TX_EV_WQ_FF_FULL) != 0)
 887                 EFX_EV_QSTAT_INCR(eep, EV_TX_WQ_FF_FULL);
 888
 889         EFX_EV_QSTAT_INCR(eep, EV_TX_UNEXPECTED);
 890         return (B_FALSE);
 891 }
 892
 893 static  __checkReturn   boolean_t
 894 siena_ev_global(
 895         __in            efx_evq_t *eep,
 896         __in            efx_qword_t *eqp,
 897         __in            const efx_ev_callbacks_t *eecp,
 898         __in_opt        void *arg)
 899 {
 900         _NOTE(ARGUNUSED(eqp, eecp, arg))
 901
 902         EFX_EV_QSTAT_INCR(eep, EV_GLOBAL);
 903
 904         return (B_FALSE);
 905 }
 906
 907 static  __checkReturn   boolean_t
 908 siena_ev_driver(
 909         __in            efx_evq_t *eep,
 910         __in            efx_qword_t *eqp,
 911         __in            const efx_ev_callbacks_t *eecp,
 912         __in_opt        void *arg)
 913 {
 914         boolean_t should_abort;
 915
 916         EFX_EV_QSTAT_INCR(eep, EV_DRIVER);
 917         should_abort = B_FALSE;
 918
 919         switch (EFX_QWORD_FIELD(*eqp, FSF_AZ_DRIVER_EV_SUBCODE)) {
 920         case FSE_AZ_TX_DESCQ_FLS_DONE_EV: {
 921                 uint32_t txq_index;
 922
 923                 EFX_EV_QSTAT_INCR(eep, EV_DRIVER_TX_DESCQ_FLS_DONE);
 924
 925                 txq_index = EFX_QWORD_FIELD(*eqp, FSF_AZ_DRIVER_EV_SUBDATA);
 926
 927                 EFSYS_PROBE1(tx_descq_fls_done, uint32_t, txq_index);
 928
 929                 EFSYS_ASSERT(eecp->eec_txq_flush_done != NULL);
 930                 should_abort = eecp->eec_txq_flush_done(arg, txq_index);
 931
 932                 break;
 933         }
 934         case FSE_AZ_RX_DESCQ_FLS_DONE_EV: {
 935                 uint32_t rxq_index;
 936                 uint32_t failed;
 937
 938                 rxq_index = EFX_QWORD_FIELD(*eqp, FSF_AZ_DRIVER_EV_RX_DESCQ_ID);
 939                 failed = EFX_QWORD_FIELD(*eqp, FSF_AZ_DRIVER_EV_RX_FLUSH_FAIL);
 940
 941                 EFSYS_ASSERT(eecp->eec_rxq_flush_done != NULL);
 942                 EFSYS_ASSERT(eecp->eec_rxq_flush_failed != NULL);
 943
 944                 if (failed) {
 945                         EFX_EV_QSTAT_INCR(eep, EV_DRIVER_RX_DESCQ_FLS_FAILED);
 946
 947                         EFSYS_PROBE1(rx_descq_fls_failed, uint32_t, rxq_index);
 948
 949                         should_abort = eecp->eec_rxq_flush_failed(arg,
 950                                                                     rxq_index);
 951                 } else {
 952                         EFX_EV_QSTAT_INCR(eep, EV_DRIVER_RX_DESCQ_FLS_DONE);
 953
 954                         EFSYS_PROBE1(rx_descq_fls_done, uint32_t, rxq_index);
 955
 956                         should_abort = eecp->eec_rxq_flush_done(arg, rxq_index);
 957                 }
 958
 959                 break;
 960         }
 961         case FSE_AZ_EVQ_INIT_DONE_EV:
 962                 EFSYS_ASSERT(eecp->eec_initialized != NULL);
 963                 should_abort = eecp->eec_initialized(arg);
 964
 965                 break;
 966
 967         case FSE_AZ_EVQ_NOT_EN_EV:
 968                 EFSYS_PROBE(evq_not_en);
 969                 break;
 970
 971         case FSE_AZ_SRM_UPD_DONE_EV: {
 972                 uint32_t code;
 973
 974                 EFX_EV_QSTAT_INCR(eep, EV_DRIVER_SRM_UPD_DONE);
 975
 976                 code = EFX_QWORD_FIELD(*eqp, FSF_AZ_DRIVER_EV_SUBDATA);
 977
 978                 EFSYS_ASSERT(eecp->eec_sram != NULL);
 979                 should_abort = eecp->eec_sram(arg, code);
 980
 981                 break;
 982         }
 983         case FSE_AZ_WAKE_UP_EV: {
 984                 uint32_t id;
 985
 986                 id = EFX_QWORD_FIELD(*eqp, FSF_AZ_DRIVER_EV_SUBDATA);
 987
 988                 EFSYS_ASSERT(eecp->eec_wake_up != NULL);
 989                 should_abort = eecp->eec_wake_up(arg, id);
 990
 991                 break;
 992         }
 993         case FSE_AZ_TX_PKT_NON_TCP_UDP:
 994                 EFSYS_PROBE(tx_pkt_non_tcp_udp);
 995                 break;
 996
 997         case FSE_AZ_TIMER_EV: {
 998                 uint32_t id;
 999
1000                 id = EFX_QWORD_FIELD(*eqp, FSF_AZ_DRIVER_EV_SUBDATA);
1001
1002                 EFSYS_ASSERT(eecp->eec_timer != NULL);
1003                 should_abort = eecp->eec_timer(arg, id);
1004
1005                 break;
1006         }
1007         case FSE_AZ_RX_DSC_ERROR_EV:
1008                 EFX_EV_QSTAT_INCR(eep, EV_DRIVER_RX_DSC_ERROR);
1009
1010                 EFSYS_PROBE(rx_dsc_error);
1011
1012                 EFSYS_ASSERT(eecp->eec_exception != NULL);
1013                 should_abort = eecp->eec_exception(arg,
1014                         EFX_EXCEPTION_RX_DSC_ERROR, 0);
1015
1016                 break;
1017
1018         case FSE_AZ_TX_DSC_ERROR_EV:
1019                 EFX_EV_QSTAT_INCR(eep, EV_DRIVER_TX_DSC_ERROR);
1020
1021                 EFSYS_PROBE(tx_dsc_error);
1022
1023                 EFSYS_ASSERT(eecp->eec_exception != NULL);
1024                 should_abort = eecp->eec_exception(arg,
1025                         EFX_EXCEPTION_TX_DSC_ERROR, 0);
1026
1027                 break;
1028
1029         default:
1030                 break;
1031         }
1032
1033         return (should_abort);
1034 }
1035
1036 static  __checkReturn   boolean_t
1037 siena_ev_drv_gen(
1038         __in            efx_evq_t *eep,
1039         __in            efx_qword_t *eqp,
1040         __in            const efx_ev_callbacks_t *eecp,
1041         __in_opt        void *arg)
1042 {
1043         uint32_t data;
1044         boolean_t should_abort;
1045
1046         EFX_EV_QSTAT_INCR(eep, EV_DRV_GEN);
1047
1048         data = EFX_QWORD_FIELD(*eqp, FSF_AZ_EV_DATA_DW0);
1049         if (data >= ((uint32_t)1 << 16)) {
1050                 EFSYS_PROBE3(bad_event, unsigned int, eep->ee_index,
1051                             uint32_t, EFX_QWORD_FIELD(*eqp, EFX_DWORD_1),
1052                             uint32_t, EFX_QWORD_FIELD(*eqp, EFX_DWORD_0));
1053                 return (B_TRUE);
1054         }
1055
1056         EFSYS_ASSERT(eecp->eec_software != NULL);
1057         should_abort = eecp->eec_software(arg, (uint16_t)data);
1058
1059         return (should_abort);
1060 }
1061
1062 #if EFSYS_OPT_MCDI
1063
1064 static  __checkReturn   boolean_t
1065 siena_ev_mcdi(
1066         __in            efx_evq_t *eep,
1067         __in            efx_qword_t *eqp,
1068         __in            const efx_ev_callbacks_t *eecp,
1069         __in_opt        void *arg)
1070 {
1071         efx_nic_t *enp = eep->ee_enp;
1072         unsigned int code;
1073         boolean_t should_abort = B_FALSE;
1074
1075         EFSYS_ASSERT3U(enp->en_family, ==, EFX_FAMILY_SIENA);
1076
1077         if (enp->en_family != EFX_FAMILY_SIENA)
1078                 goto out;
1079
1080         EFSYS_ASSERT(eecp->eec_link_change != NULL);
1081         EFSYS_ASSERT(eecp->eec_exception != NULL);
1082 #if EFSYS_OPT_MON_STATS
1083         EFSYS_ASSERT(eecp->eec_monitor != NULL);
1084 #endif
1085
1086         EFX_EV_QSTAT_INCR(eep, EV_MCDI_RESPONSE);
1087
1088         code = EFX_QWORD_FIELD(*eqp, MCDI_EVENT_CODE);
1089         switch (code) {
1090         case MCDI_EVENT_CODE_BADSSERT:
1091                 efx_mcdi_ev_death(enp, EINTR);
1092                 break;
1093
1094         case MCDI_EVENT_CODE_CMDDONE:
1095                 efx_mcdi_ev_cpl(enp,
1096                     MCDI_EV_FIELD(eqp, CMDDONE_SEQ),
1097                     MCDI_EV_FIELD(eqp, CMDDONE_DATALEN),
1098                     MCDI_EV_FIELD(eqp, CMDDONE_ERRNO));
1099                 break;
1100
1101         case MCDI_EVENT_CODE_LINKCHANGE: {
1102                 efx_link_mode_t link_mode;
1103
1104                 siena_phy_link_ev(enp, eqp, &link_mode);
1105                 should_abort = eecp->eec_link_change(arg, link_mode);
1106                 break;
1107         }
1108         case MCDI_EVENT_CODE_SENSOREVT: {
1109 #if EFSYS_OPT_MON_STATS
1110                 efx_mon_stat_t id;
1111                 efx_mon_stat_value_t value;
1112                 efx_rc_t rc;
1113
1114                 if ((rc = mcdi_mon_ev(enp, eqp, &id, &value)) == 0)
1115                         should_abort = eecp->eec_monitor(arg, id, value);
1116                 else if (rc == ENOTSUP) {
1117                         should_abort = eecp->eec_exception(arg,
1118                                 EFX_EXCEPTION_UNKNOWN_SENSOREVT,
1119                                 MCDI_EV_FIELD(eqp, DATA));
1120                 } else
1121                         EFSYS_ASSERT(rc == ENODEV);     /* Wrong port */
1122 #else
1123                 should_abort = B_FALSE;
1124 #endif
1125                 break;
1126         }
1127         case MCDI_EVENT_CODE_SCHEDERR:
1128                 /* Informational only */
1129                 break;
1130
1131         case MCDI_EVENT_CODE_REBOOT:
1132                 efx_mcdi_ev_death(enp, EIO);
1133                 break;
1134
1135         case MCDI_EVENT_CODE_MAC_STATS_DMA:
1136 #if EFSYS_OPT_MAC_STATS
1137                 if (eecp->eec_mac_stats != NULL) {
1138                         eecp->eec_mac_stats(arg,
1139                             MCDI_EV_FIELD(eqp, MAC_STATS_DMA_GENERATION));
1140                 }
1141 #endif
1142                 break;
1143
1144         case MCDI_EVENT_CODE_FWALERT: {
1145                 uint32_t reason = MCDI_EV_FIELD(eqp, FWALERT_REASON);
1146
1147                 if (reason == MCDI_EVENT_FWALERT_REASON_SRAM_ACCESS)
1148                         should_abort = eecp->eec_exception(arg,
1149                                 EFX_EXCEPTION_FWALERT_SRAM,
1150                                 MCDI_EV_FIELD(eqp, FWALERT_DATA));
1151                 else
1152                         should_abort = eecp->eec_exception(arg,
1153                                 EFX_EXCEPTION_UNKNOWN_FWALERT,
1154                                 MCDI_EV_FIELD(eqp, DATA));
1155                 break;
1156         }
1157
1158         default:
1159                 EFSYS_PROBE1(mc_pcol_error, int, code);
1160                 break;
1161         }
1162
1163 out:
1164         return (should_abort);
1165 }
1166
1167 #endif  /* EFSYS_OPT_MCDI */
1168
1169 static  __checkReturn   efx_rc_t
1170 siena_ev_qprime(
1171         __in            efx_evq_t *eep,
1172         __in            unsigned int count)
1173 {
1174         efx_nic_t *enp = eep->ee_enp;
1175         uint32_t rptr;
1176         efx_dword_t dword;
1177
1178         rptr = count & eep->ee_mask;
1179
1180         EFX_POPULATE_DWORD_1(dword, FRF_AZ_EVQ_RPTR, rptr);
1181
1182         EFX_BAR_TBL_WRITED(enp, FR_AZ_EVQ_RPTR_REG, eep->ee_index,
1183                             &dword, B_FALSE);
1184
1185         return (0);
1186 }
1187
1188 static          void
1189 siena_ev_qpost(
1190         __in    efx_evq_t *eep,
1191         __in    uint16_t data)
1192 {
1193         efx_nic_t *enp = eep->ee_enp;
1194         efx_qword_t ev;
1195         efx_oword_t oword;
1196
1197         EFX_POPULATE_QWORD_2(ev, FSF_AZ_EV_CODE, FSE_AZ_EV_CODE_DRV_GEN_EV,
1198             FSF_AZ_EV_DATA_DW0, (uint32_t)data);
1199
1200         EFX_POPULATE_OWORD_3(oword, FRF_AZ_DRV_EV_QID, eep->ee_index,
1201             EFX_DWORD_0, EFX_QWORD_FIELD(ev, EFX_DWORD_0),
1202             EFX_DWORD_1, EFX_QWORD_FIELD(ev, EFX_DWORD_1));
1203
1204         EFX_BAR_WRITEO(enp, FR_AZ_DRV_EV_REG, &oword);
1205 }
1206
1207 static  __checkReturn   efx_rc_t
1208 siena_ev_qmoderate(
1209         __in            efx_evq_t *eep,
1210         __in            unsigned int us)
1211 {
1212         efx_nic_t *enp = eep->ee_enp;
1213         efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
1214         unsigned int locked;
1215         efx_dword_t dword;
1216         efx_rc_t rc;
1217
1218         if (us > encp->enc_evq_timer_max_us) {
1219                 rc = EINVAL;
1220                 goto fail1;
1221         }
1222
1223         /* If the value is zero then disable the timer */
1224         if (us == 0) {
1225                 EFX_POPULATE_DWORD_2(dword,
1226                     FRF_CZ_TC_TIMER_MODE, FFE_CZ_TIMER_MODE_DIS,
1227                     FRF_CZ_TC_TIMER_VAL, 0);
1228         } else {
1229                 unsigned int ticks;
1230
1231                 if ((rc = efx_ev_usecs_to_ticks(enp, us, &ticks)) != 0)
1232                         goto fail2;
1233
1234                 EFSYS_ASSERT(ticks > 0);
1235                 EFX_POPULATE_DWORD_2(dword,
1236                     FRF_CZ_TC_TIMER_MODE, FFE_CZ_TIMER_MODE_INT_HLDOFF,
1237                     FRF_CZ_TC_TIMER_VAL, ticks - 1);
1238         }
1239
1240         locked = (eep->ee_index == 0) ? 1 : 0;
1241
1242         EFX_BAR_TBL_WRITED(enp, FR_BZ_TIMER_COMMAND_REGP0,
1243             eep->ee_index, &dword, locked);
1244
1245         return (0);
1246
1247 fail2:
1248         EFSYS_PROBE(fail2);
1249 fail1:
1250         EFSYS_PROBE1(fail1, efx_rc_t, rc);
1251
1252         return (rc);
1253 }
1254
1255 static  __checkReturn   efx_rc_t
1256 siena_ev_qcreate(
1257         __in            efx_nic_t *enp,
1258         __in            unsigned int index,
1259         __in            efsys_mem_t *esmp,
1260         __in            size_t ndescs,
1261         __in            uint32_t id,
1262         __in            uint32_t us,
1263         __in            uint32_t flags,
1264         __in            efx_evq_t *eep)
1265 {
1266         efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
1267         uint32_t size;
1268         efx_oword_t oword;
1269         efx_rc_t rc;
1270         boolean_t notify_mode;
1271
1272         _NOTE(ARGUNUSED(esmp))
1273
1274         EFX_STATIC_ASSERT(ISP2(EFX_EVQ_MAXNEVS));
1275         EFX_STATIC_ASSERT(ISP2(EFX_EVQ_MINNEVS));
1276
1277         if (!ISP2(ndescs) ||
1278             (ndescs < EFX_EVQ_MINNEVS) || (ndescs > EFX_EVQ_MAXNEVS)) {
1279                 rc = EINVAL;
1280                 goto fail1;
1281         }
1282         if (index >= encp->enc_evq_limit) {
1283                 rc = EINVAL;
1284                 goto fail2;
1285         }
1286 #if EFSYS_OPT_RX_SCALE
1287         if (enp->en_intr.ei_type == EFX_INTR_LINE &&
1288             index >= EFX_MAXRSS_LEGACY) {
1289                 rc = EINVAL;
1290                 goto fail3;
1291         }
1292 #endif
1293         for (size = 0; (1 << size) <= (EFX_EVQ_MAXNEVS / EFX_EVQ_MINNEVS);
1294             size++)
1295                 if ((1 << size) == (int)(ndescs / EFX_EVQ_MINNEVS))
1296                         break;
1297         if (id + (1 << size) >= encp->enc_buftbl_limit) {
1298                 rc = EINVAL;
1299                 goto fail4;
1300         }
1301
1302         /* Set up the handler table */
1303         eep->ee_rx      = siena_ev_rx;
1304         eep->ee_tx      = siena_ev_tx;
1305         eep->ee_driver  = siena_ev_driver;
1306         eep->ee_global  = siena_ev_global;
1307         eep->ee_drv_gen = siena_ev_drv_gen;
1308 #if EFSYS_OPT_MCDI
1309         eep->ee_mcdi    = siena_ev_mcdi;
1310 #endif  /* EFSYS_OPT_MCDI */
1311
1312         notify_mode = ((flags & EFX_EVQ_FLAGS_NOTIFY_MASK) !=
1313             EFX_EVQ_FLAGS_NOTIFY_INTERRUPT);
1314
1315         /* Set up the new event queue */
1316         EFX_POPULATE_OWORD_3(oword, FRF_CZ_TIMER_Q_EN, 1,
1317             FRF_CZ_HOST_NOTIFY_MODE, notify_mode,
1318             FRF_CZ_TIMER_MODE, FFE_CZ_TIMER_MODE_DIS);
1319         EFX_BAR_TBL_WRITEO(enp, FR_AZ_TIMER_TBL, index, &oword, B_TRUE);
1320
1321         EFX_POPULATE_OWORD_3(oword, FRF_AZ_EVQ_EN, 1, FRF_AZ_EVQ_SIZE, size,
1322             FRF_AZ_EVQ_BUF_BASE_ID, id);
1323
1324         EFX_BAR_TBL_WRITEO(enp, FR_AZ_EVQ_PTR_TBL, index, &oword, B_TRUE);
1325
1326         /* Set initial interrupt moderation */
1327         siena_ev_qmoderate(eep, us);
1328
1329         return (0);
1330
1331 fail4:
1332         EFSYS_PROBE(fail4);
1333 #if EFSYS_OPT_RX_SCALE
1334 fail3:
1335         EFSYS_PROBE(fail3);
1336 #endif
1337 fail2:
1338         EFSYS_PROBE(fail2);
1339 fail1:
1340         EFSYS_PROBE1(fail1, efx_rc_t, rc);
1341
1342         return (rc);
1343 }
1344
1345 #endif /* EFSYS_OPT_SIENA */
1346
1347 #if EFSYS_OPT_QSTATS
1348 #if EFSYS_OPT_NAMES
1349 /* START MKCONFIG GENERATED EfxEventQueueStatNamesBlock c0f3bc5083b40532 */
1350 static const char * const __efx_ev_qstat_name[] = {
1351         "all",
1352         "rx",
1353         "rx_ok",
1354         "rx_frm_trunc",
1355         "rx_tobe_disc",
1356         "rx_pause_frm_err",
1357         "rx_buf_owner_id_err",
1358         "rx_ipv4_hdr_chksum_err",
1359         "rx_tcp_udp_chksum_err",
1360         "rx_eth_crc_err",
1361         "rx_ip_frag_err",
1362         "rx_mcast_pkt",
1363         "rx_mcast_hash_match",
1364         "rx_tcp_ipv4",
1365         "rx_tcp_ipv6",
1366         "rx_udp_ipv4",
1367         "rx_udp_ipv6",
1368         "rx_other_ipv4",
1369         "rx_other_ipv6",
1370         "rx_non_ip",
1371         "rx_batch",
1372         "tx",
1373         "tx_wq_ff_full",
1374         "tx_pkt_err",
1375         "tx_pkt_too_big",
1376         "tx_unexpected",
1377         "global",
1378         "global_mnt",
1379         "driver",
1380         "driver_srm_upd_done",
1381         "driver_tx_descq_fls_done",
1382         "driver_rx_descq_fls_done",
1383         "driver_rx_descq_fls_failed",
1384         "driver_rx_dsc_error",
1385         "driver_tx_dsc_error",
1386         "drv_gen",
1387         "mcdi_response",
1388 };
1389 /* END MKCONFIG GENERATED EfxEventQueueStatNamesBlock */
1390
1391                 const char *
1392 efx_ev_qstat_name(
1393         __in    efx_nic_t *enp,
1394         __in    unsigned int id)
1395 {
1396         _NOTE(ARGUNUSED(enp))
1397
1398         EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
1399         EFSYS_ASSERT3U(id, <, EV_NQSTATS);
1400
1401         return (__efx_ev_qstat_name[id]);
1402 }
1403 #endif  /* EFSYS_OPT_NAMES */
1404 #endif  /* EFSYS_OPT_QSTATS */
1405
1406 #if EFSYS_OPT_SIENA
1407
1408 #if EFSYS_OPT_QSTATS
1409 static                                  void
1410 siena_ev_qstats_update(
1411         __in                            efx_evq_t *eep,
1412         __inout_ecount(EV_NQSTATS)      efsys_stat_t *stat)
1413 {
1414         unsigned int id;
1415
1416         for (id = 0; id < EV_NQSTATS; id++) {
1417                 efsys_stat_t *essp = &stat[id];
1418
1419                 EFSYS_STAT_INCR(essp, eep->ee_stat[id]);
1420                 eep->ee_stat[id] = 0;
1421         }
1422 }
1423 #endif  /* EFSYS_OPT_QSTATS */
1424
1425 static          void
1426 siena_ev_qdestroy(
1427         __in    efx_evq_t *eep)
1428 {
1429         efx_nic_t *enp = eep->ee_enp;
1430         efx_oword_t oword;
1431
1432         /* Purge event queue */
1433         EFX_ZERO_OWORD(oword);
1434
1435         EFX_BAR_TBL_WRITEO(enp, FR_AZ_EVQ_PTR_TBL,
1436             eep->ee_index, &oword, B_TRUE);
1437
1438         EFX_ZERO_OWORD(oword);
1439         EFX_BAR_TBL_WRITEO(enp, FR_AZ_TIMER_TBL, eep->ee_index, &oword, B_TRUE);
1440 }
1441
1442 static          void
1443 siena_ev_fini(
1444         __in    efx_nic_t *enp)
1445 {
1446         _NOTE(ARGUNUSED(enp))
1447 }
1448
1449 #endif /* EFSYS_OPT_SIENA */