New upstream version 18.02
[deb_dpdk.git] / drivers / net / sfc / base / efx_sram.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2  *
3  * Copyright (c) 2007-2018 Solarflare Communications Inc.
4  * All rights reserved.
5  */
6
7 #include "efx.h"
8 #include "efx_impl.h"
9
10         __checkReturn   efx_rc_t
11 efx_sram_buf_tbl_set(
12         __in            efx_nic_t *enp,
13         __in            uint32_t id,
14         __in            efsys_mem_t *esmp,
15         __in            size_t n)
16 {
17         efx_qword_t qword;
18         uint32_t start = id;
19         uint32_t stop = start + n;
20         efsys_dma_addr_t addr;
21         efx_oword_t oword;
22         unsigned int count;
23         efx_rc_t rc;
24
25         EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
26         EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NIC);
27
28 #if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD
29         if (enp->en_family == EFX_FAMILY_HUNTINGTON ||
30             enp->en_family == EFX_FAMILY_MEDFORD) {
31                 /*
32                  * FIXME: the efx_sram_buf_tbl_*() functionality needs to be
33                  * pulled inside the Falcon/Siena queue create/destroy code,
34                  * and then the original functions can be removed (see bug30834
35                  * comment #1).  But, for now, we just ensure that they are
36                  * no-ops for EF10, to allow bringing up existing drivers
37                  * without modification.
38                  */
39
40                 return (0);
41         }
42 #endif  /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD */
43
44         if (stop >= EFX_BUF_TBL_SIZE) {
45                 rc = EFBIG;
46                 goto fail1;
47         }
48
49         /* Add the entries into the buffer table */
50         addr = EFSYS_MEM_ADDR(esmp);
51         for (id = start; id != stop; id++) {
52                 EFX_POPULATE_QWORD_5(qword,
53                     FRF_AZ_IP_DAT_BUF_SIZE, 0, FRF_AZ_BUF_ADR_REGION, 0,
54                     FRF_AZ_BUF_ADR_FBUF_DW0,
55                     (uint32_t)((addr >> 12) & 0xffffffff),
56                     FRF_AZ_BUF_ADR_FBUF_DW1,
57                     (uint32_t)((addr >> 12) >> 32),
58                     FRF_AZ_BUF_OWNER_ID_FBUF, 0);
59
60                 EFX_BAR_TBL_WRITEQ(enp, FR_AZ_BUF_FULL_TBL,
61                                     id, &qword);
62
63                 addr += EFX_BUF_SIZE;
64         }
65
66         EFSYS_PROBE2(buf, uint32_t, start, uint32_t, stop - 1);
67
68         /* Flush the write buffer */
69         EFX_POPULATE_OWORD_2(oword, FRF_AZ_BUF_UPD_CMD, 1,
70             FRF_AZ_BUF_CLR_CMD, 0);
71         EFX_BAR_WRITEO(enp, FR_AZ_BUF_TBL_UPD_REG, &oword);
72
73         /* Poll for the last entry being written to the buffer table */
74         EFSYS_ASSERT3U(id, ==, stop);
75         addr -= EFX_BUF_SIZE;
76
77         count = 0;
78         do {
79                 EFSYS_PROBE1(wait, unsigned int, count);
80
81                 /* Spin for 1 ms */
82                 EFSYS_SPIN(1000);
83
84                 EFX_BAR_TBL_READQ(enp, FR_AZ_BUF_FULL_TBL,
85                                     id - 1, &qword);
86
87                 if (EFX_QWORD_FIELD(qword, FRF_AZ_BUF_ADR_FBUF_DW0) ==
88                     (uint32_t)((addr >> 12) & 0xffffffff) &&
89                     EFX_QWORD_FIELD(qword, FRF_AZ_BUF_ADR_FBUF_DW1) ==
90                     (uint32_t)((addr >> 12) >> 32))
91                         goto verify;
92
93         } while (++count < 100);
94
95         rc = ETIMEDOUT;
96         goto fail2;
97
98 verify:
99         /* Verify the rest of the entries in the buffer table */
100         while (--id != start) {
101                 addr -= EFX_BUF_SIZE;
102
103                 /* Read the buffer table entry */
104                 EFX_BAR_TBL_READQ(enp, FR_AZ_BUF_FULL_TBL,
105                                     id - 1, &qword);
106
107                 if (EFX_QWORD_FIELD(qword, FRF_AZ_BUF_ADR_FBUF_DW0) !=
108                     (uint32_t)((addr >> 12) & 0xffffffff) ||
109                     EFX_QWORD_FIELD(qword, FRF_AZ_BUF_ADR_FBUF_DW1) !=
110                     (uint32_t)((addr >> 12) >> 32)) {
111                         rc = EFAULT;
112                         goto fail3;
113                 }
114         }
115
116         return (0);
117
118 fail3:
119         EFSYS_PROBE(fail3);
120
121         id = stop;
122
123 fail2:
124         EFSYS_PROBE(fail2);
125
126         EFX_POPULATE_OWORD_4(oword, FRF_AZ_BUF_UPD_CMD, 0,
127             FRF_AZ_BUF_CLR_CMD, 1, FRF_AZ_BUF_CLR_END_ID, id - 1,
128             FRF_AZ_BUF_CLR_START_ID, start);
129         EFX_BAR_WRITEO(enp, FR_AZ_BUF_TBL_UPD_REG, &oword);
130
131 fail1:
132         EFSYS_PROBE1(fail1, efx_rc_t, rc);
133
134         return (rc);
135 }
136
137                 void
138 efx_sram_buf_tbl_clear(
139         __in    efx_nic_t *enp,
140         __in    uint32_t id,
141         __in    size_t n)
142 {
143         efx_oword_t oword;
144         uint32_t start = id;
145         uint32_t stop = start + n;
146
147         EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
148         EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NIC);
149
150 #if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD
151         if (enp->en_family == EFX_FAMILY_HUNTINGTON ||
152             enp->en_family == EFX_FAMILY_MEDFORD) {
153                 /*
154                  * FIXME: the efx_sram_buf_tbl_*() functionality needs to be
155                  * pulled inside the Falcon/Siena queue create/destroy code,
156                  * and then the original functions can be removed (see bug30834
157                  * comment #1).  But, for now, we just ensure that they are
158                  * no-ops for EF10, to allow bringing up existing drivers
159                  * without modification.
160                  */
161
162                 return;
163         }
164 #endif  /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD */
165
166         EFSYS_ASSERT3U(stop, <, EFX_BUF_TBL_SIZE);
167
168         EFSYS_PROBE2(buf, uint32_t, start, uint32_t, stop - 1);
169
170         EFX_POPULATE_OWORD_4(oword, FRF_AZ_BUF_UPD_CMD, 0,
171             FRF_AZ_BUF_CLR_CMD, 1, FRF_AZ_BUF_CLR_END_ID, stop - 1,
172             FRF_AZ_BUF_CLR_START_ID, start);
173         EFX_BAR_WRITEO(enp, FR_AZ_BUF_TBL_UPD_REG, &oword);
174 }
175
176
177 #if EFSYS_OPT_DIAG
178
179 static                  void
180 efx_sram_byte_increment_set(
181         __in            size_t row,
182         __in            boolean_t negate,
183         __out           efx_qword_t *eqp)
184 {
185         size_t offset = row * FR_AZ_SRM_DBG_REG_STEP;
186         unsigned int index;
187
188         _NOTE(ARGUNUSED(negate))
189
190         for (index = 0; index < sizeof (efx_qword_t); index++)
191                 eqp->eq_u8[index] = offset + index;
192 }
193
194 static                  void
195 efx_sram_all_the_same_set(
196         __in            size_t row,
197         __in            boolean_t negate,
198         __out           efx_qword_t *eqp)
199 {
200         _NOTE(ARGUNUSED(row))
201
202         if (negate)
203                 EFX_SET_QWORD(*eqp);
204         else
205                 EFX_ZERO_QWORD(*eqp);
206 }
207
208 static                  void
209 efx_sram_bit_alternate_set(
210         __in            size_t row,
211         __in            boolean_t negate,
212         __out           efx_qword_t *eqp)
213 {
214         _NOTE(ARGUNUSED(row))
215
216         EFX_POPULATE_QWORD_2(*eqp,
217             EFX_DWORD_0, (negate) ? 0x55555555 : 0xaaaaaaaa,
218             EFX_DWORD_1, (negate) ? 0x55555555 : 0xaaaaaaaa);
219 }
220
221 static                  void
222 efx_sram_byte_alternate_set(
223         __in            size_t row,
224         __in            boolean_t negate,
225         __out           efx_qword_t *eqp)
226 {
227         _NOTE(ARGUNUSED(row))
228
229         EFX_POPULATE_QWORD_2(*eqp,
230             EFX_DWORD_0, (negate) ? 0x00ff00ff : 0xff00ff00,
231             EFX_DWORD_1, (negate) ? 0x00ff00ff : 0xff00ff00);
232 }
233
234 static                  void
235 efx_sram_byte_changing_set(
236         __in            size_t row,
237         __in            boolean_t negate,
238         __out           efx_qword_t *eqp)
239 {
240         size_t offset = row * FR_AZ_SRM_DBG_REG_STEP;
241         unsigned int index;
242
243         for (index = 0; index < sizeof (efx_qword_t); index++) {
244                 uint8_t byte;
245
246                 if (offset / 256 == 0)
247                         byte = (uint8_t)((offset % 257) % 256);
248                 else
249                         byte = (uint8_t)(~((offset - 8) % 257) % 256);
250
251                 eqp->eq_u8[index] = (negate) ? ~byte : byte;
252         }
253 }
254
255 static                  void
256 efx_sram_bit_sweep_set(
257         __in            size_t row,
258         __in            boolean_t negate,
259         __out           efx_qword_t *eqp)
260 {
261         size_t offset = row * FR_AZ_SRM_DBG_REG_STEP;
262
263         if (negate) {
264                 EFX_SET_QWORD(*eqp);
265                 EFX_CLEAR_QWORD_BIT(*eqp, (offset / sizeof (efx_qword_t)) % 64);
266         } else {
267                 EFX_ZERO_QWORD(*eqp);
268                 EFX_SET_QWORD_BIT(*eqp, (offset / sizeof (efx_qword_t)) % 64);
269         }
270 }
271
272 efx_sram_pattern_fn_t   __efx_sram_pattern_fns[] = {
273         efx_sram_byte_increment_set,
274         efx_sram_all_the_same_set,
275         efx_sram_bit_alternate_set,
276         efx_sram_byte_alternate_set,
277         efx_sram_byte_changing_set,
278         efx_sram_bit_sweep_set
279 };
280
281         __checkReturn   efx_rc_t
282 efx_sram_test(
283         __in            efx_nic_t *enp,
284         __in            efx_pattern_type_t type)
285 {
286         efx_sram_pattern_fn_t func;
287
288         EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
289
290         EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NIC);
291
292         EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_RX));
293         EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_TX));
294         EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_EV));
295
296         /* SRAM testing is only available on Siena. */
297         if (enp->en_family != EFX_FAMILY_SIENA)
298                 return (0);
299
300         /* Select pattern generator */
301         EFSYS_ASSERT3U(type, <, EFX_PATTERN_NTYPES);
302         func = __efx_sram_pattern_fns[type];
303
304         return (siena_sram_test(enp, func));
305 }
306
307 #endif  /* EFSYS_OPT_DIAG */