New upstream version 18.08
[deb_dpdk.git] / drivers / net / sfc / base / efx_sram.c
1 /* SPDX-License-Identifier: BSD-3-Clause
2  *
3  * Copyright (c) 2007-2018 Solarflare Communications Inc.
4  * All rights reserved.
5  */
6
7 #include "efx.h"
8 #include "efx_impl.h"
9
10         __checkReturn   efx_rc_t
11 efx_sram_buf_tbl_set(
12         __in            efx_nic_t *enp,
13         __in            uint32_t id,
14         __in            efsys_mem_t *esmp,
15         __in            size_t n)
16 {
17         efx_qword_t qword;
18         uint32_t start = id;
19         uint32_t stop = start + n;
20         efsys_dma_addr_t addr;
21         efx_oword_t oword;
22         unsigned int count;
23         efx_rc_t rc;
24
25         EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
26         EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NIC);
27
28 #if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
29         if (enp->en_family == EFX_FAMILY_HUNTINGTON ||
30             enp->en_family == EFX_FAMILY_MEDFORD ||
31             enp->en_family == EFX_FAMILY_MEDFORD2) {
32                 /*
33                  * FIXME: the efx_sram_buf_tbl_*() functionality needs to be
34                  * pulled inside the Falcon/Siena queue create/destroy code,
35                  * and then the original functions can be removed (see bug30834
36                  * comment #1).  But, for now, we just ensure that they are
37                  * no-ops for EF10, to allow bringing up existing drivers
38                  * without modification.
39                  */
40
41                 return (0);
42         }
43 #endif  /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
44
45         if (stop >= EFX_BUF_TBL_SIZE) {
46                 rc = EFBIG;
47                 goto fail1;
48         }
49
50         /* Add the entries into the buffer table */
51         addr = EFSYS_MEM_ADDR(esmp);
52         for (id = start; id != stop; id++) {
53                 EFX_POPULATE_QWORD_5(qword,
54                     FRF_AZ_IP_DAT_BUF_SIZE, 0, FRF_AZ_BUF_ADR_REGION, 0,
55                     FRF_AZ_BUF_ADR_FBUF_DW0,
56                     (uint32_t)((addr >> 12) & 0xffffffff),
57                     FRF_AZ_BUF_ADR_FBUF_DW1,
58                     (uint32_t)((addr >> 12) >> 32),
59                     FRF_AZ_BUF_OWNER_ID_FBUF, 0);
60
61                 EFX_BAR_TBL_WRITEQ(enp, FR_AZ_BUF_FULL_TBL,
62                                     id, &qword);
63
64                 addr += EFX_BUF_SIZE;
65         }
66
67         EFSYS_PROBE2(buf, uint32_t, start, uint32_t, stop - 1);
68
69         /* Flush the write buffer */
70         EFX_POPULATE_OWORD_2(oword, FRF_AZ_BUF_UPD_CMD, 1,
71             FRF_AZ_BUF_CLR_CMD, 0);
72         EFX_BAR_WRITEO(enp, FR_AZ_BUF_TBL_UPD_REG, &oword);
73
74         /* Poll for the last entry being written to the buffer table */
75         EFSYS_ASSERT3U(id, ==, stop);
76         addr -= EFX_BUF_SIZE;
77
78         count = 0;
79         do {
80                 EFSYS_PROBE1(wait, unsigned int, count);
81
82                 /* Spin for 1 ms */
83                 EFSYS_SPIN(1000);
84
85                 EFX_BAR_TBL_READQ(enp, FR_AZ_BUF_FULL_TBL,
86                                     id - 1, &qword);
87
88                 if (EFX_QWORD_FIELD(qword, FRF_AZ_BUF_ADR_FBUF_DW0) ==
89                     (uint32_t)((addr >> 12) & 0xffffffff) &&
90                     EFX_QWORD_FIELD(qword, FRF_AZ_BUF_ADR_FBUF_DW1) ==
91                     (uint32_t)((addr >> 12) >> 32))
92                         goto verify;
93
94         } while (++count < 100);
95
96         rc = ETIMEDOUT;
97         goto fail2;
98
99 verify:
100         /* Verify the rest of the entries in the buffer table */
101         while (--id != start) {
102                 addr -= EFX_BUF_SIZE;
103
104                 /* Read the buffer table entry */
105                 EFX_BAR_TBL_READQ(enp, FR_AZ_BUF_FULL_TBL,
106                                     id - 1, &qword);
107
108                 if (EFX_QWORD_FIELD(qword, FRF_AZ_BUF_ADR_FBUF_DW0) !=
109                     (uint32_t)((addr >> 12) & 0xffffffff) ||
110                     EFX_QWORD_FIELD(qword, FRF_AZ_BUF_ADR_FBUF_DW1) !=
111                     (uint32_t)((addr >> 12) >> 32)) {
112                         rc = EFAULT;
113                         goto fail3;
114                 }
115         }
116
117         return (0);
118
119 fail3:
120         EFSYS_PROBE(fail3);
121
122         id = stop;
123
124 fail2:
125         EFSYS_PROBE(fail2);
126
127         EFX_POPULATE_OWORD_4(oword, FRF_AZ_BUF_UPD_CMD, 0,
128             FRF_AZ_BUF_CLR_CMD, 1, FRF_AZ_BUF_CLR_END_ID, id - 1,
129             FRF_AZ_BUF_CLR_START_ID, start);
130         EFX_BAR_WRITEO(enp, FR_AZ_BUF_TBL_UPD_REG, &oword);
131
132 fail1:
133         EFSYS_PROBE1(fail1, efx_rc_t, rc);
134
135         return (rc);
136 }
137
138                 void
139 efx_sram_buf_tbl_clear(
140         __in    efx_nic_t *enp,
141         __in    uint32_t id,
142         __in    size_t n)
143 {
144         efx_oword_t oword;
145         uint32_t start = id;
146         uint32_t stop = start + n;
147
148         EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
149         EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NIC);
150
151 #if EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2
152         if (enp->en_family == EFX_FAMILY_HUNTINGTON ||
153             enp->en_family == EFX_FAMILY_MEDFORD ||
154             enp->en_family == EFX_FAMILY_MEDFORD2) {
155                 /*
156                  * FIXME: the efx_sram_buf_tbl_*() functionality needs to be
157                  * pulled inside the Falcon/Siena queue create/destroy code,
158                  * and then the original functions can be removed (see bug30834
159                  * comment #1).  But, for now, we just ensure that they are
160                  * no-ops for EF10, to allow bringing up existing drivers
161                  * without modification.
162                  */
163
164                 return;
165         }
166 #endif  /* EFSYS_OPT_HUNTINGTON || EFSYS_OPT_MEDFORD || EFSYS_OPT_MEDFORD2 */
167
168         EFSYS_ASSERT3U(stop, <, EFX_BUF_TBL_SIZE);
169
170         EFSYS_PROBE2(buf, uint32_t, start, uint32_t, stop - 1);
171
172         EFX_POPULATE_OWORD_4(oword, FRF_AZ_BUF_UPD_CMD, 0,
173             FRF_AZ_BUF_CLR_CMD, 1, FRF_AZ_BUF_CLR_END_ID, stop - 1,
174             FRF_AZ_BUF_CLR_START_ID, start);
175         EFX_BAR_WRITEO(enp, FR_AZ_BUF_TBL_UPD_REG, &oword);
176 }
177
178
179 #if EFSYS_OPT_DIAG
180
181 static                  void
182 efx_sram_byte_increment_set(
183         __in            size_t row,
184         __in            boolean_t negate,
185         __out           efx_qword_t *eqp)
186 {
187         size_t offset = row * FR_AZ_SRM_DBG_REG_STEP;
188         unsigned int index;
189
190         _NOTE(ARGUNUSED(negate))
191
192         for (index = 0; index < sizeof (efx_qword_t); index++)
193                 eqp->eq_u8[index] = offset + index;
194 }
195
196 static                  void
197 efx_sram_all_the_same_set(
198         __in            size_t row,
199         __in            boolean_t negate,
200         __out           efx_qword_t *eqp)
201 {
202         _NOTE(ARGUNUSED(row))
203
204         if (negate)
205                 EFX_SET_QWORD(*eqp);
206         else
207                 EFX_ZERO_QWORD(*eqp);
208 }
209
210 static                  void
211 efx_sram_bit_alternate_set(
212         __in            size_t row,
213         __in            boolean_t negate,
214         __out           efx_qword_t *eqp)
215 {
216         _NOTE(ARGUNUSED(row))
217
218         EFX_POPULATE_QWORD_2(*eqp,
219             EFX_DWORD_0, (negate) ? 0x55555555 : 0xaaaaaaaa,
220             EFX_DWORD_1, (negate) ? 0x55555555 : 0xaaaaaaaa);
221 }
222
223 static                  void
224 efx_sram_byte_alternate_set(
225         __in            size_t row,
226         __in            boolean_t negate,
227         __out           efx_qword_t *eqp)
228 {
229         _NOTE(ARGUNUSED(row))
230
231         EFX_POPULATE_QWORD_2(*eqp,
232             EFX_DWORD_0, (negate) ? 0x00ff00ff : 0xff00ff00,
233             EFX_DWORD_1, (negate) ? 0x00ff00ff : 0xff00ff00);
234 }
235
236 static                  void
237 efx_sram_byte_changing_set(
238         __in            size_t row,
239         __in            boolean_t negate,
240         __out           efx_qword_t *eqp)
241 {
242         size_t offset = row * FR_AZ_SRM_DBG_REG_STEP;
243         unsigned int index;
244
245         for (index = 0; index < sizeof (efx_qword_t); index++) {
246                 uint8_t byte;
247
248                 if (offset / 256 == 0)
249                         byte = (uint8_t)((offset % 257) % 256);
250                 else
251                         byte = (uint8_t)(~((offset - 8) % 257) % 256);
252
253                 eqp->eq_u8[index] = (negate) ? ~byte : byte;
254         }
255 }
256
257 static                  void
258 efx_sram_bit_sweep_set(
259         __in            size_t row,
260         __in            boolean_t negate,
261         __out           efx_qword_t *eqp)
262 {
263         size_t offset = row * FR_AZ_SRM_DBG_REG_STEP;
264
265         if (negate) {
266                 EFX_SET_QWORD(*eqp);
267                 EFX_CLEAR_QWORD_BIT(*eqp, (offset / sizeof (efx_qword_t)) % 64);
268         } else {
269                 EFX_ZERO_QWORD(*eqp);
270                 EFX_SET_QWORD_BIT(*eqp, (offset / sizeof (efx_qword_t)) % 64);
271         }
272 }
273
274 efx_sram_pattern_fn_t   __efx_sram_pattern_fns[] = {
275         efx_sram_byte_increment_set,
276         efx_sram_all_the_same_set,
277         efx_sram_bit_alternate_set,
278         efx_sram_byte_alternate_set,
279         efx_sram_byte_changing_set,
280         efx_sram_bit_sweep_set
281 };
282
283         __checkReturn   efx_rc_t
284 efx_sram_test(
285         __in            efx_nic_t *enp,
286         __in            efx_pattern_type_t type)
287 {
288         efx_sram_pattern_fn_t func;
289
290         EFSYS_ASSERT3U(enp->en_magic, ==, EFX_NIC_MAGIC);
291
292         EFSYS_ASSERT3U(enp->en_mod_flags, &, EFX_MOD_NIC);
293
294         EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_RX));
295         EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_TX));
296         EFSYS_ASSERT(!(enp->en_mod_flags & EFX_MOD_EV));
297
298         /* SRAM testing is only available on Siena. */
299         if (enp->en_family != EFX_FAMILY_SIENA)
300                 return (0);
301
302         /* Select pattern generator */
303         EFSYS_ASSERT3U(type, <, EFX_PATTERN_NTYPES);
304         func = __efx_sram_pattern_fns[type];
305
306         return (siena_sram_test(enp, func));
307 }
308
309 #endif  /* EFSYS_OPT_DIAG */