drivers/net/sfc/base/siena_nvram.c

   1 /*
   2  * Copyright (c) 2009-2016 Solarflare Communications Inc.
   3  * All rights reserved.
   4  *
   5  * Redistribution and use in source and binary forms, with or without
   6  * modification, are permitted provided that the following conditions are met:
   7  *
   8  * 1. Redistributions of source code must retain the above copyright notice,
   9  *    this list of conditions and the following disclaimer.
  10  * 2. Redistributions in binary form must reproduce the above copyright notice,
  11  *    this list of conditions and the following disclaimer in the documentation
  12  *    and/or other materials provided with the distribution.
  13  *
  14  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  15  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
  16  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  17  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
  18  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
  19  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  20  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
  21  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
  22  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
  23  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
  24  * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  25  *
  26  * The views and conclusions contained in the software and documentation are
  27  * those of the authors and should not be interpreted as representing official
  28  * policies, either expressed or implied, of the FreeBSD Project.
  29  */
  30
  31 #include "efx.h"
  32 #include "efx_impl.h"
  33
  34 #if EFSYS_OPT_SIENA
  35
  36 #if EFSYS_OPT_VPD || EFSYS_OPT_NVRAM
  37
  38         __checkReturn           efx_rc_t
  39 siena_nvram_partn_size(
  40         __in                    efx_nic_t *enp,
  41         __in                    uint32_t partn,
  42         __out                   size_t *sizep)
  43 {
  44         efx_rc_t rc;
  45
  46         if ((1 << partn) & ~enp->en_u.siena.enu_partn_mask) {
  47                 rc = ENOTSUP;
  48                 goto fail1;
  49         }
  50
  51         if ((rc = efx_mcdi_nvram_info(enp, partn, sizep,
  52             NULL, NULL, NULL)) != 0) {
  53                 goto fail2;
  54         }
  55
  56         return (0);
  57
  58 fail2:
  59         EFSYS_PROBE(fail2);
  60 fail1:
  61         EFSYS_PROBE1(fail1, efx_rc_t, rc);
  62
  63         return (rc);
  64 }
  65
  66         __checkReturn           efx_rc_t
  67 siena_nvram_partn_lock(
  68         __in                    efx_nic_t *enp,
  69         __in                    uint32_t partn)
  70 {
  71         efx_rc_t rc;
  72
  73         if ((rc = efx_mcdi_nvram_update_start(enp, partn)) != 0) {
  74                 goto fail1;
  75         }
  76
  77         return (0);
  78
  79 fail1:
  80         EFSYS_PROBE1(fail1, efx_rc_t, rc);
  81
  82         return (rc);
  83 }
  84
  85         __checkReturn           efx_rc_t
  86 siena_nvram_partn_read(
  87         __in                    efx_nic_t *enp,
  88         __in                    uint32_t partn,
  89         __in                    unsigned int offset,
  90         __out_bcount(size)      caddr_t data,
  91         __in                    size_t size)
  92 {
  93         size_t chunk;
  94         efx_rc_t rc;
  95
  96         while (size > 0) {
  97                 chunk = MIN(size, SIENA_NVRAM_CHUNK);
  98
  99                 if ((rc = efx_mcdi_nvram_read(enp, partn, offset, data, chunk,
 100                             MC_CMD_NVRAM_READ_IN_V2_DEFAULT)) != 0) {
 101                         goto fail1;
 102                 }
 103
 104                 size -= chunk;
 105                 data += chunk;
 106                 offset += chunk;
 107         }
 108
 109         return (0);
 110
 111 fail1:
 112         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 113
 114         return (rc);
 115 }
 116
 117         __checkReturn           efx_rc_t
 118 siena_nvram_partn_erase(
 119         __in                    efx_nic_t *enp,
 120         __in                    uint32_t partn,
 121         __in                    unsigned int offset,
 122         __in                    size_t size)
 123 {
 124         efx_rc_t rc;
 125
 126         if ((rc = efx_mcdi_nvram_erase(enp, partn, offset, size)) != 0) {
 127                 goto fail1;
 128         }
 129
 130         return (0);
 131
 132 fail1:
 133         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 134
 135         return (rc);
 136 }
 137
 138         __checkReturn           efx_rc_t
 139 siena_nvram_partn_write(
 140         __in                    efx_nic_t *enp,
 141         __in                    uint32_t partn,
 142         __in                    unsigned int offset,
 143         __out_bcount(size)      caddr_t data,
 144         __in                    size_t size)
 145 {
 146         size_t chunk;
 147         efx_rc_t rc;
 148
 149         while (size > 0) {
 150                 chunk = MIN(size, SIENA_NVRAM_CHUNK);
 151
 152                 if ((rc = efx_mcdi_nvram_write(enp, partn, offset,
 153                             data, chunk)) != 0) {
 154                         goto fail1;
 155                 }
 156
 157                 size -= chunk;
 158                 data += chunk;
 159                 offset += chunk;
 160         }
 161
 162         return (0);
 163
 164 fail1:
 165         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 166
 167         return (rc);
 168 }
 169
 170         __checkReturn           efx_rc_t
 171 siena_nvram_partn_unlock(
 172         __in                    efx_nic_t *enp,
 173         __in                    uint32_t partn)
 174 {
 175         boolean_t reboot;
 176         efx_rc_t rc;
 177
 178         /*
 179          * Reboot into the new image only for PHYs. The driver has to
 180          * explicitly cope with an MC reboot after a firmware update.
 181          */
 182         reboot = (partn == MC_CMD_NVRAM_TYPE_PHY_PORT0 ||
 183                     partn == MC_CMD_NVRAM_TYPE_PHY_PORT1 ||
 184                     partn == MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO);
 185
 186         rc = efx_mcdi_nvram_update_finish(enp, partn, reboot, NULL);
 187         if (rc != 0)
 188                 goto fail1;
 189
 190         return (0);
 191
 192 fail1:
 193         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 194
 195         return (rc);
 196 }
 197
 198 #endif  /* EFSYS_OPT_VPD || EFSYS_OPT_NVRAM */
 199
 200 #if EFSYS_OPT_NVRAM
 201
 202 typedef struct siena_parttbl_entry_s {
 203         unsigned int            partn;
 204         unsigned int            port;
 205         efx_nvram_type_t        nvtype;
 206 } siena_parttbl_entry_t;
 207
 208 static siena_parttbl_entry_t siena_parttbl[] = {
 209         {MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO,   1, EFX_NVRAM_NULLPHY},
 210         {MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO,   2, EFX_NVRAM_NULLPHY},
 211         {MC_CMD_NVRAM_TYPE_MC_FW,               1, EFX_NVRAM_MC_FIRMWARE},
 212         {MC_CMD_NVRAM_TYPE_MC_FW,               2, EFX_NVRAM_MC_FIRMWARE},
 213         {MC_CMD_NVRAM_TYPE_MC_FW_BACKUP,        1, EFX_NVRAM_MC_GOLDEN},
 214         {MC_CMD_NVRAM_TYPE_MC_FW_BACKUP,        2, EFX_NVRAM_MC_GOLDEN},
 215         {MC_CMD_NVRAM_TYPE_EXP_ROM,             1, EFX_NVRAM_BOOTROM},
 216         {MC_CMD_NVRAM_TYPE_EXP_ROM,             2, EFX_NVRAM_BOOTROM},
 217         {MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT0,   1, EFX_NVRAM_BOOTROM_CFG},
 218         {MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT1,   2, EFX_NVRAM_BOOTROM_CFG},
 219         {MC_CMD_NVRAM_TYPE_PHY_PORT0,           1, EFX_NVRAM_PHY},
 220         {MC_CMD_NVRAM_TYPE_PHY_PORT1,           2, EFX_NVRAM_PHY},
 221         {MC_CMD_NVRAM_TYPE_FPGA,                1, EFX_NVRAM_FPGA},
 222         {MC_CMD_NVRAM_TYPE_FPGA,                2, EFX_NVRAM_FPGA},
 223         {MC_CMD_NVRAM_TYPE_FPGA_BACKUP,         1, EFX_NVRAM_FPGA_BACKUP},
 224         {MC_CMD_NVRAM_TYPE_FPGA_BACKUP,         2, EFX_NVRAM_FPGA_BACKUP},
 225         {MC_CMD_NVRAM_TYPE_FC_FW,               1, EFX_NVRAM_FCFW},
 226         {MC_CMD_NVRAM_TYPE_FC_FW,               2, EFX_NVRAM_FCFW},
 227         {MC_CMD_NVRAM_TYPE_CPLD,                1, EFX_NVRAM_CPLD},
 228         {MC_CMD_NVRAM_TYPE_CPLD,                2, EFX_NVRAM_CPLD},
 229         {MC_CMD_NVRAM_TYPE_LICENSE,             1, EFX_NVRAM_LICENSE},
 230         {MC_CMD_NVRAM_TYPE_LICENSE,             2, EFX_NVRAM_LICENSE}
 231 };
 232
 233         __checkReturn           efx_rc_t
 234 siena_nvram_type_to_partn(
 235         __in                    efx_nic_t *enp,
 236         __in                    efx_nvram_type_t type,
 237         __out                   uint32_t *partnp)
 238 {
 239         efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
 240         unsigned int i;
 241
 242         EFSYS_ASSERT3U(type, <, EFX_NVRAM_NTYPES);
 243         EFSYS_ASSERT(partnp != NULL);
 244
 245         for (i = 0; i < EFX_ARRAY_SIZE(siena_parttbl); i++) {
 246                 siena_parttbl_entry_t *entry = &siena_parttbl[i];
 247
 248                 if (entry->port == emip->emi_port && entry->nvtype == type) {
 249                         *partnp = entry->partn;
 250                         return (0);
 251                 }
 252         }
 253
 254         return (ENOTSUP);
 255 }
 256
 257
 258 #if EFSYS_OPT_DIAG
 259
 260         __checkReturn           efx_rc_t
 261 siena_nvram_test(
 262         __in                    efx_nic_t *enp)
 263 {
 264         efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
 265         siena_parttbl_entry_t *entry;
 266         unsigned int i;
 267         efx_rc_t rc;
 268
 269         /*
 270          * Iterate over the list of supported partition types
 271          * applicable to *this* port
 272          */
 273         for (i = 0; i < EFX_ARRAY_SIZE(siena_parttbl); i++) {
 274                 entry = &siena_parttbl[i];
 275
 276                 if (entry->port != emip->emi_port ||
 277                     !(enp->en_u.siena.enu_partn_mask & (1 << entry->partn)))
 278                         continue;
 279
 280                 if ((rc = efx_mcdi_nvram_test(enp, entry->partn)) != 0) {
 281                         goto fail1;
 282                 }
 283         }
 284
 285         return (0);
 286
 287 fail1:
 288         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 289
 290         return (rc);
 291 }
 292
 293 #endif  /* EFSYS_OPT_DIAG */
 294
 295
 296 #define SIENA_DYNAMIC_CFG_SIZE(_nitems)                                 \
 297         (sizeof (siena_mc_dynamic_config_hdr_t) + ((_nitems) *          \
 298         sizeof (((siena_mc_dynamic_config_hdr_t *)NULL)->fw_version[0])))
 299
 300         __checkReturn           efx_rc_t
 301 siena_nvram_get_dynamic_cfg(
 302         __in                    efx_nic_t *enp,
 303         __in                    uint32_t partn,
 304         __in                    boolean_t vpd,
 305         __out                   siena_mc_dynamic_config_hdr_t **dcfgp,
 306         __out                   size_t *sizep)
 307 {
 308         siena_mc_dynamic_config_hdr_t *dcfg = NULL;
 309         size_t size;
 310         uint8_t cksum;
 311         unsigned int vpd_offset;
 312         unsigned int vpd_length;
 313         unsigned int hdr_length;
 314         unsigned int nversions;
 315         unsigned int pos;
 316         unsigned int region;
 317         efx_rc_t rc;
 318
 319         EFSYS_ASSERT(partn == MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0 ||
 320                     partn == MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1);
 321
 322         /*
 323          * Allocate sufficient memory for the entire dynamiccfg area, even
 324          * if we're not actually going to read in the VPD.
 325          */
 326         if ((rc = siena_nvram_partn_size(enp, partn, &size)) != 0)
 327                 goto fail1;
 328
 329         EFSYS_KMEM_ALLOC(enp->en_esip, size, dcfg);
 330         if (dcfg == NULL) {
 331                 rc = ENOMEM;
 332                 goto fail2;
 333         }
 334
 335         if ((rc = siena_nvram_partn_read(enp, partn, 0,
 336             (caddr_t)dcfg, SIENA_NVRAM_CHUNK)) != 0)
 337                 goto fail3;
 338
 339         /* Verify the magic */
 340         if (EFX_DWORD_FIELD(dcfg->magic, EFX_DWORD_0)
 341             != SIENA_MC_DYNAMIC_CONFIG_MAGIC)
 342                 goto invalid1;
 343
 344         /* All future versions of the structure must be backwards compatible */
 345         EFX_STATIC_ASSERT(SIENA_MC_DYNAMIC_CONFIG_VERSION == 0);
 346
 347         hdr_length = EFX_WORD_FIELD(dcfg->length, EFX_WORD_0);
 348         nversions = EFX_DWORD_FIELD(dcfg->num_fw_version_items, EFX_DWORD_0);
 349         vpd_offset = EFX_DWORD_FIELD(dcfg->dynamic_vpd_offset, EFX_DWORD_0);
 350         vpd_length = EFX_DWORD_FIELD(dcfg->dynamic_vpd_length, EFX_DWORD_0);
 351
 352         /* Verify the hdr doesn't overflow the partn size */
 353         if (hdr_length > size || vpd_offset > size || vpd_length > size ||
 354             vpd_length + vpd_offset > size)
 355                 goto invalid2;
 356
 357         /* Verify the header has room for all it's versions */
 358         if (hdr_length < SIENA_DYNAMIC_CFG_SIZE(0) ||
 359             hdr_length < SIENA_DYNAMIC_CFG_SIZE(nversions))
 360                 goto invalid3;
 361
 362         /*
 363          * Read the remaining portion of the dcfg, either including
 364          * the whole of VPD (there is no vpd length in this structure,
 365          * so we have to parse each tag), or just the dcfg header itself
 366          */
 367         region = vpd ? vpd_offset + vpd_length : hdr_length;
 368         if (region > SIENA_NVRAM_CHUNK) {
 369                 if ((rc = siena_nvram_partn_read(enp, partn, SIENA_NVRAM_CHUNK,
 370                     (caddr_t)dcfg + SIENA_NVRAM_CHUNK,
 371                     region - SIENA_NVRAM_CHUNK)) != 0)
 372                         goto fail4;
 373         }
 374
 375         /* Verify checksum */
 376         cksum = 0;
 377         for (pos = 0; pos < hdr_length; pos++)
 378                 cksum += ((uint8_t *)dcfg)[pos];
 379         if (cksum != 0)
 380                 goto invalid4;
 381
 382         goto done;
 383
 384 invalid4:
 385         EFSYS_PROBE(invalid4);
 386 invalid3:
 387         EFSYS_PROBE(invalid3);
 388 invalid2:
 389         EFSYS_PROBE(invalid2);
 390 invalid1:
 391         EFSYS_PROBE(invalid1);
 392
 393         /*
 394          * Construct a new "null" dcfg, with an empty version vector,
 395          * and an empty VPD chunk trailing. This has the neat side effect
 396          * of testing the exception paths in the write path.
 397          */
 398         EFX_POPULATE_DWORD_1(dcfg->magic,
 399                             EFX_DWORD_0, SIENA_MC_DYNAMIC_CONFIG_MAGIC);
 400         EFX_POPULATE_WORD_1(dcfg->length, EFX_WORD_0, sizeof (*dcfg));
 401         EFX_POPULATE_BYTE_1(dcfg->version, EFX_BYTE_0,
 402                             SIENA_MC_DYNAMIC_CONFIG_VERSION);
 403         EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_offset,
 404                             EFX_DWORD_0, sizeof (*dcfg));
 405         EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_length, EFX_DWORD_0, 0);
 406         EFX_POPULATE_DWORD_1(dcfg->num_fw_version_items, EFX_DWORD_0, 0);
 407
 408 done:
 409         *dcfgp = dcfg;
 410         *sizep = size;
 411
 412         return (0);
 413
 414 fail4:
 415         EFSYS_PROBE(fail4);
 416 fail3:
 417         EFSYS_PROBE(fail3);
 418
 419         EFSYS_KMEM_FREE(enp->en_esip, size, dcfg);
 420
 421 fail2:
 422         EFSYS_PROBE(fail2);
 423 fail1:
 424         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 425
 426         return (rc);
 427 }
 428
 429         __checkReturn           efx_rc_t
 430 siena_nvram_get_subtype(
 431         __in                    efx_nic_t *enp,
 432         __in                    uint32_t partn,
 433         __out                   uint32_t *subtypep)
 434 {
 435         efx_mcdi_req_t req;
 436         EFX_MCDI_DECLARE_BUF(payload, MC_CMD_GET_BOARD_CFG_IN_LEN,
 437                 MC_CMD_GET_BOARD_CFG_OUT_LENMAX);
 438         efx_word_t *fw_list;
 439         efx_rc_t rc;
 440
 441         req.emr_cmd = MC_CMD_GET_BOARD_CFG;
 442         req.emr_in_buf = payload;
 443         req.emr_in_length = MC_CMD_GET_BOARD_CFG_IN_LEN;
 444         req.emr_out_buf = payload;
 445         req.emr_out_length = MC_CMD_GET_BOARD_CFG_OUT_LENMAX;
 446
 447         efx_mcdi_execute(enp, &req);
 448
 449         if (req.emr_rc != 0) {
 450                 rc = req.emr_rc;
 451                 goto fail1;
 452         }
 453
 454         if (req.emr_out_length_used < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) {
 455                 rc = EMSGSIZE;
 456                 goto fail2;
 457         }
 458
 459         if (req.emr_out_length_used <
 460             MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_OFST +
 461             (partn + 1) * sizeof (efx_word_t)) {
 462                 rc = ENOENT;
 463                 goto fail3;
 464         }
 465
 466         fw_list = MCDI_OUT2(req, efx_word_t,
 467                             GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST);
 468         *subtypep = EFX_WORD_FIELD(fw_list[partn], EFX_WORD_0);
 469
 470         return (0);
 471
 472 fail3:
 473         EFSYS_PROBE(fail3);
 474 fail2:
 475         EFSYS_PROBE(fail2);
 476 fail1:
 477         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 478
 479         return (rc);
 480 }
 481
 482         __checkReturn           efx_rc_t
 483 siena_nvram_partn_get_version(
 484         __in                    efx_nic_t *enp,
 485         __in                    uint32_t partn,
 486         __out                   uint32_t *subtypep,
 487         __out_ecount(4)         uint16_t version[4])
 488 {
 489         siena_mc_dynamic_config_hdr_t *dcfg;
 490         siena_parttbl_entry_t *entry;
 491         uint32_t dcfg_partn;
 492         unsigned int i;
 493         efx_rc_t rc;
 494
 495         if ((1 << partn) & ~enp->en_u.siena.enu_partn_mask) {
 496                 rc = ENOTSUP;
 497                 goto fail1;
 498         }
 499
 500         if ((rc = siena_nvram_get_subtype(enp, partn, subtypep)) != 0)
 501                 goto fail2;
 502
 503         /*
 504          * Some partitions are accessible from both ports (for instance BOOTROM)
 505          * Find the highest version reported by all dcfg structures on ports
 506          * that have access to this partition.
 507          */
 508         version[0] = version[1] = version[2] = version[3] = 0;
 509         for (i = 0; i < EFX_ARRAY_SIZE(siena_parttbl); i++) {
 510                 siena_mc_fw_version_t *verp;
 511                 unsigned int nitems;
 512                 uint16_t temp[4];
 513                 size_t length;
 514
 515                 entry = &siena_parttbl[i];
 516                 if (entry->partn != partn)
 517                         continue;
 518
 519                 dcfg_partn = (entry->port == 1)
 520                         ? MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0
 521                         : MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1;
 522                 /*
 523                  * Ingore missing partitions on port 2, assuming they're due
 524                  * to to running on a single port part.
 525                  */
 526                 if ((1 << dcfg_partn) &  ~enp->en_u.siena.enu_partn_mask) {
 527                         if (entry->port == 2)
 528                                 continue;
 529                 }
 530
 531                 if ((rc = siena_nvram_get_dynamic_cfg(enp, dcfg_partn,
 532                     B_FALSE, &dcfg, &length)) != 0)
 533                         goto fail3;
 534
 535                 nitems = EFX_DWORD_FIELD(dcfg->num_fw_version_items,
 536                             EFX_DWORD_0);
 537                 if (nitems < entry->partn)
 538                         goto done;
 539
 540                 verp = &dcfg->fw_version[partn];
 541                 temp[0] = EFX_WORD_FIELD(verp->version_w, EFX_WORD_0);
 542                 temp[1] = EFX_WORD_FIELD(verp->version_x, EFX_WORD_0);
 543                 temp[2] = EFX_WORD_FIELD(verp->version_y, EFX_WORD_0);
 544                 temp[3] = EFX_WORD_FIELD(verp->version_z, EFX_WORD_0);
 545                 if (memcmp(version, temp, sizeof (temp)) < 0)
 546                         memcpy(version, temp, sizeof (temp));
 547
 548 done:
 549                 EFSYS_KMEM_FREE(enp->en_esip, length, dcfg);
 550         }
 551
 552         return (0);
 553
 554 fail3:
 555         EFSYS_PROBE(fail3);
 556 fail2:
 557         EFSYS_PROBE(fail2);
 558 fail1:
 559         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 560
 561         return (rc);
 562 }
 563
 564         __checkReturn           efx_rc_t
 565 siena_nvram_partn_rw_start(
 566         __in                    efx_nic_t *enp,
 567         __in                    uint32_t partn,
 568         __out                   size_t *chunk_sizep)
 569 {
 570         efx_rc_t rc;
 571
 572         if ((rc = siena_nvram_partn_lock(enp, partn)) != 0)
 573                 goto fail1;
 574
 575         if (chunk_sizep != NULL)
 576                 *chunk_sizep = SIENA_NVRAM_CHUNK;
 577
 578         return (0);
 579
 580 fail1:
 581         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 582
 583         return (rc);
 584 }
 585
 586         __checkReturn           efx_rc_t
 587 siena_nvram_partn_rw_finish(
 588         __in                    efx_nic_t *enp,
 589         __in                    uint32_t partn)
 590 {
 591         efx_rc_t rc;
 592
 593         if ((rc = siena_nvram_partn_unlock(enp, partn)) != 0)
 594                 goto fail1;
 595
 596         return (0);
 597
 598 fail1:
 599         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 600
 601         return (rc);
 602 }
 603
 604         __checkReturn           efx_rc_t
 605 siena_nvram_partn_set_version(
 606         __in                    efx_nic_t *enp,
 607         __in                    uint32_t partn,
 608         __in_ecount(4)          uint16_t version[4])
 609 {
 610         efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
 611         siena_mc_dynamic_config_hdr_t *dcfg = NULL;
 612         siena_mc_fw_version_t *fwverp;
 613         uint32_t dcfg_partn;
 614         size_t dcfg_size;
 615         unsigned int hdr_length;
 616         unsigned int vpd_length;
 617         unsigned int vpd_offset;
 618         unsigned int nitems;
 619         unsigned int required_hdr_length;
 620         unsigned int pos;
 621         uint8_t cksum;
 622         uint32_t subtype;
 623         size_t length;
 624         efx_rc_t rc;
 625
 626         dcfg_partn = (emip->emi_port == 1)
 627                 ? MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0
 628                 : MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1;
 629
 630         if ((rc = siena_nvram_partn_size(enp, dcfg_partn, &dcfg_size)) != 0)
 631                 goto fail1;
 632
 633         if ((rc = siena_nvram_partn_lock(enp, dcfg_partn)) != 0)
 634                 goto fail2;
 635
 636         if ((rc = siena_nvram_get_dynamic_cfg(enp, dcfg_partn,
 637             B_TRUE, &dcfg, &length)) != 0)
 638                 goto fail3;
 639
 640         hdr_length = EFX_WORD_FIELD(dcfg->length, EFX_WORD_0);
 641         nitems = EFX_DWORD_FIELD(dcfg->num_fw_version_items, EFX_DWORD_0);
 642         vpd_length = EFX_DWORD_FIELD(dcfg->dynamic_vpd_length, EFX_DWORD_0);
 643         vpd_offset = EFX_DWORD_FIELD(dcfg->dynamic_vpd_offset, EFX_DWORD_0);
 644
 645         /*
 646          * NOTE: This function will blatt any fields trailing the version
 647          * vector, or the VPD chunk.
 648          */
 649         required_hdr_length = SIENA_DYNAMIC_CFG_SIZE(partn + 1);
 650         if (required_hdr_length + vpd_length > length) {
 651                 rc = ENOSPC;
 652                 goto fail4;
 653         }
 654
 655         if (vpd_offset < required_hdr_length) {
 656                 (void) memmove((caddr_t)dcfg + required_hdr_length,
 657                         (caddr_t)dcfg + vpd_offset, vpd_length);
 658                 vpd_offset = required_hdr_length;
 659                 EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_offset,
 660                                     EFX_DWORD_0, vpd_offset);
 661         }
 662
 663         if (hdr_length < required_hdr_length) {
 664                 (void) memset((caddr_t)dcfg + hdr_length, 0,
 665                         required_hdr_length - hdr_length);
 666                 hdr_length = required_hdr_length;
 667                 EFX_POPULATE_WORD_1(dcfg->length,
 668                                     EFX_WORD_0, hdr_length);
 669         }
 670
 671         /* Get the subtype to insert into the fw_subtype array */
 672         if ((rc = siena_nvram_get_subtype(enp, partn, &subtype)) != 0)
 673                 goto fail5;
 674
 675         /* Fill out the new version */
 676         fwverp = &dcfg->fw_version[partn];
 677         EFX_POPULATE_DWORD_1(fwverp->fw_subtype, EFX_DWORD_0, subtype);
 678         EFX_POPULATE_WORD_1(fwverp->version_w, EFX_WORD_0, version[0]);
 679         EFX_POPULATE_WORD_1(fwverp->version_x, EFX_WORD_0, version[1]);
 680         EFX_POPULATE_WORD_1(fwverp->version_y, EFX_WORD_0, version[2]);
 681         EFX_POPULATE_WORD_1(fwverp->version_z, EFX_WORD_0, version[3]);
 682
 683         /* Update the version count */
 684         if (nitems < partn + 1) {
 685                 nitems = partn + 1;
 686                 EFX_POPULATE_DWORD_1(dcfg->num_fw_version_items,
 687                                     EFX_DWORD_0, nitems);
 688         }
 689
 690         /* Update the checksum */
 691         cksum = 0;
 692         for (pos = 0; pos < hdr_length; pos++)
 693                 cksum += ((uint8_t *)dcfg)[pos];
 694         dcfg->csum.eb_u8[0] -= cksum;
 695
 696         /* Erase and write the new partition */
 697         if ((rc = siena_nvram_partn_erase(enp, dcfg_partn, 0, dcfg_size)) != 0)
 698                 goto fail6;
 699
 700         /* Write out the new structure to nvram */
 701         if ((rc = siena_nvram_partn_write(enp, dcfg_partn, 0,
 702             (caddr_t)dcfg, vpd_offset + vpd_length)) != 0)
 703                 goto fail7;
 704
 705         EFSYS_KMEM_FREE(enp->en_esip, length, dcfg);
 706
 707         siena_nvram_partn_unlock(enp, dcfg_partn);
 708
 709         return (0);
 710
 711 fail7:
 712         EFSYS_PROBE(fail7);
 713 fail6:
 714         EFSYS_PROBE(fail6);
 715 fail5:
 716         EFSYS_PROBE(fail5);
 717 fail4:
 718         EFSYS_PROBE(fail4);
 719
 720         EFSYS_KMEM_FREE(enp->en_esip, length, dcfg);
 721 fail3:
 722         EFSYS_PROBE(fail3);
 723 fail2:
 724         EFSYS_PROBE(fail2);
 725 fail1:
 726         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 727
 728         return (rc);
 729 }
 730
 731 #endif  /* EFSYS_OPT_NVRAM */
 732
 733 #endif  /* EFSYS_OPT_SIENA */