drivers/net/sfc/base/siena_nvram.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  *
   3  * Copyright (c) 2009-2018 Solarflare Communications Inc.
   4  * All rights reserved.
   5  */
   6
   7 #include "efx.h"
   8 #include "efx_impl.h"
   9
  10 #if EFSYS_OPT_SIENA
  11
  12 #if EFSYS_OPT_VPD || EFSYS_OPT_NVRAM
  13
  14         __checkReturn           efx_rc_t
  15 siena_nvram_partn_size(
  16         __in                    efx_nic_t *enp,
  17         __in                    uint32_t partn,
  18         __out                   size_t *sizep)
  19 {
  20         efx_rc_t rc;
  21
  22         if ((1 << partn) & ~enp->en_u.siena.enu_partn_mask) {
  23                 rc = ENOTSUP;
  24                 goto fail1;
  25         }
  26
  27         if ((rc = efx_mcdi_nvram_info(enp, partn, sizep,
  28             NULL, NULL, NULL)) != 0) {
  29                 goto fail2;
  30         }
  31
  32         return (0);
  33
  34 fail2:
  35         EFSYS_PROBE(fail2);
  36 fail1:
  37         EFSYS_PROBE1(fail1, efx_rc_t, rc);
  38
  39         return (rc);
  40 }
  41
  42         __checkReturn           efx_rc_t
  43 siena_nvram_partn_lock(
  44         __in                    efx_nic_t *enp,
  45         __in                    uint32_t partn)
  46 {
  47         efx_rc_t rc;
  48
  49         if ((rc = efx_mcdi_nvram_update_start(enp, partn)) != 0) {
  50                 goto fail1;
  51         }
  52
  53         return (0);
  54
  55 fail1:
  56         EFSYS_PROBE1(fail1, efx_rc_t, rc);
  57
  58         return (rc);
  59 }
  60
  61         __checkReturn           efx_rc_t
  62 siena_nvram_partn_read(
  63         __in                    efx_nic_t *enp,
  64         __in                    uint32_t partn,
  65         __in                    unsigned int offset,
  66         __out_bcount(size)      caddr_t data,
  67         __in                    size_t size)
  68 {
  69         size_t chunk;
  70         efx_rc_t rc;
  71
  72         while (size > 0) {
  73                 chunk = MIN(size, SIENA_NVRAM_CHUNK);
  74
  75                 if ((rc = efx_mcdi_nvram_read(enp, partn, offset, data, chunk,
  76                             MC_CMD_NVRAM_READ_IN_V2_DEFAULT)) != 0) {
  77                         goto fail1;
  78                 }
  79
  80                 size -= chunk;
  81                 data += chunk;
  82                 offset += chunk;
  83         }
  84
  85         return (0);
  86
  87 fail1:
  88         EFSYS_PROBE1(fail1, efx_rc_t, rc);
  89
  90         return (rc);
  91 }
  92
  93         __checkReturn           efx_rc_t
  94 siena_nvram_partn_erase(
  95         __in                    efx_nic_t *enp,
  96         __in                    uint32_t partn,
  97         __in                    unsigned int offset,
  98         __in                    size_t size)
  99 {
 100         efx_rc_t rc;
 101
 102         if ((rc = efx_mcdi_nvram_erase(enp, partn, offset, size)) != 0) {
 103                 goto fail1;
 104         }
 105
 106         return (0);
 107
 108 fail1:
 109         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 110
 111         return (rc);
 112 }
 113
 114         __checkReturn           efx_rc_t
 115 siena_nvram_partn_write(
 116         __in                    efx_nic_t *enp,
 117         __in                    uint32_t partn,
 118         __in                    unsigned int offset,
 119         __out_bcount(size)      caddr_t data,
 120         __in                    size_t size)
 121 {
 122         size_t chunk;
 123         efx_rc_t rc;
 124
 125         while (size > 0) {
 126                 chunk = MIN(size, SIENA_NVRAM_CHUNK);
 127
 128                 if ((rc = efx_mcdi_nvram_write(enp, partn, offset,
 129                             data, chunk)) != 0) {
 130                         goto fail1;
 131                 }
 132
 133                 size -= chunk;
 134                 data += chunk;
 135                 offset += chunk;
 136         }
 137
 138         return (0);
 139
 140 fail1:
 141         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 142
 143         return (rc);
 144 }
 145
 146         __checkReturn           efx_rc_t
 147 siena_nvram_partn_unlock(
 148         __in                    efx_nic_t *enp,
 149         __in                    uint32_t partn,
 150         __out_opt               uint32_t *verify_resultp)
 151 {
 152         boolean_t reboot;
 153         efx_rc_t rc;
 154
 155         /*
 156          * Reboot into the new image only for PHYs. The driver has to
 157          * explicitly cope with an MC reboot after a firmware update.
 158          */
 159         reboot = (partn == MC_CMD_NVRAM_TYPE_PHY_PORT0 ||
 160                     partn == MC_CMD_NVRAM_TYPE_PHY_PORT1 ||
 161                     partn == MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO);
 162
 163         rc = efx_mcdi_nvram_update_finish(enp, partn, reboot, verify_resultp);
 164         if (rc != 0)
 165                 goto fail1;
 166
 167         return (0);
 168
 169 fail1:
 170         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 171
 172         return (rc);
 173 }
 174
 175 #endif  /* EFSYS_OPT_VPD || EFSYS_OPT_NVRAM */
 176
 177 #if EFSYS_OPT_NVRAM
 178
 179 typedef struct siena_parttbl_entry_s {
 180         unsigned int            partn;
 181         unsigned int            port;
 182         efx_nvram_type_t        nvtype;
 183 } siena_parttbl_entry_t;
 184
 185 static siena_parttbl_entry_t siena_parttbl[] = {
 186         {MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO,   1, EFX_NVRAM_NULLPHY},
 187         {MC_CMD_NVRAM_TYPE_DISABLED_CALLISTO,   2, EFX_NVRAM_NULLPHY},
 188         {MC_CMD_NVRAM_TYPE_MC_FW,               1, EFX_NVRAM_MC_FIRMWARE},
 189         {MC_CMD_NVRAM_TYPE_MC_FW,               2, EFX_NVRAM_MC_FIRMWARE},
 190         {MC_CMD_NVRAM_TYPE_MC_FW_BACKUP,        1, EFX_NVRAM_MC_GOLDEN},
 191         {MC_CMD_NVRAM_TYPE_MC_FW_BACKUP,        2, EFX_NVRAM_MC_GOLDEN},
 192         {MC_CMD_NVRAM_TYPE_EXP_ROM,             1, EFX_NVRAM_BOOTROM},
 193         {MC_CMD_NVRAM_TYPE_EXP_ROM,             2, EFX_NVRAM_BOOTROM},
 194         {MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT0,   1, EFX_NVRAM_BOOTROM_CFG},
 195         {MC_CMD_NVRAM_TYPE_EXP_ROM_CFG_PORT1,   2, EFX_NVRAM_BOOTROM_CFG},
 196         {MC_CMD_NVRAM_TYPE_PHY_PORT0,           1, EFX_NVRAM_PHY},
 197         {MC_CMD_NVRAM_TYPE_PHY_PORT1,           2, EFX_NVRAM_PHY},
 198         {MC_CMD_NVRAM_TYPE_FPGA,                1, EFX_NVRAM_FPGA},
 199         {MC_CMD_NVRAM_TYPE_FPGA,                2, EFX_NVRAM_FPGA},
 200         {MC_CMD_NVRAM_TYPE_FPGA_BACKUP,         1, EFX_NVRAM_FPGA_BACKUP},
 201         {MC_CMD_NVRAM_TYPE_FPGA_BACKUP,         2, EFX_NVRAM_FPGA_BACKUP},
 202         {MC_CMD_NVRAM_TYPE_FC_FW,               1, EFX_NVRAM_FCFW},
 203         {MC_CMD_NVRAM_TYPE_FC_FW,               2, EFX_NVRAM_FCFW},
 204         {MC_CMD_NVRAM_TYPE_CPLD,                1, EFX_NVRAM_CPLD},
 205         {MC_CMD_NVRAM_TYPE_CPLD,                2, EFX_NVRAM_CPLD},
 206         {MC_CMD_NVRAM_TYPE_LICENSE,             1, EFX_NVRAM_LICENSE},
 207         {MC_CMD_NVRAM_TYPE_LICENSE,             2, EFX_NVRAM_LICENSE}
 208 };
 209
 210         __checkReturn           efx_rc_t
 211 siena_nvram_type_to_partn(
 212         __in                    efx_nic_t *enp,
 213         __in                    efx_nvram_type_t type,
 214         __out                   uint32_t *partnp)
 215 {
 216         efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
 217         unsigned int i;
 218
 219         EFSYS_ASSERT3U(type, !=, EFX_NVRAM_INVALID);
 220         EFSYS_ASSERT3U(type, <, EFX_NVRAM_NTYPES);
 221         EFSYS_ASSERT(partnp != NULL);
 222
 223         for (i = 0; i < EFX_ARRAY_SIZE(siena_parttbl); i++) {
 224                 siena_parttbl_entry_t *entry = &siena_parttbl[i];
 225
 226                 if (entry->port == emip->emi_port && entry->nvtype == type) {
 227                         *partnp = entry->partn;
 228                         return (0);
 229                 }
 230         }
 231
 232         return (ENOTSUP);
 233 }
 234
 235
 236 #if EFSYS_OPT_DIAG
 237
 238         __checkReturn           efx_rc_t
 239 siena_nvram_test(
 240         __in                    efx_nic_t *enp)
 241 {
 242         efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
 243         siena_parttbl_entry_t *entry;
 244         unsigned int i;
 245         efx_rc_t rc;
 246
 247         /*
 248          * Iterate over the list of supported partition types
 249          * applicable to *this* port
 250          */
 251         for (i = 0; i < EFX_ARRAY_SIZE(siena_parttbl); i++) {
 252                 entry = &siena_parttbl[i];
 253
 254                 if (entry->port != emip->emi_port ||
 255                     !(enp->en_u.siena.enu_partn_mask & (1 << entry->partn)))
 256                         continue;
 257
 258                 if ((rc = efx_mcdi_nvram_test(enp, entry->partn)) != 0) {
 259                         goto fail1;
 260                 }
 261         }
 262
 263         return (0);
 264
 265 fail1:
 266         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 267
 268         return (rc);
 269 }
 270
 271 #endif  /* EFSYS_OPT_DIAG */
 272
 273
 274 #define SIENA_DYNAMIC_CFG_SIZE(_nitems)                                 \
 275         (sizeof (siena_mc_dynamic_config_hdr_t) + ((_nitems) *          \
 276         sizeof (((siena_mc_dynamic_config_hdr_t *)NULL)->fw_version[0])))
 277
 278         __checkReturn           efx_rc_t
 279 siena_nvram_get_dynamic_cfg(
 280         __in                    efx_nic_t *enp,
 281         __in                    uint32_t partn,
 282         __in                    boolean_t vpd,
 283         __out                   siena_mc_dynamic_config_hdr_t **dcfgp,
 284         __out                   size_t *sizep)
 285 {
 286         siena_mc_dynamic_config_hdr_t *dcfg = NULL;
 287         size_t size;
 288         uint8_t cksum;
 289         unsigned int vpd_offset;
 290         unsigned int vpd_length;
 291         unsigned int hdr_length;
 292         unsigned int nversions;
 293         unsigned int pos;
 294         unsigned int region;
 295         efx_rc_t rc;
 296
 297         EFSYS_ASSERT(partn == MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0 ||
 298                     partn == MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1);
 299
 300         /*
 301          * Allocate sufficient memory for the entire dynamiccfg area, even
 302          * if we're not actually going to read in the VPD.
 303          */
 304         if ((rc = siena_nvram_partn_size(enp, partn, &size)) != 0)
 305                 goto fail1;
 306
 307         if (size < SIENA_NVRAM_CHUNK) {
 308                 rc = EINVAL;
 309                 goto fail2;
 310         }
 311
 312         EFSYS_KMEM_ALLOC(enp->en_esip, size, dcfg);
 313         if (dcfg == NULL) {
 314                 rc = ENOMEM;
 315                 goto fail3;
 316         }
 317
 318         if ((rc = siena_nvram_partn_read(enp, partn, 0,
 319             (caddr_t)dcfg, SIENA_NVRAM_CHUNK)) != 0)
 320                 goto fail4;
 321
 322         /* Verify the magic */
 323         if (EFX_DWORD_FIELD(dcfg->magic, EFX_DWORD_0)
 324             != SIENA_MC_DYNAMIC_CONFIG_MAGIC)
 325                 goto invalid1;
 326
 327         /* All future versions of the structure must be backwards compatible */
 328         EFX_STATIC_ASSERT(SIENA_MC_DYNAMIC_CONFIG_VERSION == 0);
 329
 330         hdr_length = EFX_WORD_FIELD(dcfg->length, EFX_WORD_0);
 331         nversions = EFX_DWORD_FIELD(dcfg->num_fw_version_items, EFX_DWORD_0);
 332         vpd_offset = EFX_DWORD_FIELD(dcfg->dynamic_vpd_offset, EFX_DWORD_0);
 333         vpd_length = EFX_DWORD_FIELD(dcfg->dynamic_vpd_length, EFX_DWORD_0);
 334
 335         /* Verify the hdr doesn't overflow the partn size */
 336         if (hdr_length > size || vpd_offset > size || vpd_length > size ||
 337             vpd_length + vpd_offset > size)
 338                 goto invalid2;
 339
 340         /* Verify the header has room for all it's versions */
 341         if (hdr_length < SIENA_DYNAMIC_CFG_SIZE(0) ||
 342             hdr_length < SIENA_DYNAMIC_CFG_SIZE(nversions))
 343                 goto invalid3;
 344
 345         /*
 346          * Read the remaining portion of the dcfg, either including
 347          * the whole of VPD (there is no vpd length in this structure,
 348          * so we have to parse each tag), or just the dcfg header itself
 349          */
 350         region = vpd ? vpd_offset + vpd_length : hdr_length;
 351         if (region > SIENA_NVRAM_CHUNK) {
 352                 if ((rc = siena_nvram_partn_read(enp, partn, SIENA_NVRAM_CHUNK,
 353                     (caddr_t)dcfg + SIENA_NVRAM_CHUNK,
 354                     region - SIENA_NVRAM_CHUNK)) != 0)
 355                         goto fail5;
 356         }
 357
 358         /* Verify checksum */
 359         cksum = 0;
 360         for (pos = 0; pos < hdr_length; pos++)
 361                 cksum += ((uint8_t *)dcfg)[pos];
 362         if (cksum != 0)
 363                 goto invalid4;
 364
 365         goto done;
 366
 367 invalid4:
 368         EFSYS_PROBE(invalid4);
 369 invalid3:
 370         EFSYS_PROBE(invalid3);
 371 invalid2:
 372         EFSYS_PROBE(invalid2);
 373 invalid1:
 374         EFSYS_PROBE(invalid1);
 375
 376         /*
 377          * Construct a new "null" dcfg, with an empty version vector,
 378          * and an empty VPD chunk trailing. This has the neat side effect
 379          * of testing the exception paths in the write path.
 380          */
 381         EFX_POPULATE_DWORD_1(dcfg->magic,
 382                             EFX_DWORD_0, SIENA_MC_DYNAMIC_CONFIG_MAGIC);
 383         EFX_POPULATE_WORD_1(dcfg->length, EFX_WORD_0, sizeof (*dcfg));
 384         EFX_POPULATE_BYTE_1(dcfg->version, EFX_BYTE_0,
 385                             SIENA_MC_DYNAMIC_CONFIG_VERSION);
 386         EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_offset,
 387                             EFX_DWORD_0, sizeof (*dcfg));
 388         EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_length, EFX_DWORD_0, 0);
 389         EFX_POPULATE_DWORD_1(dcfg->num_fw_version_items, EFX_DWORD_0, 0);
 390
 391 done:
 392         *dcfgp = dcfg;
 393         *sizep = size;
 394
 395         return (0);
 396
 397 fail5:
 398         EFSYS_PROBE(fail5);
 399 fail4:
 400         EFSYS_PROBE(fail4);
 401
 402         EFSYS_KMEM_FREE(enp->en_esip, size, dcfg);
 403
 404 fail3:
 405         EFSYS_PROBE(fail3);
 406 fail2:
 407         EFSYS_PROBE(fail2);
 408 fail1:
 409         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 410
 411         return (rc);
 412 }
 413
 414         __checkReturn           efx_rc_t
 415 siena_nvram_get_subtype(
 416         __in                    efx_nic_t *enp,
 417         __in                    uint32_t partn,
 418         __out                   uint32_t *subtypep)
 419 {
 420         efx_mcdi_req_t req;
 421         uint8_t payload[MAX(MC_CMD_GET_BOARD_CFG_IN_LEN,
 422                             MC_CMD_GET_BOARD_CFG_OUT_LENMAX)];
 423         efx_word_t *fw_list;
 424         efx_rc_t rc;
 425
 426         (void) memset(payload, 0, sizeof (payload));
 427         req.emr_cmd = MC_CMD_GET_BOARD_CFG;
 428         req.emr_in_buf = payload;
 429         req.emr_in_length = MC_CMD_GET_BOARD_CFG_IN_LEN;
 430         req.emr_out_buf = payload;
 431         req.emr_out_length = MC_CMD_GET_BOARD_CFG_OUT_LENMAX;
 432
 433         efx_mcdi_execute(enp, &req);
 434
 435         if (req.emr_rc != 0) {
 436                 rc = req.emr_rc;
 437                 goto fail1;
 438         }
 439
 440         if (req.emr_out_length_used < MC_CMD_GET_BOARD_CFG_OUT_LENMIN) {
 441                 rc = EMSGSIZE;
 442                 goto fail2;
 443         }
 444
 445         if (req.emr_out_length_used <
 446             MC_CMD_GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST_OFST +
 447             (partn + 1) * sizeof (efx_word_t)) {
 448                 rc = ENOENT;
 449                 goto fail3;
 450         }
 451
 452         fw_list = MCDI_OUT2(req, efx_word_t,
 453                             GET_BOARD_CFG_OUT_FW_SUBTYPE_LIST);
 454         *subtypep = EFX_WORD_FIELD(fw_list[partn], EFX_WORD_0);
 455
 456         return (0);
 457
 458 fail3:
 459         EFSYS_PROBE(fail3);
 460 fail2:
 461         EFSYS_PROBE(fail2);
 462 fail1:
 463         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 464
 465         return (rc);
 466 }
 467
 468         __checkReturn           efx_rc_t
 469 siena_nvram_partn_get_version(
 470         __in                    efx_nic_t *enp,
 471         __in                    uint32_t partn,
 472         __out                   uint32_t *subtypep,
 473         __out_ecount(4)         uint16_t version[4])
 474 {
 475         siena_mc_dynamic_config_hdr_t *dcfg;
 476         siena_parttbl_entry_t *entry;
 477         uint32_t dcfg_partn;
 478         unsigned int i;
 479         efx_rc_t rc;
 480
 481         if ((1 << partn) & ~enp->en_u.siena.enu_partn_mask) {
 482                 rc = ENOTSUP;
 483                 goto fail1;
 484         }
 485
 486         if ((rc = siena_nvram_get_subtype(enp, partn, subtypep)) != 0)
 487                 goto fail2;
 488
 489         /*
 490          * Some partitions are accessible from both ports (for instance BOOTROM)
 491          * Find the highest version reported by all dcfg structures on ports
 492          * that have access to this partition.
 493          */
 494         version[0] = version[1] = version[2] = version[3] = 0;
 495         for (i = 0; i < EFX_ARRAY_SIZE(siena_parttbl); i++) {
 496                 siena_mc_fw_version_t *verp;
 497                 unsigned int nitems;
 498                 uint16_t temp[4];
 499                 size_t length;
 500
 501                 entry = &siena_parttbl[i];
 502                 if (entry->partn != partn)
 503                         continue;
 504
 505                 dcfg_partn = (entry->port == 1)
 506                         ? MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0
 507                         : MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1;
 508                 /*
 509                  * Ingore missing partitions on port 2, assuming they're due
 510                  * to to running on a single port part.
 511                  */
 512                 if ((1 << dcfg_partn) &  ~enp->en_u.siena.enu_partn_mask) {
 513                         if (entry->port == 2)
 514                                 continue;
 515                 }
 516
 517                 if ((rc = siena_nvram_get_dynamic_cfg(enp, dcfg_partn,
 518                     B_FALSE, &dcfg, &length)) != 0)
 519                         goto fail3;
 520
 521                 nitems = EFX_DWORD_FIELD(dcfg->num_fw_version_items,
 522                             EFX_DWORD_0);
 523                 if (nitems < entry->partn)
 524                         goto done;
 525
 526                 verp = &dcfg->fw_version[partn];
 527                 temp[0] = EFX_WORD_FIELD(verp->version_w, EFX_WORD_0);
 528                 temp[1] = EFX_WORD_FIELD(verp->version_x, EFX_WORD_0);
 529                 temp[2] = EFX_WORD_FIELD(verp->version_y, EFX_WORD_0);
 530                 temp[3] = EFX_WORD_FIELD(verp->version_z, EFX_WORD_0);
 531                 if (memcmp(version, temp, sizeof (temp)) < 0)
 532                         memcpy(version, temp, sizeof (temp));
 533
 534 done:
 535                 EFSYS_KMEM_FREE(enp->en_esip, length, dcfg);
 536         }
 537
 538         return (0);
 539
 540 fail3:
 541         EFSYS_PROBE(fail3);
 542 fail2:
 543         EFSYS_PROBE(fail2);
 544 fail1:
 545         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 546
 547         return (rc);
 548 }
 549
 550         __checkReturn           efx_rc_t
 551 siena_nvram_partn_rw_start(
 552         __in                    efx_nic_t *enp,
 553         __in                    uint32_t partn,
 554         __out                   size_t *chunk_sizep)
 555 {
 556         efx_rc_t rc;
 557
 558         if ((rc = siena_nvram_partn_lock(enp, partn)) != 0)
 559                 goto fail1;
 560
 561         if (chunk_sizep != NULL)
 562                 *chunk_sizep = SIENA_NVRAM_CHUNK;
 563
 564         return (0);
 565
 566 fail1:
 567         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 568
 569         return (rc);
 570 }
 571
 572         __checkReturn           efx_rc_t
 573 siena_nvram_partn_rw_finish(
 574         __in                    efx_nic_t *enp,
 575         __in                    uint32_t partn,
 576         __out_opt               uint32_t *verify_resultp)
 577 {
 578         efx_rc_t rc;
 579
 580         if ((rc = siena_nvram_partn_unlock(enp, partn, verify_resultp)) != 0)
 581                 goto fail1;
 582
 583         return (0);
 584
 585 fail1:
 586         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 587
 588         return (rc);
 589 }
 590
 591         __checkReturn           efx_rc_t
 592 siena_nvram_partn_set_version(
 593         __in                    efx_nic_t *enp,
 594         __in                    uint32_t partn,
 595         __in_ecount(4)          uint16_t version[4])
 596 {
 597         efx_mcdi_iface_t *emip = &(enp->en_mcdi.em_emip);
 598         siena_mc_dynamic_config_hdr_t *dcfg = NULL;
 599         siena_mc_fw_version_t *fwverp;
 600         uint32_t dcfg_partn;
 601         size_t dcfg_size;
 602         unsigned int hdr_length;
 603         unsigned int vpd_length;
 604         unsigned int vpd_offset;
 605         unsigned int nitems;
 606         unsigned int required_hdr_length;
 607         unsigned int pos;
 608         uint8_t cksum;
 609         uint32_t subtype;
 610         size_t length;
 611         efx_rc_t rc;
 612
 613         dcfg_partn = (emip->emi_port == 1)
 614                 ? MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT0
 615                 : MC_CMD_NVRAM_TYPE_DYNAMIC_CFG_PORT1;
 616
 617         if ((rc = siena_nvram_partn_size(enp, dcfg_partn, &dcfg_size)) != 0)
 618                 goto fail1;
 619
 620         if ((rc = siena_nvram_partn_lock(enp, dcfg_partn)) != 0)
 621                 goto fail2;
 622
 623         if ((rc = siena_nvram_get_dynamic_cfg(enp, dcfg_partn,
 624             B_TRUE, &dcfg, &length)) != 0)
 625                 goto fail3;
 626
 627         hdr_length = EFX_WORD_FIELD(dcfg->length, EFX_WORD_0);
 628         nitems = EFX_DWORD_FIELD(dcfg->num_fw_version_items, EFX_DWORD_0);
 629         vpd_length = EFX_DWORD_FIELD(dcfg->dynamic_vpd_length, EFX_DWORD_0);
 630         vpd_offset = EFX_DWORD_FIELD(dcfg->dynamic_vpd_offset, EFX_DWORD_0);
 631
 632         /*
 633          * NOTE: This function will blatt any fields trailing the version
 634          * vector, or the VPD chunk.
 635          */
 636         required_hdr_length = SIENA_DYNAMIC_CFG_SIZE(partn + 1);
 637         if (required_hdr_length + vpd_length > length) {
 638                 rc = ENOSPC;
 639                 goto fail4;
 640         }
 641
 642         if (vpd_offset < required_hdr_length) {
 643                 (void) memmove((caddr_t)dcfg + required_hdr_length,
 644                         (caddr_t)dcfg + vpd_offset, vpd_length);
 645                 vpd_offset = required_hdr_length;
 646                 EFX_POPULATE_DWORD_1(dcfg->dynamic_vpd_offset,
 647                                     EFX_DWORD_0, vpd_offset);
 648         }
 649
 650         if (hdr_length < required_hdr_length) {
 651                 (void) memset((caddr_t)dcfg + hdr_length, 0,
 652                         required_hdr_length - hdr_length);
 653                 hdr_length = required_hdr_length;
 654                 EFX_POPULATE_WORD_1(dcfg->length,
 655                                     EFX_WORD_0, hdr_length);
 656         }
 657
 658         /* Get the subtype to insert into the fw_subtype array */
 659         if ((rc = siena_nvram_get_subtype(enp, partn, &subtype)) != 0)
 660                 goto fail5;
 661
 662         /* Fill out the new version */
 663         fwverp = &dcfg->fw_version[partn];
 664         EFX_POPULATE_DWORD_1(fwverp->fw_subtype, EFX_DWORD_0, subtype);
 665         EFX_POPULATE_WORD_1(fwverp->version_w, EFX_WORD_0, version[0]);
 666         EFX_POPULATE_WORD_1(fwverp->version_x, EFX_WORD_0, version[1]);
 667         EFX_POPULATE_WORD_1(fwverp->version_y, EFX_WORD_0, version[2]);
 668         EFX_POPULATE_WORD_1(fwverp->version_z, EFX_WORD_0, version[3]);
 669
 670         /* Update the version count */
 671         if (nitems < partn + 1) {
 672                 nitems = partn + 1;
 673                 EFX_POPULATE_DWORD_1(dcfg->num_fw_version_items,
 674                                     EFX_DWORD_0, nitems);
 675         }
 676
 677         /* Update the checksum */
 678         cksum = 0;
 679         for (pos = 0; pos < hdr_length; pos++)
 680                 cksum += ((uint8_t *)dcfg)[pos];
 681         dcfg->csum.eb_u8[0] -= cksum;
 682
 683         /* Erase and write the new partition */
 684         if ((rc = siena_nvram_partn_erase(enp, dcfg_partn, 0, dcfg_size)) != 0)
 685                 goto fail6;
 686
 687         /* Write out the new structure to nvram */
 688         if ((rc = siena_nvram_partn_write(enp, dcfg_partn, 0,
 689             (caddr_t)dcfg, vpd_offset + vpd_length)) != 0)
 690                 goto fail7;
 691
 692         EFSYS_KMEM_FREE(enp->en_esip, length, dcfg);
 693
 694         siena_nvram_partn_unlock(enp, dcfg_partn, NULL);
 695
 696         return (0);
 697
 698 fail7:
 699         EFSYS_PROBE(fail7);
 700 fail6:
 701         EFSYS_PROBE(fail6);
 702 fail5:
 703         EFSYS_PROBE(fail5);
 704 fail4:
 705         EFSYS_PROBE(fail4);
 706
 707         EFSYS_KMEM_FREE(enp->en_esip, length, dcfg);
 708 fail3:
 709         EFSYS_PROBE(fail3);
 710 fail2:
 711         EFSYS_PROBE(fail2);
 712 fail1:
 713         EFSYS_PROBE1(fail1, efx_rc_t, rc);
 714
 715         return (rc);
 716 }
 717
 718 #endif  /* EFSYS_OPT_NVRAM */
 719
 720 #endif  /* EFSYS_OPT_SIENA */