4 * Copyright (c) 2017 Solarflare Communications Inc.
7 * This software was jointly developed between OKTET Labs (under contract
8 * for Solarflare) and Solarflare Communications, Inc.
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions are met:
13 * 1. Redistributions of source code must retain the above copyright notice,
14 * this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright notice,
16 * this list of conditions and the following disclaimer in the documentation
17 * and/or other materials provided with the distribution.
19 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
20 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
21 * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
23 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
24 * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
25 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
26 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
27 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
28 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
29 * EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 #include <rte_tailq.h>
33 #include <rte_common.h>
34 #include <rte_ethdev.h>
35 #include <rte_eth_ctrl.h>
36 #include <rte_ether.h>
38 #include <rte_flow_driver.h>
44 #include "sfc_filter.h"
49 * At now flow API is implemented in such a manner that each
50 * flow rule is converted to a hardware filter.
51 * All elements of flow rule (attributes, pattern items, actions)
52 * correspond to one or more fields in the efx_filter_spec_s structure
53 * that is responsible for the hardware filter.
56 enum sfc_flow_item_layers {
57 SFC_FLOW_ITEM_ANY_LAYER,
58 SFC_FLOW_ITEM_START_LAYER,
64 typedef int (sfc_flow_item_parse)(const struct rte_flow_item *item,
65 efx_filter_spec_t *spec,
66 struct rte_flow_error *error);
68 struct sfc_flow_item {
69 enum rte_flow_item_type type; /* Type of item */
70 enum sfc_flow_item_layers layer; /* Layer of item */
71 enum sfc_flow_item_layers prev_layer; /* Previous layer of item */
72 sfc_flow_item_parse *parse; /* Parsing function */
75 static sfc_flow_item_parse sfc_flow_parse_void;
76 static sfc_flow_item_parse sfc_flow_parse_eth;
77 static sfc_flow_item_parse sfc_flow_parse_vlan;
78 static sfc_flow_item_parse sfc_flow_parse_ipv4;
79 static sfc_flow_item_parse sfc_flow_parse_ipv6;
80 static sfc_flow_item_parse sfc_flow_parse_tcp;
81 static sfc_flow_item_parse sfc_flow_parse_udp;
84 sfc_flow_is_zero(const uint8_t *buf, unsigned int size)
89 for (i = 0; i < size; i++)
92 return (sum == 0) ? B_TRUE : B_FALSE;
96 * Validate item and prepare structures spec and mask for parsing
99 sfc_flow_parse_init(const struct rte_flow_item *item,
100 const void **spec_ptr,
101 const void **mask_ptr,
102 const void *supp_mask,
103 const void *def_mask,
105 struct rte_flow_error *error)
114 rte_flow_error_set(error, EINVAL,
115 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
120 if ((item->last != NULL || item->mask != NULL) && item->spec == NULL) {
121 rte_flow_error_set(error, EINVAL,
122 RTE_FLOW_ERROR_TYPE_ITEM, item,
123 "Mask or last is set without spec");
128 * If "mask" is not set, default mask is used,
129 * but if default mask is NULL, "mask" should be set
131 if (item->mask == NULL) {
132 if (def_mask == NULL) {
133 rte_flow_error_set(error, EINVAL,
134 RTE_FLOW_ERROR_TYPE_ITEM, NULL,
135 "Mask should be specified");
139 mask = (const uint8_t *)def_mask;
141 mask = (const uint8_t *)item->mask;
144 spec = (const uint8_t *)item->spec;
145 last = (const uint8_t *)item->last;
151 * If field values in "last" are either 0 or equal to the corresponding
152 * values in "spec" then they are ignored
155 !sfc_flow_is_zero(last, size) &&
156 memcmp(last, spec, size) != 0) {
157 rte_flow_error_set(error, ENOTSUP,
158 RTE_FLOW_ERROR_TYPE_ITEM, item,
159 "Ranging is not supported");
163 if (supp_mask == NULL) {
164 rte_flow_error_set(error, EINVAL,
165 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
166 "Supported mask for item should be specified");
170 /* Check that mask does not ask for more match than supp_mask */
171 for (i = 0; i < size; i++) {
172 supp = ((const uint8_t *)supp_mask)[i];
174 if (~supp & mask[i]) {
175 rte_flow_error_set(error, ENOTSUP,
176 RTE_FLOW_ERROR_TYPE_ITEM, item,
177 "Item's field is not supported");
190 * Masking is not supported, so masks in items should be either
191 * full or empty (zeroed) and set only for supported fields which
192 * are specified in the supp_mask.
196 sfc_flow_parse_void(__rte_unused const struct rte_flow_item *item,
197 __rte_unused efx_filter_spec_t *efx_spec,
198 __rte_unused struct rte_flow_error *error)
204 * Convert Ethernet item to EFX filter specification.
207 * Item specification. Only source and destination addresses and
208 * Ethernet type fields are supported. In addition to full and
209 * empty masks of destination address, individual/group mask is
210 * also supported. If the mask is NULL, default mask will be used.
211 * Ranging is not supported.
212 * @param efx_spec[in, out]
213 * EFX filter specification to update.
215 * Perform verbose error reporting if not NULL.
218 sfc_flow_parse_eth(const struct rte_flow_item *item,
219 efx_filter_spec_t *efx_spec,
220 struct rte_flow_error *error)
223 const struct rte_flow_item_eth *spec = NULL;
224 const struct rte_flow_item_eth *mask = NULL;
225 const struct rte_flow_item_eth supp_mask = {
226 .dst.addr_bytes = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff },
227 .src.addr_bytes = { 0xff, 0xff, 0xff, 0xff, 0xff, 0xff },
230 const uint8_t ig_mask[EFX_MAC_ADDR_LEN] = {
231 0x01, 0x00, 0x00, 0x00, 0x00, 0x00
234 rc = sfc_flow_parse_init(item,
235 (const void **)&spec,
236 (const void **)&mask,
238 &rte_flow_item_eth_mask,
239 sizeof(struct rte_flow_item_eth),
244 /* If "spec" is not set, could be any Ethernet */
248 if (is_same_ether_addr(&mask->dst, &supp_mask.dst)) {
249 efx_spec->efs_match_flags |= EFX_FILTER_MATCH_LOC_MAC;
250 rte_memcpy(efx_spec->efs_loc_mac, spec->dst.addr_bytes,
252 } else if (memcmp(mask->dst.addr_bytes, ig_mask,
253 EFX_MAC_ADDR_LEN) == 0) {
254 if (is_unicast_ether_addr(&spec->dst))
255 efx_spec->efs_match_flags |=
256 EFX_FILTER_MATCH_UNKNOWN_UCAST_DST;
258 efx_spec->efs_match_flags |=
259 EFX_FILTER_MATCH_UNKNOWN_MCAST_DST;
260 } else if (!is_zero_ether_addr(&mask->dst)) {
264 if (is_same_ether_addr(&mask->src, &supp_mask.src)) {
265 efx_spec->efs_match_flags |= EFX_FILTER_MATCH_REM_MAC;
266 rte_memcpy(efx_spec->efs_rem_mac, spec->src.addr_bytes,
268 } else if (!is_zero_ether_addr(&mask->src)) {
273 * Ether type is in big-endian byte order in item and
274 * in little-endian in efx_spec, so byte swap is used
276 if (mask->type == supp_mask.type) {
277 efx_spec->efs_match_flags |= EFX_FILTER_MATCH_ETHER_TYPE;
278 efx_spec->efs_ether_type = rte_bswap16(spec->type);
279 } else if (mask->type != 0) {
286 rte_flow_error_set(error, EINVAL,
287 RTE_FLOW_ERROR_TYPE_ITEM, item,
288 "Bad mask in the ETH pattern item");
293 * Convert VLAN item to EFX filter specification.
296 * Item specification. Only VID field is supported.
297 * The mask can not be NULL. Ranging is not supported.
298 * @param efx_spec[in, out]
299 * EFX filter specification to update.
301 * Perform verbose error reporting if not NULL.
304 sfc_flow_parse_vlan(const struct rte_flow_item *item,
305 efx_filter_spec_t *efx_spec,
306 struct rte_flow_error *error)
310 const struct rte_flow_item_vlan *spec = NULL;
311 const struct rte_flow_item_vlan *mask = NULL;
312 const struct rte_flow_item_vlan supp_mask = {
313 .tci = rte_cpu_to_be_16(ETH_VLAN_ID_MAX),
316 rc = sfc_flow_parse_init(item,
317 (const void **)&spec,
318 (const void **)&mask,
321 sizeof(struct rte_flow_item_vlan),
327 * VID is in big-endian byte order in item and
328 * in little-endian in efx_spec, so byte swap is used.
329 * If two VLAN items are included, the first matches
330 * the outer tag and the next matches the inner tag.
332 if (mask->tci == supp_mask.tci) {
333 vid = rte_bswap16(spec->tci);
335 if (!(efx_spec->efs_match_flags &
336 EFX_FILTER_MATCH_OUTER_VID)) {
337 efx_spec->efs_match_flags |= EFX_FILTER_MATCH_OUTER_VID;
338 efx_spec->efs_outer_vid = vid;
339 } else if (!(efx_spec->efs_match_flags &
340 EFX_FILTER_MATCH_INNER_VID)) {
341 efx_spec->efs_match_flags |= EFX_FILTER_MATCH_INNER_VID;
342 efx_spec->efs_inner_vid = vid;
344 rte_flow_error_set(error, EINVAL,
345 RTE_FLOW_ERROR_TYPE_ITEM, item,
346 "More than two VLAN items");
350 rte_flow_error_set(error, EINVAL,
351 RTE_FLOW_ERROR_TYPE_ITEM, item,
352 "VLAN ID in TCI match is required");
360 * Convert IPv4 item to EFX filter specification.
363 * Item specification. Only source and destination addresses and
364 * protocol fields are supported. If the mask is NULL, default
365 * mask will be used. Ranging is not supported.
366 * @param efx_spec[in, out]
367 * EFX filter specification to update.
369 * Perform verbose error reporting if not NULL.
372 sfc_flow_parse_ipv4(const struct rte_flow_item *item,
373 efx_filter_spec_t *efx_spec,
374 struct rte_flow_error *error)
377 const struct rte_flow_item_ipv4 *spec = NULL;
378 const struct rte_flow_item_ipv4 *mask = NULL;
379 const uint16_t ether_type_ipv4 = rte_cpu_to_le_16(EFX_ETHER_TYPE_IPV4);
380 const struct rte_flow_item_ipv4 supp_mask = {
382 .src_addr = 0xffffffff,
383 .dst_addr = 0xffffffff,
384 .next_proto_id = 0xff,
388 rc = sfc_flow_parse_init(item,
389 (const void **)&spec,
390 (const void **)&mask,
392 &rte_flow_item_ipv4_mask,
393 sizeof(struct rte_flow_item_ipv4),
399 * Filtering by IPv4 source and destination addresses requires
400 * the appropriate ETHER_TYPE in hardware filters
402 if (!(efx_spec->efs_match_flags & EFX_FILTER_MATCH_ETHER_TYPE)) {
403 efx_spec->efs_match_flags |= EFX_FILTER_MATCH_ETHER_TYPE;
404 efx_spec->efs_ether_type = ether_type_ipv4;
405 } else if (efx_spec->efs_ether_type != ether_type_ipv4) {
406 rte_flow_error_set(error, EINVAL,
407 RTE_FLOW_ERROR_TYPE_ITEM, item,
408 "Ethertype in pattern with IPV4 item should be appropriate");
416 * IPv4 addresses are in big-endian byte order in item and in
419 if (mask->hdr.src_addr == supp_mask.hdr.src_addr) {
420 efx_spec->efs_match_flags |= EFX_FILTER_MATCH_REM_HOST;
421 efx_spec->efs_rem_host.eo_u32[0] = spec->hdr.src_addr;
422 } else if (mask->hdr.src_addr != 0) {
426 if (mask->hdr.dst_addr == supp_mask.hdr.dst_addr) {
427 efx_spec->efs_match_flags |= EFX_FILTER_MATCH_LOC_HOST;
428 efx_spec->efs_loc_host.eo_u32[0] = spec->hdr.dst_addr;
429 } else if (mask->hdr.dst_addr != 0) {
433 if (mask->hdr.next_proto_id == supp_mask.hdr.next_proto_id) {
434 efx_spec->efs_match_flags |= EFX_FILTER_MATCH_IP_PROTO;
435 efx_spec->efs_ip_proto = spec->hdr.next_proto_id;
436 } else if (mask->hdr.next_proto_id != 0) {
443 rte_flow_error_set(error, EINVAL,
444 RTE_FLOW_ERROR_TYPE_ITEM, item,
445 "Bad mask in the IPV4 pattern item");
450 * Convert IPv6 item to EFX filter specification.
453 * Item specification. Only source and destination addresses and
454 * next header fields are supported. If the mask is NULL, default
455 * mask will be used. Ranging is not supported.
456 * @param efx_spec[in, out]
457 * EFX filter specification to update.
459 * Perform verbose error reporting if not NULL.
462 sfc_flow_parse_ipv6(const struct rte_flow_item *item,
463 efx_filter_spec_t *efx_spec,
464 struct rte_flow_error *error)
467 const struct rte_flow_item_ipv6 *spec = NULL;
468 const struct rte_flow_item_ipv6 *mask = NULL;
469 const uint16_t ether_type_ipv6 = rte_cpu_to_le_16(EFX_ETHER_TYPE_IPV6);
470 const struct rte_flow_item_ipv6 supp_mask = {
472 .src_addr = { 0xff, 0xff, 0xff, 0xff,
473 0xff, 0xff, 0xff, 0xff,
474 0xff, 0xff, 0xff, 0xff,
475 0xff, 0xff, 0xff, 0xff },
476 .dst_addr = { 0xff, 0xff, 0xff, 0xff,
477 0xff, 0xff, 0xff, 0xff,
478 0xff, 0xff, 0xff, 0xff,
479 0xff, 0xff, 0xff, 0xff },
484 rc = sfc_flow_parse_init(item,
485 (const void **)&spec,
486 (const void **)&mask,
488 &rte_flow_item_ipv6_mask,
489 sizeof(struct rte_flow_item_ipv6),
495 * Filtering by IPv6 source and destination addresses requires
496 * the appropriate ETHER_TYPE in hardware filters
498 if (!(efx_spec->efs_match_flags & EFX_FILTER_MATCH_ETHER_TYPE)) {
499 efx_spec->efs_match_flags |= EFX_FILTER_MATCH_ETHER_TYPE;
500 efx_spec->efs_ether_type = ether_type_ipv6;
501 } else if (efx_spec->efs_ether_type != ether_type_ipv6) {
502 rte_flow_error_set(error, EINVAL,
503 RTE_FLOW_ERROR_TYPE_ITEM, item,
504 "Ethertype in pattern with IPV6 item should be appropriate");
512 * IPv6 addresses are in big-endian byte order in item and in
515 if (memcmp(mask->hdr.src_addr, supp_mask.hdr.src_addr,
516 sizeof(mask->hdr.src_addr)) == 0) {
517 efx_spec->efs_match_flags |= EFX_FILTER_MATCH_REM_HOST;
519 RTE_BUILD_BUG_ON(sizeof(efx_spec->efs_rem_host) !=
520 sizeof(spec->hdr.src_addr));
521 rte_memcpy(&efx_spec->efs_rem_host, spec->hdr.src_addr,
522 sizeof(efx_spec->efs_rem_host));
523 } else if (!sfc_flow_is_zero(mask->hdr.src_addr,
524 sizeof(mask->hdr.src_addr))) {
528 if (memcmp(mask->hdr.dst_addr, supp_mask.hdr.dst_addr,
529 sizeof(mask->hdr.dst_addr)) == 0) {
530 efx_spec->efs_match_flags |= EFX_FILTER_MATCH_LOC_HOST;
532 RTE_BUILD_BUG_ON(sizeof(efx_spec->efs_loc_host) !=
533 sizeof(spec->hdr.dst_addr));
534 rte_memcpy(&efx_spec->efs_loc_host, spec->hdr.dst_addr,
535 sizeof(efx_spec->efs_loc_host));
536 } else if (!sfc_flow_is_zero(mask->hdr.dst_addr,
537 sizeof(mask->hdr.dst_addr))) {
541 if (mask->hdr.proto == supp_mask.hdr.proto) {
542 efx_spec->efs_match_flags |= EFX_FILTER_MATCH_IP_PROTO;
543 efx_spec->efs_ip_proto = spec->hdr.proto;
544 } else if (mask->hdr.proto != 0) {
551 rte_flow_error_set(error, EINVAL,
552 RTE_FLOW_ERROR_TYPE_ITEM, item,
553 "Bad mask in the IPV6 pattern item");
558 * Convert TCP item to EFX filter specification.
561 * Item specification. Only source and destination ports fields
562 * are supported. If the mask is NULL, default mask will be used.
563 * Ranging is not supported.
564 * @param efx_spec[in, out]
565 * EFX filter specification to update.
567 * Perform verbose error reporting if not NULL.
570 sfc_flow_parse_tcp(const struct rte_flow_item *item,
571 efx_filter_spec_t *efx_spec,
572 struct rte_flow_error *error)
575 const struct rte_flow_item_tcp *spec = NULL;
576 const struct rte_flow_item_tcp *mask = NULL;
577 const struct rte_flow_item_tcp supp_mask = {
584 rc = sfc_flow_parse_init(item,
585 (const void **)&spec,
586 (const void **)&mask,
588 &rte_flow_item_tcp_mask,
589 sizeof(struct rte_flow_item_tcp),
595 * Filtering by TCP source and destination ports requires
596 * the appropriate IP_PROTO in hardware filters
598 if (!(efx_spec->efs_match_flags & EFX_FILTER_MATCH_IP_PROTO)) {
599 efx_spec->efs_match_flags |= EFX_FILTER_MATCH_IP_PROTO;
600 efx_spec->efs_ip_proto = EFX_IPPROTO_TCP;
601 } else if (efx_spec->efs_ip_proto != EFX_IPPROTO_TCP) {
602 rte_flow_error_set(error, EINVAL,
603 RTE_FLOW_ERROR_TYPE_ITEM, item,
604 "IP proto in pattern with TCP item should be appropriate");
612 * Source and destination ports are in big-endian byte order in item and
613 * in little-endian in efx_spec, so byte swap is used
615 if (mask->hdr.src_port == supp_mask.hdr.src_port) {
616 efx_spec->efs_match_flags |= EFX_FILTER_MATCH_REM_PORT;
617 efx_spec->efs_rem_port = rte_bswap16(spec->hdr.src_port);
618 } else if (mask->hdr.src_port != 0) {
622 if (mask->hdr.dst_port == supp_mask.hdr.dst_port) {
623 efx_spec->efs_match_flags |= EFX_FILTER_MATCH_LOC_PORT;
624 efx_spec->efs_loc_port = rte_bswap16(spec->hdr.dst_port);
625 } else if (mask->hdr.dst_port != 0) {
632 rte_flow_error_set(error, EINVAL,
633 RTE_FLOW_ERROR_TYPE_ITEM, item,
634 "Bad mask in the TCP pattern item");
639 * Convert UDP item to EFX filter specification.
642 * Item specification. Only source and destination ports fields
643 * are supported. If the mask is NULL, default mask will be used.
644 * Ranging is not supported.
645 * @param efx_spec[in, out]
646 * EFX filter specification to update.
648 * Perform verbose error reporting if not NULL.
651 sfc_flow_parse_udp(const struct rte_flow_item *item,
652 efx_filter_spec_t *efx_spec,
653 struct rte_flow_error *error)
656 const struct rte_flow_item_udp *spec = NULL;
657 const struct rte_flow_item_udp *mask = NULL;
658 const struct rte_flow_item_udp supp_mask = {
665 rc = sfc_flow_parse_init(item,
666 (const void **)&spec,
667 (const void **)&mask,
669 &rte_flow_item_udp_mask,
670 sizeof(struct rte_flow_item_udp),
676 * Filtering by UDP source and destination ports requires
677 * the appropriate IP_PROTO in hardware filters
679 if (!(efx_spec->efs_match_flags & EFX_FILTER_MATCH_IP_PROTO)) {
680 efx_spec->efs_match_flags |= EFX_FILTER_MATCH_IP_PROTO;
681 efx_spec->efs_ip_proto = EFX_IPPROTO_UDP;
682 } else if (efx_spec->efs_ip_proto != EFX_IPPROTO_UDP) {
683 rte_flow_error_set(error, EINVAL,
684 RTE_FLOW_ERROR_TYPE_ITEM, item,
685 "IP proto in pattern with UDP item should be appropriate");
693 * Source and destination ports are in big-endian byte order in item and
694 * in little-endian in efx_spec, so byte swap is used
696 if (mask->hdr.src_port == supp_mask.hdr.src_port) {
697 efx_spec->efs_match_flags |= EFX_FILTER_MATCH_REM_PORT;
698 efx_spec->efs_rem_port = rte_bswap16(spec->hdr.src_port);
699 } else if (mask->hdr.src_port != 0) {
703 if (mask->hdr.dst_port == supp_mask.hdr.dst_port) {
704 efx_spec->efs_match_flags |= EFX_FILTER_MATCH_LOC_PORT;
705 efx_spec->efs_loc_port = rte_bswap16(spec->hdr.dst_port);
706 } else if (mask->hdr.dst_port != 0) {
713 rte_flow_error_set(error, EINVAL,
714 RTE_FLOW_ERROR_TYPE_ITEM, item,
715 "Bad mask in the UDP pattern item");
719 static const struct sfc_flow_item sfc_flow_items[] = {
721 .type = RTE_FLOW_ITEM_TYPE_VOID,
722 .prev_layer = SFC_FLOW_ITEM_ANY_LAYER,
723 .layer = SFC_FLOW_ITEM_ANY_LAYER,
724 .parse = sfc_flow_parse_void,
727 .type = RTE_FLOW_ITEM_TYPE_ETH,
728 .prev_layer = SFC_FLOW_ITEM_START_LAYER,
729 .layer = SFC_FLOW_ITEM_L2,
730 .parse = sfc_flow_parse_eth,
733 .type = RTE_FLOW_ITEM_TYPE_VLAN,
734 .prev_layer = SFC_FLOW_ITEM_L2,
735 .layer = SFC_FLOW_ITEM_L2,
736 .parse = sfc_flow_parse_vlan,
739 .type = RTE_FLOW_ITEM_TYPE_IPV4,
740 .prev_layer = SFC_FLOW_ITEM_L2,
741 .layer = SFC_FLOW_ITEM_L3,
742 .parse = sfc_flow_parse_ipv4,
745 .type = RTE_FLOW_ITEM_TYPE_IPV6,
746 .prev_layer = SFC_FLOW_ITEM_L2,
747 .layer = SFC_FLOW_ITEM_L3,
748 .parse = sfc_flow_parse_ipv6,
751 .type = RTE_FLOW_ITEM_TYPE_TCP,
752 .prev_layer = SFC_FLOW_ITEM_L3,
753 .layer = SFC_FLOW_ITEM_L4,
754 .parse = sfc_flow_parse_tcp,
757 .type = RTE_FLOW_ITEM_TYPE_UDP,
758 .prev_layer = SFC_FLOW_ITEM_L3,
759 .layer = SFC_FLOW_ITEM_L4,
760 .parse = sfc_flow_parse_udp,
765 * Protocol-independent flow API support
768 sfc_flow_parse_attr(const struct rte_flow_attr *attr,
769 struct rte_flow *flow,
770 struct rte_flow_error *error)
773 rte_flow_error_set(error, EINVAL,
774 RTE_FLOW_ERROR_TYPE_ATTR, NULL,
778 if (attr->group != 0) {
779 rte_flow_error_set(error, ENOTSUP,
780 RTE_FLOW_ERROR_TYPE_ATTR_GROUP, attr,
781 "Groups are not supported");
784 if (attr->priority != 0) {
785 rte_flow_error_set(error, ENOTSUP,
786 RTE_FLOW_ERROR_TYPE_ATTR_PRIORITY, attr,
787 "Priorities are not supported");
790 if (attr->egress != 0) {
791 rte_flow_error_set(error, ENOTSUP,
792 RTE_FLOW_ERROR_TYPE_ATTR_EGRESS, attr,
793 "Egress is not supported");
796 if (attr->ingress == 0) {
797 rte_flow_error_set(error, ENOTSUP,
798 RTE_FLOW_ERROR_TYPE_ATTR_INGRESS, attr,
799 "Only ingress is supported");
803 flow->spec.efs_flags |= EFX_FILTER_FLAG_RX;
804 flow->spec.efs_rss_context = EFX_RSS_CONTEXT_DEFAULT;
809 /* Get item from array sfc_flow_items */
810 static const struct sfc_flow_item *
811 sfc_flow_get_item(enum rte_flow_item_type type)
815 for (i = 0; i < RTE_DIM(sfc_flow_items); i++)
816 if (sfc_flow_items[i].type == type)
817 return &sfc_flow_items[i];
823 sfc_flow_parse_pattern(const struct rte_flow_item pattern[],
824 struct rte_flow *flow,
825 struct rte_flow_error *error)
828 unsigned int prev_layer = SFC_FLOW_ITEM_ANY_LAYER;
829 const struct sfc_flow_item *item;
831 if (pattern == NULL) {
832 rte_flow_error_set(error, EINVAL,
833 RTE_FLOW_ERROR_TYPE_ITEM_NUM, NULL,
838 for (; pattern->type != RTE_FLOW_ITEM_TYPE_END; pattern++) {
839 item = sfc_flow_get_item(pattern->type);
841 rte_flow_error_set(error, ENOTSUP,
842 RTE_FLOW_ERROR_TYPE_ITEM, pattern,
843 "Unsupported pattern item");
848 * Omitting one or several protocol layers at the beginning
849 * of pattern is supported
851 if (item->prev_layer != SFC_FLOW_ITEM_ANY_LAYER &&
852 prev_layer != SFC_FLOW_ITEM_ANY_LAYER &&
853 item->prev_layer != prev_layer) {
854 rte_flow_error_set(error, ENOTSUP,
855 RTE_FLOW_ERROR_TYPE_ITEM, pattern,
856 "Unexpected sequence of pattern items");
860 rc = item->parse(pattern, &flow->spec, error);
864 if (item->layer != SFC_FLOW_ITEM_ANY_LAYER)
865 prev_layer = item->layer;
872 sfc_flow_parse_queue(struct sfc_adapter *sa,
873 const struct rte_flow_action_queue *queue,
874 struct rte_flow *flow)
878 if (queue->index >= sa->rxq_count)
881 rxq = sa->rxq_info[queue->index].rxq;
882 flow->spec.efs_dmaq_id = (uint16_t)rxq->hw_index;
887 #if EFSYS_OPT_RX_SCALE
889 sfc_flow_parse_rss(struct sfc_adapter *sa,
890 const struct rte_flow_action_rss *rss,
891 struct rte_flow *flow)
893 unsigned int rxq_sw_index;
895 unsigned int rxq_hw_index_min;
896 unsigned int rxq_hw_index_max;
897 const struct rte_eth_rss_conf *rss_conf = rss->rss_conf;
899 uint8_t *rss_key = NULL;
900 struct sfc_flow_rss *sfc_rss_conf = &flow->rss_conf;
906 rxq_sw_index = sa->rxq_count - 1;
907 rxq = sa->rxq_info[rxq_sw_index].rxq;
908 rxq_hw_index_min = rxq->hw_index;
909 rxq_hw_index_max = 0;
911 for (i = 0; i < rss->num; ++i) {
912 rxq_sw_index = rss->queue[i];
914 if (rxq_sw_index >= sa->rxq_count)
917 rxq = sa->rxq_info[rxq_sw_index].rxq;
919 if (rxq->hw_index < rxq_hw_index_min)
920 rxq_hw_index_min = rxq->hw_index;
922 if (rxq->hw_index > rxq_hw_index_max)
923 rxq_hw_index_max = rxq->hw_index;
926 rss_hf = (rss_conf != NULL) ? rss_conf->rss_hf : SFC_RSS_OFFLOADS;
927 if ((rss_hf & ~SFC_RSS_OFFLOADS) != 0)
930 if (rss_conf != NULL) {
931 if (rss_conf->rss_key_len != sizeof(sa->rss_key))
934 rss_key = rss_conf->rss_key;
936 rss_key = sa->rss_key;
941 sfc_rss_conf->rxq_hw_index_min = rxq_hw_index_min;
942 sfc_rss_conf->rxq_hw_index_max = rxq_hw_index_max;
943 sfc_rss_conf->rss_hash_types = sfc_rte_to_efx_hash_type(rss_hf);
944 rte_memcpy(sfc_rss_conf->rss_key, rss_key, sizeof(sa->rss_key));
946 for (i = 0; i < RTE_DIM(sfc_rss_conf->rss_tbl); ++i) {
947 unsigned int rxq_sw_index = rss->queue[i % rss->num];
948 struct sfc_rxq *rxq = sa->rxq_info[rxq_sw_index].rxq;
950 sfc_rss_conf->rss_tbl[i] = rxq->hw_index - rxq_hw_index_min;
955 #endif /* EFSYS_OPT_RX_SCALE */
958 sfc_flow_filter_insert(struct sfc_adapter *sa,
959 struct rte_flow *flow)
961 efx_filter_spec_t *spec = &flow->spec;
963 #if EFSYS_OPT_RX_SCALE
964 struct sfc_flow_rss *rss = &flow->rss_conf;
968 unsigned int rss_spread = MIN(rss->rxq_hw_index_max -
969 rss->rxq_hw_index_min + 1,
972 rc = efx_rx_scale_context_alloc(sa->nic,
973 EFX_RX_SCALE_EXCLUSIVE,
975 &spec->efs_rss_context);
977 goto fail_scale_context_alloc;
979 rc = efx_rx_scale_mode_set(sa->nic, spec->efs_rss_context,
980 EFX_RX_HASHALG_TOEPLITZ,
981 rss->rss_hash_types, B_TRUE);
983 goto fail_scale_mode_set;
985 rc = efx_rx_scale_key_set(sa->nic, spec->efs_rss_context,
987 sizeof(sa->rss_key));
989 goto fail_scale_key_set;
991 spec->efs_dmaq_id = rss->rxq_hw_index_min;
992 spec->efs_flags |= EFX_FILTER_FLAG_RX_RSS;
995 rc = efx_filter_insert(sa->nic, spec);
997 goto fail_filter_insert;
1001 * Scale table is set after filter insertion because
1002 * the table entries are relative to the base RxQ ID
1003 * and the latter is submitted to the HW by means of
1004 * inserting a filter, so by the time of the request
1005 * the HW knows all the information needed to verify
1006 * the table entries, and the operation will succeed
1008 rc = efx_rx_scale_tbl_set(sa->nic, spec->efs_rss_context,
1009 rss->rss_tbl, RTE_DIM(rss->rss_tbl));
1011 goto fail_scale_tbl_set;
1017 efx_filter_remove(sa->nic, spec);
1021 fail_scale_mode_set:
1023 efx_rx_scale_context_free(sa->nic, spec->efs_rss_context);
1025 fail_scale_context_alloc:
1027 #else /* !EFSYS_OPT_RX_SCALE */
1028 return efx_filter_insert(sa->nic, spec);
1029 #endif /* EFSYS_OPT_RX_SCALE */
1033 sfc_flow_filter_remove(struct sfc_adapter *sa,
1034 struct rte_flow *flow)
1036 efx_filter_spec_t *spec = &flow->spec;
1039 rc = efx_filter_remove(sa->nic, spec);
1043 #if EFSYS_OPT_RX_SCALE
1045 rc = efx_rx_scale_context_free(sa->nic, spec->efs_rss_context);
1046 #endif /* EFSYS_OPT_RX_SCALE */
1052 sfc_flow_parse_actions(struct sfc_adapter *sa,
1053 const struct rte_flow_action actions[],
1054 struct rte_flow *flow,
1055 struct rte_flow_error *error)
1058 boolean_t is_specified = B_FALSE;
1060 if (actions == NULL) {
1061 rte_flow_error_set(error, EINVAL,
1062 RTE_FLOW_ERROR_TYPE_ACTION_NUM, NULL,
1067 for (; actions->type != RTE_FLOW_ACTION_TYPE_END; actions++) {
1068 switch (actions->type) {
1069 case RTE_FLOW_ACTION_TYPE_VOID:
1072 case RTE_FLOW_ACTION_TYPE_QUEUE:
1073 rc = sfc_flow_parse_queue(sa, actions->conf, flow);
1075 rte_flow_error_set(error, EINVAL,
1076 RTE_FLOW_ERROR_TYPE_ACTION, actions,
1077 "Bad QUEUE action");
1081 is_specified = B_TRUE;
1084 #if EFSYS_OPT_RX_SCALE
1085 case RTE_FLOW_ACTION_TYPE_RSS:
1086 rc = sfc_flow_parse_rss(sa, actions->conf, flow);
1088 rte_flow_error_set(error, rc,
1089 RTE_FLOW_ERROR_TYPE_ACTION, actions,
1094 is_specified = B_TRUE;
1096 #endif /* EFSYS_OPT_RX_SCALE */
1099 rte_flow_error_set(error, ENOTSUP,
1100 RTE_FLOW_ERROR_TYPE_ACTION, actions,
1101 "Action is not supported");
1106 if (!is_specified) {
1107 rte_flow_error_set(error, EINVAL,
1108 RTE_FLOW_ERROR_TYPE_ACTION_NUM, actions,
1109 "Action is unspecified");
1117 sfc_flow_parse(struct rte_eth_dev *dev,
1118 const struct rte_flow_attr *attr,
1119 const struct rte_flow_item pattern[],
1120 const struct rte_flow_action actions[],
1121 struct rte_flow *flow,
1122 struct rte_flow_error *error)
1124 struct sfc_adapter *sa = dev->data->dev_private;
1127 rc = sfc_flow_parse_attr(attr, flow, error);
1129 goto fail_bad_value;
1131 rc = sfc_flow_parse_pattern(pattern, flow, error);
1133 goto fail_bad_value;
1135 rc = sfc_flow_parse_actions(sa, actions, flow, error);
1137 goto fail_bad_value;
1139 if (!sfc_filter_is_match_supported(sa, flow->spec.efs_match_flags)) {
1140 rte_flow_error_set(error, ENOTSUP,
1141 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
1142 "Flow rule pattern is not supported");
1151 sfc_flow_validate(struct rte_eth_dev *dev,
1152 const struct rte_flow_attr *attr,
1153 const struct rte_flow_item pattern[],
1154 const struct rte_flow_action actions[],
1155 struct rte_flow_error *error)
1157 struct rte_flow flow;
1159 memset(&flow, 0, sizeof(flow));
1161 return sfc_flow_parse(dev, attr, pattern, actions, &flow, error);
1164 static struct rte_flow *
1165 sfc_flow_create(struct rte_eth_dev *dev,
1166 const struct rte_flow_attr *attr,
1167 const struct rte_flow_item pattern[],
1168 const struct rte_flow_action actions[],
1169 struct rte_flow_error *error)
1171 struct sfc_adapter *sa = dev->data->dev_private;
1172 struct rte_flow *flow = NULL;
1175 flow = rte_zmalloc("sfc_rte_flow", sizeof(*flow), 0);
1177 rte_flow_error_set(error, ENOMEM,
1178 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
1179 "Failed to allocate memory");
1183 rc = sfc_flow_parse(dev, attr, pattern, actions, flow, error);
1185 goto fail_bad_value;
1187 TAILQ_INSERT_TAIL(&sa->filter.flow_list, flow, entries);
1189 sfc_adapter_lock(sa);
1191 if (sa->state == SFC_ADAPTER_STARTED) {
1192 rc = sfc_flow_filter_insert(sa, flow);
1194 rte_flow_error_set(error, rc,
1195 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
1196 "Failed to insert filter");
1197 goto fail_filter_insert;
1201 sfc_adapter_unlock(sa);
1206 TAILQ_REMOVE(&sa->filter.flow_list, flow, entries);
1210 sfc_adapter_unlock(sa);
1217 sfc_flow_remove(struct sfc_adapter *sa,
1218 struct rte_flow *flow,
1219 struct rte_flow_error *error)
1223 SFC_ASSERT(sfc_adapter_is_locked(sa));
1225 if (sa->state == SFC_ADAPTER_STARTED) {
1226 rc = sfc_flow_filter_remove(sa, flow);
1228 rte_flow_error_set(error, rc,
1229 RTE_FLOW_ERROR_TYPE_UNSPECIFIED, NULL,
1230 "Failed to destroy flow rule");
1233 TAILQ_REMOVE(&sa->filter.flow_list, flow, entries);
1240 sfc_flow_destroy(struct rte_eth_dev *dev,
1241 struct rte_flow *flow,
1242 struct rte_flow_error *error)
1244 struct sfc_adapter *sa = dev->data->dev_private;
1245 struct rte_flow *flow_ptr;
1248 sfc_adapter_lock(sa);
1250 TAILQ_FOREACH(flow_ptr, &sa->filter.flow_list, entries) {
1251 if (flow_ptr == flow)
1255 rte_flow_error_set(error, rc,
1256 RTE_FLOW_ERROR_TYPE_HANDLE, NULL,
1257 "Failed to find flow rule to destroy");
1258 goto fail_bad_value;
1261 rc = sfc_flow_remove(sa, flow, error);
1264 sfc_adapter_unlock(sa);
1270 sfc_flow_flush(struct rte_eth_dev *dev,
1271 struct rte_flow_error *error)
1273 struct sfc_adapter *sa = dev->data->dev_private;
1274 struct rte_flow *flow;
1278 sfc_adapter_lock(sa);
1280 while ((flow = TAILQ_FIRST(&sa->filter.flow_list)) != NULL) {
1281 rc = sfc_flow_remove(sa, flow, error);
1286 sfc_adapter_unlock(sa);
1292 sfc_flow_isolate(struct rte_eth_dev *dev, int enable,
1293 struct rte_flow_error *error)
1295 struct sfc_adapter *sa = dev->data->dev_private;
1296 struct sfc_port *port = &sa->port;
1299 sfc_adapter_lock(sa);
1300 if (sa->state != SFC_ADAPTER_INITIALIZED) {
1301 rte_flow_error_set(error, EBUSY,
1302 RTE_FLOW_ERROR_TYPE_UNSPECIFIED,
1303 NULL, "please close the port first");
1306 port->isolated = (enable) ? B_TRUE : B_FALSE;
1308 sfc_adapter_unlock(sa);
1313 const struct rte_flow_ops sfc_flow_ops = {
1314 .validate = sfc_flow_validate,
1315 .create = sfc_flow_create,
1316 .destroy = sfc_flow_destroy,
1317 .flush = sfc_flow_flush,
1319 .isolate = sfc_flow_isolate,
1323 sfc_flow_init(struct sfc_adapter *sa)
1325 SFC_ASSERT(sfc_adapter_is_locked(sa));
1327 TAILQ_INIT(&sa->filter.flow_list);
1331 sfc_flow_fini(struct sfc_adapter *sa)
1333 struct rte_flow *flow;
1335 SFC_ASSERT(sfc_adapter_is_locked(sa));
1337 while ((flow = TAILQ_FIRST(&sa->filter.flow_list)) != NULL) {
1338 TAILQ_REMOVE(&sa->filter.flow_list, flow, entries);
1344 sfc_flow_stop(struct sfc_adapter *sa)
1346 struct rte_flow *flow;
1348 SFC_ASSERT(sfc_adapter_is_locked(sa));
1350 TAILQ_FOREACH(flow, &sa->filter.flow_list, entries)
1351 sfc_flow_filter_remove(sa, flow);
1355 sfc_flow_start(struct sfc_adapter *sa)
1357 struct rte_flow *flow;
1360 sfc_log_init(sa, "entry");
1362 SFC_ASSERT(sfc_adapter_is_locked(sa));
1364 TAILQ_FOREACH(flow, &sa->filter.flow_list, entries) {
1365 rc = sfc_flow_filter_insert(sa, flow);
1370 sfc_log_init(sa, "done");