drivers/net/vmxnet3/vmxnet3_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2010-2015 Intel Corporation
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdio.h>
   7 #include <errno.h>
   8 #include <stdint.h>
   9 #include <string.h>
  10 #include <unistd.h>
  11 #include <stdarg.h>
  12 #include <fcntl.h>
  13 #include <inttypes.h>
  14 #include <rte_byteorder.h>
  15 #include <rte_common.h>
  16 #include <rte_cycles.h>
  17
  18 #include <rte_interrupts.h>
  19 #include <rte_log.h>
  20 #include <rte_debug.h>
  21 #include <rte_pci.h>
  22 #include <rte_bus_pci.h>
  23 #include <rte_branch_prediction.h>
  24 #include <rte_memory.h>
  25 #include <rte_memzone.h>
  26 #include <rte_eal.h>
  27 #include <rte_alarm.h>
  28 #include <rte_ether.h>
  29 #include <rte_ethdev_driver.h>
  30 #include <rte_ethdev_pci.h>
  31 #include <rte_string_fns.h>
  32 #include <rte_malloc.h>
  33 #include <rte_dev.h>
  34
  35 #include "base/vmxnet3_defs.h"
  36
  37 #include "vmxnet3_ring.h"
  38 #include "vmxnet3_logs.h"
  39 #include "vmxnet3_ethdev.h"
  40
  41 #define PROCESS_SYS_EVENTS 0
  42
  43 #define VMXNET3_TX_MAX_SEG      UINT8_MAX
  44
  45 #define VMXNET3_TX_OFFLOAD_CAP          \
  46         (DEV_TX_OFFLOAD_VLAN_INSERT |   \
  47          DEV_TX_OFFLOAD_IPV4_CKSUM |    \
  48          DEV_TX_OFFLOAD_TCP_CKSUM |     \
  49          DEV_TX_OFFLOAD_UDP_CKSUM |     \
  50          DEV_TX_OFFLOAD_TCP_TSO |       \
  51          DEV_TX_OFFLOAD_MULTI_SEGS)
  52
  53 #define VMXNET3_RX_OFFLOAD_CAP          \
  54         (DEV_RX_OFFLOAD_VLAN_STRIP |    \
  55          DEV_RX_OFFLOAD_SCATTER |       \
  56          DEV_RX_OFFLOAD_IPV4_CKSUM |    \
  57          DEV_RX_OFFLOAD_UDP_CKSUM |     \
  58          DEV_RX_OFFLOAD_TCP_CKSUM |     \
  59          DEV_RX_OFFLOAD_TCP_LRO |       \
  60          DEV_RX_OFFLOAD_JUMBO_FRAME)
  61
  62 static int eth_vmxnet3_dev_init(struct rte_eth_dev *eth_dev);
  63 static int eth_vmxnet3_dev_uninit(struct rte_eth_dev *eth_dev);
  64 static int vmxnet3_dev_configure(struct rte_eth_dev *dev);
  65 static int vmxnet3_dev_start(struct rte_eth_dev *dev);
  66 static void vmxnet3_dev_stop(struct rte_eth_dev *dev);
  67 static void vmxnet3_dev_close(struct rte_eth_dev *dev);
  68 static void vmxnet3_dev_set_rxmode(struct vmxnet3_hw *hw, uint32_t feature, int set);
  69 static void vmxnet3_dev_promiscuous_enable(struct rte_eth_dev *dev);
  70 static void vmxnet3_dev_promiscuous_disable(struct rte_eth_dev *dev);
  71 static void vmxnet3_dev_allmulticast_enable(struct rte_eth_dev *dev);
  72 static void vmxnet3_dev_allmulticast_disable(struct rte_eth_dev *dev);
  73 static int __vmxnet3_dev_link_update(struct rte_eth_dev *dev,
  74                                      int wait_to_complete);
  75 static int vmxnet3_dev_link_update(struct rte_eth_dev *dev,
  76                                    int wait_to_complete);
  77 static void vmxnet3_hw_stats_save(struct vmxnet3_hw *hw);
  78 static int vmxnet3_dev_stats_get(struct rte_eth_dev *dev,
  79                                   struct rte_eth_stats *stats);
  80 static void vmxnet3_dev_stats_reset(struct rte_eth_dev *dev);
  81 static int vmxnet3_dev_xstats_get_names(struct rte_eth_dev *dev,
  82                                         struct rte_eth_xstat_name *xstats,
  83                                         unsigned int n);
  84 static int vmxnet3_dev_xstats_get(struct rte_eth_dev *dev,
  85                                   struct rte_eth_xstat *xstats, unsigned int n);
  86 static void vmxnet3_dev_info_get(struct rte_eth_dev *dev,
  87                                  struct rte_eth_dev_info *dev_info);
  88 static const uint32_t *
  89 vmxnet3_dev_supported_ptypes_get(struct rte_eth_dev *dev);
  90 static int vmxnet3_dev_vlan_filter_set(struct rte_eth_dev *dev,
  91                                        uint16_t vid, int on);
  92 static int vmxnet3_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask);
  93 static int vmxnet3_mac_addr_set(struct rte_eth_dev *dev,
  94                                  struct ether_addr *mac_addr);
  95 static void vmxnet3_interrupt_handler(void *param);
  96
  97 int vmxnet3_logtype_init;
  98 int vmxnet3_logtype_driver;
  99
 100 /*
 101  * The set of PCI devices this driver supports
 102  */
 103 #define VMWARE_PCI_VENDOR_ID 0x15AD
 104 #define VMWARE_DEV_ID_VMXNET3 0x07B0
 105 static const struct rte_pci_id pci_id_vmxnet3_map[] = {
 106         { RTE_PCI_DEVICE(VMWARE_PCI_VENDOR_ID, VMWARE_DEV_ID_VMXNET3) },
 107         { .vendor_id = 0, /* sentinel */ },
 108 };
 109
 110 static const struct eth_dev_ops vmxnet3_eth_dev_ops = {
 111         .dev_configure        = vmxnet3_dev_configure,
 112         .dev_start            = vmxnet3_dev_start,
 113         .dev_stop             = vmxnet3_dev_stop,
 114         .dev_close            = vmxnet3_dev_close,
 115         .promiscuous_enable   = vmxnet3_dev_promiscuous_enable,
 116         .promiscuous_disable  = vmxnet3_dev_promiscuous_disable,
 117         .allmulticast_enable  = vmxnet3_dev_allmulticast_enable,
 118         .allmulticast_disable = vmxnet3_dev_allmulticast_disable,
 119         .link_update          = vmxnet3_dev_link_update,
 120         .stats_get            = vmxnet3_dev_stats_get,
 121         .xstats_get_names     = vmxnet3_dev_xstats_get_names,
 122         .xstats_get           = vmxnet3_dev_xstats_get,
 123         .stats_reset          = vmxnet3_dev_stats_reset,
 124         .mac_addr_set         = vmxnet3_mac_addr_set,
 125         .dev_infos_get        = vmxnet3_dev_info_get,
 126         .dev_supported_ptypes_get = vmxnet3_dev_supported_ptypes_get,
 127         .vlan_filter_set      = vmxnet3_dev_vlan_filter_set,
 128         .vlan_offload_set     = vmxnet3_dev_vlan_offload_set,
 129         .rx_queue_setup       = vmxnet3_dev_rx_queue_setup,
 130         .rx_queue_release     = vmxnet3_dev_rx_queue_release,
 131         .tx_queue_setup       = vmxnet3_dev_tx_queue_setup,
 132         .tx_queue_release     = vmxnet3_dev_tx_queue_release,
 133 };
 134
 135 struct vmxnet3_xstats_name_off {
 136         char name[RTE_ETH_XSTATS_NAME_SIZE];
 137         unsigned int offset;
 138 };
 139
 140 /* tx_qX_ is prepended to the name string here */
 141 static const struct vmxnet3_xstats_name_off vmxnet3_txq_stat_strings[] = {
 142         {"drop_total",         offsetof(struct vmxnet3_txq_stats, drop_total)},
 143         {"drop_too_many_segs", offsetof(struct vmxnet3_txq_stats, drop_too_many_segs)},
 144         {"drop_tso",           offsetof(struct vmxnet3_txq_stats, drop_tso)},
 145         {"tx_ring_full",       offsetof(struct vmxnet3_txq_stats, tx_ring_full)},
 146 };
 147
 148 /* rx_qX_ is prepended to the name string here */
 149 static const struct vmxnet3_xstats_name_off vmxnet3_rxq_stat_strings[] = {
 150         {"drop_total",           offsetof(struct vmxnet3_rxq_stats, drop_total)},
 151         {"drop_err",             offsetof(struct vmxnet3_rxq_stats, drop_err)},
 152         {"drop_fcs",             offsetof(struct vmxnet3_rxq_stats, drop_fcs)},
 153         {"rx_buf_alloc_failure", offsetof(struct vmxnet3_rxq_stats, rx_buf_alloc_failure)},
 154 };
 155
 156 static const struct rte_memzone *
 157 gpa_zone_reserve(struct rte_eth_dev *dev, uint32_t size,
 158                  const char *post_string, int socket_id,
 159                  uint16_t align, bool reuse)
 160 {
 161         char z_name[RTE_MEMZONE_NAMESIZE];
 162         const struct rte_memzone *mz;
 163
 164         snprintf(z_name, sizeof(z_name), "eth_p%d_%s",
 165                         dev->data->port_id, post_string);
 166
 167         mz = rte_memzone_lookup(z_name);
 168         if (!reuse) {
 169                 if (mz)
 170                         rte_memzone_free(mz);
 171                 return rte_memzone_reserve_aligned(z_name, size, socket_id,
 172                                 RTE_MEMZONE_IOVA_CONTIG, align);
 173         }
 174
 175         if (mz)
 176                 return mz;
 177
 178         return rte_memzone_reserve_aligned(z_name, size, socket_id,
 179                         RTE_MEMZONE_IOVA_CONTIG, align);
 180 }
 181
 182 /*
 183  * This function is based on vmxnet3_disable_intr()
 184  */
 185 static void
 186 vmxnet3_disable_intr(struct vmxnet3_hw *hw)
 187 {
 188         int i;
 189
 190         PMD_INIT_FUNC_TRACE();
 191
 192         hw->shared->devRead.intrConf.intrCtrl |= VMXNET3_IC_DISABLE_ALL;
 193         for (i = 0; i < hw->num_intrs; i++)
 194                 VMXNET3_WRITE_BAR0_REG(hw, VMXNET3_REG_IMR + i * 8, 1);
 195 }
 196
 197 static void
 198 vmxnet3_enable_intr(struct vmxnet3_hw *hw)
 199 {
 200         int i;
 201
 202         PMD_INIT_FUNC_TRACE();
 203
 204         hw->shared->devRead.intrConf.intrCtrl &= ~VMXNET3_IC_DISABLE_ALL;
 205         for (i = 0; i < hw->num_intrs; i++)
 206                 VMXNET3_WRITE_BAR0_REG(hw, VMXNET3_REG_IMR + i * 8, 0);
 207 }
 208
 209 /*
 210  * Gets tx data ring descriptor size.
 211  */
 212 static uint16_t
 213 eth_vmxnet3_txdata_get(struct vmxnet3_hw *hw)
 214 {
 215         uint16 txdata_desc_size;
 216
 217         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 218                                VMXNET3_CMD_GET_TXDATA_DESC_SIZE);
 219         txdata_desc_size = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
 220
 221         return (txdata_desc_size < VMXNET3_TXDATA_DESC_MIN_SIZE ||
 222                 txdata_desc_size > VMXNET3_TXDATA_DESC_MAX_SIZE ||
 223                 txdata_desc_size & VMXNET3_TXDATA_DESC_SIZE_MASK) ?
 224                 sizeof(struct Vmxnet3_TxDataDesc) : txdata_desc_size;
 225 }
 226
 227 /*
 228  * It returns 0 on success.
 229  */
 230 static int
 231 eth_vmxnet3_dev_init(struct rte_eth_dev *eth_dev)
 232 {
 233         struct rte_pci_device *pci_dev;
 234         struct vmxnet3_hw *hw = eth_dev->data->dev_private;
 235         uint32_t mac_hi, mac_lo, ver;
 236         struct rte_eth_link link;
 237
 238         PMD_INIT_FUNC_TRACE();
 239
 240         eth_dev->dev_ops = &vmxnet3_eth_dev_ops;
 241         eth_dev->rx_pkt_burst = &vmxnet3_recv_pkts;
 242         eth_dev->tx_pkt_burst = &vmxnet3_xmit_pkts;
 243         eth_dev->tx_pkt_prepare = vmxnet3_prep_pkts;
 244         pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
 245
 246         /*
 247          * for secondary processes, we don't initialize any further as primary
 248          * has already done this work.
 249          */
 250         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 251                 return 0;
 252
 253         rte_eth_copy_pci_info(eth_dev, pci_dev);
 254
 255         /* Vendor and Device ID need to be set before init of shared code */
 256         hw->device_id = pci_dev->id.device_id;
 257         hw->vendor_id = pci_dev->id.vendor_id;
 258         hw->hw_addr0 = (void *)pci_dev->mem_resource[0].addr;
 259         hw->hw_addr1 = (void *)pci_dev->mem_resource[1].addr;
 260
 261         hw->num_rx_queues = 1;
 262         hw->num_tx_queues = 1;
 263         hw->bufs_per_pkt = 1;
 264
 265         /* Check h/w version compatibility with driver. */
 266         ver = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_VRRS);
 267         PMD_INIT_LOG(DEBUG, "Hardware version : %d", ver);
 268
 269         if (ver & (1 << VMXNET3_REV_3)) {
 270                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_VRRS,
 271                                        1 << VMXNET3_REV_3);
 272                 hw->version = VMXNET3_REV_3 + 1;
 273         } else if (ver & (1 << VMXNET3_REV_2)) {
 274                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_VRRS,
 275                                        1 << VMXNET3_REV_2);
 276                 hw->version = VMXNET3_REV_2 + 1;
 277         } else if (ver & (1 << VMXNET3_REV_1)) {
 278                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_VRRS,
 279                                        1 << VMXNET3_REV_1);
 280                 hw->version = VMXNET3_REV_1 + 1;
 281         } else {
 282                 PMD_INIT_LOG(ERR, "Incompatible hardware version: %d", ver);
 283                 return -EIO;
 284         }
 285
 286         PMD_INIT_LOG(DEBUG, "Using device version %d\n", hw->version);
 287
 288         /* Check UPT version compatibility with driver. */
 289         ver = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_UVRS);
 290         PMD_INIT_LOG(DEBUG, "UPT hardware version : %d", ver);
 291         if (ver & 0x1)
 292                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_UVRS, 1);
 293         else {
 294                 PMD_INIT_LOG(ERR, "Incompatible UPT version.");
 295                 return -EIO;
 296         }
 297
 298         /* Getting MAC Address */
 299         mac_lo = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_MACL);
 300         mac_hi = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_MACH);
 301         memcpy(hw->perm_addr, &mac_lo, 4);
 302         memcpy(hw->perm_addr + 4, &mac_hi, 2);
 303
 304         /* Allocate memory for storing MAC addresses */
 305         eth_dev->data->mac_addrs = rte_zmalloc("vmxnet3", ETHER_ADDR_LEN *
 306                                                VMXNET3_MAX_MAC_ADDRS, 0);
 307         if (eth_dev->data->mac_addrs == NULL) {
 308                 PMD_INIT_LOG(ERR,
 309                              "Failed to allocate %d bytes needed to store MAC addresses",
 310                              ETHER_ADDR_LEN * VMXNET3_MAX_MAC_ADDRS);
 311                 return -ENOMEM;
 312         }
 313         /* Copy the permanent MAC address */
 314         ether_addr_copy((struct ether_addr *) hw->perm_addr,
 315                         &eth_dev->data->mac_addrs[0]);
 316
 317         PMD_INIT_LOG(DEBUG, "MAC Address : %02x:%02x:%02x:%02x:%02x:%02x",
 318                      hw->perm_addr[0], hw->perm_addr[1], hw->perm_addr[2],
 319                      hw->perm_addr[3], hw->perm_addr[4], hw->perm_addr[5]);
 320
 321         /* Put device in Quiesce Mode */
 322         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
 323
 324         /* allow untagged pkts */
 325         VMXNET3_SET_VFTABLE_ENTRY(hw->shadow_vfta, 0);
 326
 327         hw->txdata_desc_size = VMXNET3_VERSION_GE_3(hw) ?
 328                 eth_vmxnet3_txdata_get(hw) : sizeof(struct Vmxnet3_TxDataDesc);
 329
 330         hw->rxdata_desc_size = VMXNET3_VERSION_GE_3(hw) ?
 331                 VMXNET3_DEF_RXDATA_DESC_SIZE : 0;
 332         RTE_ASSERT((hw->rxdata_desc_size & ~VMXNET3_RXDATA_DESC_SIZE_MASK) ==
 333                    hw->rxdata_desc_size);
 334
 335         /* clear shadow stats */
 336         memset(hw->saved_tx_stats, 0, sizeof(hw->saved_tx_stats));
 337         memset(hw->saved_rx_stats, 0, sizeof(hw->saved_rx_stats));
 338
 339         /* clear snapshot stats */
 340         memset(hw->snapshot_tx_stats, 0, sizeof(hw->snapshot_tx_stats));
 341         memset(hw->snapshot_rx_stats, 0, sizeof(hw->snapshot_rx_stats));
 342
 343         /* set the initial link status */
 344         memset(&link, 0, sizeof(link));
 345         link.link_duplex = ETH_LINK_FULL_DUPLEX;
 346         link.link_speed = ETH_SPEED_NUM_10G;
 347         link.link_autoneg = ETH_LINK_FIXED;
 348         rte_eth_linkstatus_set(eth_dev, &link);
 349
 350         return 0;
 351 }
 352
 353 static int
 354 eth_vmxnet3_dev_uninit(struct rte_eth_dev *eth_dev)
 355 {
 356         struct vmxnet3_hw *hw = eth_dev->data->dev_private;
 357
 358         PMD_INIT_FUNC_TRACE();
 359
 360         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 361                 return 0;
 362
 363         if (hw->adapter_stopped == 0)
 364                 vmxnet3_dev_close(eth_dev);
 365
 366         eth_dev->dev_ops = NULL;
 367         eth_dev->rx_pkt_burst = NULL;
 368         eth_dev->tx_pkt_burst = NULL;
 369         eth_dev->tx_pkt_prepare = NULL;
 370
 371         return 0;
 372 }
 373
 374 static int eth_vmxnet3_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
 375         struct rte_pci_device *pci_dev)
 376 {
 377         return rte_eth_dev_pci_generic_probe(pci_dev,
 378                 sizeof(struct vmxnet3_hw), eth_vmxnet3_dev_init);
 379 }
 380
 381 static int eth_vmxnet3_pci_remove(struct rte_pci_device *pci_dev)
 382 {
 383         return rte_eth_dev_pci_generic_remove(pci_dev, eth_vmxnet3_dev_uninit);
 384 }
 385
 386 static struct rte_pci_driver rte_vmxnet3_pmd = {
 387         .id_table = pci_id_vmxnet3_map,
 388         .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
 389         .probe = eth_vmxnet3_pci_probe,
 390         .remove = eth_vmxnet3_pci_remove,
 391 };
 392
 393 static int
 394 vmxnet3_dev_configure(struct rte_eth_dev *dev)
 395 {
 396         const struct rte_memzone *mz;
 397         struct vmxnet3_hw *hw = dev->data->dev_private;
 398         size_t size;
 399
 400         PMD_INIT_FUNC_TRACE();
 401
 402         if (dev->data->nb_tx_queues > VMXNET3_MAX_TX_QUEUES ||
 403             dev->data->nb_rx_queues > VMXNET3_MAX_RX_QUEUES) {
 404                 PMD_INIT_LOG(ERR, "ERROR: Number of queues not supported");
 405                 return -EINVAL;
 406         }
 407
 408         if (!rte_is_power_of_2(dev->data->nb_rx_queues)) {
 409                 PMD_INIT_LOG(ERR, "ERROR: Number of rx queues not power of 2");
 410                 return -EINVAL;
 411         }
 412
 413         size = dev->data->nb_rx_queues * sizeof(struct Vmxnet3_TxQueueDesc) +
 414                 dev->data->nb_tx_queues * sizeof(struct Vmxnet3_RxQueueDesc);
 415
 416         if (size > UINT16_MAX)
 417                 return -EINVAL;
 418
 419         hw->num_rx_queues = (uint8_t)dev->data->nb_rx_queues;
 420         hw->num_tx_queues = (uint8_t)dev->data->nb_tx_queues;
 421
 422         /*
 423          * Allocate a memzone for Vmxnet3_DriverShared - Vmxnet3_DSDevRead
 424          * on current socket
 425          */
 426         mz = gpa_zone_reserve(dev, sizeof(struct Vmxnet3_DriverShared),
 427                               "shared", rte_socket_id(), 8, 1);
 428
 429         if (mz == NULL) {
 430                 PMD_INIT_LOG(ERR, "ERROR: Creating shared zone");
 431                 return -ENOMEM;
 432         }
 433         memset(mz->addr, 0, mz->len);
 434
 435         hw->shared = mz->addr;
 436         hw->sharedPA = mz->iova;
 437
 438         /*
 439          * Allocate a memzone for Vmxnet3_RxQueueDesc - Vmxnet3_TxQueueDesc
 440          * on current socket.
 441          *
 442          * We cannot reuse this memzone from previous allocation as its size
 443          * depends on the number of tx and rx queues, which could be different
 444          * from one config to another.
 445          */
 446         mz = gpa_zone_reserve(dev, size, "queuedesc", rte_socket_id(),
 447                               VMXNET3_QUEUE_DESC_ALIGN, 0);
 448         if (mz == NULL) {
 449                 PMD_INIT_LOG(ERR, "ERROR: Creating queue descriptors zone");
 450                 return -ENOMEM;
 451         }
 452         memset(mz->addr, 0, mz->len);
 453
 454         hw->tqd_start = (Vmxnet3_TxQueueDesc *)mz->addr;
 455         hw->rqd_start = (Vmxnet3_RxQueueDesc *)(hw->tqd_start + hw->num_tx_queues);
 456
 457         hw->queueDescPA = mz->iova;
 458         hw->queue_desc_len = (uint16_t)size;
 459
 460         if (dev->data->dev_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
 461                 /* Allocate memory structure for UPT1_RSSConf and configure */
 462                 mz = gpa_zone_reserve(dev, sizeof(struct VMXNET3_RSSConf),
 463                                       "rss_conf", rte_socket_id(),
 464                                       RTE_CACHE_LINE_SIZE, 1);
 465                 if (mz == NULL) {
 466                         PMD_INIT_LOG(ERR,
 467                                      "ERROR: Creating rss_conf structure zone");
 468                         return -ENOMEM;
 469                 }
 470                 memset(mz->addr, 0, mz->len);
 471
 472                 hw->rss_conf = mz->addr;
 473                 hw->rss_confPA = mz->iova;
 474         }
 475
 476         return 0;
 477 }
 478
 479 static void
 480 vmxnet3_write_mac(struct vmxnet3_hw *hw, const uint8_t *addr)
 481 {
 482         uint32_t val;
 483
 484         PMD_INIT_LOG(DEBUG,
 485                      "Writing MAC Address : %02x:%02x:%02x:%02x:%02x:%02x",
 486                      addr[0], addr[1], addr[2],
 487                      addr[3], addr[4], addr[5]);
 488
 489         memcpy(&val, addr, 4);
 490         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_MACL, val);
 491
 492         memcpy(&val, addr + 4, 2);
 493         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_MACH, val);
 494 }
 495
 496 static int
 497 vmxnet3_dev_setup_memreg(struct rte_eth_dev *dev)
 498 {
 499         struct vmxnet3_hw *hw = dev->data->dev_private;
 500         Vmxnet3_DriverShared *shared = hw->shared;
 501         Vmxnet3_CmdInfo *cmdInfo;
 502         struct rte_mempool *mp[VMXNET3_MAX_RX_QUEUES];
 503         uint8_t index[VMXNET3_MAX_RX_QUEUES + VMXNET3_MAX_TX_QUEUES];
 504         uint32_t num, i, j, size;
 505
 506         if (hw->memRegsPA == 0) {
 507                 const struct rte_memzone *mz;
 508
 509                 size = sizeof(Vmxnet3_MemRegs) +
 510                         (VMXNET3_MAX_RX_QUEUES + VMXNET3_MAX_TX_QUEUES) *
 511                         sizeof(Vmxnet3_MemoryRegion);
 512
 513                 mz = gpa_zone_reserve(dev, size, "memRegs", rte_socket_id(), 8,
 514                                       1);
 515                 if (mz == NULL) {
 516                         PMD_INIT_LOG(ERR, "ERROR: Creating memRegs zone");
 517                         return -ENOMEM;
 518                 }
 519                 memset(mz->addr, 0, mz->len);
 520                 hw->memRegs = mz->addr;
 521                 hw->memRegsPA = mz->iova;
 522         }
 523
 524         num = hw->num_rx_queues;
 525
 526         for (i = 0; i < num; i++) {
 527                 vmxnet3_rx_queue_t *rxq = dev->data->rx_queues[i];
 528
 529                 mp[i] = rxq->mp;
 530                 index[i] = 1 << i;
 531         }
 532
 533         /*
 534          * The same mempool could be used by multiple queues. In such a case,
 535          * remove duplicate mempool entries. Only one entry is kept with
 536          * bitmask indicating queues that are using this mempool.
 537          */
 538         for (i = 1; i < num; i++) {
 539                 for (j = 0; j < i; j++) {
 540                         if (mp[i] == mp[j]) {
 541                                 mp[i] = NULL;
 542                                 index[j] |= 1 << i;
 543                                 break;
 544                         }
 545                 }
 546         }
 547
 548         j = 0;
 549         for (i = 0; i < num; i++) {
 550                 if (mp[i] == NULL)
 551                         continue;
 552
 553                 Vmxnet3_MemoryRegion *mr = &hw->memRegs->memRegs[j];
 554
 555                 mr->startPA =
 556                         (uintptr_t)STAILQ_FIRST(&mp[i]->mem_list)->iova;
 557                 mr->length = STAILQ_FIRST(&mp[i]->mem_list)->len <= INT32_MAX ?
 558                         STAILQ_FIRST(&mp[i]->mem_list)->len : INT32_MAX;
 559                 mr->txQueueBits = index[i];
 560                 mr->rxQueueBits = index[i];
 561
 562                 PMD_INIT_LOG(INFO,
 563                              "index: %u startPA: %" PRIu64 " length: %u, "
 564                              "rxBits: %x",
 565                              j, mr->startPA, mr->length, mr->rxQueueBits);
 566                 j++;
 567         }
 568         hw->memRegs->numRegs = j;
 569         PMD_INIT_LOG(INFO, "numRegs: %u", j);
 570
 571         size = sizeof(Vmxnet3_MemRegs) +
 572                 (j - 1) * sizeof(Vmxnet3_MemoryRegion);
 573
 574         cmdInfo = &shared->cu.cmdInfo;
 575         cmdInfo->varConf.confVer = 1;
 576         cmdInfo->varConf.confLen = size;
 577         cmdInfo->varConf.confPA = hw->memRegsPA;
 578
 579         return 0;
 580 }
 581
 582 static int
 583 vmxnet3_setup_driver_shared(struct rte_eth_dev *dev)
 584 {
 585         struct rte_eth_conf port_conf = dev->data->dev_conf;
 586         struct vmxnet3_hw *hw = dev->data->dev_private;
 587         uint32_t mtu = dev->data->mtu;
 588         Vmxnet3_DriverShared *shared = hw->shared;
 589         Vmxnet3_DSDevRead *devRead = &shared->devRead;
 590         uint64_t rx_offloads = dev->data->dev_conf.rxmode.offloads;
 591         uint32_t i;
 592         int ret;
 593
 594         hw->mtu = mtu;
 595
 596         shared->magic = VMXNET3_REV1_MAGIC;
 597         devRead->misc.driverInfo.version = VMXNET3_DRIVER_VERSION_NUM;
 598
 599         /* Setting up Guest OS information */
 600         devRead->misc.driverInfo.gos.gosBits   = sizeof(void *) == 4 ?
 601                 VMXNET3_GOS_BITS_32 : VMXNET3_GOS_BITS_64;
 602         devRead->misc.driverInfo.gos.gosType   = VMXNET3_GOS_TYPE_LINUX;
 603         devRead->misc.driverInfo.vmxnet3RevSpt = 1;
 604         devRead->misc.driverInfo.uptVerSpt     = 1;
 605
 606         devRead->misc.mtu = rte_le_to_cpu_32(mtu);
 607         devRead->misc.queueDescPA  = hw->queueDescPA;
 608         devRead->misc.queueDescLen = hw->queue_desc_len;
 609         devRead->misc.numTxQueues  = hw->num_tx_queues;
 610         devRead->misc.numRxQueues  = hw->num_rx_queues;
 611
 612         /*
 613          * Set number of interrupts to 1
 614          * PMD by default disables all the interrupts but this is MUST
 615          * to activate device. It needs at least one interrupt for
 616          * link events to handle
 617          */
 618         hw->num_intrs = devRead->intrConf.numIntrs = 1;
 619         devRead->intrConf.intrCtrl |= VMXNET3_IC_DISABLE_ALL;
 620
 621         for (i = 0; i < hw->num_tx_queues; i++) {
 622                 Vmxnet3_TxQueueDesc *tqd = &hw->tqd_start[i];
 623                 vmxnet3_tx_queue_t *txq  = dev->data->tx_queues[i];
 624
 625                 txq->shared = &hw->tqd_start[i];
 626
 627                 tqd->ctrl.txNumDeferred  = 0;
 628                 tqd->ctrl.txThreshold    = 1;
 629                 tqd->conf.txRingBasePA   = txq->cmd_ring.basePA;
 630                 tqd->conf.compRingBasePA = txq->comp_ring.basePA;
 631                 tqd->conf.dataRingBasePA = txq->data_ring.basePA;
 632
 633                 tqd->conf.txRingSize   = txq->cmd_ring.size;
 634                 tqd->conf.compRingSize = txq->comp_ring.size;
 635                 tqd->conf.dataRingSize = txq->data_ring.size;
 636                 tqd->conf.txDataRingDescSize = txq->txdata_desc_size;
 637                 tqd->conf.intrIdx      = txq->comp_ring.intr_idx;
 638                 tqd->status.stopped    = TRUE;
 639                 tqd->status.error      = 0;
 640                 memset(&tqd->stats, 0, sizeof(tqd->stats));
 641         }
 642
 643         for (i = 0; i < hw->num_rx_queues; i++) {
 644                 Vmxnet3_RxQueueDesc *rqd  = &hw->rqd_start[i];
 645                 vmxnet3_rx_queue_t *rxq   = dev->data->rx_queues[i];
 646
 647                 rxq->shared = &hw->rqd_start[i];
 648
 649                 rqd->conf.rxRingBasePA[0] = rxq->cmd_ring[0].basePA;
 650                 rqd->conf.rxRingBasePA[1] = rxq->cmd_ring[1].basePA;
 651                 rqd->conf.compRingBasePA  = rxq->comp_ring.basePA;
 652
 653                 rqd->conf.rxRingSize[0]   = rxq->cmd_ring[0].size;
 654                 rqd->conf.rxRingSize[1]   = rxq->cmd_ring[1].size;
 655                 rqd->conf.compRingSize    = rxq->comp_ring.size;
 656                 rqd->conf.intrIdx         = rxq->comp_ring.intr_idx;
 657                 if (VMXNET3_VERSION_GE_3(hw)) {
 658                         rqd->conf.rxDataRingBasePA = rxq->data_ring.basePA;
 659                         rqd->conf.rxDataRingDescSize = rxq->data_desc_size;
 660                 }
 661                 rqd->status.stopped       = TRUE;
 662                 rqd->status.error         = 0;
 663                 memset(&rqd->stats, 0, sizeof(rqd->stats));
 664         }
 665
 666         /* RxMode set to 0 of VMXNET3_RXM_xxx */
 667         devRead->rxFilterConf.rxMode = 0;
 668
 669         /* Setting up feature flags */
 670         if (rx_offloads & DEV_RX_OFFLOAD_CHECKSUM)
 671                 devRead->misc.uptFeatures |= VMXNET3_F_RXCSUM;
 672
 673         if (rx_offloads & DEV_RX_OFFLOAD_TCP_LRO) {
 674                 devRead->misc.uptFeatures |= VMXNET3_F_LRO;
 675                 devRead->misc.maxNumRxSG = 0;
 676         }
 677
 678         if (port_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
 679                 ret = vmxnet3_rss_configure(dev);
 680                 if (ret != VMXNET3_SUCCESS)
 681                         return ret;
 682
 683                 devRead->misc.uptFeatures |= VMXNET3_F_RSS;
 684                 devRead->rssConfDesc.confVer = 1;
 685                 devRead->rssConfDesc.confLen = sizeof(struct VMXNET3_RSSConf);
 686                 devRead->rssConfDesc.confPA  = hw->rss_confPA;
 687         }
 688
 689         ret = vmxnet3_dev_vlan_offload_set(dev,
 690                         ETH_VLAN_STRIP_MASK | ETH_VLAN_FILTER_MASK);
 691         if (ret)
 692                 return ret;
 693
 694         vmxnet3_write_mac(hw, dev->data->mac_addrs->addr_bytes);
 695
 696         return VMXNET3_SUCCESS;
 697 }
 698
 699 /*
 700  * Configure device link speed and setup link.
 701  * Must be called after eth_vmxnet3_dev_init. Other wise it might fail
 702  * It returns 0 on success.
 703  */
 704 static int
 705 vmxnet3_dev_start(struct rte_eth_dev *dev)
 706 {
 707         int ret;
 708         struct vmxnet3_hw *hw = dev->data->dev_private;
 709
 710         PMD_INIT_FUNC_TRACE();
 711
 712         /* Save stats before it is reset by CMD_ACTIVATE */
 713         vmxnet3_hw_stats_save(hw);
 714
 715         ret = vmxnet3_setup_driver_shared(dev);
 716         if (ret != VMXNET3_SUCCESS)
 717                 return ret;
 718
 719         /* check if lsc interrupt feature is enabled */
 720         if (dev->data->dev_conf.intr_conf.lsc) {
 721                 struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);
 722
 723                 /* Setup interrupt callback  */
 724                 rte_intr_callback_register(&pci_dev->intr_handle,
 725                                            vmxnet3_interrupt_handler, dev);
 726
 727                 if (rte_intr_enable(&pci_dev->intr_handle) < 0) {
 728                         PMD_INIT_LOG(ERR, "interrupt enable failed");
 729                         return -EIO;
 730                 }
 731         }
 732
 733         /* Exchange shared data with device */
 734         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAL,
 735                                VMXNET3_GET_ADDR_LO(hw->sharedPA));
 736         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAH,
 737                                VMXNET3_GET_ADDR_HI(hw->sharedPA));
 738
 739         /* Activate device by register write */
 740         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_ACTIVATE_DEV);
 741         ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
 742
 743         if (ret != 0) {
 744                 PMD_INIT_LOG(ERR, "Device activation: UNSUCCESSFUL");
 745                 return -EINVAL;
 746         }
 747
 748         /* Setup memory region for rx buffers */
 749         ret = vmxnet3_dev_setup_memreg(dev);
 750         if (ret == 0) {
 751                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 752                                        VMXNET3_CMD_REGISTER_MEMREGS);
 753                 ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
 754                 if (ret != 0)
 755                         PMD_INIT_LOG(DEBUG,
 756                                      "Failed in setup memory region cmd\n");
 757                 ret = 0;
 758         } else {
 759                 PMD_INIT_LOG(DEBUG, "Failed to setup memory region\n");
 760         }
 761
 762         /* Disable interrupts */
 763         vmxnet3_disable_intr(hw);
 764
 765         /*
 766          * Load RX queues with blank mbufs and update next2fill index for device
 767          * Update RxMode of the device
 768          */
 769         ret = vmxnet3_dev_rxtx_init(dev);
 770         if (ret != VMXNET3_SUCCESS) {
 771                 PMD_INIT_LOG(ERR, "Device queue init: UNSUCCESSFUL");
 772                 return ret;
 773         }
 774
 775         hw->adapter_stopped = FALSE;
 776
 777         /* Setting proper Rx Mode and issue Rx Mode Update command */
 778         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_UCAST | VMXNET3_RXM_BCAST, 1);
 779
 780         if (dev->data->dev_conf.intr_conf.lsc) {
 781                 vmxnet3_enable_intr(hw);
 782
 783                 /*
 784                  * Update link state from device since this won't be
 785                  * done upon starting with lsc in use. This is done
 786                  * only after enabling interrupts to avoid any race
 787                  * where the link state could change without an
 788                  * interrupt being fired.
 789                  */
 790                 __vmxnet3_dev_link_update(dev, 0);
 791         }
 792
 793         return VMXNET3_SUCCESS;
 794 }
 795
 796 /*
 797  * Stop device: disable rx and tx functions to allow for reconfiguring.
 798  */
 799 static void
 800 vmxnet3_dev_stop(struct rte_eth_dev *dev)
 801 {
 802         struct rte_eth_link link;
 803         struct vmxnet3_hw *hw = dev->data->dev_private;
 804
 805         PMD_INIT_FUNC_TRACE();
 806
 807         if (hw->adapter_stopped == 1) {
 808                 PMD_INIT_LOG(DEBUG, "Device already closed.");
 809                 return;
 810         }
 811
 812         /* disable interrupts */
 813         vmxnet3_disable_intr(hw);
 814
 815         if (dev->data->dev_conf.intr_conf.lsc) {
 816                 struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);
 817
 818                 rte_intr_disable(&pci_dev->intr_handle);
 819
 820                 rte_intr_callback_unregister(&pci_dev->intr_handle,
 821                                              vmxnet3_interrupt_handler, dev);
 822         }
 823
 824         /* quiesce the device first */
 825         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
 826         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAL, 0);
 827         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAH, 0);
 828
 829         /* reset the device */
 830         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV);
 831         PMD_INIT_LOG(DEBUG, "Device reset.");
 832         hw->adapter_stopped = 0;
 833
 834         vmxnet3_dev_clear_queues(dev);
 835
 836         /* Clear recorded link status */
 837         memset(&link, 0, sizeof(link));
 838         link.link_duplex = ETH_LINK_FULL_DUPLEX;
 839         link.link_speed = ETH_SPEED_NUM_10G;
 840         link.link_autoneg = ETH_LINK_FIXED;
 841         rte_eth_linkstatus_set(dev, &link);
 842 }
 843
 844 /*
 845  * Reset and stop device.
 846  */
 847 static void
 848 vmxnet3_dev_close(struct rte_eth_dev *dev)
 849 {
 850         struct vmxnet3_hw *hw = dev->data->dev_private;
 851
 852         PMD_INIT_FUNC_TRACE();
 853
 854         vmxnet3_dev_stop(dev);
 855         hw->adapter_stopped = 1;
 856 }
 857
 858 static void
 859 vmxnet3_hw_tx_stats_get(struct vmxnet3_hw *hw, unsigned int q,
 860                         struct UPT1_TxStats *res)
 861 {
 862 #define VMXNET3_UPDATE_TX_STAT(h, i, f, r)              \
 863                 ((r)->f = (h)->tqd_start[(i)].stats.f + \
 864                         (h)->saved_tx_stats[(i)].f)
 865
 866         VMXNET3_UPDATE_TX_STAT(hw, q, ucastPktsTxOK, res);
 867         VMXNET3_UPDATE_TX_STAT(hw, q, mcastPktsTxOK, res);
 868         VMXNET3_UPDATE_TX_STAT(hw, q, bcastPktsTxOK, res);
 869         VMXNET3_UPDATE_TX_STAT(hw, q, ucastBytesTxOK, res);
 870         VMXNET3_UPDATE_TX_STAT(hw, q, mcastBytesTxOK, res);
 871         VMXNET3_UPDATE_TX_STAT(hw, q, bcastBytesTxOK, res);
 872         VMXNET3_UPDATE_TX_STAT(hw, q, pktsTxError, res);
 873         VMXNET3_UPDATE_TX_STAT(hw, q, pktsTxDiscard, res);
 874
 875 #undef VMXNET3_UPDATE_TX_STAT
 876 }
 877
 878 static void
 879 vmxnet3_hw_rx_stats_get(struct vmxnet3_hw *hw, unsigned int q,
 880                         struct UPT1_RxStats *res)
 881 {
 882 #define VMXNET3_UPDATE_RX_STAT(h, i, f, r)              \
 883                 ((r)->f = (h)->rqd_start[(i)].stats.f + \
 884                         (h)->saved_rx_stats[(i)].f)
 885
 886         VMXNET3_UPDATE_RX_STAT(hw, q, ucastPktsRxOK, res);
 887         VMXNET3_UPDATE_RX_STAT(hw, q, mcastPktsRxOK, res);
 888         VMXNET3_UPDATE_RX_STAT(hw, q, bcastPktsRxOK, res);
 889         VMXNET3_UPDATE_RX_STAT(hw, q, ucastBytesRxOK, res);
 890         VMXNET3_UPDATE_RX_STAT(hw, q, mcastBytesRxOK, res);
 891         VMXNET3_UPDATE_RX_STAT(hw, q, bcastBytesRxOK, res);
 892         VMXNET3_UPDATE_RX_STAT(hw, q, pktsRxError, res);
 893         VMXNET3_UPDATE_RX_STAT(hw, q, pktsRxOutOfBuf, res);
 894
 895 #undef VMXNET3_UPDATE_RX_STAT
 896 }
 897
 898 static void
 899 vmxnet3_tx_stats_get(struct vmxnet3_hw *hw, unsigned int q,
 900                                         struct UPT1_TxStats *res)
 901 {
 902                 vmxnet3_hw_tx_stats_get(hw, q, res);
 903
 904 #define VMXNET3_REDUCE_SNAPSHOT_TX_STAT(h, i, f, r)     \
 905                 ((r)->f -= (h)->snapshot_tx_stats[(i)].f)
 906
 907         VMXNET3_REDUCE_SNAPSHOT_TX_STAT(hw, q, ucastPktsTxOK, res);
 908         VMXNET3_REDUCE_SNAPSHOT_TX_STAT(hw, q, mcastPktsTxOK, res);
 909         VMXNET3_REDUCE_SNAPSHOT_TX_STAT(hw, q, bcastPktsTxOK, res);
 910         VMXNET3_REDUCE_SNAPSHOT_TX_STAT(hw, q, ucastBytesTxOK, res);
 911         VMXNET3_REDUCE_SNAPSHOT_TX_STAT(hw, q, mcastBytesTxOK, res);
 912         VMXNET3_REDUCE_SNAPSHOT_TX_STAT(hw, q, bcastBytesTxOK, res);
 913         VMXNET3_REDUCE_SNAPSHOT_TX_STAT(hw, q, pktsTxError, res);
 914         VMXNET3_REDUCE_SNAPSHOT_TX_STAT(hw, q, pktsTxDiscard, res);
 915
 916 #undef VMXNET3_REDUCE_SNAPSHOT_TX_STAT
 917 }
 918
 919 static void
 920 vmxnet3_rx_stats_get(struct vmxnet3_hw *hw, unsigned int q,
 921                                         struct UPT1_RxStats *res)
 922 {
 923                 vmxnet3_hw_rx_stats_get(hw, q, res);
 924
 925 #define VMXNET3_REDUCE_SNAPSHOT_RX_STAT(h, i, f, r)     \
 926                 ((r)->f -= (h)->snapshot_rx_stats[(i)].f)
 927
 928         VMXNET3_REDUCE_SNAPSHOT_RX_STAT(hw, q, ucastPktsRxOK, res);
 929         VMXNET3_REDUCE_SNAPSHOT_RX_STAT(hw, q, mcastPktsRxOK, res);
 930         VMXNET3_REDUCE_SNAPSHOT_RX_STAT(hw, q, bcastPktsRxOK, res);
 931         VMXNET3_REDUCE_SNAPSHOT_RX_STAT(hw, q, ucastBytesRxOK, res);
 932         VMXNET3_REDUCE_SNAPSHOT_RX_STAT(hw, q, mcastBytesRxOK, res);
 933         VMXNET3_REDUCE_SNAPSHOT_RX_STAT(hw, q, bcastBytesRxOK, res);
 934         VMXNET3_REDUCE_SNAPSHOT_RX_STAT(hw, q, pktsRxError, res);
 935         VMXNET3_REDUCE_SNAPSHOT_RX_STAT(hw, q, pktsRxOutOfBuf, res);
 936
 937 #undef VMXNET3_REDUCE_SNAPSHOT_RX_STAT
 938 }
 939
 940 static void
 941 vmxnet3_hw_stats_save(struct vmxnet3_hw *hw)
 942 {
 943         unsigned int i;
 944
 945         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS);
 946
 947         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_TX_QUEUES);
 948
 949         for (i = 0; i < hw->num_tx_queues; i++)
 950                 vmxnet3_hw_tx_stats_get(hw, i, &hw->saved_tx_stats[i]);
 951         for (i = 0; i < hw->num_rx_queues; i++)
 952                 vmxnet3_hw_rx_stats_get(hw, i, &hw->saved_rx_stats[i]);
 953 }
 954
 955 static int
 956 vmxnet3_dev_xstats_get_names(struct rte_eth_dev *dev,
 957                              struct rte_eth_xstat_name *xstats_names,
 958                              unsigned int n)
 959 {
 960         unsigned int i, t, count = 0;
 961         unsigned int nstats =
 962                 dev->data->nb_tx_queues * RTE_DIM(vmxnet3_txq_stat_strings) +
 963                 dev->data->nb_rx_queues * RTE_DIM(vmxnet3_rxq_stat_strings);
 964
 965         if (!xstats_names || n < nstats)
 966                 return nstats;
 967
 968         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 969                 if (!dev->data->rx_queues[i])
 970                         continue;
 971
 972                 for (t = 0; t < RTE_DIM(vmxnet3_rxq_stat_strings); t++) {
 973                         snprintf(xstats_names[count].name,
 974                                  sizeof(xstats_names[count].name),
 975                                  "rx_q%u_%s", i,
 976                                  vmxnet3_rxq_stat_strings[t].name);
 977                         count++;
 978                 }
 979         }
 980
 981         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 982                 if (!dev->data->tx_queues[i])
 983                         continue;
 984
 985                 for (t = 0; t < RTE_DIM(vmxnet3_txq_stat_strings); t++) {
 986                         snprintf(xstats_names[count].name,
 987                                  sizeof(xstats_names[count].name),
 988                                  "tx_q%u_%s", i,
 989                                  vmxnet3_txq_stat_strings[t].name);
 990                         count++;
 991                 }
 992         }
 993
 994         return count;
 995 }
 996
 997 static int
 998 vmxnet3_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
 999                        unsigned int n)
1000 {
1001         unsigned int i, t, count = 0;
1002         unsigned int nstats =
1003                 dev->data->nb_tx_queues * RTE_DIM(vmxnet3_txq_stat_strings) +
1004                 dev->data->nb_rx_queues * RTE_DIM(vmxnet3_rxq_stat_strings);
1005
1006         if (n < nstats)
1007                 return nstats;
1008
1009         for (i = 0; i < dev->data->nb_rx_queues; i++) {
1010                 struct vmxnet3_rx_queue *rxq = dev->data->rx_queues[i];
1011
1012                 if (rxq == NULL)
1013                         continue;
1014
1015                 for (t = 0; t < RTE_DIM(vmxnet3_rxq_stat_strings); t++) {
1016                         xstats[count].value = *(uint64_t *)(((char *)&rxq->stats) +
1017                                 vmxnet3_rxq_stat_strings[t].offset);
1018                         xstats[count].id = count;
1019                         count++;
1020                 }
1021         }
1022
1023         for (i = 0; i < dev->data->nb_tx_queues; i++) {
1024                 struct vmxnet3_tx_queue *txq = dev->data->tx_queues[i];
1025
1026                 if (txq == NULL)
1027                         continue;
1028
1029                 for (t = 0; t < RTE_DIM(vmxnet3_txq_stat_strings); t++) {
1030                         xstats[count].value = *(uint64_t *)(((char *)&txq->stats) +
1031                                 vmxnet3_txq_stat_strings[t].offset);
1032                         xstats[count].id = count;
1033                         count++;
1034                 }
1035         }
1036
1037         return count;
1038 }
1039
1040 static int
1041 vmxnet3_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
1042 {
1043         unsigned int i;
1044         struct vmxnet3_hw *hw = dev->data->dev_private;
1045         struct UPT1_TxStats txStats;
1046         struct UPT1_RxStats rxStats;
1047
1048         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS);
1049
1050         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_TX_QUEUES);
1051         for (i = 0; i < hw->num_tx_queues; i++) {
1052                 vmxnet3_tx_stats_get(hw, i, &txStats);
1053
1054                 stats->q_opackets[i] = txStats.ucastPktsTxOK +
1055                         txStats.mcastPktsTxOK +
1056                         txStats.bcastPktsTxOK;
1057
1058                 stats->q_obytes[i] = txStats.ucastBytesTxOK +
1059                         txStats.mcastBytesTxOK +
1060                         txStats.bcastBytesTxOK;
1061
1062                 stats->opackets += stats->q_opackets[i];
1063                 stats->obytes += stats->q_obytes[i];
1064                 stats->oerrors += txStats.pktsTxError + txStats.pktsTxDiscard;
1065         }
1066
1067         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_RX_QUEUES);
1068         for (i = 0; i < hw->num_rx_queues; i++) {
1069                 vmxnet3_rx_stats_get(hw, i, &rxStats);
1070
1071                 stats->q_ipackets[i] = rxStats.ucastPktsRxOK +
1072                         rxStats.mcastPktsRxOK +
1073                         rxStats.bcastPktsRxOK;
1074
1075                 stats->q_ibytes[i] = rxStats.ucastBytesRxOK +
1076                         rxStats.mcastBytesRxOK +
1077                         rxStats.bcastBytesRxOK;
1078
1079                 stats->ipackets += stats->q_ipackets[i];
1080                 stats->ibytes += stats->q_ibytes[i];
1081
1082                 stats->q_errors[i] = rxStats.pktsRxError;
1083                 stats->ierrors += rxStats.pktsRxError;
1084                 stats->imissed += rxStats.pktsRxOutOfBuf;
1085         }
1086
1087         return 0;
1088 }
1089
1090 static void
1091 vmxnet3_dev_stats_reset(struct rte_eth_dev *dev)
1092 {
1093         unsigned int i;
1094         struct vmxnet3_hw *hw = dev->data->dev_private;
1095         struct UPT1_TxStats txStats;
1096         struct UPT1_RxStats rxStats;
1097
1098         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS);
1099
1100         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_TX_QUEUES);
1101
1102         for (i = 0; i < hw->num_tx_queues; i++) {
1103                 vmxnet3_hw_tx_stats_get(hw, i, &txStats);
1104                 memcpy(&hw->snapshot_tx_stats[i], &txStats,
1105                         sizeof(hw->snapshot_tx_stats[0]));
1106         }
1107         for (i = 0; i < hw->num_rx_queues; i++) {
1108                 vmxnet3_hw_rx_stats_get(hw, i, &rxStats);
1109                 memcpy(&hw->snapshot_rx_stats[i], &rxStats,
1110                         sizeof(hw->snapshot_rx_stats[0]));
1111         }
1112 }
1113
1114 static void
1115 vmxnet3_dev_info_get(struct rte_eth_dev *dev __rte_unused,
1116                      struct rte_eth_dev_info *dev_info)
1117 {
1118         dev_info->max_rx_queues = VMXNET3_MAX_RX_QUEUES;
1119         dev_info->max_tx_queues = VMXNET3_MAX_TX_QUEUES;
1120         dev_info->min_rx_bufsize = 1518 + RTE_PKTMBUF_HEADROOM;
1121         dev_info->max_rx_pktlen = 16384; /* includes CRC, cf MAXFRS register */
1122         dev_info->speed_capa = ETH_LINK_SPEED_10G;
1123         dev_info->max_mac_addrs = VMXNET3_MAX_MAC_ADDRS;
1124
1125         dev_info->flow_type_rss_offloads = VMXNET3_RSS_OFFLOAD_ALL;
1126
1127         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
1128                 .nb_max = VMXNET3_RX_RING_MAX_SIZE,
1129                 .nb_min = VMXNET3_DEF_RX_RING_SIZE,
1130                 .nb_align = 1,
1131         };
1132
1133         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
1134                 .nb_max = VMXNET3_TX_RING_MAX_SIZE,
1135                 .nb_min = VMXNET3_DEF_TX_RING_SIZE,
1136                 .nb_align = 1,
1137                 .nb_seg_max = VMXNET3_TX_MAX_SEG,
1138                 .nb_mtu_seg_max = VMXNET3_MAX_TXD_PER_PKT,
1139         };
1140
1141         dev_info->rx_offload_capa = VMXNET3_RX_OFFLOAD_CAP;
1142         dev_info->rx_queue_offload_capa = 0;
1143         dev_info->tx_offload_capa = VMXNET3_TX_OFFLOAD_CAP;
1144         dev_info->tx_queue_offload_capa = 0;
1145 }
1146
1147 static const uint32_t *
1148 vmxnet3_dev_supported_ptypes_get(struct rte_eth_dev *dev)
1149 {
1150         static const uint32_t ptypes[] = {
1151                 RTE_PTYPE_L3_IPV4_EXT,
1152                 RTE_PTYPE_L3_IPV4,
1153                 RTE_PTYPE_UNKNOWN
1154         };
1155
1156         if (dev->rx_pkt_burst == vmxnet3_recv_pkts)
1157                 return ptypes;
1158         return NULL;
1159 }
1160
1161 static int
1162 vmxnet3_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr)
1163 {
1164         struct vmxnet3_hw *hw = dev->data->dev_private;
1165
1166         ether_addr_copy(mac_addr, (struct ether_addr *)(hw->perm_addr));
1167         vmxnet3_write_mac(hw, mac_addr->addr_bytes);
1168         return 0;
1169 }
1170
1171 /* return 0 means link status changed, -1 means not changed */
1172 static int
1173 __vmxnet3_dev_link_update(struct rte_eth_dev *dev,
1174                           __rte_unused int wait_to_complete)
1175 {
1176         struct vmxnet3_hw *hw = dev->data->dev_private;
1177         struct rte_eth_link link;
1178         uint32_t ret;
1179
1180         memset(&link, 0, sizeof(link));
1181
1182         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK);
1183         ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
1184
1185         if (ret & 0x1)
1186                 link.link_status = ETH_LINK_UP;
1187         link.link_duplex = ETH_LINK_FULL_DUPLEX;
1188         link.link_speed = ETH_SPEED_NUM_10G;
1189         link.link_autoneg = ETH_LINK_FIXED;
1190
1191         return rte_eth_linkstatus_set(dev, &link);
1192 }
1193
1194 static int
1195 vmxnet3_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete)
1196 {
1197         /* Link status doesn't change for stopped dev */
1198         if (dev->data->dev_started == 0)
1199                 return -1;
1200
1201         return __vmxnet3_dev_link_update(dev, wait_to_complete);
1202 }
1203
1204 /* Updating rxmode through Vmxnet3_DriverShared structure in adapter */
1205 static void
1206 vmxnet3_dev_set_rxmode(struct vmxnet3_hw *hw, uint32_t feature, int set)
1207 {
1208         struct Vmxnet3_RxFilterConf *rxConf = &hw->shared->devRead.rxFilterConf;
1209
1210         if (set)
1211                 rxConf->rxMode = rxConf->rxMode | feature;
1212         else
1213                 rxConf->rxMode = rxConf->rxMode & (~feature);
1214
1215         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_UPDATE_RX_MODE);
1216 }
1217
1218 /* Promiscuous supported only if Vmxnet3_DriverShared is initialized in adapter */
1219 static void
1220 vmxnet3_dev_promiscuous_enable(struct rte_eth_dev *dev)
1221 {
1222         struct vmxnet3_hw *hw = dev->data->dev_private;
1223         uint32_t *vf_table = hw->shared->devRead.rxFilterConf.vfTable;
1224
1225         memset(vf_table, 0, VMXNET3_VFT_TABLE_SIZE);
1226         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 1);
1227
1228         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1229                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1230 }
1231
1232 /* Promiscuous supported only if Vmxnet3_DriverShared is initialized in adapter */
1233 static void
1234 vmxnet3_dev_promiscuous_disable(struct rte_eth_dev *dev)
1235 {
1236         struct vmxnet3_hw *hw = dev->data->dev_private;
1237         uint32_t *vf_table = hw->shared->devRead.rxFilterConf.vfTable;
1238         uint64_t rx_offloads = dev->data->dev_conf.rxmode.offloads;
1239
1240         if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
1241                 memcpy(vf_table, hw->shadow_vfta, VMXNET3_VFT_TABLE_SIZE);
1242         else
1243                 memset(vf_table, 0xff, VMXNET3_VFT_TABLE_SIZE);
1244         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 0);
1245         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1246                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1247 }
1248
1249 /* Allmulticast supported only if Vmxnet3_DriverShared is initialized in adapter */
1250 static void
1251 vmxnet3_dev_allmulticast_enable(struct rte_eth_dev *dev)
1252 {
1253         struct vmxnet3_hw *hw = dev->data->dev_private;
1254
1255         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_ALL_MULTI, 1);
1256 }
1257
1258 /* Allmulticast supported only if Vmxnet3_DriverShared is initialized in adapter */
1259 static void
1260 vmxnet3_dev_allmulticast_disable(struct rte_eth_dev *dev)
1261 {
1262         struct vmxnet3_hw *hw = dev->data->dev_private;
1263
1264         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_ALL_MULTI, 0);
1265 }
1266
1267 /* Enable/disable filter on vlan */
1268 static int
1269 vmxnet3_dev_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vid, int on)
1270 {
1271         struct vmxnet3_hw *hw = dev->data->dev_private;
1272         struct Vmxnet3_RxFilterConf *rxConf = &hw->shared->devRead.rxFilterConf;
1273         uint32_t *vf_table = rxConf->vfTable;
1274
1275         /* save state for restore */
1276         if (on)
1277                 VMXNET3_SET_VFTABLE_ENTRY(hw->shadow_vfta, vid);
1278         else
1279                 VMXNET3_CLEAR_VFTABLE_ENTRY(hw->shadow_vfta, vid);
1280
1281         /* don't change active filter if in promiscuous mode */
1282         if (rxConf->rxMode & VMXNET3_RXM_PROMISC)
1283                 return 0;
1284
1285         /* set in hardware */
1286         if (on)
1287                 VMXNET3_SET_VFTABLE_ENTRY(vf_table, vid);
1288         else
1289                 VMXNET3_CLEAR_VFTABLE_ENTRY(vf_table, vid);
1290
1291         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1292                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1293         return 0;
1294 }
1295
1296 static int
1297 vmxnet3_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1298 {
1299         struct vmxnet3_hw *hw = dev->data->dev_private;
1300         Vmxnet3_DSDevRead *devRead = &hw->shared->devRead;
1301         uint32_t *vf_table = devRead->rxFilterConf.vfTable;
1302         uint64_t rx_offloads = dev->data->dev_conf.rxmode.offloads;
1303
1304         if (mask & ETH_VLAN_STRIP_MASK) {
1305                 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
1306                         devRead->misc.uptFeatures |= UPT1_F_RXVLAN;
1307                 else
1308                         devRead->misc.uptFeatures &= ~UPT1_F_RXVLAN;
1309
1310                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1311                                        VMXNET3_CMD_UPDATE_FEATURE);
1312         }
1313
1314         if (mask & ETH_VLAN_FILTER_MASK) {
1315                 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
1316                         memcpy(vf_table, hw->shadow_vfta, VMXNET3_VFT_TABLE_SIZE);
1317                 else
1318                         memset(vf_table, 0xff, VMXNET3_VFT_TABLE_SIZE);
1319
1320                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1321                                        VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1322         }
1323
1324         return 0;
1325 }
1326
1327 static void
1328 vmxnet3_process_events(struct rte_eth_dev *dev)
1329 {
1330         struct vmxnet3_hw *hw = dev->data->dev_private;
1331         uint32_t events = hw->shared->ecr;
1332
1333         if (!events)
1334                 return;
1335
1336         /*
1337          * ECR bits when written with 1b are cleared. Hence write
1338          * events back to ECR so that the bits which were set will be reset.
1339          */
1340         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_ECR, events);
1341
1342         /* Check if link state has changed */
1343         if (events & VMXNET3_ECR_LINK) {
1344                 PMD_DRV_LOG(DEBUG, "Process events: VMXNET3_ECR_LINK event");
1345                 if (vmxnet3_dev_link_update(dev, 0) == 0)
1346                         _rte_eth_dev_callback_process(dev,
1347                                                       RTE_ETH_EVENT_INTR_LSC,
1348                                                       NULL);
1349         }
1350
1351         /* Check if there is an error on xmit/recv queues */
1352         if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) {
1353                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1354                                        VMXNET3_CMD_GET_QUEUE_STATUS);
1355
1356                 if (hw->tqd_start->status.stopped)
1357                         PMD_DRV_LOG(ERR, "tq error 0x%x",
1358                                     hw->tqd_start->status.error);
1359
1360                 if (hw->rqd_start->status.stopped)
1361                         PMD_DRV_LOG(ERR, "rq error 0x%x",
1362                                      hw->rqd_start->status.error);
1363
1364                 /* Reset the device */
1365                 /* Have to reset the device */
1366         }
1367
1368         if (events & VMXNET3_ECR_DIC)
1369                 PMD_DRV_LOG(DEBUG, "Device implementation change event.");
1370
1371         if (events & VMXNET3_ECR_DEBUG)
1372                 PMD_DRV_LOG(DEBUG, "Debug event generated by device.");
1373 }
1374
1375 static void
1376 vmxnet3_interrupt_handler(void *param)
1377 {
1378         struct rte_eth_dev *dev = param;
1379         struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);
1380
1381         vmxnet3_process_events(dev);
1382
1383         if (rte_intr_enable(&pci_dev->intr_handle) < 0)
1384                 PMD_DRV_LOG(ERR, "interrupt enable failed");
1385 }
1386
1387 RTE_PMD_REGISTER_PCI(net_vmxnet3, rte_vmxnet3_pmd);
1388 RTE_PMD_REGISTER_PCI_TABLE(net_vmxnet3, pci_id_vmxnet3_map);
1389 RTE_PMD_REGISTER_KMOD_DEP(net_vmxnet3, "* igb_uio | uio_pci_generic | vfio-pci");
1390
1391 RTE_INIT(vmxnet3_init_log)
1392 {
1393         vmxnet3_logtype_init = rte_log_register("pmd.net.vmxnet3.init");
1394         if (vmxnet3_logtype_init >= 0)
1395                 rte_log_set_level(vmxnet3_logtype_init, RTE_LOG_NOTICE);
1396         vmxnet3_logtype_driver = rte_log_register("pmd.net.vmxnet3.driver");
1397         if (vmxnet3_logtype_driver >= 0)
1398                 rte_log_set_level(vmxnet3_logtype_driver, RTE_LOG_NOTICE);
1399 }