drivers/net/vmxnet3/vmxnet3_ethdev.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2010-2015 Intel Corporation
   3  */
   4
   5 #include <sys/queue.h>
   6 #include <stdio.h>
   7 #include <errno.h>
   8 #include <stdint.h>
   9 #include <string.h>
  10 #include <unistd.h>
  11 #include <stdarg.h>
  12 #include <fcntl.h>
  13 #include <inttypes.h>
  14 #include <rte_byteorder.h>
  15 #include <rte_common.h>
  16 #include <rte_cycles.h>
  17
  18 #include <rte_interrupts.h>
  19 #include <rte_log.h>
  20 #include <rte_debug.h>
  21 #include <rte_pci.h>
  22 #include <rte_bus_pci.h>
  23 #include <rte_branch_prediction.h>
  24 #include <rte_memory.h>
  25 #include <rte_memzone.h>
  26 #include <rte_eal.h>
  27 #include <rte_alarm.h>
  28 #include <rte_ether.h>
  29 #include <rte_ethdev_driver.h>
  30 #include <rte_ethdev_pci.h>
  31 #include <rte_string_fns.h>
  32 #include <rte_malloc.h>
  33 #include <rte_dev.h>
  34
  35 #include "base/vmxnet3_defs.h"
  36
  37 #include "vmxnet3_ring.h"
  38 #include "vmxnet3_logs.h"
  39 #include "vmxnet3_ethdev.h"
  40
  41 #define PROCESS_SYS_EVENTS 0
  42
  43 #define VMXNET3_TX_MAX_SEG      UINT8_MAX
  44
  45 #define VMXNET3_TX_OFFLOAD_CAP          \
  46         (DEV_TX_OFFLOAD_VLAN_INSERT |   \
  47          DEV_TX_OFFLOAD_IPV4_CKSUM |    \
  48          DEV_TX_OFFLOAD_TCP_CKSUM |     \
  49          DEV_TX_OFFLOAD_UDP_CKSUM |     \
  50          DEV_TX_OFFLOAD_TCP_TSO |       \
  51          DEV_TX_OFFLOAD_MULTI_SEGS)
  52
  53 #define VMXNET3_RX_OFFLOAD_CAP          \
  54         (DEV_RX_OFFLOAD_VLAN_STRIP |    \
  55          DEV_RX_OFFLOAD_SCATTER |       \
  56          DEV_RX_OFFLOAD_IPV4_CKSUM |    \
  57          DEV_RX_OFFLOAD_UDP_CKSUM |     \
  58          DEV_RX_OFFLOAD_TCP_CKSUM |     \
  59          DEV_RX_OFFLOAD_TCP_LRO |       \
  60          DEV_RX_OFFLOAD_JUMBO_FRAME)
  61
  62 static int eth_vmxnet3_dev_init(struct rte_eth_dev *eth_dev);
  63 static int eth_vmxnet3_dev_uninit(struct rte_eth_dev *eth_dev);
  64 static int vmxnet3_dev_configure(struct rte_eth_dev *dev);
  65 static int vmxnet3_dev_start(struct rte_eth_dev *dev);
  66 static void vmxnet3_dev_stop(struct rte_eth_dev *dev);
  67 static void vmxnet3_dev_close(struct rte_eth_dev *dev);
  68 static void vmxnet3_dev_set_rxmode(struct vmxnet3_hw *hw, uint32_t feature, int set);
  69 static void vmxnet3_dev_promiscuous_enable(struct rte_eth_dev *dev);
  70 static void vmxnet3_dev_promiscuous_disable(struct rte_eth_dev *dev);
  71 static void vmxnet3_dev_allmulticast_enable(struct rte_eth_dev *dev);
  72 static void vmxnet3_dev_allmulticast_disable(struct rte_eth_dev *dev);
  73 static int __vmxnet3_dev_link_update(struct rte_eth_dev *dev,
  74                                      int wait_to_complete);
  75 static int vmxnet3_dev_link_update(struct rte_eth_dev *dev,
  76                                    int wait_to_complete);
  77 static void vmxnet3_hw_stats_save(struct vmxnet3_hw *hw);
  78 static int vmxnet3_dev_stats_get(struct rte_eth_dev *dev,
  79                                   struct rte_eth_stats *stats);
  80 static void vmxnet3_dev_stats_reset(struct rte_eth_dev *dev);
  81 static int vmxnet3_dev_xstats_get_names(struct rte_eth_dev *dev,
  82                                         struct rte_eth_xstat_name *xstats,
  83                                         unsigned int n);
  84 static int vmxnet3_dev_xstats_get(struct rte_eth_dev *dev,
  85                                   struct rte_eth_xstat *xstats, unsigned int n);
  86 static void vmxnet3_dev_info_get(struct rte_eth_dev *dev,
  87                                  struct rte_eth_dev_info *dev_info);
  88 static const uint32_t *
  89 vmxnet3_dev_supported_ptypes_get(struct rte_eth_dev *dev);
  90 static int vmxnet3_dev_vlan_filter_set(struct rte_eth_dev *dev,
  91                                        uint16_t vid, int on);
  92 static int vmxnet3_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask);
  93 static int vmxnet3_mac_addr_set(struct rte_eth_dev *dev,
  94                                  struct ether_addr *mac_addr);
  95 static void vmxnet3_interrupt_handler(void *param);
  96
  97 int vmxnet3_logtype_init;
  98 int vmxnet3_logtype_driver;
  99
 100 /*
 101  * The set of PCI devices this driver supports
 102  */
 103 #define VMWARE_PCI_VENDOR_ID 0x15AD
 104 #define VMWARE_DEV_ID_VMXNET3 0x07B0
 105 static const struct rte_pci_id pci_id_vmxnet3_map[] = {
 106         { RTE_PCI_DEVICE(VMWARE_PCI_VENDOR_ID, VMWARE_DEV_ID_VMXNET3) },
 107         { .vendor_id = 0, /* sentinel */ },
 108 };
 109
 110 static const struct eth_dev_ops vmxnet3_eth_dev_ops = {
 111         .dev_configure        = vmxnet3_dev_configure,
 112         .dev_start            = vmxnet3_dev_start,
 113         .dev_stop             = vmxnet3_dev_stop,
 114         .dev_close            = vmxnet3_dev_close,
 115         .promiscuous_enable   = vmxnet3_dev_promiscuous_enable,
 116         .promiscuous_disable  = vmxnet3_dev_promiscuous_disable,
 117         .allmulticast_enable  = vmxnet3_dev_allmulticast_enable,
 118         .allmulticast_disable = vmxnet3_dev_allmulticast_disable,
 119         .link_update          = vmxnet3_dev_link_update,
 120         .stats_get            = vmxnet3_dev_stats_get,
 121         .xstats_get_names     = vmxnet3_dev_xstats_get_names,
 122         .xstats_get           = vmxnet3_dev_xstats_get,
 123         .stats_reset          = vmxnet3_dev_stats_reset,
 124         .mac_addr_set         = vmxnet3_mac_addr_set,
 125         .dev_infos_get        = vmxnet3_dev_info_get,
 126         .dev_supported_ptypes_get = vmxnet3_dev_supported_ptypes_get,
 127         .vlan_filter_set      = vmxnet3_dev_vlan_filter_set,
 128         .vlan_offload_set     = vmxnet3_dev_vlan_offload_set,
 129         .rx_queue_setup       = vmxnet3_dev_rx_queue_setup,
 130         .rx_queue_release     = vmxnet3_dev_rx_queue_release,
 131         .tx_queue_setup       = vmxnet3_dev_tx_queue_setup,
 132         .tx_queue_release     = vmxnet3_dev_tx_queue_release,
 133 };
 134
 135 struct vmxnet3_xstats_name_off {
 136         char name[RTE_ETH_XSTATS_NAME_SIZE];
 137         unsigned int offset;
 138 };
 139
 140 /* tx_qX_ is prepended to the name string here */
 141 static const struct vmxnet3_xstats_name_off vmxnet3_txq_stat_strings[] = {
 142         {"drop_total",         offsetof(struct vmxnet3_txq_stats, drop_total)},
 143         {"drop_too_many_segs", offsetof(struct vmxnet3_txq_stats, drop_too_many_segs)},
 144         {"drop_tso",           offsetof(struct vmxnet3_txq_stats, drop_tso)},
 145         {"tx_ring_full",       offsetof(struct vmxnet3_txq_stats, tx_ring_full)},
 146 };
 147
 148 /* rx_qX_ is prepended to the name string here */
 149 static const struct vmxnet3_xstats_name_off vmxnet3_rxq_stat_strings[] = {
 150         {"drop_total",           offsetof(struct vmxnet3_rxq_stats, drop_total)},
 151         {"drop_err",             offsetof(struct vmxnet3_rxq_stats, drop_err)},
 152         {"drop_fcs",             offsetof(struct vmxnet3_rxq_stats, drop_fcs)},
 153         {"rx_buf_alloc_failure", offsetof(struct vmxnet3_rxq_stats, rx_buf_alloc_failure)},
 154 };
 155
 156 static const struct rte_memzone *
 157 gpa_zone_reserve(struct rte_eth_dev *dev, uint32_t size,
 158                  const char *post_string, int socket_id,
 159                  uint16_t align, bool reuse)
 160 {
 161         char z_name[RTE_MEMZONE_NAMESIZE];
 162         const struct rte_memzone *mz;
 163
 164         snprintf(z_name, sizeof(z_name), "eth_p%d_%s",
 165                         dev->data->port_id, post_string);
 166
 167         mz = rte_memzone_lookup(z_name);
 168         if (!reuse) {
 169                 if (mz)
 170                         rte_memzone_free(mz);
 171                 return rte_memzone_reserve_aligned(z_name, size, socket_id,
 172                                 RTE_MEMZONE_IOVA_CONTIG, align);
 173         }
 174
 175         if (mz)
 176                 return mz;
 177
 178         return rte_memzone_reserve_aligned(z_name, size, socket_id,
 179                         RTE_MEMZONE_IOVA_CONTIG, align);
 180 }
 181
 182 /*
 183  * This function is based on vmxnet3_disable_intr()
 184  */
 185 static void
 186 vmxnet3_disable_intr(struct vmxnet3_hw *hw)
 187 {
 188         int i;
 189
 190         PMD_INIT_FUNC_TRACE();
 191
 192         hw->shared->devRead.intrConf.intrCtrl |= VMXNET3_IC_DISABLE_ALL;
 193         for (i = 0; i < hw->num_intrs; i++)
 194                 VMXNET3_WRITE_BAR0_REG(hw, VMXNET3_REG_IMR + i * 8, 1);
 195 }
 196
 197 static void
 198 vmxnet3_enable_intr(struct vmxnet3_hw *hw)
 199 {
 200         int i;
 201
 202         PMD_INIT_FUNC_TRACE();
 203
 204         hw->shared->devRead.intrConf.intrCtrl &= ~VMXNET3_IC_DISABLE_ALL;
 205         for (i = 0; i < hw->num_intrs; i++)
 206                 VMXNET3_WRITE_BAR0_REG(hw, VMXNET3_REG_IMR + i * 8, 0);
 207 }
 208
 209 /*
 210  * Gets tx data ring descriptor size.
 211  */
 212 static uint16_t
 213 eth_vmxnet3_txdata_get(struct vmxnet3_hw *hw)
 214 {
 215         uint16 txdata_desc_size;
 216
 217         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 218                                VMXNET3_CMD_GET_TXDATA_DESC_SIZE);
 219         txdata_desc_size = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
 220
 221         return (txdata_desc_size < VMXNET3_TXDATA_DESC_MIN_SIZE ||
 222                 txdata_desc_size > VMXNET3_TXDATA_DESC_MAX_SIZE ||
 223                 txdata_desc_size & VMXNET3_TXDATA_DESC_SIZE_MASK) ?
 224                 sizeof(struct Vmxnet3_TxDataDesc) : txdata_desc_size;
 225 }
 226
 227 /*
 228  * It returns 0 on success.
 229  */
 230 static int
 231 eth_vmxnet3_dev_init(struct rte_eth_dev *eth_dev)
 232 {
 233         struct rte_pci_device *pci_dev;
 234         struct vmxnet3_hw *hw = eth_dev->data->dev_private;
 235         uint32_t mac_hi, mac_lo, ver;
 236         struct rte_eth_link link;
 237
 238         PMD_INIT_FUNC_TRACE();
 239
 240         eth_dev->dev_ops = &vmxnet3_eth_dev_ops;
 241         eth_dev->rx_pkt_burst = &vmxnet3_recv_pkts;
 242         eth_dev->tx_pkt_burst = &vmxnet3_xmit_pkts;
 243         eth_dev->tx_pkt_prepare = vmxnet3_prep_pkts;
 244         pci_dev = RTE_ETH_DEV_TO_PCI(eth_dev);
 245
 246         /*
 247          * for secondary processes, we don't initialize any further as primary
 248          * has already done this work.
 249          */
 250         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 251                 return 0;
 252
 253         rte_eth_copy_pci_info(eth_dev, pci_dev);
 254
 255         /* Vendor and Device ID need to be set before init of shared code */
 256         hw->device_id = pci_dev->id.device_id;
 257         hw->vendor_id = pci_dev->id.vendor_id;
 258         hw->hw_addr0 = (void *)pci_dev->mem_resource[0].addr;
 259         hw->hw_addr1 = (void *)pci_dev->mem_resource[1].addr;
 260
 261         hw->num_rx_queues = 1;
 262         hw->num_tx_queues = 1;
 263         hw->bufs_per_pkt = 1;
 264
 265         /* Check h/w version compatibility with driver. */
 266         ver = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_VRRS);
 267         PMD_INIT_LOG(DEBUG, "Hardware version : %d", ver);
 268
 269         if (ver & (1 << VMXNET3_REV_3)) {
 270                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_VRRS,
 271                                        1 << VMXNET3_REV_3);
 272                 hw->version = VMXNET3_REV_3 + 1;
 273         } else if (ver & (1 << VMXNET3_REV_2)) {
 274                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_VRRS,
 275                                        1 << VMXNET3_REV_2);
 276                 hw->version = VMXNET3_REV_2 + 1;
 277         } else if (ver & (1 << VMXNET3_REV_1)) {
 278                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_VRRS,
 279                                        1 << VMXNET3_REV_1);
 280                 hw->version = VMXNET3_REV_1 + 1;
 281         } else {
 282                 PMD_INIT_LOG(ERR, "Incompatible hardware version: %d", ver);
 283                 return -EIO;
 284         }
 285
 286         PMD_INIT_LOG(DEBUG, "Using device version %d\n", hw->version);
 287
 288         /* Check UPT version compatibility with driver. */
 289         ver = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_UVRS);
 290         PMD_INIT_LOG(DEBUG, "UPT hardware version : %d", ver);
 291         if (ver & 0x1)
 292                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_UVRS, 1);
 293         else {
 294                 PMD_INIT_LOG(ERR, "Incompatible UPT version.");
 295                 return -EIO;
 296         }
 297
 298         /* Getting MAC Address */
 299         mac_lo = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_MACL);
 300         mac_hi = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_MACH);
 301         memcpy(hw->perm_addr, &mac_lo, 4);
 302         memcpy(hw->perm_addr + 4, &mac_hi, 2);
 303
 304         /* Allocate memory for storing MAC addresses */
 305         eth_dev->data->mac_addrs = rte_zmalloc("vmxnet3", ETHER_ADDR_LEN *
 306                                                VMXNET3_MAX_MAC_ADDRS, 0);
 307         if (eth_dev->data->mac_addrs == NULL) {
 308                 PMD_INIT_LOG(ERR,
 309                              "Failed to allocate %d bytes needed to store MAC addresses",
 310                              ETHER_ADDR_LEN * VMXNET3_MAX_MAC_ADDRS);
 311                 return -ENOMEM;
 312         }
 313         /* Copy the permanent MAC address */
 314         ether_addr_copy((struct ether_addr *) hw->perm_addr,
 315                         &eth_dev->data->mac_addrs[0]);
 316
 317         PMD_INIT_LOG(DEBUG, "MAC Address : %02x:%02x:%02x:%02x:%02x:%02x",
 318                      hw->perm_addr[0], hw->perm_addr[1], hw->perm_addr[2],
 319                      hw->perm_addr[3], hw->perm_addr[4], hw->perm_addr[5]);
 320
 321         /* Put device in Quiesce Mode */
 322         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
 323
 324         /* allow untagged pkts */
 325         VMXNET3_SET_VFTABLE_ENTRY(hw->shadow_vfta, 0);
 326
 327         hw->txdata_desc_size = VMXNET3_VERSION_GE_3(hw) ?
 328                 eth_vmxnet3_txdata_get(hw) : sizeof(struct Vmxnet3_TxDataDesc);
 329
 330         hw->rxdata_desc_size = VMXNET3_VERSION_GE_3(hw) ?
 331                 VMXNET3_DEF_RXDATA_DESC_SIZE : 0;
 332         RTE_ASSERT((hw->rxdata_desc_size & ~VMXNET3_RXDATA_DESC_SIZE_MASK) ==
 333                    hw->rxdata_desc_size);
 334
 335         /* clear shadow stats */
 336         memset(hw->saved_tx_stats, 0, sizeof(hw->saved_tx_stats));
 337         memset(hw->saved_rx_stats, 0, sizeof(hw->saved_rx_stats));
 338
 339         /* clear snapshot stats */
 340         memset(hw->snapshot_tx_stats, 0, sizeof(hw->snapshot_tx_stats));
 341         memset(hw->snapshot_rx_stats, 0, sizeof(hw->snapshot_rx_stats));
 342
 343         /* set the initial link status */
 344         memset(&link, 0, sizeof(link));
 345         link.link_duplex = ETH_LINK_FULL_DUPLEX;
 346         link.link_speed = ETH_SPEED_NUM_10G;
 347         link.link_autoneg = ETH_LINK_FIXED;
 348         rte_eth_linkstatus_set(eth_dev, &link);
 349
 350         return 0;
 351 }
 352
 353 static int
 354 eth_vmxnet3_dev_uninit(struct rte_eth_dev *eth_dev)
 355 {
 356         struct vmxnet3_hw *hw = eth_dev->data->dev_private;
 357
 358         PMD_INIT_FUNC_TRACE();
 359
 360         if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 361                 return 0;
 362
 363         if (hw->adapter_stopped == 0) {
 364                 PMD_INIT_LOG(DEBUG, "Device has not been closed.");
 365                 return -EBUSY;
 366         }
 367
 368         eth_dev->dev_ops = NULL;
 369         eth_dev->rx_pkt_burst = NULL;
 370         eth_dev->tx_pkt_burst = NULL;
 371         eth_dev->tx_pkt_prepare = NULL;
 372
 373         return 0;
 374 }
 375
 376 static int eth_vmxnet3_pci_probe(struct rte_pci_driver *pci_drv __rte_unused,
 377         struct rte_pci_device *pci_dev)
 378 {
 379         return rte_eth_dev_pci_generic_probe(pci_dev,
 380                 sizeof(struct vmxnet3_hw), eth_vmxnet3_dev_init);
 381 }
 382
 383 static int eth_vmxnet3_pci_remove(struct rte_pci_device *pci_dev)
 384 {
 385         return rte_eth_dev_pci_generic_remove(pci_dev, eth_vmxnet3_dev_uninit);
 386 }
 387
 388 static struct rte_pci_driver rte_vmxnet3_pmd = {
 389         .id_table = pci_id_vmxnet3_map,
 390         .drv_flags = RTE_PCI_DRV_NEED_MAPPING | RTE_PCI_DRV_INTR_LSC,
 391         .probe = eth_vmxnet3_pci_probe,
 392         .remove = eth_vmxnet3_pci_remove,
 393 };
 394
 395 static int
 396 vmxnet3_dev_configure(struct rte_eth_dev *dev)
 397 {
 398         const struct rte_memzone *mz;
 399         struct vmxnet3_hw *hw = dev->data->dev_private;
 400         size_t size;
 401
 402         PMD_INIT_FUNC_TRACE();
 403
 404         if (dev->data->nb_tx_queues > VMXNET3_MAX_TX_QUEUES ||
 405             dev->data->nb_rx_queues > VMXNET3_MAX_RX_QUEUES) {
 406                 PMD_INIT_LOG(ERR, "ERROR: Number of queues not supported");
 407                 return -EINVAL;
 408         }
 409
 410         if (!rte_is_power_of_2(dev->data->nb_rx_queues)) {
 411                 PMD_INIT_LOG(ERR, "ERROR: Number of rx queues not power of 2");
 412                 return -EINVAL;
 413         }
 414
 415         size = dev->data->nb_rx_queues * sizeof(struct Vmxnet3_TxQueueDesc) +
 416                 dev->data->nb_tx_queues * sizeof(struct Vmxnet3_RxQueueDesc);
 417
 418         if (size > UINT16_MAX)
 419                 return -EINVAL;
 420
 421         hw->num_rx_queues = (uint8_t)dev->data->nb_rx_queues;
 422         hw->num_tx_queues = (uint8_t)dev->data->nb_tx_queues;
 423
 424         /*
 425          * Allocate a memzone for Vmxnet3_DriverShared - Vmxnet3_DSDevRead
 426          * on current socket
 427          */
 428         mz = gpa_zone_reserve(dev, sizeof(struct Vmxnet3_DriverShared),
 429                               "shared", rte_socket_id(), 8, 1);
 430
 431         if (mz == NULL) {
 432                 PMD_INIT_LOG(ERR, "ERROR: Creating shared zone");
 433                 return -ENOMEM;
 434         }
 435         memset(mz->addr, 0, mz->len);
 436
 437         hw->shared = mz->addr;
 438         hw->sharedPA = mz->iova;
 439
 440         /*
 441          * Allocate a memzone for Vmxnet3_RxQueueDesc - Vmxnet3_TxQueueDesc
 442          * on current socket.
 443          *
 444          * We cannot reuse this memzone from previous allocation as its size
 445          * depends on the number of tx and rx queues, which could be different
 446          * from one config to another.
 447          */
 448         mz = gpa_zone_reserve(dev, size, "queuedesc", rte_socket_id(),
 449                               VMXNET3_QUEUE_DESC_ALIGN, 0);
 450         if (mz == NULL) {
 451                 PMD_INIT_LOG(ERR, "ERROR: Creating queue descriptors zone");
 452                 return -ENOMEM;
 453         }
 454         memset(mz->addr, 0, mz->len);
 455
 456         hw->tqd_start = (Vmxnet3_TxQueueDesc *)mz->addr;
 457         hw->rqd_start = (Vmxnet3_RxQueueDesc *)(hw->tqd_start + hw->num_tx_queues);
 458
 459         hw->queueDescPA = mz->iova;
 460         hw->queue_desc_len = (uint16_t)size;
 461
 462         if (dev->data->dev_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
 463                 /* Allocate memory structure for UPT1_RSSConf and configure */
 464                 mz = gpa_zone_reserve(dev, sizeof(struct VMXNET3_RSSConf),
 465                                       "rss_conf", rte_socket_id(),
 466                                       RTE_CACHE_LINE_SIZE, 1);
 467                 if (mz == NULL) {
 468                         PMD_INIT_LOG(ERR,
 469                                      "ERROR: Creating rss_conf structure zone");
 470                         return -ENOMEM;
 471                 }
 472                 memset(mz->addr, 0, mz->len);
 473
 474                 hw->rss_conf = mz->addr;
 475                 hw->rss_confPA = mz->iova;
 476         }
 477
 478         return 0;
 479 }
 480
 481 static void
 482 vmxnet3_write_mac(struct vmxnet3_hw *hw, const uint8_t *addr)
 483 {
 484         uint32_t val;
 485
 486         PMD_INIT_LOG(DEBUG,
 487                      "Writing MAC Address : %02x:%02x:%02x:%02x:%02x:%02x",
 488                      addr[0], addr[1], addr[2],
 489                      addr[3], addr[4], addr[5]);
 490
 491         memcpy(&val, addr, 4);
 492         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_MACL, val);
 493
 494         memcpy(&val, addr + 4, 2);
 495         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_MACH, val);
 496 }
 497
 498 static int
 499 vmxnet3_dev_setup_memreg(struct rte_eth_dev *dev)
 500 {
 501         struct vmxnet3_hw *hw = dev->data->dev_private;
 502         Vmxnet3_DriverShared *shared = hw->shared;
 503         Vmxnet3_CmdInfo *cmdInfo;
 504         struct rte_mempool *mp[VMXNET3_MAX_RX_QUEUES];
 505         uint8_t index[VMXNET3_MAX_RX_QUEUES + VMXNET3_MAX_TX_QUEUES];
 506         uint32_t num, i, j, size;
 507
 508         if (hw->memRegsPA == 0) {
 509                 const struct rte_memzone *mz;
 510
 511                 size = sizeof(Vmxnet3_MemRegs) +
 512                         (VMXNET3_MAX_RX_QUEUES + VMXNET3_MAX_TX_QUEUES) *
 513                         sizeof(Vmxnet3_MemoryRegion);
 514
 515                 mz = gpa_zone_reserve(dev, size, "memRegs", rte_socket_id(), 8,
 516                                       1);
 517                 if (mz == NULL) {
 518                         PMD_INIT_LOG(ERR, "ERROR: Creating memRegs zone");
 519                         return -ENOMEM;
 520                 }
 521                 memset(mz->addr, 0, mz->len);
 522                 hw->memRegs = mz->addr;
 523                 hw->memRegsPA = mz->iova;
 524         }
 525
 526         num = hw->num_rx_queues;
 527
 528         for (i = 0; i < num; i++) {
 529                 vmxnet3_rx_queue_t *rxq = dev->data->rx_queues[i];
 530
 531                 mp[i] = rxq->mp;
 532                 index[i] = 1 << i;
 533         }
 534
 535         /*
 536          * The same mempool could be used by multiple queues. In such a case,
 537          * remove duplicate mempool entries. Only one entry is kept with
 538          * bitmask indicating queues that are using this mempool.
 539          */
 540         for (i = 1; i < num; i++) {
 541                 for (j = 0; j < i; j++) {
 542                         if (mp[i] == mp[j]) {
 543                                 mp[i] = NULL;
 544                                 index[j] |= 1 << i;
 545                                 break;
 546                         }
 547                 }
 548         }
 549
 550         j = 0;
 551         for (i = 0; i < num; i++) {
 552                 if (mp[i] == NULL)
 553                         continue;
 554
 555                 Vmxnet3_MemoryRegion *mr = &hw->memRegs->memRegs[j];
 556
 557                 mr->startPA =
 558                         (uintptr_t)STAILQ_FIRST(&mp[i]->mem_list)->iova;
 559                 mr->length = STAILQ_FIRST(&mp[i]->mem_list)->len <= INT32_MAX ?
 560                         STAILQ_FIRST(&mp[i]->mem_list)->len : INT32_MAX;
 561                 mr->txQueueBits = index[i];
 562                 mr->rxQueueBits = index[i];
 563
 564                 PMD_INIT_LOG(INFO,
 565                              "index: %u startPA: %" PRIu64 " length: %u, "
 566                              "rxBits: %x",
 567                              j, mr->startPA, mr->length, mr->rxQueueBits);
 568                 j++;
 569         }
 570         hw->memRegs->numRegs = j;
 571         PMD_INIT_LOG(INFO, "numRegs: %u", j);
 572
 573         size = sizeof(Vmxnet3_MemRegs) +
 574                 (j - 1) * sizeof(Vmxnet3_MemoryRegion);
 575
 576         cmdInfo = &shared->cu.cmdInfo;
 577         cmdInfo->varConf.confVer = 1;
 578         cmdInfo->varConf.confLen = size;
 579         cmdInfo->varConf.confPA = hw->memRegsPA;
 580
 581         return 0;
 582 }
 583
 584 static int
 585 vmxnet3_setup_driver_shared(struct rte_eth_dev *dev)
 586 {
 587         struct rte_eth_conf port_conf = dev->data->dev_conf;
 588         struct vmxnet3_hw *hw = dev->data->dev_private;
 589         uint32_t mtu = dev->data->mtu;
 590         Vmxnet3_DriverShared *shared = hw->shared;
 591         Vmxnet3_DSDevRead *devRead = &shared->devRead;
 592         uint64_t rx_offloads = dev->data->dev_conf.rxmode.offloads;
 593         uint32_t i;
 594         int ret;
 595
 596         hw->mtu = mtu;
 597
 598         shared->magic = VMXNET3_REV1_MAGIC;
 599         devRead->misc.driverInfo.version = VMXNET3_DRIVER_VERSION_NUM;
 600
 601         /* Setting up Guest OS information */
 602         devRead->misc.driverInfo.gos.gosBits   = sizeof(void *) == 4 ?
 603                 VMXNET3_GOS_BITS_32 : VMXNET3_GOS_BITS_64;
 604         devRead->misc.driverInfo.gos.gosType   = VMXNET3_GOS_TYPE_LINUX;
 605         devRead->misc.driverInfo.vmxnet3RevSpt = 1;
 606         devRead->misc.driverInfo.uptVerSpt     = 1;
 607
 608         devRead->misc.mtu = rte_le_to_cpu_32(mtu);
 609         devRead->misc.queueDescPA  = hw->queueDescPA;
 610         devRead->misc.queueDescLen = hw->queue_desc_len;
 611         devRead->misc.numTxQueues  = hw->num_tx_queues;
 612         devRead->misc.numRxQueues  = hw->num_rx_queues;
 613
 614         /*
 615          * Set number of interrupts to 1
 616          * PMD by default disables all the interrupts but this is MUST
 617          * to activate device. It needs at least one interrupt for
 618          * link events to handle
 619          */
 620         hw->num_intrs = devRead->intrConf.numIntrs = 1;
 621         devRead->intrConf.intrCtrl |= VMXNET3_IC_DISABLE_ALL;
 622
 623         for (i = 0; i < hw->num_tx_queues; i++) {
 624                 Vmxnet3_TxQueueDesc *tqd = &hw->tqd_start[i];
 625                 vmxnet3_tx_queue_t *txq  = dev->data->tx_queues[i];
 626
 627                 txq->shared = &hw->tqd_start[i];
 628
 629                 tqd->ctrl.txNumDeferred  = 0;
 630                 tqd->ctrl.txThreshold    = 1;
 631                 tqd->conf.txRingBasePA   = txq->cmd_ring.basePA;
 632                 tqd->conf.compRingBasePA = txq->comp_ring.basePA;
 633                 tqd->conf.dataRingBasePA = txq->data_ring.basePA;
 634
 635                 tqd->conf.txRingSize   = txq->cmd_ring.size;
 636                 tqd->conf.compRingSize = txq->comp_ring.size;
 637                 tqd->conf.dataRingSize = txq->data_ring.size;
 638                 tqd->conf.txDataRingDescSize = txq->txdata_desc_size;
 639                 tqd->conf.intrIdx      = txq->comp_ring.intr_idx;
 640                 tqd->status.stopped    = TRUE;
 641                 tqd->status.error      = 0;
 642                 memset(&tqd->stats, 0, sizeof(tqd->stats));
 643         }
 644
 645         for (i = 0; i < hw->num_rx_queues; i++) {
 646                 Vmxnet3_RxQueueDesc *rqd  = &hw->rqd_start[i];
 647                 vmxnet3_rx_queue_t *rxq   = dev->data->rx_queues[i];
 648
 649                 rxq->shared = &hw->rqd_start[i];
 650
 651                 rqd->conf.rxRingBasePA[0] = rxq->cmd_ring[0].basePA;
 652                 rqd->conf.rxRingBasePA[1] = rxq->cmd_ring[1].basePA;
 653                 rqd->conf.compRingBasePA  = rxq->comp_ring.basePA;
 654
 655                 rqd->conf.rxRingSize[0]   = rxq->cmd_ring[0].size;
 656                 rqd->conf.rxRingSize[1]   = rxq->cmd_ring[1].size;
 657                 rqd->conf.compRingSize    = rxq->comp_ring.size;
 658                 rqd->conf.intrIdx         = rxq->comp_ring.intr_idx;
 659                 if (VMXNET3_VERSION_GE_3(hw)) {
 660                         rqd->conf.rxDataRingBasePA = rxq->data_ring.basePA;
 661                         rqd->conf.rxDataRingDescSize = rxq->data_desc_size;
 662                 }
 663                 rqd->status.stopped       = TRUE;
 664                 rqd->status.error         = 0;
 665                 memset(&rqd->stats, 0, sizeof(rqd->stats));
 666         }
 667
 668         /* RxMode set to 0 of VMXNET3_RXM_xxx */
 669         devRead->rxFilterConf.rxMode = 0;
 670
 671         /* Setting up feature flags */
 672         if (rx_offloads & DEV_RX_OFFLOAD_CHECKSUM)
 673                 devRead->misc.uptFeatures |= VMXNET3_F_RXCSUM;
 674
 675         if (rx_offloads & DEV_RX_OFFLOAD_TCP_LRO) {
 676                 devRead->misc.uptFeatures |= VMXNET3_F_LRO;
 677                 devRead->misc.maxNumRxSG = 0;
 678         }
 679
 680         if (port_conf.rxmode.mq_mode == ETH_MQ_RX_RSS) {
 681                 ret = vmxnet3_rss_configure(dev);
 682                 if (ret != VMXNET3_SUCCESS)
 683                         return ret;
 684
 685                 devRead->misc.uptFeatures |= VMXNET3_F_RSS;
 686                 devRead->rssConfDesc.confVer = 1;
 687                 devRead->rssConfDesc.confLen = sizeof(struct VMXNET3_RSSConf);
 688                 devRead->rssConfDesc.confPA  = hw->rss_confPA;
 689         }
 690
 691         ret = vmxnet3_dev_vlan_offload_set(dev,
 692                         ETH_VLAN_STRIP_MASK | ETH_VLAN_FILTER_MASK);
 693         if (ret)
 694                 return ret;
 695
 696         vmxnet3_write_mac(hw, dev->data->mac_addrs->addr_bytes);
 697
 698         return VMXNET3_SUCCESS;
 699 }
 700
 701 /*
 702  * Configure device link speed and setup link.
 703  * Must be called after eth_vmxnet3_dev_init. Other wise it might fail
 704  * It returns 0 on success.
 705  */
 706 static int
 707 vmxnet3_dev_start(struct rte_eth_dev *dev)
 708 {
 709         int ret;
 710         struct vmxnet3_hw *hw = dev->data->dev_private;
 711
 712         PMD_INIT_FUNC_TRACE();
 713
 714         /* Save stats before it is reset by CMD_ACTIVATE */
 715         vmxnet3_hw_stats_save(hw);
 716
 717         ret = vmxnet3_setup_driver_shared(dev);
 718         if (ret != VMXNET3_SUCCESS)
 719                 return ret;
 720
 721         /* check if lsc interrupt feature is enabled */
 722         if (dev->data->dev_conf.intr_conf.lsc) {
 723                 struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);
 724
 725                 /* Setup interrupt callback  */
 726                 rte_intr_callback_register(&pci_dev->intr_handle,
 727                                            vmxnet3_interrupt_handler, dev);
 728
 729                 if (rte_intr_enable(&pci_dev->intr_handle) < 0) {
 730                         PMD_INIT_LOG(ERR, "interrupt enable failed");
 731                         return -EIO;
 732                 }
 733         }
 734
 735         /* Exchange shared data with device */
 736         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAL,
 737                                VMXNET3_GET_ADDR_LO(hw->sharedPA));
 738         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAH,
 739                                VMXNET3_GET_ADDR_HI(hw->sharedPA));
 740
 741         /* Activate device by register write */
 742         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_ACTIVATE_DEV);
 743         ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
 744
 745         if (ret != 0) {
 746                 PMD_INIT_LOG(ERR, "Device activation: UNSUCCESSFUL");
 747                 return -EINVAL;
 748         }
 749
 750         /* Setup memory region for rx buffers */
 751         ret = vmxnet3_dev_setup_memreg(dev);
 752         if (ret == 0) {
 753                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
 754                                        VMXNET3_CMD_REGISTER_MEMREGS);
 755                 ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
 756                 if (ret != 0)
 757                         PMD_INIT_LOG(DEBUG,
 758                                      "Failed in setup memory region cmd\n");
 759                 ret = 0;
 760         } else {
 761                 PMD_INIT_LOG(DEBUG, "Failed to setup memory region\n");
 762         }
 763
 764         /* Disable interrupts */
 765         vmxnet3_disable_intr(hw);
 766
 767         /*
 768          * Load RX queues with blank mbufs and update next2fill index for device
 769          * Update RxMode of the device
 770          */
 771         ret = vmxnet3_dev_rxtx_init(dev);
 772         if (ret != VMXNET3_SUCCESS) {
 773                 PMD_INIT_LOG(ERR, "Device queue init: UNSUCCESSFUL");
 774                 return ret;
 775         }
 776
 777         hw->adapter_stopped = FALSE;
 778
 779         /* Setting proper Rx Mode and issue Rx Mode Update command */
 780         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_UCAST | VMXNET3_RXM_BCAST, 1);
 781
 782         if (dev->data->dev_conf.intr_conf.lsc) {
 783                 vmxnet3_enable_intr(hw);
 784
 785                 /*
 786                  * Update link state from device since this won't be
 787                  * done upon starting with lsc in use. This is done
 788                  * only after enabling interrupts to avoid any race
 789                  * where the link state could change without an
 790                  * interrupt being fired.
 791                  */
 792                 __vmxnet3_dev_link_update(dev, 0);
 793         }
 794
 795         return VMXNET3_SUCCESS;
 796 }
 797
 798 /*
 799  * Stop device: disable rx and tx functions to allow for reconfiguring.
 800  */
 801 static void
 802 vmxnet3_dev_stop(struct rte_eth_dev *dev)
 803 {
 804         struct rte_eth_link link;
 805         struct vmxnet3_hw *hw = dev->data->dev_private;
 806
 807         PMD_INIT_FUNC_TRACE();
 808
 809         if (hw->adapter_stopped == 1) {
 810                 PMD_INIT_LOG(DEBUG, "Device already stopped.");
 811                 return;
 812         }
 813
 814         /* disable interrupts */
 815         vmxnet3_disable_intr(hw);
 816
 817         if (dev->data->dev_conf.intr_conf.lsc) {
 818                 struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);
 819
 820                 rte_intr_disable(&pci_dev->intr_handle);
 821
 822                 rte_intr_callback_unregister(&pci_dev->intr_handle,
 823                                              vmxnet3_interrupt_handler, dev);
 824         }
 825
 826         /* quiesce the device first */
 827         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_QUIESCE_DEV);
 828         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAL, 0);
 829         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_DSAH, 0);
 830
 831         /* reset the device */
 832         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV);
 833         PMD_INIT_LOG(DEBUG, "Device reset.");
 834
 835         vmxnet3_dev_clear_queues(dev);
 836
 837         /* Clear recorded link status */
 838         memset(&link, 0, sizeof(link));
 839         link.link_duplex = ETH_LINK_FULL_DUPLEX;
 840         link.link_speed = ETH_SPEED_NUM_10G;
 841         link.link_autoneg = ETH_LINK_FIXED;
 842         rte_eth_linkstatus_set(dev, &link);
 843
 844         hw->adapter_stopped = 1;
 845 }
 846
 847 static void
 848 vmxnet3_free_queues(struct rte_eth_dev *dev)
 849 {
 850         int i;
 851
 852         PMD_INIT_FUNC_TRACE();
 853
 854         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 855                 void *rxq = dev->data->rx_queues[i];
 856
 857                 vmxnet3_dev_rx_queue_release(rxq);
 858         }
 859         dev->data->nb_rx_queues = 0;
 860
 861         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 862                 void *txq = dev->data->tx_queues[i];
 863
 864                 vmxnet3_dev_tx_queue_release(txq);
 865         }
 866         dev->data->nb_tx_queues = 0;
 867 }
 868
 869 /*
 870  * Reset and stop device.
 871  */
 872 static void
 873 vmxnet3_dev_close(struct rte_eth_dev *dev)
 874 {
 875         PMD_INIT_FUNC_TRACE();
 876
 877         vmxnet3_dev_stop(dev);
 878         vmxnet3_free_queues(dev);
 879
 880         /*
 881          * flag to rte_eth_dev_close() that it should release the port resources
 882          * (calling rte_eth_dev_release_port()) in addition to closing it.
 883          */
 884         dev->data->dev_flags |= RTE_ETH_DEV_CLOSE_REMOVE;
 885 }
 886
 887 static void
 888 vmxnet3_hw_tx_stats_get(struct vmxnet3_hw *hw, unsigned int q,
 889                         struct UPT1_TxStats *res)
 890 {
 891 #define VMXNET3_UPDATE_TX_STAT(h, i, f, r)              \
 892                 ((r)->f = (h)->tqd_start[(i)].stats.f + \
 893                         (h)->saved_tx_stats[(i)].f)
 894
 895         VMXNET3_UPDATE_TX_STAT(hw, q, ucastPktsTxOK, res);
 896         VMXNET3_UPDATE_TX_STAT(hw, q, mcastPktsTxOK, res);
 897         VMXNET3_UPDATE_TX_STAT(hw, q, bcastPktsTxOK, res);
 898         VMXNET3_UPDATE_TX_STAT(hw, q, ucastBytesTxOK, res);
 899         VMXNET3_UPDATE_TX_STAT(hw, q, mcastBytesTxOK, res);
 900         VMXNET3_UPDATE_TX_STAT(hw, q, bcastBytesTxOK, res);
 901         VMXNET3_UPDATE_TX_STAT(hw, q, pktsTxError, res);
 902         VMXNET3_UPDATE_TX_STAT(hw, q, pktsTxDiscard, res);
 903
 904 #undef VMXNET3_UPDATE_TX_STAT
 905 }
 906
 907 static void
 908 vmxnet3_hw_rx_stats_get(struct vmxnet3_hw *hw, unsigned int q,
 909                         struct UPT1_RxStats *res)
 910 {
 911 #define VMXNET3_UPDATE_RX_STAT(h, i, f, r)              \
 912                 ((r)->f = (h)->rqd_start[(i)].stats.f + \
 913                         (h)->saved_rx_stats[(i)].f)
 914
 915         VMXNET3_UPDATE_RX_STAT(hw, q, ucastPktsRxOK, res);
 916         VMXNET3_UPDATE_RX_STAT(hw, q, mcastPktsRxOK, res);
 917         VMXNET3_UPDATE_RX_STAT(hw, q, bcastPktsRxOK, res);
 918         VMXNET3_UPDATE_RX_STAT(hw, q, ucastBytesRxOK, res);
 919         VMXNET3_UPDATE_RX_STAT(hw, q, mcastBytesRxOK, res);
 920         VMXNET3_UPDATE_RX_STAT(hw, q, bcastBytesRxOK, res);
 921         VMXNET3_UPDATE_RX_STAT(hw, q, pktsRxError, res);
 922         VMXNET3_UPDATE_RX_STAT(hw, q, pktsRxOutOfBuf, res);
 923
 924 #undef VMXNET3_UPDATE_RX_STAT
 925 }
 926
 927 static void
 928 vmxnet3_tx_stats_get(struct vmxnet3_hw *hw, unsigned int q,
 929                                         struct UPT1_TxStats *res)
 930 {
 931                 vmxnet3_hw_tx_stats_get(hw, q, res);
 932
 933 #define VMXNET3_REDUCE_SNAPSHOT_TX_STAT(h, i, f, r)     \
 934                 ((r)->f -= (h)->snapshot_tx_stats[(i)].f)
 935
 936         VMXNET3_REDUCE_SNAPSHOT_TX_STAT(hw, q, ucastPktsTxOK, res);
 937         VMXNET3_REDUCE_SNAPSHOT_TX_STAT(hw, q, mcastPktsTxOK, res);
 938         VMXNET3_REDUCE_SNAPSHOT_TX_STAT(hw, q, bcastPktsTxOK, res);
 939         VMXNET3_REDUCE_SNAPSHOT_TX_STAT(hw, q, ucastBytesTxOK, res);
 940         VMXNET3_REDUCE_SNAPSHOT_TX_STAT(hw, q, mcastBytesTxOK, res);
 941         VMXNET3_REDUCE_SNAPSHOT_TX_STAT(hw, q, bcastBytesTxOK, res);
 942         VMXNET3_REDUCE_SNAPSHOT_TX_STAT(hw, q, pktsTxError, res);
 943         VMXNET3_REDUCE_SNAPSHOT_TX_STAT(hw, q, pktsTxDiscard, res);
 944
 945 #undef VMXNET3_REDUCE_SNAPSHOT_TX_STAT
 946 }
 947
 948 static void
 949 vmxnet3_rx_stats_get(struct vmxnet3_hw *hw, unsigned int q,
 950                                         struct UPT1_RxStats *res)
 951 {
 952                 vmxnet3_hw_rx_stats_get(hw, q, res);
 953
 954 #define VMXNET3_REDUCE_SNAPSHOT_RX_STAT(h, i, f, r)     \
 955                 ((r)->f -= (h)->snapshot_rx_stats[(i)].f)
 956
 957         VMXNET3_REDUCE_SNAPSHOT_RX_STAT(hw, q, ucastPktsRxOK, res);
 958         VMXNET3_REDUCE_SNAPSHOT_RX_STAT(hw, q, mcastPktsRxOK, res);
 959         VMXNET3_REDUCE_SNAPSHOT_RX_STAT(hw, q, bcastPktsRxOK, res);
 960         VMXNET3_REDUCE_SNAPSHOT_RX_STAT(hw, q, ucastBytesRxOK, res);
 961         VMXNET3_REDUCE_SNAPSHOT_RX_STAT(hw, q, mcastBytesRxOK, res);
 962         VMXNET3_REDUCE_SNAPSHOT_RX_STAT(hw, q, bcastBytesRxOK, res);
 963         VMXNET3_REDUCE_SNAPSHOT_RX_STAT(hw, q, pktsRxError, res);
 964         VMXNET3_REDUCE_SNAPSHOT_RX_STAT(hw, q, pktsRxOutOfBuf, res);
 965
 966 #undef VMXNET3_REDUCE_SNAPSHOT_RX_STAT
 967 }
 968
 969 static void
 970 vmxnet3_hw_stats_save(struct vmxnet3_hw *hw)
 971 {
 972         unsigned int i;
 973
 974         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS);
 975
 976         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_TX_QUEUES);
 977
 978         for (i = 0; i < hw->num_tx_queues; i++)
 979                 vmxnet3_hw_tx_stats_get(hw, i, &hw->saved_tx_stats[i]);
 980         for (i = 0; i < hw->num_rx_queues; i++)
 981                 vmxnet3_hw_rx_stats_get(hw, i, &hw->saved_rx_stats[i]);
 982 }
 983
 984 static int
 985 vmxnet3_dev_xstats_get_names(struct rte_eth_dev *dev,
 986                              struct rte_eth_xstat_name *xstats_names,
 987                              unsigned int n)
 988 {
 989         unsigned int i, t, count = 0;
 990         unsigned int nstats =
 991                 dev->data->nb_tx_queues * RTE_DIM(vmxnet3_txq_stat_strings) +
 992                 dev->data->nb_rx_queues * RTE_DIM(vmxnet3_rxq_stat_strings);
 993
 994         if (!xstats_names || n < nstats)
 995                 return nstats;
 996
 997         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 998                 if (!dev->data->rx_queues[i])
 999                         continue;
1000
1001                 for (t = 0; t < RTE_DIM(vmxnet3_rxq_stat_strings); t++) {
1002                         snprintf(xstats_names[count].name,
1003                                  sizeof(xstats_names[count].name),
1004                                  "rx_q%u_%s", i,
1005                                  vmxnet3_rxq_stat_strings[t].name);
1006                         count++;
1007                 }
1008         }
1009
1010         for (i = 0; i < dev->data->nb_tx_queues; i++) {
1011                 if (!dev->data->tx_queues[i])
1012                         continue;
1013
1014                 for (t = 0; t < RTE_DIM(vmxnet3_txq_stat_strings); t++) {
1015                         snprintf(xstats_names[count].name,
1016                                  sizeof(xstats_names[count].name),
1017                                  "tx_q%u_%s", i,
1018                                  vmxnet3_txq_stat_strings[t].name);
1019                         count++;
1020                 }
1021         }
1022
1023         return count;
1024 }
1025
1026 static int
1027 vmxnet3_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
1028                        unsigned int n)
1029 {
1030         unsigned int i, t, count = 0;
1031         unsigned int nstats =
1032                 dev->data->nb_tx_queues * RTE_DIM(vmxnet3_txq_stat_strings) +
1033                 dev->data->nb_rx_queues * RTE_DIM(vmxnet3_rxq_stat_strings);
1034
1035         if (n < nstats)
1036                 return nstats;
1037
1038         for (i = 0; i < dev->data->nb_rx_queues; i++) {
1039                 struct vmxnet3_rx_queue *rxq = dev->data->rx_queues[i];
1040
1041                 if (rxq == NULL)
1042                         continue;
1043
1044                 for (t = 0; t < RTE_DIM(vmxnet3_rxq_stat_strings); t++) {
1045                         xstats[count].value = *(uint64_t *)(((char *)&rxq->stats) +
1046                                 vmxnet3_rxq_stat_strings[t].offset);
1047                         xstats[count].id = count;
1048                         count++;
1049                 }
1050         }
1051
1052         for (i = 0; i < dev->data->nb_tx_queues; i++) {
1053                 struct vmxnet3_tx_queue *txq = dev->data->tx_queues[i];
1054
1055                 if (txq == NULL)
1056                         continue;
1057
1058                 for (t = 0; t < RTE_DIM(vmxnet3_txq_stat_strings); t++) {
1059                         xstats[count].value = *(uint64_t *)(((char *)&txq->stats) +
1060                                 vmxnet3_txq_stat_strings[t].offset);
1061                         xstats[count].id = count;
1062                         count++;
1063                 }
1064         }
1065
1066         return count;
1067 }
1068
1069 static int
1070 vmxnet3_dev_stats_get(struct rte_eth_dev *dev, struct rte_eth_stats *stats)
1071 {
1072         unsigned int i;
1073         struct vmxnet3_hw *hw = dev->data->dev_private;
1074         struct UPT1_TxStats txStats;
1075         struct UPT1_RxStats rxStats;
1076
1077         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS);
1078
1079         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_TX_QUEUES);
1080         for (i = 0; i < hw->num_tx_queues; i++) {
1081                 vmxnet3_tx_stats_get(hw, i, &txStats);
1082
1083                 stats->q_opackets[i] = txStats.ucastPktsTxOK +
1084                         txStats.mcastPktsTxOK +
1085                         txStats.bcastPktsTxOK;
1086
1087                 stats->q_obytes[i] = txStats.ucastBytesTxOK +
1088                         txStats.mcastBytesTxOK +
1089                         txStats.bcastBytesTxOK;
1090
1091                 stats->opackets += stats->q_opackets[i];
1092                 stats->obytes += stats->q_obytes[i];
1093                 stats->oerrors += txStats.pktsTxError + txStats.pktsTxDiscard;
1094         }
1095
1096         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_RX_QUEUES);
1097         for (i = 0; i < hw->num_rx_queues; i++) {
1098                 vmxnet3_rx_stats_get(hw, i, &rxStats);
1099
1100                 stats->q_ipackets[i] = rxStats.ucastPktsRxOK +
1101                         rxStats.mcastPktsRxOK +
1102                         rxStats.bcastPktsRxOK;
1103
1104                 stats->q_ibytes[i] = rxStats.ucastBytesRxOK +
1105                         rxStats.mcastBytesRxOK +
1106                         rxStats.bcastBytesRxOK;
1107
1108                 stats->ipackets += stats->q_ipackets[i];
1109                 stats->ibytes += stats->q_ibytes[i];
1110
1111                 stats->q_errors[i] = rxStats.pktsRxError;
1112                 stats->ierrors += rxStats.pktsRxError;
1113                 stats->imissed += rxStats.pktsRxOutOfBuf;
1114         }
1115
1116         return 0;
1117 }
1118
1119 static void
1120 vmxnet3_dev_stats_reset(struct rte_eth_dev *dev)
1121 {
1122         unsigned int i;
1123         struct vmxnet3_hw *hw = dev->data->dev_private;
1124         struct UPT1_TxStats txStats;
1125         struct UPT1_RxStats rxStats;
1126
1127         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_STATS);
1128
1129         RTE_BUILD_BUG_ON(RTE_ETHDEV_QUEUE_STAT_CNTRS < VMXNET3_MAX_TX_QUEUES);
1130
1131         for (i = 0; i < hw->num_tx_queues; i++) {
1132                 vmxnet3_hw_tx_stats_get(hw, i, &txStats);
1133                 memcpy(&hw->snapshot_tx_stats[i], &txStats,
1134                         sizeof(hw->snapshot_tx_stats[0]));
1135         }
1136         for (i = 0; i < hw->num_rx_queues; i++) {
1137                 vmxnet3_hw_rx_stats_get(hw, i, &rxStats);
1138                 memcpy(&hw->snapshot_rx_stats[i], &rxStats,
1139                         sizeof(hw->snapshot_rx_stats[0]));
1140         }
1141 }
1142
1143 static void
1144 vmxnet3_dev_info_get(struct rte_eth_dev *dev __rte_unused,
1145                      struct rte_eth_dev_info *dev_info)
1146 {
1147         dev_info->max_rx_queues = VMXNET3_MAX_RX_QUEUES;
1148         dev_info->max_tx_queues = VMXNET3_MAX_TX_QUEUES;
1149         dev_info->min_rx_bufsize = 1518 + RTE_PKTMBUF_HEADROOM;
1150         dev_info->max_rx_pktlen = 16384; /* includes CRC, cf MAXFRS register */
1151         dev_info->speed_capa = ETH_LINK_SPEED_10G;
1152         dev_info->max_mac_addrs = VMXNET3_MAX_MAC_ADDRS;
1153
1154         dev_info->flow_type_rss_offloads = VMXNET3_RSS_OFFLOAD_ALL;
1155
1156         dev_info->rx_desc_lim = (struct rte_eth_desc_lim) {
1157                 .nb_max = VMXNET3_RX_RING_MAX_SIZE,
1158                 .nb_min = VMXNET3_DEF_RX_RING_SIZE,
1159                 .nb_align = 1,
1160         };
1161
1162         dev_info->tx_desc_lim = (struct rte_eth_desc_lim) {
1163                 .nb_max = VMXNET3_TX_RING_MAX_SIZE,
1164                 .nb_min = VMXNET3_DEF_TX_RING_SIZE,
1165                 .nb_align = 1,
1166                 .nb_seg_max = VMXNET3_TX_MAX_SEG,
1167                 .nb_mtu_seg_max = VMXNET3_MAX_TXD_PER_PKT,
1168         };
1169
1170         dev_info->rx_offload_capa = VMXNET3_RX_OFFLOAD_CAP;
1171         dev_info->rx_queue_offload_capa = 0;
1172         dev_info->tx_offload_capa = VMXNET3_TX_OFFLOAD_CAP;
1173         dev_info->tx_queue_offload_capa = 0;
1174 }
1175
1176 static const uint32_t *
1177 vmxnet3_dev_supported_ptypes_get(struct rte_eth_dev *dev)
1178 {
1179         static const uint32_t ptypes[] = {
1180                 RTE_PTYPE_L3_IPV4_EXT,
1181                 RTE_PTYPE_L3_IPV4,
1182                 RTE_PTYPE_UNKNOWN
1183         };
1184
1185         if (dev->rx_pkt_burst == vmxnet3_recv_pkts)
1186                 return ptypes;
1187         return NULL;
1188 }
1189
1190 static int
1191 vmxnet3_mac_addr_set(struct rte_eth_dev *dev, struct ether_addr *mac_addr)
1192 {
1193         struct vmxnet3_hw *hw = dev->data->dev_private;
1194
1195         ether_addr_copy(mac_addr, (struct ether_addr *)(hw->perm_addr));
1196         vmxnet3_write_mac(hw, mac_addr->addr_bytes);
1197         return 0;
1198 }
1199
1200 /* return 0 means link status changed, -1 means not changed */
1201 static int
1202 __vmxnet3_dev_link_update(struct rte_eth_dev *dev,
1203                           __rte_unused int wait_to_complete)
1204 {
1205         struct vmxnet3_hw *hw = dev->data->dev_private;
1206         struct rte_eth_link link;
1207         uint32_t ret;
1208
1209         memset(&link, 0, sizeof(link));
1210
1211         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK);
1212         ret = VMXNET3_READ_BAR1_REG(hw, VMXNET3_REG_CMD);
1213
1214         if (ret & 0x1)
1215                 link.link_status = ETH_LINK_UP;
1216         link.link_duplex = ETH_LINK_FULL_DUPLEX;
1217         link.link_speed = ETH_SPEED_NUM_10G;
1218         link.link_autoneg = ETH_LINK_FIXED;
1219
1220         return rte_eth_linkstatus_set(dev, &link);
1221 }
1222
1223 static int
1224 vmxnet3_dev_link_update(struct rte_eth_dev *dev, int wait_to_complete)
1225 {
1226         /* Link status doesn't change for stopped dev */
1227         if (dev->data->dev_started == 0)
1228                 return -1;
1229
1230         return __vmxnet3_dev_link_update(dev, wait_to_complete);
1231 }
1232
1233 /* Updating rxmode through Vmxnet3_DriverShared structure in adapter */
1234 static void
1235 vmxnet3_dev_set_rxmode(struct vmxnet3_hw *hw, uint32_t feature, int set)
1236 {
1237         struct Vmxnet3_RxFilterConf *rxConf = &hw->shared->devRead.rxFilterConf;
1238
1239         if (set)
1240                 rxConf->rxMode = rxConf->rxMode | feature;
1241         else
1242                 rxConf->rxMode = rxConf->rxMode & (~feature);
1243
1244         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD, VMXNET3_CMD_UPDATE_RX_MODE);
1245 }
1246
1247 /* Promiscuous supported only if Vmxnet3_DriverShared is initialized in adapter */
1248 static void
1249 vmxnet3_dev_promiscuous_enable(struct rte_eth_dev *dev)
1250 {
1251         struct vmxnet3_hw *hw = dev->data->dev_private;
1252         uint32_t *vf_table = hw->shared->devRead.rxFilterConf.vfTable;
1253
1254         memset(vf_table, 0, VMXNET3_VFT_TABLE_SIZE);
1255         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 1);
1256
1257         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1258                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1259 }
1260
1261 /* Promiscuous supported only if Vmxnet3_DriverShared is initialized in adapter */
1262 static void
1263 vmxnet3_dev_promiscuous_disable(struct rte_eth_dev *dev)
1264 {
1265         struct vmxnet3_hw *hw = dev->data->dev_private;
1266         uint32_t *vf_table = hw->shared->devRead.rxFilterConf.vfTable;
1267         uint64_t rx_offloads = dev->data->dev_conf.rxmode.offloads;
1268
1269         if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
1270                 memcpy(vf_table, hw->shadow_vfta, VMXNET3_VFT_TABLE_SIZE);
1271         else
1272                 memset(vf_table, 0xff, VMXNET3_VFT_TABLE_SIZE);
1273         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_PROMISC, 0);
1274         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1275                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1276 }
1277
1278 /* Allmulticast supported only if Vmxnet3_DriverShared is initialized in adapter */
1279 static void
1280 vmxnet3_dev_allmulticast_enable(struct rte_eth_dev *dev)
1281 {
1282         struct vmxnet3_hw *hw = dev->data->dev_private;
1283
1284         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_ALL_MULTI, 1);
1285 }
1286
1287 /* Allmulticast supported only if Vmxnet3_DriverShared is initialized in adapter */
1288 static void
1289 vmxnet3_dev_allmulticast_disable(struct rte_eth_dev *dev)
1290 {
1291         struct vmxnet3_hw *hw = dev->data->dev_private;
1292
1293         vmxnet3_dev_set_rxmode(hw, VMXNET3_RXM_ALL_MULTI, 0);
1294 }
1295
1296 /* Enable/disable filter on vlan */
1297 static int
1298 vmxnet3_dev_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vid, int on)
1299 {
1300         struct vmxnet3_hw *hw = dev->data->dev_private;
1301         struct Vmxnet3_RxFilterConf *rxConf = &hw->shared->devRead.rxFilterConf;
1302         uint32_t *vf_table = rxConf->vfTable;
1303
1304         /* save state for restore */
1305         if (on)
1306                 VMXNET3_SET_VFTABLE_ENTRY(hw->shadow_vfta, vid);
1307         else
1308                 VMXNET3_CLEAR_VFTABLE_ENTRY(hw->shadow_vfta, vid);
1309
1310         /* don't change active filter if in promiscuous mode */
1311         if (rxConf->rxMode & VMXNET3_RXM_PROMISC)
1312                 return 0;
1313
1314         /* set in hardware */
1315         if (on)
1316                 VMXNET3_SET_VFTABLE_ENTRY(vf_table, vid);
1317         else
1318                 VMXNET3_CLEAR_VFTABLE_ENTRY(vf_table, vid);
1319
1320         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1321                                VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1322         return 0;
1323 }
1324
1325 static int
1326 vmxnet3_dev_vlan_offload_set(struct rte_eth_dev *dev, int mask)
1327 {
1328         struct vmxnet3_hw *hw = dev->data->dev_private;
1329         Vmxnet3_DSDevRead *devRead = &hw->shared->devRead;
1330         uint32_t *vf_table = devRead->rxFilterConf.vfTable;
1331         uint64_t rx_offloads = dev->data->dev_conf.rxmode.offloads;
1332
1333         if (mask & ETH_VLAN_STRIP_MASK) {
1334                 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
1335                         devRead->misc.uptFeatures |= UPT1_F_RXVLAN;
1336                 else
1337                         devRead->misc.uptFeatures &= ~UPT1_F_RXVLAN;
1338
1339                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1340                                        VMXNET3_CMD_UPDATE_FEATURE);
1341         }
1342
1343         if (mask & ETH_VLAN_FILTER_MASK) {
1344                 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
1345                         memcpy(vf_table, hw->shadow_vfta, VMXNET3_VFT_TABLE_SIZE);
1346                 else
1347                         memset(vf_table, 0xff, VMXNET3_VFT_TABLE_SIZE);
1348
1349                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1350                                        VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1351         }
1352
1353         return 0;
1354 }
1355
1356 static void
1357 vmxnet3_process_events(struct rte_eth_dev *dev)
1358 {
1359         struct vmxnet3_hw *hw = dev->data->dev_private;
1360         uint32_t events = hw->shared->ecr;
1361
1362         if (!events)
1363                 return;
1364
1365         /*
1366          * ECR bits when written with 1b are cleared. Hence write
1367          * events back to ECR so that the bits which were set will be reset.
1368          */
1369         VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_ECR, events);
1370
1371         /* Check if link state has changed */
1372         if (events & VMXNET3_ECR_LINK) {
1373                 PMD_DRV_LOG(DEBUG, "Process events: VMXNET3_ECR_LINK event");
1374                 if (vmxnet3_dev_link_update(dev, 0) == 0)
1375                         _rte_eth_dev_callback_process(dev,
1376                                                       RTE_ETH_EVENT_INTR_LSC,
1377                                                       NULL);
1378         }
1379
1380         /* Check if there is an error on xmit/recv queues */
1381         if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) {
1382                 VMXNET3_WRITE_BAR1_REG(hw, VMXNET3_REG_CMD,
1383                                        VMXNET3_CMD_GET_QUEUE_STATUS);
1384
1385                 if (hw->tqd_start->status.stopped)
1386                         PMD_DRV_LOG(ERR, "tq error 0x%x",
1387                                     hw->tqd_start->status.error);
1388
1389                 if (hw->rqd_start->status.stopped)
1390                         PMD_DRV_LOG(ERR, "rq error 0x%x",
1391                                      hw->rqd_start->status.error);
1392
1393                 /* Reset the device */
1394                 /* Have to reset the device */
1395         }
1396
1397         if (events & VMXNET3_ECR_DIC)
1398                 PMD_DRV_LOG(DEBUG, "Device implementation change event.");
1399
1400         if (events & VMXNET3_ECR_DEBUG)
1401                 PMD_DRV_LOG(DEBUG, "Debug event generated by device.");
1402 }
1403
1404 static void
1405 vmxnet3_interrupt_handler(void *param)
1406 {
1407         struct rte_eth_dev *dev = param;
1408         struct rte_pci_device *pci_dev = RTE_DEV_TO_PCI(dev->device);
1409
1410         vmxnet3_process_events(dev);
1411
1412         if (rte_intr_enable(&pci_dev->intr_handle) < 0)
1413                 PMD_DRV_LOG(ERR, "interrupt enable failed");
1414 }
1415
1416 RTE_PMD_REGISTER_PCI(net_vmxnet3, rte_vmxnet3_pmd);
1417 RTE_PMD_REGISTER_PCI_TABLE(net_vmxnet3, pci_id_vmxnet3_map);
1418 RTE_PMD_REGISTER_KMOD_DEP(net_vmxnet3, "* igb_uio | uio_pci_generic | vfio-pci");
1419
1420 RTE_INIT(vmxnet3_init_log)
1421 {
1422         vmxnet3_logtype_init = rte_log_register("pmd.net.vmxnet3.init");
1423         if (vmxnet3_logtype_init >= 0)
1424                 rte_log_set_level(vmxnet3_logtype_init, RTE_LOG_NOTICE);
1425         vmxnet3_logtype_driver = rte_log_register("pmd.net.vmxnet3.driver");
1426         if (vmxnet3_logtype_driver >= 0)
1427                 rte_log_set_level(vmxnet3_logtype_driver, RTE_LOG_NOTICE);
1428 }