drivers/net/vmxnet3/vmxnet3_rxtx.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2010-2015 Intel Corporation. All rights reserved.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Intel Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <sys/queue.h>
  35
  36 #include <stdio.h>
  37 #include <stdlib.h>
  38 #include <string.h>
  39 #include <errno.h>
  40 #include <stdint.h>
  41 #include <stdarg.h>
  42 #include <unistd.h>
  43 #include <inttypes.h>
  44
  45 #include <rte_byteorder.h>
  46 #include <rte_common.h>
  47 #include <rte_cycles.h>
  48 #include <rte_log.h>
  49 #include <rte_debug.h>
  50 #include <rte_interrupts.h>
  51 #include <rte_pci.h>
  52 #include <rte_memory.h>
  53 #include <rte_memzone.h>
  54 #include <rte_launch.h>
  55 #include <rte_eal.h>
  56 #include <rte_per_lcore.h>
  57 #include <rte_lcore.h>
  58 #include <rte_atomic.h>
  59 #include <rte_branch_prediction.h>
  60 #include <rte_mempool.h>
  61 #include <rte_malloc.h>
  62 #include <rte_mbuf.h>
  63 #include <rte_ether.h>
  64 #include <rte_ethdev.h>
  65 #include <rte_prefetch.h>
  66 #include <rte_ip.h>
  67 #include <rte_udp.h>
  68 #include <rte_tcp.h>
  69 #include <rte_sctp.h>
  70 #include <rte_string_fns.h>
  71 #include <rte_errno.h>
  72 #include <rte_net.h>
  73
  74 #include "base/vmxnet3_defs.h"
  75 #include "vmxnet3_ring.h"
  76
  77 #include "vmxnet3_logs.h"
  78 #include "vmxnet3_ethdev.h"
  79
  80 #define VMXNET3_TX_OFFLOAD_MASK ( \
  81                 PKT_TX_VLAN_PKT | \
  82                 PKT_TX_L4_MASK |  \
  83                 PKT_TX_TCP_SEG)
  84
  85 #define VMXNET3_TX_OFFLOAD_NOTSUP_MASK  \
  86         (PKT_TX_OFFLOAD_MASK ^ VMXNET3_TX_OFFLOAD_MASK)
  87
  88 static const uint32_t rxprod_reg[2] = {VMXNET3_REG_RXPROD, VMXNET3_REG_RXPROD2};
  89
  90 static int vmxnet3_post_rx_bufs(vmxnet3_rx_queue_t*, uint8_t);
  91 static void vmxnet3_tq_tx_complete(vmxnet3_tx_queue_t *);
  92 #ifdef RTE_LIBRTE_VMXNET3_DEBUG_DRIVER_NOT_USED
  93 static void vmxnet3_rxq_dump(struct vmxnet3_rx_queue *);
  94 static void vmxnet3_txq_dump(struct vmxnet3_tx_queue *);
  95 #endif
  96
  97 #ifdef RTE_LIBRTE_VMXNET3_DEBUG_DRIVER_NOT_USED
  98 static void
  99 vmxnet3_rxq_dump(struct vmxnet3_rx_queue *rxq)
 100 {
 101         uint32_t avail = 0;
 102
 103         if (rxq == NULL)
 104                 return;
 105
 106         PMD_RX_LOG(DEBUG,
 107                    "RXQ: cmd0 base : %p cmd1 base : %p comp ring base : %p.",
 108                    rxq->cmd_ring[0].base, rxq->cmd_ring[1].base, rxq->comp_ring.base);
 109         PMD_RX_LOG(DEBUG,
 110                    "RXQ: cmd0 basePA : 0x%lx cmd1 basePA : 0x%lx comp ring basePA : 0x%lx.",
 111                    (unsigned long)rxq->cmd_ring[0].basePA,
 112                    (unsigned long)rxq->cmd_ring[1].basePA,
 113                    (unsigned long)rxq->comp_ring.basePA);
 114
 115         avail = vmxnet3_cmd_ring_desc_avail(&rxq->cmd_ring[0]);
 116         PMD_RX_LOG(DEBUG,
 117                    "RXQ:cmd0: size=%u; free=%u; next2proc=%u; queued=%u",
 118                    (uint32_t)rxq->cmd_ring[0].size, avail,
 119                    rxq->comp_ring.next2proc,
 120                    rxq->cmd_ring[0].size - avail);
 121
 122         avail = vmxnet3_cmd_ring_desc_avail(&rxq->cmd_ring[1]);
 123         PMD_RX_LOG(DEBUG, "RXQ:cmd1 size=%u; free=%u; next2proc=%u; queued=%u",
 124                    (uint32_t)rxq->cmd_ring[1].size, avail, rxq->comp_ring.next2proc,
 125                    rxq->cmd_ring[1].size - avail);
 126
 127 }
 128
 129 static void
 130 vmxnet3_txq_dump(struct vmxnet3_tx_queue *txq)
 131 {
 132         uint32_t avail = 0;
 133
 134         if (txq == NULL)
 135                 return;
 136
 137         PMD_TX_LOG(DEBUG, "TXQ: cmd base : %p comp ring base : %p data ring base : %p.",
 138                    txq->cmd_ring.base, txq->comp_ring.base, txq->data_ring.base);
 139         PMD_TX_LOG(DEBUG, "TXQ: cmd basePA : 0x%lx comp ring basePA : 0x%lx data ring basePA : 0x%lx.",
 140                    (unsigned long)txq->cmd_ring.basePA,
 141                    (unsigned long)txq->comp_ring.basePA,
 142                    (unsigned long)txq->data_ring.basePA);
 143
 144         avail = vmxnet3_cmd_ring_desc_avail(&txq->cmd_ring);
 145         PMD_TX_LOG(DEBUG, "TXQ: size=%u; free=%u; next2proc=%u; queued=%u",
 146                    (uint32_t)txq->cmd_ring.size, avail,
 147                    txq->comp_ring.next2proc, txq->cmd_ring.size - avail);
 148 }
 149 #endif
 150
 151 static void
 152 vmxnet3_tx_cmd_ring_release_mbufs(vmxnet3_cmd_ring_t *ring)
 153 {
 154         while (ring->next2comp != ring->next2fill) {
 155                 /* No need to worry about desc ownership, device is quiesced by now. */
 156                 vmxnet3_buf_info_t *buf_info = ring->buf_info + ring->next2comp;
 157
 158                 if (buf_info->m) {
 159                         rte_pktmbuf_free(buf_info->m);
 160                         buf_info->m = NULL;
 161                         buf_info->bufPA = 0;
 162                         buf_info->len = 0;
 163                 }
 164                 vmxnet3_cmd_ring_adv_next2comp(ring);
 165         }
 166 }
 167
 168 static void
 169 vmxnet3_rx_cmd_ring_release_mbufs(vmxnet3_cmd_ring_t *ring)
 170 {
 171         uint32_t i;
 172
 173         for (i = 0; i < ring->size; i++) {
 174                 /* No need to worry about desc ownership, device is quiesced by now. */
 175                 vmxnet3_buf_info_t *buf_info = &ring->buf_info[i];
 176
 177                 if (buf_info->m) {
 178                         rte_pktmbuf_free_seg(buf_info->m);
 179                         buf_info->m = NULL;
 180                         buf_info->bufPA = 0;
 181                         buf_info->len = 0;
 182                 }
 183                 vmxnet3_cmd_ring_adv_next2comp(ring);
 184         }
 185 }
 186
 187 static void
 188 vmxnet3_cmd_ring_release(vmxnet3_cmd_ring_t *ring)
 189 {
 190         rte_free(ring->buf_info);
 191         ring->buf_info = NULL;
 192 }
 193
 194 void
 195 vmxnet3_dev_tx_queue_release(void *txq)
 196 {
 197         vmxnet3_tx_queue_t *tq = txq;
 198
 199         if (tq != NULL) {
 200                 /* Release mbufs */
 201                 vmxnet3_tx_cmd_ring_release_mbufs(&tq->cmd_ring);
 202                 /* Release the cmd_ring */
 203                 vmxnet3_cmd_ring_release(&tq->cmd_ring);
 204                 /* Release the memzone */
 205                 rte_memzone_free(tq->mz);
 206         }
 207 }
 208
 209 void
 210 vmxnet3_dev_rx_queue_release(void *rxq)
 211 {
 212         int i;
 213         vmxnet3_rx_queue_t *rq = rxq;
 214
 215         if (rq != NULL) {
 216                 /* Release mbufs */
 217                 for (i = 0; i < VMXNET3_RX_CMDRING_SIZE; i++)
 218                         vmxnet3_rx_cmd_ring_release_mbufs(&rq->cmd_ring[i]);
 219
 220                 /* Release both the cmd_rings */
 221                 for (i = 0; i < VMXNET3_RX_CMDRING_SIZE; i++)
 222                         vmxnet3_cmd_ring_release(&rq->cmd_ring[i]);
 223
 224                 /* Release the memzone */
 225                 rte_memzone_free(rq->mz);
 226         }
 227 }
 228
 229 static void
 230 vmxnet3_dev_tx_queue_reset(void *txq)
 231 {
 232         vmxnet3_tx_queue_t *tq = txq;
 233         struct vmxnet3_cmd_ring *ring = &tq->cmd_ring;
 234         struct vmxnet3_comp_ring *comp_ring = &tq->comp_ring;
 235         struct vmxnet3_data_ring *data_ring = &tq->data_ring;
 236         int size;
 237
 238         if (tq != NULL) {
 239                 /* Release the cmd_ring mbufs */
 240                 vmxnet3_tx_cmd_ring_release_mbufs(&tq->cmd_ring);
 241         }
 242
 243         /* Tx vmxnet rings structure initialization*/
 244         ring->next2fill = 0;
 245         ring->next2comp = 0;
 246         ring->gen = VMXNET3_INIT_GEN;
 247         comp_ring->next2proc = 0;
 248         comp_ring->gen = VMXNET3_INIT_GEN;
 249
 250         size = sizeof(struct Vmxnet3_TxDesc) * ring->size;
 251         size += sizeof(struct Vmxnet3_TxCompDesc) * comp_ring->size;
 252         size += tq->txdata_desc_size * data_ring->size;
 253
 254         memset(ring->base, 0, size);
 255 }
 256
 257 static void
 258 vmxnet3_dev_rx_queue_reset(void *rxq)
 259 {
 260         int i;
 261         vmxnet3_rx_queue_t *rq = rxq;
 262         struct vmxnet3_hw *hw = rq->hw;
 263         struct vmxnet3_cmd_ring *ring0, *ring1;
 264         struct vmxnet3_comp_ring *comp_ring;
 265         struct vmxnet3_rx_data_ring *data_ring = &rq->data_ring;
 266         int size;
 267
 268         if (rq != NULL) {
 269                 /* Release both the cmd_rings mbufs */
 270                 for (i = 0; i < VMXNET3_RX_CMDRING_SIZE; i++)
 271                         vmxnet3_rx_cmd_ring_release_mbufs(&rq->cmd_ring[i]);
 272         }
 273
 274         ring0 = &rq->cmd_ring[0];
 275         ring1 = &rq->cmd_ring[1];
 276         comp_ring = &rq->comp_ring;
 277
 278         /* Rx vmxnet rings structure initialization */
 279         ring0->next2fill = 0;
 280         ring1->next2fill = 0;
 281         ring0->next2comp = 0;
 282         ring1->next2comp = 0;
 283         ring0->gen = VMXNET3_INIT_GEN;
 284         ring1->gen = VMXNET3_INIT_GEN;
 285         comp_ring->next2proc = 0;
 286         comp_ring->gen = VMXNET3_INIT_GEN;
 287
 288         size = sizeof(struct Vmxnet3_RxDesc) * (ring0->size + ring1->size);
 289         size += sizeof(struct Vmxnet3_RxCompDesc) * comp_ring->size;
 290         if (VMXNET3_VERSION_GE_3(hw) && rq->data_desc_size)
 291                 size += rq->data_desc_size * data_ring->size;
 292
 293         memset(ring0->base, 0, size);
 294 }
 295
 296 void
 297 vmxnet3_dev_clear_queues(struct rte_eth_dev *dev)
 298 {
 299         unsigned i;
 300
 301         PMD_INIT_FUNC_TRACE();
 302
 303         for (i = 0; i < dev->data->nb_tx_queues; i++) {
 304                 struct vmxnet3_tx_queue *txq = dev->data->tx_queues[i];
 305
 306                 if (txq != NULL) {
 307                         txq->stopped = TRUE;
 308                         vmxnet3_dev_tx_queue_reset(txq);
 309                 }
 310         }
 311
 312         for (i = 0; i < dev->data->nb_rx_queues; i++) {
 313                 struct vmxnet3_rx_queue *rxq = dev->data->rx_queues[i];
 314
 315                 if (rxq != NULL) {
 316                         rxq->stopped = TRUE;
 317                         vmxnet3_dev_rx_queue_reset(rxq);
 318                 }
 319         }
 320 }
 321
 322 static int
 323 vmxnet3_unmap_pkt(uint16_t eop_idx, vmxnet3_tx_queue_t *txq)
 324 {
 325         int completed = 0;
 326         struct rte_mbuf *mbuf;
 327
 328         /* Release cmd_ring descriptor and free mbuf */
 329         RTE_ASSERT(txq->cmd_ring.base[eop_idx].txd.eop == 1);
 330
 331         mbuf = txq->cmd_ring.buf_info[eop_idx].m;
 332         if (mbuf == NULL)
 333                 rte_panic("EOP desc does not point to a valid mbuf");
 334         rte_pktmbuf_free(mbuf);
 335
 336         txq->cmd_ring.buf_info[eop_idx].m = NULL;
 337
 338         while (txq->cmd_ring.next2comp != eop_idx) {
 339                 /* no out-of-order completion */
 340                 RTE_ASSERT(txq->cmd_ring.base[txq->cmd_ring.next2comp].txd.cq == 0);
 341                 vmxnet3_cmd_ring_adv_next2comp(&txq->cmd_ring);
 342                 completed++;
 343         }
 344
 345         /* Mark the txd for which tcd was generated as completed */
 346         vmxnet3_cmd_ring_adv_next2comp(&txq->cmd_ring);
 347
 348         return completed + 1;
 349 }
 350
 351 static void
 352 vmxnet3_tq_tx_complete(vmxnet3_tx_queue_t *txq)
 353 {
 354         int completed = 0;
 355         vmxnet3_comp_ring_t *comp_ring = &txq->comp_ring;
 356         struct Vmxnet3_TxCompDesc *tcd = (struct Vmxnet3_TxCompDesc *)
 357                 (comp_ring->base + comp_ring->next2proc);
 358
 359         while (tcd->gen == comp_ring->gen) {
 360                 completed += vmxnet3_unmap_pkt(tcd->txdIdx, txq);
 361
 362                 vmxnet3_comp_ring_adv_next2proc(comp_ring);
 363                 tcd = (struct Vmxnet3_TxCompDesc *)(comp_ring->base +
 364                                                     comp_ring->next2proc);
 365         }
 366
 367         PMD_TX_LOG(DEBUG, "Processed %d tx comps & command descs.", completed);
 368 }
 369
 370 uint16_t
 371 vmxnet3_prep_pkts(__rte_unused void *tx_queue, struct rte_mbuf **tx_pkts,
 372         uint16_t nb_pkts)
 373 {
 374         int32_t ret;
 375         uint32_t i;
 376         uint64_t ol_flags;
 377         struct rte_mbuf *m;
 378
 379         for (i = 0; i != nb_pkts; i++) {
 380                 m = tx_pkts[i];
 381                 ol_flags = m->ol_flags;
 382
 383                 /* Non-TSO packet cannot occupy more than
 384                  * VMXNET3_MAX_TXD_PER_PKT TX descriptors.
 385                  */
 386                 if ((ol_flags & PKT_TX_TCP_SEG) == 0 &&
 387                                 m->nb_segs > VMXNET3_MAX_TXD_PER_PKT) {
 388                         rte_errno = -EINVAL;
 389                         return i;
 390                 }
 391
 392                 /* check that only supported TX offloads are requested. */
 393                 if ((ol_flags & VMXNET3_TX_OFFLOAD_NOTSUP_MASK) != 0 ||
 394                                 (ol_flags & PKT_TX_L4_MASK) ==
 395                                 PKT_TX_SCTP_CKSUM) {
 396                         rte_errno = -ENOTSUP;
 397                         return i;
 398                 }
 399
 400 #ifdef RTE_LIBRTE_ETHDEV_DEBUG
 401                 ret = rte_validate_tx_offload(m);
 402                 if (ret != 0) {
 403                         rte_errno = ret;
 404                         return i;
 405                 }
 406 #endif
 407                 ret = rte_net_intel_cksum_prepare(m);
 408                 if (ret != 0) {
 409                         rte_errno = ret;
 410                         return i;
 411                 }
 412         }
 413
 414         return i;
 415 }
 416
 417 uint16_t
 418 vmxnet3_xmit_pkts(void *tx_queue, struct rte_mbuf **tx_pkts,
 419                   uint16_t nb_pkts)
 420 {
 421         uint16_t nb_tx;
 422         vmxnet3_tx_queue_t *txq = tx_queue;
 423         struct vmxnet3_hw *hw = txq->hw;
 424         Vmxnet3_TxQueueCtrl *txq_ctrl = &txq->shared->ctrl;
 425         uint32_t deferred = rte_le_to_cpu_32(txq_ctrl->txNumDeferred);
 426
 427         if (unlikely(txq->stopped)) {
 428                 PMD_TX_LOG(DEBUG, "Tx queue is stopped.");
 429                 return 0;
 430         }
 431
 432         /* Free up the comp_descriptors aggressively */
 433         vmxnet3_tq_tx_complete(txq);
 434
 435         nb_tx = 0;
 436         while (nb_tx < nb_pkts) {
 437                 Vmxnet3_GenericDesc *gdesc;
 438                 vmxnet3_buf_info_t *tbi;
 439                 uint32_t first2fill, avail, dw2;
 440                 struct rte_mbuf *txm = tx_pkts[nb_tx];
 441                 struct rte_mbuf *m_seg = txm;
 442                 int copy_size = 0;
 443                 bool tso = (txm->ol_flags & PKT_TX_TCP_SEG) != 0;
 444                 /* # of descriptors needed for a packet. */
 445                 unsigned count = txm->nb_segs;
 446
 447                 avail = vmxnet3_cmd_ring_desc_avail(&txq->cmd_ring);
 448                 if (count > avail) {
 449                         /* Is command ring full? */
 450                         if (unlikely(avail == 0)) {
 451                                 PMD_TX_LOG(DEBUG, "No free ring descriptors");
 452                                 txq->stats.tx_ring_full++;
 453                                 txq->stats.drop_total += (nb_pkts - nb_tx);
 454                                 break;
 455                         }
 456
 457                         /* Command ring is not full but cannot handle the
 458                          * multi-segmented packet. Let's try the next packet
 459                          * in this case.
 460                          */
 461                         PMD_TX_LOG(DEBUG, "Running out of ring descriptors "
 462                                    "(avail %d needed %d)", avail, count);
 463                         txq->stats.drop_total++;
 464                         if (tso)
 465                                 txq->stats.drop_tso++;
 466                         rte_pktmbuf_free(txm);
 467                         nb_tx++;
 468                         continue;
 469                 }
 470
 471                 /* Drop non-TSO packet that is excessively fragmented */
 472                 if (unlikely(!tso && count > VMXNET3_MAX_TXD_PER_PKT)) {
 473                         PMD_TX_LOG(ERR, "Non-TSO packet cannot occupy more than %d tx "
 474                                    "descriptors. Packet dropped.", VMXNET3_MAX_TXD_PER_PKT);
 475                         txq->stats.drop_too_many_segs++;
 476                         txq->stats.drop_total++;
 477                         rte_pktmbuf_free(txm);
 478                         nb_tx++;
 479                         continue;
 480                 }
 481
 482                 if (txm->nb_segs == 1 &&
 483                     rte_pktmbuf_pkt_len(txm) <= txq->txdata_desc_size) {
 484                         struct Vmxnet3_TxDataDesc *tdd;
 485
 486                         tdd = (struct Vmxnet3_TxDataDesc *)
 487                                 ((uint8 *)txq->data_ring.base +
 488                                  txq->cmd_ring.next2fill *
 489                                  txq->txdata_desc_size);
 490                         copy_size = rte_pktmbuf_pkt_len(txm);
 491                         rte_memcpy(tdd->data, rte_pktmbuf_mtod(txm, char *), copy_size);
 492                 }
 493
 494                 /* use the previous gen bit for the SOP desc */
 495                 dw2 = (txq->cmd_ring.gen ^ 0x1) << VMXNET3_TXD_GEN_SHIFT;
 496                 first2fill = txq->cmd_ring.next2fill;
 497                 do {
 498                         /* Remember the transmit buffer for cleanup */
 499                         tbi = txq->cmd_ring.buf_info + txq->cmd_ring.next2fill;
 500
 501                         /* NB: the following assumes that VMXNET3 maximum
 502                          * transmit buffer size (16K) is greater than
 503                          * maximum size of mbuf segment size.
 504                          */
 505                         gdesc = txq->cmd_ring.base + txq->cmd_ring.next2fill;
 506                         if (copy_size) {
 507                                 uint64 offset = txq->cmd_ring.next2fill *
 508                                                 txq->txdata_desc_size;
 509                                 gdesc->txd.addr =
 510                                         rte_cpu_to_le_64(txq->data_ring.basePA +
 511                                                          offset);
 512                         } else {
 513                                 gdesc->txd.addr = rte_mbuf_data_dma_addr(m_seg);
 514                         }
 515
 516                         gdesc->dword[2] = dw2 | m_seg->data_len;
 517                         gdesc->dword[3] = 0;
 518
 519                         /* move to the next2fill descriptor */
 520                         vmxnet3_cmd_ring_adv_next2fill(&txq->cmd_ring);
 521
 522                         /* use the right gen for non-SOP desc */
 523                         dw2 = txq->cmd_ring.gen << VMXNET3_TXD_GEN_SHIFT;
 524                 } while ((m_seg = m_seg->next) != NULL);
 525
 526                 /* set the last buf_info for the pkt */
 527                 tbi->m = txm;
 528                 /* Update the EOP descriptor */
 529                 gdesc->dword[3] |= VMXNET3_TXD_EOP | VMXNET3_TXD_CQ;
 530
 531                 /* Add VLAN tag if present */
 532                 gdesc = txq->cmd_ring.base + first2fill;
 533                 if (txm->ol_flags & PKT_TX_VLAN_PKT) {
 534                         gdesc->txd.ti = 1;
 535                         gdesc->txd.tci = txm->vlan_tci;
 536                 }
 537
 538                 if (tso) {
 539                         uint16_t mss = txm->tso_segsz;
 540
 541                         RTE_ASSERT(mss > 0);
 542
 543                         gdesc->txd.hlen = txm->l2_len + txm->l3_len + txm->l4_len;
 544                         gdesc->txd.om = VMXNET3_OM_TSO;
 545                         gdesc->txd.msscof = mss;
 546
 547                         deferred += (rte_pktmbuf_pkt_len(txm) - gdesc->txd.hlen + mss - 1) / mss;
 548                 } else if (txm->ol_flags & PKT_TX_L4_MASK) {
 549                         gdesc->txd.om = VMXNET3_OM_CSUM;
 550                         gdesc->txd.hlen = txm->l2_len + txm->l3_len;
 551
 552                         switch (txm->ol_flags & PKT_TX_L4_MASK) {
 553                         case PKT_TX_TCP_CKSUM:
 554                                 gdesc->txd.msscof = gdesc->txd.hlen + offsetof(struct tcp_hdr, cksum);
 555                                 break;
 556                         case PKT_TX_UDP_CKSUM:
 557                                 gdesc->txd.msscof = gdesc->txd.hlen + offsetof(struct udp_hdr, dgram_cksum);
 558                                 break;
 559                         default:
 560                                 PMD_TX_LOG(WARNING, "requested cksum offload not supported %#llx",
 561                                            txm->ol_flags & PKT_TX_L4_MASK);
 562                                 abort();
 563                         }
 564                         deferred++;
 565                 } else {
 566                         gdesc->txd.hlen = 0;
 567                         gdesc->txd.om = VMXNET3_OM_NONE;
 568                         gdesc->txd.msscof = 0;
 569                         deferred++;
 570                 }
 571
 572                 /* flip the GEN bit on the SOP */
 573                 rte_compiler_barrier();
 574                 gdesc->dword[2] ^= VMXNET3_TXD_GEN;
 575
 576                 txq_ctrl->txNumDeferred = rte_cpu_to_le_32(deferred);
 577                 nb_tx++;
 578         }
 579
 580         PMD_TX_LOG(DEBUG, "vmxnet3 txThreshold: %u", rte_le_to_cpu_32(txq_ctrl->txThreshold));
 581
 582         if (deferred >= rte_le_to_cpu_32(txq_ctrl->txThreshold)) {
 583                 txq_ctrl->txNumDeferred = 0;
 584                 /* Notify vSwitch that packets are available. */
 585                 VMXNET3_WRITE_BAR0_REG(hw, (VMXNET3_REG_TXPROD + txq->queue_id * VMXNET3_REG_ALIGN),
 586                                        txq->cmd_ring.next2fill);
 587         }
 588
 589         return nb_tx;
 590 }
 591
 592 static inline void
 593 vmxnet3_renew_desc(vmxnet3_rx_queue_t *rxq, uint8_t ring_id,
 594                    struct rte_mbuf *mbuf)
 595 {
 596         uint32_t val;
 597         struct vmxnet3_cmd_ring *ring = &rxq->cmd_ring[ring_id];
 598         struct Vmxnet3_RxDesc *rxd =
 599                 (struct Vmxnet3_RxDesc *)(ring->base + ring->next2fill);
 600         vmxnet3_buf_info_t *buf_info = &ring->buf_info[ring->next2fill];
 601
 602         if (ring_id == 0) {
 603                 /* Usually: One HEAD type buf per packet
 604                  * val = (ring->next2fill % rxq->hw->bufs_per_pkt) ?
 605                  * VMXNET3_RXD_BTYPE_BODY : VMXNET3_RXD_BTYPE_HEAD;
 606                  */
 607
 608                 /* We use single packet buffer so all heads here */
 609                 val = VMXNET3_RXD_BTYPE_HEAD;
 610         } else {
 611                 /* All BODY type buffers for 2nd ring */
 612                 val = VMXNET3_RXD_BTYPE_BODY;
 613         }
 614
 615         /*
 616          * Load mbuf pointer into buf_info[ring_size]
 617          * buf_info structure is equivalent to cookie for virtio-virtqueue
 618          */
 619         buf_info->m = mbuf;
 620         buf_info->len = (uint16_t)(mbuf->buf_len - RTE_PKTMBUF_HEADROOM);
 621         buf_info->bufPA = rte_mbuf_data_dma_addr_default(mbuf);
 622
 623         /* Load Rx Descriptor with the buffer's GPA */
 624         rxd->addr = buf_info->bufPA;
 625
 626         /* After this point rxd->addr MUST not be NULL */
 627         rxd->btype = val;
 628         rxd->len = buf_info->len;
 629         /* Flip gen bit at the end to change ownership */
 630         rxd->gen = ring->gen;
 631
 632         vmxnet3_cmd_ring_adv_next2fill(ring);
 633 }
 634 /*
 635  *  Allocates mbufs and clusters. Post rx descriptors with buffer details
 636  *  so that device can receive packets in those buffers.
 637  *  Ring layout:
 638  *      Among the two rings, 1st ring contains buffers of type 0 and type 1.
 639  *      bufs_per_pkt is set such that for non-LRO cases all the buffers required
 640  *      by a frame will fit in 1st ring (1st buf of type0 and rest of type1).
 641  *      2nd ring contains buffers of type 1 alone. Second ring mostly be used
 642  *      only for LRO.
 643  */
 644 static int
 645 vmxnet3_post_rx_bufs(vmxnet3_rx_queue_t *rxq, uint8_t ring_id)
 646 {
 647         int err = 0;
 648         uint32_t i = 0;
 649         struct vmxnet3_cmd_ring *ring = &rxq->cmd_ring[ring_id];
 650
 651         while (vmxnet3_cmd_ring_desc_avail(ring) > 0) {
 652                 struct rte_mbuf *mbuf;
 653
 654                 /* Allocate blank mbuf for the current Rx Descriptor */
 655                 mbuf = rte_mbuf_raw_alloc(rxq->mp);
 656                 if (unlikely(mbuf == NULL)) {
 657                         PMD_RX_LOG(ERR, "Error allocating mbuf");
 658                         rxq->stats.rx_buf_alloc_failure++;
 659                         err = ENOMEM;
 660                         break;
 661                 }
 662
 663                 vmxnet3_renew_desc(rxq, ring_id, mbuf);
 664                 i++;
 665         }
 666
 667         /* Return error only if no buffers are posted at present */
 668         if (vmxnet3_cmd_ring_desc_avail(ring) >= (ring->size - 1))
 669                 return -err;
 670         else
 671                 return i;
 672 }
 673
 674
 675 /* Receive side checksum and other offloads */
 676 static void
 677 vmxnet3_rx_offload(const Vmxnet3_RxCompDesc *rcd, struct rte_mbuf *rxm)
 678 {
 679         /* Check for RSS */
 680         if (rcd->rssType != VMXNET3_RCD_RSS_TYPE_NONE) {
 681                 rxm->ol_flags |= PKT_RX_RSS_HASH;
 682                 rxm->hash.rss = rcd->rssHash;
 683         }
 684
 685         /* Check packet type, checksum errors, etc. Only support IPv4 for now. */
 686         if (rcd->v4) {
 687                 struct ether_hdr *eth = rte_pktmbuf_mtod(rxm, struct ether_hdr *);
 688                 struct ipv4_hdr *ip = (struct ipv4_hdr *)(eth + 1);
 689
 690                 if (((ip->version_ihl & 0xf) << 2) > (int)sizeof(struct ipv4_hdr))
 691                         rxm->packet_type = RTE_PTYPE_L3_IPV4_EXT;
 692                 else
 693                         rxm->packet_type = RTE_PTYPE_L3_IPV4;
 694
 695                 if (!rcd->cnc) {
 696                         if (!rcd->ipc)
 697                                 rxm->ol_flags |= PKT_RX_IP_CKSUM_BAD;
 698
 699                         if ((rcd->tcp || rcd->udp) && !rcd->tuc)
 700                                 rxm->ol_flags |= PKT_RX_L4_CKSUM_BAD;
 701                 }
 702         }
 703 }
 704
 705 /*
 706  * Process the Rx Completion Ring of given vmxnet3_rx_queue
 707  * for nb_pkts burst and return the number of packets received
 708  */
 709 uint16_t
 710 vmxnet3_recv_pkts(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
 711 {
 712         uint16_t nb_rx;
 713         uint32_t nb_rxd, idx;
 714         uint8_t ring_idx;
 715         vmxnet3_rx_queue_t *rxq;
 716         Vmxnet3_RxCompDesc *rcd;
 717         vmxnet3_buf_info_t *rbi;
 718         Vmxnet3_RxDesc *rxd;
 719         struct rte_mbuf *rxm = NULL;
 720         struct vmxnet3_hw *hw;
 721
 722         nb_rx = 0;
 723         ring_idx = 0;
 724         nb_rxd = 0;
 725         idx = 0;
 726
 727         rxq = rx_queue;
 728         hw = rxq->hw;
 729
 730         rcd = &rxq->comp_ring.base[rxq->comp_ring.next2proc].rcd;
 731
 732         if (unlikely(rxq->stopped)) {
 733                 PMD_RX_LOG(DEBUG, "Rx queue is stopped.");
 734                 return 0;
 735         }
 736
 737         while (rcd->gen == rxq->comp_ring.gen) {
 738                 struct rte_mbuf *newm;
 739
 740                 if (nb_rx >= nb_pkts)
 741                         break;
 742
 743                 newm = rte_mbuf_raw_alloc(rxq->mp);
 744                 if (unlikely(newm == NULL)) {
 745                         PMD_RX_LOG(ERR, "Error allocating mbuf");
 746                         rxq->stats.rx_buf_alloc_failure++;
 747                         break;
 748                 }
 749
 750                 idx = rcd->rxdIdx;
 751                 ring_idx = vmxnet3_get_ring_idx(hw, rcd->rqID);
 752                 rxd = (Vmxnet3_RxDesc *)rxq->cmd_ring[ring_idx].base + idx;
 753                 RTE_SET_USED(rxd); /* used only for assert when enabled */
 754                 rbi = rxq->cmd_ring[ring_idx].buf_info + idx;
 755
 756                 PMD_RX_LOG(DEBUG, "rxd idx: %d ring idx: %d.", idx, ring_idx);
 757
 758                 RTE_ASSERT(rcd->len <= rxd->len);
 759                 RTE_ASSERT(rbi->m);
 760
 761                 /* Get the packet buffer pointer from buf_info */
 762                 rxm = rbi->m;
 763
 764                 /* Clear descriptor associated buf_info to be reused */
 765                 rbi->m = NULL;
 766                 rbi->bufPA = 0;
 767
 768                 /* Update the index that we received a packet */
 769                 rxq->cmd_ring[ring_idx].next2comp = idx;
 770
 771                 /* For RCD with EOP set, check if there is frame error */
 772                 if (unlikely(rcd->eop && rcd->err)) {
 773                         rxq->stats.drop_total++;
 774                         rxq->stats.drop_err++;
 775
 776                         if (!rcd->fcs) {
 777                                 rxq->stats.drop_fcs++;
 778                                 PMD_RX_LOG(ERR, "Recv packet dropped due to frame err.");
 779                         }
 780                         PMD_RX_LOG(ERR, "Error in received packet rcd#:%d rxd:%d",
 781                                    (int)(rcd - (struct Vmxnet3_RxCompDesc *)
 782                                          rxq->comp_ring.base), rcd->rxdIdx);
 783                         rte_pktmbuf_free_seg(rxm);
 784                         if (rxq->start_seg) {
 785                                 struct rte_mbuf *start = rxq->start_seg;
 786
 787                                 rxq->start_seg = NULL;
 788                                 rte_pktmbuf_free(start);
 789                         }
 790                         goto rcd_done;
 791                 }
 792
 793                 /* Initialize newly received packet buffer */
 794                 rxm->port = rxq->port_id;
 795                 rxm->nb_segs = 1;
 796                 rxm->next = NULL;
 797                 rxm->pkt_len = (uint16_t)rcd->len;
 798                 rxm->data_len = (uint16_t)rcd->len;
 799                 rxm->data_off = RTE_PKTMBUF_HEADROOM;
 800                 rxm->ol_flags = 0;
 801                 rxm->vlan_tci = 0;
 802
 803                 /*
 804                  * If this is the first buffer of the received packet,
 805                  * set the pointer to the first mbuf of the packet
 806                  * Otherwise, update the total length and the number of segments
 807                  * of the current scattered packet, and update the pointer to
 808                  * the last mbuf of the current packet.
 809                  */
 810                 if (rcd->sop) {
 811                         RTE_ASSERT(rxd->btype == VMXNET3_RXD_BTYPE_HEAD);
 812
 813                         if (unlikely(rcd->len == 0)) {
 814                                 RTE_ASSERT(rcd->eop);
 815
 816                                 PMD_RX_LOG(DEBUG,
 817                                            "Rx buf was skipped. rxring[%d][%d])",
 818                                            ring_idx, idx);
 819                                 rte_pktmbuf_free_seg(rxm);
 820                                 goto rcd_done;
 821                         }
 822
 823                         if (vmxnet3_rx_data_ring(hw, rcd->rqID)) {
 824                                 uint8_t *rdd = rxq->data_ring.base +
 825                                         idx * rxq->data_desc_size;
 826
 827                                 RTE_ASSERT(VMXNET3_VERSION_GE_3(hw));
 828                                 rte_memcpy(rte_pktmbuf_mtod(rxm, char *),
 829                                            rdd, rcd->len);
 830                         }
 831
 832                         rxq->start_seg = rxm;
 833                         vmxnet3_rx_offload(rcd, rxm);
 834                 } else {
 835                         struct rte_mbuf *start = rxq->start_seg;
 836
 837                         RTE_ASSERT(rxd->btype == VMXNET3_RXD_BTYPE_BODY);
 838
 839                         start->pkt_len += rxm->data_len;
 840                         start->nb_segs++;
 841
 842                         rxq->last_seg->next = rxm;
 843                 }
 844                 rxq->last_seg = rxm;
 845
 846                 if (rcd->eop) {
 847                         struct rte_mbuf *start = rxq->start_seg;
 848
 849                         /* Check for hardware stripped VLAN tag */
 850                         if (rcd->ts) {
 851                                 start->ol_flags |= (PKT_RX_VLAN_PKT | PKT_RX_VLAN_STRIPPED);
 852                                 start->vlan_tci = rte_le_to_cpu_16((uint16_t)rcd->tci);
 853                         }
 854
 855                         rx_pkts[nb_rx++] = start;
 856                         rxq->start_seg = NULL;
 857                 }
 858
 859 rcd_done:
 860                 rxq->cmd_ring[ring_idx].next2comp = idx;
 861                 VMXNET3_INC_RING_IDX_ONLY(rxq->cmd_ring[ring_idx].next2comp,
 862                                           rxq->cmd_ring[ring_idx].size);
 863
 864                 /* It's time to renew descriptors */
 865                 vmxnet3_renew_desc(rxq, ring_idx, newm);
 866                 if (unlikely(rxq->shared->ctrl.updateRxProd)) {
 867                         VMXNET3_WRITE_BAR0_REG(hw, rxprod_reg[ring_idx] + (rxq->queue_id * VMXNET3_REG_ALIGN),
 868                                                rxq->cmd_ring[ring_idx].next2fill);
 869                 }
 870
 871                 /* Advance to the next descriptor in comp_ring */
 872                 vmxnet3_comp_ring_adv_next2proc(&rxq->comp_ring);
 873
 874                 rcd = &rxq->comp_ring.base[rxq->comp_ring.next2proc].rcd;
 875                 nb_rxd++;
 876                 if (nb_rxd > rxq->cmd_ring[0].size) {
 877                         PMD_RX_LOG(ERR, "Used up quota of receiving packets,"
 878                                    " relinquish control.");
 879                         break;
 880                 }
 881         }
 882
 883         return nb_rx;
 884 }
 885
 886 int
 887 vmxnet3_dev_tx_queue_setup(struct rte_eth_dev *dev,
 888                            uint16_t queue_idx,
 889                            uint16_t nb_desc,
 890                            unsigned int socket_id,
 891                            const struct rte_eth_txconf *tx_conf)
 892 {
 893         struct vmxnet3_hw *hw = dev->data->dev_private;
 894         const struct rte_memzone *mz;
 895         struct vmxnet3_tx_queue *txq;
 896         struct vmxnet3_cmd_ring *ring;
 897         struct vmxnet3_comp_ring *comp_ring;
 898         struct vmxnet3_data_ring *data_ring;
 899         int size;
 900
 901         PMD_INIT_FUNC_TRACE();
 902
 903         if ((tx_conf->txq_flags & ETH_TXQ_FLAGS_NOXSUMSCTP) !=
 904             ETH_TXQ_FLAGS_NOXSUMSCTP) {
 905                 PMD_INIT_LOG(ERR, "SCTP checksum offload not supported");
 906                 return -EINVAL;
 907         }
 908
 909         txq = rte_zmalloc("ethdev_tx_queue", sizeof(struct vmxnet3_tx_queue),
 910                           RTE_CACHE_LINE_SIZE);
 911         if (txq == NULL) {
 912                 PMD_INIT_LOG(ERR, "Can not allocate tx queue structure");
 913                 return -ENOMEM;
 914         }
 915
 916         txq->queue_id = queue_idx;
 917         txq->port_id = dev->data->port_id;
 918         txq->shared = &hw->tqd_start[queue_idx];
 919         txq->hw = hw;
 920         txq->qid = queue_idx;
 921         txq->stopped = TRUE;
 922         txq->txdata_desc_size = hw->txdata_desc_size;
 923
 924         ring = &txq->cmd_ring;
 925         comp_ring = &txq->comp_ring;
 926         data_ring = &txq->data_ring;
 927
 928         /* Tx vmxnet ring length should be between 512-4096 */
 929         if (nb_desc < VMXNET3_DEF_TX_RING_SIZE) {
 930                 PMD_INIT_LOG(ERR, "VMXNET3 Tx Ring Size Min: %u",
 931                              VMXNET3_DEF_TX_RING_SIZE);
 932                 return -EINVAL;
 933         } else if (nb_desc > VMXNET3_TX_RING_MAX_SIZE) {
 934                 PMD_INIT_LOG(ERR, "VMXNET3 Tx Ring Size Max: %u",
 935                              VMXNET3_TX_RING_MAX_SIZE);
 936                 return -EINVAL;
 937         } else {
 938                 ring->size = nb_desc;
 939                 ring->size &= ~VMXNET3_RING_SIZE_MASK;
 940         }
 941         comp_ring->size = data_ring->size = ring->size;
 942
 943         /* Tx vmxnet rings structure initialization*/
 944         ring->next2fill = 0;
 945         ring->next2comp = 0;
 946         ring->gen = VMXNET3_INIT_GEN;
 947         comp_ring->next2proc = 0;
 948         comp_ring->gen = VMXNET3_INIT_GEN;
 949
 950         size = sizeof(struct Vmxnet3_TxDesc) * ring->size;
 951         size += sizeof(struct Vmxnet3_TxCompDesc) * comp_ring->size;
 952         size += txq->txdata_desc_size * data_ring->size;
 953
 954         mz = rte_eth_dma_zone_reserve(dev, "txdesc", queue_idx, size,
 955                                       VMXNET3_RING_BA_ALIGN, socket_id);
 956         if (mz == NULL) {
 957                 PMD_INIT_LOG(ERR, "ERROR: Creating queue descriptors zone");
 958                 return -ENOMEM;
 959         }
 960         txq->mz = mz;
 961         memset(mz->addr, 0, mz->len);
 962
 963         /* cmd_ring initialization */
 964         ring->base = mz->addr;
 965         ring->basePA = mz->phys_addr;
 966
 967         /* comp_ring initialization */
 968         comp_ring->base = ring->base + ring->size;
 969         comp_ring->basePA = ring->basePA +
 970                 (sizeof(struct Vmxnet3_TxDesc) * ring->size);
 971
 972         /* data_ring initialization */
 973         data_ring->base = (Vmxnet3_TxDataDesc *)(comp_ring->base + comp_ring->size);
 974         data_ring->basePA = comp_ring->basePA +
 975                         (sizeof(struct Vmxnet3_TxCompDesc) * comp_ring->size);
 976
 977         /* cmd_ring0 buf_info allocation */
 978         ring->buf_info = rte_zmalloc("tx_ring_buf_info",
 979                                      ring->size * sizeof(vmxnet3_buf_info_t), RTE_CACHE_LINE_SIZE);
 980         if (ring->buf_info == NULL) {
 981                 PMD_INIT_LOG(ERR, "ERROR: Creating tx_buf_info structure");
 982                 return -ENOMEM;
 983         }
 984
 985         /* Update the data portion with txq */
 986         dev->data->tx_queues[queue_idx] = txq;
 987
 988         return 0;
 989 }
 990
 991 int
 992 vmxnet3_dev_rx_queue_setup(struct rte_eth_dev *dev,
 993                            uint16_t queue_idx,
 994                            uint16_t nb_desc,
 995                            unsigned int socket_id,
 996                            __rte_unused const struct rte_eth_rxconf *rx_conf,
 997                            struct rte_mempool *mp)
 998 {
 999         const struct rte_memzone *mz;
1000         struct vmxnet3_rx_queue *rxq;
1001         struct vmxnet3_hw *hw = dev->data->dev_private;
1002         struct vmxnet3_cmd_ring *ring0, *ring1, *ring;
1003         struct vmxnet3_comp_ring *comp_ring;
1004         struct vmxnet3_rx_data_ring *data_ring;
1005         int size;
1006         uint8_t i;
1007         char mem_name[32];
1008
1009         PMD_INIT_FUNC_TRACE();
1010
1011         rxq = rte_zmalloc("ethdev_rx_queue", sizeof(struct vmxnet3_rx_queue),
1012                           RTE_CACHE_LINE_SIZE);
1013         if (rxq == NULL) {
1014                 PMD_INIT_LOG(ERR, "Can not allocate rx queue structure");
1015                 return -ENOMEM;
1016         }
1017
1018         rxq->mp = mp;
1019         rxq->queue_id = queue_idx;
1020         rxq->port_id = dev->data->port_id;
1021         rxq->shared = &hw->rqd_start[queue_idx];
1022         rxq->hw = hw;
1023         rxq->qid1 = queue_idx;
1024         rxq->qid2 = queue_idx + hw->num_rx_queues;
1025         rxq->data_ring_qid = queue_idx + 2 * hw->num_rx_queues;
1026         rxq->data_desc_size = hw->rxdata_desc_size;
1027         rxq->stopped = TRUE;
1028
1029         ring0 = &rxq->cmd_ring[0];
1030         ring1 = &rxq->cmd_ring[1];
1031         comp_ring = &rxq->comp_ring;
1032         data_ring = &rxq->data_ring;
1033
1034         /* Rx vmxnet rings length should be between 256-4096 */
1035         if (nb_desc < VMXNET3_DEF_RX_RING_SIZE) {
1036                 PMD_INIT_LOG(ERR, "VMXNET3 Rx Ring Size Min: 256");
1037                 return -EINVAL;
1038         } else if (nb_desc > VMXNET3_RX_RING_MAX_SIZE) {
1039                 PMD_INIT_LOG(ERR, "VMXNET3 Rx Ring Size Max: 4096");
1040                 return -EINVAL;
1041         } else {
1042                 ring0->size = nb_desc;
1043                 ring0->size &= ~VMXNET3_RING_SIZE_MASK;
1044                 ring1->size = ring0->size;
1045         }
1046
1047         comp_ring->size = ring0->size + ring1->size;
1048         data_ring->size = ring0->size;
1049
1050         /* Rx vmxnet rings structure initialization */
1051         ring0->next2fill = 0;
1052         ring1->next2fill = 0;
1053         ring0->next2comp = 0;
1054         ring1->next2comp = 0;
1055         ring0->gen = VMXNET3_INIT_GEN;
1056         ring1->gen = VMXNET3_INIT_GEN;
1057         comp_ring->next2proc = 0;
1058         comp_ring->gen = VMXNET3_INIT_GEN;
1059
1060         size = sizeof(struct Vmxnet3_RxDesc) * (ring0->size + ring1->size);
1061         size += sizeof(struct Vmxnet3_RxCompDesc) * comp_ring->size;
1062         if (VMXNET3_VERSION_GE_3(hw) && rxq->data_desc_size)
1063                 size += rxq->data_desc_size * data_ring->size;
1064
1065         mz = rte_eth_dma_zone_reserve(dev, "rxdesc", queue_idx, size,
1066                                       VMXNET3_RING_BA_ALIGN, socket_id);
1067         if (mz == NULL) {
1068                 PMD_INIT_LOG(ERR, "ERROR: Creating queue descriptors zone");
1069                 return -ENOMEM;
1070         }
1071         rxq->mz = mz;
1072         memset(mz->addr, 0, mz->len);
1073
1074         /* cmd_ring0 initialization */
1075         ring0->base = mz->addr;
1076         ring0->basePA = mz->phys_addr;
1077
1078         /* cmd_ring1 initialization */
1079         ring1->base = ring0->base + ring0->size;
1080         ring1->basePA = ring0->basePA + sizeof(struct Vmxnet3_RxDesc) * ring0->size;
1081
1082         /* comp_ring initialization */
1083         comp_ring->base = ring1->base + ring1->size;
1084         comp_ring->basePA = ring1->basePA + sizeof(struct Vmxnet3_RxDesc) *
1085                 ring1->size;
1086
1087         /* data_ring initialization */
1088         if (VMXNET3_VERSION_GE_3(hw) && rxq->data_desc_size) {
1089                 data_ring->base =
1090                         (uint8_t *)(comp_ring->base + comp_ring->size);
1091                 data_ring->basePA = comp_ring->basePA +
1092                         sizeof(struct Vmxnet3_RxCompDesc) * comp_ring->size;
1093         }
1094
1095         /* cmd_ring0-cmd_ring1 buf_info allocation */
1096         for (i = 0; i < VMXNET3_RX_CMDRING_SIZE; i++) {
1097
1098                 ring = &rxq->cmd_ring[i];
1099                 ring->rid = i;
1100                 snprintf(mem_name, sizeof(mem_name), "rx_ring_%d_buf_info", i);
1101
1102                 ring->buf_info = rte_zmalloc(mem_name,
1103                                              ring->size * sizeof(vmxnet3_buf_info_t),
1104                                              RTE_CACHE_LINE_SIZE);
1105                 if (ring->buf_info == NULL) {
1106                         PMD_INIT_LOG(ERR, "ERROR: Creating rx_buf_info structure");
1107                         return -ENOMEM;
1108                 }
1109         }
1110
1111         /* Update the data portion with rxq */
1112         dev->data->rx_queues[queue_idx] = rxq;
1113
1114         return 0;
1115 }
1116
1117 /*
1118  * Initializes Receive Unit
1119  * Load mbufs in rx queue in advance
1120  */
1121 int
1122 vmxnet3_dev_rxtx_init(struct rte_eth_dev *dev)
1123 {
1124         struct vmxnet3_hw *hw = dev->data->dev_private;
1125
1126         int i, ret;
1127         uint8_t j;
1128
1129         PMD_INIT_FUNC_TRACE();
1130
1131         for (i = 0; i < hw->num_rx_queues; i++) {
1132                 vmxnet3_rx_queue_t *rxq = dev->data->rx_queues[i];
1133
1134                 for (j = 0; j < VMXNET3_RX_CMDRING_SIZE; j++) {
1135                         /* Passing 0 as alloc_num will allocate full ring */
1136                         ret = vmxnet3_post_rx_bufs(rxq, j);
1137                         if (ret <= 0) {
1138                                 PMD_INIT_LOG(ERR,
1139                                              "ERROR: Posting Rxq: %d buffers ring: %d",
1140                                              i, j);
1141                                 return -ret;
1142                         }
1143                         /*
1144                          * Updating device with the index:next2fill to fill the
1145                          * mbufs for coming packets.
1146                          */
1147                         if (unlikely(rxq->shared->ctrl.updateRxProd)) {
1148                                 VMXNET3_WRITE_BAR0_REG(hw, rxprod_reg[j] + (rxq->queue_id * VMXNET3_REG_ALIGN),
1149                                                        rxq->cmd_ring[j].next2fill);
1150                         }
1151                 }
1152                 rxq->stopped = FALSE;
1153                 rxq->start_seg = NULL;
1154         }
1155
1156         for (i = 0; i < dev->data->nb_tx_queues; i++) {
1157                 struct vmxnet3_tx_queue *txq = dev->data->tx_queues[i];
1158
1159                 txq->stopped = FALSE;
1160         }
1161
1162         return 0;
1163 }
1164
1165 static uint8_t rss_intel_key[40] = {
1166         0x6D, 0x5A, 0x56, 0xDA, 0x25, 0x5B, 0x0E, 0xC2,
1167         0x41, 0x67, 0x25, 0x3D, 0x43, 0xA3, 0x8F, 0xB0,
1168         0xD0, 0xCA, 0x2B, 0xCB, 0xAE, 0x7B, 0x30, 0xB4,
1169         0x77, 0xCB, 0x2D, 0xA3, 0x80, 0x30, 0xF2, 0x0C,
1170         0x6A, 0x42, 0xB7, 0x3B, 0xBE, 0xAC, 0x01, 0xFA,
1171 };
1172
1173 /*
1174  * Configure RSS feature
1175  */
1176 int
1177 vmxnet3_rss_configure(struct rte_eth_dev *dev)
1178 {
1179         struct vmxnet3_hw *hw = dev->data->dev_private;
1180         struct VMXNET3_RSSConf *dev_rss_conf;
1181         struct rte_eth_rss_conf *port_rss_conf;
1182         uint64_t rss_hf;
1183         uint8_t i, j;
1184
1185         PMD_INIT_FUNC_TRACE();
1186
1187         dev_rss_conf = hw->rss_conf;
1188         port_rss_conf = &dev->data->dev_conf.rx_adv_conf.rss_conf;
1189
1190         /* loading hashFunc */
1191         dev_rss_conf->hashFunc = VMXNET3_RSS_HASH_FUNC_TOEPLITZ;
1192         /* loading hashKeySize */
1193         dev_rss_conf->hashKeySize = VMXNET3_RSS_MAX_KEY_SIZE;
1194         /* loading indTableSize: Must not exceed VMXNET3_RSS_MAX_IND_TABLE_SIZE (128)*/
1195         dev_rss_conf->indTableSize = (uint16_t)(hw->num_rx_queues * 4);
1196
1197         if (port_rss_conf->rss_key == NULL) {
1198                 /* Default hash key */
1199                 port_rss_conf->rss_key = rss_intel_key;
1200         }
1201
1202         /* loading hashKey */
1203         memcpy(&dev_rss_conf->hashKey[0], port_rss_conf->rss_key,
1204                dev_rss_conf->hashKeySize);
1205
1206         /* loading indTable */
1207         for (i = 0, j = 0; i < dev_rss_conf->indTableSize; i++, j++) {
1208                 if (j == dev->data->nb_rx_queues)
1209                         j = 0;
1210                 dev_rss_conf->indTable[i] = j;
1211         }
1212
1213         /* loading hashType */
1214         dev_rss_conf->hashType = 0;
1215         rss_hf = port_rss_conf->rss_hf & VMXNET3_RSS_OFFLOAD_ALL;
1216         if (rss_hf & ETH_RSS_IPV4)
1217                 dev_rss_conf->hashType |= VMXNET3_RSS_HASH_TYPE_IPV4;
1218         if (rss_hf & ETH_RSS_NONFRAG_IPV4_TCP)
1219                 dev_rss_conf->hashType |= VMXNET3_RSS_HASH_TYPE_TCP_IPV4;
1220         if (rss_hf & ETH_RSS_IPV6)
1221                 dev_rss_conf->hashType |= VMXNET3_RSS_HASH_TYPE_IPV6;
1222         if (rss_hf & ETH_RSS_NONFRAG_IPV6_TCP)
1223                 dev_rss_conf->hashType |= VMXNET3_RSS_HASH_TYPE_TCP_IPV6;
1224
1225         return VMXNET3_SUCCESS;
1226 }