New upstream version 18.02
[deb_dpdk.git] / kernel / linux / kni / ethtool / ixgbe / ixgbe_common.h
1 /* SPDX-License-Identifier: GPL-2.0 */
2 /*******************************************************************************
3
4   Intel 10 Gigabit PCI Express Linux driver
5   Copyright(c) 1999 - 2012 Intel Corporation.
6
7   Contact Information:
8   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
9   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
10
11 *******************************************************************************/
12
13 #ifndef _IXGBE_COMMON_H_
14 #define _IXGBE_COMMON_H_
15
16 #include "ixgbe_type.h"
17
18 u16 ixgbe_get_pcie_msix_count_generic(struct ixgbe_hw *hw);
19
20 s32 ixgbe_init_ops_generic(struct ixgbe_hw *hw);
21 s32 ixgbe_init_hw_generic(struct ixgbe_hw *hw);
22 s32 ixgbe_start_hw_generic(struct ixgbe_hw *hw);
23 s32 ixgbe_start_hw_gen2(struct ixgbe_hw *hw);
24 s32 ixgbe_clear_hw_cntrs_generic(struct ixgbe_hw *hw);
25 s32 ixgbe_read_pba_string_generic(struct ixgbe_hw *hw, u8 *pba_num,
26                                   u32 pba_num_size);
27 s32 ixgbe_get_mac_addr_generic(struct ixgbe_hw *hw, u8 *mac_addr);
28 s32 ixgbe_get_bus_info_generic(struct ixgbe_hw *hw);
29 void ixgbe_set_lan_id_multi_port_pcie(struct ixgbe_hw *hw);
30 s32 ixgbe_stop_adapter_generic(struct ixgbe_hw *hw);
31
32 s32 ixgbe_led_on_generic(struct ixgbe_hw *hw, u32 index);
33 s32 ixgbe_led_off_generic(struct ixgbe_hw *hw, u32 index);
34
35 s32 ixgbe_init_eeprom_params_generic(struct ixgbe_hw *hw);
36 s32 ixgbe_write_eeprom_generic(struct ixgbe_hw *hw, u16 offset, u16 data);
37 s32 ixgbe_write_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,
38                                                u16 words, u16 *data);
39 s32 ixgbe_read_eerd_generic(struct ixgbe_hw *hw, u16 offset, u16 *data);
40 s32 ixgbe_read_eerd_buffer_generic(struct ixgbe_hw *hw, u16 offset,
41                                    u16 words, u16 *data);
42 s32 ixgbe_write_eewr_generic(struct ixgbe_hw *hw, u16 offset, u16 data);
43 s32 ixgbe_write_eewr_buffer_generic(struct ixgbe_hw *hw, u16 offset,
44                                     u16 words, u16 *data);
45 s32 ixgbe_read_eeprom_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,
46                                        u16 *data);
47 s32 ixgbe_read_eeprom_buffer_bit_bang_generic(struct ixgbe_hw *hw, u16 offset,
48                                               u16 words, u16 *data);
49 u16 ixgbe_calc_eeprom_checksum_generic(struct ixgbe_hw *hw);
50 s32 ixgbe_validate_eeprom_checksum_generic(struct ixgbe_hw *hw,
51                                            u16 *checksum_val);
52 s32 ixgbe_update_eeprom_checksum_generic(struct ixgbe_hw *hw);
53 s32 ixgbe_poll_eerd_eewr_done(struct ixgbe_hw *hw, u32 ee_reg);
54
55 s32 ixgbe_set_rar_generic(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
56                           u32 enable_addr);
57 s32 ixgbe_clear_rar_generic(struct ixgbe_hw *hw, u32 index);
58 s32 ixgbe_init_rx_addrs_generic(struct ixgbe_hw *hw);
59 s32 ixgbe_update_mc_addr_list_generic(struct ixgbe_hw *hw, u8 *mc_addr_list,
60                                       u32 mc_addr_count,
61                                       ixgbe_mc_addr_itr func, bool clear);
62 s32 ixgbe_update_uc_addr_list_generic(struct ixgbe_hw *hw, u8 *addr_list,
63                                       u32 addr_count, ixgbe_mc_addr_itr func);
64 s32 ixgbe_enable_mc_generic(struct ixgbe_hw *hw);
65 s32 ixgbe_disable_mc_generic(struct ixgbe_hw *hw);
66 s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval);
67 s32 ixgbe_disable_sec_rx_path_generic(struct ixgbe_hw *hw);
68 s32 ixgbe_enable_sec_rx_path_generic(struct ixgbe_hw *hw);
69
70 s32 ixgbe_fc_enable_generic(struct ixgbe_hw *hw);
71 void ixgbe_fc_autoneg(struct ixgbe_hw *hw);
72
73 s32 ixgbe_validate_mac_addr(u8 *mac_addr);
74 s32 ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u16 mask);
75 void ixgbe_release_swfw_sync(struct ixgbe_hw *hw, u16 mask);
76 s32 ixgbe_disable_pcie_master(struct ixgbe_hw *hw);
77
78 s32 ixgbe_blink_led_start_generic(struct ixgbe_hw *hw, u32 index);
79 s32 ixgbe_blink_led_stop_generic(struct ixgbe_hw *hw, u32 index);
80
81 s32 ixgbe_get_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr);
82 s32 ixgbe_set_san_mac_addr_generic(struct ixgbe_hw *hw, u8 *san_mac_addr);
83
84 s32 ixgbe_set_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
85 s32 ixgbe_set_vmdq_san_mac_generic(struct ixgbe_hw *hw, u32 vmdq);
86 s32 ixgbe_clear_vmdq_generic(struct ixgbe_hw *hw, u32 rar, u32 vmdq);
87 s32 ixgbe_insert_mac_addr_generic(struct ixgbe_hw *hw, u8 *addr, u32 vmdq);
88 s32 ixgbe_init_uta_tables_generic(struct ixgbe_hw *hw);
89 s32 ixgbe_set_vfta_generic(struct ixgbe_hw *hw, u32 vlan,
90                          u32 vind, bool vlan_on);
91 s32 ixgbe_set_vlvf_generic(struct ixgbe_hw *hw, u32 vlan, u32 vind,
92                            bool vlan_on, bool *vfta_changed);
93 s32 ixgbe_clear_vfta_generic(struct ixgbe_hw *hw);
94 s32 ixgbe_find_vlvf_slot(struct ixgbe_hw *hw, u32 vlan);
95
96 s32 ixgbe_check_mac_link_generic(struct ixgbe_hw *hw,
97                                ixgbe_link_speed *speed,
98                                bool *link_up, bool link_up_wait_to_complete);
99
100 s32 ixgbe_get_wwn_prefix_generic(struct ixgbe_hw *hw, u16 *wwnn_prefix,
101                                  u16 *wwpn_prefix);
102
103 s32 ixgbe_get_fcoe_boot_status_generic(struct ixgbe_hw *hw, u16 *bs);
104 void ixgbe_set_mac_anti_spoofing(struct ixgbe_hw *hw, bool enable, int pf);
105 void ixgbe_set_vlan_anti_spoofing(struct ixgbe_hw *hw, bool enable, int vf);
106 s32 ixgbe_get_device_caps_generic(struct ixgbe_hw *hw, u16 *device_caps);
107 void ixgbe_set_rxpba_generic(struct ixgbe_hw *hw, int num_pb, u32 headroom,
108                              int strategy);
109 s32 ixgbe_set_fw_drv_ver_generic(struct ixgbe_hw *hw, u8 maj, u8 min,
110                                  u8 build, u8 ver);
111 void ixgbe_clear_tx_pending(struct ixgbe_hw *hw);
112
113 #define IXGBE_I2C_THERMAL_SENSOR_ADDR   0xF8
114 #define IXGBE_EMC_INTERNAL_DATA         0x00
115 #define IXGBE_EMC_INTERNAL_THERM_LIMIT  0x20
116 #define IXGBE_EMC_DIODE1_DATA           0x01
117 #define IXGBE_EMC_DIODE1_THERM_LIMIT    0x19
118 #define IXGBE_EMC_DIODE2_DATA           0x23
119 #define IXGBE_EMC_DIODE2_THERM_LIMIT    0x1A
120 #define IXGBE_EMC_DIODE3_DATA           0x2A
121 #define IXGBE_EMC_DIODE3_THERM_LIMIT    0x30
122
123 s32 ixgbe_get_thermal_sensor_data_generic(struct ixgbe_hw *hw);
124 s32 ixgbe_init_thermal_sensor_thresh_generic(struct ixgbe_hw *hw);
125 #endif /* IXGBE_COMMON */