lib/librte_eal/common/include/arch/x86/rte_atomic_32.h

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
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   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
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  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 /*
  35  * Inspired from FreeBSD src/sys/i386/include/atomic.h
  36  * Copyright (c) 1998 Doug Rabson
  37  * All rights reserved.
  38  */
  39
  40 #ifndef _RTE_ATOMIC_X86_H_
  41 #error do not include this file directly, use <rte_atomic.h> instead
  42 #endif
  43
  44 #ifndef _RTE_ATOMIC_I686_H_
  45 #define _RTE_ATOMIC_I686_H_
  46
  47 #include <stdint.h>
  48 #include <rte_common.h>
  49 #include <rte_atomic.h>
  50
  51 /*------------------------- 64 bit atomic operations -------------------------*/
  52
  53 #ifndef RTE_FORCE_INTRINSICS
  54 static inline int
  55 rte_atomic64_cmpset(volatile uint64_t *dst, uint64_t exp, uint64_t src)
  56 {
  57         uint8_t res;
  58         RTE_STD_C11
  59         union {
  60                 struct {
  61                         uint32_t l32;
  62                         uint32_t h32;
  63                 };
  64                 uint64_t u64;
  65         } _exp, _src;
  66
  67         _exp.u64 = exp;
  68         _src.u64 = src;
  69
  70 #ifndef __PIC__
  71     asm volatile (
  72             MPLOCKED
  73             "cmpxchg8b (%[dst]);"
  74             "setz %[res];"
  75             : [res] "=a" (res)      /* result in eax */
  76             : [dst] "S" (dst),      /* esi */
  77              "b" (_src.l32),       /* ebx */
  78              "c" (_src.h32),       /* ecx */
  79              "a" (_exp.l32),       /* eax */
  80              "d" (_exp.h32)        /* edx */
  81                         : "memory" );           /* no-clobber list */
  82 #else
  83         asm volatile (
  84             "mov %%ebx, %%edi\n"
  85                         MPLOCKED
  86                         "cmpxchg8b (%[dst]);"
  87                         "setz %[res];"
  88             "xchgl %%ebx, %%edi;\n"
  89                         : [res] "=a" (res)      /* result in eax */
  90                         : [dst] "S" (dst),      /* esi */
  91                           "D" (_src.l32),       /* ebx */
  92                           "c" (_src.h32),       /* ecx */
  93                           "a" (_exp.l32),       /* eax */
  94                           "d" (_exp.h32)        /* edx */
  95                         : "memory" );           /* no-clobber list */
  96 #endif
  97
  98         return res;
  99 }
 100
 101 static inline void
 102 rte_atomic64_init(rte_atomic64_t *v)
 103 {
 104         int success = 0;
 105         uint64_t tmp;
 106
 107         while (success == 0) {
 108                 tmp = v->cnt;
 109                 success = rte_atomic64_cmpset((volatile uint64_t *)&v->cnt,
 110                                               tmp, 0);
 111         }
 112 }
 113
 114 static inline int64_t
 115 rte_atomic64_read(rte_atomic64_t *v)
 116 {
 117         int success = 0;
 118         uint64_t tmp;
 119
 120         while (success == 0) {
 121                 tmp = v->cnt;
 122                 /* replace the value by itself */
 123                 success = rte_atomic64_cmpset((volatile uint64_t *)&v->cnt,
 124                                               tmp, tmp);
 125         }
 126         return tmp;
 127 }
 128
 129 static inline void
 130 rte_atomic64_set(rte_atomic64_t *v, int64_t new_value)
 131 {
 132         int success = 0;
 133         uint64_t tmp;
 134
 135         while (success == 0) {
 136                 tmp = v->cnt;
 137                 success = rte_atomic64_cmpset((volatile uint64_t *)&v->cnt,
 138                                               tmp, new_value);
 139         }
 140 }
 141
 142 static inline void
 143 rte_atomic64_add(rte_atomic64_t *v, int64_t inc)
 144 {
 145         int success = 0;
 146         uint64_t tmp;
 147
 148         while (success == 0) {
 149                 tmp = v->cnt;
 150                 success = rte_atomic64_cmpset((volatile uint64_t *)&v->cnt,
 151                                               tmp, tmp + inc);
 152         }
 153 }
 154
 155 static inline void
 156 rte_atomic64_sub(rte_atomic64_t *v, int64_t dec)
 157 {
 158         int success = 0;
 159         uint64_t tmp;
 160
 161         while (success == 0) {
 162                 tmp = v->cnt;
 163                 success = rte_atomic64_cmpset((volatile uint64_t *)&v->cnt,
 164                                               tmp, tmp - dec);
 165         }
 166 }
 167
 168 static inline void
 169 rte_atomic64_inc(rte_atomic64_t *v)
 170 {
 171         rte_atomic64_add(v, 1);
 172 }
 173
 174 static inline void
 175 rte_atomic64_dec(rte_atomic64_t *v)
 176 {
 177         rte_atomic64_sub(v, 1);
 178 }
 179
 180 static inline int64_t
 181 rte_atomic64_add_return(rte_atomic64_t *v, int64_t inc)
 182 {
 183         int success = 0;
 184         uint64_t tmp;
 185
 186         while (success == 0) {
 187                 tmp = v->cnt;
 188                 success = rte_atomic64_cmpset((volatile uint64_t *)&v->cnt,
 189                                               tmp, tmp + inc);
 190         }
 191
 192         return tmp + inc;
 193 }
 194
 195 static inline int64_t
 196 rte_atomic64_sub_return(rte_atomic64_t *v, int64_t dec)
 197 {
 198         int success = 0;
 199         uint64_t tmp;
 200
 201         while (success == 0) {
 202                 tmp = v->cnt;
 203                 success = rte_atomic64_cmpset((volatile uint64_t *)&v->cnt,
 204                                               tmp, tmp - dec);
 205         }
 206
 207         return tmp - dec;
 208 }
 209
 210 static inline int rte_atomic64_inc_and_test(rte_atomic64_t *v)
 211 {
 212         return rte_atomic64_add_return(v, 1) == 0;
 213 }
 214
 215 static inline int rte_atomic64_dec_and_test(rte_atomic64_t *v)
 216 {
 217         return rte_atomic64_sub_return(v, 1) == 0;
 218 }
 219
 220 static inline int rte_atomic64_test_and_set(rte_atomic64_t *v)
 221 {
 222         return rte_atomic64_cmpset((volatile uint64_t *)&v->cnt, 0, 1);
 223 }
 224
 225 static inline void rte_atomic64_clear(rte_atomic64_t *v)
 226 {
 227         rte_atomic64_set(v, 0);
 228 }
 229 #endif
 230
 231 #endif /* _RTE_ATOMIC_I686_H_ */