lib/librte_eal/common/include/arch/x86/rte_atomic_32.h

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
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  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
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  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
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  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 /*
  35  * Inspired from FreeBSD src/sys/i386/include/atomic.h
  36  * Copyright (c) 1998 Doug Rabson
  37  * All rights reserved.
  38  */
  39
  40 #ifndef _RTE_ATOMIC_I686_H_
  41 #define _RTE_ATOMIC_I686_H_
  42
  43 /*------------------------- 64 bit atomic operations -------------------------*/
  44
  45 #ifndef RTE_FORCE_INTRINSICS
  46 static inline int
  47 rte_atomic64_cmpset(volatile uint64_t *dst, uint64_t exp, uint64_t src)
  48 {
  49         uint8_t res;
  50         union {
  51                 struct {
  52                         uint32_t l32;
  53                         uint32_t h32;
  54                 };
  55                 uint64_t u64;
  56         } _exp, _src;
  57
  58         _exp.u64 = exp;
  59         _src.u64 = src;
  60
  61 #ifndef __PIC__
  62     asm volatile (
  63             MPLOCKED
  64             "cmpxchg8b (%[dst]);"
  65             "setz %[res];"
  66             : [res] "=a" (res)      /* result in eax */
  67             : [dst] "S" (dst),      /* esi */
  68              "b" (_src.l32),       /* ebx */
  69              "c" (_src.h32),       /* ecx */
  70              "a" (_exp.l32),       /* eax */
  71              "d" (_exp.h32)        /* edx */
  72                         : "memory" );           /* no-clobber list */
  73 #else
  74         asm volatile (
  75             "mov %%ebx, %%edi\n"
  76                         MPLOCKED
  77                         "cmpxchg8b (%[dst]);"
  78                         "setz %[res];"
  79             "xchgl %%ebx, %%edi;\n"
  80                         : [res] "=a" (res)      /* result in eax */
  81                         : [dst] "S" (dst),      /* esi */
  82                           "D" (_src.l32),       /* ebx */
  83                           "c" (_src.h32),       /* ecx */
  84                           "a" (_exp.l32),       /* eax */
  85                           "d" (_exp.h32)        /* edx */
  86                         : "memory" );           /* no-clobber list */
  87 #endif
  88
  89         return res;
  90 }
  91
  92 static inline void
  93 rte_atomic64_init(rte_atomic64_t *v)
  94 {
  95         int success = 0;
  96         uint64_t tmp;
  97
  98         while (success == 0) {
  99                 tmp = v->cnt;
 100                 success = rte_atomic64_cmpset((volatile uint64_t *)&v->cnt,
 101                                               tmp, 0);
 102         }
 103 }
 104
 105 static inline int64_t
 106 rte_atomic64_read(rte_atomic64_t *v)
 107 {
 108         int success = 0;
 109         uint64_t tmp;
 110
 111         while (success == 0) {
 112                 tmp = v->cnt;
 113                 /* replace the value by itself */
 114                 success = rte_atomic64_cmpset((volatile uint64_t *)&v->cnt,
 115                                               tmp, tmp);
 116         }
 117         return tmp;
 118 }
 119
 120 static inline void
 121 rte_atomic64_set(rte_atomic64_t *v, int64_t new_value)
 122 {
 123         int success = 0;
 124         uint64_t tmp;
 125
 126         while (success == 0) {
 127                 tmp = v->cnt;
 128                 success = rte_atomic64_cmpset((volatile uint64_t *)&v->cnt,
 129                                               tmp, new_value);
 130         }
 131 }
 132
 133 static inline void
 134 rte_atomic64_add(rte_atomic64_t *v, int64_t inc)
 135 {
 136         int success = 0;
 137         uint64_t tmp;
 138
 139         while (success == 0) {
 140                 tmp = v->cnt;
 141                 success = rte_atomic64_cmpset((volatile uint64_t *)&v->cnt,
 142                                               tmp, tmp + inc);
 143         }
 144 }
 145
 146 static inline void
 147 rte_atomic64_sub(rte_atomic64_t *v, int64_t dec)
 148 {
 149         int success = 0;
 150         uint64_t tmp;
 151
 152         while (success == 0) {
 153                 tmp = v->cnt;
 154                 success = rte_atomic64_cmpset((volatile uint64_t *)&v->cnt,
 155                                               tmp, tmp - dec);
 156         }
 157 }
 158
 159 static inline void
 160 rte_atomic64_inc(rte_atomic64_t *v)
 161 {
 162         rte_atomic64_add(v, 1);
 163 }
 164
 165 static inline void
 166 rte_atomic64_dec(rte_atomic64_t *v)
 167 {
 168         rte_atomic64_sub(v, 1);
 169 }
 170
 171 static inline int64_t
 172 rte_atomic64_add_return(rte_atomic64_t *v, int64_t inc)
 173 {
 174         int success = 0;
 175         uint64_t tmp;
 176
 177         while (success == 0) {
 178                 tmp = v->cnt;
 179                 success = rte_atomic64_cmpset((volatile uint64_t *)&v->cnt,
 180                                               tmp, tmp + inc);
 181         }
 182
 183         return tmp + inc;
 184 }
 185
 186 static inline int64_t
 187 rte_atomic64_sub_return(rte_atomic64_t *v, int64_t dec)
 188 {
 189         int success = 0;
 190         uint64_t tmp;
 191
 192         while (success == 0) {
 193                 tmp = v->cnt;
 194                 success = rte_atomic64_cmpset((volatile uint64_t *)&v->cnt,
 195                                               tmp, tmp - dec);
 196         }
 197
 198         return tmp - dec;
 199 }
 200
 201 static inline int rte_atomic64_inc_and_test(rte_atomic64_t *v)
 202 {
 203         return rte_atomic64_add_return(v, 1) == 0;
 204 }
 205
 206 static inline int rte_atomic64_dec_and_test(rte_atomic64_t *v)
 207 {
 208         return rte_atomic64_sub_return(v, 1) == 0;
 209 }
 210
 211 static inline int rte_atomic64_test_and_set(rte_atomic64_t *v)
 212 {
 213         return rte_atomic64_cmpset((volatile uint64_t *)&v->cnt, 0, 1);
 214 }
 215
 216 static inline void rte_atomic64_clear(rte_atomic64_t *v)
 217 {
 218         rte_atomic64_set(v, 0);
 219 }
 220 #endif
 221
 222 #endif /* _RTE_ATOMIC_I686_H_ */