lib/librte_eal/common/include/arch/x86/rte_cpuflags.h

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2010-2014 Intel Corporation
   3  */
   4
   5 #ifndef _RTE_CPUFLAGS_X86_64_H_
   6 #define _RTE_CPUFLAGS_X86_64_H_
   7
   8 #ifdef __cplusplus
   9 extern "C" {
  10 #endif
  11
  12 enum rte_cpu_flag_t {
  13         /* (EAX 01h) ECX features*/
  14         RTE_CPUFLAG_SSE3 = 0,               /**< SSE3 */
  15         RTE_CPUFLAG_PCLMULQDQ,              /**< PCLMULQDQ */
  16         RTE_CPUFLAG_DTES64,                 /**< DTES64 */
  17         RTE_CPUFLAG_MONITOR,                /**< MONITOR */
  18         RTE_CPUFLAG_DS_CPL,                 /**< DS_CPL */
  19         RTE_CPUFLAG_VMX,                    /**< VMX */
  20         RTE_CPUFLAG_SMX,                    /**< SMX */
  21         RTE_CPUFLAG_EIST,                   /**< EIST */
  22         RTE_CPUFLAG_TM2,                    /**< TM2 */
  23         RTE_CPUFLAG_SSSE3,                  /**< SSSE3 */
  24         RTE_CPUFLAG_CNXT_ID,                /**< CNXT_ID */
  25         RTE_CPUFLAG_FMA,                    /**< FMA */
  26         RTE_CPUFLAG_CMPXCHG16B,             /**< CMPXCHG16B */
  27         RTE_CPUFLAG_XTPR,                   /**< XTPR */
  28         RTE_CPUFLAG_PDCM,                   /**< PDCM */
  29         RTE_CPUFLAG_PCID,                   /**< PCID */
  30         RTE_CPUFLAG_DCA,                    /**< DCA */
  31         RTE_CPUFLAG_SSE4_1,                 /**< SSE4_1 */
  32         RTE_CPUFLAG_SSE4_2,                 /**< SSE4_2 */
  33         RTE_CPUFLAG_X2APIC,                 /**< X2APIC */
  34         RTE_CPUFLAG_MOVBE,                  /**< MOVBE */
  35         RTE_CPUFLAG_POPCNT,                 /**< POPCNT */
  36         RTE_CPUFLAG_TSC_DEADLINE,           /**< TSC_DEADLINE */
  37         RTE_CPUFLAG_AES,                    /**< AES */
  38         RTE_CPUFLAG_XSAVE,                  /**< XSAVE */
  39         RTE_CPUFLAG_OSXSAVE,                /**< OSXSAVE */
  40         RTE_CPUFLAG_AVX,                    /**< AVX */
  41         RTE_CPUFLAG_F16C,                   /**< F16C */
  42         RTE_CPUFLAG_RDRAND,                 /**< RDRAND */
  43         RTE_CPUFLAG_HYPERVISOR,             /**< Running in a VM */
  44
  45         /* (EAX 01h) EDX features */
  46         RTE_CPUFLAG_FPU,                    /**< FPU */
  47         RTE_CPUFLAG_VME,                    /**< VME */
  48         RTE_CPUFLAG_DE,                     /**< DE */
  49         RTE_CPUFLAG_PSE,                    /**< PSE */
  50         RTE_CPUFLAG_TSC,                    /**< TSC */
  51         RTE_CPUFLAG_MSR,                    /**< MSR */
  52         RTE_CPUFLAG_PAE,                    /**< PAE */
  53         RTE_CPUFLAG_MCE,                    /**< MCE */
  54         RTE_CPUFLAG_CX8,                    /**< CX8 */
  55         RTE_CPUFLAG_APIC,                   /**< APIC */
  56         RTE_CPUFLAG_SEP,                    /**< SEP */
  57         RTE_CPUFLAG_MTRR,                   /**< MTRR */
  58         RTE_CPUFLAG_PGE,                    /**< PGE */
  59         RTE_CPUFLAG_MCA,                    /**< MCA */
  60         RTE_CPUFLAG_CMOV,                   /**< CMOV */
  61         RTE_CPUFLAG_PAT,                    /**< PAT */
  62         RTE_CPUFLAG_PSE36,                  /**< PSE36 */
  63         RTE_CPUFLAG_PSN,                    /**< PSN */
  64         RTE_CPUFLAG_CLFSH,                  /**< CLFSH */
  65         RTE_CPUFLAG_DS,                     /**< DS */
  66         RTE_CPUFLAG_ACPI,                   /**< ACPI */
  67         RTE_CPUFLAG_MMX,                    /**< MMX */
  68         RTE_CPUFLAG_FXSR,                   /**< FXSR */
  69         RTE_CPUFLAG_SSE,                    /**< SSE */
  70         RTE_CPUFLAG_SSE2,                   /**< SSE2 */
  71         RTE_CPUFLAG_SS,                     /**< SS */
  72         RTE_CPUFLAG_HTT,                    /**< HTT */
  73         RTE_CPUFLAG_TM,                     /**< TM */
  74         RTE_CPUFLAG_PBE,                    /**< PBE */
  75
  76         /* (EAX 06h) EAX features */
  77         RTE_CPUFLAG_DIGTEMP,                /**< DIGTEMP */
  78         RTE_CPUFLAG_TRBOBST,                /**< TRBOBST */
  79         RTE_CPUFLAG_ARAT,                   /**< ARAT */
  80         RTE_CPUFLAG_PLN,                    /**< PLN */
  81         RTE_CPUFLAG_ECMD,                   /**< ECMD */
  82         RTE_CPUFLAG_PTM,                    /**< PTM */
  83
  84         /* (EAX 06h) ECX features */
  85         RTE_CPUFLAG_MPERF_APERF_MSR,        /**< MPERF_APERF_MSR */
  86         RTE_CPUFLAG_ACNT2,                  /**< ACNT2 */
  87         RTE_CPUFLAG_ENERGY_EFF,             /**< ENERGY_EFF */
  88
  89         /* (EAX 07h, ECX 0h) EBX features */
  90         RTE_CPUFLAG_FSGSBASE,               /**< FSGSBASE */
  91         RTE_CPUFLAG_BMI1,                   /**< BMI1 */
  92         RTE_CPUFLAG_HLE,                    /**< Hardware Lock elision */
  93         RTE_CPUFLAG_AVX2,                   /**< AVX2 */
  94         RTE_CPUFLAG_SMEP,                   /**< SMEP */
  95         RTE_CPUFLAG_BMI2,                   /**< BMI2 */
  96         RTE_CPUFLAG_ERMS,                   /**< ERMS */
  97         RTE_CPUFLAG_INVPCID,                /**< INVPCID */
  98         RTE_CPUFLAG_RTM,                    /**< Transactional memory */
  99         RTE_CPUFLAG_AVX512F,                /**< AVX512F */
 100
 101         /* (EAX 80000001h) ECX features */
 102         RTE_CPUFLAG_LAHF_SAHF,              /**< LAHF_SAHF */
 103         RTE_CPUFLAG_LZCNT,                  /**< LZCNT */
 104
 105         /* (EAX 80000001h) EDX features */
 106         RTE_CPUFLAG_SYSCALL,                /**< SYSCALL */
 107         RTE_CPUFLAG_XD,                     /**< XD */
 108         RTE_CPUFLAG_1GB_PG,                 /**< 1GB_PG */
 109         RTE_CPUFLAG_RDTSCP,                 /**< RDTSCP */
 110         RTE_CPUFLAG_EM64T,                  /**< EM64T */
 111
 112         /* (EAX 80000007h) EDX features */
 113         RTE_CPUFLAG_INVTSC,                 /**< INVTSC */
 114
 115         /* The last item */
 116         RTE_CPUFLAG_NUMFLAGS,               /**< This should always be the last! */
 117 };
 118
 119 #include "generic/rte_cpuflags.h"
 120
 121 #ifdef __cplusplus
 122 }
 123 #endif
 124
 125 #endif /* _RTE_CPUFLAGS_X86_64_H_ */