4 * Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of version 2 of the GNU General Public License as
8 * published by the Free Software Foundation.
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18 * The full GNU General Public License is included in this distribution
19 * in the file called LICENSE.GPL.
21 * Contact Information:
25 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
27 #include <linux/device.h>
28 #include <linux/module.h>
29 #include <linux/pci.h>
30 #include <linux/uio_driver.h>
32 #include <linux/msi.h>
33 #include <linux/version.h>
34 #include <linux/slab.h>
36 #ifdef CONFIG_XEN_DOM0
39 #include <rte_pci_dev_features.h>
44 * A structure describing the private information for a uio device.
46 struct rte_uio_pci_dev {
49 enum rte_intr_mode mode;
52 static char *intr_mode;
53 static enum rte_intr_mode igbuio_intr_mode_preferred = RTE_INTR_MODE_MSIX;
57 show_max_vfs(struct device *dev, struct device_attribute *attr,
60 return snprintf(buf, 10, "%u\n", dev_num_vf(dev));
64 store_max_vfs(struct device *dev, struct device_attribute *attr,
65 const char *buf, size_t count)
68 unsigned long max_vfs;
69 struct pci_dev *pdev = to_pci_dev(dev);
71 if (0 != kstrtoul(buf, 0, &max_vfs))
75 pci_disable_sriov(pdev);
76 else if (0 == pci_num_vf(pdev))
77 err = pci_enable_sriov(pdev, max_vfs);
78 else /* do nothing if change max_vfs number */
81 return err ? err : count;
84 static DEVICE_ATTR(max_vfs, S_IRUGO | S_IWUSR, show_max_vfs, store_max_vfs);
86 static struct attribute *dev_attrs[] = {
87 &dev_attr_max_vfs.attr,
91 static const struct attribute_group dev_attr_grp = {
95 * It masks the msix on/off of generating MSI-X messages.
98 igbuio_msix_mask_irq(struct msi_desc *desc, int32_t state)
100 u32 mask_bits = desc->masked;
101 unsigned offset = desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE +
102 PCI_MSIX_ENTRY_VECTOR_CTRL;
105 mask_bits &= ~PCI_MSIX_ENTRY_CTRL_MASKBIT;
107 mask_bits |= PCI_MSIX_ENTRY_CTRL_MASKBIT;
109 if (mask_bits != desc->masked) {
110 writel(mask_bits, desc->mask_base + offset);
111 readl(desc->mask_base);
112 desc->masked = mask_bits;
117 * This is the irqcontrol callback to be registered to uio_info.
118 * It can be used to disable/enable interrupt from user space processes.
121 * pointer to uio_info.
123 * state value. 1 to enable interrupt, 0 to disable interrupt.
127 * - On failure, a negative value.
130 igbuio_pci_irqcontrol(struct uio_info *info, s32 irq_state)
132 struct rte_uio_pci_dev *udev = info->priv;
133 struct pci_dev *pdev = udev->pdev;
135 pci_cfg_access_lock(pdev);
136 if (udev->mode == RTE_INTR_MODE_LEGACY)
137 pci_intx(pdev, !!irq_state);
139 else if (udev->mode == RTE_INTR_MODE_MSIX) {
140 struct msi_desc *desc;
142 #if (LINUX_VERSION_CODE < KERNEL_VERSION(4, 3, 0))
143 list_for_each_entry(desc, &pdev->msi_list, list)
144 igbuio_msix_mask_irq(desc, irq_state);
146 list_for_each_entry(desc, &pdev->dev.msi_list, list)
147 igbuio_msix_mask_irq(desc, irq_state);
150 pci_cfg_access_unlock(pdev);
156 * This is interrupt handler which will check if the interrupt is for the right device.
157 * If yes, disable it here and will be enable later.
160 igbuio_pci_irqhandler(int irq, struct uio_info *info)
162 struct rte_uio_pci_dev *udev = info->priv;
164 /* Legacy mode need to mask in hardware */
165 if (udev->mode == RTE_INTR_MODE_LEGACY &&
166 !pci_check_and_mask_intx(udev->pdev))
169 /* Message signal mode, no share IRQ and automasked */
174 * This gets called while opening uio device file.
177 igbuio_pci_open(struct uio_info *info, struct inode *inode)
179 struct rte_uio_pci_dev *udev = info->priv;
180 struct pci_dev *dev = udev->pdev;
182 /* set bus master, which was cleared by the reset function */
189 igbuio_pci_release(struct uio_info *info, struct inode *inode)
191 struct rte_uio_pci_dev *udev = info->priv;
192 struct pci_dev *dev = udev->pdev;
194 /* stop the device from further DMA */
195 pci_clear_master(dev);
200 #ifdef CONFIG_XEN_DOM0
202 igbuio_dom0_mmap_phys(struct uio_info *info, struct vm_area_struct *vma)
206 idx = (int)vma->vm_pgoff;
207 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
208 #ifdef HAVE_PTE_MASK_PAGE_IOMAP
209 vma->vm_page_prot.pgprot |= _PAGE_IOMAP;
212 return remap_pfn_range(vma,
214 info->mem[idx].addr >> PAGE_SHIFT,
215 vma->vm_end - vma->vm_start,
220 * This is uio device mmap method which will use igbuio mmap for Xen
224 igbuio_dom0_pci_mmap(struct uio_info *info, struct vm_area_struct *vma)
228 if (vma->vm_pgoff >= MAX_UIO_MAPS)
231 if (info->mem[vma->vm_pgoff].size == 0)
234 idx = (int)vma->vm_pgoff;
235 switch (info->mem[idx].memtype) {
237 return igbuio_dom0_mmap_phys(info, vma);
238 case UIO_MEM_LOGICAL:
239 case UIO_MEM_VIRTUAL:
246 /* Remap pci resources described by bar #pci_bar in uio resource n. */
248 igbuio_pci_setup_iomem(struct pci_dev *dev, struct uio_info *info,
249 int n, int pci_bar, const char *name)
251 unsigned long addr, len;
254 if (n >= ARRAY_SIZE(info->mem))
257 addr = pci_resource_start(dev, pci_bar);
258 len = pci_resource_len(dev, pci_bar);
259 if (addr == 0 || len == 0)
261 internal_addr = ioremap(addr, len);
262 if (internal_addr == NULL)
264 info->mem[n].name = name;
265 info->mem[n].addr = addr;
266 info->mem[n].internal_addr = internal_addr;
267 info->mem[n].size = len;
268 info->mem[n].memtype = UIO_MEM_PHYS;
272 /* Get pci port io resources described by bar #pci_bar in uio resource n. */
274 igbuio_pci_setup_ioport(struct pci_dev *dev, struct uio_info *info,
275 int n, int pci_bar, const char *name)
277 unsigned long addr, len;
279 if (n >= ARRAY_SIZE(info->port))
282 addr = pci_resource_start(dev, pci_bar);
283 len = pci_resource_len(dev, pci_bar);
284 if (addr == 0 || len == 0)
287 info->port[n].name = name;
288 info->port[n].start = addr;
289 info->port[n].size = len;
290 info->port[n].porttype = UIO_PORT_X86;
295 /* Unmap previously ioremap'd resources */
297 igbuio_pci_release_iomem(struct uio_info *info)
301 for (i = 0; i < MAX_UIO_MAPS; i++) {
302 if (info->mem[i].internal_addr)
303 iounmap(info->mem[i].internal_addr);
308 igbuio_setup_bars(struct pci_dev *dev, struct uio_info *info)
310 int i, iom, iop, ret;
312 static const char *bar_names[PCI_STD_RESOURCE_END + 1] = {
324 for (i = 0; i < ARRAY_SIZE(bar_names); i++) {
325 if (pci_resource_len(dev, i) != 0 &&
326 pci_resource_start(dev, i) != 0) {
327 flags = pci_resource_flags(dev, i);
328 if (flags & IORESOURCE_MEM) {
329 ret = igbuio_pci_setup_iomem(dev, info, iom,
334 } else if (flags & IORESOURCE_IO) {
335 ret = igbuio_pci_setup_ioport(dev, info, iop,
344 return (iom != 0) ? ret : -ENOENT;
347 #if LINUX_VERSION_CODE < KERNEL_VERSION(3, 8, 0)
352 igbuio_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
354 struct rte_uio_pci_dev *udev;
355 #ifndef HAVE_ALLOC_IRQ_VECTORS
356 struct msix_entry msix_entry;
360 udev = kzalloc(sizeof(struct rte_uio_pci_dev), GFP_KERNEL);
365 * enable device: ask low-level code to enable I/O and
368 err = pci_enable_device(dev);
370 dev_err(&dev->dev, "Cannot enable PCI device\n");
374 /* enable bus mastering on the device */
377 /* remap IO memory */
378 err = igbuio_setup_bars(dev, &udev->info);
380 goto fail_release_iomem;
382 /* set 64-bit DMA mask */
383 err = pci_set_dma_mask(dev, DMA_BIT_MASK(64));
385 dev_err(&dev->dev, "Cannot set DMA mask\n");
386 goto fail_release_iomem;
389 err = pci_set_consistent_dma_mask(dev, DMA_BIT_MASK(64));
391 dev_err(&dev->dev, "Cannot set consistent DMA mask\n");
392 goto fail_release_iomem;
396 udev->info.name = "igb_uio";
397 udev->info.version = "0.1";
398 udev->info.handler = igbuio_pci_irqhandler;
399 udev->info.irqcontrol = igbuio_pci_irqcontrol;
400 udev->info.open = igbuio_pci_open;
401 udev->info.release = igbuio_pci_release;
402 #ifdef CONFIG_XEN_DOM0
403 /* check if the driver run on Xen Dom0 */
404 if (xen_initial_domain())
405 udev->info.mmap = igbuio_dom0_pci_mmap;
407 udev->info.priv = udev;
410 switch (igbuio_intr_mode_preferred) {
411 case RTE_INTR_MODE_MSIX:
412 /* Only 1 msi-x vector needed */
413 #ifndef HAVE_ALLOC_IRQ_VECTORS
414 msix_entry.entry = 0;
415 if (pci_enable_msix(dev, &msix_entry, 1) == 0) {
416 dev_dbg(&dev->dev, "using MSI-X");
417 udev->info.irq = msix_entry.vector;
418 udev->mode = RTE_INTR_MODE_MSIX;
422 if (pci_alloc_irq_vectors(dev, 1, 1, PCI_IRQ_MSIX) == 1) {
423 dev_dbg(&dev->dev, "using MSI-X");
424 udev->info.irq_flags = IRQF_NO_THREAD;
425 udev->info.irq = pci_irq_vector(dev, 0);
426 udev->mode = RTE_INTR_MODE_MSIX;
430 /* fall back to INTX */
431 case RTE_INTR_MODE_LEGACY:
432 if (pci_intx_mask_supported(dev)) {
433 dev_dbg(&dev->dev, "using INTX");
434 udev->info.irq_flags = IRQF_SHARED;
435 udev->info.irq = dev->irq;
436 udev->mode = RTE_INTR_MODE_LEGACY;
439 dev_notice(&dev->dev, "PCI INTX mask not supported\n");
440 /* fall back to no IRQ */
441 case RTE_INTR_MODE_NONE:
442 udev->mode = RTE_INTR_MODE_NONE;
447 dev_err(&dev->dev, "invalid IRQ mode %u",
448 igbuio_intr_mode_preferred);
450 goto fail_release_iomem;
453 err = sysfs_create_group(&dev->dev.kobj, &dev_attr_grp);
455 goto fail_release_iomem;
457 /* register uio driver */
458 err = uio_register_device(&dev->dev, &udev->info);
460 goto fail_remove_group;
462 pci_set_drvdata(dev, udev);
464 dev_info(&dev->dev, "uio device registered with irq %lx\n",
470 sysfs_remove_group(&dev->dev.kobj, &dev_attr_grp);
472 igbuio_pci_release_iomem(&udev->info);
473 #ifndef HAVE_ALLOC_IRQ_VECTORS
474 if (udev->mode == RTE_INTR_MODE_MSIX)
475 pci_disable_msix(udev->pdev);
477 if (udev->mode == RTE_INTR_MODE_MSIX)
478 pci_free_irq_vectors(udev->pdev);
480 pci_disable_device(dev);
488 igbuio_pci_remove(struct pci_dev *dev)
490 struct rte_uio_pci_dev *udev = pci_get_drvdata(dev);
492 igbuio_pci_release(&udev->info, NULL);
494 sysfs_remove_group(&dev->dev.kobj, &dev_attr_grp);
495 uio_unregister_device(&udev->info);
496 igbuio_pci_release_iomem(&udev->info);
497 #ifndef HAVE_ALLOC_IRQ_VECTORS
498 if (udev->mode == RTE_INTR_MODE_MSIX)
499 pci_disable_msix(dev);
501 if (udev->mode == RTE_INTR_MODE_MSIX)
502 pci_free_irq_vectors(dev);
504 pci_disable_device(dev);
505 pci_set_drvdata(dev, NULL);
510 igbuio_config_intr_mode(char *intr_str)
513 pr_info("Use MSIX interrupt by default\n");
517 if (!strcmp(intr_str, RTE_INTR_MODE_MSIX_NAME)) {
518 igbuio_intr_mode_preferred = RTE_INTR_MODE_MSIX;
519 pr_info("Use MSIX interrupt\n");
520 } else if (!strcmp(intr_str, RTE_INTR_MODE_LEGACY_NAME)) {
521 igbuio_intr_mode_preferred = RTE_INTR_MODE_LEGACY;
522 pr_info("Use legacy interrupt\n");
524 pr_info("Error: bad parameter - %s\n", intr_str);
531 static struct pci_driver igbuio_pci_driver = {
534 .probe = igbuio_pci_probe,
535 .remove = igbuio_pci_remove,
539 igbuio_pci_init_module(void)
543 ret = igbuio_config_intr_mode(intr_mode);
547 return pci_register_driver(&igbuio_pci_driver);
551 igbuio_pci_exit_module(void)
553 pci_unregister_driver(&igbuio_pci_driver);
556 module_init(igbuio_pci_init_module);
557 module_exit(igbuio_pci_exit_module);
559 module_param(intr_mode, charp, S_IRUGO);
560 MODULE_PARM_DESC(intr_mode,
561 "igb_uio interrupt mode (default=msix):\n"
562 " " RTE_INTR_MODE_MSIX_NAME " Use MSIX interrupt\n"
563 " " RTE_INTR_MODE_LEGACY_NAME " Use Legacy interrupt\n"
566 MODULE_DESCRIPTION("UIO driver for Intel IGB PCI cards");
567 MODULE_LICENSE("GPL");
568 MODULE_AUTHOR("Intel Corporation");