lib/librte_eal/linuxapp/kni/ethtool/igb/igb_main.c

   1 /*******************************************************************************
   2
   3   Intel(R) Gigabit Ethernet Linux driver
   4   Copyright(c) 2007-2013 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "LICENSE.GPL".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 #include <linux/module.h>
  29 #include <linux/types.h>
  30 #include <linux/init.h>
  31 #include <linux/vmalloc.h>
  32 #include <linux/pagemap.h>
  33 #include <linux/netdevice.h>
  34 #include <linux/tcp.h>
  35 #ifdef NETIF_F_TSO
  36 #include <net/checksum.h>
  37 #ifdef NETIF_F_TSO6
  38 #include <linux/ipv6.h>
  39 #include <net/ip6_checksum.h>
  40 #endif
  41 #endif
  42 #ifdef SIOCGMIIPHY
  43 #include <linux/mii.h>
  44 #endif
  45 #ifdef SIOCETHTOOL
  46 #include <linux/ethtool.h>
  47 #endif
  48 #include <linux/if_vlan.h>
  49 #ifdef CONFIG_PM_RUNTIME
  50 #include <linux/pm_runtime.h>
  51 #endif /* CONFIG_PM_RUNTIME */
  52
  53 #include <linux/if_bridge.h>
  54 #include "igb.h"
  55 #include "igb_vmdq.h"
  56
  57 #include <linux/uio_driver.h>
  58
  59 #if defined(DEBUG) || defined (DEBUG_DUMP) || defined (DEBUG_ICR) || defined(DEBUG_ITR)
  60 #define DRV_DEBUG "_debug"
  61 #else
  62 #define DRV_DEBUG
  63 #endif
  64 #define DRV_HW_PERF
  65 #define VERSION_SUFFIX
  66
  67 #define MAJ 5
  68 #define MIN 0
  69 #define BUILD 6
  70 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." __stringify(BUILD) VERSION_SUFFIX DRV_DEBUG DRV_HW_PERF
  71
  72 char igb_driver_name[] = "igb";
  73 char igb_driver_version[] = DRV_VERSION;
  74 static const char igb_driver_string[] =
  75                                 "Intel(R) Gigabit Ethernet Network Driver";
  76 static const char igb_copyright[] =
  77                                 "Copyright (c) 2007-2013 Intel Corporation.";
  78
  79 const struct pci_device_id igb_pci_tbl[] = {
  80         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
  81         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
  82         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
  83         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER) },
  84         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER) },
  85         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES) },
  86         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII) },
  87         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER_FLASHLESS) },
  88         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES_FLASHLESS) },
  89         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER) },
  90         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER) },
  91         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER) },
  92         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES) },
  93         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII) },
  94         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER) },
  95         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER) },
  96         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER) },
  97         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES) },
  98         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII) },
  99         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL) },
 100         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII) },
 101         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES) },
 102         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE) },
 103         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP) },
 104         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576) },
 105         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS) },
 106         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES) },
 107         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER) },
 108         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES) },
 109         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD) },
 110         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2) },
 111         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER) },
 112         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER) },
 113         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES) },
 114         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER) },
 115         /* required last entry */
 116         {0, }
 117 };
 118
 119 //MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
 120 static void igb_set_sriov_capability(struct igb_adapter *adapter) __attribute__((__unused__));
 121 void igb_reset(struct igb_adapter *);
 122 static int igb_setup_all_tx_resources(struct igb_adapter *);
 123 static int igb_setup_all_rx_resources(struct igb_adapter *);
 124 static void igb_free_all_tx_resources(struct igb_adapter *);
 125 static void igb_free_all_rx_resources(struct igb_adapter *);
 126 static void igb_setup_mrqc(struct igb_adapter *);
 127 void igb_update_stats(struct igb_adapter *);
 128 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
 129 static void __devexit igb_remove(struct pci_dev *pdev);
 130 static int igb_sw_init(struct igb_adapter *);
 131 static int igb_open(struct net_device *);
 132 static int igb_close(struct net_device *);
 133 static void igb_configure(struct igb_adapter *);
 134 static void igb_configure_tx(struct igb_adapter *);
 135 static void igb_configure_rx(struct igb_adapter *);
 136 static void igb_clean_all_tx_rings(struct igb_adapter *);
 137 static void igb_clean_all_rx_rings(struct igb_adapter *);
 138 static void igb_clean_tx_ring(struct igb_ring *);
 139 static void igb_set_rx_mode(struct net_device *);
 140 static void igb_update_phy_info(unsigned long);
 141 static void igb_watchdog(unsigned long);
 142 static void igb_watchdog_task(struct work_struct *);
 143 static void igb_dma_err_task(struct work_struct *);
 144 static void igb_dma_err_timer(unsigned long data);
 145 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
 146 static struct net_device_stats *igb_get_stats(struct net_device *);
 147 static int igb_change_mtu(struct net_device *, int);
 148 void igb_full_sync_mac_table(struct igb_adapter *adapter);
 149 static int igb_set_mac(struct net_device *, void *);
 150 static void igb_set_uta(struct igb_adapter *adapter);
 151 static irqreturn_t igb_intr(int irq, void *);
 152 static irqreturn_t igb_intr_msi(int irq, void *);
 153 static irqreturn_t igb_msix_other(int irq, void *);
 154 static irqreturn_t igb_msix_ring(int irq, void *);
 155 #ifdef IGB_DCA
 156 static void igb_update_dca(struct igb_q_vector *);
 157 static void igb_setup_dca(struct igb_adapter *);
 158 #endif /* IGB_DCA */
 159 static int igb_poll(struct napi_struct *, int);
 160 static bool igb_clean_tx_irq(struct igb_q_vector *);
 161 static bool igb_clean_rx_irq(struct igb_q_vector *, int);
 162 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
 163 static void igb_tx_timeout(struct net_device *);
 164 static void igb_reset_task(struct work_struct *);
 165 #ifdef HAVE_VLAN_RX_REGISTER
 166 static void igb_vlan_mode(struct net_device *, struct vlan_group *);
 167 #endif
 168 #ifdef HAVE_VLAN_PROTOCOL
 169 static int igb_vlan_rx_add_vid(struct net_device *,
 170                                __be16 proto, u16);
 171 static int igb_vlan_rx_kill_vid(struct net_device *,
 172                                 __be16 proto, u16);
 173 #elif defined HAVE_INT_NDO_VLAN_RX_ADD_VID
 174 #ifdef NETIF_F_HW_VLAN_CTAG_RX
 175 static int igb_vlan_rx_add_vid(struct net_device *,
 176                                __always_unused __be16 proto, u16);
 177 static int igb_vlan_rx_kill_vid(struct net_device *,
 178                                 __always_unused __be16 proto, u16);
 179 #else
 180 static int igb_vlan_rx_add_vid(struct net_device *, u16);
 181 static int igb_vlan_rx_kill_vid(struct net_device *, u16);
 182 #endif
 183 #else
 184 static void igb_vlan_rx_add_vid(struct net_device *, u16);
 185 static void igb_vlan_rx_kill_vid(struct net_device *, u16);
 186 #endif
 187 static void igb_restore_vlan(struct igb_adapter *);
 188 void igb_rar_set(struct igb_adapter *adapter, u32 index);
 189 static void igb_ping_all_vfs(struct igb_adapter *);
 190 static void igb_msg_task(struct igb_adapter *);
 191 static void igb_vmm_control(struct igb_adapter *);
 192 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
 193 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
 194 static void igb_process_mdd_event(struct igb_adapter *);
 195 #ifdef IFLA_VF_MAX
 196 static int igb_ndo_set_vf_mac( struct net_device *netdev, int vf, u8 *mac);
 197 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
 198 #ifdef HAVE_VF_VLAN_PROTO
 199                                 int vf, u16 vlan, u8 qos, __be16 vlan_proto);
 200 #else
 201                                 int vf, u16 vlan, u8 qos);
 202 #endif
 203 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
 204 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
 205                                 bool setting);
 206 #endif
 207 #ifdef HAVE_VF_MIN_MAX_TXRATE
 208 static int igb_ndo_set_vf_bw(struct net_device *, int, int, int);
 209 #else /* HAVE_VF_MIN_MAX_TXRATE */
 210 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate);
 211 #endif /* HAVE_VF_MIN_MAX_TXRATE */
 212 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
 213                                  struct ifla_vf_info *ivi);
 214 static void igb_check_vf_rate_limit(struct igb_adapter *);
 215 #endif
 216 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
 217 #ifdef CONFIG_PM
 218 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
 219 static int igb_suspend(struct device *dev);
 220 static int igb_resume(struct device *dev);
 221 #ifdef CONFIG_PM_RUNTIME
 222 static int igb_runtime_suspend(struct device *dev);
 223 static int igb_runtime_resume(struct device *dev);
 224 static int igb_runtime_idle(struct device *dev);
 225 #endif /* CONFIG_PM_RUNTIME */
 226 static const struct dev_pm_ops igb_pm_ops = {
 227 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34)
 228         .suspend = igb_suspend,
 229         .resume = igb_resume,
 230         .freeze = igb_suspend,
 231         .thaw = igb_resume,
 232         .poweroff = igb_suspend,
 233         .restore = igb_resume,
 234 #ifdef CONFIG_PM_RUNTIME
 235         .runtime_suspend = igb_runtime_suspend,
 236         .runtime_resume = igb_runtime_resume,
 237         .runtime_idle = igb_runtime_idle,
 238 #endif
 239 #else /* Linux >= 2.6.34 */
 240         SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
 241 #ifdef CONFIG_PM_RUNTIME
 242         SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
 243                         igb_runtime_idle)
 244 #endif /* CONFIG_PM_RUNTIME */
 245 #endif /* Linux version */
 246 };
 247 #else
 248 static int igb_suspend(struct pci_dev *pdev, pm_message_t state);
 249 static int igb_resume(struct pci_dev *pdev);
 250 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
 251 #endif /* CONFIG_PM */
 252 #ifndef USE_REBOOT_NOTIFIER
 253 static void igb_shutdown(struct pci_dev *);
 254 #else
 255 static int igb_notify_reboot(struct notifier_block *, unsigned long, void *);
 256 static struct notifier_block igb_notifier_reboot = {
 257         .notifier_call  = igb_notify_reboot,
 258         .next           = NULL,
 259         .priority       = 0
 260 };
 261 #endif
 262 #ifdef IGB_DCA
 263 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
 264 static struct notifier_block dca_notifier = {
 265         .notifier_call  = igb_notify_dca,
 266         .next           = NULL,
 267         .priority       = 0
 268 };
 269 #endif
 270 #ifdef CONFIG_NET_POLL_CONTROLLER
 271 /* for netdump / net console */
 272 static void igb_netpoll(struct net_device *);
 273 #endif
 274
 275 #ifdef HAVE_PCI_ERS
 276 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
 277                      pci_channel_state_t);
 278 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
 279 static void igb_io_resume(struct pci_dev *);
 280
 281 static struct pci_error_handlers igb_err_handler = {
 282         .error_detected = igb_io_error_detected,
 283         .slot_reset = igb_io_slot_reset,
 284         .resume = igb_io_resume,
 285 };
 286 #endif
 287
 288 static void igb_init_fw(struct igb_adapter *adapter);
 289 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
 290
 291 static struct pci_driver igb_driver = {
 292         .name     = igb_driver_name,
 293         .id_table = igb_pci_tbl,
 294         .probe    = igb_probe,
 295         .remove   = __devexit_p(igb_remove),
 296 #ifdef CONFIG_PM
 297 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
 298         .driver.pm = &igb_pm_ops,
 299 #else
 300         .suspend  = igb_suspend,
 301         .resume   = igb_resume,
 302 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
 303 #endif /* CONFIG_PM */
 304 #ifndef USE_REBOOT_NOTIFIER
 305         .shutdown = igb_shutdown,
 306 #endif
 307 #ifdef HAVE_PCI_ERS
 308         .err_handler = &igb_err_handler
 309 #endif
 310 };
 311
 312 //MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
 313 //MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
 314 //MODULE_LICENSE("GPL");
 315 //MODULE_VERSION(DRV_VERSION);
 316
 317 static void igb_vfta_set(struct igb_adapter *adapter, u32 vid, bool add)
 318 {
 319         struct e1000_hw *hw = &adapter->hw;
 320         struct e1000_host_mng_dhcp_cookie *mng_cookie = &hw->mng_cookie;
 321         u32 index = (vid >> E1000_VFTA_ENTRY_SHIFT) & E1000_VFTA_ENTRY_MASK;
 322         u32 mask = 1 << (vid & E1000_VFTA_ENTRY_BIT_SHIFT_MASK);
 323         u32 vfta;
 324
 325         /*
 326          * if this is the management vlan the only option is to add it in so
 327          * that the management pass through will continue to work
 328          */
 329         if ((mng_cookie->status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
 330             (vid == mng_cookie->vlan_id))
 331                 add = TRUE;
 332
 333         vfta = adapter->shadow_vfta[index];
 334
 335         if (add)
 336                 vfta |= mask;
 337         else
 338                 vfta &= ~mask;
 339
 340         e1000_write_vfta(hw, index, vfta);
 341         adapter->shadow_vfta[index] = vfta;
 342 }
 343
 344 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
 345 //module_param(debug, int, 0);
 346 //MODULE_PARM_DESC(debug, "Debug level (0=none, ..., 16=all)");
 347
 348 /**
 349  * igb_init_module - Driver Registration Routine
 350  *
 351  * igb_init_module is the first routine called when the driver is
 352  * loaded. All it does is register with the PCI subsystem.
 353  **/
 354 static int __init igb_init_module(void)
 355 {
 356         int ret;
 357
 358         printk(KERN_INFO "%s - version %s\n",
 359                igb_driver_string, igb_driver_version);
 360
 361         printk(KERN_INFO "%s\n", igb_copyright);
 362 #ifdef IGB_HWMON
 363 /* only use IGB_PROCFS if IGB_HWMON is not defined */
 364 #else
 365 #ifdef IGB_PROCFS
 366         if (igb_procfs_topdir_init())
 367                 printk(KERN_INFO "Procfs failed to initialize topdir\n");
 368 #endif /* IGB_PROCFS */
 369 #endif /* IGB_HWMON  */
 370
 371 #ifdef IGB_DCA
 372         dca_register_notify(&dca_notifier);
 373 #endif
 374         ret = pci_register_driver(&igb_driver);
 375 #ifdef USE_REBOOT_NOTIFIER
 376         if (ret >= 0) {
 377                 register_reboot_notifier(&igb_notifier_reboot);
 378         }
 379 #endif
 380         return ret;
 381 }
 382
 383 #undef module_init
 384 #define module_init(x) static int x(void)  __attribute__((__unused__));
 385 module_init(igb_init_module);
 386
 387 /**
 388  * igb_exit_module - Driver Exit Cleanup Routine
 389  *
 390  * igb_exit_module is called just before the driver is removed
 391  * from memory.
 392  **/
 393 static void __exit igb_exit_module(void)
 394 {
 395 #ifdef IGB_DCA
 396         dca_unregister_notify(&dca_notifier);
 397 #endif
 398 #ifdef USE_REBOOT_NOTIFIER
 399         unregister_reboot_notifier(&igb_notifier_reboot);
 400 #endif
 401         pci_unregister_driver(&igb_driver);
 402
 403 #ifdef IGB_HWMON
 404 /* only compile IGB_PROCFS if IGB_HWMON is not defined */
 405 #else
 406 #ifdef IGB_PROCFS
 407         igb_procfs_topdir_exit();
 408 #endif /* IGB_PROCFS */
 409 #endif /* IGB_HWMON */
 410 }
 411
 412 #undef module_exit
 413 #define module_exit(x) static void x(void)  __attribute__((__unused__));
 414 module_exit(igb_exit_module);
 415
 416 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
 417 /**
 418  * igb_cache_ring_register - Descriptor ring to register mapping
 419  * @adapter: board private structure to initialize
 420  *
 421  * Once we know the feature-set enabled for the device, we'll cache
 422  * the register offset the descriptor ring is assigned to.
 423  **/
 424 static void igb_cache_ring_register(struct igb_adapter *adapter)
 425 {
 426         int i = 0, j = 0;
 427         u32 rbase_offset = adapter->vfs_allocated_count;
 428
 429         switch (adapter->hw.mac.type) {
 430         case e1000_82576:
 431                 /* The queues are allocated for virtualization such that VF 0
 432                  * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
 433                  * In order to avoid collision we start at the first free queue
 434                  * and continue consuming queues in the same sequence
 435                  */
 436                 if ((adapter->rss_queues > 1) && adapter->vmdq_pools) {
 437                         for (; i < adapter->rss_queues; i++)
 438                                 adapter->rx_ring[i]->reg_idx = rbase_offset +
 439                                                                Q_IDX_82576(i);
 440                 }
 441         case e1000_82575:
 442         case e1000_82580:
 443         case e1000_i350:
 444         case e1000_i354:
 445         case e1000_i210:
 446         case e1000_i211:
 447         default:
 448                 for (; i < adapter->num_rx_queues; i++)
 449                         adapter->rx_ring[i]->reg_idx = rbase_offset + i;
 450                 for (; j < adapter->num_tx_queues; j++)
 451                         adapter->tx_ring[j]->reg_idx = rbase_offset + j;
 452                 break;
 453         }
 454 }
 455
 456 static void igb_configure_lli(struct igb_adapter *adapter)
 457 {
 458         struct e1000_hw *hw = &adapter->hw;
 459         u16 port;
 460
 461         /* LLI should only be enabled for MSI-X or MSI interrupts */
 462         if (!adapter->msix_entries && !(adapter->flags & IGB_FLAG_HAS_MSI))
 463                 return;
 464
 465         if (adapter->lli_port) {
 466                 /* use filter 0 for port */
 467                 port = htons((u16)adapter->lli_port);
 468                 E1000_WRITE_REG(hw, E1000_IMIR(0),
 469                         (port | E1000_IMIR_PORT_IM_EN));
 470                 E1000_WRITE_REG(hw, E1000_IMIREXT(0),
 471                         (E1000_IMIREXT_SIZE_BP | E1000_IMIREXT_CTRL_BP));
 472         }
 473
 474         if (adapter->flags & IGB_FLAG_LLI_PUSH) {
 475                 /* use filter 1 for push flag */
 476                 E1000_WRITE_REG(hw, E1000_IMIR(1),
 477                         (E1000_IMIR_PORT_BP | E1000_IMIR_PORT_IM_EN));
 478                 E1000_WRITE_REG(hw, E1000_IMIREXT(1),
 479                         (E1000_IMIREXT_SIZE_BP | E1000_IMIREXT_CTRL_PSH));
 480         }
 481
 482         if (adapter->lli_size) {
 483                 /* use filter 2 for size */
 484                 E1000_WRITE_REG(hw, E1000_IMIR(2),
 485                         (E1000_IMIR_PORT_BP | E1000_IMIR_PORT_IM_EN));
 486                 E1000_WRITE_REG(hw, E1000_IMIREXT(2),
 487                         (adapter->lli_size | E1000_IMIREXT_CTRL_BP));
 488         }
 489
 490 }
 491
 492 /**
 493  *  igb_write_ivar - configure ivar for given MSI-X vector
 494  *  @hw: pointer to the HW structure
 495  *  @msix_vector: vector number we are allocating to a given ring
 496  *  @index: row index of IVAR register to write within IVAR table
 497  *  @offset: column offset of in IVAR, should be multiple of 8
 498  *
 499  *  This function is intended to handle the writing of the IVAR register
 500  *  for adapters 82576 and newer.  The IVAR table consists of 2 columns,
 501  *  each containing an cause allocation for an Rx and Tx ring, and a
 502  *  variable number of rows depending on the number of queues supported.
 503  **/
 504 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
 505                            int index, int offset)
 506 {
 507         u32 ivar = E1000_READ_REG_ARRAY(hw, E1000_IVAR0, index);
 508
 509         /* clear any bits that are currently set */
 510         ivar &= ~((u32)0xFF << offset);
 511
 512         /* write vector and valid bit */
 513         ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
 514
 515         E1000_WRITE_REG_ARRAY(hw, E1000_IVAR0, index, ivar);
 516 }
 517
 518 #define IGB_N0_QUEUE -1
 519 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
 520 {
 521         struct igb_adapter *adapter = q_vector->adapter;
 522         struct e1000_hw *hw = &adapter->hw;
 523         int rx_queue = IGB_N0_QUEUE;
 524         int tx_queue = IGB_N0_QUEUE;
 525         u32 msixbm = 0;
 526
 527         if (q_vector->rx.ring)
 528                 rx_queue = q_vector->rx.ring->reg_idx;
 529         if (q_vector->tx.ring)
 530                 tx_queue = q_vector->tx.ring->reg_idx;
 531
 532         switch (hw->mac.type) {
 533         case e1000_82575:
 534                 /* The 82575 assigns vectors using a bitmask, which matches the
 535                    bitmask for the EICR/EIMS/EIMC registers.  To assign one
 536                    or more queues to a vector, we write the appropriate bits
 537                    into the MSIXBM register for that vector. */
 538                 if (rx_queue > IGB_N0_QUEUE)
 539                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
 540                 if (tx_queue > IGB_N0_QUEUE)
 541                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
 542                 if (!adapter->msix_entries && msix_vector == 0)
 543                         msixbm |= E1000_EIMS_OTHER;
 544                 E1000_WRITE_REG_ARRAY(hw, E1000_MSIXBM(0), msix_vector, msixbm);
 545                 q_vector->eims_value = msixbm;
 546                 break;
 547         case e1000_82576:
 548                 /*
 549                  * 82576 uses a table that essentially consists of 2 columns
 550                  * with 8 rows.  The ordering is column-major so we use the
 551                  * lower 3 bits as the row index, and the 4th bit as the
 552                  * column offset.
 553                  */
 554                 if (rx_queue > IGB_N0_QUEUE)
 555                         igb_write_ivar(hw, msix_vector,
 556                                        rx_queue & 0x7,
 557                                        (rx_queue & 0x8) << 1);
 558                 if (tx_queue > IGB_N0_QUEUE)
 559                         igb_write_ivar(hw, msix_vector,
 560                                        tx_queue & 0x7,
 561                                        ((tx_queue & 0x8) << 1) + 8);
 562                 q_vector->eims_value = 1 << msix_vector;
 563                 break;
 564         case e1000_82580:
 565         case e1000_i350:
 566         case e1000_i354:
 567         case e1000_i210:
 568         case e1000_i211:
 569                 /*
 570                  * On 82580 and newer adapters the scheme is similar to 82576
 571                  * however instead of ordering column-major we have things
 572                  * ordered row-major.  So we traverse the table by using
 573                  * bit 0 as the column offset, and the remaining bits as the
 574                  * row index.
 575                  */
 576                 if (rx_queue > IGB_N0_QUEUE)
 577                         igb_write_ivar(hw, msix_vector,
 578                                        rx_queue >> 1,
 579                                        (rx_queue & 0x1) << 4);
 580                 if (tx_queue > IGB_N0_QUEUE)
 581                         igb_write_ivar(hw, msix_vector,
 582                                        tx_queue >> 1,
 583                                        ((tx_queue & 0x1) << 4) + 8);
 584                 q_vector->eims_value = 1 << msix_vector;
 585                 break;
 586         default:
 587                 BUG();
 588                 break;
 589         }
 590
 591         /* add q_vector eims value to global eims_enable_mask */
 592         adapter->eims_enable_mask |= q_vector->eims_value;
 593
 594         /* configure q_vector to set itr on first interrupt */
 595         q_vector->set_itr = 1;
 596 }
 597
 598 /**
 599  * igb_configure_msix - Configure MSI-X hardware
 600  *
 601  * igb_configure_msix sets up the hardware to properly
 602  * generate MSI-X interrupts.
 603  **/
 604 static void igb_configure_msix(struct igb_adapter *adapter)
 605 {
 606         u32 tmp;
 607         int i, vector = 0;
 608         struct e1000_hw *hw = &adapter->hw;
 609
 610         adapter->eims_enable_mask = 0;
 611
 612         /* set vector for other causes, i.e. link changes */
 613         switch (hw->mac.type) {
 614         case e1000_82575:
 615                 tmp = E1000_READ_REG(hw, E1000_CTRL_EXT);
 616                 /* enable MSI-X PBA support*/
 617                 tmp |= E1000_CTRL_EXT_PBA_CLR;
 618
 619                 /* Auto-Mask interrupts upon ICR read. */
 620                 tmp |= E1000_CTRL_EXT_EIAME;
 621                 tmp |= E1000_CTRL_EXT_IRCA;
 622
 623                 E1000_WRITE_REG(hw, E1000_CTRL_EXT, tmp);
 624
 625                 /* enable msix_other interrupt */
 626                 E1000_WRITE_REG_ARRAY(hw, E1000_MSIXBM(0), vector++,
 627                                       E1000_EIMS_OTHER);
 628                 adapter->eims_other = E1000_EIMS_OTHER;
 629
 630                 break;
 631
 632         case e1000_82576:
 633         case e1000_82580:
 634         case e1000_i350:
 635         case e1000_i354:
 636         case e1000_i210:
 637         case e1000_i211:
 638                 /* Turn on MSI-X capability first, or our settings
 639                  * won't stick.  And it will take days to debug. */
 640                 E1000_WRITE_REG(hw, E1000_GPIE, E1000_GPIE_MSIX_MODE |
 641                                 E1000_GPIE_PBA | E1000_GPIE_EIAME |
 642                                 E1000_GPIE_NSICR);
 643
 644                 /* enable msix_other interrupt */
 645                 adapter->eims_other = 1 << vector;
 646                 tmp = (vector++ | E1000_IVAR_VALID) << 8;
 647
 648                 E1000_WRITE_REG(hw, E1000_IVAR_MISC, tmp);
 649                 break;
 650         default:
 651                 /* do nothing, since nothing else supports MSI-X */
 652                 break;
 653         } /* switch (hw->mac.type) */
 654
 655         adapter->eims_enable_mask |= adapter->eims_other;
 656
 657         for (i = 0; i < adapter->num_q_vectors; i++)
 658                 igb_assign_vector(adapter->q_vector[i], vector++);
 659
 660         E1000_WRITE_FLUSH(hw);
 661 }
 662
 663 /**
 664  * igb_request_msix - Initialize MSI-X interrupts
 665  *
 666  * igb_request_msix allocates MSI-X vectors and requests interrupts from the
 667  * kernel.
 668  **/
 669 static int igb_request_msix(struct igb_adapter *adapter)
 670 {
 671         struct net_device *netdev = adapter->netdev;
 672         struct e1000_hw *hw = &adapter->hw;
 673         int i, err = 0, vector = 0, free_vector = 0;
 674
 675         err = request_irq(adapter->msix_entries[vector].vector,
 676                           &igb_msix_other, 0, netdev->name, adapter);
 677         if (err)
 678                 goto err_out;
 679
 680         for (i = 0; i < adapter->num_q_vectors; i++) {
 681                 struct igb_q_vector *q_vector = adapter->q_vector[i];
 682
 683                 vector++;
 684
 685                 q_vector->itr_register = hw->hw_addr + E1000_EITR(vector);
 686
 687                 if (q_vector->rx.ring && q_vector->tx.ring)
 688                         sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
 689                                 q_vector->rx.ring->queue_index);
 690                 else if (q_vector->tx.ring)
 691                         sprintf(q_vector->name, "%s-tx-%u", netdev->name,
 692                                 q_vector->tx.ring->queue_index);
 693                 else if (q_vector->rx.ring)
 694                         sprintf(q_vector->name, "%s-rx-%u", netdev->name,
 695                                 q_vector->rx.ring->queue_index);
 696                 else
 697                         sprintf(q_vector->name, "%s-unused", netdev->name);
 698
 699                 err = request_irq(adapter->msix_entries[vector].vector,
 700                                   igb_msix_ring, 0, q_vector->name,
 701                                   q_vector);
 702                 if (err)
 703                         goto err_free;
 704         }
 705
 706         igb_configure_msix(adapter);
 707         return 0;
 708
 709 err_free:
 710         /* free already assigned IRQs */
 711         free_irq(adapter->msix_entries[free_vector++].vector, adapter);
 712
 713         vector--;
 714         for (i = 0; i < vector; i++) {
 715                 free_irq(adapter->msix_entries[free_vector++].vector,
 716                          adapter->q_vector[i]);
 717         }
 718 err_out:
 719         return err;
 720 }
 721
 722 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
 723 {
 724         if (adapter->msix_entries) {
 725                 pci_disable_msix(adapter->pdev);
 726                 kfree(adapter->msix_entries);
 727                 adapter->msix_entries = NULL;
 728         } else if (adapter->flags & IGB_FLAG_HAS_MSI) {
 729                 pci_disable_msi(adapter->pdev);
 730         }
 731 }
 732
 733 /**
 734  * igb_free_q_vector - Free memory allocated for specific interrupt vector
 735  * @adapter: board private structure to initialize
 736  * @v_idx: Index of vector to be freed
 737  *
 738  * This function frees the memory allocated to the q_vector.  In addition if
 739  * NAPI is enabled it will delete any references to the NAPI struct prior
 740  * to freeing the q_vector.
 741  **/
 742 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
 743 {
 744         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
 745
 746         if (q_vector->tx.ring)
 747                 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
 748
 749         if (q_vector->rx.ring)
 750                 adapter->tx_ring[q_vector->rx.ring->queue_index] = NULL;
 751
 752         adapter->q_vector[v_idx] = NULL;
 753         netif_napi_del(&q_vector->napi);
 754 #ifndef IGB_NO_LRO
 755         __skb_queue_purge(&q_vector->lrolist.active);
 756 #endif
 757         kfree(q_vector);
 758 }
 759
 760 /**
 761  * igb_free_q_vectors - Free memory allocated for interrupt vectors
 762  * @adapter: board private structure to initialize
 763  *
 764  * This function frees the memory allocated to the q_vectors.  In addition if
 765  * NAPI is enabled it will delete any references to the NAPI struct prior
 766  * to freeing the q_vector.
 767  **/
 768 static void igb_free_q_vectors(struct igb_adapter *adapter)
 769 {
 770         int v_idx = adapter->num_q_vectors;
 771
 772         adapter->num_tx_queues = 0;
 773         adapter->num_rx_queues = 0;
 774         adapter->num_q_vectors = 0;
 775
 776         while (v_idx--)
 777                 igb_free_q_vector(adapter, v_idx);
 778 }
 779
 780 /**
 781  * igb_clear_interrupt_scheme - reset the device to a state of no interrupts
 782  *
 783  * This function resets the device so that it has 0 rx queues, tx queues, and
 784  * MSI-X interrupts allocated.
 785  */
 786 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
 787 {
 788         igb_free_q_vectors(adapter);
 789         igb_reset_interrupt_capability(adapter);
 790 }
 791
 792 /**
 793  * igb_process_mdd_event
 794  * @adapter - board private structure
 795  *
 796  * Identify a malicious VF, disable the VF TX/RX queues and log a message.
 797  */
 798 static void igb_process_mdd_event(struct igb_adapter *adapter)
 799 {
 800         struct e1000_hw *hw = &adapter->hw;
 801         u32 lvmmc, vfte, vfre, mdfb;
 802         u8 vf_queue;
 803
 804         lvmmc = E1000_READ_REG(hw, E1000_LVMMC);
 805         vf_queue = lvmmc >> 29;
 806
 807         /* VF index cannot be bigger or equal to VFs allocated */
 808         if (vf_queue >= adapter->vfs_allocated_count)
 809                 return;
 810
 811         netdev_info(adapter->netdev,
 812                     "VF %d misbehaved. VF queues are disabled. "
 813                     "VM misbehavior code is 0x%x\n", vf_queue, lvmmc);
 814
 815         /* Disable VFTE and VFRE related bits */
 816         vfte = E1000_READ_REG(hw, E1000_VFTE);
 817         vfte &= ~(1 << vf_queue);
 818         E1000_WRITE_REG(hw, E1000_VFTE, vfte);
 819
 820         vfre = E1000_READ_REG(hw, E1000_VFRE);
 821         vfre &= ~(1 << vf_queue);
 822         E1000_WRITE_REG(hw, E1000_VFRE, vfre);
 823
 824         /* Disable MDFB related bit. Clear on write */
 825         mdfb = E1000_READ_REG(hw, E1000_MDFB);
 826         mdfb |= (1 << vf_queue);
 827         E1000_WRITE_REG(hw, E1000_MDFB, mdfb);
 828
 829         /* Reset the specific VF */
 830         E1000_WRITE_REG(hw, E1000_VTCTRL(vf_queue), E1000_VTCTRL_RST);
 831 }
 832
 833 /**
 834  * igb_disable_mdd
 835  * @adapter - board private structure
 836  *
 837  * Disable MDD behavior in the HW
 838  **/
 839 static void igb_disable_mdd(struct igb_adapter *adapter)
 840 {
 841         struct e1000_hw *hw = &adapter->hw;
 842         u32 reg;
 843
 844         if ((hw->mac.type != e1000_i350) ||
 845             (hw->mac.type != e1000_i354))
 846                 return;
 847
 848         reg = E1000_READ_REG(hw, E1000_DTXCTL);
 849         reg &= (~E1000_DTXCTL_MDP_EN);
 850         E1000_WRITE_REG(hw, E1000_DTXCTL, reg);
 851 }
 852
 853 /**
 854  * igb_enable_mdd
 855  * @adapter - board private structure
 856  *
 857  * Enable the HW to detect malicious driver and sends an interrupt to
 858  * the driver.
 859  **/
 860 static void igb_enable_mdd(struct igb_adapter *adapter)
 861 {
 862         struct e1000_hw *hw = &adapter->hw;
 863         u32 reg;
 864
 865         /* Only available on i350 device */
 866         if (hw->mac.type != e1000_i350)
 867                 return;
 868
 869         reg = E1000_READ_REG(hw, E1000_DTXCTL);
 870         reg |= E1000_DTXCTL_MDP_EN;
 871         E1000_WRITE_REG(hw, E1000_DTXCTL, reg);
 872 }
 873
 874 /**
 875  * igb_reset_sriov_capability - disable SR-IOV if enabled
 876  *
 877  * Attempt to disable single root IO virtualization capabilites present in the
 878  * kernel.
 879  **/
 880 static void igb_reset_sriov_capability(struct igb_adapter *adapter)
 881 {
 882         struct pci_dev *pdev = adapter->pdev;
 883         struct e1000_hw *hw = &adapter->hw;
 884
 885         /* reclaim resources allocated to VFs */
 886         if (adapter->vf_data) {
 887                 if (!pci_vfs_assigned(pdev)) {
 888                         /*
 889                          * disable iov and allow time for transactions to
 890                          * clear
 891                          */
 892                         pci_disable_sriov(pdev);
 893                         msleep(500);
 894
 895                         dev_info(pci_dev_to_dev(pdev), "IOV Disabled\n");
 896                 } else {
 897                         dev_info(pci_dev_to_dev(pdev), "IOV Not Disabled\n "
 898                                         "VF(s) are assigned to guests!\n");
 899                 }
 900                 /* Disable Malicious Driver Detection */
 901                 igb_disable_mdd(adapter);
 902
 903                 /* free vf data storage */
 904                 kfree(adapter->vf_data);
 905                 adapter->vf_data = NULL;
 906
 907                 /* switch rings back to PF ownership */
 908                 E1000_WRITE_REG(hw, E1000_IOVCTL,
 909                                 E1000_IOVCTL_REUSE_VFQ);
 910                 E1000_WRITE_FLUSH(hw);
 911                 msleep(100);
 912         }
 913
 914         adapter->vfs_allocated_count = 0;
 915 }
 916
 917 /**
 918  * igb_set_sriov_capability - setup SR-IOV if supported
 919  *
 920  * Attempt to enable single root IO virtualization capabilites present in the
 921  * kernel.
 922  **/
 923 static void igb_set_sriov_capability(struct igb_adapter *adapter)
 924 {
 925         struct pci_dev *pdev = adapter->pdev;
 926         int old_vfs = 0;
 927         int i;
 928
 929         old_vfs = pci_num_vf(pdev);
 930         if (old_vfs) {
 931                 dev_info(pci_dev_to_dev(pdev),
 932                                 "%d pre-allocated VFs found - override "
 933                                 "max_vfs setting of %d\n", old_vfs,
 934                                 adapter->vfs_allocated_count);
 935                 adapter->vfs_allocated_count = old_vfs;
 936         }
 937         /* no VFs requested, do nothing */
 938         if (!adapter->vfs_allocated_count)
 939                 return;
 940
 941         /* allocate vf data storage */
 942         adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
 943                                    sizeof(struct vf_data_storage),
 944                                    GFP_KERNEL);
 945
 946         if (adapter->vf_data) {
 947                 if (!old_vfs) {
 948                         if (pci_enable_sriov(pdev,
 949                                         adapter->vfs_allocated_count))
 950                                 goto err_out;
 951                 }
 952                 for (i = 0; i < adapter->vfs_allocated_count; i++)
 953                         igb_vf_configure(adapter, i);
 954
 955                 switch (adapter->hw.mac.type) {
 956                 case e1000_82576:
 957                 case e1000_i350:
 958                         /* Enable VM to VM loopback by default */
 959                         adapter->flags |= IGB_FLAG_LOOPBACK_ENABLE;
 960                         break;
 961                 default:
 962                         /* Currently no other hardware supports loopback */
 963                         break;
 964                 }
 965
 966                 /* DMA Coalescing is not supported in IOV mode. */
 967                 if (adapter->hw.mac.type >= e1000_i350)
 968                 adapter->dmac = IGB_DMAC_DISABLE;
 969                 if (adapter->hw.mac.type < e1000_i350)
 970                 adapter->flags |= IGB_FLAG_DETECT_BAD_DMA;
 971                 return;
 972
 973         }
 974
 975 err_out:
 976         kfree(adapter->vf_data);
 977         adapter->vf_data = NULL;
 978         adapter->vfs_allocated_count = 0;
 979         dev_warn(pci_dev_to_dev(pdev),
 980                         "Failed to initialize SR-IOV virtualization\n");
 981 }
 982
 983 /**
 984  * igb_set_interrupt_capability - set MSI or MSI-X if supported
 985  *
 986  * Attempt to configure interrupts using the best available
 987  * capabilities of the hardware and kernel.
 988  **/
 989 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
 990 {
 991         struct pci_dev *pdev = adapter->pdev;
 992         int err;
 993         int numvecs, i;
 994
 995         if (!msix)
 996                 adapter->int_mode = IGB_INT_MODE_MSI;
 997
 998         /* Number of supported queues. */
 999         adapter->num_rx_queues = adapter->rss_queues;
1000
1001         if (adapter->vmdq_pools > 1)
1002                 adapter->num_rx_queues += adapter->vmdq_pools - 1;
1003
1004 #ifdef HAVE_TX_MQ
1005         if (adapter->vmdq_pools)
1006                 adapter->num_tx_queues = adapter->vmdq_pools;
1007         else
1008                 adapter->num_tx_queues = adapter->num_rx_queues;
1009 #else
1010         adapter->num_tx_queues = max_t(u32, 1, adapter->vmdq_pools);
1011 #endif
1012
1013         switch (adapter->int_mode) {
1014         case IGB_INT_MODE_MSIX:
1015                 /* start with one vector for every rx queue */
1016                 numvecs = adapter->num_rx_queues;
1017
1018                 /* if tx handler is separate add 1 for every tx queue */
1019                 if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1020                         numvecs += adapter->num_tx_queues;
1021
1022                 /* store the number of vectors reserved for queues */
1023                 adapter->num_q_vectors = numvecs;
1024
1025                 /* add 1 vector for link status interrupts */
1026                 numvecs++;
1027                 adapter->msix_entries = kcalloc(numvecs,
1028                                                 sizeof(struct msix_entry),
1029                                                 GFP_KERNEL);
1030                 if (adapter->msix_entries) {
1031                         for (i = 0; i < numvecs; i++)
1032                                 adapter->msix_entries[i].entry = i;
1033
1034 #ifdef HAVE_PCI_ENABLE_MSIX
1035                         err = pci_enable_msix(pdev,
1036                                               adapter->msix_entries, numvecs);
1037 #else
1038                         err = pci_enable_msix_range(pdev,
1039                                         adapter->msix_entries,
1040                                         numvecs,
1041                                         numvecs);
1042 #endif
1043                         if (err == 0)
1044                                 break;
1045                 }
1046                 /* MSI-X failed, so fall through and try MSI */
1047                 dev_warn(pci_dev_to_dev(pdev), "Failed to initialize MSI-X interrupts. "
1048                          "Falling back to MSI interrupts.\n");
1049                 igb_reset_interrupt_capability(adapter);
1050         case IGB_INT_MODE_MSI:
1051                 if (!pci_enable_msi(pdev))
1052                         adapter->flags |= IGB_FLAG_HAS_MSI;
1053                 else
1054                         dev_warn(pci_dev_to_dev(pdev), "Failed to initialize MSI "
1055                                  "interrupts.  Falling back to legacy "
1056                                  "interrupts.\n");
1057                 /* Fall through */
1058         case IGB_INT_MODE_LEGACY:
1059                 /* disable advanced features and set number of queues to 1 */
1060                 igb_reset_sriov_capability(adapter);
1061                 adapter->vmdq_pools = 0;
1062                 adapter->rss_queues = 1;
1063                 adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1064                 adapter->num_rx_queues = 1;
1065                 adapter->num_tx_queues = 1;
1066                 adapter->num_q_vectors = 1;
1067                 /* Don't do anything; this is system default */
1068                 break;
1069         }
1070 }
1071
1072 static void igb_add_ring(struct igb_ring *ring,
1073                          struct igb_ring_container *head)
1074 {
1075         head->ring = ring;
1076         head->count++;
1077 }
1078
1079 /**
1080  * igb_alloc_q_vector - Allocate memory for a single interrupt vector
1081  * @adapter: board private structure to initialize
1082  * @v_count: q_vectors allocated on adapter, used for ring interleaving
1083  * @v_idx: index of vector in adapter struct
1084  * @txr_count: total number of Tx rings to allocate
1085  * @txr_idx: index of first Tx ring to allocate
1086  * @rxr_count: total number of Rx rings to allocate
1087  * @rxr_idx: index of first Rx ring to allocate
1088  *
1089  * We allocate one q_vector.  If allocation fails we return -ENOMEM.
1090  **/
1091 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1092                               unsigned int v_count, unsigned int v_idx,
1093                               unsigned int txr_count, unsigned int txr_idx,
1094                               unsigned int rxr_count, unsigned int rxr_idx)
1095 {
1096         struct igb_q_vector *q_vector;
1097         struct igb_ring *ring;
1098         int ring_count, size;
1099
1100         /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1101         if (txr_count > 1 || rxr_count > 1)
1102                 return -ENOMEM;
1103
1104         ring_count = txr_count + rxr_count;
1105         size = sizeof(struct igb_q_vector) +
1106                (sizeof(struct igb_ring) * ring_count);
1107
1108         /* allocate q_vector and rings */
1109         q_vector = kzalloc(size, GFP_KERNEL);
1110         if (!q_vector)
1111                 return -ENOMEM;
1112
1113 #ifndef IGB_NO_LRO
1114         /* initialize LRO */
1115         __skb_queue_head_init(&q_vector->lrolist.active);
1116
1117 #endif
1118         /* initialize NAPI */
1119         netif_napi_add(adapter->netdev, &q_vector->napi,
1120                        igb_poll, 64);
1121
1122         /* tie q_vector and adapter together */
1123         adapter->q_vector[v_idx] = q_vector;
1124         q_vector->adapter = adapter;
1125
1126         /* initialize work limits */
1127         q_vector->tx.work_limit = adapter->tx_work_limit;
1128
1129         /* initialize ITR configuration */
1130         q_vector->itr_register = adapter->hw.hw_addr + E1000_EITR(0);
1131         q_vector->itr_val = IGB_START_ITR;
1132
1133         /* initialize pointer to rings */
1134         ring = q_vector->ring;
1135
1136         /* initialize ITR */
1137         if (rxr_count) {
1138                 /* rx or rx/tx vector */
1139                 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1140                         q_vector->itr_val = adapter->rx_itr_setting;
1141         } else {
1142                 /* tx only vector */
1143                 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1144                         q_vector->itr_val = adapter->tx_itr_setting;
1145         }
1146
1147         if (txr_count) {
1148                 /* assign generic ring traits */
1149                 ring->dev = &adapter->pdev->dev;
1150                 ring->netdev = adapter->netdev;
1151
1152                 /* configure backlink on ring */
1153                 ring->q_vector = q_vector;
1154
1155                 /* update q_vector Tx values */
1156                 igb_add_ring(ring, &q_vector->tx);
1157
1158                 /* For 82575, context index must be unique per ring. */
1159                 if (adapter->hw.mac.type == e1000_82575)
1160                         set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1161
1162                 /* apply Tx specific ring traits */
1163                 ring->count = adapter->tx_ring_count;
1164                 ring->queue_index = txr_idx;
1165
1166                 /* assign ring to adapter */
1167                 adapter->tx_ring[txr_idx] = ring;
1168
1169                 /* push pointer to next ring */
1170                 ring++;
1171         }
1172
1173         if (rxr_count) {
1174                 /* assign generic ring traits */
1175                 ring->dev = &adapter->pdev->dev;
1176                 ring->netdev = adapter->netdev;
1177
1178                 /* configure backlink on ring */
1179                 ring->q_vector = q_vector;
1180
1181                 /* update q_vector Rx values */
1182                 igb_add_ring(ring, &q_vector->rx);
1183
1184 #ifndef HAVE_NDO_SET_FEATURES
1185                 /* enable rx checksum */
1186                 set_bit(IGB_RING_FLAG_RX_CSUM, &ring->flags);
1187
1188 #endif
1189                 /* set flag indicating ring supports SCTP checksum offload */
1190                 if (adapter->hw.mac.type >= e1000_82576)
1191                         set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1192
1193                 if ((adapter->hw.mac.type == e1000_i350) ||
1194                     (adapter->hw.mac.type == e1000_i354))
1195                         set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1196
1197                 /* apply Rx specific ring traits */
1198                 ring->count = adapter->rx_ring_count;
1199                 ring->queue_index = rxr_idx;
1200
1201                 /* assign ring to adapter */
1202                 adapter->rx_ring[rxr_idx] = ring;
1203         }
1204
1205         return 0;
1206 }
1207
1208 /**
1209  * igb_alloc_q_vectors - Allocate memory for interrupt vectors
1210  * @adapter: board private structure to initialize
1211  *
1212  * We allocate one q_vector per queue interrupt.  If allocation fails we
1213  * return -ENOMEM.
1214  **/
1215 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1216 {
1217         int q_vectors = adapter->num_q_vectors;
1218         int rxr_remaining = adapter->num_rx_queues;
1219         int txr_remaining = adapter->num_tx_queues;
1220         int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1221         int err;
1222
1223         if (q_vectors >= (rxr_remaining + txr_remaining)) {
1224                 for (; rxr_remaining; v_idx++) {
1225                         err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1226                                                  0, 0, 1, rxr_idx);
1227
1228                         if (err)
1229                                 goto err_out;
1230
1231                         /* update counts and index */
1232                         rxr_remaining--;
1233                         rxr_idx++;
1234                 }
1235         }
1236
1237         for (; v_idx < q_vectors; v_idx++) {
1238                 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1239                 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1240                 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1241                                          tqpv, txr_idx, rqpv, rxr_idx);
1242
1243                 if (err)
1244                         goto err_out;
1245
1246                 /* update counts and index */
1247                 rxr_remaining -= rqpv;
1248                 txr_remaining -= tqpv;
1249                 rxr_idx++;
1250                 txr_idx++;
1251         }
1252
1253         return 0;
1254
1255 err_out:
1256         adapter->num_tx_queues = 0;
1257         adapter->num_rx_queues = 0;
1258         adapter->num_q_vectors = 0;
1259
1260         while (v_idx--)
1261                 igb_free_q_vector(adapter, v_idx);
1262
1263         return -ENOMEM;
1264 }
1265
1266 /**
1267  * igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1268  *
1269  * This function initializes the interrupts and allocates all of the queues.
1270  **/
1271 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1272 {
1273         struct pci_dev *pdev = adapter->pdev;
1274         int err;
1275
1276         igb_set_interrupt_capability(adapter, msix);
1277
1278         err = igb_alloc_q_vectors(adapter);
1279         if (err) {
1280                 dev_err(pci_dev_to_dev(pdev), "Unable to allocate memory for vectors\n");
1281                 goto err_alloc_q_vectors;
1282         }
1283
1284         igb_cache_ring_register(adapter);
1285
1286         return 0;
1287
1288 err_alloc_q_vectors:
1289         igb_reset_interrupt_capability(adapter);
1290         return err;
1291 }
1292
1293 /**
1294  * igb_request_irq - initialize interrupts
1295  *
1296  * Attempts to configure interrupts using the best available
1297  * capabilities of the hardware and kernel.
1298  **/
1299 static int igb_request_irq(struct igb_adapter *adapter)
1300 {
1301         struct net_device *netdev = adapter->netdev;
1302         struct pci_dev *pdev = adapter->pdev;
1303         int err = 0;
1304
1305         if (adapter->msix_entries) {
1306                 err = igb_request_msix(adapter);
1307                 if (!err)
1308                         goto request_done;
1309                 /* fall back to MSI */
1310                 igb_free_all_tx_resources(adapter);
1311                 igb_free_all_rx_resources(adapter);
1312
1313                 igb_clear_interrupt_scheme(adapter);
1314                 igb_reset_sriov_capability(adapter);
1315                 err = igb_init_interrupt_scheme(adapter, false);
1316                 if (err)
1317                         goto request_done;
1318                 igb_setup_all_tx_resources(adapter);
1319                 igb_setup_all_rx_resources(adapter);
1320                 igb_configure(adapter);
1321         }
1322
1323         igb_assign_vector(adapter->q_vector[0], 0);
1324
1325         if (adapter->flags & IGB_FLAG_HAS_MSI) {
1326                 err = request_irq(pdev->irq, &igb_intr_msi, 0,
1327                                   netdev->name, adapter);
1328                 if (!err)
1329                         goto request_done;
1330
1331                 /* fall back to legacy interrupts */
1332                 igb_reset_interrupt_capability(adapter);
1333                 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1334         }
1335
1336         err = request_irq(pdev->irq, &igb_intr, IRQF_SHARED,
1337                           netdev->name, adapter);
1338
1339         if (err)
1340                 dev_err(pci_dev_to_dev(pdev), "Error %d getting interrupt\n",
1341                         err);
1342
1343 request_done:
1344         return err;
1345 }
1346
1347 static void igb_free_irq(struct igb_adapter *adapter)
1348 {
1349         if (adapter->msix_entries) {
1350                 int vector = 0, i;
1351
1352                 free_irq(adapter->msix_entries[vector++].vector, adapter);
1353
1354                 for (i = 0; i < adapter->num_q_vectors; i++)
1355                         free_irq(adapter->msix_entries[vector++].vector,
1356                                  adapter->q_vector[i]);
1357         } else {
1358                 free_irq(adapter->pdev->irq, adapter);
1359         }
1360 }
1361
1362 /**
1363  * igb_irq_disable - Mask off interrupt generation on the NIC
1364  * @adapter: board private structure
1365  **/
1366 static void igb_irq_disable(struct igb_adapter *adapter)
1367 {
1368         struct e1000_hw *hw = &adapter->hw;
1369
1370         /*
1371          * we need to be careful when disabling interrupts.  The VFs are also
1372          * mapped into these registers and so clearing the bits can cause
1373          * issues on the VF drivers so we only need to clear what we set
1374          */
1375         if (adapter->msix_entries) {
1376                 u32 regval = E1000_READ_REG(hw, E1000_EIAM);
1377                 E1000_WRITE_REG(hw, E1000_EIAM, regval & ~adapter->eims_enable_mask);
1378                 E1000_WRITE_REG(hw, E1000_EIMC, adapter->eims_enable_mask);
1379                 regval = E1000_READ_REG(hw, E1000_EIAC);
1380                 E1000_WRITE_REG(hw, E1000_EIAC, regval & ~adapter->eims_enable_mask);
1381         }
1382
1383         E1000_WRITE_REG(hw, E1000_IAM, 0);
1384         E1000_WRITE_REG(hw, E1000_IMC, ~0);
1385         E1000_WRITE_FLUSH(hw);
1386
1387         if (adapter->msix_entries) {
1388                 int vector = 0, i;
1389
1390                 synchronize_irq(adapter->msix_entries[vector++].vector);
1391
1392                 for (i = 0; i < adapter->num_q_vectors; i++)
1393                         synchronize_irq(adapter->msix_entries[vector++].vector);
1394         } else {
1395                 synchronize_irq(adapter->pdev->irq);
1396         }
1397 }
1398
1399 /**
1400  * igb_irq_enable - Enable default interrupt generation settings
1401  * @adapter: board private structure
1402  **/
1403 static void igb_irq_enable(struct igb_adapter *adapter)
1404 {
1405         struct e1000_hw *hw = &adapter->hw;
1406
1407         if (adapter->msix_entries) {
1408                 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1409                 u32 regval = E1000_READ_REG(hw, E1000_EIAC);
1410                 E1000_WRITE_REG(hw, E1000_EIAC, regval | adapter->eims_enable_mask);
1411                 regval = E1000_READ_REG(hw, E1000_EIAM);
1412                 E1000_WRITE_REG(hw, E1000_EIAM, regval | adapter->eims_enable_mask);
1413                 E1000_WRITE_REG(hw, E1000_EIMS, adapter->eims_enable_mask);
1414                 if (adapter->vfs_allocated_count) {
1415                         E1000_WRITE_REG(hw, E1000_MBVFIMR, 0xFF);
1416                         ims |= E1000_IMS_VMMB;
1417                         if (adapter->mdd)
1418                                 if ((adapter->hw.mac.type == e1000_i350) ||
1419                                     (adapter->hw.mac.type == e1000_i354))
1420                                 ims |= E1000_IMS_MDDET;
1421                 }
1422                 E1000_WRITE_REG(hw, E1000_IMS, ims);
1423         } else {
1424                 E1000_WRITE_REG(hw, E1000_IMS, IMS_ENABLE_MASK |
1425                                 E1000_IMS_DRSTA);
1426                 E1000_WRITE_REG(hw, E1000_IAM, IMS_ENABLE_MASK |
1427                                 E1000_IMS_DRSTA);
1428         }
1429 }
1430
1431 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1432 {
1433         struct e1000_hw *hw = &adapter->hw;
1434         u16 vid = adapter->hw.mng_cookie.vlan_id;
1435         u16 old_vid = adapter->mng_vlan_id;
1436
1437         if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1438                 /* add VID to filter table */
1439                 igb_vfta_set(adapter, vid, TRUE);
1440                 adapter->mng_vlan_id = vid;
1441         } else {
1442                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1443         }
1444
1445         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1446             (vid != old_vid) &&
1447 #ifdef HAVE_VLAN_RX_REGISTER
1448             !vlan_group_get_device(adapter->vlgrp, old_vid)) {
1449 #else
1450             !test_bit(old_vid, adapter->active_vlans)) {
1451 #endif
1452                 /* remove VID from filter table */
1453                 igb_vfta_set(adapter, old_vid, FALSE);
1454         }
1455 }
1456
1457 /**
1458  * igb_release_hw_control - release control of the h/w to f/w
1459  * @adapter: address of board private structure
1460  *
1461  * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1462  * For ASF and Pass Through versions of f/w this means that the
1463  * driver is no longer loaded.
1464  *
1465  **/
1466 static void igb_release_hw_control(struct igb_adapter *adapter)
1467 {
1468         struct e1000_hw *hw = &adapter->hw;
1469         u32 ctrl_ext;
1470
1471         /* Let firmware take over control of h/w */
1472         ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1473         E1000_WRITE_REG(hw, E1000_CTRL_EXT,
1474                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1475 }
1476
1477 /**
1478  * igb_get_hw_control - get control of the h/w from f/w
1479  * @adapter: address of board private structure
1480  *
1481  * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1482  * For ASF and Pass Through versions of f/w this means that
1483  * the driver is loaded.
1484  *
1485  **/
1486 static void igb_get_hw_control(struct igb_adapter *adapter)
1487 {
1488         struct e1000_hw *hw = &adapter->hw;
1489         u32 ctrl_ext;
1490
1491         /* Let firmware know the driver has taken over */
1492         ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1493         E1000_WRITE_REG(hw, E1000_CTRL_EXT,
1494                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1495 }
1496
1497 /**
1498  * igb_configure - configure the hardware for RX and TX
1499  * @adapter: private board structure
1500  **/
1501 static void igb_configure(struct igb_adapter *adapter)
1502 {
1503         struct net_device *netdev = adapter->netdev;
1504         int i;
1505
1506         igb_get_hw_control(adapter);
1507         igb_set_rx_mode(netdev);
1508
1509         igb_restore_vlan(adapter);
1510
1511         igb_setup_tctl(adapter);
1512         igb_setup_mrqc(adapter);
1513         igb_setup_rctl(adapter);
1514
1515         igb_configure_tx(adapter);
1516         igb_configure_rx(adapter);
1517
1518         e1000_rx_fifo_flush_82575(&adapter->hw);
1519 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1520         if (adapter->num_tx_queues > 1)
1521                 netdev->features |= NETIF_F_MULTI_QUEUE;
1522         else
1523                 netdev->features &= ~NETIF_F_MULTI_QUEUE;
1524 #endif
1525
1526         /* call igb_desc_unused which always leaves
1527          * at least 1 descriptor unused to make sure
1528          * next_to_use != next_to_clean */
1529         for (i = 0; i < adapter->num_rx_queues; i++) {
1530                 struct igb_ring *ring = adapter->rx_ring[i];
1531                 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
1532         }
1533 }
1534
1535 /**
1536  * igb_power_up_link - Power up the phy/serdes link
1537  * @adapter: address of board private structure
1538  **/
1539 void igb_power_up_link(struct igb_adapter *adapter)
1540 {
1541         e1000_phy_hw_reset(&adapter->hw);
1542
1543         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1544                 e1000_power_up_phy(&adapter->hw);
1545         else
1546                 e1000_power_up_fiber_serdes_link(&adapter->hw);
1547 }
1548
1549 /**
1550  * igb_power_down_link - Power down the phy/serdes link
1551  * @adapter: address of board private structure
1552  */
1553 static void igb_power_down_link(struct igb_adapter *adapter)
1554 {
1555         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1556                 e1000_power_down_phy(&adapter->hw);
1557         else
1558                 e1000_shutdown_fiber_serdes_link(&adapter->hw);
1559 }
1560
1561 /* Detect and switch function for Media Auto Sense */
1562 static void igb_check_swap_media(struct igb_adapter *adapter)
1563 {
1564         struct e1000_hw *hw = &adapter->hw;
1565         u32 ctrl_ext, connsw;
1566         bool swap_now = false;
1567         bool link;
1568
1569         ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1570         connsw = E1000_READ_REG(hw, E1000_CONNSW);
1571         link = igb_has_link(adapter);
1572         (void) link;
1573
1574         /* need to live swap if current media is copper and we have fiber/serdes
1575          * to go to.
1576          */
1577
1578         if ((hw->phy.media_type == e1000_media_type_copper) &&
1579             (!(connsw & E1000_CONNSW_AUTOSENSE_EN))) {
1580                 swap_now = true;
1581         } else if (!(connsw & E1000_CONNSW_SERDESD)) {
1582                 /* copper signal takes time to appear */
1583                 if (adapter->copper_tries < 2) {
1584                         adapter->copper_tries++;
1585                         connsw |= E1000_CONNSW_AUTOSENSE_CONF;
1586                         E1000_WRITE_REG(hw, E1000_CONNSW, connsw);
1587                         return;
1588                 } else {
1589                         adapter->copper_tries = 0;
1590                         if ((connsw & E1000_CONNSW_PHYSD) &&
1591                             (!(connsw & E1000_CONNSW_PHY_PDN))) {
1592                                 swap_now = true;
1593                                 connsw &= ~E1000_CONNSW_AUTOSENSE_CONF;
1594                                 E1000_WRITE_REG(hw, E1000_CONNSW, connsw);
1595                         }
1596                 }
1597         }
1598
1599         if (swap_now) {
1600                 switch (hw->phy.media_type) {
1601                 case e1000_media_type_copper:
1602                         dev_info(pci_dev_to_dev(adapter->pdev),
1603                                  "%s:MAS: changing media to fiber/serdes\n",
1604                         adapter->netdev->name);
1605                         ctrl_ext |=
1606                                 E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1607                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
1608                         adapter->copper_tries = 0;
1609                         break;
1610                 case e1000_media_type_internal_serdes:
1611                 case e1000_media_type_fiber:
1612                         dev_info(pci_dev_to_dev(adapter->pdev),
1613                                  "%s:MAS: changing media to copper\n",
1614                                  adapter->netdev->name);
1615                         ctrl_ext &=
1616                                 ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1617                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
1618                         break;
1619                 default:
1620                         /* shouldn't get here during regular operation */
1621                         dev_err(pci_dev_to_dev(adapter->pdev),
1622                                 "%s:AMS: Invalid media type found, returning\n",
1623                                 adapter->netdev->name);
1624                         break;
1625                 }
1626                 E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
1627         }
1628 }
1629
1630 #ifdef HAVE_I2C_SUPPORT
1631 /*  igb_get_i2c_data - Reads the I2C SDA data bit
1632  *  @hw: pointer to hardware structure
1633  *  @i2cctl: Current value of I2CCTL register
1634  *
1635  *  Returns the I2C data bit value
1636  */
1637 static int igb_get_i2c_data(void *data)
1638 {
1639         struct igb_adapter *adapter = data;
1640         struct e1000_hw *hw = &adapter->hw;
1641         s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1642
1643         return (i2cctl & E1000_I2C_DATA_IN) != 0;
1644 }
1645
1646 /* igb_set_i2c_data - Sets the I2C data bit
1647  *  @data: pointer to hardware structure
1648  *  @state: I2C data value (0 or 1) to set
1649  *
1650  *  Sets the I2C data bit
1651  */
1652 static void igb_set_i2c_data(void *data, int state)
1653 {
1654         struct igb_adapter *adapter = data;
1655         struct e1000_hw *hw = &adapter->hw;
1656         s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1657
1658         if (state)
1659                 i2cctl |= E1000_I2C_DATA_OUT;
1660         else
1661                 i2cctl &= ~E1000_I2C_DATA_OUT;
1662
1663         i2cctl &= ~E1000_I2C_DATA_OE_N;
1664         i2cctl |= E1000_I2C_CLK_OE_N;
1665
1666         E1000_WRITE_REG(hw, E1000_I2CPARAMS, i2cctl);
1667         E1000_WRITE_FLUSH(hw);
1668
1669 }
1670
1671 /* igb_set_i2c_clk - Sets the I2C SCL clock
1672  *  @data: pointer to hardware structure
1673  *  @state: state to set clock
1674  *
1675  *  Sets the I2C clock line to state
1676  */
1677 static void igb_set_i2c_clk(void *data, int state)
1678 {
1679         struct igb_adapter *adapter = data;
1680         struct e1000_hw *hw = &adapter->hw;
1681         s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1682
1683         if (state) {
1684                 i2cctl |= E1000_I2C_CLK_OUT;
1685                 i2cctl &= ~E1000_I2C_CLK_OE_N;
1686         } else {
1687                 i2cctl &= ~E1000_I2C_CLK_OUT;
1688                 i2cctl &= ~E1000_I2C_CLK_OE_N;
1689         }
1690         E1000_WRITE_REG(hw, E1000_I2CPARAMS, i2cctl);
1691         E1000_WRITE_FLUSH(hw);
1692 }
1693
1694 /* igb_get_i2c_clk - Gets the I2C SCL clock state
1695  *  @data: pointer to hardware structure
1696  *
1697  *  Gets the I2C clock state
1698  */
1699 static int igb_get_i2c_clk(void *data)
1700 {
1701         struct igb_adapter *adapter = data;
1702         struct e1000_hw *hw = &adapter->hw;
1703         s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1704
1705         return (i2cctl & E1000_I2C_CLK_IN) != 0;
1706 }
1707
1708 static const struct i2c_algo_bit_data igb_i2c_algo = {
1709         .setsda         = igb_set_i2c_data,
1710         .setscl         = igb_set_i2c_clk,
1711         .getsda         = igb_get_i2c_data,
1712         .getscl         = igb_get_i2c_clk,
1713         .udelay         = 5,
1714         .timeout        = 20,
1715 };
1716
1717 /*  igb_init_i2c - Init I2C interface
1718  *  @adapter: pointer to adapter structure
1719  *
1720  */
1721 static s32 igb_init_i2c(struct igb_adapter *adapter)
1722 {
1723         s32 status = E1000_SUCCESS;
1724
1725         /* I2C interface supported on i350 devices */
1726         if (adapter->hw.mac.type != e1000_i350)
1727                 return E1000_SUCCESS;
1728
1729         /* Initialize the i2c bus which is controlled by the registers.
1730          * This bus will use the i2c_algo_bit structue that implements
1731          * the protocol through toggling of the 4 bits in the register.
1732          */
1733         adapter->i2c_adap.owner = THIS_MODULE;
1734         adapter->i2c_algo = igb_i2c_algo;
1735         adapter->i2c_algo.data = adapter;
1736         adapter->i2c_adap.algo_data = &adapter->i2c_algo;
1737         adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
1738         strlcpy(adapter->i2c_adap.name, "igb BB",
1739                 sizeof(adapter->i2c_adap.name));
1740         status = i2c_bit_add_bus(&adapter->i2c_adap);
1741         return status;
1742 }
1743
1744 #endif /* HAVE_I2C_SUPPORT */
1745 /**
1746  * igb_up - Open the interface and prepare it to handle traffic
1747  * @adapter: board private structure
1748  **/
1749 int igb_up(struct igb_adapter *adapter)
1750 {
1751         struct e1000_hw *hw = &adapter->hw;
1752         int i;
1753
1754         /* hardware has been reset, we need to reload some things */
1755         igb_configure(adapter);
1756
1757         clear_bit(__IGB_DOWN, &adapter->state);
1758
1759         for (i = 0; i < adapter->num_q_vectors; i++)
1760                 napi_enable(&(adapter->q_vector[i]->napi));
1761
1762         if (adapter->msix_entries)
1763                 igb_configure_msix(adapter);
1764         else
1765                 igb_assign_vector(adapter->q_vector[0], 0);
1766
1767         igb_configure_lli(adapter);
1768
1769         /* Clear any pending interrupts. */
1770         E1000_READ_REG(hw, E1000_ICR);
1771         igb_irq_enable(adapter);
1772
1773         /* notify VFs that reset has been completed */
1774         if (adapter->vfs_allocated_count) {
1775                 u32 reg_data = E1000_READ_REG(hw, E1000_CTRL_EXT);
1776                 reg_data |= E1000_CTRL_EXT_PFRSTD;
1777                 E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg_data);
1778         }
1779
1780         netif_tx_start_all_queues(adapter->netdev);
1781
1782         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
1783                 schedule_work(&adapter->dma_err_task);
1784         /* start the watchdog. */
1785         hw->mac.get_link_status = 1;
1786         schedule_work(&adapter->watchdog_task);
1787
1788         if ((adapter->flags & IGB_FLAG_EEE) &&
1789             (!hw->dev_spec._82575.eee_disable))
1790                 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
1791
1792         return 0;
1793 }
1794
1795 void igb_down(struct igb_adapter *adapter)
1796 {
1797         struct net_device *netdev = adapter->netdev;
1798         struct e1000_hw *hw = &adapter->hw;
1799         u32 tctl, rctl;
1800         int i;
1801
1802         /* signal that we're down so the interrupt handler does not
1803          * reschedule our watchdog timer */
1804         set_bit(__IGB_DOWN, &adapter->state);
1805
1806         /* disable receives in the hardware */
1807         rctl = E1000_READ_REG(hw, E1000_RCTL);
1808         E1000_WRITE_REG(hw, E1000_RCTL, rctl & ~E1000_RCTL_EN);
1809         /* flush and sleep below */
1810
1811         netif_tx_stop_all_queues(netdev);
1812
1813         /* disable transmits in the hardware */
1814         tctl = E1000_READ_REG(hw, E1000_TCTL);
1815         tctl &= ~E1000_TCTL_EN;
1816         E1000_WRITE_REG(hw, E1000_TCTL, tctl);
1817         /* flush both disables and wait for them to finish */
1818         E1000_WRITE_FLUSH(hw);
1819         usleep_range(10000, 20000);
1820
1821         for (i = 0; i < adapter->num_q_vectors; i++)
1822                 napi_disable(&(adapter->q_vector[i]->napi));
1823
1824         igb_irq_disable(adapter);
1825
1826         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
1827
1828         del_timer_sync(&adapter->watchdog_timer);
1829         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
1830                 del_timer_sync(&adapter->dma_err_timer);
1831         del_timer_sync(&adapter->phy_info_timer);
1832
1833         netif_carrier_off(netdev);
1834
1835         /* record the stats before reset*/
1836         igb_update_stats(adapter);
1837
1838         adapter->link_speed = 0;
1839         adapter->link_duplex = 0;
1840
1841 #ifdef HAVE_PCI_ERS
1842         if (!pci_channel_offline(adapter->pdev))
1843                 igb_reset(adapter);
1844 #else
1845         igb_reset(adapter);
1846 #endif
1847         igb_clean_all_tx_rings(adapter);
1848         igb_clean_all_rx_rings(adapter);
1849 #ifdef IGB_DCA
1850         /* since we reset the hardware DCA settings were cleared */
1851         igb_setup_dca(adapter);
1852 #endif
1853 }
1854
1855 void igb_reinit_locked(struct igb_adapter *adapter)
1856 {
1857         WARN_ON(in_interrupt());
1858         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
1859                 usleep_range(1000, 2000);
1860         igb_down(adapter);
1861         igb_up(adapter);
1862         clear_bit(__IGB_RESETTING, &adapter->state);
1863 }
1864
1865 /**
1866  * igb_enable_mas - Media Autosense re-enable after swap
1867  *
1868  * @adapter: adapter struct
1869  **/
1870 static s32  igb_enable_mas(struct igb_adapter *adapter)
1871 {
1872         struct e1000_hw *hw = &adapter->hw;
1873         u32 connsw;
1874         s32 ret_val = E1000_SUCCESS;
1875
1876         connsw = E1000_READ_REG(hw, E1000_CONNSW);
1877         if (hw->phy.media_type == e1000_media_type_copper) {
1878                 /* configure for SerDes media detect */
1879                 if (!(connsw & E1000_CONNSW_SERDESD)) {
1880                         connsw |= E1000_CONNSW_ENRGSRC;
1881                         connsw |= E1000_CONNSW_AUTOSENSE_EN;
1882                         E1000_WRITE_REG(hw, E1000_CONNSW, connsw);
1883                         E1000_WRITE_FLUSH(hw);
1884                 } else if (connsw & E1000_CONNSW_SERDESD) {
1885                         /* already SerDes, no need to enable anything */
1886                         return ret_val;
1887                 } else {
1888                         dev_info(pci_dev_to_dev(adapter->pdev),
1889                         "%s:MAS: Unable to configure feature, disabling..\n",
1890                         adapter->netdev->name);
1891                         adapter->flags &= ~IGB_FLAG_MAS_ENABLE;
1892                 }
1893         }
1894         return ret_val;
1895 }
1896
1897 void igb_reset(struct igb_adapter *adapter)
1898 {
1899         struct pci_dev *pdev = adapter->pdev;
1900         struct e1000_hw *hw = &adapter->hw;
1901         struct e1000_mac_info *mac = &hw->mac;
1902         struct e1000_fc_info *fc = &hw->fc;
1903         u32 pba = 0, tx_space, min_tx_space, min_rx_space, hwm;
1904
1905         /* Repartition Pba for greater than 9k mtu
1906          * To take effect CTRL.RST is required.
1907          */
1908         switch (mac->type) {
1909         case e1000_i350:
1910         case e1000_82580:
1911         case e1000_i354:
1912                 pba = E1000_READ_REG(hw, E1000_RXPBS);
1913                 pba = e1000_rxpbs_adjust_82580(pba);
1914                 break;
1915         case e1000_82576:
1916                 pba = E1000_READ_REG(hw, E1000_RXPBS);
1917                 pba &= E1000_RXPBS_SIZE_MASK_82576;
1918                 break;
1919         case e1000_82575:
1920         case e1000_i210:
1921         case e1000_i211:
1922         default:
1923                 pba = E1000_PBA_34K;
1924                 break;
1925         }
1926
1927         if ((adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) &&
1928             (mac->type < e1000_82576)) {
1929                 /* adjust PBA for jumbo frames */
1930                 E1000_WRITE_REG(hw, E1000_PBA, pba);
1931
1932                 /* To maintain wire speed transmits, the Tx FIFO should be
1933                  * large enough to accommodate two full transmit packets,
1934                  * rounded up to the next 1KB and expressed in KB.  Likewise,
1935                  * the Rx FIFO should be large enough to accommodate at least
1936                  * one full receive packet and is similarly rounded up and
1937                  * expressed in KB. */
1938                 pba = E1000_READ_REG(hw, E1000_PBA);
1939                 /* upper 16 bits has Tx packet buffer allocation size in KB */
1940                 tx_space = pba >> 16;
1941                 /* lower 16 bits has Rx packet buffer allocation size in KB */
1942                 pba &= 0xffff;
1943                 /* the tx fifo also stores 16 bytes of information about the tx
1944                  * but don't include ethernet FCS because hardware appends it */
1945                 min_tx_space = (adapter->max_frame_size +
1946                                 sizeof(union e1000_adv_tx_desc) -
1947                                 ETH_FCS_LEN) * 2;
1948                 min_tx_space = ALIGN(min_tx_space, 1024);
1949                 min_tx_space >>= 10;
1950                 /* software strips receive CRC, so leave room for it */
1951                 min_rx_space = adapter->max_frame_size;
1952                 min_rx_space = ALIGN(min_rx_space, 1024);
1953                 min_rx_space >>= 10;
1954
1955                 /* If current Tx allocation is less than the min Tx FIFO size,
1956                  * and the min Tx FIFO size is less than the current Rx FIFO
1957                  * allocation, take space away from current Rx allocation */
1958                 if (tx_space < min_tx_space &&
1959                     ((min_tx_space - tx_space) < pba)) {
1960                         pba = pba - (min_tx_space - tx_space);
1961
1962                         /* if short on rx space, rx wins and must trump tx
1963                          * adjustment */
1964                         if (pba < min_rx_space)
1965                                 pba = min_rx_space;
1966                 }
1967                 E1000_WRITE_REG(hw, E1000_PBA, pba);
1968         }
1969
1970         /* flow control settings */
1971         /* The high water mark must be low enough to fit one full frame
1972          * (or the size used for early receive) above it in the Rx FIFO.
1973          * Set it to the lower of:
1974          * - 90% of the Rx FIFO size, or
1975          * - the full Rx FIFO size minus one full frame */
1976         hwm = min(((pba << 10) * 9 / 10),
1977                         ((pba << 10) - 2 * adapter->max_frame_size));
1978
1979         fc->high_water = hwm & 0xFFFFFFF0;      /* 16-byte granularity */
1980         fc->low_water = fc->high_water - 16;
1981         fc->pause_time = 0xFFFF;
1982         fc->send_xon = 1;
1983         fc->current_mode = fc->requested_mode;
1984
1985         /* disable receive for all VFs and wait one second */
1986         if (adapter->vfs_allocated_count) {
1987                 int i;
1988                 /*
1989                  * Clear all flags except indication that the PF has set
1990                  * the VF MAC addresses administratively
1991                  */
1992                 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
1993                         adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
1994
1995                 /* ping all the active vfs to let them know we are going down */
1996                 igb_ping_all_vfs(adapter);
1997
1998                 /* disable transmits and receives */
1999                 E1000_WRITE_REG(hw, E1000_VFRE, 0);
2000                 E1000_WRITE_REG(hw, E1000_VFTE, 0);
2001         }
2002
2003         /* Allow time for pending master requests to run */
2004         e1000_reset_hw(hw);
2005         E1000_WRITE_REG(hw, E1000_WUC, 0);
2006
2007         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
2008                 e1000_setup_init_funcs(hw, TRUE);
2009                 igb_check_options(adapter);
2010                 e1000_get_bus_info(hw);
2011                 adapter->flags &= ~IGB_FLAG_MEDIA_RESET;
2012         }
2013         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
2014                 if (igb_enable_mas(adapter))
2015                         dev_err(pci_dev_to_dev(pdev),
2016                                 "Error enabling Media Auto Sense\n");
2017         }
2018         if (e1000_init_hw(hw))
2019                 dev_err(pci_dev_to_dev(pdev), "Hardware Error\n");
2020
2021         /*
2022          * Flow control settings reset on hardware reset, so guarantee flow
2023          * control is off when forcing speed.
2024          */
2025         if (!hw->mac.autoneg)
2026                 e1000_force_mac_fc(hw);
2027
2028         igb_init_dmac(adapter, pba);
2029         /* Re-initialize the thermal sensor on i350 devices. */
2030         if (mac->type == e1000_i350 && hw->bus.func == 0) {
2031                 /*
2032                  * If present, re-initialize the external thermal sensor
2033                  * interface.
2034                  */
2035                 if (adapter->ets)
2036                         e1000_set_i2c_bb(hw);
2037                 e1000_init_thermal_sensor_thresh(hw);
2038         }
2039
2040         /*Re-establish EEE setting */
2041         if (hw->phy.media_type == e1000_media_type_copper) {
2042                 switch (mac->type) {
2043                 case e1000_i350:
2044                 case e1000_i210:
2045                 case e1000_i211:
2046                         e1000_set_eee_i350(hw);
2047                         break;
2048                 case e1000_i354:
2049                         e1000_set_eee_i354(hw);
2050                         break;
2051                 default:
2052                         break;
2053                 }
2054         }
2055
2056         if (!netif_running(adapter->netdev))
2057                 igb_power_down_link(adapter);
2058
2059         igb_update_mng_vlan(adapter);
2060
2061         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2062         E1000_WRITE_REG(hw, E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
2063
2064
2065 #ifdef HAVE_PTP_1588_CLOCK
2066         /* Re-enable PTP, where applicable. */
2067         igb_ptp_reset(adapter);
2068 #endif /* HAVE_PTP_1588_CLOCK */
2069
2070         e1000_get_phy_info(hw);
2071
2072         adapter->devrc++;
2073 }
2074
2075 #ifdef HAVE_NDO_SET_FEATURES
2076 static kni_netdev_features_t igb_fix_features(struct net_device *netdev,
2077                                               kni_netdev_features_t features)
2078 {
2079         /*
2080          * Since there is no support for separate tx vlan accel
2081          * enabled make sure tx flag is cleared if rx is.
2082          */
2083 #ifdef NETIF_F_HW_VLAN_CTAG_RX
2084         if (!(features & NETIF_F_HW_VLAN_CTAG_RX))
2085                 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
2086 #else
2087         if (!(features & NETIF_F_HW_VLAN_RX))
2088                 features &= ~NETIF_F_HW_VLAN_TX;
2089 #endif
2090
2091         /* If Rx checksum is disabled, then LRO should also be disabled */
2092         if (!(features & NETIF_F_RXCSUM))
2093                 features &= ~NETIF_F_LRO;
2094
2095         return features;
2096 }
2097
2098 static int igb_set_features(struct net_device *netdev,
2099                             kni_netdev_features_t features)
2100 {
2101         u32 changed = netdev->features ^ features;
2102
2103 #ifdef NETIF_F_HW_VLAN_CTAG_RX
2104         if (changed & NETIF_F_HW_VLAN_CTAG_RX)
2105 #else
2106         if (changed & NETIF_F_HW_VLAN_RX)
2107 #endif
2108                 igb_vlan_mode(netdev, features);
2109
2110         return 0;
2111 }
2112
2113 #ifdef NTF_SELF
2114 #ifdef USE_CONST_DEV_UC_CHAR
2115 static int igb_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
2116                            struct net_device *dev,
2117                            const unsigned char *addr,
2118 #ifdef HAVE_NDO_FDB_ADD_VID
2119                            u16 vid,
2120 #endif
2121                            u16 flags)
2122 #else
2123 static int igb_ndo_fdb_add(struct ndmsg *ndm,
2124                            struct net_device *dev,
2125                            unsigned char *addr,
2126                            u16 flags)
2127 #endif
2128 {
2129         struct igb_adapter *adapter = netdev_priv(dev);
2130         struct e1000_hw *hw = &adapter->hw;
2131         int err;
2132
2133         if (!(adapter->vfs_allocated_count))
2134                 return -EOPNOTSUPP;
2135
2136         /* Hardware does not support aging addresses so if a
2137          * ndm_state is given only allow permanent addresses
2138          */
2139         if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
2140                 pr_info("%s: FDB only supports static addresses\n",
2141                         igb_driver_name);
2142                 return -EINVAL;
2143         }
2144
2145         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
2146                 u32 rar_uc_entries = hw->mac.rar_entry_count -
2147                                         (adapter->vfs_allocated_count + 1);
2148
2149                 if (netdev_uc_count(dev) < rar_uc_entries)
2150                         err = dev_uc_add_excl(dev, addr);
2151                 else
2152                         err = -ENOMEM;
2153         } else if (is_multicast_ether_addr(addr)) {
2154                 err = dev_mc_add_excl(dev, addr);
2155         } else {
2156                 err = -EINVAL;
2157         }
2158
2159         /* Only return duplicate errors if NLM_F_EXCL is set */
2160         if (err == -EEXIST && !(flags & NLM_F_EXCL))
2161                 err = 0;
2162
2163         return err;
2164 }
2165
2166 #ifndef USE_DEFAULT_FDB_DEL_DUMP
2167 #ifdef USE_CONST_DEV_UC_CHAR
2168 static int igb_ndo_fdb_del(struct ndmsg *ndm,
2169                            struct net_device *dev,
2170                            const unsigned char *addr)
2171 #else
2172 static int igb_ndo_fdb_del(struct ndmsg *ndm,
2173                            struct net_device *dev,
2174                            unsigned char *addr)
2175 #endif
2176 {
2177         struct igb_adapter *adapter = netdev_priv(dev);
2178         int err = -EOPNOTSUPP;
2179
2180         if (ndm->ndm_state & NUD_PERMANENT) {
2181                 pr_info("%s: FDB only supports static addresses\n",
2182                         igb_driver_name);
2183                 return -EINVAL;
2184         }
2185
2186         if (adapter->vfs_allocated_count) {
2187                 if (is_unicast_ether_addr(addr))
2188                         err = dev_uc_del(dev, addr);
2189                 else if (is_multicast_ether_addr(addr))
2190                         err = dev_mc_del(dev, addr);
2191                 else
2192                         err = -EINVAL;
2193         }
2194
2195         return err;
2196 }
2197
2198 static int igb_ndo_fdb_dump(struct sk_buff *skb,
2199                             struct netlink_callback *cb,
2200                             struct net_device *dev,
2201                             int idx)
2202 {
2203         struct igb_adapter *adapter = netdev_priv(dev);
2204
2205         if (adapter->vfs_allocated_count)
2206                 idx = ndo_dflt_fdb_dump(skb, cb, dev, idx);
2207
2208         return idx;
2209 }
2210 #endif /* USE_DEFAULT_FDB_DEL_DUMP */
2211
2212 #ifdef HAVE_BRIDGE_ATTRIBS
2213 #ifdef HAVE_NDO_BRIDGE_SET_DEL_LINK_FLAGS
2214 static int igb_ndo_bridge_setlink(struct net_device *dev,
2215                                   struct nlmsghdr *nlh,
2216                                   u16 flags)
2217 #else
2218 static int igb_ndo_bridge_setlink(struct net_device *dev,
2219                                   struct nlmsghdr *nlh)
2220 #endif /* HAVE_NDO_BRIDGE_SET_DEL_LINK_FLAGS */
2221 {
2222         struct igb_adapter *adapter = netdev_priv(dev);
2223         struct e1000_hw *hw = &adapter->hw;
2224         struct nlattr *attr, *br_spec;
2225         int rem;
2226
2227         if (!(adapter->vfs_allocated_count))
2228                 return -EOPNOTSUPP;
2229
2230         switch (adapter->hw.mac.type) {
2231         case e1000_82576:
2232         case e1000_i350:
2233         case e1000_i354:
2234                 break;
2235         default:
2236                 return -EOPNOTSUPP;
2237         }
2238
2239         br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
2240
2241         nla_for_each_nested(attr, br_spec, rem) {
2242                 __u16 mode;
2243
2244                 if (nla_type(attr) != IFLA_BRIDGE_MODE)
2245                         continue;
2246
2247                 mode = nla_get_u16(attr);
2248                 if (mode == BRIDGE_MODE_VEPA) {
2249                         e1000_vmdq_set_loopback_pf(hw, 0);
2250                         adapter->flags &= ~IGB_FLAG_LOOPBACK_ENABLE;
2251                 } else if (mode == BRIDGE_MODE_VEB) {
2252                         e1000_vmdq_set_loopback_pf(hw, 1);
2253                         adapter->flags |= IGB_FLAG_LOOPBACK_ENABLE;
2254                 } else
2255                         return -EINVAL;
2256
2257                 netdev_info(adapter->netdev, "enabling bridge mode: %s\n",
2258                             mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
2259         }
2260
2261         return 0;
2262 }
2263
2264 #ifdef HAVE_BRIDGE_FILTER
2265 #ifdef HAVE_NDO_BRIDGE_GETLINK_NLFLAGS
2266 static int igb_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
2267                                   struct net_device *dev, u32 filter_mask,
2268                                   int nlflags)
2269 #else
2270 static int igb_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
2271                                   struct net_device *dev, u32 filter_mask)
2272 #endif /* HAVE_NDO_BRIDGE_GETLINK_NLFLAGS */
2273 #else
2274 static int igb_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
2275                                   struct net_device *dev)
2276 #endif
2277 {
2278         struct igb_adapter *adapter = netdev_priv(dev);
2279         u16 mode;
2280
2281         if (!(adapter->vfs_allocated_count))
2282                 return -EOPNOTSUPP;
2283
2284         if (adapter->flags & IGB_FLAG_LOOPBACK_ENABLE)
2285                 mode = BRIDGE_MODE_VEB;
2286         else
2287                 mode = BRIDGE_MODE_VEPA;
2288
2289 #ifdef HAVE_NDO_DFLT_BRIDGE_ADD_MASK
2290 #ifdef HAVE_NDO_BRIDGE_GETLINK_NLFLAGS
2291 #ifdef HAVE_NDO_BRIDGE_GETLINK_FILTER_MASK_VLAN_FILL
2292         return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode, 0, 0,
2293                                 nlflags, filter_mask, NULL);
2294 #else
2295         return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode, 0, 0, nlflags);
2296 #endif /* HAVE_NDO_BRIDGE_GETLINK_FILTER_MASK_VLAN_FILL */
2297 #else
2298         return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode, 0, 0);
2299 #endif /* HAVE_NDO_BRIDGE_GETLINK_NLFLAGS */
2300 #else
2301         return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode);
2302 #endif /* HAVE_NDO_DFLT_BRIDGE_ADD_MASK */
2303 }
2304 #endif /* HAVE_BRIDGE_ATTRIBS */
2305 #endif /* NTF_SELF */
2306
2307 #endif /* HAVE_NDO_SET_FEATURES */
2308 #ifdef HAVE_NET_DEVICE_OPS
2309 static const struct net_device_ops igb_netdev_ops = {
2310         .ndo_open               = igb_open,
2311         .ndo_stop               = igb_close,
2312         .ndo_start_xmit         = igb_xmit_frame,
2313         .ndo_get_stats          = igb_get_stats,
2314         .ndo_set_rx_mode        = igb_set_rx_mode,
2315         .ndo_set_mac_address    = igb_set_mac,
2316         .ndo_change_mtu         = igb_change_mtu,
2317         .ndo_do_ioctl           = igb_ioctl,
2318         .ndo_tx_timeout         = igb_tx_timeout,
2319         .ndo_validate_addr      = eth_validate_addr,
2320         .ndo_vlan_rx_add_vid    = igb_vlan_rx_add_vid,
2321         .ndo_vlan_rx_kill_vid   = igb_vlan_rx_kill_vid,
2322 #ifdef IFLA_VF_MAX
2323         .ndo_set_vf_mac         = igb_ndo_set_vf_mac,
2324         .ndo_set_vf_vlan        = igb_ndo_set_vf_vlan,
2325 #ifdef HAVE_VF_MIN_MAX_TXRATE
2326         .ndo_set_vf_rate        = igb_ndo_set_vf_bw,
2327 #else /* HAVE_VF_MIN_MAX_TXRATE */
2328         .ndo_set_vf_tx_rate     = igb_ndo_set_vf_bw,
2329 #endif /* HAVE_VF_MIN_MAX_TXRATE */
2330         .ndo_get_vf_config      = igb_ndo_get_vf_config,
2331 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
2332         .ndo_set_vf_spoofchk    = igb_ndo_set_vf_spoofchk,
2333 #endif /* HAVE_VF_SPOOFCHK_CONFIGURE */
2334 #endif /* IFLA_VF_MAX */
2335 #ifdef CONFIG_NET_POLL_CONTROLLER
2336         .ndo_poll_controller    = igb_netpoll,
2337 #endif
2338 #ifdef HAVE_NDO_SET_FEATURES
2339         .ndo_fix_features       = igb_fix_features,
2340         .ndo_set_features       = igb_set_features,
2341 #endif
2342 #ifdef HAVE_VLAN_RX_REGISTER
2343         .ndo_vlan_rx_register   = igb_vlan_mode,
2344 #endif
2345 #ifndef HAVE_RHEL6_NETDEV_OPS_EXT_FDB
2346 #ifdef NTF_SELF
2347         .ndo_fdb_add            = igb_ndo_fdb_add,
2348 #ifndef USE_DEFAULT_FDB_DEL_DUMP
2349         .ndo_fdb_del            = igb_ndo_fdb_del,
2350         .ndo_fdb_dump           = igb_ndo_fdb_dump,
2351 #endif
2352 #endif /* ! HAVE_RHEL6_NETDEV_OPS_EXT_FDB */
2353 #ifdef HAVE_BRIDGE_ATTRIBS
2354         .ndo_bridge_setlink     = igb_ndo_bridge_setlink,
2355         .ndo_bridge_getlink     = igb_ndo_bridge_getlink,
2356 #endif /* HAVE_BRIDGE_ATTRIBS */
2357 #endif
2358 };
2359
2360 #ifdef CONFIG_IGB_VMDQ_NETDEV
2361 static const struct net_device_ops igb_vmdq_ops = {
2362         .ndo_open               = &igb_vmdq_open,
2363         .ndo_stop               = &igb_vmdq_close,
2364         .ndo_start_xmit         = &igb_vmdq_xmit_frame,
2365         .ndo_get_stats          = &igb_vmdq_get_stats,
2366         .ndo_set_rx_mode        = &igb_vmdq_set_rx_mode,
2367         .ndo_validate_addr      = eth_validate_addr,
2368         .ndo_set_mac_address    = &igb_vmdq_set_mac,
2369         .ndo_change_mtu         = &igb_vmdq_change_mtu,
2370         .ndo_tx_timeout         = &igb_vmdq_tx_timeout,
2371         .ndo_vlan_rx_register   = &igb_vmdq_vlan_rx_register,
2372         .ndo_vlan_rx_add_vid    = &igb_vmdq_vlan_rx_add_vid,
2373         .ndo_vlan_rx_kill_vid   = &igb_vmdq_vlan_rx_kill_vid,
2374 };
2375
2376 #endif /* CONFIG_IGB_VMDQ_NETDEV */
2377 #endif /* HAVE_NET_DEVICE_OPS */
2378 #ifdef CONFIG_IGB_VMDQ_NETDEV
2379 void igb_assign_vmdq_netdev_ops(struct net_device *vnetdev)
2380 {
2381 #ifdef HAVE_NET_DEVICE_OPS
2382         vnetdev->netdev_ops = &igb_vmdq_ops;
2383 #else
2384         dev->open = &igb_vmdq_open;
2385         dev->stop = &igb_vmdq_close;
2386         dev->hard_start_xmit = &igb_vmdq_xmit_frame;
2387         dev->get_stats = &igb_vmdq_get_stats;
2388 #ifdef HAVE_SET_RX_MODE
2389         dev->set_rx_mode = &igb_vmdq_set_rx_mode;
2390 #endif
2391         dev->set_multicast_list = &igb_vmdq_set_rx_mode;
2392         dev->set_mac_address = &igb_vmdq_set_mac;
2393         dev->change_mtu = &igb_vmdq_change_mtu;
2394 #ifdef HAVE_TX_TIMEOUT
2395         dev->tx_timeout = &igb_vmdq_tx_timeout;
2396 #endif
2397 #if defined(NETIF_F_HW_VLAN_TX) || defined(NETIF_F_HW_VLAN_CTAG_TX)
2398         dev->vlan_rx_register = &igb_vmdq_vlan_rx_register;
2399         dev->vlan_rx_add_vid = &igb_vmdq_vlan_rx_add_vid;
2400         dev->vlan_rx_kill_vid = &igb_vmdq_vlan_rx_kill_vid;
2401 #endif
2402 #endif
2403         igb_vmdq_set_ethtool_ops(vnetdev);
2404         vnetdev->watchdog_timeo = 5 * HZ;
2405
2406 }
2407
2408 int igb_init_vmdq_netdevs(struct igb_adapter *adapter)
2409 {
2410         int pool, err = 0, base_queue;
2411         struct net_device *vnetdev;
2412         struct igb_vmdq_adapter *vmdq_adapter;
2413
2414         for (pool = 1; pool < adapter->vmdq_pools; pool++) {
2415                 int qpp = (!adapter->rss_queues ? 1 : adapter->rss_queues);
2416                 base_queue = pool * qpp;
2417                 vnetdev = alloc_etherdev(sizeof(struct igb_vmdq_adapter));
2418                 if (!vnetdev) {
2419                         err = -ENOMEM;
2420                         break;
2421                 }
2422                 vmdq_adapter = netdev_priv(vnetdev);
2423                 vmdq_adapter->vnetdev = vnetdev;
2424                 vmdq_adapter->real_adapter = adapter;
2425                 vmdq_adapter->rx_ring = adapter->rx_ring[base_queue];
2426                 vmdq_adapter->tx_ring = adapter->tx_ring[base_queue];
2427                 igb_assign_vmdq_netdev_ops(vnetdev);
2428                 snprintf(vnetdev->name, IFNAMSIZ, "%sv%d",
2429                          adapter->netdev->name, pool);
2430                 vnetdev->features = adapter->netdev->features;
2431 #ifdef HAVE_NETDEV_VLAN_FEATURES
2432                 vnetdev->vlan_features = adapter->netdev->vlan_features;
2433 #endif
2434                 adapter->vmdq_netdev[pool-1] = vnetdev;
2435                 err = register_netdev(vnetdev);
2436                 if (err)
2437                         break;
2438         }
2439         return err;
2440 }
2441
2442 int igb_remove_vmdq_netdevs(struct igb_adapter *adapter)
2443 {
2444         int pool, err = 0;
2445
2446         for (pool = 1; pool < adapter->vmdq_pools; pool++) {
2447                 unregister_netdev(adapter->vmdq_netdev[pool-1]);
2448                 free_netdev(adapter->vmdq_netdev[pool-1]);
2449                 adapter->vmdq_netdev[pool-1] = NULL;
2450         }
2451         return err;
2452 }
2453 #endif /* CONFIG_IGB_VMDQ_NETDEV */
2454
2455 /**
2456  * igb_set_fw_version - Configure version string for ethtool
2457  * @adapter: adapter struct
2458  *
2459  **/
2460 static void igb_set_fw_version(struct igb_adapter *adapter)
2461 {
2462         struct e1000_hw *hw = &adapter->hw;
2463         struct e1000_fw_version fw;
2464
2465         e1000_get_fw_version(hw, &fw);
2466
2467         switch (hw->mac.type) {
2468         case e1000_i210:
2469         case e1000_i211:
2470                 if (!(e1000_get_flash_presence_i210(hw))) {
2471                         snprintf(adapter->fw_version,
2472                             sizeof(adapter->fw_version),
2473                             "%2d.%2d-%d",
2474                             fw.invm_major, fw.invm_minor, fw.invm_img_type);
2475                         break;
2476                 }
2477                 /* fall through */
2478         default:
2479                 /* if option rom is valid, display its version too*/
2480                 if (fw.or_valid) {
2481                         snprintf(adapter->fw_version,
2482                             sizeof(adapter->fw_version),
2483                             "%d.%d, 0x%08x, %d.%d.%d",
2484                             fw.eep_major, fw.eep_minor, fw.etrack_id,
2485                             fw.or_major, fw.or_build, fw.or_patch);
2486                 /* no option rom */
2487                 } else {
2488                         if (fw.etrack_id != 0X0000) {
2489                         snprintf(adapter->fw_version,
2490                             sizeof(adapter->fw_version),
2491                             "%d.%d, 0x%08x",
2492                             fw.eep_major, fw.eep_minor, fw.etrack_id);
2493                         } else {
2494                         snprintf(adapter->fw_version,
2495                             sizeof(adapter->fw_version),
2496                             "%d.%d.%d",
2497                             fw.eep_major, fw.eep_minor, fw.eep_build);
2498                         }
2499                 }
2500                 break;
2501         }
2502
2503         return;
2504 }
2505
2506 /**
2507  * igb_init_mas - init Media Autosense feature if enabled in the NVM
2508  *
2509  * @adapter: adapter struct
2510  **/
2511 static void igb_init_mas(struct igb_adapter *adapter)
2512 {
2513         struct e1000_hw *hw = &adapter->hw;
2514         u16 eeprom_data;
2515
2516         e1000_read_nvm(hw, NVM_COMPAT, 1, &eeprom_data);
2517         switch (hw->bus.func) {
2518         case E1000_FUNC_0:
2519                 if (eeprom_data & IGB_MAS_ENABLE_0)
2520                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2521                 break;
2522         case E1000_FUNC_1:
2523                 if (eeprom_data & IGB_MAS_ENABLE_1)
2524                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2525                 break;
2526         case E1000_FUNC_2:
2527                 if (eeprom_data & IGB_MAS_ENABLE_2)
2528                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2529                 break;
2530         case E1000_FUNC_3:
2531                 if (eeprom_data & IGB_MAS_ENABLE_3)
2532                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2533                 break;
2534         default:
2535                 /* Shouldn't get here */
2536                 dev_err(pci_dev_to_dev(adapter->pdev),
2537                         "%s:AMS: Invalid port configuration, returning\n",
2538                         adapter->netdev->name);
2539                 break;
2540         }
2541 }
2542
2543 /**
2544  * igb_probe - Device Initialization Routine
2545  * @pdev: PCI device information struct
2546  * @ent: entry in igb_pci_tbl
2547  *
2548  * Returns 0 on success, negative on failure
2549  *
2550  * igb_probe initializes an adapter identified by a pci_dev structure.
2551  * The OS initialization, configuring of the adapter private structure,
2552  * and a hardware reset occur.
2553  **/
2554 static int __devinit igb_probe(struct pci_dev *pdev,
2555                                const struct pci_device_id *ent)
2556 {
2557         struct net_device *netdev;
2558         struct igb_adapter *adapter;
2559         struct e1000_hw *hw;
2560         u16 eeprom_data = 0;
2561         u8 pba_str[E1000_PBANUM_LENGTH];
2562         s32 ret_val;
2563         static int global_quad_port_a; /* global quad port a indication */
2564         int i, err, pci_using_dac;
2565         static int cards_found;
2566
2567         err = pci_enable_device_mem(pdev);
2568         if (err)
2569                 return err;
2570
2571         pci_using_dac = 0;
2572         err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
2573         if (!err) {
2574                 err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
2575                 if (!err)
2576                         pci_using_dac = 1;
2577         } else {
2578                 err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
2579                 if (err) {
2580                         err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
2581                         if (err) {
2582                                 IGB_ERR("No usable DMA configuration, "
2583                                         "aborting\n");
2584                                 goto err_dma;
2585                         }
2586                 }
2587         }
2588
2589 #ifndef HAVE_ASPM_QUIRKS
2590         /* 82575 requires that the pci-e link partner disable the L0s state */
2591         switch (pdev->device) {
2592         case E1000_DEV_ID_82575EB_COPPER:
2593         case E1000_DEV_ID_82575EB_FIBER_SERDES:
2594         case E1000_DEV_ID_82575GB_QUAD_COPPER:
2595                 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S);
2596         default:
2597                 break;
2598         }
2599
2600 #endif /* HAVE_ASPM_QUIRKS */
2601         err = pci_request_selected_regions(pdev,
2602                                            pci_select_bars(pdev,
2603                                                            IORESOURCE_MEM),
2604                                            igb_driver_name);
2605         if (err)
2606                 goto err_pci_reg;
2607
2608         pci_enable_pcie_error_reporting(pdev);
2609
2610         pci_set_master(pdev);
2611
2612         err = -ENOMEM;
2613 #ifdef HAVE_TX_MQ
2614         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
2615                                    IGB_MAX_TX_QUEUES);
2616 #else
2617         netdev = alloc_etherdev(sizeof(struct igb_adapter));
2618 #endif /* HAVE_TX_MQ */
2619         if (!netdev)
2620                 goto err_alloc_etherdev;
2621
2622         SET_MODULE_OWNER(netdev);
2623         SET_NETDEV_DEV(netdev, &pdev->dev);
2624
2625         pci_set_drvdata(pdev, netdev);
2626         adapter = netdev_priv(netdev);
2627         adapter->netdev = netdev;
2628         adapter->pdev = pdev;
2629         hw = &adapter->hw;
2630         hw->back = adapter;
2631         adapter->port_num = hw->bus.func;
2632         adapter->msg_enable = (1 << debug) - 1;
2633
2634 #ifdef HAVE_PCI_ERS
2635         err = pci_save_state(pdev);
2636         if (err)
2637                 goto err_ioremap;
2638 #endif
2639         err = -EIO;
2640         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
2641                               pci_resource_len(pdev, 0));
2642         if (!hw->hw_addr)
2643                 goto err_ioremap;
2644
2645 #ifdef HAVE_NET_DEVICE_OPS
2646         netdev->netdev_ops = &igb_netdev_ops;
2647 #else /* HAVE_NET_DEVICE_OPS */
2648         netdev->open = &igb_open;
2649         netdev->stop = &igb_close;
2650         netdev->get_stats = &igb_get_stats;
2651 #ifdef HAVE_SET_RX_MODE
2652         netdev->set_rx_mode = &igb_set_rx_mode;
2653 #endif
2654         netdev->set_multicast_list = &igb_set_rx_mode;
2655         netdev->set_mac_address = &igb_set_mac;
2656         netdev->change_mtu = &igb_change_mtu;
2657         netdev->do_ioctl = &igb_ioctl;
2658 #ifdef HAVE_TX_TIMEOUT
2659         netdev->tx_timeout = &igb_tx_timeout;
2660 #endif
2661         netdev->vlan_rx_register = igb_vlan_mode;
2662         netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid;
2663         netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid;
2664 #ifdef CONFIG_NET_POLL_CONTROLLER
2665         netdev->poll_controller = igb_netpoll;
2666 #endif
2667         netdev->hard_start_xmit = &igb_xmit_frame;
2668 #endif /* HAVE_NET_DEVICE_OPS */
2669         igb_set_ethtool_ops(netdev);
2670 #ifdef HAVE_TX_TIMEOUT
2671         netdev->watchdog_timeo = 5 * HZ;
2672 #endif
2673
2674         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
2675
2676         adapter->bd_number = cards_found;
2677
2678         /* setup the private structure */
2679         err = igb_sw_init(adapter);
2680         if (err)
2681                 goto err_sw_init;
2682
2683         e1000_get_bus_info(hw);
2684
2685         hw->phy.autoneg_wait_to_complete = FALSE;
2686         hw->mac.adaptive_ifs = FALSE;
2687
2688         /* Copper options */
2689         if (hw->phy.media_type == e1000_media_type_copper) {
2690                 hw->phy.mdix = AUTO_ALL_MODES;
2691                 hw->phy.disable_polarity_correction = FALSE;
2692                 hw->phy.ms_type = e1000_ms_hw_default;
2693         }
2694
2695         if (e1000_check_reset_block(hw))
2696                 dev_info(pci_dev_to_dev(pdev),
2697                         "PHY reset is blocked due to SOL/IDER session.\n");
2698
2699         /*
2700          * features is initialized to 0 in allocation, it might have bits
2701          * set by igb_sw_init so we should use an or instead of an
2702          * assignment.
2703          */
2704         netdev->features |= NETIF_F_SG |
2705                             NETIF_F_IP_CSUM |
2706 #ifdef NETIF_F_IPV6_CSUM
2707                             NETIF_F_IPV6_CSUM |
2708 #endif
2709 #ifdef NETIF_F_TSO
2710                             NETIF_F_TSO |
2711 #ifdef NETIF_F_TSO6
2712                             NETIF_F_TSO6 |
2713 #endif
2714 #endif /* NETIF_F_TSO */
2715 #ifdef NETIF_F_RXHASH
2716                             NETIF_F_RXHASH |
2717 #endif
2718                             NETIF_F_RXCSUM |
2719 #ifdef NETIF_F_HW_VLAN_CTAG_RX
2720                             NETIF_F_HW_VLAN_CTAG_RX |
2721                             NETIF_F_HW_VLAN_CTAG_TX;
2722 #else
2723                             NETIF_F_HW_VLAN_RX |
2724                             NETIF_F_HW_VLAN_TX;
2725 #endif
2726
2727         if (hw->mac.type >= e1000_82576)
2728                 netdev->features |= NETIF_F_SCTP_CSUM;
2729
2730 #ifdef HAVE_NDO_SET_FEATURES
2731         /* copy netdev features into list of user selectable features */
2732         netdev->hw_features |= netdev->features;
2733 #ifndef IGB_NO_LRO
2734
2735         /* give us the option of enabling LRO later */
2736         netdev->hw_features |= NETIF_F_LRO;
2737 #endif
2738 #else
2739 #ifdef NETIF_F_GRO
2740
2741         /* this is only needed on kernels prior to 2.6.39 */
2742         netdev->features |= NETIF_F_GRO;
2743 #endif
2744 #endif
2745
2746         /* set this bit last since it cannot be part of hw_features */
2747 #ifdef NETIF_F_HW_VLAN_CTAG_FILTER
2748         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
2749 #else
2750         netdev->features |= NETIF_F_HW_VLAN_FILTER;
2751 #endif
2752
2753 #ifdef HAVE_NETDEV_VLAN_FEATURES
2754         netdev->vlan_features |= NETIF_F_TSO |
2755                                  NETIF_F_TSO6 |
2756                                  NETIF_F_IP_CSUM |
2757                                  NETIF_F_IPV6_CSUM |
2758                                  NETIF_F_SG;
2759
2760 #endif
2761         if (pci_using_dac)
2762                 netdev->features |= NETIF_F_HIGHDMA;
2763
2764         adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
2765 #ifdef DEBUG
2766         if (adapter->dmac != IGB_DMAC_DISABLE)
2767                 printk("%s: DMA Coalescing is enabled..\n", netdev->name);
2768 #endif
2769
2770         /* before reading the NVM, reset the controller to put the device in a
2771          * known good starting state */
2772         e1000_reset_hw(hw);
2773
2774         /* make sure the NVM is good */
2775         if (e1000_validate_nvm_checksum(hw) < 0) {
2776                 dev_err(pci_dev_to_dev(pdev), "The NVM Checksum Is Not"
2777                         " Valid\n");
2778                 err = -EIO;
2779                 goto err_eeprom;
2780         }
2781
2782         /* copy the MAC address out of the NVM */
2783         if (e1000_read_mac_addr(hw))
2784                 dev_err(pci_dev_to_dev(pdev), "NVM Read Error\n");
2785         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
2786 #ifdef ETHTOOL_GPERMADDR
2787         memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
2788
2789         if (!is_valid_ether_addr(netdev->perm_addr)) {
2790 #else
2791         if (!is_valid_ether_addr(netdev->dev_addr)) {
2792 #endif
2793                 dev_err(pci_dev_to_dev(pdev), "Invalid MAC Address\n");
2794                 err = -EIO;
2795                 goto err_eeprom;
2796         }
2797
2798         memcpy(&adapter->mac_table[0].addr, hw->mac.addr, netdev->addr_len);
2799         adapter->mac_table[0].queue = adapter->vfs_allocated_count;
2800         adapter->mac_table[0].state = (IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE);
2801         igb_rar_set(adapter, 0);
2802
2803         /* get firmware version for ethtool -i */
2804         igb_set_fw_version(adapter);
2805
2806         /* Check if Media Autosense is enabled */
2807         if (hw->mac.type == e1000_82580)
2808                 igb_init_mas(adapter);
2809         setup_timer(&adapter->watchdog_timer, &igb_watchdog,
2810                     (unsigned long) adapter);
2811         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
2812                 setup_timer(&adapter->dma_err_timer, &igb_dma_err_timer,
2813                             (unsigned long) adapter);
2814         setup_timer(&adapter->phy_info_timer, &igb_update_phy_info,
2815                     (unsigned long) adapter);
2816
2817         INIT_WORK(&adapter->reset_task, igb_reset_task);
2818         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
2819         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
2820                 INIT_WORK(&adapter->dma_err_task, igb_dma_err_task);
2821
2822         /* Initialize link properties that are user-changeable */
2823         adapter->fc_autoneg = true;
2824         hw->mac.autoneg = true;
2825         hw->phy.autoneg_advertised = 0x2f;
2826
2827         hw->fc.requested_mode = e1000_fc_default;
2828         hw->fc.current_mode = e1000_fc_default;
2829
2830         e1000_validate_mdi_setting(hw);
2831
2832         /* By default, support wake on port A */
2833         if (hw->bus.func == 0)
2834                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2835
2836         /* Check the NVM for wake support for non-port A ports */
2837         if (hw->mac.type >= e1000_82580)
2838                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
2839                                  NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
2840                                  &eeprom_data);
2841         else if (hw->bus.func == 1)
2842                 e1000_read_nvm(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
2843
2844         if (eeprom_data & IGB_EEPROM_APME)
2845                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2846
2847         /* now that we have the eeprom settings, apply the special cases where
2848          * the eeprom may be wrong or the board simply won't support wake on
2849          * lan on a particular port */
2850         switch (pdev->device) {
2851         case E1000_DEV_ID_82575GB_QUAD_COPPER:
2852                 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2853                 break;
2854         case E1000_DEV_ID_82575EB_FIBER_SERDES:
2855         case E1000_DEV_ID_82576_FIBER:
2856         case E1000_DEV_ID_82576_SERDES:
2857                 /* Wake events only supported on port A for dual fiber
2858                  * regardless of eeprom setting */
2859                 if (E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_FUNC_1)
2860                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2861                 break;
2862         case E1000_DEV_ID_82576_QUAD_COPPER:
2863         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
2864                 /* if quad port adapter, disable WoL on all but port A */
2865                 if (global_quad_port_a != 0)
2866                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2867                 else
2868                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
2869                 /* Reset for multiple quad port adapters */
2870                 if (++global_quad_port_a == 4)
2871                         global_quad_port_a = 0;
2872                 break;
2873         default:
2874                 /* If the device can't wake, don't set software support */
2875                 if (!device_can_wakeup(&adapter->pdev->dev))
2876                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2877                 break;
2878         }
2879
2880         /* initialize the wol settings based on the eeprom settings */
2881         if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
2882                 adapter->wol |= E1000_WUFC_MAG;
2883
2884         /* Some vendors want WoL disabled by default, but still supported */
2885         if ((hw->mac.type == e1000_i350) &&
2886             (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
2887                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2888                 adapter->wol = 0;
2889         }
2890
2891         device_set_wakeup_enable(pci_dev_to_dev(adapter->pdev),
2892                                  adapter->flags & IGB_FLAG_WOL_SUPPORTED);
2893
2894         /* reset the hardware with the new settings */
2895         igb_reset(adapter);
2896         adapter->devrc = 0;
2897
2898 #ifdef HAVE_I2C_SUPPORT
2899         /* Init the I2C interface */
2900         err = igb_init_i2c(adapter);
2901         if (err) {
2902                 dev_err(&pdev->dev, "failed to init i2c interface\n");
2903                 goto err_eeprom;
2904         }
2905 #endif /* HAVE_I2C_SUPPORT */
2906
2907         /* let the f/w know that the h/w is now under the control of the
2908          * driver. */
2909         igb_get_hw_control(adapter);
2910
2911         strncpy(netdev->name, "eth%d", IFNAMSIZ);
2912         err = register_netdev(netdev);
2913         if (err)
2914                 goto err_register;
2915
2916 #ifdef CONFIG_IGB_VMDQ_NETDEV
2917         err = igb_init_vmdq_netdevs(adapter);
2918         if (err)
2919                 goto err_register;
2920 #endif
2921         /* carrier off reporting is important to ethtool even BEFORE open */
2922         netif_carrier_off(netdev);
2923
2924 #ifdef IGB_DCA
2925         if (dca_add_requester(&pdev->dev) == E1000_SUCCESS) {
2926                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
2927                 dev_info(pci_dev_to_dev(pdev), "DCA enabled\n");
2928                 igb_setup_dca(adapter);
2929         }
2930
2931 #endif
2932 #ifdef HAVE_PTP_1588_CLOCK
2933         /* do hw tstamp init after resetting */
2934         igb_ptp_init(adapter);
2935 #endif /* HAVE_PTP_1588_CLOCK */
2936
2937         dev_info(pci_dev_to_dev(pdev), "Intel(R) Gigabit Ethernet Network Connection\n");
2938         /* print bus type/speed/width info */
2939         dev_info(pci_dev_to_dev(pdev), "%s: (PCIe:%s:%s) ",
2940                  netdev->name,
2941                  ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5GT/s" :
2942                   (hw->bus.speed == e1000_bus_speed_5000) ? "5.0GT/s" :
2943                   (hw->mac.type == e1000_i354) ? "integrated" :
2944                                                             "unknown"),
2945                  ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
2946                   (hw->bus.width == e1000_bus_width_pcie_x2) ? "Width x2" :
2947                   (hw->bus.width == e1000_bus_width_pcie_x1) ? "Width x1" :
2948                   (hw->mac.type == e1000_i354) ? "integrated" :
2949                    "unknown"));
2950         dev_info(pci_dev_to_dev(pdev), "%s: MAC: ", netdev->name);
2951         for (i = 0; i < 6; i++)
2952                 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
2953
2954         ret_val = e1000_read_pba_string(hw, pba_str, E1000_PBANUM_LENGTH);
2955         if (ret_val)
2956                 strncpy(pba_str, "Unknown", sizeof(pba_str) - 1);
2957         dev_info(pci_dev_to_dev(pdev), "%s: PBA No: %s\n", netdev->name,
2958                  pba_str);
2959
2960
2961         /* Initialize the thermal sensor on i350 devices. */
2962         if (hw->mac.type == e1000_i350) {
2963                 if (hw->bus.func == 0) {
2964                         u16 ets_word;
2965
2966                         /*
2967                          * Read the NVM to determine if this i350 device
2968                          * supports an external thermal sensor.
2969                          */
2970                         e1000_read_nvm(hw, NVM_ETS_CFG, 1, &ets_word);
2971                         if (ets_word != 0x0000 && ets_word != 0xFFFF)
2972                                 adapter->ets = true;
2973                         else
2974                                 adapter->ets = false;
2975                 }
2976 #ifdef IGB_HWMON
2977
2978                 igb_sysfs_init(adapter);
2979 #else
2980 #ifdef IGB_PROCFS
2981
2982                 igb_procfs_init(adapter);
2983 #endif /* IGB_PROCFS */
2984 #endif /* IGB_HWMON */
2985         } else {
2986                 adapter->ets = false;
2987         }
2988
2989         if (hw->phy.media_type == e1000_media_type_copper) {
2990                 switch (hw->mac.type) {
2991                 case e1000_i350:
2992                 case e1000_i210:
2993                 case e1000_i211:
2994                         /* Enable EEE for internal copper PHY devices */
2995                         err = e1000_set_eee_i350(hw);
2996                         if ((!err) &&
2997                             (adapter->flags & IGB_FLAG_EEE))
2998                                 adapter->eee_advert =
2999                                         MDIO_EEE_100TX | MDIO_EEE_1000T;
3000                         break;
3001                 case e1000_i354:
3002                         if ((E1000_READ_REG(hw, E1000_CTRL_EXT)) &
3003                             (E1000_CTRL_EXT_LINK_MODE_SGMII)) {
3004                                 err = e1000_set_eee_i354(hw);
3005                                 if ((!err) &&
3006                                     (adapter->flags & IGB_FLAG_EEE))
3007                                         adapter->eee_advert =
3008                                            MDIO_EEE_100TX | MDIO_EEE_1000T;
3009                         }
3010                         break;
3011                 default:
3012                         break;
3013                 }
3014         }
3015
3016         /* send driver version info to firmware */
3017         if (hw->mac.type >= e1000_i350)
3018                 igb_init_fw(adapter);
3019
3020 #ifndef IGB_NO_LRO
3021         if (netdev->features & NETIF_F_LRO)
3022                 dev_info(pci_dev_to_dev(pdev), "Internal LRO is enabled \n");
3023         else
3024                 dev_info(pci_dev_to_dev(pdev), "LRO is disabled \n");
3025 #endif
3026         dev_info(pci_dev_to_dev(pdev),
3027                  "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
3028                  adapter->msix_entries ? "MSI-X" :
3029                  (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
3030                  adapter->num_rx_queues, adapter->num_tx_queues);
3031
3032         cards_found++;
3033
3034         pm_runtime_put_noidle(&pdev->dev);
3035         return 0;
3036
3037 err_register:
3038         igb_release_hw_control(adapter);
3039 #ifdef HAVE_I2C_SUPPORT
3040         memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
3041 #endif /* HAVE_I2C_SUPPORT */
3042 err_eeprom:
3043         if (!e1000_check_reset_block(hw))
3044                 e1000_phy_hw_reset(hw);
3045
3046         if (hw->flash_address)
3047                 iounmap(hw->flash_address);
3048 err_sw_init:
3049         igb_clear_interrupt_scheme(adapter);
3050         igb_reset_sriov_capability(adapter);
3051         iounmap(hw->hw_addr);
3052 err_ioremap:
3053         free_netdev(netdev);
3054 err_alloc_etherdev:
3055         pci_release_selected_regions(pdev,
3056                                      pci_select_bars(pdev, IORESOURCE_MEM));
3057 err_pci_reg:
3058 err_dma:
3059         pci_disable_device(pdev);
3060         return err;
3061 }
3062 #ifdef HAVE_I2C_SUPPORT
3063 /*
3064  *  igb_remove_i2c - Cleanup  I2C interface
3065  *  @adapter: pointer to adapter structure
3066  *
3067  */
3068 static void igb_remove_i2c(struct igb_adapter *adapter)
3069 {
3070
3071         /* free the adapter bus structure */
3072         i2c_del_adapter(&adapter->i2c_adap);
3073 }
3074 #endif /* HAVE_I2C_SUPPORT */
3075
3076 /**
3077  * igb_remove - Device Removal Routine
3078  * @pdev: PCI device information struct
3079  *
3080  * igb_remove is called by the PCI subsystem to alert the driver
3081  * that it should release a PCI device.  The could be caused by a
3082  * Hot-Plug event, or because the driver is going to be removed from
3083  * memory.
3084  **/
3085 static void __devexit igb_remove(struct pci_dev *pdev)
3086 {
3087         struct net_device *netdev = pci_get_drvdata(pdev);
3088         struct igb_adapter *adapter = netdev_priv(netdev);
3089         struct e1000_hw *hw = &adapter->hw;
3090
3091         pm_runtime_get_noresume(&pdev->dev);
3092 #ifdef HAVE_I2C_SUPPORT
3093         igb_remove_i2c(adapter);
3094 #endif /* HAVE_I2C_SUPPORT */
3095 #ifdef HAVE_PTP_1588_CLOCK
3096         igb_ptp_stop(adapter);
3097 #endif /* HAVE_PTP_1588_CLOCK */
3098
3099         /* flush_scheduled work may reschedule our watchdog task, so
3100          * explicitly disable watchdog tasks from being rescheduled  */
3101         set_bit(__IGB_DOWN, &adapter->state);
3102         del_timer_sync(&adapter->watchdog_timer);
3103         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
3104                 del_timer_sync(&adapter->dma_err_timer);
3105         del_timer_sync(&adapter->phy_info_timer);
3106
3107         flush_scheduled_work();
3108
3109 #ifdef IGB_DCA
3110         if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
3111                 dev_info(pci_dev_to_dev(pdev), "DCA disabled\n");
3112                 dca_remove_requester(&pdev->dev);
3113                 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
3114                 E1000_WRITE_REG(hw, E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_DISABLE);
3115         }
3116 #endif
3117
3118         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
3119          * would have already happened in close and is redundant. */
3120         igb_release_hw_control(adapter);
3121
3122         unregister_netdev(netdev);
3123 #ifdef CONFIG_IGB_VMDQ_NETDEV
3124         igb_remove_vmdq_netdevs(adapter);
3125 #endif
3126
3127         igb_clear_interrupt_scheme(adapter);
3128         igb_reset_sriov_capability(adapter);
3129
3130         iounmap(hw->hw_addr);
3131         if (hw->flash_address)
3132                 iounmap(hw->flash_address);
3133         pci_release_selected_regions(pdev,
3134                                      pci_select_bars(pdev, IORESOURCE_MEM));
3135
3136 #ifdef IGB_HWMON
3137         igb_sysfs_exit(adapter);
3138 #else
3139 #ifdef IGB_PROCFS
3140         igb_procfs_exit(adapter);
3141 #endif /* IGB_PROCFS */
3142 #endif /* IGB_HWMON */
3143         kfree(adapter->mac_table);
3144         kfree(adapter->shadow_vfta);
3145         free_netdev(netdev);
3146
3147         pci_disable_pcie_error_reporting(pdev);
3148
3149         pci_disable_device(pdev);
3150 }
3151
3152 /**
3153  * igb_sw_init - Initialize general software structures (struct igb_adapter)
3154  * @adapter: board private structure to initialize
3155  *
3156  * igb_sw_init initializes the Adapter private data structure.
3157  * Fields are initialized based on PCI device information and
3158  * OS network device settings (MTU size).
3159  **/
3160 static int igb_sw_init(struct igb_adapter *adapter)
3161 {
3162         struct e1000_hw *hw = &adapter->hw;
3163         struct net_device *netdev = adapter->netdev;
3164         struct pci_dev *pdev = adapter->pdev;
3165
3166         /* PCI config space info */
3167
3168         hw->vendor_id = pdev->vendor;
3169         hw->device_id = pdev->device;
3170         hw->subsystem_vendor_id = pdev->subsystem_vendor;
3171         hw->subsystem_device_id = pdev->subsystem_device;
3172
3173         pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
3174
3175         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
3176
3177         /* set default ring sizes */
3178         adapter->tx_ring_count = IGB_DEFAULT_TXD;
3179         adapter->rx_ring_count = IGB_DEFAULT_RXD;
3180
3181         /* set default work limits */
3182         adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
3183
3184         adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN +
3185                                               VLAN_HLEN;
3186
3187         /* Initialize the hardware-specific values */
3188         if (e1000_setup_init_funcs(hw, TRUE)) {
3189                 dev_err(pci_dev_to_dev(pdev), "Hardware Initialization Failure\n");
3190                 return -EIO;
3191         }
3192
3193         adapter->mac_table = kzalloc(sizeof(struct igb_mac_addr) *
3194                                      hw->mac.rar_entry_count,
3195                                      GFP_ATOMIC);
3196
3197         /* Setup and initialize a copy of the hw vlan table array */
3198         adapter->shadow_vfta = kzalloc(sizeof(u32) * E1000_VFTA_ENTRIES,
3199                                        GFP_ATOMIC);
3200 #ifdef NO_KNI
3201         /* These calls may decrease the number of queues */
3202         if (hw->mac.type < e1000_i210) {
3203                 igb_set_sriov_capability(adapter);
3204         }
3205
3206         if (igb_init_interrupt_scheme(adapter, true)) {
3207                 dev_err(pci_dev_to_dev(pdev), "Unable to allocate memory for queues\n");
3208                 return -ENOMEM;
3209         }
3210
3211         /* Explicitly disable IRQ since the NIC can be in any state. */
3212         igb_irq_disable(adapter);
3213
3214         set_bit(__IGB_DOWN, &adapter->state);
3215 #endif
3216         return 0;
3217 }
3218
3219 /**
3220  * igb_open - Called when a network interface is made active
3221  * @netdev: network interface device structure
3222  *
3223  * Returns 0 on success, negative value on failure
3224  *
3225  * The open entry point is called when a network interface is made
3226  * active by the system (IFF_UP).  At this point all resources needed
3227  * for transmit and receive operations are allocated, the interrupt
3228  * handler is registered with the OS, the watchdog timer is started,
3229  * and the stack is notified that the interface is ready.
3230  **/
3231 static int __igb_open(struct net_device *netdev, bool resuming)
3232 {
3233         struct igb_adapter *adapter = netdev_priv(netdev);
3234         struct e1000_hw *hw = &adapter->hw;
3235 #ifdef CONFIG_PM_RUNTIME
3236         struct pci_dev *pdev = adapter->pdev;
3237 #endif /* CONFIG_PM_RUNTIME */
3238         int err;
3239         int i;
3240
3241         /* disallow open during test */
3242         if (test_bit(__IGB_TESTING, &adapter->state)) {
3243                 WARN_ON(resuming);
3244                 return -EBUSY;
3245         }
3246
3247 #ifdef CONFIG_PM_RUNTIME
3248         if (!resuming)
3249                 pm_runtime_get_sync(&pdev->dev);
3250 #endif /* CONFIG_PM_RUNTIME */
3251
3252         netif_carrier_off(netdev);
3253
3254         /* allocate transmit descriptors */
3255         err = igb_setup_all_tx_resources(adapter);
3256         if (err)
3257                 goto err_setup_tx;
3258
3259         /* allocate receive descriptors */
3260         err = igb_setup_all_rx_resources(adapter);
3261         if (err)
3262                 goto err_setup_rx;
3263
3264         igb_power_up_link(adapter);
3265
3266         /* before we allocate an interrupt, we must be ready to handle it.
3267          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3268          * as soon as we call pci_request_irq, so we have to setup our
3269          * clean_rx handler before we do so.  */
3270         igb_configure(adapter);
3271
3272         err = igb_request_irq(adapter);
3273         if (err)
3274                 goto err_req_irq;
3275
3276         /* Notify the stack of the actual queue counts. */
3277         netif_set_real_num_tx_queues(netdev,
3278                                      adapter->vmdq_pools ? 1 :
3279                                      adapter->num_tx_queues);
3280
3281         err = netif_set_real_num_rx_queues(netdev,
3282                                            adapter->vmdq_pools ? 1 :
3283                                            adapter->num_rx_queues);
3284         if (err)
3285                 goto err_set_queues;
3286
3287         /* From here on the code is the same as igb_up() */
3288         clear_bit(__IGB_DOWN, &adapter->state);
3289
3290         for (i = 0; i < adapter->num_q_vectors; i++)
3291                 napi_enable(&(adapter->q_vector[i]->napi));
3292         igb_configure_lli(adapter);
3293
3294         /* Clear any pending interrupts. */
3295         E1000_READ_REG(hw, E1000_ICR);
3296
3297         igb_irq_enable(adapter);
3298
3299         /* notify VFs that reset has been completed */
3300         if (adapter->vfs_allocated_count) {
3301                 u32 reg_data = E1000_READ_REG(hw, E1000_CTRL_EXT);
3302                 reg_data |= E1000_CTRL_EXT_PFRSTD;
3303                 E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg_data);
3304         }
3305
3306         netif_tx_start_all_queues(netdev);
3307
3308         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
3309                 schedule_work(&adapter->dma_err_task);
3310
3311         /* start the watchdog. */
3312         hw->mac.get_link_status = 1;
3313         schedule_work(&adapter->watchdog_task);
3314
3315         return E1000_SUCCESS;
3316
3317 err_set_queues:
3318         igb_free_irq(adapter);
3319 err_req_irq:
3320         igb_release_hw_control(adapter);
3321         igb_power_down_link(adapter);
3322         igb_free_all_rx_resources(adapter);
3323 err_setup_rx:
3324         igb_free_all_tx_resources(adapter);
3325 err_setup_tx:
3326         igb_reset(adapter);
3327
3328 #ifdef CONFIG_PM_RUNTIME
3329         if (!resuming)
3330                 pm_runtime_put(&pdev->dev);
3331 #endif /* CONFIG_PM_RUNTIME */
3332
3333         return err;
3334 }
3335
3336 static int igb_open(struct net_device *netdev)
3337 {
3338         return __igb_open(netdev, false);
3339 }
3340
3341 /**
3342  * igb_close - Disables a network interface
3343  * @netdev: network interface device structure
3344  *
3345  * Returns 0, this is not allowed to fail
3346  *
3347  * The close entry point is called when an interface is de-activated
3348  * by the OS.  The hardware is still under the driver's control, but
3349  * needs to be disabled.  A global MAC reset is issued to stop the
3350  * hardware, and all transmit and receive resources are freed.
3351  **/
3352 static int __igb_close(struct net_device *netdev, bool suspending)
3353 {
3354         struct igb_adapter *adapter = netdev_priv(netdev);
3355 #ifdef CONFIG_PM_RUNTIME
3356         struct pci_dev *pdev = adapter->pdev;
3357 #endif /* CONFIG_PM_RUNTIME */
3358
3359         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
3360
3361 #ifdef CONFIG_PM_RUNTIME
3362         if (!suspending)
3363                 pm_runtime_get_sync(&pdev->dev);
3364 #endif /* CONFIG_PM_RUNTIME */
3365
3366         igb_down(adapter);
3367
3368         igb_release_hw_control(adapter);
3369
3370         igb_free_irq(adapter);
3371
3372         igb_free_all_tx_resources(adapter);
3373         igb_free_all_rx_resources(adapter);
3374
3375 #ifdef CONFIG_PM_RUNTIME
3376         if (!suspending)
3377                 pm_runtime_put_sync(&pdev->dev);
3378 #endif /* CONFIG_PM_RUNTIME */
3379
3380         return 0;
3381 }
3382
3383 static int igb_close(struct net_device *netdev)
3384 {
3385         return __igb_close(netdev, false);
3386 }
3387
3388 /**
3389  * igb_setup_tx_resources - allocate Tx resources (Descriptors)
3390  * @tx_ring: tx descriptor ring (for a specific queue) to setup
3391  *
3392  * Return 0 on success, negative on failure
3393  **/
3394 int igb_setup_tx_resources(struct igb_ring *tx_ring)
3395 {
3396         struct device *dev = tx_ring->dev;
3397         int size;
3398
3399         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3400         tx_ring->tx_buffer_info = vzalloc(size);
3401         if (!tx_ring->tx_buffer_info)
3402                 goto err;
3403
3404         /* round up to nearest 4K */
3405         tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
3406         tx_ring->size = ALIGN(tx_ring->size, 4096);
3407
3408         tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
3409                                            &tx_ring->dma, GFP_KERNEL);
3410
3411         if (!tx_ring->desc)
3412                 goto err;
3413
3414         tx_ring->next_to_use = 0;
3415         tx_ring->next_to_clean = 0;
3416
3417         return 0;
3418
3419 err:
3420         vfree(tx_ring->tx_buffer_info);
3421         dev_err(dev,
3422                 "Unable to allocate memory for the transmit descriptor ring\n");
3423         return -ENOMEM;
3424 }
3425
3426 /**
3427  * igb_setup_all_tx_resources - wrapper to allocate Tx resources
3428  *                                (Descriptors) for all queues
3429  * @adapter: board private structure
3430  *
3431  * Return 0 on success, negative on failure
3432  **/
3433 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
3434 {
3435         struct pci_dev *pdev = adapter->pdev;
3436         int i, err = 0;
3437
3438         for (i = 0; i < adapter->num_tx_queues; i++) {
3439                 err = igb_setup_tx_resources(adapter->tx_ring[i]);
3440                 if (err) {
3441                         dev_err(pci_dev_to_dev(pdev),
3442                                 "Allocation for Tx Queue %u failed\n", i);
3443                         for (i--; i >= 0; i--)
3444                                 igb_free_tx_resources(adapter->tx_ring[i]);
3445                         break;
3446                 }
3447         }
3448
3449         return err;
3450 }
3451
3452 /**
3453  * igb_setup_tctl - configure the transmit control registers
3454  * @adapter: Board private structure
3455  **/
3456 void igb_setup_tctl(struct igb_adapter *adapter)
3457 {
3458         struct e1000_hw *hw = &adapter->hw;
3459         u32 tctl;
3460
3461         /* disable queue 0 which is enabled by default on 82575 and 82576 */
3462         E1000_WRITE_REG(hw, E1000_TXDCTL(0), 0);
3463
3464         /* Program the Transmit Control Register */
3465         tctl = E1000_READ_REG(hw, E1000_TCTL);
3466         tctl &= ~E1000_TCTL_CT;
3467         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
3468                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
3469
3470         e1000_config_collision_dist(hw);
3471
3472         /* Enable transmits */
3473         tctl |= E1000_TCTL_EN;
3474
3475         E1000_WRITE_REG(hw, E1000_TCTL, tctl);
3476 }
3477
3478 static u32 igb_tx_wthresh(struct igb_adapter *adapter)
3479 {
3480         struct e1000_hw *hw = &adapter->hw;
3481         switch (hw->mac.type) {
3482         case e1000_i354:
3483                 return 4;
3484         case e1000_82576:
3485                 if (adapter->msix_entries)
3486                         return 1;
3487         default:
3488                 break;
3489         }
3490
3491         return 16;
3492 }
3493
3494 /**
3495  * igb_configure_tx_ring - Configure transmit ring after Reset
3496  * @adapter: board private structure
3497  * @ring: tx ring to configure
3498  *
3499  * Configure a transmit ring after a reset.
3500  **/
3501 void igb_configure_tx_ring(struct igb_adapter *adapter,
3502                            struct igb_ring *ring)
3503 {
3504         struct e1000_hw *hw = &adapter->hw;
3505         u32 txdctl = 0;
3506         u64 tdba = ring->dma;
3507         int reg_idx = ring->reg_idx;
3508
3509         /* disable the queue */
3510         E1000_WRITE_REG(hw, E1000_TXDCTL(reg_idx), 0);
3511         E1000_WRITE_FLUSH(hw);
3512         mdelay(10);
3513
3514         E1000_WRITE_REG(hw, E1000_TDLEN(reg_idx),
3515                         ring->count * sizeof(union e1000_adv_tx_desc));
3516         E1000_WRITE_REG(hw, E1000_TDBAL(reg_idx),
3517                         tdba & 0x00000000ffffffffULL);
3518         E1000_WRITE_REG(hw, E1000_TDBAH(reg_idx), tdba >> 32);
3519
3520         ring->tail = hw->hw_addr + E1000_TDT(reg_idx);
3521         E1000_WRITE_REG(hw, E1000_TDH(reg_idx), 0);
3522         writel(0, ring->tail);
3523
3524         txdctl |= IGB_TX_PTHRESH;
3525         txdctl |= IGB_TX_HTHRESH << 8;
3526         txdctl |= igb_tx_wthresh(adapter) << 16;
3527
3528         txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
3529         E1000_WRITE_REG(hw, E1000_TXDCTL(reg_idx), txdctl);
3530 }
3531
3532 /**
3533  * igb_configure_tx - Configure transmit Unit after Reset
3534  * @adapter: board private structure
3535  *
3536  * Configure the Tx unit of the MAC after a reset.
3537  **/
3538 static void igb_configure_tx(struct igb_adapter *adapter)
3539 {
3540         int i;
3541
3542         for (i = 0; i < adapter->num_tx_queues; i++)
3543                 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
3544 }
3545
3546 /**
3547  * igb_setup_rx_resources - allocate Rx resources (Descriptors)
3548  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
3549  *
3550  * Returns 0 on success, negative on failure
3551  **/
3552 int igb_setup_rx_resources(struct igb_ring *rx_ring)
3553 {
3554         struct device *dev = rx_ring->dev;
3555         int size, desc_len;
3556
3557         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3558         rx_ring->rx_buffer_info = vzalloc(size);
3559         if (!rx_ring->rx_buffer_info)
3560                 goto err;
3561
3562         desc_len = sizeof(union e1000_adv_rx_desc);
3563
3564         /* Round up to nearest 4K */
3565         rx_ring->size = rx_ring->count * desc_len;
3566         rx_ring->size = ALIGN(rx_ring->size, 4096);
3567
3568         rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
3569                                            &rx_ring->dma, GFP_KERNEL);
3570
3571         if (!rx_ring->desc)
3572                 goto err;
3573
3574         rx_ring->next_to_alloc = 0;
3575         rx_ring->next_to_clean = 0;
3576         rx_ring->next_to_use = 0;
3577
3578         return 0;
3579
3580 err:
3581         vfree(rx_ring->rx_buffer_info);
3582         rx_ring->rx_buffer_info = NULL;
3583         dev_err(dev, "Unable to allocate memory for the receive descriptor"
3584                 " ring\n");
3585         return -ENOMEM;
3586 }
3587
3588 /**
3589  * igb_setup_all_rx_resources - wrapper to allocate Rx resources
3590  *                                (Descriptors) for all queues
3591  * @adapter: board private structure
3592  *
3593  * Return 0 on success, negative on failure
3594  **/
3595 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
3596 {
3597         struct pci_dev *pdev = adapter->pdev;
3598         int i, err = 0;
3599
3600         for (i = 0; i < adapter->num_rx_queues; i++) {
3601                 err = igb_setup_rx_resources(adapter->rx_ring[i]);
3602                 if (err) {
3603                         dev_err(pci_dev_to_dev(pdev),
3604                                 "Allocation for Rx Queue %u failed\n", i);
3605                         for (i--; i >= 0; i--)
3606                                 igb_free_rx_resources(adapter->rx_ring[i]);
3607                         break;
3608                 }
3609         }
3610
3611         return err;
3612 }
3613
3614 /**
3615  * igb_setup_mrqc - configure the multiple receive queue control registers
3616  * @adapter: Board private structure
3617  **/
3618 static void igb_setup_mrqc(struct igb_adapter *adapter)
3619 {
3620         struct e1000_hw *hw = &adapter->hw;
3621         u32 mrqc, rxcsum;
3622         u32 j, num_rx_queues, shift = 0, shift2 = 0;
3623         static const u32 rsskey[10] = { 0xDA565A6D, 0xC20E5B25, 0x3D256741,
3624                                         0xB08FA343, 0xCB2BCAD0, 0xB4307BAE,
3625                                         0xA32DCB77, 0x0CF23080, 0x3BB7426A,
3626                                         0xFA01ACBE };
3627
3628         /* Fill out hash function seeds */
3629         for (j = 0; j < 10; j++)
3630                 E1000_WRITE_REG(hw, E1000_RSSRK(j), rsskey[j]);
3631
3632         num_rx_queues = adapter->rss_queues;
3633
3634         /* 82575 and 82576 supports 2 RSS queues for VMDq */
3635         switch (hw->mac.type) {
3636         case e1000_82575:
3637                 if (adapter->vmdq_pools) {
3638                         shift = 2;
3639                         shift2 = 6;
3640                         break;
3641                 }
3642                 shift = 6;
3643                 break;
3644         case e1000_82576:
3645                 /* 82576 supports 2 RSS queues for SR-IOV */
3646                 if (adapter->vfs_allocated_count || adapter->vmdq_pools) {
3647                         shift = 3;
3648                         num_rx_queues = 2;
3649                 }
3650                 break;
3651         default:
3652                 break;
3653         }
3654
3655         /*
3656          * Populate the redirection table 4 entries at a time.  To do this
3657          * we are generating the results for n and n+2 and then interleaving
3658          * those with the results with n+1 and n+3.
3659          */
3660         for (j = 0; j < 32; j++) {
3661                 /* first pass generates n and n+2 */
3662                 u32 base = ((j * 0x00040004) + 0x00020000) * num_rx_queues;
3663                 u32 reta = (base & 0x07800780) >> (7 - shift);
3664
3665                 /* second pass generates n+1 and n+3 */
3666                 base += 0x00010001 * num_rx_queues;
3667                 reta |= (base & 0x07800780) << (1 + shift);
3668
3669                 /* generate 2nd table for 82575 based parts */
3670                 if (shift2)
3671                         reta |= (0x01010101 * num_rx_queues) << shift2;
3672
3673                 E1000_WRITE_REG(hw, E1000_RETA(j), reta);
3674         }
3675
3676         /*
3677          * Disable raw packet checksumming so that RSS hash is placed in
3678          * descriptor on writeback.  No need to enable TCP/UDP/IP checksum
3679          * offloads as they are enabled by default
3680          */
3681         rxcsum = E1000_READ_REG(hw, E1000_RXCSUM);
3682         rxcsum |= E1000_RXCSUM_PCSD;
3683
3684         if (adapter->hw.mac.type >= e1000_82576)
3685                 /* Enable Receive Checksum Offload for SCTP */
3686                 rxcsum |= E1000_RXCSUM_CRCOFL;
3687
3688         /* Don't need to set TUOFL or IPOFL, they default to 1 */
3689         E1000_WRITE_REG(hw, E1000_RXCSUM, rxcsum);
3690
3691         /* Generate RSS hash based on packet types, TCP/UDP
3692          * port numbers and/or IPv4/v6 src and dst addresses
3693          */
3694         mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
3695                E1000_MRQC_RSS_FIELD_IPV4_TCP |
3696                E1000_MRQC_RSS_FIELD_IPV6 |
3697                E1000_MRQC_RSS_FIELD_IPV6_TCP |
3698                E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
3699
3700         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
3701                 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
3702         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
3703                 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
3704
3705         /* If VMDq is enabled then we set the appropriate mode for that, else
3706          * we default to RSS so that an RSS hash is calculated per packet even
3707          * if we are only using one queue */
3708         if (adapter->vfs_allocated_count || adapter->vmdq_pools) {
3709                 if (hw->mac.type > e1000_82575) {
3710                         /* Set the default pool for the PF's first queue */
3711                         u32 vtctl = E1000_READ_REG(hw, E1000_VT_CTL);
3712                         vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
3713                                    E1000_VT_CTL_DISABLE_DEF_POOL);
3714                         vtctl |= adapter->vfs_allocated_count <<
3715                                 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
3716                         E1000_WRITE_REG(hw, E1000_VT_CTL, vtctl);
3717                 } else if (adapter->rss_queues > 1) {
3718                         /* set default queue for pool 1 to queue 2 */
3719                         E1000_WRITE_REG(hw, E1000_VT_CTL,
3720                                         adapter->rss_queues << 7);
3721                 }
3722                 if (adapter->rss_queues > 1)
3723                         mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_2Q;
3724                 else
3725                         mrqc |= E1000_MRQC_ENABLE_VMDQ;
3726         } else {
3727                 mrqc |= E1000_MRQC_ENABLE_RSS_4Q;
3728         }
3729         igb_vmm_control(adapter);
3730
3731         E1000_WRITE_REG(hw, E1000_MRQC, mrqc);
3732 }
3733
3734 /**
3735  * igb_setup_rctl - configure the receive control registers
3736  * @adapter: Board private structure
3737  **/
3738 void igb_setup_rctl(struct igb_adapter *adapter)
3739 {
3740         struct e1000_hw *hw = &adapter->hw;
3741         u32 rctl;
3742
3743         rctl = E1000_READ_REG(hw, E1000_RCTL);
3744
3745         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3746         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
3747
3748         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
3749                 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3750
3751         /*
3752          * enable stripping of CRC. It's unlikely this will break BMC
3753          * redirection as it did with e1000. Newer features require
3754          * that the HW strips the CRC.
3755          */
3756         rctl |= E1000_RCTL_SECRC;
3757
3758         /* disable store bad packets and clear size bits. */
3759         rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
3760
3761         /* enable LPE to prevent packets larger than max_frame_size */
3762         rctl |= E1000_RCTL_LPE;
3763
3764         /* disable queue 0 to prevent tail write w/o re-config */
3765         E1000_WRITE_REG(hw, E1000_RXDCTL(0), 0);
3766
3767         /* Attention!!!  For SR-IOV PF driver operations you must enable
3768          * queue drop for all VF and PF queues to prevent head of line blocking
3769          * if an un-trusted VF does not provide descriptors to hardware.
3770          */
3771         if (adapter->vfs_allocated_count) {
3772                 /* set all queue drop enable bits */
3773                 E1000_WRITE_REG(hw, E1000_QDE, ALL_QUEUES);
3774         }
3775
3776         E1000_WRITE_REG(hw, E1000_RCTL, rctl);
3777 }
3778
3779 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
3780                                    int vfn)
3781 {
3782         struct e1000_hw *hw = &adapter->hw;
3783         u32 vmolr;
3784
3785         /* if it isn't the PF check to see if VFs are enabled and
3786          * increase the size to support vlan tags */
3787         if (vfn < adapter->vfs_allocated_count &&
3788             adapter->vf_data[vfn].vlans_enabled)
3789                 size += VLAN_HLEN;
3790
3791 #ifdef CONFIG_IGB_VMDQ_NETDEV
3792         if (vfn >= adapter->vfs_allocated_count) {
3793                 int queue = vfn - adapter->vfs_allocated_count;
3794                 struct igb_vmdq_adapter *vadapter;
3795
3796                 vadapter = netdev_priv(adapter->vmdq_netdev[queue-1]);
3797                 if (vadapter->vlgrp)
3798                         size += VLAN_HLEN;
3799         }
3800 #endif
3801         vmolr = E1000_READ_REG(hw, E1000_VMOLR(vfn));
3802         vmolr &= ~E1000_VMOLR_RLPML_MASK;
3803         vmolr |= size | E1000_VMOLR_LPE;
3804         E1000_WRITE_REG(hw, E1000_VMOLR(vfn), vmolr);
3805
3806         return 0;
3807 }
3808
3809 /**
3810  * igb_rlpml_set - set maximum receive packet size
3811  * @adapter: board private structure
3812  *
3813  * Configure maximum receivable packet size.
3814  **/
3815 static void igb_rlpml_set(struct igb_adapter *adapter)
3816 {
3817         u32 max_frame_size = adapter->max_frame_size;
3818         struct e1000_hw *hw = &adapter->hw;
3819         u16 pf_id = adapter->vfs_allocated_count;
3820
3821         if (adapter->vmdq_pools && hw->mac.type != e1000_82575) {
3822                 int i;
3823                 for (i = 0; i < adapter->vmdq_pools; i++)
3824                         igb_set_vf_rlpml(adapter, max_frame_size, pf_id + i);
3825                 /*
3826                  * If we're in VMDQ or SR-IOV mode, then set global RLPML
3827                  * to our max jumbo frame size, in case we need to enable
3828                  * jumbo frames on one of the rings later.
3829                  * This will not pass over-length frames into the default
3830                  * queue because it's gated by the VMOLR.RLPML.
3831                  */
3832                 max_frame_size = MAX_JUMBO_FRAME_SIZE;
3833         }
3834         /* Set VF RLPML for the PF device. */
3835         if (adapter->vfs_allocated_count)
3836                 igb_set_vf_rlpml(adapter, max_frame_size, pf_id);
3837
3838         E1000_WRITE_REG(hw, E1000_RLPML, max_frame_size);
3839 }
3840
3841 static inline void igb_set_vf_vlan_strip(struct igb_adapter *adapter,
3842                                         int vfn, bool enable)
3843 {
3844         struct e1000_hw *hw = &adapter->hw;
3845         u32 val;
3846         void __iomem *reg;
3847
3848         if (hw->mac.type < e1000_82576)
3849                 return;
3850
3851         if (hw->mac.type == e1000_i350)
3852                 reg = hw->hw_addr + E1000_DVMOLR(vfn);
3853         else
3854                 reg = hw->hw_addr + E1000_VMOLR(vfn);
3855
3856         val = readl(reg);
3857         if (enable)
3858                 val |= E1000_VMOLR_STRVLAN;
3859         else
3860                 val &= ~(E1000_VMOLR_STRVLAN);
3861         writel(val, reg);
3862 }
3863 static inline void igb_set_vmolr(struct igb_adapter *adapter,
3864                                  int vfn, bool aupe)
3865 {
3866         struct e1000_hw *hw = &adapter->hw;
3867         u32 vmolr;
3868
3869         /*
3870          * This register exists only on 82576 and newer so if we are older then
3871          * we should exit and do nothing
3872          */
3873         if (hw->mac.type < e1000_82576)
3874                 return;
3875
3876         vmolr = E1000_READ_REG(hw, E1000_VMOLR(vfn));
3877
3878         if (aupe)
3879                 vmolr |= E1000_VMOLR_AUPE;        /* Accept untagged packets */
3880         else
3881                 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
3882
3883         /* clear all bits that might not be set */
3884         vmolr &= ~E1000_VMOLR_RSSE;
3885
3886         if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
3887                 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
3888
3889         vmolr |= E1000_VMOLR_BAM;          /* Accept broadcast */
3890         vmolr |= E1000_VMOLR_LPE;          /* Accept long packets */
3891
3892         E1000_WRITE_REG(hw, E1000_VMOLR(vfn), vmolr);
3893 }
3894
3895 /**
3896  * igb_configure_rx_ring - Configure a receive ring after Reset
3897  * @adapter: board private structure
3898  * @ring: receive ring to be configured
3899  *
3900  * Configure the Rx unit of the MAC after a reset.
3901  **/
3902 void igb_configure_rx_ring(struct igb_adapter *adapter,
3903                            struct igb_ring *ring)
3904 {
3905         struct e1000_hw *hw = &adapter->hw;
3906         u64 rdba = ring->dma;
3907         int reg_idx = ring->reg_idx;
3908         u32 srrctl = 0, rxdctl = 0;
3909
3910 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
3911         /*
3912          * RLPML prevents us from receiving a frame larger than max_frame so
3913          * it is safe to just set the rx_buffer_len to max_frame without the
3914          * risk of an skb over panic.
3915          */
3916         ring->rx_buffer_len = max_t(u32, adapter->max_frame_size,
3917                                     MAXIMUM_ETHERNET_VLAN_SIZE);
3918
3919 #endif
3920         /* disable the queue */
3921         E1000_WRITE_REG(hw, E1000_RXDCTL(reg_idx), 0);
3922
3923         /* Set DMA base address registers */
3924         E1000_WRITE_REG(hw, E1000_RDBAL(reg_idx),
3925                         rdba & 0x00000000ffffffffULL);
3926         E1000_WRITE_REG(hw, E1000_RDBAH(reg_idx), rdba >> 32);
3927         E1000_WRITE_REG(hw, E1000_RDLEN(reg_idx),
3928                        ring->count * sizeof(union e1000_adv_rx_desc));
3929
3930         /* initialize head and tail */
3931         ring->tail = hw->hw_addr + E1000_RDT(reg_idx);
3932         E1000_WRITE_REG(hw, E1000_RDH(reg_idx), 0);
3933         writel(0, ring->tail);
3934
3935         /* reset next-to- use/clean to place SW in sync with hardwdare */
3936         ring->next_to_clean = 0;
3937         ring->next_to_use = 0;
3938 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
3939         ring->next_to_alloc = 0;
3940
3941 #endif
3942         /* set descriptor configuration */
3943 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
3944         srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
3945         srrctl |= IGB_RX_BUFSZ >> E1000_SRRCTL_BSIZEPKT_SHIFT;
3946 #else /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
3947         srrctl = ALIGN(ring->rx_buffer_len, 1024) >>
3948                  E1000_SRRCTL_BSIZEPKT_SHIFT;
3949 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
3950         srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
3951 #ifdef HAVE_PTP_1588_CLOCK
3952         if (hw->mac.type >= e1000_82580)
3953                 srrctl |= E1000_SRRCTL_TIMESTAMP;
3954 #endif /* HAVE_PTP_1588_CLOCK */
3955         /*
3956          * We should set the drop enable bit if:
3957          *  SR-IOV is enabled
3958          *   or
3959          *  Flow Control is disabled and number of RX queues > 1
3960          *
3961          *  This allows us to avoid head of line blocking for security
3962          *  and performance reasons.
3963          */
3964         if (adapter->vfs_allocated_count ||
3965             (adapter->num_rx_queues > 1 &&
3966              (hw->fc.requested_mode == e1000_fc_none ||
3967               hw->fc.requested_mode == e1000_fc_rx_pause)))
3968                 srrctl |= E1000_SRRCTL_DROP_EN;
3969
3970         E1000_WRITE_REG(hw, E1000_SRRCTL(reg_idx), srrctl);
3971
3972         /* set filtering for VMDQ pools */
3973         igb_set_vmolr(adapter, reg_idx & 0x7, true);
3974
3975         rxdctl |= IGB_RX_PTHRESH;
3976         rxdctl |= IGB_RX_HTHRESH << 8;
3977         rxdctl |= IGB_RX_WTHRESH << 16;
3978
3979         /* enable receive descriptor fetching */
3980         rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
3981         E1000_WRITE_REG(hw, E1000_RXDCTL(reg_idx), rxdctl);
3982 }
3983
3984 /**
3985  * igb_configure_rx - Configure receive Unit after Reset
3986  * @adapter: board private structure
3987  *
3988  * Configure the Rx unit of the MAC after a reset.
3989  **/
3990 static void igb_configure_rx(struct igb_adapter *adapter)
3991 {
3992         int i;
3993
3994         /* set UTA to appropriate mode */
3995         igb_set_uta(adapter);
3996
3997         igb_full_sync_mac_table(adapter);
3998         /* Setup the HW Rx Head and Tail Descriptor Pointers and
3999          * the Base and Length of the Rx Descriptor Ring */
4000         for (i = 0; i < adapter->num_rx_queues; i++)
4001                 igb_configure_rx_ring(adapter, adapter->rx_ring[i]);
4002 }
4003
4004 /**
4005  * igb_free_tx_resources - Free Tx Resources per Queue
4006  * @tx_ring: Tx descriptor ring for a specific queue
4007  *
4008  * Free all transmit software resources
4009  **/
4010 void igb_free_tx_resources(struct igb_ring *tx_ring)
4011 {
4012         igb_clean_tx_ring(tx_ring);
4013
4014         vfree(tx_ring->tx_buffer_info);
4015         tx_ring->tx_buffer_info = NULL;
4016
4017         /* if not set, then don't free */
4018         if (!tx_ring->desc)
4019                 return;
4020
4021         dma_free_coherent(tx_ring->dev, tx_ring->size,
4022                           tx_ring->desc, tx_ring->dma);
4023
4024         tx_ring->desc = NULL;
4025 }
4026
4027 /**
4028  * igb_free_all_tx_resources - Free Tx Resources for All Queues
4029  * @adapter: board private structure
4030  *
4031  * Free all transmit software resources
4032  **/
4033 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
4034 {
4035         int i;
4036
4037         for (i = 0; i < adapter->num_tx_queues; i++)
4038                 igb_free_tx_resources(adapter->tx_ring[i]);
4039 }
4040
4041 void igb_unmap_and_free_tx_resource(struct igb_ring *ring,
4042                                     struct igb_tx_buffer *tx_buffer)
4043 {
4044         if (tx_buffer->skb) {
4045                 dev_kfree_skb_any(tx_buffer->skb);
4046                 if (dma_unmap_len(tx_buffer, len))
4047                         dma_unmap_single(ring->dev,
4048                                          dma_unmap_addr(tx_buffer, dma),
4049                                          dma_unmap_len(tx_buffer, len),
4050                                          DMA_TO_DEVICE);
4051         } else if (dma_unmap_len(tx_buffer, len)) {
4052                 dma_unmap_page(ring->dev,
4053                                dma_unmap_addr(tx_buffer, dma),
4054                                dma_unmap_len(tx_buffer, len),
4055                                DMA_TO_DEVICE);
4056         }
4057         tx_buffer->next_to_watch = NULL;
4058         tx_buffer->skb = NULL;
4059         dma_unmap_len_set(tx_buffer, len, 0);
4060         /* buffer_info must be completely set up in the transmit path */
4061 }
4062
4063 /**
4064  * igb_clean_tx_ring - Free Tx Buffers
4065  * @tx_ring: ring to be cleaned
4066  **/
4067 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
4068 {
4069         struct igb_tx_buffer *buffer_info;
4070         unsigned long size;
4071         u16 i;
4072
4073         if (!tx_ring->tx_buffer_info)
4074                 return;
4075         /* Free all the Tx ring sk_buffs */
4076
4077         for (i = 0; i < tx_ring->count; i++) {
4078                 buffer_info = &tx_ring->tx_buffer_info[i];
4079                 igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
4080         }
4081
4082         netdev_tx_reset_queue(txring_txq(tx_ring));
4083
4084         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
4085         memset(tx_ring->tx_buffer_info, 0, size);
4086
4087         /* Zero out the descriptor ring */
4088         memset(tx_ring->desc, 0, tx_ring->size);
4089
4090         tx_ring->next_to_use = 0;
4091         tx_ring->next_to_clean = 0;
4092 }
4093
4094 /**
4095  * igb_clean_all_tx_rings - Free Tx Buffers for all queues
4096  * @adapter: board private structure
4097  **/
4098 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
4099 {
4100         int i;
4101
4102         for (i = 0; i < adapter->num_tx_queues; i++)
4103                 igb_clean_tx_ring(adapter->tx_ring[i]);
4104 }
4105
4106 /**
4107  * igb_free_rx_resources - Free Rx Resources
4108  * @rx_ring: ring to clean the resources from
4109  *
4110  * Free all receive software resources
4111  **/
4112 void igb_free_rx_resources(struct igb_ring *rx_ring)
4113 {
4114         igb_clean_rx_ring(rx_ring);
4115
4116         vfree(rx_ring->rx_buffer_info);
4117         rx_ring->rx_buffer_info = NULL;
4118
4119         /* if not set, then don't free */
4120         if (!rx_ring->desc)
4121                 return;
4122
4123         dma_free_coherent(rx_ring->dev, rx_ring->size,
4124                           rx_ring->desc, rx_ring->dma);
4125
4126         rx_ring->desc = NULL;
4127 }
4128
4129 /**
4130  * igb_free_all_rx_resources - Free Rx Resources for All Queues
4131  * @adapter: board private structure
4132  *
4133  * Free all receive software resources
4134  **/
4135 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
4136 {
4137         int i;
4138
4139         for (i = 0; i < adapter->num_rx_queues; i++)
4140                 igb_free_rx_resources(adapter->rx_ring[i]);
4141 }
4142
4143 /**
4144  * igb_clean_rx_ring - Free Rx Buffers per Queue
4145  * @rx_ring: ring to free buffers from
4146  **/
4147 void igb_clean_rx_ring(struct igb_ring *rx_ring)
4148 {
4149         unsigned long size;
4150         u16 i;
4151
4152         if (!rx_ring->rx_buffer_info)
4153                 return;
4154
4155 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
4156         if (rx_ring->skb)
4157                 dev_kfree_skb(rx_ring->skb);
4158         rx_ring->skb = NULL;
4159
4160 #endif
4161         /* Free all the Rx ring sk_buffs */
4162         for (i = 0; i < rx_ring->count; i++) {
4163                 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
4164 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
4165                 if (buffer_info->dma) {
4166                         dma_unmap_single(rx_ring->dev,
4167                                          buffer_info->dma,
4168                                          rx_ring->rx_buffer_len,
4169                                          DMA_FROM_DEVICE);
4170                         buffer_info->dma = 0;
4171                 }
4172
4173                 if (buffer_info->skb) {
4174                         dev_kfree_skb(buffer_info->skb);
4175                         buffer_info->skb = NULL;
4176                 }
4177 #else
4178                 if (!buffer_info->page)
4179                         continue;
4180
4181                 dma_unmap_page(rx_ring->dev,
4182                                buffer_info->dma,
4183                                PAGE_SIZE,
4184                                DMA_FROM_DEVICE);
4185                 __free_page(buffer_info->page);
4186
4187                 buffer_info->page = NULL;
4188 #endif
4189         }
4190
4191         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
4192         memset(rx_ring->rx_buffer_info, 0, size);
4193
4194         /* Zero out the descriptor ring */
4195         memset(rx_ring->desc, 0, rx_ring->size);
4196
4197         rx_ring->next_to_alloc = 0;
4198         rx_ring->next_to_clean = 0;
4199         rx_ring->next_to_use = 0;
4200 }
4201
4202 /**
4203  * igb_clean_all_rx_rings - Free Rx Buffers for all queues
4204  * @adapter: board private structure
4205  **/
4206 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
4207 {
4208         int i;
4209
4210         for (i = 0; i < adapter->num_rx_queues; i++)
4211                 igb_clean_rx_ring(adapter->rx_ring[i]);
4212 }
4213
4214 /**
4215  * igb_set_mac - Change the Ethernet Address of the NIC
4216  * @netdev: network interface device structure
4217  * @p: pointer to an address structure
4218  *
4219  * Returns 0 on success, negative on failure
4220  **/
4221 static int igb_set_mac(struct net_device *netdev, void *p)
4222 {
4223         struct igb_adapter *adapter = netdev_priv(netdev);
4224         struct e1000_hw *hw = &adapter->hw;
4225         struct sockaddr *addr = p;
4226
4227         if (!is_valid_ether_addr(addr->sa_data))
4228                 return -EADDRNOTAVAIL;
4229
4230         igb_del_mac_filter(adapter, hw->mac.addr,
4231                            adapter->vfs_allocated_count);
4232         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4233         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
4234
4235         /* set the correct pool for the new PF MAC address in entry 0 */
4236         return igb_add_mac_filter(adapter, hw->mac.addr,
4237                            adapter->vfs_allocated_count);
4238 }
4239
4240 /**
4241  * igb_write_mc_addr_list - write multicast addresses to MTA
4242  * @netdev: network interface device structure
4243  *
4244  * Writes multicast address list to the MTA hash table.
4245  * Returns: -ENOMEM on failure
4246  *                0 on no addresses written
4247  *                X on writing X addresses to MTA
4248  **/
4249 int igb_write_mc_addr_list(struct net_device *netdev)
4250 {
4251         struct igb_adapter *adapter = netdev_priv(netdev);
4252         struct e1000_hw *hw = &adapter->hw;
4253 #ifdef NETDEV_HW_ADDR_T_MULTICAST
4254         struct netdev_hw_addr *ha;
4255 #else
4256         struct dev_mc_list *ha;
4257 #endif
4258         u8  *mta_list;
4259         int i, count;
4260 #ifdef CONFIG_IGB_VMDQ_NETDEV
4261         int vm;
4262 #endif
4263         count = netdev_mc_count(netdev);
4264 #ifdef CONFIG_IGB_VMDQ_NETDEV
4265         for (vm = 1; vm < adapter->vmdq_pools; vm++) {
4266                 if (!adapter->vmdq_netdev[vm])
4267                         break;
4268                 if (!netif_running(adapter->vmdq_netdev[vm]))
4269                         continue;
4270                 count += netdev_mc_count(adapter->vmdq_netdev[vm]);
4271         }
4272 #endif
4273
4274         if (!count) {
4275                 e1000_update_mc_addr_list(hw, NULL, 0);
4276                 return 0;
4277         }
4278         mta_list = kzalloc(count * 6, GFP_ATOMIC);
4279         if (!mta_list)
4280                 return -ENOMEM;
4281
4282         /* The shared function expects a packed array of only addresses. */
4283         i = 0;
4284         netdev_for_each_mc_addr(ha, netdev)
4285 #ifdef NETDEV_HW_ADDR_T_MULTICAST
4286                 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
4287 #else
4288                 memcpy(mta_list + (i++ * ETH_ALEN), ha->dmi_addr, ETH_ALEN);
4289 #endif
4290 #ifdef CONFIG_IGB_VMDQ_NETDEV
4291         for (vm = 1; vm < adapter->vmdq_pools; vm++) {
4292                 if (!adapter->vmdq_netdev[vm])
4293                         break;
4294                 if (!netif_running(adapter->vmdq_netdev[vm]) ||
4295                     !netdev_mc_count(adapter->vmdq_netdev[vm]))
4296                         continue;
4297                 netdev_for_each_mc_addr(ha, adapter->vmdq_netdev[vm])
4298 #ifdef NETDEV_HW_ADDR_T_MULTICAST
4299                         memcpy(mta_list + (i++ * ETH_ALEN),
4300                                ha->addr, ETH_ALEN);
4301 #else
4302                         memcpy(mta_list + (i++ * ETH_ALEN),
4303                                ha->dmi_addr, ETH_ALEN);
4304 #endif
4305         }
4306 #endif
4307         e1000_update_mc_addr_list(hw, mta_list, i);
4308         kfree(mta_list);
4309
4310         return count;
4311 }
4312
4313 void igb_rar_set(struct igb_adapter *adapter, u32 index)
4314 {
4315         u32 rar_low, rar_high;
4316         struct e1000_hw *hw = &adapter->hw;
4317         u8 *addr = adapter->mac_table[index].addr;
4318         /* HW expects these in little endian so we reverse the byte order
4319          * from network order (big endian) to little endian
4320          */
4321         rar_low = ((u32) addr[0] | ((u32) addr[1] << 8) |
4322                   ((u32) addr[2] << 16) | ((u32) addr[3] << 24));
4323         rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));
4324
4325         /* Indicate to hardware the Address is Valid. */
4326         if (adapter->mac_table[index].state & IGB_MAC_STATE_IN_USE)
4327                 rar_high |= E1000_RAH_AV;
4328
4329         if (hw->mac.type == e1000_82575)
4330                 rar_high |= E1000_RAH_POOL_1 * adapter->mac_table[index].queue;
4331         else
4332                 rar_high |= E1000_RAH_POOL_1 << adapter->mac_table[index].queue;
4333
4334         E1000_WRITE_REG(hw, E1000_RAL(index), rar_low);
4335         E1000_WRITE_FLUSH(hw);
4336         E1000_WRITE_REG(hw, E1000_RAH(index), rar_high);
4337         E1000_WRITE_FLUSH(hw);
4338 }
4339
4340 void igb_full_sync_mac_table(struct igb_adapter *adapter)
4341 {
4342         struct e1000_hw *hw = &adapter->hw;
4343         int i;
4344         for (i = 0; i < hw->mac.rar_entry_count; i++) {
4345                         igb_rar_set(adapter, i);
4346         }
4347 }
4348
4349 void igb_sync_mac_table(struct igb_adapter *adapter)
4350 {
4351         struct e1000_hw *hw = &adapter->hw;
4352         int i;
4353         for (i = 0; i < hw->mac.rar_entry_count; i++) {
4354                 if (adapter->mac_table[i].state & IGB_MAC_STATE_MODIFIED)
4355                         igb_rar_set(adapter, i);
4356                 adapter->mac_table[i].state &= ~(IGB_MAC_STATE_MODIFIED);
4357         }
4358 }
4359
4360 int igb_available_rars(struct igb_adapter *adapter)
4361 {
4362         struct e1000_hw *hw = &adapter->hw;
4363         int i, count = 0;
4364
4365         for (i = 0; i < hw->mac.rar_entry_count; i++) {
4366                 if (adapter->mac_table[i].state == 0)
4367                         count++;
4368         }
4369         return count;
4370 }
4371
4372 #ifdef HAVE_SET_RX_MODE
4373 /**
4374  * igb_write_uc_addr_list - write unicast addresses to RAR table
4375  * @netdev: network interface device structure
4376  *
4377  * Writes unicast address list to the RAR table.
4378  * Returns: -ENOMEM on failure/insufficient address space
4379  *                0 on no addresses written
4380  *                X on writing X addresses to the RAR table
4381  **/
4382 static int igb_write_uc_addr_list(struct net_device *netdev)
4383 {
4384         struct igb_adapter *adapter = netdev_priv(netdev);
4385         unsigned int vfn = adapter->vfs_allocated_count;
4386         int count = 0;
4387
4388         /* return ENOMEM indicating insufficient memory for addresses */
4389         if (netdev_uc_count(netdev) > igb_available_rars(adapter))
4390                 return -ENOMEM;
4391         if (!netdev_uc_empty(netdev)) {
4392 #ifdef NETDEV_HW_ADDR_T_UNICAST
4393                 struct netdev_hw_addr *ha;
4394 #else
4395                 struct dev_mc_list *ha;
4396 #endif
4397                 netdev_for_each_uc_addr(ha, netdev) {
4398 #ifdef NETDEV_HW_ADDR_T_UNICAST
4399                         igb_del_mac_filter(adapter, ha->addr, vfn);
4400                         igb_add_mac_filter(adapter, ha->addr, vfn);
4401 #else
4402                         igb_del_mac_filter(adapter, ha->da_addr, vfn);
4403                         igb_add_mac_filter(adapter, ha->da_addr, vfn);
4404 #endif
4405                         count++;
4406                 }
4407         }
4408         return count;
4409 }
4410
4411 #endif /* HAVE_SET_RX_MODE */
4412 /**
4413  * igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
4414  * @netdev: network interface device structure
4415  *
4416  * The set_rx_mode entry point is called whenever the unicast or multicast
4417  * address lists or the network interface flags are updated.  This routine is
4418  * responsible for configuring the hardware for proper unicast, multicast,
4419  * promiscuous mode, and all-multi behavior.
4420  **/
4421 static void igb_set_rx_mode(struct net_device *netdev)
4422 {
4423         struct igb_adapter *adapter = netdev_priv(netdev);
4424         struct e1000_hw *hw = &adapter->hw;
4425         unsigned int vfn = adapter->vfs_allocated_count;
4426         u32 rctl, vmolr = 0;
4427         int count;
4428
4429         /* Check for Promiscuous and All Multicast modes */
4430         rctl = E1000_READ_REG(hw, E1000_RCTL);
4431
4432         /* clear the effected bits */
4433         rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_VFE);
4434
4435         if (netdev->flags & IFF_PROMISC) {
4436                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
4437                 vmolr |= (E1000_VMOLR_ROPE | E1000_VMOLR_MPME);
4438                 /* retain VLAN HW filtering if in VT mode */
4439                 if (adapter->vfs_allocated_count || adapter->vmdq_pools)
4440                         rctl |= E1000_RCTL_VFE;
4441         } else {
4442                 if (netdev->flags & IFF_ALLMULTI) {
4443                         rctl |= E1000_RCTL_MPE;
4444                         vmolr |= E1000_VMOLR_MPME;
4445                 } else {
4446                         /*
4447                          * Write addresses to the MTA, if the attempt fails
4448                          * then we should just turn on promiscuous mode so
4449                          * that we can at least receive multicast traffic
4450                          */
4451                         count = igb_write_mc_addr_list(netdev);
4452                         if (count < 0) {
4453                                 rctl |= E1000_RCTL_MPE;
4454                                 vmolr |= E1000_VMOLR_MPME;
4455                         } else if (count) {
4456                                 vmolr |= E1000_VMOLR_ROMPE;
4457                         }
4458                 }
4459 #ifdef HAVE_SET_RX_MODE
4460                 /*
4461                  * Write addresses to available RAR registers, if there is not
4462                  * sufficient space to store all the addresses then enable
4463                  * unicast promiscuous mode
4464                  */
4465                 count = igb_write_uc_addr_list(netdev);
4466                 if (count < 0) {
4467                         rctl |= E1000_RCTL_UPE;
4468                         vmolr |= E1000_VMOLR_ROPE;
4469                 }
4470 #endif /* HAVE_SET_RX_MODE */
4471                 rctl |= E1000_RCTL_VFE;
4472         }
4473         E1000_WRITE_REG(hw, E1000_RCTL, rctl);
4474
4475         /*
4476          * In order to support SR-IOV and eventually VMDq it is necessary to set
4477          * the VMOLR to enable the appropriate modes.  Without this workaround
4478          * we will have issues with VLAN tag stripping not being done for frames
4479          * that are only arriving because we are the default pool
4480          */
4481         if (hw->mac.type < e1000_82576)
4482                 return;
4483
4484         vmolr |= E1000_READ_REG(hw, E1000_VMOLR(vfn)) &
4485                  ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
4486         E1000_WRITE_REG(hw, E1000_VMOLR(vfn), vmolr);
4487         igb_restore_vf_multicasts(adapter);
4488 }
4489
4490 static void igb_check_wvbr(struct igb_adapter *adapter)
4491 {
4492         struct e1000_hw *hw = &adapter->hw;
4493         u32 wvbr = 0;
4494
4495         switch (hw->mac.type) {
4496         case e1000_82576:
4497         case e1000_i350:
4498                 if (!(wvbr = E1000_READ_REG(hw, E1000_WVBR)))
4499                         return;
4500                 break;
4501         default:
4502                 break;
4503         }
4504
4505         adapter->wvbr |= wvbr;
4506 }
4507
4508 #define IGB_STAGGERED_QUEUE_OFFSET 8
4509
4510 static void igb_spoof_check(struct igb_adapter *adapter)
4511 {
4512         int j;
4513
4514         if (!adapter->wvbr)
4515                 return;
4516
4517         switch (adapter->hw.mac.type) {
4518         case e1000_82576:
4519                 for (j = 0; j < adapter->vfs_allocated_count; j++) {
4520                         if (adapter->wvbr & (1 << j) ||
4521                             adapter->wvbr & (1 << (j + IGB_STAGGERED_QUEUE_OFFSET))) {
4522                                 DPRINTK(DRV, WARNING,
4523                                         "Spoof event(s) detected on VF %d\n", j);
4524                                 adapter->wvbr &=
4525                                         ~((1 << j) |
4526                                           (1 << (j + IGB_STAGGERED_QUEUE_OFFSET)));
4527                         }
4528                 }
4529                 break;
4530         case e1000_i350:
4531                 for (j = 0; j < adapter->vfs_allocated_count; j++) {
4532                         if (adapter->wvbr & (1 << j)) {
4533                                 DPRINTK(DRV, WARNING,
4534                                         "Spoof event(s) detected on VF %d\n", j);
4535                                 adapter->wvbr &= ~(1 << j);
4536                         }
4537                 }
4538                 break;
4539         default:
4540                 break;
4541         }
4542 }
4543
4544 /* Need to wait a few seconds after link up to get diagnostic information from
4545  * the phy */
4546 static void igb_update_phy_info(unsigned long data)
4547 {
4548         struct igb_adapter *adapter = (struct igb_adapter *) data;
4549         e1000_get_phy_info(&adapter->hw);
4550 }
4551
4552 /**
4553  * igb_has_link - check shared code for link and determine up/down
4554  * @adapter: pointer to driver private info
4555  **/
4556 bool igb_has_link(struct igb_adapter *adapter)
4557 {
4558         struct e1000_hw *hw = &adapter->hw;
4559         bool link_active = FALSE;
4560
4561         /* get_link_status is set on LSC (link status) interrupt or
4562          * rx sequence error interrupt.  get_link_status will stay
4563          * false until the e1000_check_for_link establishes link
4564          * for copper adapters ONLY
4565          */
4566         switch (hw->phy.media_type) {
4567         case e1000_media_type_copper:
4568                 if (!hw->mac.get_link_status)
4569                         return true;
4570         case e1000_media_type_internal_serdes:
4571                 e1000_check_for_link(hw);
4572                 link_active = !hw->mac.get_link_status;
4573                 break;
4574         case e1000_media_type_unknown:
4575         default:
4576                 break;
4577         }
4578
4579         if (((hw->mac.type == e1000_i210) ||
4580              (hw->mac.type == e1000_i211)) &&
4581              (hw->phy.id == I210_I_PHY_ID)) {
4582                 if (!netif_carrier_ok(adapter->netdev)) {
4583                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4584                 } else if (!(adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)) {
4585                         adapter->flags |= IGB_FLAG_NEED_LINK_UPDATE;
4586                         adapter->link_check_timeout = jiffies;
4587                 }
4588         }
4589
4590         return link_active;
4591 }
4592
4593 /**
4594  * igb_watchdog - Timer Call-back
4595  * @data: pointer to adapter cast into an unsigned long
4596  **/
4597 static void igb_watchdog(unsigned long data)
4598 {
4599         struct igb_adapter *adapter = (struct igb_adapter *)data;
4600         /* Do the rest outside of interrupt context */
4601         schedule_work(&adapter->watchdog_task);
4602 }
4603
4604 static void igb_watchdog_task(struct work_struct *work)
4605 {
4606         struct igb_adapter *adapter = container_of(work,
4607                                                    struct igb_adapter,
4608                                                    watchdog_task);
4609         struct e1000_hw *hw = &adapter->hw;
4610         struct net_device *netdev = adapter->netdev;
4611         u32 link;
4612         int i;
4613         u32 thstat, ctrl_ext;
4614         u32 connsw;
4615
4616         link = igb_has_link(adapter);
4617         /* Force link down if we have fiber to swap to */
4618         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4619                 if (hw->phy.media_type == e1000_media_type_copper) {
4620                         connsw = E1000_READ_REG(hw, E1000_CONNSW);
4621                         if (!(connsw & E1000_CONNSW_AUTOSENSE_EN))
4622                                 link = 0;
4623                 }
4624         }
4625
4626         if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE) {
4627                 if (time_after(jiffies, (adapter->link_check_timeout + HZ)))
4628                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4629                 else
4630                         link = FALSE;
4631         }
4632
4633         if (link) {
4634                 /* Perform a reset if the media type changed. */
4635                 if (hw->dev_spec._82575.media_changed) {
4636                         hw->dev_spec._82575.media_changed = false;
4637                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
4638                         igb_reset(adapter);
4639                 }
4640
4641                 /* Cancel scheduled suspend requests. */
4642                 pm_runtime_resume(netdev->dev.parent);
4643
4644                 if (!netif_carrier_ok(netdev)) {
4645                         u32 ctrl;
4646                         e1000_get_speed_and_duplex(hw,
4647                                                    &adapter->link_speed,
4648                                                    &adapter->link_duplex);
4649
4650                         ctrl = E1000_READ_REG(hw, E1000_CTRL);
4651                         /* Links status message must follow this format */
4652                         printk(KERN_INFO "igb: %s NIC Link is Up %d Mbps %s, "
4653                                  "Flow Control: %s\n",
4654                                netdev->name,
4655                                adapter->link_speed,
4656                                adapter->link_duplex == FULL_DUPLEX ?
4657                                  "Full Duplex" : "Half Duplex",
4658                                ((ctrl & E1000_CTRL_TFCE) &&
4659                                 (ctrl & E1000_CTRL_RFCE)) ? "RX/TX":
4660                                ((ctrl & E1000_CTRL_RFCE) ?  "RX" :
4661                                ((ctrl & E1000_CTRL_TFCE) ?  "TX" : "None")));
4662                         /* adjust timeout factor according to speed/duplex */
4663                         adapter->tx_timeout_factor = 1;
4664                         switch (adapter->link_speed) {
4665                         case SPEED_10:
4666                                 adapter->tx_timeout_factor = 14;
4667                                 break;
4668                         case SPEED_100:
4669                                 /* maybe add some timeout factor ? */
4670                                 break;
4671                         default:
4672                                 break;
4673                         }
4674
4675                         netif_carrier_on(netdev);
4676                         netif_tx_wake_all_queues(netdev);
4677
4678                         igb_ping_all_vfs(adapter);
4679 #ifdef IFLA_VF_MAX
4680                         igb_check_vf_rate_limit(adapter);
4681 #endif /* IFLA_VF_MAX */
4682
4683                         /* link state has changed, schedule phy info update */
4684                         if (!test_bit(__IGB_DOWN, &adapter->state))
4685                                 mod_timer(&adapter->phy_info_timer,
4686                                           round_jiffies(jiffies + 2 * HZ));
4687                 }
4688         } else {
4689                 if (netif_carrier_ok(netdev)) {
4690                         adapter->link_speed = 0;
4691                         adapter->link_duplex = 0;
4692                         /* check for thermal sensor event on i350 */
4693                         if (hw->mac.type == e1000_i350) {
4694                                 thstat = E1000_READ_REG(hw, E1000_THSTAT);
4695                                 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
4696                                 if ((hw->phy.media_type ==
4697                                         e1000_media_type_copper) &&
4698                                         !(ctrl_ext &
4699                                         E1000_CTRL_EXT_LINK_MODE_SGMII)) {
4700                                         if (thstat & E1000_THSTAT_PWR_DOWN) {
4701                                                 printk(KERN_ERR "igb: %s The "
4702                                                 "network adapter was stopped "
4703                                                 "because it overheated.\n",
4704                                                 netdev->name);
4705                                         }
4706                                         if (thstat & E1000_THSTAT_LINK_THROTTLE) {
4707                                                 printk(KERN_INFO
4708                                                         "igb: %s The network "
4709                                                         "adapter supported "
4710                                                         "link speed "
4711                                                         "was downshifted "
4712                                                         "because it "
4713                                                         "overheated.\n",
4714                                                         netdev->name);
4715                                         }
4716                                 }
4717                         }
4718
4719                         /* Links status message must follow this format */
4720                         printk(KERN_INFO "igb: %s NIC Link is Down\n",
4721                                netdev->name);
4722                         netif_carrier_off(netdev);
4723                         netif_tx_stop_all_queues(netdev);
4724
4725                         igb_ping_all_vfs(adapter);
4726
4727                         /* link state has changed, schedule phy info update */
4728                         if (!test_bit(__IGB_DOWN, &adapter->state))
4729                                 mod_timer(&adapter->phy_info_timer,
4730                                           round_jiffies(jiffies + 2 * HZ));
4731                         /* link is down, time to check for alternate media */
4732                         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4733                                 igb_check_swap_media(adapter);
4734                                 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4735                                         schedule_work(&adapter->reset_task);
4736                                         /* return immediately */
4737                                         return;
4738                                 }
4739                         }
4740                         pm_schedule_suspend(netdev->dev.parent,
4741                                             MSEC_PER_SEC * 5);
4742
4743                 /* also check for alternate media here */
4744                 } else if (!netif_carrier_ok(netdev) &&
4745                            (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
4746                         hw->mac.ops.power_up_serdes(hw);
4747                         igb_check_swap_media(adapter);
4748                         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4749                                 schedule_work(&adapter->reset_task);
4750                                 /* return immediately */
4751                                 return;
4752                         }
4753                 }
4754         }
4755
4756         igb_update_stats(adapter);
4757
4758         for (i = 0; i < adapter->num_tx_queues; i++) {
4759                 struct igb_ring *tx_ring = adapter->tx_ring[i];
4760                 if (!netif_carrier_ok(netdev)) {
4761                         /* We've lost link, so the controller stops DMA,
4762                          * but we've got queued Tx work that's never going
4763                          * to get done, so reset controller to flush Tx.
4764                          * (Do the reset outside of interrupt context). */
4765                         if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
4766                                 adapter->tx_timeout_count++;
4767                                 schedule_work(&adapter->reset_task);
4768                                 /* return immediately since reset is imminent */
4769                                 return;
4770                         }
4771                 }
4772
4773                 /* Force detection of hung controller every watchdog period */
4774                 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
4775         }
4776
4777         /* Cause software interrupt to ensure rx ring is cleaned */
4778         if (adapter->msix_entries) {
4779                 u32 eics = 0;
4780                 for (i = 0; i < adapter->num_q_vectors; i++)
4781                         eics |= adapter->q_vector[i]->eims_value;
4782                 E1000_WRITE_REG(hw, E1000_EICS, eics);
4783         } else {
4784                 E1000_WRITE_REG(hw, E1000_ICS, E1000_ICS_RXDMT0);
4785         }
4786
4787         igb_spoof_check(adapter);
4788
4789         /* Reset the timer */
4790         if (!test_bit(__IGB_DOWN, &adapter->state)) {
4791                 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)
4792                         mod_timer(&adapter->watchdog_timer,
4793                                   round_jiffies(jiffies +  HZ));
4794                 else
4795                         mod_timer(&adapter->watchdog_timer,
4796                                   round_jiffies(jiffies + 2 * HZ));
4797         }
4798 }
4799
4800 static void igb_dma_err_task(struct work_struct *work)
4801 {
4802         struct igb_adapter *adapter = container_of(work,
4803                                                    struct igb_adapter,
4804                                                    dma_err_task);
4805         int vf;
4806         struct e1000_hw *hw = &adapter->hw;
4807         struct net_device *netdev = adapter->netdev;
4808         u32 hgptc;
4809         u32 ciaa, ciad;
4810
4811         hgptc = E1000_READ_REG(hw, E1000_HGPTC);
4812         if (hgptc) /* If incrementing then no need for the check below */
4813                 goto dma_timer_reset;
4814         /*
4815          * Check to see if a bad DMA write target from an errant or
4816          * malicious VF has caused a PCIe error.  If so then we can
4817          * issue a VFLR to the offending VF(s) and then resume without
4818          * requesting a full slot reset.
4819          */
4820
4821         for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
4822                 ciaa = (vf << 16) | 0x80000000;
4823                 /* 32 bit read so align, we really want status at offset 6 */
4824                 ciaa |= PCI_COMMAND;
4825                 E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4826                 ciad = E1000_READ_REG(hw, E1000_CIAD);
4827                 ciaa &= 0x7FFFFFFF;
4828                 /* disable debug mode asap after reading data */
4829                 E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4830                 /* Get the upper 16 bits which will be the PCI status reg */
4831                 ciad >>= 16;
4832                 if (ciad & (PCI_STATUS_REC_MASTER_ABORT |
4833                             PCI_STATUS_REC_TARGET_ABORT |
4834                             PCI_STATUS_SIG_SYSTEM_ERROR)) {
4835                         netdev_err(netdev, "VF %d suffered error\n", vf);
4836                         /* Issue VFLR */
4837                         ciaa = (vf << 16) | 0x80000000;
4838                         ciaa |= 0xA8;
4839                         E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4840                         ciad = 0x00008000;  /* VFLR */
4841                         E1000_WRITE_REG(hw, E1000_CIAD, ciad);
4842                         ciaa &= 0x7FFFFFFF;
4843                         E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4844                 }
4845         }
4846 dma_timer_reset:
4847         /* Reset the timer */
4848         if (!test_bit(__IGB_DOWN, &adapter->state))
4849                 mod_timer(&adapter->dma_err_timer,
4850                           round_jiffies(jiffies + HZ / 10));
4851 }
4852
4853 /**
4854  * igb_dma_err_timer - Timer Call-back
4855  * @data: pointer to adapter cast into an unsigned long
4856  **/
4857 static void igb_dma_err_timer(unsigned long data)
4858 {
4859         struct igb_adapter *adapter = (struct igb_adapter *)data;
4860         /* Do the rest outside of interrupt context */
4861         schedule_work(&adapter->dma_err_task);
4862 }
4863
4864 enum latency_range {
4865         lowest_latency = 0,
4866         low_latency = 1,
4867         bulk_latency = 2,
4868         latency_invalid = 255
4869 };
4870
4871 /**
4872  * igb_update_ring_itr - update the dynamic ITR value based on packet size
4873  *
4874  *      Stores a new ITR value based on strictly on packet size.  This
4875  *      algorithm is less sophisticated than that used in igb_update_itr,
4876  *      due to the difficulty of synchronizing statistics across multiple
4877  *      receive rings.  The divisors and thresholds used by this function
4878  *      were determined based on theoretical maximum wire speed and testing
4879  *      data, in order to minimize response time while increasing bulk
4880  *      throughput.
4881  *      This functionality is controlled by the InterruptThrottleRate module
4882  *      parameter (see igb_param.c)
4883  *      NOTE:  This function is called only when operating in a multiqueue
4884  *             receive environment.
4885  * @q_vector: pointer to q_vector
4886  **/
4887 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
4888 {
4889         int new_val = q_vector->itr_val;
4890         int avg_wire_size = 0;
4891         struct igb_adapter *adapter = q_vector->adapter;
4892         unsigned int packets;
4893
4894         /* For non-gigabit speeds, just fix the interrupt rate at 4000
4895          * ints/sec - ITR timer value of 120 ticks.
4896          */
4897         switch (adapter->link_speed) {
4898         case SPEED_10:
4899         case SPEED_100:
4900                 new_val = IGB_4K_ITR;
4901                 goto set_itr_val;
4902         default:
4903                 break;
4904         }
4905
4906         packets = q_vector->rx.total_packets;
4907         if (packets)
4908                 avg_wire_size = q_vector->rx.total_bytes / packets;
4909
4910         packets = q_vector->tx.total_packets;
4911         if (packets)
4912                 avg_wire_size = max_t(u32, avg_wire_size,
4913                                       q_vector->tx.total_bytes / packets);
4914
4915         /* if avg_wire_size isn't set no work was done */
4916         if (!avg_wire_size)
4917                 goto clear_counts;
4918
4919         /* Add 24 bytes to size to account for CRC, preamble, and gap */
4920         avg_wire_size += 24;
4921
4922         /* Don't starve jumbo frames */
4923         avg_wire_size = min(avg_wire_size, 3000);
4924
4925         /* Give a little boost to mid-size frames */
4926         if ((avg_wire_size > 300) && (avg_wire_size < 1200))
4927                 new_val = avg_wire_size / 3;
4928         else
4929                 new_val = avg_wire_size / 2;
4930
4931         /* conservative mode (itr 3) eliminates the lowest_latency setting */
4932         if (new_val < IGB_20K_ITR &&
4933             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4934              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4935                 new_val = IGB_20K_ITR;
4936
4937 set_itr_val:
4938         if (new_val != q_vector->itr_val) {
4939                 q_vector->itr_val = new_val;
4940                 q_vector->set_itr = 1;
4941         }
4942 clear_counts:
4943         q_vector->rx.total_bytes = 0;
4944         q_vector->rx.total_packets = 0;
4945         q_vector->tx.total_bytes = 0;
4946         q_vector->tx.total_packets = 0;
4947 }
4948
4949 /**
4950  * igb_update_itr - update the dynamic ITR value based on statistics
4951  *      Stores a new ITR value based on packets and byte
4952  *      counts during the last interrupt.  The advantage of per interrupt
4953  *      computation is faster updates and more accurate ITR for the current
4954  *      traffic pattern.  Constants in this function were computed
4955  *      based on theoretical maximum wire speed and thresholds were set based
4956  *      on testing data as well as attempting to minimize response time
4957  *      while increasing bulk throughput.
4958  *      this functionality is controlled by the InterruptThrottleRate module
4959  *      parameter (see igb_param.c)
4960  *      NOTE:  These calculations are only valid when operating in a single-
4961  *             queue environment.
4962  * @q_vector: pointer to q_vector
4963  * @ring_container: ring info to update the itr for
4964  **/
4965 static void igb_update_itr(struct igb_q_vector *q_vector,
4966                            struct igb_ring_container *ring_container)
4967 {
4968         unsigned int packets = ring_container->total_packets;
4969         unsigned int bytes = ring_container->total_bytes;
4970         u8 itrval = ring_container->itr;
4971
4972         /* no packets, exit with status unchanged */
4973         if (packets == 0)
4974                 return;
4975
4976         switch (itrval) {
4977         case lowest_latency:
4978                 /* handle TSO and jumbo frames */
4979                 if (bytes/packets > 8000)
4980                         itrval = bulk_latency;
4981                 else if ((packets < 5) && (bytes > 512))
4982                         itrval = low_latency;
4983                 break;
4984         case low_latency:  /* 50 usec aka 20000 ints/s */
4985                 if (bytes > 10000) {
4986                         /* this if handles the TSO accounting */
4987                         if (bytes/packets > 8000) {
4988                                 itrval = bulk_latency;
4989                         } else if ((packets < 10) || ((bytes/packets) > 1200)) {
4990                                 itrval = bulk_latency;
4991                         } else if ((packets > 35)) {
4992                                 itrval = lowest_latency;
4993                         }
4994                 } else if (bytes/packets > 2000) {
4995                         itrval = bulk_latency;
4996                 } else if (packets <= 2 && bytes < 512) {
4997                         itrval = lowest_latency;
4998                 }
4999                 break;
5000         case bulk_latency: /* 250 usec aka 4000 ints/s */
5001                 if (bytes > 25000) {
5002                         if (packets > 35)
5003                                 itrval = low_latency;
5004                 } else if (bytes < 1500) {
5005                         itrval = low_latency;
5006                 }
5007                 break;
5008         }
5009
5010         /* clear work counters since we have the values we need */
5011         ring_container->total_bytes = 0;
5012         ring_container->total_packets = 0;
5013
5014         /* write updated itr to ring container */
5015         ring_container->itr = itrval;
5016 }
5017
5018 static void igb_set_itr(struct igb_q_vector *q_vector)
5019 {
5020         struct igb_adapter *adapter = q_vector->adapter;
5021         u32 new_itr = q_vector->itr_val;
5022         u8 current_itr = 0;
5023
5024         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
5025         switch (adapter->link_speed) {
5026         case SPEED_10:
5027         case SPEED_100:
5028                 current_itr = 0;
5029                 new_itr = IGB_4K_ITR;
5030                 goto set_itr_now;
5031         default:
5032                 break;
5033         }
5034
5035         igb_update_itr(q_vector, &q_vector->tx);
5036         igb_update_itr(q_vector, &q_vector->rx);
5037
5038         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
5039
5040         /* conservative mode (itr 3) eliminates the lowest_latency setting */
5041         if (current_itr == lowest_latency &&
5042             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
5043              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
5044                 current_itr = low_latency;
5045
5046         switch (current_itr) {
5047         /* counts and packets in update_itr are dependent on these numbers */
5048         case lowest_latency:
5049                 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
5050                 break;
5051         case low_latency:
5052                 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
5053                 break;
5054         case bulk_latency:
5055                 new_itr = IGB_4K_ITR;  /* 4,000 ints/sec */
5056                 break;
5057         default:
5058                 break;
5059         }
5060
5061 set_itr_now:
5062         if (new_itr != q_vector->itr_val) {
5063                 /* this attempts to bias the interrupt rate towards Bulk
5064                  * by adding intermediate steps when interrupt rate is
5065                  * increasing */
5066                 new_itr = new_itr > q_vector->itr_val ?
5067                              max((new_itr * q_vector->itr_val) /
5068                                  (new_itr + (q_vector->itr_val >> 2)),
5069                                  new_itr) :
5070                              new_itr;
5071                 /* Don't write the value here; it resets the adapter's
5072                  * internal timer, and causes us to delay far longer than
5073                  * we should between interrupts.  Instead, we write the ITR
5074                  * value at the beginning of the next interrupt so the timing
5075                  * ends up being correct.
5076                  */
5077                 q_vector->itr_val = new_itr;
5078                 q_vector->set_itr = 1;
5079         }
5080 }
5081
5082 void igb_tx_ctxtdesc(struct igb_ring *tx_ring, u32 vlan_macip_lens,
5083                      u32 type_tucmd, u32 mss_l4len_idx)
5084 {
5085         struct e1000_adv_tx_context_desc *context_desc;
5086         u16 i = tx_ring->next_to_use;
5087
5088         context_desc = IGB_TX_CTXTDESC(tx_ring, i);
5089
5090         i++;
5091         tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
5092
5093         /* set bits to identify this as an advanced context descriptor */
5094         type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
5095
5096         /* For 82575, context index must be unique per ring. */
5097         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5098                 mss_l4len_idx |= tx_ring->reg_idx << 4;
5099
5100         context_desc->vlan_macip_lens   = cpu_to_le32(vlan_macip_lens);
5101         context_desc->seqnum_seed       = 0;
5102         context_desc->type_tucmd_mlhl   = cpu_to_le32(type_tucmd);
5103         context_desc->mss_l4len_idx     = cpu_to_le32(mss_l4len_idx);
5104 }
5105
5106 static int igb_tso(struct igb_ring *tx_ring,
5107                    struct igb_tx_buffer *first,
5108                    u8 *hdr_len)
5109 {
5110 #ifdef NETIF_F_TSO
5111         struct sk_buff *skb = first->skb;
5112         u32 vlan_macip_lens, type_tucmd;
5113         u32 mss_l4len_idx, l4len;
5114
5115         if (skb->ip_summed != CHECKSUM_PARTIAL)
5116                 return 0;
5117
5118         if (!skb_is_gso(skb))
5119 #endif /* NETIF_F_TSO */
5120                 return 0;
5121 #ifdef NETIF_F_TSO
5122
5123         if (skb_header_cloned(skb)) {
5124                 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
5125                 if (err)
5126                         return err;
5127         }
5128
5129         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
5130         type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
5131
5132         if (first->protocol == __constant_htons(ETH_P_IP)) {
5133                 struct iphdr *iph = ip_hdr(skb);
5134                 iph->tot_len = 0;
5135                 iph->check = 0;
5136                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
5137                                                          iph->daddr, 0,
5138                                                          IPPROTO_TCP,
5139                                                          0);
5140                 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
5141                 first->tx_flags |= IGB_TX_FLAGS_TSO |
5142                                    IGB_TX_FLAGS_CSUM |
5143                                    IGB_TX_FLAGS_IPV4;
5144 #ifdef NETIF_F_TSO6
5145         } else if (skb_is_gso_v6(skb)) {
5146                 ipv6_hdr(skb)->payload_len = 0;
5147                 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
5148                                                        &ipv6_hdr(skb)->daddr,
5149                                                        0, IPPROTO_TCP, 0);
5150                 first->tx_flags |= IGB_TX_FLAGS_TSO |
5151                                    IGB_TX_FLAGS_CSUM;
5152 #endif
5153         }
5154
5155         /* compute header lengths */
5156         l4len = tcp_hdrlen(skb);
5157         *hdr_len = skb_transport_offset(skb) + l4len;
5158
5159         /* update gso size and bytecount with header size */
5160         first->gso_segs = skb_shinfo(skb)->gso_segs;
5161         first->bytecount += (first->gso_segs - 1) * *hdr_len;
5162
5163         /* MSS L4LEN IDX */
5164         mss_l4len_idx = l4len << E1000_ADVTXD_L4LEN_SHIFT;
5165         mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
5166
5167         /* VLAN MACLEN IPLEN */
5168         vlan_macip_lens = skb_network_header_len(skb);
5169         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
5170         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5171
5172         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
5173
5174         return 1;
5175 #endif  /* NETIF_F_TSO */
5176 }
5177
5178 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
5179 {
5180         struct sk_buff *skb = first->skb;
5181         u32 vlan_macip_lens = 0;
5182         u32 mss_l4len_idx = 0;
5183         u32 type_tucmd = 0;
5184
5185         if (skb->ip_summed != CHECKSUM_PARTIAL) {
5186                 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN))
5187                         return;
5188         } else {
5189                 u8 nexthdr = 0;
5190                 switch (first->protocol) {
5191                 case __constant_htons(ETH_P_IP):
5192                         vlan_macip_lens |= skb_network_header_len(skb);
5193                         type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
5194                         nexthdr = ip_hdr(skb)->protocol;
5195                         break;
5196 #ifdef NETIF_F_IPV6_CSUM
5197                 case __constant_htons(ETH_P_IPV6):
5198                         vlan_macip_lens |= skb_network_header_len(skb);
5199                         nexthdr = ipv6_hdr(skb)->nexthdr;
5200                         break;
5201 #endif
5202                 default:
5203                         if (unlikely(net_ratelimit())) {
5204                                 dev_warn(tx_ring->dev,
5205                                  "partial checksum but proto=%x!\n",
5206                                  first->protocol);
5207                         }
5208                         break;
5209                 }
5210
5211                 switch (nexthdr) {
5212                 case IPPROTO_TCP:
5213                         type_tucmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
5214                         mss_l4len_idx = tcp_hdrlen(skb) <<
5215                                         E1000_ADVTXD_L4LEN_SHIFT;
5216                         break;
5217 #ifdef HAVE_SCTP
5218                 case IPPROTO_SCTP:
5219                         type_tucmd |= E1000_ADVTXD_TUCMD_L4T_SCTP;
5220                         mss_l4len_idx = sizeof(struct sctphdr) <<
5221                                         E1000_ADVTXD_L4LEN_SHIFT;
5222                         break;
5223 #endif
5224                 case IPPROTO_UDP:
5225                         mss_l4len_idx = sizeof(struct udphdr) <<
5226                                         E1000_ADVTXD_L4LEN_SHIFT;
5227                         break;
5228                 default:
5229                         if (unlikely(net_ratelimit())) {
5230                                 dev_warn(tx_ring->dev,
5231                                  "partial checksum but l4 proto=%x!\n",
5232                                  nexthdr);
5233                         }
5234                         break;
5235                 }
5236
5237                 /* update TX checksum flag */
5238                 first->tx_flags |= IGB_TX_FLAGS_CSUM;
5239         }
5240
5241         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
5242         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5243
5244         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
5245 }
5246
5247 #define IGB_SET_FLAG(_input, _flag, _result) \
5248         ((_flag <= _result) ? \
5249          ((u32)(_input & _flag) * (_result / _flag)) : \
5250          ((u32)(_input & _flag) / (_flag / _result)))
5251
5252 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
5253 {
5254         /* set type for advanced descriptor with frame checksum insertion */
5255         u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
5256                        E1000_ADVTXD_DCMD_DEXT |
5257                        E1000_ADVTXD_DCMD_IFCS;
5258
5259         /* set HW vlan bit if vlan is present */
5260         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
5261                                  (E1000_ADVTXD_DCMD_VLE));
5262
5263         /* set segmentation bits for TSO */
5264         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
5265                                  (E1000_ADVTXD_DCMD_TSE));
5266
5267         /* set timestamp bit if present */
5268         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
5269                                  (E1000_ADVTXD_MAC_TSTAMP));
5270
5271         return cmd_type;
5272 }
5273
5274 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
5275                                  union e1000_adv_tx_desc *tx_desc,
5276                                  u32 tx_flags, unsigned int paylen)
5277 {
5278         u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
5279
5280         /* 82575 requires a unique index per ring */
5281         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5282                 olinfo_status |= tx_ring->reg_idx << 4;
5283
5284         /* insert L4 checksum */
5285         olinfo_status |= IGB_SET_FLAG(tx_flags,
5286                                       IGB_TX_FLAGS_CSUM,
5287                                       (E1000_TXD_POPTS_TXSM << 8));
5288
5289         /* insert IPv4 checksum */
5290         olinfo_status |= IGB_SET_FLAG(tx_flags,
5291                                       IGB_TX_FLAGS_IPV4,
5292                                       (E1000_TXD_POPTS_IXSM << 8));
5293
5294         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
5295 }
5296
5297 static void igb_tx_map(struct igb_ring *tx_ring,
5298                        struct igb_tx_buffer *first,
5299                        const u8 hdr_len)
5300 {
5301         struct sk_buff *skb = first->skb;
5302         struct igb_tx_buffer *tx_buffer;
5303         union e1000_adv_tx_desc *tx_desc;
5304         struct skb_frag_struct *frag;
5305         dma_addr_t dma;
5306         unsigned int data_len, size;
5307         u32 tx_flags = first->tx_flags;
5308         u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
5309         u16 i = tx_ring->next_to_use;
5310
5311         tx_desc = IGB_TX_DESC(tx_ring, i);
5312
5313         igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
5314
5315         size = skb_headlen(skb);
5316         data_len = skb->data_len;
5317
5318         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
5319
5320         tx_buffer = first;
5321
5322         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
5323                 if (dma_mapping_error(tx_ring->dev, dma))
5324                         goto dma_error;
5325
5326                 /* record length, and DMA address */
5327                 dma_unmap_len_set(tx_buffer, len, size);
5328                 dma_unmap_addr_set(tx_buffer, dma, dma);
5329
5330                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
5331
5332                 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
5333                         tx_desc->read.cmd_type_len =
5334                                 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
5335
5336                         i++;
5337                         tx_desc++;
5338                         if (i == tx_ring->count) {
5339                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
5340                                 i = 0;
5341                         }
5342                         tx_desc->read.olinfo_status = 0;
5343
5344                         dma += IGB_MAX_DATA_PER_TXD;
5345                         size -= IGB_MAX_DATA_PER_TXD;
5346
5347                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
5348                 }
5349
5350                 if (likely(!data_len))
5351                         break;
5352
5353                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
5354
5355                 i++;
5356                 tx_desc++;
5357                 if (i == tx_ring->count) {
5358                         tx_desc = IGB_TX_DESC(tx_ring, 0);
5359                         i = 0;
5360                 }
5361                 tx_desc->read.olinfo_status = 0;
5362
5363                 size = skb_frag_size(frag);
5364                 data_len -= size;
5365
5366                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
5367                                        size, DMA_TO_DEVICE);
5368
5369                 tx_buffer = &tx_ring->tx_buffer_info[i];
5370         }
5371
5372         /* write last descriptor with RS and EOP bits */
5373         cmd_type |= size | IGB_TXD_DCMD;
5374         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
5375
5376         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
5377         /* set the timestamp */
5378         first->time_stamp = jiffies;
5379
5380         /*
5381          * Force memory writes to complete before letting h/w know there
5382          * are new descriptors to fetch.  (Only applicable for weak-ordered
5383          * memory model archs, such as IA-64).
5384          *
5385          * We also need this memory barrier to make certain all of the
5386          * status bits have been updated before next_to_watch is written.
5387          */
5388         wmb();
5389
5390         /* set next_to_watch value indicating a packet is present */
5391         first->next_to_watch = tx_desc;
5392
5393         i++;
5394         if (i == tx_ring->count)
5395                 i = 0;
5396
5397         tx_ring->next_to_use = i;
5398
5399         writel(i, tx_ring->tail);
5400
5401         /* we need this if more than one processor can write to our tail
5402          * at a time, it syncronizes IO on IA64/Altix systems */
5403         mmiowb();
5404
5405         return;
5406
5407 dma_error:
5408         dev_err(tx_ring->dev, "TX DMA map failed\n");
5409
5410         /* clear dma mappings for failed tx_buffer_info map */
5411         for (;;) {
5412                 tx_buffer = &tx_ring->tx_buffer_info[i];
5413                 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer);
5414                 if (tx_buffer == first)
5415                         break;
5416                 if (i == 0)
5417                         i = tx_ring->count;
5418                 i--;
5419         }
5420
5421         tx_ring->next_to_use = i;
5422 }
5423
5424 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5425 {
5426         struct net_device *netdev = netdev_ring(tx_ring);
5427
5428         if (netif_is_multiqueue(netdev))
5429                 netif_stop_subqueue(netdev, ring_queue_index(tx_ring));
5430         else
5431                 netif_stop_queue(netdev);
5432
5433         /* Herbert's original patch had:
5434          *  smp_mb__after_netif_stop_queue();
5435          * but since that doesn't exist yet, just open code it. */
5436         smp_mb();
5437
5438         /* We need to check again in a case another CPU has just
5439          * made room available. */
5440         if (igb_desc_unused(tx_ring) < size)
5441                 return -EBUSY;
5442
5443         /* A reprieve! */
5444         if (netif_is_multiqueue(netdev))
5445                 netif_wake_subqueue(netdev, ring_queue_index(tx_ring));
5446         else
5447                 netif_wake_queue(netdev);
5448
5449         tx_ring->tx_stats.restart_queue++;
5450
5451         return 0;
5452 }
5453
5454 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5455 {
5456         if (igb_desc_unused(tx_ring) >= size)
5457                 return 0;
5458         return __igb_maybe_stop_tx(tx_ring, size);
5459 }
5460
5461 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
5462                                 struct igb_ring *tx_ring)
5463 {
5464         struct igb_tx_buffer *first;
5465         int tso;
5466         u32 tx_flags = 0;
5467 #if PAGE_SIZE > IGB_MAX_DATA_PER_TXD
5468         unsigned short f;
5469 #endif
5470         u16 count = TXD_USE_COUNT(skb_headlen(skb));
5471         __be16 protocol = vlan_get_protocol(skb);
5472         u8 hdr_len = 0;
5473
5474         /*
5475          * need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
5476          *       + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
5477          *       + 2 desc gap to keep tail from touching head,
5478          *       + 1 desc for context descriptor,
5479          * otherwise try next time
5480          */
5481 #if PAGE_SIZE > IGB_MAX_DATA_PER_TXD
5482         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
5483                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
5484 #else
5485         count += skb_shinfo(skb)->nr_frags;
5486 #endif
5487         if (igb_maybe_stop_tx(tx_ring, count + 3)) {
5488                 /* this is a hard error */
5489                 return NETDEV_TX_BUSY;
5490         }
5491
5492         /* record the location of the first descriptor for this packet */
5493         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
5494         first->skb = skb;
5495         first->bytecount = skb->len;
5496         first->gso_segs = 1;
5497
5498         skb_tx_timestamp(skb);
5499
5500 #ifdef HAVE_PTP_1588_CLOCK
5501         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
5502                 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
5503                 if (!adapter->ptp_tx_skb) {
5504                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5505                         tx_flags |= IGB_TX_FLAGS_TSTAMP;
5506
5507                         adapter->ptp_tx_skb = skb_get(skb);
5508                         adapter->ptp_tx_start = jiffies;
5509                         if (adapter->hw.mac.type == e1000_82576)
5510                                 schedule_work(&adapter->ptp_tx_work);
5511                 }
5512         }
5513 #endif /* HAVE_PTP_1588_CLOCK */
5514
5515         if (vlan_tx_tag_present(skb)) {
5516                 tx_flags |= IGB_TX_FLAGS_VLAN;
5517                 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
5518         }
5519
5520         /* record initial flags and protocol */
5521         first->tx_flags = tx_flags;
5522         first->protocol = protocol;
5523
5524         tso = igb_tso(tx_ring, first, &hdr_len);
5525         if (tso < 0)
5526                 goto out_drop;
5527         else if (!tso)
5528                 igb_tx_csum(tx_ring, first);
5529
5530         igb_tx_map(tx_ring, first, hdr_len);
5531
5532 #ifndef HAVE_TRANS_START_IN_QUEUE
5533         netdev_ring(tx_ring)->trans_start = jiffies;
5534
5535 #endif
5536         /* Make sure there is space in the ring for the next send. */
5537         igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
5538
5539         return NETDEV_TX_OK;
5540
5541 out_drop:
5542         igb_unmap_and_free_tx_resource(tx_ring, first);
5543
5544         return NETDEV_TX_OK;
5545 }
5546
5547 #ifdef HAVE_TX_MQ
5548 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
5549                                                     struct sk_buff *skb)
5550 {
5551         unsigned int r_idx = skb->queue_mapping;
5552
5553         if (r_idx >= adapter->num_tx_queues)
5554                 r_idx = r_idx % adapter->num_tx_queues;
5555
5556         return adapter->tx_ring[r_idx];
5557 }
5558 #else
5559 #define igb_tx_queue_mapping(_adapter, _skb) (_adapter)->tx_ring[0]
5560 #endif
5561
5562 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
5563                                   struct net_device *netdev)
5564 {
5565         struct igb_adapter *adapter = netdev_priv(netdev);
5566
5567         if (test_bit(__IGB_DOWN, &adapter->state)) {
5568                 dev_kfree_skb_any(skb);
5569                 return NETDEV_TX_OK;
5570         }
5571
5572         if (skb->len <= 0) {
5573                 dev_kfree_skb_any(skb);
5574                 return NETDEV_TX_OK;
5575         }
5576
5577         /*
5578          * The minimum packet size with TCTL.PSP set is 17 so pad the skb
5579          * in order to meet this minimum size requirement.
5580          */
5581         if (skb->len < 17) {
5582                 if (skb_padto(skb, 17))
5583                         return NETDEV_TX_OK;
5584                 skb->len = 17;
5585         }
5586
5587         return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
5588 }
5589
5590 /**
5591  * igb_tx_timeout - Respond to a Tx Hang
5592  * @netdev: network interface device structure
5593  **/
5594 static void igb_tx_timeout(struct net_device *netdev)
5595 {
5596         struct igb_adapter *adapter = netdev_priv(netdev);
5597         struct e1000_hw *hw = &adapter->hw;
5598
5599         /* Do the reset outside of interrupt context */
5600         adapter->tx_timeout_count++;
5601
5602         if (hw->mac.type >= e1000_82580)
5603                 hw->dev_spec._82575.global_device_reset = true;
5604
5605         schedule_work(&adapter->reset_task);
5606         E1000_WRITE_REG(hw, E1000_EICS,
5607                         (adapter->eims_enable_mask & ~adapter->eims_other));
5608 }
5609
5610 static void igb_reset_task(struct work_struct *work)
5611 {
5612         struct igb_adapter *adapter;
5613         adapter = container_of(work, struct igb_adapter, reset_task);
5614
5615         igb_reinit_locked(adapter);
5616 }
5617
5618 /**
5619  * igb_get_stats - Get System Network Statistics
5620  * @netdev: network interface device structure
5621  *
5622  * Returns the address of the device statistics structure.
5623  * The statistics are updated here and also from the timer callback.
5624  **/
5625 static struct net_device_stats *igb_get_stats(struct net_device *netdev)
5626 {
5627         struct igb_adapter *adapter = netdev_priv(netdev);
5628
5629         if (!test_bit(__IGB_RESETTING, &adapter->state))
5630                 igb_update_stats(adapter);
5631
5632 #ifdef HAVE_NETDEV_STATS_IN_NETDEV
5633         /* only return the current stats */
5634         return &netdev->stats;
5635 #else
5636         /* only return the current stats */
5637         return &adapter->net_stats;
5638 #endif /* HAVE_NETDEV_STATS_IN_NETDEV */
5639 }
5640
5641 /**
5642  * igb_change_mtu - Change the Maximum Transfer Unit
5643  * @netdev: network interface device structure
5644  * @new_mtu: new value for maximum frame size
5645  *
5646  * Returns 0 on success, negative on failure
5647  **/
5648 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
5649 {
5650         struct igb_adapter *adapter = netdev_priv(netdev);
5651         struct e1000_hw *hw = &adapter->hw;
5652         struct pci_dev *pdev = adapter->pdev;
5653         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
5654
5655         if ((new_mtu < 68) || (max_frame > MAX_JUMBO_FRAME_SIZE)) {
5656                 dev_err(pci_dev_to_dev(pdev), "Invalid MTU setting\n");
5657                 return -EINVAL;
5658         }
5659
5660 #define MAX_STD_JUMBO_FRAME_SIZE 9238
5661         if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
5662                 dev_err(pci_dev_to_dev(pdev), "MTU > 9216 not supported.\n");
5663                 return -EINVAL;
5664         }
5665
5666         /* adjust max frame to be at least the size of a standard frame */
5667         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
5668                 max_frame = ETH_FRAME_LEN + ETH_FCS_LEN;
5669
5670         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
5671                 usleep_range(1000, 2000);
5672
5673         /* igb_down has a dependency on max_frame_size */
5674         adapter->max_frame_size = max_frame;
5675
5676         if (netif_running(netdev))
5677                 igb_down(adapter);
5678
5679         dev_info(pci_dev_to_dev(pdev), "changing MTU from %d to %d\n",
5680                 netdev->mtu, new_mtu);
5681         netdev->mtu = new_mtu;
5682         hw->dev_spec._82575.mtu = new_mtu;
5683
5684         if (netif_running(netdev))
5685                 igb_up(adapter);
5686         else
5687                 igb_reset(adapter);
5688
5689         clear_bit(__IGB_RESETTING, &adapter->state);
5690
5691         return 0;
5692 }
5693
5694 /**
5695  * igb_update_stats - Update the board statistics counters
5696  * @adapter: board private structure
5697  **/
5698
5699 void igb_update_stats(struct igb_adapter *adapter)
5700 {
5701 #ifdef HAVE_NETDEV_STATS_IN_NETDEV
5702         struct net_device_stats *net_stats = &adapter->netdev->stats;
5703 #else
5704         struct net_device_stats *net_stats = &adapter->net_stats;
5705 #endif /* HAVE_NETDEV_STATS_IN_NETDEV */
5706         struct e1000_hw *hw = &adapter->hw;
5707 #ifdef HAVE_PCI_ERS
5708         struct pci_dev *pdev = adapter->pdev;
5709 #endif
5710         u32 reg, mpc;
5711         u16 phy_tmp;
5712         int i;
5713         u64 bytes, packets;
5714 #ifndef IGB_NO_LRO
5715         u32 flushed = 0, coal = 0;
5716         struct igb_q_vector *q_vector;
5717 #endif
5718
5719 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
5720
5721         /*
5722          * Prevent stats update while adapter is being reset, or if the pci
5723          * connection is down.
5724          */
5725         if (adapter->link_speed == 0)
5726                 return;
5727 #ifdef HAVE_PCI_ERS
5728         if (pci_channel_offline(pdev))
5729                 return;
5730
5731 #endif
5732 #ifndef IGB_NO_LRO
5733         for (i = 0; i < adapter->num_q_vectors; i++) {
5734                 q_vector = adapter->q_vector[i];
5735                 if (!q_vector)
5736                         continue;
5737                 flushed += q_vector->lrolist.stats.flushed;
5738                 coal += q_vector->lrolist.stats.coal;
5739         }
5740         adapter->lro_stats.flushed = flushed;
5741         adapter->lro_stats.coal = coal;
5742
5743 #endif
5744         bytes = 0;
5745         packets = 0;
5746         for (i = 0; i < adapter->num_rx_queues; i++) {
5747                 u32 rqdpc_tmp = E1000_READ_REG(hw, E1000_RQDPC(i)) & 0x0FFF;
5748                 struct igb_ring *ring = adapter->rx_ring[i];
5749                 ring->rx_stats.drops += rqdpc_tmp;
5750                 net_stats->rx_fifo_errors += rqdpc_tmp;
5751 #ifdef CONFIG_IGB_VMDQ_NETDEV
5752                 if (!ring->vmdq_netdev) {
5753                         bytes += ring->rx_stats.bytes;
5754                         packets += ring->rx_stats.packets;
5755                 }
5756 #else
5757                 bytes += ring->rx_stats.bytes;
5758                 packets += ring->rx_stats.packets;
5759 #endif
5760         }
5761
5762         net_stats->rx_bytes = bytes;
5763         net_stats->rx_packets = packets;
5764
5765         bytes = 0;
5766         packets = 0;
5767         for (i = 0; i < adapter->num_tx_queues; i++) {
5768                 struct igb_ring *ring = adapter->tx_ring[i];
5769 #ifdef CONFIG_IGB_VMDQ_NETDEV
5770                 if (!ring->vmdq_netdev) {
5771                         bytes += ring->tx_stats.bytes;
5772                         packets += ring->tx_stats.packets;
5773                 }
5774 #else
5775                 bytes += ring->tx_stats.bytes;
5776                 packets += ring->tx_stats.packets;
5777 #endif
5778         }
5779         net_stats->tx_bytes = bytes;
5780         net_stats->tx_packets = packets;
5781
5782         /* read stats registers */
5783         adapter->stats.crcerrs += E1000_READ_REG(hw, E1000_CRCERRS);
5784         adapter->stats.gprc += E1000_READ_REG(hw, E1000_GPRC);
5785         adapter->stats.gorc += E1000_READ_REG(hw, E1000_GORCL);
5786         E1000_READ_REG(hw, E1000_GORCH); /* clear GORCL */
5787         adapter->stats.bprc += E1000_READ_REG(hw, E1000_BPRC);
5788         adapter->stats.mprc += E1000_READ_REG(hw, E1000_MPRC);
5789         adapter->stats.roc += E1000_READ_REG(hw, E1000_ROC);
5790
5791         adapter->stats.prc64 += E1000_READ_REG(hw, E1000_PRC64);
5792         adapter->stats.prc127 += E1000_READ_REG(hw, E1000_PRC127);
5793         adapter->stats.prc255 += E1000_READ_REG(hw, E1000_PRC255);
5794         adapter->stats.prc511 += E1000_READ_REG(hw, E1000_PRC511);
5795         adapter->stats.prc1023 += E1000_READ_REG(hw, E1000_PRC1023);
5796         adapter->stats.prc1522 += E1000_READ_REG(hw, E1000_PRC1522);
5797         adapter->stats.symerrs += E1000_READ_REG(hw, E1000_SYMERRS);
5798         adapter->stats.sec += E1000_READ_REG(hw, E1000_SEC);
5799
5800         mpc = E1000_READ_REG(hw, E1000_MPC);
5801         adapter->stats.mpc += mpc;
5802         net_stats->rx_fifo_errors += mpc;
5803         adapter->stats.scc += E1000_READ_REG(hw, E1000_SCC);
5804         adapter->stats.ecol += E1000_READ_REG(hw, E1000_ECOL);
5805         adapter->stats.mcc += E1000_READ_REG(hw, E1000_MCC);
5806         adapter->stats.latecol += E1000_READ_REG(hw, E1000_LATECOL);
5807         adapter->stats.dc += E1000_READ_REG(hw, E1000_DC);
5808         adapter->stats.rlec += E1000_READ_REG(hw, E1000_RLEC);
5809         adapter->stats.xonrxc += E1000_READ_REG(hw, E1000_XONRXC);
5810         adapter->stats.xontxc += E1000_READ_REG(hw, E1000_XONTXC);
5811         adapter->stats.xoffrxc += E1000_READ_REG(hw, E1000_XOFFRXC);
5812         adapter->stats.xofftxc += E1000_READ_REG(hw, E1000_XOFFTXC);
5813         adapter->stats.fcruc += E1000_READ_REG(hw, E1000_FCRUC);
5814         adapter->stats.gptc += E1000_READ_REG(hw, E1000_GPTC);
5815         adapter->stats.gotc += E1000_READ_REG(hw, E1000_GOTCL);
5816         E1000_READ_REG(hw, E1000_GOTCH); /* clear GOTCL */
5817         adapter->stats.rnbc += E1000_READ_REG(hw, E1000_RNBC);
5818         adapter->stats.ruc += E1000_READ_REG(hw, E1000_RUC);
5819         adapter->stats.rfc += E1000_READ_REG(hw, E1000_RFC);
5820         adapter->stats.rjc += E1000_READ_REG(hw, E1000_RJC);
5821         adapter->stats.tor += E1000_READ_REG(hw, E1000_TORH);
5822         adapter->stats.tot += E1000_READ_REG(hw, E1000_TOTH);
5823         adapter->stats.tpr += E1000_READ_REG(hw, E1000_TPR);
5824
5825         adapter->stats.ptc64 += E1000_READ_REG(hw, E1000_PTC64);
5826         adapter->stats.ptc127 += E1000_READ_REG(hw, E1000_PTC127);
5827         adapter->stats.ptc255 += E1000_READ_REG(hw, E1000_PTC255);
5828         adapter->stats.ptc511 += E1000_READ_REG(hw, E1000_PTC511);
5829         adapter->stats.ptc1023 += E1000_READ_REG(hw, E1000_PTC1023);
5830         adapter->stats.ptc1522 += E1000_READ_REG(hw, E1000_PTC1522);
5831
5832         adapter->stats.mptc += E1000_READ_REG(hw, E1000_MPTC);
5833         adapter->stats.bptc += E1000_READ_REG(hw, E1000_BPTC);
5834
5835         adapter->stats.tpt += E1000_READ_REG(hw, E1000_TPT);
5836         adapter->stats.colc += E1000_READ_REG(hw, E1000_COLC);
5837
5838         adapter->stats.algnerrc += E1000_READ_REG(hw, E1000_ALGNERRC);
5839         /* read internal phy sepecific stats */
5840         reg = E1000_READ_REG(hw, E1000_CTRL_EXT);
5841         if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
5842                 adapter->stats.rxerrc += E1000_READ_REG(hw, E1000_RXERRC);
5843
5844                 /* this stat has invalid values on i210/i211 */
5845                 if ((hw->mac.type != e1000_i210) &&
5846                     (hw->mac.type != e1000_i211))
5847                         adapter->stats.tncrs += E1000_READ_REG(hw, E1000_TNCRS);
5848         }
5849         adapter->stats.tsctc += E1000_READ_REG(hw, E1000_TSCTC);
5850         adapter->stats.tsctfc += E1000_READ_REG(hw, E1000_TSCTFC);
5851
5852         adapter->stats.iac += E1000_READ_REG(hw, E1000_IAC);
5853         adapter->stats.icrxoc += E1000_READ_REG(hw, E1000_ICRXOC);
5854         adapter->stats.icrxptc += E1000_READ_REG(hw, E1000_ICRXPTC);
5855         adapter->stats.icrxatc += E1000_READ_REG(hw, E1000_ICRXATC);
5856         adapter->stats.ictxptc += E1000_READ_REG(hw, E1000_ICTXPTC);
5857         adapter->stats.ictxatc += E1000_READ_REG(hw, E1000_ICTXATC);
5858         adapter->stats.ictxqec += E1000_READ_REG(hw, E1000_ICTXQEC);
5859         adapter->stats.ictxqmtc += E1000_READ_REG(hw, E1000_ICTXQMTC);
5860         adapter->stats.icrxdmtc += E1000_READ_REG(hw, E1000_ICRXDMTC);
5861
5862         /* Fill out the OS statistics structure */
5863         net_stats->multicast = adapter->stats.mprc;
5864         net_stats->collisions = adapter->stats.colc;
5865
5866         /* Rx Errors */
5867
5868         /* RLEC on some newer hardware can be incorrect so build
5869          * our own version based on RUC and ROC */
5870         net_stats->rx_errors = adapter->stats.rxerrc +
5871                 adapter->stats.crcerrs + adapter->stats.algnerrc +
5872                 adapter->stats.ruc + adapter->stats.roc +
5873                 adapter->stats.cexterr;
5874         net_stats->rx_length_errors = adapter->stats.ruc +
5875                                       adapter->stats.roc;
5876         net_stats->rx_crc_errors = adapter->stats.crcerrs;
5877         net_stats->rx_frame_errors = adapter->stats.algnerrc;
5878         net_stats->rx_missed_errors = adapter->stats.mpc;
5879
5880         /* Tx Errors */
5881         net_stats->tx_errors = adapter->stats.ecol +
5882                                adapter->stats.latecol;
5883         net_stats->tx_aborted_errors = adapter->stats.ecol;
5884         net_stats->tx_window_errors = adapter->stats.latecol;
5885         net_stats->tx_carrier_errors = adapter->stats.tncrs;
5886
5887         /* Tx Dropped needs to be maintained elsewhere */
5888
5889         /* Phy Stats */
5890         if (hw->phy.media_type == e1000_media_type_copper) {
5891                 if ((adapter->link_speed == SPEED_1000) &&
5892                    (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
5893                         phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
5894                         adapter->phy_stats.idle_errors += phy_tmp;
5895                 }
5896         }
5897
5898         /* Management Stats */
5899         adapter->stats.mgptc += E1000_READ_REG(hw, E1000_MGTPTC);
5900         adapter->stats.mgprc += E1000_READ_REG(hw, E1000_MGTPRC);
5901         if (hw->mac.type > e1000_82580) {
5902                 adapter->stats.o2bgptc += E1000_READ_REG(hw, E1000_O2BGPTC);
5903                 adapter->stats.o2bspc += E1000_READ_REG(hw, E1000_O2BSPC);
5904                 adapter->stats.b2ospc += E1000_READ_REG(hw, E1000_B2OSPC);
5905                 adapter->stats.b2ogprc += E1000_READ_REG(hw, E1000_B2OGPRC);
5906         }
5907 }
5908
5909 static irqreturn_t igb_msix_other(int irq, void *data)
5910 {
5911         struct igb_adapter *adapter = data;
5912         struct e1000_hw *hw = &adapter->hw;
5913         u32 icr = E1000_READ_REG(hw, E1000_ICR);
5914         /* reading ICR causes bit 31 of EICR to be cleared */
5915
5916         if (icr & E1000_ICR_DRSTA)
5917                 schedule_work(&adapter->reset_task);
5918
5919         if (icr & E1000_ICR_DOUTSYNC) {
5920                 /* HW is reporting DMA is out of sync */
5921                 adapter->stats.doosync++;
5922                 /* The DMA Out of Sync is also indication of a spoof event
5923                  * in IOV mode. Check the Wrong VM Behavior register to
5924                  * see if it is really a spoof event. */
5925                 igb_check_wvbr(adapter);
5926         }
5927
5928         /* Check for a mailbox event */
5929         if (icr & E1000_ICR_VMMB)
5930                 igb_msg_task(adapter);
5931
5932         if (icr & E1000_ICR_LSC) {
5933                 hw->mac.get_link_status = 1;
5934                 /* guard against interrupt when we're going down */
5935                 if (!test_bit(__IGB_DOWN, &adapter->state))
5936                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
5937         }
5938
5939 #ifdef HAVE_PTP_1588_CLOCK
5940         if (icr & E1000_ICR_TS) {
5941                 u32 tsicr = E1000_READ_REG(hw, E1000_TSICR);
5942
5943                 if (tsicr & E1000_TSICR_TXTS) {
5944                         /* acknowledge the interrupt */
5945                         E1000_WRITE_REG(hw, E1000_TSICR, E1000_TSICR_TXTS);
5946                         /* retrieve hardware timestamp */
5947                         schedule_work(&adapter->ptp_tx_work);
5948                 }
5949         }
5950 #endif /* HAVE_PTP_1588_CLOCK */
5951
5952         /* Check for MDD event */
5953         if (icr & E1000_ICR_MDDET)
5954                 igb_process_mdd_event(adapter);
5955
5956         E1000_WRITE_REG(hw, E1000_EIMS, adapter->eims_other);
5957
5958         return IRQ_HANDLED;
5959 }
5960
5961 static void igb_write_itr(struct igb_q_vector *q_vector)
5962 {
5963         struct igb_adapter *adapter = q_vector->adapter;
5964         u32 itr_val = q_vector->itr_val & 0x7FFC;
5965
5966         if (!q_vector->set_itr)
5967                 return;
5968
5969         if (!itr_val)
5970                 itr_val = 0x4;
5971
5972         if (adapter->hw.mac.type == e1000_82575)
5973                 itr_val |= itr_val << 16;
5974         else
5975                 itr_val |= E1000_EITR_CNT_IGNR;
5976
5977         writel(itr_val, q_vector->itr_register);
5978         q_vector->set_itr = 0;
5979 }
5980
5981 static irqreturn_t igb_msix_ring(int irq, void *data)
5982 {
5983         struct igb_q_vector *q_vector = data;
5984
5985         /* Write the ITR value calculated from the previous interrupt. */
5986         igb_write_itr(q_vector);
5987
5988         napi_schedule(&q_vector->napi);
5989
5990         return IRQ_HANDLED;
5991 }
5992
5993 #ifdef IGB_DCA
5994 static void igb_update_tx_dca(struct igb_adapter *adapter,
5995                               struct igb_ring *tx_ring,
5996                               int cpu)
5997 {
5998         struct e1000_hw *hw = &adapter->hw;
5999         u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
6000
6001         if (hw->mac.type != e1000_82575)
6002                 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT_82576;
6003
6004         /*
6005          * We can enable relaxed ordering for reads, but not writes when
6006          * DCA is enabled.  This is due to a known issue in some chipsets
6007          * which will cause the DCA tag to be cleared.
6008          */
6009         txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
6010                   E1000_DCA_TXCTRL_DATA_RRO_EN |
6011                   E1000_DCA_TXCTRL_DESC_DCA_EN;
6012
6013         E1000_WRITE_REG(hw, E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
6014 }
6015
6016 static void igb_update_rx_dca(struct igb_adapter *adapter,
6017                               struct igb_ring *rx_ring,
6018                               int cpu)
6019 {
6020         struct e1000_hw *hw = &adapter->hw;
6021         u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
6022
6023         if (hw->mac.type != e1000_82575)
6024                 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT_82576;
6025
6026         /*
6027          * We can enable relaxed ordering for reads, but not writes when
6028          * DCA is enabled.  This is due to a known issue in some chipsets
6029          * which will cause the DCA tag to be cleared.
6030          */
6031         rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
6032                   E1000_DCA_RXCTRL_DESC_DCA_EN;
6033
6034         E1000_WRITE_REG(hw, E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
6035 }
6036
6037 static void igb_update_dca(struct igb_q_vector *q_vector)
6038 {
6039         struct igb_adapter *adapter = q_vector->adapter;
6040         int cpu = get_cpu();
6041
6042         if (q_vector->cpu == cpu)
6043                 goto out_no_update;
6044
6045         if (q_vector->tx.ring)
6046                 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
6047
6048         if (q_vector->rx.ring)
6049                 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
6050
6051         q_vector->cpu = cpu;
6052 out_no_update:
6053         put_cpu();
6054 }
6055
6056 static void igb_setup_dca(struct igb_adapter *adapter)
6057 {
6058         struct e1000_hw *hw = &adapter->hw;
6059         int i;
6060
6061         if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
6062                 return;
6063
6064         /* Always use CB2 mode, difference is masked in the CB driver. */
6065         E1000_WRITE_REG(hw, E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
6066
6067         for (i = 0; i < adapter->num_q_vectors; i++) {
6068                 adapter->q_vector[i]->cpu = -1;
6069                 igb_update_dca(adapter->q_vector[i]);
6070         }
6071 }
6072
6073 static int __igb_notify_dca(struct device *dev, void *data)
6074 {
6075         struct net_device *netdev = dev_get_drvdata(dev);
6076         struct igb_adapter *adapter = netdev_priv(netdev);
6077         struct pci_dev *pdev = adapter->pdev;
6078         struct e1000_hw *hw = &adapter->hw;
6079         unsigned long event = *(unsigned long *)data;
6080
6081         switch (event) {
6082         case DCA_PROVIDER_ADD:
6083                 /* if already enabled, don't do it again */
6084                 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
6085                         break;
6086                 if (dca_add_requester(dev) == E1000_SUCCESS) {
6087                         adapter->flags |= IGB_FLAG_DCA_ENABLED;
6088                         dev_info(pci_dev_to_dev(pdev), "DCA enabled\n");
6089                         igb_setup_dca(adapter);
6090                         break;
6091                 }
6092                 /* Fall Through since DCA is disabled. */
6093         case DCA_PROVIDER_REMOVE:
6094                 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
6095                         /* without this a class_device is left
6096                          * hanging around in the sysfs model */
6097                         dca_remove_requester(dev);
6098                         dev_info(pci_dev_to_dev(pdev), "DCA disabled\n");
6099                         adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
6100                         E1000_WRITE_REG(hw, E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_DISABLE);
6101                 }
6102                 break;
6103         }
6104
6105         return E1000_SUCCESS;
6106 }
6107
6108 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
6109                           void *p)
6110 {
6111         int ret_val;
6112
6113         ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
6114                                          __igb_notify_dca);
6115
6116         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
6117 }
6118 #endif /* IGB_DCA */
6119
6120 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
6121 {
6122         unsigned char mac_addr[ETH_ALEN];
6123
6124         random_ether_addr(mac_addr);
6125         igb_set_vf_mac(adapter, vf, mac_addr);
6126
6127 #ifdef IFLA_VF_MAX
6128 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
6129         /* By default spoof check is enabled for all VFs */
6130         adapter->vf_data[vf].spoofchk_enabled = true;
6131 #endif
6132 #endif
6133
6134         return true;
6135 }
6136
6137 static void igb_ping_all_vfs(struct igb_adapter *adapter)
6138 {
6139         struct e1000_hw *hw = &adapter->hw;
6140         u32 ping;
6141         int i;
6142
6143         for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
6144                 ping = E1000_PF_CONTROL_MSG;
6145                 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
6146                         ping |= E1000_VT_MSGTYPE_CTS;
6147                 e1000_write_mbx(hw, &ping, 1, i);
6148         }
6149 }
6150
6151 /**
6152  *  igb_mta_set_ - Set multicast filter table address
6153  *  @adapter: pointer to the adapter structure
6154  *  @hash_value: determines the MTA register and bit to set
6155  *
6156  *  The multicast table address is a register array of 32-bit registers.
6157  *  The hash_value is used to determine what register the bit is in, the
6158  *  current value is read, the new bit is OR'd in and the new value is
6159  *  written back into the register.
6160  **/
6161 void igb_mta_set(struct igb_adapter *adapter, u32 hash_value)
6162 {
6163         struct e1000_hw *hw = &adapter->hw;
6164         u32 hash_bit, hash_reg, mta;
6165
6166         /*
6167          * The MTA is a register array of 32-bit registers. It is
6168          * treated like an array of (32*mta_reg_count) bits.  We want to
6169          * set bit BitArray[hash_value]. So we figure out what register
6170          * the bit is in, read it, OR in the new bit, then write
6171          * back the new value.  The (hw->mac.mta_reg_count - 1) serves as a
6172          * mask to bits 31:5 of the hash value which gives us the
6173          * register we're modifying.  The hash bit within that register
6174          * is determined by the lower 5 bits of the hash value.
6175          */
6176         hash_reg = (hash_value >> 5) & (hw->mac.mta_reg_count - 1);
6177         hash_bit = hash_value & 0x1F;
6178
6179         mta = E1000_READ_REG_ARRAY(hw, E1000_MTA, hash_reg);
6180
6181         mta |= (1 << hash_bit);
6182
6183         E1000_WRITE_REG_ARRAY(hw, E1000_MTA, hash_reg, mta);
6184         E1000_WRITE_FLUSH(hw);
6185 }
6186
6187 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
6188 {
6189
6190         struct e1000_hw *hw = &adapter->hw;
6191         u32 vmolr = E1000_READ_REG(hw, E1000_VMOLR(vf));
6192         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6193
6194         vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
6195                             IGB_VF_FLAG_MULTI_PROMISC);
6196         vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
6197
6198 #ifdef IGB_ENABLE_VF_PROMISC
6199         if (*msgbuf & E1000_VF_SET_PROMISC_UNICAST) {
6200                 vmolr |= E1000_VMOLR_ROPE;
6201                 vf_data->flags |= IGB_VF_FLAG_UNI_PROMISC;
6202                 *msgbuf &= ~E1000_VF_SET_PROMISC_UNICAST;
6203         }
6204 #endif
6205         if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
6206                 vmolr |= E1000_VMOLR_MPME;
6207                 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
6208                 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
6209         } else {
6210                 /*
6211                  * if we have hashes and we are clearing a multicast promisc
6212                  * flag we need to write the hashes to the MTA as this step
6213                  * was previously skipped
6214                  */
6215                 if (vf_data->num_vf_mc_hashes > 30) {
6216                         vmolr |= E1000_VMOLR_MPME;
6217                 } else if (vf_data->num_vf_mc_hashes) {
6218                         int j;
6219                         vmolr |= E1000_VMOLR_ROMPE;
6220                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6221                                 igb_mta_set(adapter, vf_data->vf_mc_hashes[j]);
6222                 }
6223         }
6224
6225         E1000_WRITE_REG(hw, E1000_VMOLR(vf), vmolr);
6226
6227         /* there are flags left unprocessed, likely not supported */
6228         if (*msgbuf & E1000_VT_MSGINFO_MASK)
6229                 return -EINVAL;
6230
6231         return 0;
6232
6233 }
6234
6235 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
6236                                   u32 *msgbuf, u32 vf)
6237 {
6238         int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6239         u16 *hash_list = (u16 *)&msgbuf[1];
6240         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6241         int i;
6242
6243         /* salt away the number of multicast addresses assigned
6244          * to this VF for later use to restore when the PF multi cast
6245          * list changes
6246          */
6247         vf_data->num_vf_mc_hashes = n;
6248
6249         /* only up to 30 hash values supported */
6250         if (n > 30)
6251                 n = 30;
6252
6253         /* store the hashes for later use */
6254         for (i = 0; i < n; i++)
6255                 vf_data->vf_mc_hashes[i] = hash_list[i];
6256
6257         /* Flush and reset the mta with the new values */
6258         igb_set_rx_mode(adapter->netdev);
6259
6260         return 0;
6261 }
6262
6263 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
6264 {
6265         struct e1000_hw *hw = &adapter->hw;
6266         struct vf_data_storage *vf_data;
6267         int i, j;
6268
6269         for (i = 0; i < adapter->vfs_allocated_count; i++) {
6270                 u32 vmolr = E1000_READ_REG(hw, E1000_VMOLR(i));
6271                 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
6272
6273                 vf_data = &adapter->vf_data[i];
6274
6275                 if ((vf_data->num_vf_mc_hashes > 30) ||
6276                     (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
6277                         vmolr |= E1000_VMOLR_MPME;
6278                 } else if (vf_data->num_vf_mc_hashes) {
6279                         vmolr |= E1000_VMOLR_ROMPE;
6280                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6281                                 igb_mta_set(adapter, vf_data->vf_mc_hashes[j]);
6282                 }
6283                 E1000_WRITE_REG(hw, E1000_VMOLR(i), vmolr);
6284         }
6285 }
6286
6287 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
6288 {
6289         struct e1000_hw *hw = &adapter->hw;
6290         u32 pool_mask, reg, vid;
6291         u16 vlan_default;
6292         int i;
6293
6294         pool_mask = 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
6295
6296         /* Find the vlan filter for this id */
6297         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6298                 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6299
6300                 /* remove the vf from the pool */
6301                 reg &= ~pool_mask;
6302
6303                 /* if pool is empty then remove entry from vfta */
6304                 if (!(reg & E1000_VLVF_POOLSEL_MASK) &&
6305                     (reg & E1000_VLVF_VLANID_ENABLE)) {
6306                         reg = 0;
6307                         vid = reg & E1000_VLVF_VLANID_MASK;
6308                         igb_vfta_set(adapter, vid, FALSE);
6309                 }
6310
6311                 E1000_WRITE_REG(hw, E1000_VLVF(i), reg);
6312         }
6313
6314         adapter->vf_data[vf].vlans_enabled = 0;
6315
6316         vlan_default = adapter->vf_data[vf].default_vf_vlan_id;
6317         if (vlan_default)
6318                 igb_vlvf_set(adapter, vlan_default, true, vf);
6319 }
6320
6321 s32 igb_vlvf_set(struct igb_adapter *adapter, u32 vid, bool add, u32 vf)
6322 {
6323         struct e1000_hw *hw = &adapter->hw;
6324         u32 reg, i;
6325
6326         /* The vlvf table only exists on 82576 hardware and newer */
6327         if (hw->mac.type < e1000_82576)
6328                 return -1;
6329
6330         /* we only need to do this if VMDq is enabled */
6331         if (!adapter->vmdq_pools)
6332                 return -1;
6333
6334         /* Find the vlan filter for this id */
6335         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6336                 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6337                 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
6338                     vid == (reg & E1000_VLVF_VLANID_MASK))
6339                         break;
6340         }
6341
6342         if (add) {
6343                 if (i == E1000_VLVF_ARRAY_SIZE) {
6344                         /* Did not find a matching VLAN ID entry that was
6345                          * enabled.  Search for a free filter entry, i.e.
6346                          * one without the enable bit set
6347                          */
6348                         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6349                                 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6350                                 if (!(reg & E1000_VLVF_VLANID_ENABLE))
6351                                         break;
6352                         }
6353                 }
6354                 if (i < E1000_VLVF_ARRAY_SIZE) {
6355                         /* Found an enabled/available entry */
6356                         reg |= 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
6357
6358                         /* if !enabled we need to set this up in vfta */
6359                         if (!(reg & E1000_VLVF_VLANID_ENABLE)) {
6360                                 /* add VID to filter table */
6361                                 igb_vfta_set(adapter, vid, TRUE);
6362                                 reg |= E1000_VLVF_VLANID_ENABLE;
6363                         }
6364                         reg &= ~E1000_VLVF_VLANID_MASK;
6365                         reg |= vid;
6366                         E1000_WRITE_REG(hw, E1000_VLVF(i), reg);
6367
6368                         /* do not modify RLPML for PF devices */
6369                         if (vf >= adapter->vfs_allocated_count)
6370                                 return E1000_SUCCESS;
6371
6372                         if (!adapter->vf_data[vf].vlans_enabled) {
6373                                 u32 size;
6374                                 reg = E1000_READ_REG(hw, E1000_VMOLR(vf));
6375                                 size = reg & E1000_VMOLR_RLPML_MASK;
6376                                 size += 4;
6377                                 reg &= ~E1000_VMOLR_RLPML_MASK;
6378                                 reg |= size;
6379                                 E1000_WRITE_REG(hw, E1000_VMOLR(vf), reg);
6380                         }
6381
6382                         adapter->vf_data[vf].vlans_enabled++;
6383                 }
6384         } else {
6385                 if (i < E1000_VLVF_ARRAY_SIZE) {
6386                         /* remove vf from the pool */
6387                         reg &= ~(1 << (E1000_VLVF_POOLSEL_SHIFT + vf));
6388                         /* if pool is empty then remove entry from vfta */
6389                         if (!(reg & E1000_VLVF_POOLSEL_MASK)) {
6390                                 reg = 0;
6391                                 igb_vfta_set(adapter, vid, FALSE);
6392                         }
6393                         E1000_WRITE_REG(hw, E1000_VLVF(i), reg);
6394
6395                         /* do not modify RLPML for PF devices */
6396                         if (vf >= adapter->vfs_allocated_count)
6397                                 return E1000_SUCCESS;
6398
6399                         adapter->vf_data[vf].vlans_enabled--;
6400                         if (!adapter->vf_data[vf].vlans_enabled) {
6401                                 u32 size;
6402                                 reg = E1000_READ_REG(hw, E1000_VMOLR(vf));
6403                                 size = reg & E1000_VMOLR_RLPML_MASK;
6404                                 size -= 4;
6405                                 reg &= ~E1000_VMOLR_RLPML_MASK;
6406                                 reg |= size;
6407                                 E1000_WRITE_REG(hw, E1000_VMOLR(vf), reg);
6408                         }
6409                 }
6410         }
6411         return E1000_SUCCESS;
6412 }
6413
6414 #ifdef IFLA_VF_MAX
6415 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
6416 {
6417         struct e1000_hw *hw = &adapter->hw;
6418
6419         if (vid)
6420                 E1000_WRITE_REG(hw, E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
6421         else
6422                 E1000_WRITE_REG(hw, E1000_VMVIR(vf), 0);
6423 }
6424
6425 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
6426 #ifdef HAVE_VF_VLAN_PROTO
6427                                int vf, u16 vlan, u8 qos, __be16 vlan_proto)
6428 #else
6429                                int vf, u16 vlan, u8 qos)
6430 #endif
6431 {
6432         int err = 0;
6433         struct igb_adapter *adapter = netdev_priv(netdev);
6434
6435         /* VLAN IDs accepted range 0-4094 */
6436         if ((vf >= adapter->vfs_allocated_count) || (vlan > VLAN_VID_MASK-1) || (qos > 7))
6437                 return -EINVAL;
6438
6439 #ifdef HAVE_VF_VLAN_PROTO
6440         if (vlan_proto != htons(ETH_P_8021Q))
6441                 return -EPROTONOSUPPORT;
6442 #endif
6443
6444         if (vlan || qos) {
6445                 err = igb_vlvf_set(adapter, vlan, !!vlan, vf);
6446                 if (err)
6447                         goto out;
6448                 igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
6449                 igb_set_vmolr(adapter, vf, !vlan);
6450                 adapter->vf_data[vf].pf_vlan = vlan;
6451                 adapter->vf_data[vf].pf_qos = qos;
6452                 igb_set_vf_vlan_strip(adapter, vf, true);
6453                 dev_info(&adapter->pdev->dev,
6454                          "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
6455                 if (test_bit(__IGB_DOWN, &adapter->state)) {
6456                         dev_warn(&adapter->pdev->dev,
6457                                  "The VF VLAN has been set,"
6458                                  " but the PF device is not up.\n");
6459                         dev_warn(&adapter->pdev->dev,
6460                                  "Bring the PF device up before"
6461                                  " attempting to use the VF device.\n");
6462                 }
6463         } else {
6464                 if (adapter->vf_data[vf].pf_vlan)
6465                         dev_info(&adapter->pdev->dev,
6466                                  "Clearing VLAN on VF %d\n", vf);
6467                 igb_vlvf_set(adapter, adapter->vf_data[vf].pf_vlan,
6468                                    false, vf);
6469                 igb_set_vmvir(adapter, vlan, vf);
6470                 igb_set_vmolr(adapter, vf, true);
6471                 igb_set_vf_vlan_strip(adapter, vf, false);
6472                 adapter->vf_data[vf].pf_vlan = 0;
6473                 adapter->vf_data[vf].pf_qos = 0;
6474        }
6475 out:
6476        return err;
6477 }
6478
6479 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
6480 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
6481                                 bool setting)
6482 {
6483         struct igb_adapter *adapter = netdev_priv(netdev);
6484         struct e1000_hw *hw = &adapter->hw;
6485         u32 dtxswc, reg_offset;
6486
6487         if (!adapter->vfs_allocated_count)
6488                 return -EOPNOTSUPP;
6489
6490         if (vf >= adapter->vfs_allocated_count)
6491                 return -EINVAL;
6492
6493         reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
6494         dtxswc = E1000_READ_REG(hw, reg_offset);
6495         if (setting)
6496                 dtxswc |= ((1 << vf) |
6497                            (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
6498         else
6499                 dtxswc &= ~((1 << vf) |
6500                             (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
6501         E1000_WRITE_REG(hw, reg_offset, dtxswc);
6502
6503         adapter->vf_data[vf].spoofchk_enabled = setting;
6504         return E1000_SUCCESS;
6505 }
6506 #endif /* HAVE_VF_SPOOFCHK_CONFIGURE */
6507 #endif /* IFLA_VF_MAX */
6508
6509 static int igb_find_vlvf_entry(struct igb_adapter *adapter, int vid)
6510 {
6511         struct e1000_hw *hw = &adapter->hw;
6512         int i;
6513         u32 reg;
6514
6515         /* Find the vlan filter for this id */
6516         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6517                 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6518                 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
6519                     vid == (reg & E1000_VLVF_VLANID_MASK))
6520                         break;
6521         }
6522
6523         if (i >= E1000_VLVF_ARRAY_SIZE)
6524                 i = -1;
6525
6526         return i;
6527 }
6528
6529 static int igb_set_vf_vlan(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
6530 {
6531         struct e1000_hw *hw = &adapter->hw;
6532         int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6533         int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
6534         int err = 0;
6535
6536         if (vid)
6537                 igb_set_vf_vlan_strip(adapter, vf, true);
6538         else
6539                 igb_set_vf_vlan_strip(adapter, vf, false);
6540
6541         /* If in promiscuous mode we need to make sure the PF also has
6542          * the VLAN filter set.
6543          */
6544         if (add && (adapter->netdev->flags & IFF_PROMISC))
6545                 err = igb_vlvf_set(adapter, vid, add,
6546                                    adapter->vfs_allocated_count);
6547         if (err)
6548                 goto out;
6549
6550         err = igb_vlvf_set(adapter, vid, add, vf);
6551
6552         if (err)
6553                 goto out;
6554
6555         /* Go through all the checks to see if the VLAN filter should
6556          * be wiped completely.
6557          */
6558         if (!add && (adapter->netdev->flags & IFF_PROMISC)) {
6559                 u32 vlvf, bits;
6560
6561                 int regndx = igb_find_vlvf_entry(adapter, vid);
6562                 if (regndx < 0)
6563                         goto out;
6564                 /* See if any other pools are set for this VLAN filter
6565                  * entry other than the PF.
6566                  */
6567                 vlvf = bits = E1000_READ_REG(hw, E1000_VLVF(regndx));
6568                 bits &= 1 << (E1000_VLVF_POOLSEL_SHIFT +
6569                               adapter->vfs_allocated_count);
6570                 /* If the filter was removed then ensure PF pool bit
6571                  * is cleared if the PF only added itself to the pool
6572                  * because the PF is in promiscuous mode.
6573                  */
6574                 if ((vlvf & VLAN_VID_MASK) == vid &&
6575 #ifndef HAVE_VLAN_RX_REGISTER
6576                     !test_bit(vid, adapter->active_vlans) &&
6577 #endif
6578                     !bits)
6579                         igb_vlvf_set(adapter, vid, add,
6580                                      adapter->vfs_allocated_count);
6581         }
6582
6583 out:
6584         return err;
6585 }
6586
6587 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
6588 {
6589         struct e1000_hw *hw = &adapter->hw;
6590
6591         /* clear flags except flag that the PF has set the MAC */
6592         adapter->vf_data[vf].flags &= IGB_VF_FLAG_PF_SET_MAC;
6593         adapter->vf_data[vf].last_nack = jiffies;
6594
6595         /* reset offloads to defaults */
6596         igb_set_vmolr(adapter, vf, true);
6597
6598         /* reset vlans for device */
6599         igb_clear_vf_vfta(adapter, vf);
6600 #ifdef IFLA_VF_MAX
6601         if (adapter->vf_data[vf].pf_vlan)
6602                 igb_ndo_set_vf_vlan(adapter->netdev, vf,
6603                                     adapter->vf_data[vf].pf_vlan,
6604 #ifdef HAVE_VF_VLAN_PROTO
6605                                     adapter->vf_data[vf].pf_qos,
6606                                     htons(ETH_P_8021Q));
6607 #else
6608                                     adapter->vf_data[vf].pf_qos);
6609 #endif
6610         else
6611                 igb_clear_vf_vfta(adapter, vf);
6612 #endif
6613
6614         /* reset multicast table array for vf */
6615         adapter->vf_data[vf].num_vf_mc_hashes = 0;
6616
6617         /* Flush and reset the mta with the new values */
6618         igb_set_rx_mode(adapter->netdev);
6619
6620         /*
6621          * Reset the VFs TDWBAL and TDWBAH registers which are not
6622          * cleared by a VFLR
6623          */
6624         E1000_WRITE_REG(hw, E1000_TDWBAH(vf), 0);
6625         E1000_WRITE_REG(hw, E1000_TDWBAL(vf), 0);
6626         if (hw->mac.type == e1000_82576) {
6627                 E1000_WRITE_REG(hw, E1000_TDWBAH(IGB_MAX_VF_FUNCTIONS + vf), 0);
6628                 E1000_WRITE_REG(hw, E1000_TDWBAL(IGB_MAX_VF_FUNCTIONS + vf), 0);
6629         }
6630 }
6631
6632 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
6633 {
6634         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6635
6636         /* generate a new mac address as we were hotplug removed/added */
6637         if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
6638                 random_ether_addr(vf_mac);
6639
6640         /* process remaining reset events */
6641         igb_vf_reset(adapter, vf);
6642 }
6643
6644 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
6645 {
6646         struct e1000_hw *hw = &adapter->hw;
6647         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6648         u32 reg, msgbuf[3];
6649         u8 *addr = (u8 *)(&msgbuf[1]);
6650
6651         /* process all the same items cleared in a function level reset */
6652         igb_vf_reset(adapter, vf);
6653
6654         /* set vf mac address */
6655         igb_del_mac_filter(adapter, vf_mac, vf);
6656         igb_add_mac_filter(adapter, vf_mac, vf);
6657
6658         /* enable transmit and receive for vf */
6659         reg = E1000_READ_REG(hw, E1000_VFTE);
6660         E1000_WRITE_REG(hw, E1000_VFTE, reg | (1 << vf));
6661         reg = E1000_READ_REG(hw, E1000_VFRE);
6662         E1000_WRITE_REG(hw, E1000_VFRE, reg | (1 << vf));
6663
6664         adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
6665
6666         /* reply to reset with ack and vf mac address */
6667         msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
6668         memcpy(addr, vf_mac, 6);
6669         e1000_write_mbx(hw, msgbuf, 3, vf);
6670 }
6671
6672 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
6673 {
6674         /*
6675          * The VF MAC Address is stored in a packed array of bytes
6676          * starting at the second 32 bit word of the msg array
6677          */
6678         unsigned char *addr = (unsigned char *)&msg[1];
6679         int err = -1;
6680
6681         if (is_valid_ether_addr(addr))
6682                 err = igb_set_vf_mac(adapter, vf, addr);
6683
6684         return err;
6685 }
6686
6687 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
6688 {
6689         struct e1000_hw *hw = &adapter->hw;
6690         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6691         u32 msg = E1000_VT_MSGTYPE_NACK;
6692
6693         /* if device isn't clear to send it shouldn't be reading either */
6694         if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
6695             time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
6696                 e1000_write_mbx(hw, &msg, 1, vf);
6697                 vf_data->last_nack = jiffies;
6698         }
6699 }
6700
6701 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
6702 {
6703         struct pci_dev *pdev = adapter->pdev;
6704         u32 msgbuf[E1000_VFMAILBOX_SIZE];
6705         struct e1000_hw *hw = &adapter->hw;
6706         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6707         s32 retval;
6708
6709         retval = e1000_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf);
6710
6711         if (retval) {
6712                 dev_err(pci_dev_to_dev(pdev), "Error receiving message from VF\n");
6713                 return;
6714         }
6715
6716         /* this is a message we already processed, do nothing */
6717         if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
6718                 return;
6719
6720         /*
6721          * until the vf completes a reset it should not be
6722          * allowed to start any configuration.
6723          */
6724
6725         if (msgbuf[0] == E1000_VF_RESET) {
6726                 igb_vf_reset_msg(adapter, vf);
6727                 return;
6728         }
6729
6730         if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
6731                 msgbuf[0] = E1000_VT_MSGTYPE_NACK;
6732                 if (time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
6733                         e1000_write_mbx(hw, msgbuf, 1, vf);
6734                         vf_data->last_nack = jiffies;
6735                 }
6736                 return;
6737         }
6738
6739         switch ((msgbuf[0] & 0xFFFF)) {
6740         case E1000_VF_SET_MAC_ADDR:
6741                 retval = -EINVAL;
6742 #ifndef IGB_DISABLE_VF_MAC_SET
6743                 if (!(vf_data->flags & IGB_VF_FLAG_PF_SET_MAC))
6744                         retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
6745                 else
6746                         DPRINTK(DRV, INFO,
6747                                 "VF %d attempted to override administratively "
6748                                 "set MAC address\nReload the VF driver to "
6749                                 "resume operations\n", vf);
6750 #endif
6751                 break;
6752         case E1000_VF_SET_PROMISC:
6753                 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
6754                 break;
6755         case E1000_VF_SET_MULTICAST:
6756                 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
6757                 break;
6758         case E1000_VF_SET_LPE:
6759                 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
6760                 break;
6761         case E1000_VF_SET_VLAN:
6762                 retval = -1;
6763 #ifdef IFLA_VF_MAX
6764                 if (vf_data->pf_vlan)
6765                         DPRINTK(DRV, INFO,
6766                                 "VF %d attempted to override administratively "
6767                                 "set VLAN tag\nReload the VF driver to "
6768                                 "resume operations\n", vf);
6769                 else
6770 #endif
6771                         retval = igb_set_vf_vlan(adapter, msgbuf, vf);
6772                 break;
6773         default:
6774                 dev_err(pci_dev_to_dev(pdev), "Unhandled Msg %08x\n", msgbuf[0]);
6775                 retval = -E1000_ERR_MBX;
6776                 break;
6777         }
6778
6779         /* notify the VF of the results of what it sent us */
6780         if (retval)
6781                 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
6782         else
6783                 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
6784
6785         msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
6786
6787         e1000_write_mbx(hw, msgbuf, 1, vf);
6788 }
6789
6790 static void igb_msg_task(struct igb_adapter *adapter)
6791 {
6792         struct e1000_hw *hw = &adapter->hw;
6793         u32 vf;
6794
6795         for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
6796                 /* process any reset requests */
6797                 if (!e1000_check_for_rst(hw, vf))
6798                         igb_vf_reset_event(adapter, vf);
6799
6800                 /* process any messages pending */
6801                 if (!e1000_check_for_msg(hw, vf))
6802                         igb_rcv_msg_from_vf(adapter, vf);
6803
6804                 /* process any acks */
6805                 if (!e1000_check_for_ack(hw, vf))
6806                         igb_rcv_ack_from_vf(adapter, vf);
6807         }
6808 }
6809
6810 /**
6811  *  igb_set_uta - Set unicast filter table address
6812  *  @adapter: board private structure
6813  *
6814  *  The unicast table address is a register array of 32-bit registers.
6815  *  The table is meant to be used in a way similar to how the MTA is used
6816  *  however due to certain limitations in the hardware it is necessary to
6817  *  set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
6818  *  enable bit to allow vlan tag stripping when promiscuous mode is enabled
6819  **/
6820 static void igb_set_uta(struct igb_adapter *adapter)
6821 {
6822         struct e1000_hw *hw = &adapter->hw;
6823         int i;
6824
6825         /* The UTA table only exists on 82576 hardware and newer */
6826         if (hw->mac.type < e1000_82576)
6827                 return;
6828
6829         /* we only need to do this if VMDq is enabled */
6830         if (!adapter->vmdq_pools)
6831                 return;
6832
6833         for (i = 0; i < hw->mac.uta_reg_count; i++)
6834                 E1000_WRITE_REG_ARRAY(hw, E1000_UTA, i, ~0);
6835 }
6836
6837 /**
6838  * igb_intr_msi - Interrupt Handler
6839  * @irq: interrupt number
6840  * @data: pointer to a network interface device structure
6841  **/
6842 static irqreturn_t igb_intr_msi(int irq, void *data)
6843 {
6844         struct igb_adapter *adapter = data;
6845         struct igb_q_vector *q_vector = adapter->q_vector[0];
6846         struct e1000_hw *hw = &adapter->hw;
6847         /* read ICR disables interrupts using IAM */
6848         u32 icr = E1000_READ_REG(hw, E1000_ICR);
6849
6850         igb_write_itr(q_vector);
6851
6852         if (icr & E1000_ICR_DRSTA)
6853                 schedule_work(&adapter->reset_task);
6854
6855         if (icr & E1000_ICR_DOUTSYNC) {
6856                 /* HW is reporting DMA is out of sync */
6857                 adapter->stats.doosync++;
6858         }
6859
6860         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6861                 hw->mac.get_link_status = 1;
6862                 if (!test_bit(__IGB_DOWN, &adapter->state))
6863                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6864         }
6865
6866 #ifdef HAVE_PTP_1588_CLOCK
6867         if (icr & E1000_ICR_TS) {
6868                 u32 tsicr = E1000_READ_REG(hw, E1000_TSICR);
6869
6870                 if (tsicr & E1000_TSICR_TXTS) {
6871                         /* acknowledge the interrupt */
6872                         E1000_WRITE_REG(hw, E1000_TSICR, E1000_TSICR_TXTS);
6873                         /* retrieve hardware timestamp */
6874                         schedule_work(&adapter->ptp_tx_work);
6875                 }
6876         }
6877 #endif /* HAVE_PTP_1588_CLOCK */
6878
6879         napi_schedule(&q_vector->napi);
6880
6881         return IRQ_HANDLED;
6882 }
6883
6884 /**
6885  * igb_intr - Legacy Interrupt Handler
6886  * @irq: interrupt number
6887  * @data: pointer to a network interface device structure
6888  **/
6889 static irqreturn_t igb_intr(int irq, void *data)
6890 {
6891         struct igb_adapter *adapter = data;
6892         struct igb_q_vector *q_vector = adapter->q_vector[0];
6893         struct e1000_hw *hw = &adapter->hw;
6894         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
6895          * need for the IMC write */
6896         u32 icr = E1000_READ_REG(hw, E1000_ICR);
6897
6898         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
6899          * not set, then the adapter didn't send an interrupt */
6900         if (!(icr & E1000_ICR_INT_ASSERTED))
6901                 return IRQ_NONE;
6902
6903         igb_write_itr(q_vector);
6904
6905         if (icr & E1000_ICR_DRSTA)
6906                 schedule_work(&adapter->reset_task);
6907
6908         if (icr & E1000_ICR_DOUTSYNC) {
6909                 /* HW is reporting DMA is out of sync */
6910                 adapter->stats.doosync++;
6911         }
6912
6913         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6914                 hw->mac.get_link_status = 1;
6915                 /* guard against interrupt when we're going down */
6916                 if (!test_bit(__IGB_DOWN, &adapter->state))
6917                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6918         }
6919
6920 #ifdef HAVE_PTP_1588_CLOCK
6921         if (icr & E1000_ICR_TS) {
6922                 u32 tsicr = E1000_READ_REG(hw, E1000_TSICR);
6923
6924                 if (tsicr & E1000_TSICR_TXTS) {
6925                         /* acknowledge the interrupt */
6926                         E1000_WRITE_REG(hw, E1000_TSICR, E1000_TSICR_TXTS);
6927                         /* retrieve hardware timestamp */
6928                         schedule_work(&adapter->ptp_tx_work);
6929                 }
6930         }
6931 #endif /* HAVE_PTP_1588_CLOCK */
6932
6933         napi_schedule(&q_vector->napi);
6934
6935         return IRQ_HANDLED;
6936 }
6937
6938 void igb_ring_irq_enable(struct igb_q_vector *q_vector)
6939 {
6940         struct igb_adapter *adapter = q_vector->adapter;
6941         struct e1000_hw *hw = &adapter->hw;
6942
6943         if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
6944             (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
6945                 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
6946                         igb_set_itr(q_vector);
6947                 else
6948                         igb_update_ring_itr(q_vector);
6949         }
6950
6951         if (!test_bit(__IGB_DOWN, &adapter->state)) {
6952                 if (adapter->msix_entries)
6953                         E1000_WRITE_REG(hw, E1000_EIMS, q_vector->eims_value);
6954                 else
6955                         igb_irq_enable(adapter);
6956         }
6957 }
6958
6959 /**
6960  * igb_poll - NAPI Rx polling callback
6961  * @napi: napi polling structure
6962  * @budget: count of how many packets we should handle
6963  **/
6964 static int igb_poll(struct napi_struct *napi, int budget)
6965 {
6966         struct igb_q_vector *q_vector = container_of(napi, struct igb_q_vector, napi);
6967         bool clean_complete = true;
6968
6969 #ifdef IGB_DCA
6970         if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
6971                 igb_update_dca(q_vector);
6972 #endif
6973         if (q_vector->tx.ring)
6974                 clean_complete = igb_clean_tx_irq(q_vector);
6975
6976         if (q_vector->rx.ring)
6977                 clean_complete &= igb_clean_rx_irq(q_vector, budget);
6978
6979 #ifndef HAVE_NETDEV_NAPI_LIST
6980         /* if netdev is disabled we need to stop polling */
6981         if (!netif_running(q_vector->adapter->netdev))
6982                 clean_complete = true;
6983
6984 #endif
6985         /* If all work not completed, return budget and keep polling */
6986         if (!clean_complete)
6987                 return budget;
6988
6989         /* If not enough Rx work done, exit the polling mode */
6990         napi_complete(napi);
6991         igb_ring_irq_enable(q_vector);
6992
6993         return 0;
6994 }
6995
6996 /**
6997  * igb_clean_tx_irq - Reclaim resources after transmit completes
6998  * @q_vector: pointer to q_vector containing needed info
6999  * returns TRUE if ring is completely cleaned
7000  **/
7001 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector)
7002 {
7003         struct igb_adapter *adapter = q_vector->adapter;
7004         struct igb_ring *tx_ring = q_vector->tx.ring;
7005         struct igb_tx_buffer *tx_buffer;
7006         union e1000_adv_tx_desc *tx_desc;
7007         unsigned int total_bytes = 0, total_packets = 0;
7008         unsigned int budget = q_vector->tx.work_limit;
7009         unsigned int i = tx_ring->next_to_clean;
7010
7011         if (test_bit(__IGB_DOWN, &adapter->state))
7012                 return true;
7013
7014         tx_buffer = &tx_ring->tx_buffer_info[i];
7015         tx_desc = IGB_TX_DESC(tx_ring, i);
7016         i -= tx_ring->count;
7017
7018         do {
7019                 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
7020
7021                 /* if next_to_watch is not set then there is no work pending */
7022                 if (!eop_desc)
7023                         break;
7024
7025                 /* prevent any other reads prior to eop_desc */
7026                 read_barrier_depends();
7027
7028                 /* if DD is not set pending work has not been completed */
7029                 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
7030                         break;
7031
7032                 /* clear next_to_watch to prevent false hangs */
7033                 tx_buffer->next_to_watch = NULL;
7034
7035                 /* update the statistics for this packet */
7036                 total_bytes += tx_buffer->bytecount;
7037                 total_packets += tx_buffer->gso_segs;
7038
7039                 /* free the skb */
7040                 dev_kfree_skb_any(tx_buffer->skb);
7041
7042                 /* unmap skb header data */
7043                 dma_unmap_single(tx_ring->dev,
7044                                  dma_unmap_addr(tx_buffer, dma),
7045                                  dma_unmap_len(tx_buffer, len),
7046                                  DMA_TO_DEVICE);
7047
7048                 /* clear tx_buffer data */
7049                 tx_buffer->skb = NULL;
7050                 dma_unmap_len_set(tx_buffer, len, 0);
7051
7052                 /* clear last DMA location and unmap remaining buffers */
7053                 while (tx_desc != eop_desc) {
7054                         tx_buffer++;
7055                         tx_desc++;
7056                         i++;
7057                         if (unlikely(!i)) {
7058                                 i -= tx_ring->count;
7059                                 tx_buffer = tx_ring->tx_buffer_info;
7060                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
7061                         }
7062
7063                         /* unmap any remaining paged data */
7064                         if (dma_unmap_len(tx_buffer, len)) {
7065                                 dma_unmap_page(tx_ring->dev,
7066                                                dma_unmap_addr(tx_buffer, dma),
7067                                                dma_unmap_len(tx_buffer, len),
7068                                                DMA_TO_DEVICE);
7069                                 dma_unmap_len_set(tx_buffer, len, 0);
7070                         }
7071                 }
7072
7073                 /* move us one more past the eop_desc for start of next pkt */
7074                 tx_buffer++;
7075                 tx_desc++;
7076                 i++;
7077                 if (unlikely(!i)) {
7078                         i -= tx_ring->count;
7079                         tx_buffer = tx_ring->tx_buffer_info;
7080                         tx_desc = IGB_TX_DESC(tx_ring, 0);
7081                 }
7082
7083                 /* issue prefetch for next Tx descriptor */
7084                 prefetch(tx_desc);
7085
7086                 /* update budget accounting */
7087                 budget--;
7088         } while (likely(budget));
7089
7090         netdev_tx_completed_queue(txring_txq(tx_ring),
7091                                   total_packets, total_bytes);
7092
7093         i += tx_ring->count;
7094         tx_ring->next_to_clean = i;
7095         tx_ring->tx_stats.bytes += total_bytes;
7096         tx_ring->tx_stats.packets += total_packets;
7097         q_vector->tx.total_bytes += total_bytes;
7098         q_vector->tx.total_packets += total_packets;
7099
7100 #ifdef DEBUG
7101         if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags) &&
7102             !(adapter->disable_hw_reset && adapter->tx_hang_detected)) {
7103 #else
7104         if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
7105 #endif
7106                 struct e1000_hw *hw = &adapter->hw;
7107
7108                 /* Detect a transmit hang in hardware, this serializes the
7109                  * check with the clearing of time_stamp and movement of i */
7110                 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
7111                 if (tx_buffer->next_to_watch &&
7112                     time_after(jiffies, tx_buffer->time_stamp +
7113                                (adapter->tx_timeout_factor * HZ))
7114                     && !(E1000_READ_REG(hw, E1000_STATUS) &
7115                          E1000_STATUS_TXOFF)) {
7116
7117                         /* detected Tx unit hang */
7118 #ifdef DEBUG
7119                         adapter->tx_hang_detected = TRUE;
7120                         if (adapter->disable_hw_reset) {
7121                                 DPRINTK(DRV, WARNING,
7122                                         "Deactivating netdev watchdog timer\n");
7123                                 if (del_timer(&netdev_ring(tx_ring)->watchdog_timer))
7124                                         dev_put(netdev_ring(tx_ring));
7125 #ifndef HAVE_NET_DEVICE_OPS
7126                                 netdev_ring(tx_ring)->tx_timeout = NULL;
7127 #endif
7128                         }
7129 #endif /* DEBUG */
7130                         dev_err(tx_ring->dev,
7131                                 "Detected Tx Unit Hang\n"
7132                                 "  Tx Queue             <%d>\n"
7133                                 "  TDH                  <%x>\n"
7134                                 "  TDT                  <%x>\n"
7135                                 "  next_to_use          <%x>\n"
7136                                 "  next_to_clean        <%x>\n"
7137                                 "buffer_info[next_to_clean]\n"
7138                                 "  time_stamp           <%lx>\n"
7139                                 "  next_to_watch        <%p>\n"
7140                                 "  jiffies              <%lx>\n"
7141                                 "  desc.status          <%x>\n",
7142                                 tx_ring->queue_index,
7143                                 E1000_READ_REG(hw, E1000_TDH(tx_ring->reg_idx)),
7144                                 readl(tx_ring->tail),
7145                                 tx_ring->next_to_use,
7146                                 tx_ring->next_to_clean,
7147                                 tx_buffer->time_stamp,
7148                                 tx_buffer->next_to_watch,
7149                                 jiffies,
7150                                 tx_buffer->next_to_watch->wb.status);
7151                         if (netif_is_multiqueue(netdev_ring(tx_ring)))
7152                                 netif_stop_subqueue(netdev_ring(tx_ring),
7153                                                     ring_queue_index(tx_ring));
7154                         else
7155                                 netif_stop_queue(netdev_ring(tx_ring));
7156
7157                         /* we are about to reset, no point in enabling stuff */
7158                         return true;
7159                 }
7160         }
7161
7162 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
7163         if (unlikely(total_packets &&
7164                      netif_carrier_ok(netdev_ring(tx_ring)) &&
7165                      igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
7166                 /* Make sure that anybody stopping the queue after this
7167                  * sees the new next_to_clean.
7168                  */
7169                 smp_mb();
7170                 if (netif_is_multiqueue(netdev_ring(tx_ring))) {
7171                         if (__netif_subqueue_stopped(netdev_ring(tx_ring),
7172                                                      ring_queue_index(tx_ring)) &&
7173                             !(test_bit(__IGB_DOWN, &adapter->state))) {
7174                                 netif_wake_subqueue(netdev_ring(tx_ring),
7175                                                     ring_queue_index(tx_ring));
7176                                 tx_ring->tx_stats.restart_queue++;
7177                         }
7178                 } else {
7179                         if (netif_queue_stopped(netdev_ring(tx_ring)) &&
7180                             !(test_bit(__IGB_DOWN, &adapter->state))) {
7181                                 netif_wake_queue(netdev_ring(tx_ring));
7182                                 tx_ring->tx_stats.restart_queue++;
7183                         }
7184                 }
7185         }
7186
7187         return !!budget;
7188 }
7189
7190 #ifdef HAVE_VLAN_RX_REGISTER
7191 /**
7192  * igb_receive_skb - helper function to handle rx indications
7193  * @q_vector: structure containing interrupt and ring information
7194  * @skb: packet to send up
7195  **/
7196 static void igb_receive_skb(struct igb_q_vector *q_vector,
7197                             struct sk_buff *skb)
7198 {
7199         struct vlan_group **vlgrp = netdev_priv(skb->dev);
7200
7201         if (IGB_CB(skb)->vid) {
7202                 if (*vlgrp) {
7203                         vlan_gro_receive(&q_vector->napi, *vlgrp,
7204                                          IGB_CB(skb)->vid, skb);
7205                 } else {
7206                         dev_kfree_skb_any(skb);
7207                 }
7208         } else {
7209                 napi_gro_receive(&q_vector->napi, skb);
7210         }
7211 }
7212
7213 #endif /* HAVE_VLAN_RX_REGISTER */
7214 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7215 /**
7216  * igb_reuse_rx_page - page flip buffer and store it back on the ring
7217  * @rx_ring: rx descriptor ring to store buffers on
7218  * @old_buff: donor buffer to have page reused
7219  *
7220  * Synchronizes page for reuse by the adapter
7221  **/
7222 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
7223                               struct igb_rx_buffer *old_buff)
7224 {
7225         struct igb_rx_buffer *new_buff;
7226         u16 nta = rx_ring->next_to_alloc;
7227
7228         new_buff = &rx_ring->rx_buffer_info[nta];
7229
7230         /* update, and store next to alloc */
7231         nta++;
7232         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
7233
7234         /* transfer page from old buffer to new buffer */
7235         memcpy(new_buff, old_buff, sizeof(struct igb_rx_buffer));
7236
7237         /* sync the buffer for use by the device */
7238         dma_sync_single_range_for_device(rx_ring->dev, old_buff->dma,
7239                                          old_buff->page_offset,
7240                                          IGB_RX_BUFSZ,
7241                                          DMA_FROM_DEVICE);
7242 }
7243
7244 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer,
7245                                   struct page *page,
7246                                   unsigned int truesize)
7247 {
7248         /* avoid re-using remote pages */
7249         if (unlikely(page_to_nid(page) != numa_node_id()))
7250                 return false;
7251
7252 #if (PAGE_SIZE < 8192)
7253         /* if we are only owner of page we can reuse it */
7254         if (unlikely(page_count(page) != 1))
7255                 return false;
7256
7257         /* flip page offset to other buffer */
7258         rx_buffer->page_offset ^= IGB_RX_BUFSZ;
7259
7260 #else
7261         /* move offset up to the next cache line */
7262         rx_buffer->page_offset += truesize;
7263
7264         if (rx_buffer->page_offset > (PAGE_SIZE - IGB_RX_BUFSZ))
7265                 return false;
7266 #endif
7267
7268         /* bump ref count on page before it is given to the stack */
7269         get_page(page);
7270
7271         return true;
7272 }
7273
7274 /**
7275  * igb_add_rx_frag - Add contents of Rx buffer to sk_buff
7276  * @rx_ring: rx descriptor ring to transact packets on
7277  * @rx_buffer: buffer containing page to add
7278  * @rx_desc: descriptor containing length of buffer written by hardware
7279  * @skb: sk_buff to place the data into
7280  *
7281  * This function will add the data contained in rx_buffer->page to the skb.
7282  * This is done either through a direct copy if the data in the buffer is
7283  * less than the skb header size, otherwise it will just attach the page as
7284  * a frag to the skb.
7285  *
7286  * The function will then update the page offset if necessary and return
7287  * true if the buffer can be reused by the adapter.
7288  **/
7289 static bool igb_add_rx_frag(struct igb_ring *rx_ring,
7290                             struct igb_rx_buffer *rx_buffer,
7291                             union e1000_adv_rx_desc *rx_desc,
7292                             struct sk_buff *skb)
7293 {
7294         struct page *page = rx_buffer->page;
7295         unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
7296 #if (PAGE_SIZE < 8192)
7297         unsigned int truesize = IGB_RX_BUFSZ;
7298 #else
7299         unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
7300 #endif
7301
7302         if ((size <= IGB_RX_HDR_LEN) && !skb_is_nonlinear(skb)) {
7303                 unsigned char *va = page_address(page) + rx_buffer->page_offset;
7304
7305 #ifdef HAVE_PTP_1588_CLOCK
7306                 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
7307                         igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
7308                         va += IGB_TS_HDR_LEN;
7309                         size -= IGB_TS_HDR_LEN;
7310                 }
7311 #endif /* HAVE_PTP_1588_CLOCK */
7312
7313                 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
7314
7315                 /* we can reuse buffer as-is, just make sure it is local */
7316                 if (likely(page_to_nid(page) == numa_node_id()))
7317                         return true;
7318
7319                 /* this page cannot be reused so discard it */
7320                 put_page(page);
7321                 return false;
7322         }
7323
7324         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
7325                         rx_buffer->page_offset, size, truesize);
7326
7327         return igb_can_reuse_rx_page(rx_buffer, page, truesize);
7328 }
7329
7330 static struct sk_buff *igb_fetch_rx_buffer(struct igb_ring *rx_ring,
7331                                            union e1000_adv_rx_desc *rx_desc,
7332                                            struct sk_buff *skb)
7333 {
7334         struct igb_rx_buffer *rx_buffer;
7335         struct page *page;
7336
7337         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
7338
7339         page = rx_buffer->page;
7340         prefetchw(page);
7341
7342         if (likely(!skb)) {
7343                 void *page_addr = page_address(page) +
7344                                   rx_buffer->page_offset;
7345
7346                 /* prefetch first cache line of first page */
7347                 prefetch(page_addr);
7348 #if L1_CACHE_BYTES < 128
7349                 prefetch(page_addr + L1_CACHE_BYTES);
7350 #endif
7351
7352                 /* allocate a skb to store the frags */
7353                 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
7354                                                 IGB_RX_HDR_LEN);
7355                 if (unlikely(!skb)) {
7356                         rx_ring->rx_stats.alloc_failed++;
7357                         return NULL;
7358                 }
7359
7360                 /*
7361                  * we will be copying header into skb->data in
7362                  * pskb_may_pull so it is in our interest to prefetch
7363                  * it now to avoid a possible cache miss
7364                  */
7365                 prefetchw(skb->data);
7366         }
7367
7368         /* we are reusing so sync this buffer for CPU use */
7369         dma_sync_single_range_for_cpu(rx_ring->dev,
7370                                       rx_buffer->dma,
7371                                       rx_buffer->page_offset,
7372                                       IGB_RX_BUFSZ,
7373                                       DMA_FROM_DEVICE);
7374
7375         /* pull page into skb */
7376         if (igb_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
7377                 /* hand second half of page back to the ring */
7378                 igb_reuse_rx_page(rx_ring, rx_buffer);
7379         } else {
7380                 /* we are not reusing the buffer so unmap it */
7381                 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
7382                                PAGE_SIZE, DMA_FROM_DEVICE);
7383         }
7384
7385         /* clear contents of rx_buffer */
7386         rx_buffer->page = NULL;
7387
7388         return skb;
7389 }
7390
7391 #endif
7392 static inline void igb_rx_checksum(struct igb_ring *ring,
7393                                    union e1000_adv_rx_desc *rx_desc,
7394                                    struct sk_buff *skb)
7395 {
7396         skb_checksum_none_assert(skb);
7397
7398         /* Ignore Checksum bit is set */
7399         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
7400                 return;
7401
7402         /* Rx checksum disabled via ethtool */
7403         if (!(netdev_ring(ring)->features & NETIF_F_RXCSUM))
7404                 return;
7405
7406         /* TCP/UDP checksum error bit is set */
7407         if (igb_test_staterr(rx_desc,
7408                              E1000_RXDEXT_STATERR_TCPE |
7409                              E1000_RXDEXT_STATERR_IPE)) {
7410                 /*
7411                  * work around errata with sctp packets where the TCPE aka
7412                  * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
7413                  * packets, (aka let the stack check the crc32c)
7414                  */
7415                 if (!((skb->len == 60) &&
7416                       test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags)))
7417                         ring->rx_stats.csum_err++;
7418
7419                 /* let the stack verify checksum errors */
7420                 return;
7421         }
7422         /* It must be a TCP or UDP packet with a valid checksum */
7423         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
7424                                       E1000_RXD_STAT_UDPCS))
7425                 skb->ip_summed = CHECKSUM_UNNECESSARY;
7426 }
7427
7428 #ifdef NETIF_F_RXHASH
7429 static inline void igb_rx_hash(struct igb_ring *ring,
7430                                union e1000_adv_rx_desc *rx_desc,
7431                                struct sk_buff *skb)
7432 {
7433         if (netdev_ring(ring)->features & NETIF_F_RXHASH)
7434                 skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
7435                              PKT_HASH_TYPE_L3);
7436 }
7437
7438 #endif
7439 #ifndef IGB_NO_LRO
7440 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7441 /**
7442  * igb_merge_active_tail - merge active tail into lro skb
7443  * @tail: pointer to active tail in frag_list
7444  *
7445  * This function merges the length and data of an active tail into the
7446  * skb containing the frag_list.  It resets the tail's pointer to the head,
7447  * but it leaves the heads pointer to tail intact.
7448  **/
7449 static inline struct sk_buff *igb_merge_active_tail(struct sk_buff *tail)
7450 {
7451         struct sk_buff *head = IGB_CB(tail)->head;
7452
7453         if (!head)
7454                 return tail;
7455
7456         head->len += tail->len;
7457         head->data_len += tail->len;
7458         head->truesize += tail->len;
7459
7460         IGB_CB(tail)->head = NULL;
7461
7462         return head;
7463 }
7464
7465 /**
7466  * igb_add_active_tail - adds an active tail into the skb frag_list
7467  * @head: pointer to the start of the skb
7468  * @tail: pointer to active tail to add to frag_list
7469  *
7470  * This function adds an active tail to the end of the frag list.  This tail
7471  * will still be receiving data so we cannot yet ad it's stats to the main
7472  * skb.  That is done via igb_merge_active_tail.
7473  **/
7474 static inline void igb_add_active_tail(struct sk_buff *head, struct sk_buff *tail)
7475 {
7476         struct sk_buff *old_tail = IGB_CB(head)->tail;
7477
7478         if (old_tail) {
7479                 igb_merge_active_tail(old_tail);
7480                 old_tail->next = tail;
7481         } else {
7482                 skb_shinfo(head)->frag_list = tail;
7483         }
7484
7485         IGB_CB(tail)->head = head;
7486         IGB_CB(head)->tail = tail;
7487
7488         IGB_CB(head)->append_cnt++;
7489 }
7490
7491 /**
7492  * igb_close_active_frag_list - cleanup pointers on a frag_list skb
7493  * @head: pointer to head of an active frag list
7494  *
7495  * This function will clear the frag_tail_tracker pointer on an active
7496  * frag_list and returns true if the pointer was actually set
7497  **/
7498 static inline bool igb_close_active_frag_list(struct sk_buff *head)
7499 {
7500         struct sk_buff *tail = IGB_CB(head)->tail;
7501
7502         if (!tail)
7503                 return false;
7504
7505         igb_merge_active_tail(tail);
7506
7507         IGB_CB(head)->tail = NULL;
7508
7509         return true;
7510 }
7511
7512 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
7513 /**
7514  * igb_can_lro - returns true if packet is TCP/IPV4 and LRO is enabled
7515  * @adapter: board private structure
7516  * @rx_desc: pointer to the rx descriptor
7517  * @skb: pointer to the skb to be merged
7518  *
7519  **/
7520 static inline bool igb_can_lro(struct igb_ring *rx_ring,
7521                                union e1000_adv_rx_desc *rx_desc,
7522                                struct sk_buff *skb)
7523 {
7524         struct iphdr *iph = (struct iphdr *)skb->data;
7525         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
7526
7527         /* verify hardware indicates this is IPv4/TCP */
7528         if((!(pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_TCP)) ||
7529             !(pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV4))))
7530                 return false;
7531
7532         /* .. and LRO is enabled */
7533         if (!(netdev_ring(rx_ring)->features & NETIF_F_LRO))
7534                 return false;
7535
7536         /* .. and we are not in promiscuous mode */
7537         if (netdev_ring(rx_ring)->flags & IFF_PROMISC)
7538                 return false;
7539
7540         /* .. and the header is large enough for us to read IP/TCP fields */
7541         if (!pskb_may_pull(skb, sizeof(struct igb_lrohdr)))
7542                 return false;
7543
7544         /* .. and there are no VLANs on packet */
7545         if (skb->protocol != __constant_htons(ETH_P_IP))
7546                 return false;
7547
7548         /* .. and we are version 4 with no options */
7549         if (*(u8 *)iph != 0x45)
7550                 return false;
7551
7552         /* .. and the packet is not fragmented */
7553         if (iph->frag_off & htons(IP_MF | IP_OFFSET))
7554                 return false;
7555
7556         /* .. and that next header is TCP */
7557         if (iph->protocol != IPPROTO_TCP)
7558                 return false;
7559
7560         return true;
7561 }
7562
7563 static inline struct igb_lrohdr *igb_lro_hdr(struct sk_buff *skb)
7564 {
7565         return (struct igb_lrohdr *)skb->data;
7566 }
7567
7568 /**
7569  * igb_lro_flush - Indicate packets to upper layer.
7570  *
7571  * Update IP and TCP header part of head skb if more than one
7572  * skb's chained and indicate packets to upper layer.
7573  **/
7574 static void igb_lro_flush(struct igb_q_vector *q_vector,
7575                           struct sk_buff *skb)
7576 {
7577         struct igb_lro_list *lrolist = &q_vector->lrolist;
7578
7579         __skb_unlink(skb, &lrolist->active);
7580
7581         if (IGB_CB(skb)->append_cnt) {
7582                 struct igb_lrohdr *lroh = igb_lro_hdr(skb);
7583
7584 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7585                 /* close any active lro contexts */
7586                 igb_close_active_frag_list(skb);
7587
7588 #endif
7589                 /* incorporate ip header and re-calculate checksum */
7590                 lroh->iph.tot_len = ntohs(skb->len);
7591                 lroh->iph.check = 0;
7592
7593                 /* header length is 5 since we know no options exist */
7594                 lroh->iph.check = ip_fast_csum((u8 *)lroh, 5);
7595
7596                 /* clear TCP checksum to indicate we are an LRO frame */
7597                 lroh->th.check = 0;
7598
7599                 /* incorporate latest timestamp into the tcp header */
7600                 if (IGB_CB(skb)->tsecr) {
7601                         lroh->ts[2] = IGB_CB(skb)->tsecr;
7602                         lroh->ts[1] = htonl(IGB_CB(skb)->tsval);
7603                 }
7604 #ifdef NETIF_F_GSO
7605
7606                 skb_shinfo(skb)->gso_size = IGB_CB(skb)->mss;
7607                 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
7608 #endif
7609         }
7610
7611 #ifdef HAVE_VLAN_RX_REGISTER
7612         igb_receive_skb(q_vector, skb);
7613 #else
7614         napi_gro_receive(&q_vector->napi, skb);
7615 #endif
7616         lrolist->stats.flushed++;
7617 }
7618
7619 static void igb_lro_flush_all(struct igb_q_vector *q_vector)
7620 {
7621         struct igb_lro_list *lrolist = &q_vector->lrolist;
7622         struct sk_buff *skb, *tmp;
7623
7624         skb_queue_reverse_walk_safe(&lrolist->active, skb, tmp)
7625                 igb_lro_flush(q_vector, skb);
7626 }
7627
7628 /*
7629  * igb_lro_header_ok - Main LRO function.
7630  **/
7631 static void igb_lro_header_ok(struct sk_buff *skb)
7632 {
7633         struct igb_lrohdr *lroh = igb_lro_hdr(skb);
7634         u16 opt_bytes, data_len;
7635
7636 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7637         IGB_CB(skb)->tail = NULL;
7638 #endif
7639         IGB_CB(skb)->tsecr = 0;
7640         IGB_CB(skb)->append_cnt = 0;
7641         IGB_CB(skb)->mss = 0;
7642
7643         /* ensure that the checksum is valid */
7644         if (skb->ip_summed != CHECKSUM_UNNECESSARY)
7645                 return;
7646
7647         /* If we see CE codepoint in IP header, packet is not mergeable */
7648         if (INET_ECN_is_ce(ipv4_get_dsfield(&lroh->iph)))
7649                 return;
7650
7651         /* ensure no bits set besides ack or psh */
7652         if (lroh->th.fin || lroh->th.syn || lroh->th.rst ||
7653             lroh->th.urg || lroh->th.ece || lroh->th.cwr ||
7654             !lroh->th.ack)
7655                 return;
7656
7657         /* store the total packet length */
7658         data_len = ntohs(lroh->iph.tot_len);
7659
7660         /* remove any padding from the end of the skb */
7661         __pskb_trim(skb, data_len);
7662
7663         /* remove header length from data length */
7664         data_len -= sizeof(struct igb_lrohdr);
7665
7666         /*
7667          * check for timestamps. Since the only option we handle are timestamps,
7668          * we only have to handle the simple case of aligned timestamps
7669          */
7670         opt_bytes = (lroh->th.doff << 2) - sizeof(struct tcphdr);
7671         if (opt_bytes != 0) {
7672                 if ((opt_bytes != TCPOLEN_TSTAMP_ALIGNED) ||
7673                     !pskb_may_pull(skb, sizeof(struct igb_lrohdr) +
7674                                         TCPOLEN_TSTAMP_ALIGNED) ||
7675                     (lroh->ts[0] != htonl((TCPOPT_NOP << 24) |
7676                                              (TCPOPT_NOP << 16) |
7677                                              (TCPOPT_TIMESTAMP << 8) |
7678                                               TCPOLEN_TIMESTAMP)) ||
7679                     (lroh->ts[2] == 0)) {
7680                         return;
7681                 }
7682
7683                 IGB_CB(skb)->tsval = ntohl(lroh->ts[1]);
7684                 IGB_CB(skb)->tsecr = lroh->ts[2];
7685
7686                 data_len -= TCPOLEN_TSTAMP_ALIGNED;
7687         }
7688
7689         /* record data_len as mss for the packet */
7690         IGB_CB(skb)->mss = data_len;
7691         IGB_CB(skb)->next_seq = ntohl(lroh->th.seq);
7692 }
7693
7694 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7695 static void igb_merge_frags(struct sk_buff *lro_skb, struct sk_buff *new_skb)
7696 {
7697         struct skb_shared_info *sh_info;
7698         struct skb_shared_info *new_skb_info;
7699         unsigned int data_len;
7700
7701         sh_info = skb_shinfo(lro_skb);
7702         new_skb_info = skb_shinfo(new_skb);
7703
7704         /* copy frags into the last skb */
7705         memcpy(sh_info->frags + sh_info->nr_frags,
7706                new_skb_info->frags,
7707                new_skb_info->nr_frags * sizeof(skb_frag_t));
7708
7709         /* copy size data over */
7710         sh_info->nr_frags += new_skb_info->nr_frags;
7711         data_len = IGB_CB(new_skb)->mss;
7712         lro_skb->len += data_len;
7713         lro_skb->data_len += data_len;
7714         lro_skb->truesize += data_len;
7715
7716         /* wipe record of data from new_skb */
7717         new_skb_info->nr_frags = 0;
7718         new_skb->len = new_skb->data_len = 0;
7719         dev_kfree_skb_any(new_skb);
7720 }
7721
7722 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
7723 /**
7724  * igb_lro_receive - if able, queue skb into lro chain
7725  * @q_vector: structure containing interrupt and ring information
7726  * @new_skb: pointer to current skb being checked
7727  *
7728  * Checks whether the skb given is eligible for LRO and if that's
7729  * fine chains it to the existing lro_skb based on flowid. If an LRO for
7730  * the flow doesn't exist create one.
7731  **/
7732 static void igb_lro_receive(struct igb_q_vector *q_vector,
7733                             struct sk_buff *new_skb)
7734 {
7735         struct sk_buff *lro_skb;
7736         struct igb_lro_list *lrolist = &q_vector->lrolist;
7737         struct igb_lrohdr *lroh = igb_lro_hdr(new_skb);
7738         __be32 saddr = lroh->iph.saddr;
7739         __be32 daddr = lroh->iph.daddr;
7740         __be32 tcp_ports = *(__be32 *)&lroh->th;
7741         u16 data_len;
7742 #ifdef HAVE_VLAN_RX_REGISTER
7743         u16 vid = IGB_CB(new_skb)->vid;
7744 #else
7745         u16 vid = new_skb->vlan_tci;
7746 #endif
7747
7748         igb_lro_header_ok(new_skb);
7749
7750         /*
7751          * we have a packet that might be eligible for LRO,
7752          * so see if it matches anything we might expect
7753          */
7754         skb_queue_walk(&lrolist->active, lro_skb) {
7755                 if (*(__be32 *)&igb_lro_hdr(lro_skb)->th != tcp_ports ||
7756                     igb_lro_hdr(lro_skb)->iph.saddr != saddr ||
7757                     igb_lro_hdr(lro_skb)->iph.daddr != daddr)
7758                         continue;
7759
7760 #ifdef HAVE_VLAN_RX_REGISTER
7761                 if (IGB_CB(lro_skb)->vid != vid)
7762 #else
7763                 if (lro_skb->vlan_tci != vid)
7764 #endif
7765                         continue;
7766
7767                 /* out of order packet */
7768                 if (IGB_CB(lro_skb)->next_seq != IGB_CB(new_skb)->next_seq) {
7769                         igb_lro_flush(q_vector, lro_skb);
7770                         IGB_CB(new_skb)->mss = 0;
7771                         break;
7772                 }
7773
7774                 /* TCP timestamp options have changed */
7775                 if (!IGB_CB(lro_skb)->tsecr != !IGB_CB(new_skb)->tsecr) {
7776                         igb_lro_flush(q_vector, lro_skb);
7777                         break;
7778                 }
7779
7780                 /* make sure timestamp values are increasing */
7781                 if (IGB_CB(lro_skb)->tsecr &&
7782                     IGB_CB(lro_skb)->tsval > IGB_CB(new_skb)->tsval) {
7783                         igb_lro_flush(q_vector, lro_skb);
7784                         IGB_CB(new_skb)->mss = 0;
7785                         break;
7786                 }
7787
7788                 data_len = IGB_CB(new_skb)->mss;
7789
7790                 /* Check for all of the above below
7791                  *   malformed header
7792                  *   no tcp data
7793                  *   resultant packet would be too large
7794                  *   new skb is larger than our current mss
7795                  *   data would remain in header
7796                  *   we would consume more frags then the sk_buff contains
7797                  *   ack sequence numbers changed
7798                  *   window size has changed
7799                  */
7800                 if (data_len == 0 ||
7801                     data_len > IGB_CB(lro_skb)->mss ||
7802                     data_len > IGB_CB(lro_skb)->free ||
7803 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7804                     data_len != new_skb->data_len ||
7805                     skb_shinfo(new_skb)->nr_frags >=
7806                     (MAX_SKB_FRAGS - skb_shinfo(lro_skb)->nr_frags) ||
7807 #endif
7808                     igb_lro_hdr(lro_skb)->th.ack_seq != lroh->th.ack_seq ||
7809                     igb_lro_hdr(lro_skb)->th.window != lroh->th.window) {
7810                         igb_lro_flush(q_vector, lro_skb);
7811                         break;
7812                 }
7813
7814                 /* Remove IP and TCP header*/
7815                 skb_pull(new_skb, new_skb->len - data_len);
7816
7817                 /* update timestamp and timestamp echo response */
7818                 IGB_CB(lro_skb)->tsval = IGB_CB(new_skb)->tsval;
7819                 IGB_CB(lro_skb)->tsecr = IGB_CB(new_skb)->tsecr;
7820
7821                 /* update sequence and free space */
7822                 IGB_CB(lro_skb)->next_seq += data_len;
7823                 IGB_CB(lro_skb)->free -= data_len;
7824
7825                 /* update append_cnt */
7826                 IGB_CB(lro_skb)->append_cnt++;
7827
7828 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7829                 /* if header is empty pull pages into current skb */
7830                 igb_merge_frags(lro_skb, new_skb);
7831 #else
7832                 /* chain this new skb in frag_list */
7833                 igb_add_active_tail(lro_skb, new_skb);
7834 #endif
7835
7836                 if ((data_len < IGB_CB(lro_skb)->mss) || lroh->th.psh ||
7837                     skb_shinfo(lro_skb)->nr_frags == MAX_SKB_FRAGS) {
7838                         igb_lro_hdr(lro_skb)->th.psh |= lroh->th.psh;
7839                         igb_lro_flush(q_vector, lro_skb);
7840                 }
7841
7842                 lrolist->stats.coal++;
7843                 return;
7844         }
7845
7846         if (IGB_CB(new_skb)->mss && !lroh->th.psh) {
7847                 /* if we are at capacity flush the tail */
7848                 if (skb_queue_len(&lrolist->active) >= IGB_LRO_MAX) {
7849                         lro_skb = skb_peek_tail(&lrolist->active);
7850                         if (lro_skb)
7851                                 igb_lro_flush(q_vector, lro_skb);
7852                 }
7853
7854                 /* update sequence and free space */
7855                 IGB_CB(new_skb)->next_seq += IGB_CB(new_skb)->mss;
7856                 IGB_CB(new_skb)->free = 65521 - new_skb->len;
7857
7858                 /* .. and insert at the front of the active list */
7859                 __skb_queue_head(&lrolist->active, new_skb);
7860
7861                 lrolist->stats.coal++;
7862                 return;
7863         }
7864
7865         /* packet not handled by any of the above, pass it to the stack */
7866 #ifdef HAVE_VLAN_RX_REGISTER
7867         igb_receive_skb(q_vector, new_skb);
7868 #else
7869         napi_gro_receive(&q_vector->napi, new_skb);
7870 #endif
7871 }
7872
7873 #endif /* IGB_NO_LRO */
7874 /**
7875  * igb_process_skb_fields - Populate skb header fields from Rx descriptor
7876  * @rx_ring: rx descriptor ring packet is being transacted on
7877  * @rx_desc: pointer to the EOP Rx descriptor
7878  * @skb: pointer to current skb being populated
7879  *
7880  * This function checks the ring, descriptor, and packet information in
7881  * order to populate the hash, checksum, VLAN, timestamp, protocol, and
7882  * other fields within the skb.
7883  **/
7884 static void igb_process_skb_fields(struct igb_ring *rx_ring,
7885                                    union e1000_adv_rx_desc *rx_desc,
7886                                    struct sk_buff *skb)
7887 {
7888         struct net_device *dev = rx_ring->netdev;
7889         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
7890
7891 #ifdef NETIF_F_RXHASH
7892         igb_rx_hash(rx_ring, rx_desc, skb);
7893
7894 #endif
7895         igb_rx_checksum(rx_ring, rx_desc, skb);
7896
7897     /* update packet type stats */
7898         if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV4))
7899                 rx_ring->rx_stats.ipv4_packets++;
7900         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV4_EX))
7901                 rx_ring->rx_stats.ipv4e_packets++;
7902         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV6))
7903                 rx_ring->rx_stats.ipv6_packets++;
7904         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV6_EX))
7905                 rx_ring->rx_stats.ipv6e_packets++;
7906         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_TCP))
7907                 rx_ring->rx_stats.tcp_packets++;
7908         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_UDP))
7909                 rx_ring->rx_stats.udp_packets++;
7910         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_SCTP))
7911                 rx_ring->rx_stats.sctp_packets++;
7912         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_NFS))
7913                 rx_ring->rx_stats.nfs_packets++;
7914
7915 #ifdef HAVE_PTP_1588_CLOCK
7916         igb_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
7917 #endif /* HAVE_PTP_1588_CLOCK */
7918
7919 #ifdef NETIF_F_HW_VLAN_CTAG_RX
7920         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
7921 #else
7922         if ((dev->features & NETIF_F_HW_VLAN_RX) &&
7923 #endif
7924             igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
7925                 u16 vid = 0;
7926                 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
7927                     test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
7928                         vid = be16_to_cpu(rx_desc->wb.upper.vlan);
7929                 else
7930                         vid = le16_to_cpu(rx_desc->wb.upper.vlan);
7931 #ifdef HAVE_VLAN_RX_REGISTER
7932                 IGB_CB(skb)->vid = vid;
7933         } else {
7934                 IGB_CB(skb)->vid = 0;
7935 #else
7936
7937 #ifdef HAVE_VLAN_PROTOCOL
7938                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
7939 #else
7940                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
7941 #endif
7942
7943
7944 #endif
7945         }
7946
7947         skb_record_rx_queue(skb, rx_ring->queue_index);
7948
7949         skb->protocol = eth_type_trans(skb, dev);
7950 }
7951
7952 /**
7953  * igb_is_non_eop - process handling of non-EOP buffers
7954  * @rx_ring: Rx ring being processed
7955  * @rx_desc: Rx descriptor for current buffer
7956  *
7957  * This function updates next to clean.  If the buffer is an EOP buffer
7958  * this function exits returning false, otherwise it will place the
7959  * sk_buff in the next buffer to be chained and return true indicating
7960  * that this is in fact a non-EOP buffer.
7961  **/
7962 static bool igb_is_non_eop(struct igb_ring *rx_ring,
7963                            union e1000_adv_rx_desc *rx_desc)
7964 {
7965         u32 ntc = rx_ring->next_to_clean + 1;
7966
7967         /* fetch, update, and store next to clean */
7968         ntc = (ntc < rx_ring->count) ? ntc : 0;
7969         rx_ring->next_to_clean = ntc;
7970
7971         prefetch(IGB_RX_DESC(rx_ring, ntc));
7972
7973         if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
7974                 return false;
7975
7976         return true;
7977 }
7978
7979 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7980 /* igb_clean_rx_irq -- * legacy */
7981 static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, int budget)
7982 {
7983         struct igb_ring *rx_ring = q_vector->rx.ring;
7984         unsigned int total_bytes = 0, total_packets = 0;
7985         u16 cleaned_count = igb_desc_unused(rx_ring);
7986
7987         do {
7988                 struct igb_rx_buffer *rx_buffer;
7989                 union e1000_adv_rx_desc *rx_desc;
7990                 struct sk_buff *skb;
7991                 u16 ntc;
7992
7993                 /* return some buffers to hardware, one at a time is too slow */
7994                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
7995                         igb_alloc_rx_buffers(rx_ring, cleaned_count);
7996                         cleaned_count = 0;
7997                 }
7998
7999                 ntc = rx_ring->next_to_clean;
8000                 rx_desc = IGB_RX_DESC(rx_ring, ntc);
8001                 rx_buffer = &rx_ring->rx_buffer_info[ntc];
8002
8003                 if (!igb_test_staterr(rx_desc, E1000_RXD_STAT_DD))
8004                         break;
8005
8006                 /*
8007                  * This memory barrier is needed to keep us from reading
8008                  * any other fields out of the rx_desc until we know the
8009                  * RXD_STAT_DD bit is set
8010                  */
8011                 rmb();
8012
8013                 skb = rx_buffer->skb;
8014
8015                 prefetch(skb->data);
8016
8017                 /* pull the header of the skb in */
8018                 __skb_put(skb, le16_to_cpu(rx_desc->wb.upper.length));
8019
8020                 /* clear skb reference in buffer info structure */
8021                 rx_buffer->skb = NULL;
8022
8023                 cleaned_count++;
8024
8025                 BUG_ON(igb_is_non_eop(rx_ring, rx_desc));
8026
8027                 dma_unmap_single(rx_ring->dev, rx_buffer->dma,
8028                                  rx_ring->rx_buffer_len,
8029                                  DMA_FROM_DEVICE);
8030                 rx_buffer->dma = 0;
8031
8032                 if (igb_test_staterr(rx_desc,
8033                                      E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
8034                         dev_kfree_skb_any(skb);
8035                         continue;
8036                 }
8037
8038                 total_bytes += skb->len;
8039
8040                 /* populate checksum, timestamp, VLAN, and protocol */
8041                 igb_process_skb_fields(rx_ring, rx_desc, skb);
8042
8043 #ifndef IGB_NO_LRO
8044                 if (igb_can_lro(rx_ring, rx_desc, skb))
8045                         igb_lro_receive(q_vector, skb);
8046                 else
8047 #endif
8048 #ifdef HAVE_VLAN_RX_REGISTER
8049                         igb_receive_skb(q_vector, skb);
8050 #else
8051                         napi_gro_receive(&q_vector->napi, skb);
8052 #endif
8053
8054 #ifndef NETIF_F_GRO
8055                 netdev_ring(rx_ring)->last_rx = jiffies;
8056
8057 #endif
8058                 /* update budget accounting */
8059                 total_packets++;
8060         } while (likely(total_packets < budget));
8061
8062         rx_ring->rx_stats.packets += total_packets;
8063         rx_ring->rx_stats.bytes += total_bytes;
8064         q_vector->rx.total_packets += total_packets;
8065         q_vector->rx.total_bytes += total_bytes;
8066
8067         if (cleaned_count)
8068                 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8069
8070 #ifndef IGB_NO_LRO
8071         igb_lro_flush_all(q_vector);
8072
8073 #endif /* IGB_NO_LRO */
8074         return total_packets < budget;
8075 }
8076 #else /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8077 /**
8078  * igb_get_headlen - determine size of header for LRO/GRO
8079  * @data: pointer to the start of the headers
8080  * @max_len: total length of section to find headers in
8081  *
8082  * This function is meant to determine the length of headers that will
8083  * be recognized by hardware for LRO, and GRO offloads.  The main
8084  * motivation of doing this is to only perform one pull for IPv4 TCP
8085  * packets so that we can do basic things like calculating the gso_size
8086  * based on the average data per packet.
8087  **/
8088 static unsigned int igb_get_headlen(unsigned char *data,
8089                                     unsigned int max_len)
8090 {
8091         union {
8092                 unsigned char *network;
8093                 /* l2 headers */
8094                 struct ethhdr *eth;
8095                 struct vlan_hdr *vlan;
8096                 /* l3 headers */
8097                 struct iphdr *ipv4;
8098                 struct ipv6hdr *ipv6;
8099         } hdr;
8100         __be16 protocol;
8101         u8 nexthdr = 0; /* default to not TCP */
8102         u8 hlen;
8103
8104         /* this should never happen, but better safe than sorry */
8105         if (max_len < ETH_HLEN)
8106                 return max_len;
8107
8108         /* initialize network frame pointer */
8109         hdr.network = data;
8110
8111         /* set first protocol and move network header forward */
8112         protocol = hdr.eth->h_proto;
8113         hdr.network += ETH_HLEN;
8114
8115         /* handle any vlan tag if present */
8116         if (protocol == __constant_htons(ETH_P_8021Q)) {
8117                 if ((hdr.network - data) > (max_len - VLAN_HLEN))
8118                         return max_len;
8119
8120                 protocol = hdr.vlan->h_vlan_encapsulated_proto;
8121                 hdr.network += VLAN_HLEN;
8122         }
8123
8124         /* handle L3 protocols */
8125         if (protocol == __constant_htons(ETH_P_IP)) {
8126                 if ((hdr.network - data) > (max_len - sizeof(struct iphdr)))
8127                         return max_len;
8128
8129                 /* access ihl as a u8 to avoid unaligned access on ia64 */
8130                 hlen = (hdr.network[0] & 0x0F) << 2;
8131
8132                 /* verify hlen meets minimum size requirements */
8133                 if (hlen < sizeof(struct iphdr))
8134                         return hdr.network - data;
8135
8136                 /* record next protocol if header is present */
8137                 if (!(hdr.ipv4->frag_off & htons(IP_OFFSET)))
8138                         nexthdr = hdr.ipv4->protocol;
8139 #ifdef NETIF_F_TSO6
8140         } else if (protocol == __constant_htons(ETH_P_IPV6)) {
8141                 if ((hdr.network - data) > (max_len - sizeof(struct ipv6hdr)))
8142                         return max_len;
8143
8144                 /* record next protocol */
8145                 nexthdr = hdr.ipv6->nexthdr;
8146                 hlen = sizeof(struct ipv6hdr);
8147 #endif /* NETIF_F_TSO6 */
8148         } else {
8149                 return hdr.network - data;
8150         }
8151
8152         /* relocate pointer to start of L4 header */
8153         hdr.network += hlen;
8154
8155         /* finally sort out TCP */
8156         if (nexthdr == IPPROTO_TCP) {
8157                 if ((hdr.network - data) > (max_len - sizeof(struct tcphdr)))
8158                         return max_len;
8159
8160                 /* access doff as a u8 to avoid unaligned access on ia64 */
8161                 hlen = (hdr.network[12] & 0xF0) >> 2;
8162
8163                 /* verify hlen meets minimum size requirements */
8164                 if (hlen < sizeof(struct tcphdr))
8165                         return hdr.network - data;
8166
8167                 hdr.network += hlen;
8168         } else if (nexthdr == IPPROTO_UDP) {
8169                 if ((hdr.network - data) > (max_len - sizeof(struct udphdr)))
8170                         return max_len;
8171
8172                 hdr.network += sizeof(struct udphdr);
8173         }
8174
8175         /*
8176          * If everything has gone correctly hdr.network should be the
8177          * data section of the packet and will be the end of the header.
8178          * If not then it probably represents the end of the last recognized
8179          * header.
8180          */
8181         if ((hdr.network - data) < max_len)
8182                 return hdr.network - data;
8183         else
8184                 return max_len;
8185 }
8186
8187 /**
8188  * igb_pull_tail - igb specific version of skb_pull_tail
8189  * @rx_ring: rx descriptor ring packet is being transacted on
8190  * @rx_desc: pointer to the EOP Rx descriptor
8191  * @skb: pointer to current skb being adjusted
8192  *
8193  * This function is an igb specific version of __pskb_pull_tail.  The
8194  * main difference between this version and the original function is that
8195  * this function can make several assumptions about the state of things
8196  * that allow for significant optimizations versus the standard function.
8197  * As a result we can do things like drop a frag and maintain an accurate
8198  * truesize for the skb.
8199  */
8200 static void igb_pull_tail(struct igb_ring *rx_ring,
8201                           union e1000_adv_rx_desc *rx_desc,
8202                           struct sk_buff *skb)
8203 {
8204         struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
8205         unsigned char *va;
8206         unsigned int pull_len;
8207
8208         /*
8209          * it is valid to use page_address instead of kmap since we are
8210          * working with pages allocated out of the lomem pool per
8211          * alloc_page(GFP_ATOMIC)
8212          */
8213         va = skb_frag_address(frag);
8214
8215 #ifdef HAVE_PTP_1588_CLOCK
8216         if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
8217                 /* retrieve timestamp from buffer */
8218                 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
8219
8220                 /* update pointers to remove timestamp header */
8221                 skb_frag_size_sub(frag, IGB_TS_HDR_LEN);
8222                 frag->page_offset += IGB_TS_HDR_LEN;
8223                 skb->data_len -= IGB_TS_HDR_LEN;
8224                 skb->len -= IGB_TS_HDR_LEN;
8225
8226                 /* move va to start of packet data */
8227                 va += IGB_TS_HDR_LEN;
8228         }
8229 #endif /* HAVE_PTP_1588_CLOCK */
8230
8231         /*
8232          * we need the header to contain the greater of either ETH_HLEN or
8233          * 60 bytes if the skb->len is less than 60 for skb_pad.
8234          */
8235         pull_len = igb_get_headlen(va, IGB_RX_HDR_LEN);
8236
8237         /* align pull length to size of long to optimize memcpy performance */
8238         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
8239
8240         /* update all of the pointers */
8241         skb_frag_size_sub(frag, pull_len);
8242         frag->page_offset += pull_len;
8243         skb->data_len -= pull_len;
8244         skb->tail += pull_len;
8245 }
8246
8247 /**
8248  * igb_cleanup_headers - Correct corrupted or empty headers
8249  * @rx_ring: rx descriptor ring packet is being transacted on
8250  * @rx_desc: pointer to the EOP Rx descriptor
8251  * @skb: pointer to current skb being fixed
8252  *
8253  * Address the case where we are pulling data in on pages only
8254  * and as such no data is present in the skb header.
8255  *
8256  * In addition if skb is not at least 60 bytes we need to pad it so that
8257  * it is large enough to qualify as a valid Ethernet frame.
8258  *
8259  * Returns true if an error was encountered and skb was freed.
8260  **/
8261 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
8262                                 union e1000_adv_rx_desc *rx_desc,
8263                                 struct sk_buff *skb)
8264 {
8265
8266         if (unlikely((igb_test_staterr(rx_desc,
8267                                        E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
8268                 struct net_device *netdev = rx_ring->netdev;
8269                 if (!(netdev->features & NETIF_F_RXALL)) {
8270                         dev_kfree_skb_any(skb);
8271                         return true;
8272                 }
8273         }
8274
8275         /* place header in linear portion of buffer */
8276         if (skb_is_nonlinear(skb))
8277                 igb_pull_tail(rx_ring, rx_desc, skb);
8278
8279         /* if skb_pad returns an error the skb was freed */
8280         if (unlikely(skb->len < 60)) {
8281                 int pad_len = 60 - skb->len;
8282
8283                 if (skb_pad(skb, pad_len))
8284                         return true;
8285                 __skb_put(skb, pad_len);
8286         }
8287
8288         return false;
8289 }
8290
8291 /* igb_clean_rx_irq -- * packet split */
8292 static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, int budget)
8293 {
8294         struct igb_ring *rx_ring = q_vector->rx.ring;
8295         struct sk_buff *skb = rx_ring->skb;
8296         unsigned int total_bytes = 0, total_packets = 0;
8297         u16 cleaned_count = igb_desc_unused(rx_ring);
8298
8299         do {
8300                 union e1000_adv_rx_desc *rx_desc;
8301
8302                 /* return some buffers to hardware, one at a time is too slow */
8303                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
8304                         igb_alloc_rx_buffers(rx_ring, cleaned_count);
8305                         cleaned_count = 0;
8306                 }
8307
8308                 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
8309
8310                 if (!igb_test_staterr(rx_desc, E1000_RXD_STAT_DD))
8311                         break;
8312
8313                 /*
8314                  * This memory barrier is needed to keep us from reading
8315                  * any other fields out of the rx_desc until we know the
8316                  * RXD_STAT_DD bit is set
8317                  */
8318                 rmb();
8319
8320                 /* retrieve a buffer from the ring */
8321                 skb = igb_fetch_rx_buffer(rx_ring, rx_desc, skb);
8322
8323                 /* exit if we failed to retrieve a buffer */
8324                 if (!skb)
8325                         break;
8326
8327                 cleaned_count++;
8328
8329                 /* fetch next buffer in frame if non-eop */
8330                 if (igb_is_non_eop(rx_ring, rx_desc))
8331                         continue;
8332
8333                 /* verify the packet layout is correct */
8334                 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
8335                         skb = NULL;
8336                         continue;
8337                 }
8338
8339                 /* probably a little skewed due to removing CRC */
8340                 total_bytes += skb->len;
8341
8342                 /* populate checksum, timestamp, VLAN, and protocol */
8343                 igb_process_skb_fields(rx_ring, rx_desc, skb);
8344
8345 #ifndef IGB_NO_LRO
8346                 if (igb_can_lro(rx_ring, rx_desc, skb))
8347                         igb_lro_receive(q_vector, skb);
8348                 else
8349 #endif
8350 #ifdef HAVE_VLAN_RX_REGISTER
8351                         igb_receive_skb(q_vector, skb);
8352 #else
8353                         napi_gro_receive(&q_vector->napi, skb);
8354 #endif
8355 #ifndef NETIF_F_GRO
8356
8357                 netdev_ring(rx_ring)->last_rx = jiffies;
8358 #endif
8359
8360                 /* reset skb pointer */
8361                 skb = NULL;
8362
8363                 /* update budget accounting */
8364                 total_packets++;
8365         } while (likely(total_packets < budget));
8366
8367         /* place incomplete frames back on ring for completion */
8368         rx_ring->skb = skb;
8369
8370         rx_ring->rx_stats.packets += total_packets;
8371         rx_ring->rx_stats.bytes += total_bytes;
8372         q_vector->rx.total_packets += total_packets;
8373         q_vector->rx.total_bytes += total_bytes;
8374
8375         if (cleaned_count)
8376                 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8377
8378 #ifndef IGB_NO_LRO
8379         igb_lro_flush_all(q_vector);
8380
8381 #endif /* IGB_NO_LRO */
8382         return total_packets < budget;
8383 }
8384 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8385
8386 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8387 static bool igb_alloc_mapped_skb(struct igb_ring *rx_ring,
8388                                  struct igb_rx_buffer *bi)
8389 {
8390         struct sk_buff *skb = bi->skb;
8391         dma_addr_t dma = bi->dma;
8392
8393         if (dma)
8394                 return true;
8395
8396         if (likely(!skb)) {
8397                 skb = netdev_alloc_skb_ip_align(netdev_ring(rx_ring),
8398                                                 rx_ring->rx_buffer_len);
8399                 bi->skb = skb;
8400                 if (!skb) {
8401                         rx_ring->rx_stats.alloc_failed++;
8402                         return false;
8403                 }
8404
8405                 /* initialize skb for ring */
8406                 skb_record_rx_queue(skb, ring_queue_index(rx_ring));
8407         }
8408
8409         dma = dma_map_single(rx_ring->dev, skb->data,
8410                              rx_ring->rx_buffer_len, DMA_FROM_DEVICE);
8411
8412         /* if mapping failed free memory back to system since
8413          * there isn't much point in holding memory we can't use
8414          */
8415         if (dma_mapping_error(rx_ring->dev, dma)) {
8416                 dev_kfree_skb_any(skb);
8417                 bi->skb = NULL;
8418
8419                 rx_ring->rx_stats.alloc_failed++;
8420                 return false;
8421         }
8422
8423         bi->dma = dma;
8424         return true;
8425 }
8426
8427 #else /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8428 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
8429                                   struct igb_rx_buffer *bi)
8430 {
8431         struct page *page = bi->page;
8432         dma_addr_t dma;
8433
8434         /* since we are recycling buffers we should seldom need to alloc */
8435         if (likely(page))
8436                 return true;
8437
8438         /* alloc new page for storage */
8439         page = alloc_page(GFP_ATOMIC | __GFP_COLD);
8440         if (unlikely(!page)) {
8441                 rx_ring->rx_stats.alloc_failed++;
8442                 return false;
8443         }
8444
8445         /* map page for use */
8446         dma = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
8447
8448         /*
8449          * if mapping failed free memory back to system since
8450          * there isn't much point in holding memory we can't use
8451          */
8452         if (dma_mapping_error(rx_ring->dev, dma)) {
8453                 __free_page(page);
8454
8455                 rx_ring->rx_stats.alloc_failed++;
8456                 return false;
8457         }
8458
8459         bi->dma = dma;
8460         bi->page = page;
8461         bi->page_offset = 0;
8462
8463         return true;
8464 }
8465
8466 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8467 /**
8468  * igb_alloc_rx_buffers - Replace used receive buffers; packet split
8469  * @adapter: address of board private structure
8470  **/
8471 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
8472 {
8473         union e1000_adv_rx_desc *rx_desc;
8474         struct igb_rx_buffer *bi;
8475         u16 i = rx_ring->next_to_use;
8476
8477         /* nothing to do */
8478         if (!cleaned_count)
8479                 return;
8480
8481         rx_desc = IGB_RX_DESC(rx_ring, i);
8482         bi = &rx_ring->rx_buffer_info[i];
8483         i -= rx_ring->count;
8484
8485         do {
8486 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8487                 if (!igb_alloc_mapped_skb(rx_ring, bi))
8488 #else
8489                 if (!igb_alloc_mapped_page(rx_ring, bi))
8490 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8491                         break;
8492
8493                 /*
8494                  * Refresh the desc even if buffer_addrs didn't change
8495                  * because each write-back erases this info.
8496                  */
8497 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8498                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
8499 #else
8500                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
8501 #endif
8502
8503                 rx_desc++;
8504                 bi++;
8505                 i++;
8506                 if (unlikely(!i)) {
8507                         rx_desc = IGB_RX_DESC(rx_ring, 0);
8508                         bi = rx_ring->rx_buffer_info;
8509                         i -= rx_ring->count;
8510                 }
8511
8512                 /* clear the hdr_addr for the next_to_use descriptor */
8513                 rx_desc->read.hdr_addr = 0;
8514
8515                 cleaned_count--;
8516         } while (cleaned_count);
8517
8518         i += rx_ring->count;
8519
8520         if (rx_ring->next_to_use != i) {
8521                 /* record the next descriptor to use */
8522                 rx_ring->next_to_use = i;
8523
8524 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
8525                 /* update next to alloc since we have filled the ring */
8526                 rx_ring->next_to_alloc = i;
8527
8528 #endif
8529                 /*
8530                  * Force memory writes to complete before letting h/w
8531                  * know there are new descriptors to fetch.  (Only
8532                  * applicable for weak-ordered memory model archs,
8533                  * such as IA-64).
8534                  */
8535                 wmb();
8536                 writel(i, rx_ring->tail);
8537         }
8538 }
8539
8540 #ifdef SIOCGMIIPHY
8541 /**
8542  * igb_mii_ioctl -
8543  * @netdev:
8544  * @ifreq:
8545  * @cmd:
8546  **/
8547 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
8548 {
8549         struct igb_adapter *adapter = netdev_priv(netdev);
8550         struct mii_ioctl_data *data = if_mii(ifr);
8551
8552         if (adapter->hw.phy.media_type != e1000_media_type_copper)
8553                 return -EOPNOTSUPP;
8554
8555         switch (cmd) {
8556         case SIOCGMIIPHY:
8557                 data->phy_id = adapter->hw.phy.addr;
8558                 break;
8559         case SIOCGMIIREG:
8560                 if (!capable(CAP_NET_ADMIN))
8561                         return -EPERM;
8562                 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
8563                                    &data->val_out))
8564                         return -EIO;
8565                 break;
8566         case SIOCSMIIREG:
8567         default:
8568                 return -EOPNOTSUPP;
8569         }
8570         return E1000_SUCCESS;
8571 }
8572
8573 #endif
8574 /**
8575  * igb_ioctl -
8576  * @netdev:
8577  * @ifreq:
8578  * @cmd:
8579  **/
8580 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
8581 {
8582         switch (cmd) {
8583 #ifdef SIOCGMIIPHY
8584         case SIOCGMIIPHY:
8585         case SIOCGMIIREG:
8586         case SIOCSMIIREG:
8587                 return igb_mii_ioctl(netdev, ifr, cmd);
8588 #endif
8589 #ifdef HAVE_PTP_1588_CLOCK
8590         case SIOCSHWTSTAMP:
8591                 return igb_ptp_hwtstamp_ioctl(netdev, ifr, cmd);
8592 #endif /* HAVE_PTP_1588_CLOCK */
8593 #ifdef ETHTOOL_OPS_COMPAT
8594         case SIOCETHTOOL:
8595                 return ethtool_ioctl(ifr);
8596 #endif
8597         default:
8598                 return -EOPNOTSUPP;
8599         }
8600 }
8601
8602 s32 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
8603 {
8604         struct igb_adapter *adapter = hw->back;
8605         u16 cap_offset;
8606
8607         cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
8608         if (!cap_offset)
8609                 return -E1000_ERR_CONFIG;
8610
8611         pci_read_config_word(adapter->pdev, cap_offset + reg, value);
8612
8613         return E1000_SUCCESS;
8614 }
8615
8616 s32 e1000_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
8617 {
8618         struct igb_adapter *adapter = hw->back;
8619         u16 cap_offset;
8620
8621         cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
8622         if (!cap_offset)
8623                 return -E1000_ERR_CONFIG;
8624
8625         pci_write_config_word(adapter->pdev, cap_offset + reg, *value);
8626
8627         return E1000_SUCCESS;
8628 }
8629
8630 #ifdef HAVE_VLAN_RX_REGISTER
8631 static void igb_vlan_mode(struct net_device *netdev, struct vlan_group *vlgrp)
8632 #else
8633 void igb_vlan_mode(struct net_device *netdev, u32 features)
8634 #endif
8635 {
8636         struct igb_adapter *adapter = netdev_priv(netdev);
8637         struct e1000_hw *hw = &adapter->hw;
8638         u32 ctrl, rctl;
8639         int i;
8640 #ifdef HAVE_VLAN_RX_REGISTER
8641         bool enable = !!vlgrp;
8642
8643         igb_irq_disable(adapter);
8644
8645         adapter->vlgrp = vlgrp;
8646
8647         if (!test_bit(__IGB_DOWN, &adapter->state))
8648                 igb_irq_enable(adapter);
8649 #else
8650 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8651         bool enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
8652 #else
8653         bool enable = !!(features & NETIF_F_HW_VLAN_RX);
8654 #endif
8655 #endif
8656
8657         if (enable) {
8658                 /* enable VLAN tag insert/strip */
8659                 ctrl = E1000_READ_REG(hw, E1000_CTRL);
8660                 ctrl |= E1000_CTRL_VME;
8661                 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
8662
8663                 /* Disable CFI check */
8664                 rctl = E1000_READ_REG(hw, E1000_RCTL);
8665                 rctl &= ~E1000_RCTL_CFIEN;
8666                 E1000_WRITE_REG(hw, E1000_RCTL, rctl);
8667         } else {
8668                 /* disable VLAN tag insert/strip */
8669                 ctrl = E1000_READ_REG(hw, E1000_CTRL);
8670                 ctrl &= ~E1000_CTRL_VME;
8671                 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
8672         }
8673
8674 #ifndef CONFIG_IGB_VMDQ_NETDEV
8675         for (i = 0; i < adapter->vmdq_pools; i++) {
8676                 igb_set_vf_vlan_strip(adapter,
8677                                       adapter->vfs_allocated_count + i,
8678                                       enable);
8679         }
8680
8681 #else
8682         igb_set_vf_vlan_strip(adapter,
8683                               adapter->vfs_allocated_count,
8684                               enable);
8685
8686         for (i = 1; i < adapter->vmdq_pools; i++) {
8687 #ifdef HAVE_VLAN_RX_REGISTER
8688                 struct igb_vmdq_adapter *vadapter;
8689                 vadapter = netdev_priv(adapter->vmdq_netdev[i-1]);
8690                 enable = !!vadapter->vlgrp;
8691 #else
8692                 struct net_device *vnetdev;
8693                 vnetdev = adapter->vmdq_netdev[i-1];
8694 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8695                 enable = !!(vnetdev->features & NETIF_F_HW_VLAN_CTAG_RX);
8696 #else
8697                 enable = !!(vnetdev->features & NETIF_F_HW_VLAN_RX);
8698 #endif
8699 #endif
8700                 igb_set_vf_vlan_strip(adapter,
8701                                       adapter->vfs_allocated_count + i,
8702                                       enable);
8703         }
8704
8705 #endif
8706         igb_rlpml_set(adapter);
8707 }
8708
8709 #ifdef HAVE_VLAN_PROTOCOL
8710 static int igb_vlan_rx_add_vid(struct net_device *netdev, __be16 proto, u16 vid)
8711 #elif defined HAVE_INT_NDO_VLAN_RX_ADD_VID
8712 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8713 static int igb_vlan_rx_add_vid(struct net_device *netdev,
8714                                __always_unused __be16 proto, u16 vid)
8715 #else
8716 static int igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
8717 #endif
8718 #else
8719 static void igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
8720 #endif
8721 {
8722         struct igb_adapter *adapter = netdev_priv(netdev);
8723         int pf_id = adapter->vfs_allocated_count;
8724
8725         /* attempt to add filter to vlvf array */
8726         igb_vlvf_set(adapter, vid, TRUE, pf_id);
8727
8728         /* add the filter since PF can receive vlans w/o entry in vlvf */
8729         igb_vfta_set(adapter, vid, TRUE);
8730 #ifndef HAVE_NETDEV_VLAN_FEATURES
8731
8732         /* Copy feature flags from netdev to the vlan netdev for this vid.
8733          * This allows things like TSO to bubble down to our vlan device.
8734          * There is no need to update netdev for vlan 0 (DCB), since it
8735          * wouldn't has v_netdev.
8736          */
8737         if (adapter->vlgrp) {
8738                 struct vlan_group *vlgrp = adapter->vlgrp;
8739                 struct net_device *v_netdev = vlan_group_get_device(vlgrp, vid);
8740                 if (v_netdev) {
8741                         v_netdev->features |= netdev->features;
8742                         vlan_group_set_device(vlgrp, vid, v_netdev);
8743                 }
8744         }
8745 #endif
8746 #ifndef HAVE_VLAN_RX_REGISTER
8747
8748         set_bit(vid, adapter->active_vlans);
8749 #endif
8750 #ifdef HAVE_INT_NDO_VLAN_RX_ADD_VID
8751         return 0;
8752 #endif
8753 }
8754
8755 #ifdef HAVE_VLAN_PROTOCOL
8756 static int igb_vlan_rx_kill_vid(struct net_device *netdev, __be16 proto, u16 vid)
8757 #elif defined HAVE_INT_NDO_VLAN_RX_ADD_VID
8758 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8759 static int igb_vlan_rx_kill_vid(struct net_device *netdev,
8760                                 __always_unused __be16 proto, u16 vid)
8761 #else
8762 static int igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
8763 #endif
8764 #else
8765 static void igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
8766 #endif
8767 {
8768         struct igb_adapter *adapter = netdev_priv(netdev);
8769         int pf_id = adapter->vfs_allocated_count;
8770         s32 err;
8771
8772 #ifdef HAVE_VLAN_RX_REGISTER
8773         igb_irq_disable(adapter);
8774
8775         vlan_group_set_device(adapter->vlgrp, vid, NULL);
8776
8777         if (!test_bit(__IGB_DOWN, &adapter->state))
8778                 igb_irq_enable(adapter);
8779
8780 #endif /* HAVE_VLAN_RX_REGISTER */
8781         /* remove vlan from VLVF table array */
8782         err = igb_vlvf_set(adapter, vid, FALSE, pf_id);
8783
8784         /* if vid was not present in VLVF just remove it from table */
8785         if (err)
8786                 igb_vfta_set(adapter, vid, FALSE);
8787 #ifndef HAVE_VLAN_RX_REGISTER
8788
8789         clear_bit(vid, adapter->active_vlans);
8790 #endif
8791 #ifdef HAVE_INT_NDO_VLAN_RX_ADD_VID
8792         return 0;
8793 #endif
8794 }
8795
8796 static void igb_restore_vlan(struct igb_adapter *adapter)
8797 {
8798 #ifdef HAVE_VLAN_RX_REGISTER
8799         igb_vlan_mode(adapter->netdev, adapter->vlgrp);
8800
8801         if (adapter->vlgrp) {
8802                 u16 vid;
8803                 for (vid = 0; vid < VLAN_N_VID; vid++) {
8804                         if (!vlan_group_get_device(adapter->vlgrp, vid))
8805                                 continue;
8806 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8807                         igb_vlan_rx_add_vid(adapter->netdev,
8808                                             htons(ETH_P_8021Q), vid);
8809 #else
8810                         igb_vlan_rx_add_vid(adapter->netdev, vid);
8811 #endif
8812                 }
8813         }
8814 #else
8815         u16 vid;
8816
8817         igb_vlan_mode(adapter->netdev, adapter->netdev->features);
8818
8819         for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
8820 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8821                 igb_vlan_rx_add_vid(adapter->netdev,
8822                                     htons(ETH_P_8021Q), vid);
8823 #else
8824                 igb_vlan_rx_add_vid(adapter->netdev, vid);
8825 #endif
8826 #endif
8827 }
8828
8829 int igb_set_spd_dplx(struct igb_adapter *adapter, u16 spddplx)
8830 {
8831         struct pci_dev *pdev = adapter->pdev;
8832         struct e1000_mac_info *mac = &adapter->hw.mac;
8833
8834         mac->autoneg = 0;
8835
8836         /* SerDes device's does not support 10Mbps Full/duplex
8837          * and 100Mbps Half duplex
8838          */
8839         if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
8840                 switch (spddplx) {
8841                 case SPEED_10 + DUPLEX_HALF:
8842                 case SPEED_10 + DUPLEX_FULL:
8843                 case SPEED_100 + DUPLEX_HALF:
8844                         dev_err(pci_dev_to_dev(pdev),
8845                                 "Unsupported Speed/Duplex configuration\n");
8846                         return -EINVAL;
8847                 default:
8848                         break;
8849                 }
8850         }
8851
8852         switch (spddplx) {
8853         case SPEED_10 + DUPLEX_HALF:
8854                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
8855                 break;
8856         case SPEED_10 + DUPLEX_FULL:
8857                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
8858                 break;
8859         case SPEED_100 + DUPLEX_HALF:
8860                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
8861                 break;
8862         case SPEED_100 + DUPLEX_FULL:
8863                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
8864                 break;
8865         case SPEED_1000 + DUPLEX_FULL:
8866                 mac->autoneg = 1;
8867                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
8868                 break;
8869         case SPEED_1000 + DUPLEX_HALF: /* not supported */
8870         default:
8871                 dev_err(pci_dev_to_dev(pdev), "Unsupported Speed/Duplex configuration\n");
8872                 return -EINVAL;
8873         }
8874
8875         /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
8876         adapter->hw.phy.mdix = AUTO_ALL_MODES;
8877
8878         return 0;
8879 }
8880
8881 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
8882                           bool runtime)
8883 {
8884         struct net_device *netdev = pci_get_drvdata(pdev);
8885         struct igb_adapter *adapter = netdev_priv(netdev);
8886         struct e1000_hw *hw = &adapter->hw;
8887         u32 ctrl, rctl, status;
8888         u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
8889 #ifdef CONFIG_PM
8890         int retval = 0;
8891 #endif
8892
8893         netif_device_detach(netdev);
8894
8895         status = E1000_READ_REG(hw, E1000_STATUS);
8896         if (status & E1000_STATUS_LU)
8897                 wufc &= ~E1000_WUFC_LNKC;
8898
8899         if (netif_running(netdev))
8900                 __igb_close(netdev, true);
8901
8902         igb_clear_interrupt_scheme(adapter);
8903
8904 #ifdef CONFIG_PM
8905         retval = pci_save_state(pdev);
8906         if (retval)
8907                 return retval;
8908 #endif
8909
8910         if (wufc) {
8911                 igb_setup_rctl(adapter);
8912                 igb_set_rx_mode(netdev);
8913
8914                 /* turn on all-multi mode if wake on multicast is enabled */
8915                 if (wufc & E1000_WUFC_MC) {
8916                         rctl = E1000_READ_REG(hw, E1000_RCTL);
8917                         rctl |= E1000_RCTL_MPE;
8918                         E1000_WRITE_REG(hw, E1000_RCTL, rctl);
8919                 }
8920
8921                 ctrl = E1000_READ_REG(hw, E1000_CTRL);
8922                 /* phy power management enable */
8923                 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
8924                 ctrl |= E1000_CTRL_ADVD3WUC;
8925                 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
8926
8927                 /* Allow time for pending master requests to run */
8928                 e1000_disable_pcie_master(hw);
8929
8930                 E1000_WRITE_REG(hw, E1000_WUC, E1000_WUC_PME_EN);
8931                 E1000_WRITE_REG(hw, E1000_WUFC, wufc);
8932         } else {
8933                 E1000_WRITE_REG(hw, E1000_WUC, 0);
8934                 E1000_WRITE_REG(hw, E1000_WUFC, 0);
8935         }
8936
8937         *enable_wake = wufc || adapter->en_mng_pt;
8938         if (!*enable_wake)
8939                 igb_power_down_link(adapter);
8940         else
8941                 igb_power_up_link(adapter);
8942
8943         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
8944          * would have already happened in close and is redundant. */
8945         igb_release_hw_control(adapter);
8946
8947         pci_disable_device(pdev);
8948
8949         return 0;
8950 }
8951
8952 #ifdef CONFIG_PM
8953 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8954 static int igb_suspend(struct device *dev)
8955 #else
8956 static int igb_suspend(struct pci_dev *pdev, pm_message_t state)
8957 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8958 {
8959 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8960         struct pci_dev *pdev = to_pci_dev(dev);
8961 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8962         int retval;
8963         bool wake;
8964
8965         retval = __igb_shutdown(pdev, &wake, 0);
8966         if (retval)
8967                 return retval;
8968
8969         if (wake) {
8970                 pci_prepare_to_sleep(pdev);
8971         } else {
8972                 pci_wake_from_d3(pdev, false);
8973                 pci_set_power_state(pdev, PCI_D3hot);
8974         }
8975
8976         return 0;
8977 }
8978
8979 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8980 static int igb_resume(struct device *dev)
8981 #else
8982 static int igb_resume(struct pci_dev *pdev)
8983 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8984 {
8985 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8986         struct pci_dev *pdev = to_pci_dev(dev);
8987 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8988         struct net_device *netdev = pci_get_drvdata(pdev);
8989         struct igb_adapter *adapter = netdev_priv(netdev);
8990         struct e1000_hw *hw = &adapter->hw;
8991         u32 err;
8992
8993         pci_set_power_state(pdev, PCI_D0);
8994         pci_restore_state(pdev);
8995         pci_save_state(pdev);
8996
8997         err = pci_enable_device_mem(pdev);
8998         if (err) {
8999                 dev_err(pci_dev_to_dev(pdev),
9000                         "igb: Cannot enable PCI device from suspend\n");
9001                 return err;
9002         }
9003         pci_set_master(pdev);
9004
9005         pci_enable_wake(pdev, PCI_D3hot, 0);
9006         pci_enable_wake(pdev, PCI_D3cold, 0);
9007
9008         if (igb_init_interrupt_scheme(adapter, true)) {
9009                 dev_err(pci_dev_to_dev(pdev), "Unable to allocate memory for queues\n");
9010                 return -ENOMEM;
9011         }
9012
9013         igb_reset(adapter);
9014
9015         /* let the f/w know that the h/w is now under the control of the
9016          * driver. */
9017         igb_get_hw_control(adapter);
9018
9019         E1000_WRITE_REG(hw, E1000_WUS, ~0);
9020
9021         if (netdev->flags & IFF_UP) {
9022                 rtnl_lock();
9023                 err = __igb_open(netdev, true);
9024                 rtnl_unlock();
9025                 if (err)
9026                         return err;
9027         }
9028
9029         netif_device_attach(netdev);
9030
9031         return 0;
9032 }
9033
9034 #ifdef CONFIG_PM_RUNTIME
9035 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
9036 static int igb_runtime_idle(struct device *dev)
9037 {
9038         struct pci_dev *pdev = to_pci_dev(dev);
9039         struct net_device *netdev = pci_get_drvdata(pdev);
9040         struct igb_adapter *adapter = netdev_priv(netdev);
9041
9042         if (!igb_has_link(adapter))
9043                 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
9044
9045         return -EBUSY;
9046 }
9047
9048 static int igb_runtime_suspend(struct device *dev)
9049 {
9050         struct pci_dev *pdev = to_pci_dev(dev);
9051         int retval;
9052         bool wake;
9053
9054         retval = __igb_shutdown(pdev, &wake, 1);
9055         if (retval)
9056                 return retval;
9057
9058         if (wake) {
9059                 pci_prepare_to_sleep(pdev);
9060         } else {
9061                 pci_wake_from_d3(pdev, false);
9062                 pci_set_power_state(pdev, PCI_D3hot);
9063         }
9064
9065         return 0;
9066 }
9067
9068 static int igb_runtime_resume(struct device *dev)
9069 {
9070         return igb_resume(dev);
9071 }
9072 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
9073 #endif /* CONFIG_PM_RUNTIME */
9074 #endif /* CONFIG_PM */
9075
9076 #ifdef USE_REBOOT_NOTIFIER
9077 /* only want to do this for 2.4 kernels? */
9078 static int igb_notify_reboot(struct notifier_block *nb, unsigned long event,
9079                              void *p)
9080 {
9081         struct pci_dev *pdev = NULL;
9082         bool wake;
9083
9084         switch (event) {
9085         case SYS_DOWN:
9086         case SYS_HALT:
9087         case SYS_POWER_OFF:
9088                 while ((pdev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pdev))) {
9089                         if (pci_dev_driver(pdev) == &igb_driver) {
9090                                 __igb_shutdown(pdev, &wake, 0);
9091                                 if (event == SYS_POWER_OFF) {
9092                                         pci_wake_from_d3(pdev, wake);
9093                                         pci_set_power_state(pdev, PCI_D3hot);
9094                                 }
9095                         }
9096                 }
9097         }
9098         return NOTIFY_DONE;
9099 }
9100 #else
9101 static void igb_shutdown(struct pci_dev *pdev)
9102 {
9103         bool wake = false;
9104
9105         __igb_shutdown(pdev, &wake, 0);
9106
9107         if (system_state == SYSTEM_POWER_OFF) {
9108                 pci_wake_from_d3(pdev, wake);
9109                 pci_set_power_state(pdev, PCI_D3hot);
9110         }
9111 }
9112 #endif /* USE_REBOOT_NOTIFIER */
9113
9114 #ifdef CONFIG_NET_POLL_CONTROLLER
9115 /*
9116  * Polling 'interrupt' - used by things like netconsole to send skbs
9117  * without having to re-enable interrupts. It's not called while
9118  * the interrupt routine is executing.
9119  */
9120 static void igb_netpoll(struct net_device *netdev)
9121 {
9122         struct igb_adapter *adapter = netdev_priv(netdev);
9123         struct e1000_hw *hw = &adapter->hw;
9124         struct igb_q_vector *q_vector;
9125         int i;
9126
9127         for (i = 0; i < adapter->num_q_vectors; i++) {
9128                 q_vector = adapter->q_vector[i];
9129                 if (adapter->msix_entries)
9130                         E1000_WRITE_REG(hw, E1000_EIMC, q_vector->eims_value);
9131                 else
9132                         igb_irq_disable(adapter);
9133                 napi_schedule(&q_vector->napi);
9134         }
9135 }
9136 #endif /* CONFIG_NET_POLL_CONTROLLER */
9137
9138 #ifdef HAVE_PCI_ERS
9139 #define E1000_DEV_ID_82576_VF 0x10CA
9140 /**
9141  * igb_io_error_detected - called when PCI error is detected
9142  * @pdev: Pointer to PCI device
9143  * @state: The current pci connection state
9144  *
9145  * This function is called after a PCI bus error affecting
9146  * this device has been detected.
9147  */
9148 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
9149                                               pci_channel_state_t state)
9150 {
9151         struct net_device *netdev = pci_get_drvdata(pdev);
9152         struct igb_adapter *adapter = netdev_priv(netdev);
9153
9154 #ifdef CONFIG_PCI_IOV__UNUSED
9155         struct pci_dev *bdev, *vfdev;
9156         u32 dw0, dw1, dw2, dw3;
9157         int vf, pos;
9158         u16 req_id, pf_func;
9159
9160         if (!(adapter->flags & IGB_FLAG_DETECT_BAD_DMA))
9161                 goto skip_bad_vf_detection;
9162
9163         bdev = pdev->bus->self;
9164         while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
9165                 bdev = bdev->bus->self;
9166
9167         if (!bdev)
9168                 goto skip_bad_vf_detection;
9169
9170         pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
9171         if (!pos)
9172                 goto skip_bad_vf_detection;
9173
9174         pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG, &dw0);
9175         pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 4, &dw1);
9176         pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 8, &dw2);
9177         pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 12, &dw3);
9178
9179         req_id = dw1 >> 16;
9180         /* On the 82576 if bit 7 of the requestor ID is set then it's a VF */
9181         if (!(req_id & 0x0080))
9182                 goto skip_bad_vf_detection;
9183
9184         pf_func = req_id & 0x01;
9185         if ((pf_func & 1) == (pdev->devfn & 1)) {
9186
9187                 vf = (req_id & 0x7F) >> 1;
9188                 dev_err(pci_dev_to_dev(pdev),
9189                         "VF %d has caused a PCIe error\n", vf);
9190                 dev_err(pci_dev_to_dev(pdev),
9191                         "TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
9192                         "%8.8x\tdw3: %8.8x\n",
9193                         dw0, dw1, dw2, dw3);
9194
9195                 /* Find the pci device of the offending VF */
9196                 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
9197                                        E1000_DEV_ID_82576_VF, NULL);
9198                 while (vfdev) {
9199                         if (vfdev->devfn == (req_id & 0xFF))
9200                                 break;
9201                         vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
9202                                                E1000_DEV_ID_82576_VF, vfdev);
9203                 }
9204                 /*
9205                  * There's a slim chance the VF could have been hot plugged,
9206                  * so if it is no longer present we don't need to issue the
9207                  * VFLR.  Just clean up the AER in that case.
9208                  */
9209                 if (vfdev) {
9210                         dev_err(pci_dev_to_dev(pdev),
9211                                 "Issuing VFLR to VF %d\n", vf);
9212                         pci_write_config_dword(vfdev, 0xA8, 0x00008000);
9213                 }
9214
9215                 pci_cleanup_aer_uncorrect_error_status(pdev);
9216         }
9217
9218         /*
9219          * Even though the error may have occurred on the other port
9220          * we still need to increment the vf error reference count for
9221          * both ports because the I/O resume function will be called
9222          * for both of them.
9223          */
9224         adapter->vferr_refcount++;
9225
9226         return PCI_ERS_RESULT_RECOVERED;
9227
9228 skip_bad_vf_detection:
9229 #endif /* CONFIG_PCI_IOV */
9230
9231         netif_device_detach(netdev);
9232
9233         if (state == pci_channel_io_perm_failure)
9234                 return PCI_ERS_RESULT_DISCONNECT;
9235
9236         if (netif_running(netdev))
9237                 igb_down(adapter);
9238         pci_disable_device(pdev);
9239
9240         /* Request a slot slot reset. */
9241         return PCI_ERS_RESULT_NEED_RESET;
9242 }
9243
9244 /**
9245  * igb_io_slot_reset - called after the pci bus has been reset.
9246  * @pdev: Pointer to PCI device
9247  *
9248  * Restart the card from scratch, as if from a cold-boot. Implementation
9249  * resembles the first-half of the igb_resume routine.
9250  */
9251 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
9252 {
9253         struct net_device *netdev = pci_get_drvdata(pdev);
9254         struct igb_adapter *adapter = netdev_priv(netdev);
9255         struct e1000_hw *hw = &adapter->hw;
9256         pci_ers_result_t result;
9257
9258         if (pci_enable_device_mem(pdev)) {
9259                 dev_err(pci_dev_to_dev(pdev),
9260                         "Cannot re-enable PCI device after reset.\n");
9261                 result = PCI_ERS_RESULT_DISCONNECT;
9262         } else {
9263                 pci_set_master(pdev);
9264                 pci_restore_state(pdev);
9265                 pci_save_state(pdev);
9266
9267                 pci_enable_wake(pdev, PCI_D3hot, 0);
9268                 pci_enable_wake(pdev, PCI_D3cold, 0);
9269
9270                 schedule_work(&adapter->reset_task);
9271                 E1000_WRITE_REG(hw, E1000_WUS, ~0);
9272                 result = PCI_ERS_RESULT_RECOVERED;
9273         }
9274
9275         pci_cleanup_aer_uncorrect_error_status(pdev);
9276
9277         return result;
9278 }
9279
9280 /**
9281  * igb_io_resume - called when traffic can start flowing again.
9282  * @pdev: Pointer to PCI device
9283  *
9284  * This callback is called when the error recovery driver tells us that
9285  * its OK to resume normal operation. Implementation resembles the
9286  * second-half of the igb_resume routine.
9287  */
9288 static void igb_io_resume(struct pci_dev *pdev)
9289 {
9290         struct net_device *netdev = pci_get_drvdata(pdev);
9291         struct igb_adapter *adapter = netdev_priv(netdev);
9292
9293         if (adapter->vferr_refcount) {
9294                 dev_info(pci_dev_to_dev(pdev), "Resuming after VF err\n");
9295                 adapter->vferr_refcount--;
9296                 return;
9297         }
9298
9299         if (netif_running(netdev)) {
9300                 if (igb_up(adapter)) {
9301                         dev_err(pci_dev_to_dev(pdev), "igb_up failed after reset\n");
9302                         return;
9303                 }
9304         }
9305
9306         netif_device_attach(netdev);
9307
9308         /* let the f/w know that the h/w is now under the control of the
9309          * driver. */
9310         igb_get_hw_control(adapter);
9311 }
9312
9313 #endif /* HAVE_PCI_ERS */
9314
9315 int igb_add_mac_filter(struct igb_adapter *adapter, u8 *addr, u16 queue)
9316 {
9317         struct e1000_hw *hw = &adapter->hw;
9318         int i;
9319
9320         if (is_zero_ether_addr(addr))
9321                 return 0;
9322
9323         for (i = 0; i < hw->mac.rar_entry_count; i++) {
9324                 if (adapter->mac_table[i].state & IGB_MAC_STATE_IN_USE)
9325                         continue;
9326                 adapter->mac_table[i].state = (IGB_MAC_STATE_MODIFIED |
9327                                                    IGB_MAC_STATE_IN_USE);
9328                 memcpy(adapter->mac_table[i].addr, addr, ETH_ALEN);
9329                 adapter->mac_table[i].queue = queue;
9330                 igb_sync_mac_table(adapter);
9331                 return 0;
9332         }
9333         return -ENOMEM;
9334 }
9335 int igb_del_mac_filter(struct igb_adapter *adapter, u8* addr, u16 queue)
9336 {
9337         /* search table for addr, if found, set to 0 and sync */
9338         int i;
9339         struct e1000_hw *hw = &adapter->hw;
9340
9341         if (is_zero_ether_addr(addr))
9342                 return 0;
9343         for (i = 0; i < hw->mac.rar_entry_count; i++) {
9344                 if (ether_addr_equal(addr, adapter->mac_table[i].addr) &&
9345                     adapter->mac_table[i].queue == queue) {
9346                         adapter->mac_table[i].state = IGB_MAC_STATE_MODIFIED;
9347                         memset(adapter->mac_table[i].addr, 0, ETH_ALEN);
9348                         adapter->mac_table[i].queue = 0;
9349                         igb_sync_mac_table(adapter);
9350                         return 0;
9351                 }
9352         }
9353         return -ENOMEM;
9354 }
9355 static int igb_set_vf_mac(struct igb_adapter *adapter,
9356                           int vf, unsigned char *mac_addr)
9357 {
9358         igb_del_mac_filter(adapter, adapter->vf_data[vf].vf_mac_addresses, vf);
9359         memcpy(adapter->vf_data[vf].vf_mac_addresses, mac_addr, ETH_ALEN);
9360
9361         igb_add_mac_filter(adapter, mac_addr, vf);
9362
9363         return 0;
9364 }
9365
9366 #ifdef IFLA_VF_MAX
9367 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
9368 {
9369         struct igb_adapter *adapter = netdev_priv(netdev);
9370         if (!is_valid_ether_addr(mac) || (vf >= adapter->vfs_allocated_count))
9371                 return -EINVAL;
9372         adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
9373         dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n", mac, vf);
9374         dev_info(&adapter->pdev->dev, "Reload the VF driver to make this"
9375                                       " change effective.\n");
9376         if (test_bit(__IGB_DOWN, &adapter->state)) {
9377                 dev_warn(&adapter->pdev->dev, "The VF MAC address has been set,"
9378                          " but the PF device is not up.\n");
9379                 dev_warn(&adapter->pdev->dev, "Bring the PF device up before"
9380                          " attempting to use the VF device.\n");
9381         }
9382         return igb_set_vf_mac(adapter, vf, mac);
9383 }
9384
9385 static int igb_link_mbps(int internal_link_speed)
9386 {
9387         switch (internal_link_speed) {
9388         case SPEED_100:
9389                 return 100;
9390         case SPEED_1000:
9391                 return 1000;
9392         case SPEED_2500:
9393                 return 2500;
9394         default:
9395                 return 0;
9396         }
9397 }
9398
9399 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
9400                         int link_speed)
9401 {
9402         int rf_dec, rf_int;
9403         u32 bcnrc_val;
9404
9405         if (tx_rate != 0) {
9406                 /* Calculate the rate factor values to set */
9407                 rf_int = link_speed / tx_rate;
9408                 rf_dec = (link_speed - (rf_int * tx_rate));
9409                 rf_dec = (rf_dec * (1<<E1000_RTTBCNRC_RF_INT_SHIFT)) / tx_rate;
9410
9411                 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
9412                 bcnrc_val |= ((rf_int<<E1000_RTTBCNRC_RF_INT_SHIFT) &
9413                                 E1000_RTTBCNRC_RF_INT_MASK);
9414                 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
9415         } else {
9416                 bcnrc_val = 0;
9417         }
9418
9419         E1000_WRITE_REG(hw, E1000_RTTDQSEL, vf); /* vf X uses queue X */
9420         /*
9421          * Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
9422          * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
9423          */
9424         E1000_WRITE_REG(hw, E1000_RTTBCNRM(0), 0x14);
9425         E1000_WRITE_REG(hw, E1000_RTTBCNRC, bcnrc_val);
9426 }
9427
9428 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
9429 {
9430         int actual_link_speed, i;
9431         bool reset_rate = false;
9432
9433         /* VF TX rate limit was not set */
9434         if ((adapter->vf_rate_link_speed == 0) ||
9435                 (adapter->hw.mac.type != e1000_82576))
9436                 return;
9437
9438         actual_link_speed = igb_link_mbps(adapter->link_speed);
9439         if (actual_link_speed != adapter->vf_rate_link_speed) {
9440                 reset_rate = true;
9441                 adapter->vf_rate_link_speed = 0;
9442                 dev_info(&adapter->pdev->dev,
9443                 "Link speed has been changed. VF Transmit rate is disabled\n");
9444         }
9445
9446         for (i = 0; i < adapter->vfs_allocated_count; i++) {
9447                 if (reset_rate)
9448                         adapter->vf_data[i].tx_rate = 0;
9449
9450                 igb_set_vf_rate_limit(&adapter->hw, i,
9451                         adapter->vf_data[i].tx_rate, actual_link_speed);
9452         }
9453 }
9454
9455 #ifdef HAVE_VF_MIN_MAX_TXRATE
9456 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int min_tx_rate,
9457                              int tx_rate)
9458 #else /* HAVE_VF_MIN_MAX_TXRATE */
9459 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate)
9460 #endif /* HAVE_VF_MIN_MAX_TXRATE */
9461 {
9462         struct igb_adapter *adapter = netdev_priv(netdev);
9463         struct e1000_hw *hw = &adapter->hw;
9464         int actual_link_speed;
9465
9466         if (hw->mac.type != e1000_82576)
9467                 return -EOPNOTSUPP;
9468
9469 #ifdef HAVE_VF_MIN_MAX_TXRATE
9470         if (min_tx_rate)
9471                 return -EINVAL;
9472 #endif /* HAVE_VF_MIN_MAX_TXRATE */
9473
9474         actual_link_speed = igb_link_mbps(adapter->link_speed);
9475         if ((vf >= adapter->vfs_allocated_count) ||
9476                 (!(E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_LU)) ||
9477                 (tx_rate < 0) || (tx_rate > actual_link_speed))
9478                 return -EINVAL;
9479
9480         adapter->vf_rate_link_speed = actual_link_speed;
9481         adapter->vf_data[vf].tx_rate = (u16)tx_rate;
9482         igb_set_vf_rate_limit(hw, vf, tx_rate, actual_link_speed);
9483
9484         return 0;
9485 }
9486
9487 static int igb_ndo_get_vf_config(struct net_device *netdev,
9488                                  int vf, struct ifla_vf_info *ivi)
9489 {
9490         struct igb_adapter *adapter = netdev_priv(netdev);
9491         if (vf >= adapter->vfs_allocated_count)
9492                 return -EINVAL;
9493         ivi->vf = vf;
9494         memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
9495 #ifdef HAVE_VF_MIN_MAX_TXRATE
9496         ivi->max_tx_rate = adapter->vf_data[vf].tx_rate;
9497         ivi->min_tx_rate = 0;
9498 #else /* HAVE_VF_MIN_MAX_TXRATE */
9499         ivi->tx_rate = adapter->vf_data[vf].tx_rate;
9500 #endif /* HAVE_VF_MIN_MAX_TXRATE */
9501         ivi->vlan = adapter->vf_data[vf].pf_vlan;
9502         ivi->qos = adapter->vf_data[vf].pf_qos;
9503 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
9504         ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
9505 #endif
9506         return 0;
9507 }
9508 #endif
9509 static void igb_vmm_control(struct igb_adapter *adapter)
9510 {
9511         struct e1000_hw *hw = &adapter->hw;
9512         int count;
9513         u32 reg;
9514
9515         switch (hw->mac.type) {
9516         case e1000_82575:
9517         default:
9518                 /* replication is not supported for 82575 */
9519                 return;
9520         case e1000_82576:
9521                 /* notify HW that the MAC is adding vlan tags */
9522                 reg = E1000_READ_REG(hw, E1000_DTXCTL);
9523                 reg |= (E1000_DTXCTL_VLAN_ADDED |
9524                         E1000_DTXCTL_SPOOF_INT);
9525                 E1000_WRITE_REG(hw, E1000_DTXCTL, reg);
9526         case e1000_82580:
9527                 /* enable replication vlan tag stripping */
9528                 reg = E1000_READ_REG(hw, E1000_RPLOLR);
9529                 reg |= E1000_RPLOLR_STRVLAN;
9530                 E1000_WRITE_REG(hw, E1000_RPLOLR, reg);
9531         case e1000_i350:
9532         case e1000_i354:
9533                 /* none of the above registers are supported by i350 */
9534                 break;
9535         }
9536
9537         /* Enable Malicious Driver Detection */
9538         if ((adapter->vfs_allocated_count) &&
9539             (adapter->mdd)) {
9540                 if (hw->mac.type == e1000_i350)
9541                         igb_enable_mdd(adapter);
9542         }
9543
9544                 /* enable replication and loopback support */
9545                 count = adapter->vfs_allocated_count || adapter->vmdq_pools;
9546                 if (adapter->flags & IGB_FLAG_LOOPBACK_ENABLE && count)
9547                         e1000_vmdq_set_loopback_pf(hw, 1);
9548                 e1000_vmdq_set_anti_spoofing_pf(hw,
9549                         adapter->vfs_allocated_count || adapter->vmdq_pools,
9550                         adapter->vfs_allocated_count);
9551         e1000_vmdq_set_replication_pf(hw, adapter->vfs_allocated_count ||
9552                                       adapter->vmdq_pools);
9553 }
9554
9555 static void igb_init_fw(struct igb_adapter *adapter)
9556 {
9557         struct e1000_fw_drv_info fw_cmd;
9558         struct e1000_hw *hw = &adapter->hw;
9559         int i;
9560         u16 mask;
9561
9562         if (hw->mac.type == e1000_i210)
9563                 mask = E1000_SWFW_EEP_SM;
9564         else
9565                 mask = E1000_SWFW_PHY0_SM;
9566         /* i211 parts do not support this feature */
9567         if (hw->mac.type == e1000_i211)
9568                 hw->mac.arc_subsystem_valid = false;
9569
9570         if (!hw->mac.ops.acquire_swfw_sync(hw, mask)) {
9571                 for (i = 0; i <= FW_MAX_RETRIES; i++) {
9572                         E1000_WRITE_REG(hw, E1000_FWSTS, E1000_FWSTS_FWRI);
9573                         fw_cmd.hdr.cmd = FW_CMD_DRV_INFO;
9574                         fw_cmd.hdr.buf_len = FW_CMD_DRV_INFO_LEN;
9575                         fw_cmd.hdr.cmd_or_resp.cmd_resv = FW_CMD_RESERVED;
9576                         fw_cmd.port_num = hw->bus.func;
9577                         fw_cmd.drv_version = FW_FAMILY_DRV_VER;
9578                         fw_cmd.hdr.checksum = 0;
9579                         fw_cmd.hdr.checksum = e1000_calculate_checksum((u8 *)&fw_cmd,
9580                                                                    (FW_HDR_LEN +
9581                                                                     fw_cmd.hdr.buf_len));
9582                          e1000_host_interface_command(hw, (u8*)&fw_cmd,
9583                                                      sizeof(fw_cmd));
9584                         if (fw_cmd.hdr.cmd_or_resp.ret_status == FW_STATUS_SUCCESS)
9585                                 break;
9586                 }
9587         } else
9588                 dev_warn(pci_dev_to_dev(adapter->pdev),
9589                          "Unable to get semaphore, firmware init failed.\n");
9590         hw->mac.ops.release_swfw_sync(hw, mask);
9591 }
9592
9593 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
9594 {
9595         struct e1000_hw *hw = &adapter->hw;
9596         u32 dmac_thr;
9597         u16 hwm;
9598         u32 status;
9599
9600         if (hw->mac.type == e1000_i211)
9601                 return;
9602
9603         if (hw->mac.type > e1000_82580) {
9604                 if (adapter->dmac != IGB_DMAC_DISABLE) {
9605                         u32 reg;
9606
9607                         /* force threshold to 0.  */
9608                         E1000_WRITE_REG(hw, E1000_DMCTXTH, 0);
9609
9610                         /*
9611                          * DMA Coalescing high water mark needs to be greater
9612                          * than the Rx threshold. Set hwm to PBA - max frame
9613                          * size in 16B units, capping it at PBA - 6KB.
9614                          */
9615                         hwm = 64 * pba - adapter->max_frame_size / 16;
9616                         if (hwm < 64 * (pba - 6))
9617                                 hwm = 64 * (pba - 6);
9618                         reg = E1000_READ_REG(hw, E1000_FCRTC);
9619                         reg &= ~E1000_FCRTC_RTH_COAL_MASK;
9620                         reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
9621                                 & E1000_FCRTC_RTH_COAL_MASK);
9622                         E1000_WRITE_REG(hw, E1000_FCRTC, reg);
9623
9624                         /*
9625                          * Set the DMA Coalescing Rx threshold to PBA - 2 * max
9626                          * frame size, capping it at PBA - 10KB.
9627                          */
9628                         dmac_thr = pba - adapter->max_frame_size / 512;
9629                         if (dmac_thr < pba - 10)
9630                                 dmac_thr = pba - 10;
9631                         reg = E1000_READ_REG(hw, E1000_DMACR);
9632                         reg &= ~E1000_DMACR_DMACTHR_MASK;
9633                         reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
9634                                 & E1000_DMACR_DMACTHR_MASK);
9635
9636                         /* transition to L0x or L1 if available..*/
9637                         reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
9638
9639                         /* Check if status is 2.5Gb backplane connection
9640                          * before configuration of watchdog timer, which is
9641                          * in msec values in 12.8usec intervals
9642                          * watchdog timer= msec values in 32usec intervals
9643                          * for non 2.5Gb connection
9644                          */
9645                         if (hw->mac.type == e1000_i354) {
9646                                 status = E1000_READ_REG(hw, E1000_STATUS);
9647                                 if ((status & E1000_STATUS_2P5_SKU) &&
9648                                     (!(status & E1000_STATUS_2P5_SKU_OVER)))
9649                                         reg |= ((adapter->dmac * 5) >> 6);
9650                                 else
9651                                         reg |= ((adapter->dmac) >> 5);
9652                         } else {
9653                                 reg |= ((adapter->dmac) >> 5);
9654                         }
9655
9656                         /*
9657                          * Disable BMC-to-OS Watchdog enable
9658                          * on devices that support OS-to-BMC
9659                          */
9660                         if (hw->mac.type != e1000_i354)
9661                                 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
9662                         E1000_WRITE_REG(hw, E1000_DMACR, reg);
9663
9664                         /* no lower threshold to disable coalescing(smart fifb)-UTRESH=0*/
9665                         E1000_WRITE_REG(hw, E1000_DMCRTRH, 0);
9666
9667                         /* This sets the time to wait before requesting
9668                          * transition to low power state to number of usecs
9669                          * needed to receive 1 512 byte frame at gigabit
9670                          * line rate. On i350 device, time to make transition
9671                          * to Lx state is delayed by 4 usec with flush disable
9672                          * bit set to avoid losing mailbox interrupts
9673                          */
9674                         reg = E1000_READ_REG(hw, E1000_DMCTLX);
9675                         if (hw->mac.type == e1000_i350)
9676                                 reg |= IGB_DMCTLX_DCFLUSH_DIS;
9677
9678                         /* in 2.5Gb connection, TTLX unit is 0.4 usec
9679                          * which is 0x4*2 = 0xA. But delay is still 4 usec
9680                          */
9681                         if (hw->mac.type == e1000_i354) {
9682                                 status = E1000_READ_REG(hw, E1000_STATUS);
9683                                 if ((status & E1000_STATUS_2P5_SKU) &&
9684                                     (!(status & E1000_STATUS_2P5_SKU_OVER)))
9685                                         reg |= 0xA;
9686                                 else
9687                                         reg |= 0x4;
9688                         } else {
9689                                 reg |= 0x4;
9690                         }
9691                         E1000_WRITE_REG(hw, E1000_DMCTLX, reg);
9692
9693                         /* free space in tx packet buffer to wake from DMA coal */
9694                         E1000_WRITE_REG(hw, E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
9695                                 (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
9696
9697                         /* make low power state decision controlled by DMA coal */
9698                         reg = E1000_READ_REG(hw, E1000_PCIEMISC);
9699                         reg &= ~E1000_PCIEMISC_LX_DECISION;
9700                         E1000_WRITE_REG(hw, E1000_PCIEMISC, reg);
9701                 } /* endif adapter->dmac is not disabled */
9702         } else if (hw->mac.type == e1000_82580) {
9703                 u32 reg = E1000_READ_REG(hw, E1000_PCIEMISC);
9704                 E1000_WRITE_REG(hw, E1000_PCIEMISC,
9705                                 reg & ~E1000_PCIEMISC_LX_DECISION);
9706                 E1000_WRITE_REG(hw, E1000_DMACR, 0);
9707         }
9708 }
9709
9710 #ifdef HAVE_I2C_SUPPORT
9711 /*  igb_read_i2c_byte - Reads 8 bit word over I2C
9712  *  @hw: pointer to hardware structure
9713  *  @byte_offset: byte offset to read
9714  *  @dev_addr: device address
9715  *  @data: value read
9716  *
9717  *  Performs byte read operation over I2C interface at
9718  *  a specified device address.
9719  */
9720 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
9721                                 u8 dev_addr, u8 *data)
9722 {
9723         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
9724         struct i2c_client *this_client = adapter->i2c_client;
9725         s32 status;
9726         u16 swfw_mask = 0;
9727
9728         if (!this_client)
9729                 return E1000_ERR_I2C;
9730
9731         swfw_mask = E1000_SWFW_PHY0_SM;
9732
9733         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)
9734             != E1000_SUCCESS)
9735                 return E1000_ERR_SWFW_SYNC;
9736
9737         status = i2c_smbus_read_byte_data(this_client, byte_offset);
9738         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
9739
9740         if (status < 0)
9741                 return E1000_ERR_I2C;
9742         else {
9743                 *data = status;
9744                 return E1000_SUCCESS;
9745         }
9746 }
9747
9748 /*  igb_write_i2c_byte - Writes 8 bit word over I2C
9749  *  @hw: pointer to hardware structure
9750  *  @byte_offset: byte offset to write
9751  *  @dev_addr: device address
9752  *  @data: value to write
9753  *
9754  *  Performs byte write operation over I2C interface at
9755  *  a specified device address.
9756  */
9757 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
9758                                  u8 dev_addr, u8 data)
9759 {
9760         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
9761         struct i2c_client *this_client = adapter->i2c_client;
9762         s32 status;
9763         u16 swfw_mask = E1000_SWFW_PHY0_SM;
9764
9765         if (!this_client)
9766                 return E1000_ERR_I2C;
9767
9768         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask) != E1000_SUCCESS)
9769                 return E1000_ERR_SWFW_SYNC;
9770         status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
9771         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
9772
9773         if (status)
9774                 return E1000_ERR_I2C;
9775         else
9776                 return E1000_SUCCESS;
9777 }
9778 #endif /*  HAVE_I2C_SUPPORT */
9779 /* igb_main.c */
9780
9781
9782 /**
9783  * igb_probe - Device Initialization Routine
9784  * @pdev: PCI device information struct
9785  * @ent: entry in igb_pci_tbl
9786  *
9787  * Returns 0 on success, negative on failure
9788  *
9789  * igb_probe initializes an adapter identified by a pci_dev structure.
9790  * The OS initialization, configuring of the adapter private structure,
9791  * and a hardware reset occur.
9792  **/
9793 int igb_kni_probe(struct pci_dev *pdev,
9794                                struct net_device **lad_dev)
9795 {
9796         struct net_device *netdev;
9797         struct igb_adapter *adapter;
9798         struct e1000_hw *hw;
9799         u16 eeprom_data = 0;
9800         u8 pba_str[E1000_PBANUM_LENGTH];
9801         s32 ret_val;
9802         static int global_quad_port_a; /* global quad port a indication */
9803         int i, err, pci_using_dac = 0;
9804         static int cards_found;
9805
9806         err = pci_enable_device_mem(pdev);
9807         if (err)
9808                 return err;
9809
9810 #ifdef NO_KNI
9811         pci_using_dac = 0;
9812         err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
9813         if (!err) {
9814                 err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
9815                 if (!err)
9816                         pci_using_dac = 1;
9817         } else {
9818                 err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
9819                 if (err) {
9820                         err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
9821                         if (err) {
9822                                 IGB_ERR("No usable DMA configuration, "
9823                                         "aborting\n");
9824                                 goto err_dma;
9825                         }
9826                 }
9827         }
9828
9829 #ifndef HAVE_ASPM_QUIRKS
9830         /* 82575 requires that the pci-e link partner disable the L0s state */
9831         switch (pdev->device) {
9832         case E1000_DEV_ID_82575EB_COPPER:
9833         case E1000_DEV_ID_82575EB_FIBER_SERDES:
9834         case E1000_DEV_ID_82575GB_QUAD_COPPER:
9835                 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S);
9836         default:
9837                 break;
9838         }
9839
9840 #endif /* HAVE_ASPM_QUIRKS */
9841         err = pci_request_selected_regions(pdev,
9842                                            pci_select_bars(pdev,
9843                                                            IORESOURCE_MEM),
9844                                            igb_driver_name);
9845         if (err)
9846                 goto err_pci_reg;
9847
9848         pci_enable_pcie_error_reporting(pdev);
9849
9850         pci_set_master(pdev);
9851
9852         err = -ENOMEM;
9853 #endif /* NO_KNI */
9854 #ifdef HAVE_TX_MQ
9855         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
9856                                    IGB_MAX_TX_QUEUES);
9857 #else
9858         netdev = alloc_etherdev(sizeof(struct igb_adapter));
9859 #endif /* HAVE_TX_MQ */
9860         if (!netdev)
9861                 goto err_alloc_etherdev;
9862
9863         SET_MODULE_OWNER(netdev);
9864         SET_NETDEV_DEV(netdev, &pdev->dev);
9865
9866         //pci_set_drvdata(pdev, netdev);
9867         adapter = netdev_priv(netdev);
9868         adapter->netdev = netdev;
9869         adapter->pdev = pdev;
9870         hw = &adapter->hw;
9871         hw->back = adapter;
9872         adapter->port_num = hw->bus.func;
9873         adapter->msg_enable = (1 << debug) - 1;
9874
9875 #ifdef HAVE_PCI_ERS
9876         err = pci_save_state(pdev);
9877         if (err)
9878                 goto err_ioremap;
9879 #endif
9880         err = -EIO;
9881         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
9882                               pci_resource_len(pdev, 0));
9883         if (!hw->hw_addr)
9884                 goto err_ioremap;
9885
9886 #ifdef HAVE_NET_DEVICE_OPS
9887         netdev->netdev_ops = &igb_netdev_ops;
9888 #else /* HAVE_NET_DEVICE_OPS */
9889         netdev->open = &igb_open;
9890         netdev->stop = &igb_close;
9891         netdev->get_stats = &igb_get_stats;
9892 #ifdef HAVE_SET_RX_MODE
9893         netdev->set_rx_mode = &igb_set_rx_mode;
9894 #endif
9895         netdev->set_multicast_list = &igb_set_rx_mode;
9896         netdev->set_mac_address = &igb_set_mac;
9897         netdev->change_mtu = &igb_change_mtu;
9898         netdev->do_ioctl = &igb_ioctl;
9899 #ifdef HAVE_TX_TIMEOUT
9900         netdev->tx_timeout = &igb_tx_timeout;
9901 #endif
9902         netdev->vlan_rx_register = igb_vlan_mode;
9903         netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid;
9904         netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid;
9905 #ifdef CONFIG_NET_POLL_CONTROLLER
9906         netdev->poll_controller = igb_netpoll;
9907 #endif
9908         netdev->hard_start_xmit = &igb_xmit_frame;
9909 #endif /* HAVE_NET_DEVICE_OPS */
9910         igb_set_ethtool_ops(netdev);
9911 #ifdef HAVE_TX_TIMEOUT
9912         netdev->watchdog_timeo = 5 * HZ;
9913 #endif
9914
9915         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
9916
9917         adapter->bd_number = cards_found;
9918
9919         /* setup the private structure */
9920         err = igb_sw_init(adapter);
9921         if (err)
9922                 goto err_sw_init;
9923
9924         e1000_get_bus_info(hw);
9925
9926         hw->phy.autoneg_wait_to_complete = FALSE;
9927         hw->mac.adaptive_ifs = FALSE;
9928
9929         /* Copper options */
9930         if (hw->phy.media_type == e1000_media_type_copper) {
9931                 hw->phy.mdix = AUTO_ALL_MODES;
9932                 hw->phy.disable_polarity_correction = FALSE;
9933                 hw->phy.ms_type = e1000_ms_hw_default;
9934         }
9935
9936         if (e1000_check_reset_block(hw))
9937                 dev_info(pci_dev_to_dev(pdev),
9938                         "PHY reset is blocked due to SOL/IDER session.\n");
9939
9940         /*
9941          * features is initialized to 0 in allocation, it might have bits
9942          * set by igb_sw_init so we should use an or instead of an
9943          * assignment.
9944          */
9945         netdev->features |= NETIF_F_SG |
9946                             NETIF_F_IP_CSUM |
9947 #ifdef NETIF_F_IPV6_CSUM
9948                             NETIF_F_IPV6_CSUM |
9949 #endif
9950 #ifdef NETIF_F_TSO
9951                             NETIF_F_TSO |
9952 #ifdef NETIF_F_TSO6
9953                             NETIF_F_TSO6 |
9954 #endif
9955 #endif /* NETIF_F_TSO */
9956 #ifdef NETIF_F_RXHASH
9957                             NETIF_F_RXHASH |
9958 #endif
9959                             NETIF_F_RXCSUM |
9960 #ifdef NETIF_F_HW_VLAN_CTAG_RX
9961                             NETIF_F_HW_VLAN_CTAG_RX |
9962                             NETIF_F_HW_VLAN_CTAG_TX;
9963 #else
9964                             NETIF_F_HW_VLAN_RX |
9965                             NETIF_F_HW_VLAN_TX;
9966 #endif
9967
9968         if (hw->mac.type >= e1000_82576)
9969                 netdev->features |= NETIF_F_SCTP_CSUM;
9970
9971 #ifdef HAVE_NDO_SET_FEATURES
9972         /* copy netdev features into list of user selectable features */
9973         netdev->hw_features |= netdev->features;
9974 #ifndef IGB_NO_LRO
9975
9976         /* give us the option of enabling LRO later */
9977         netdev->hw_features |= NETIF_F_LRO;
9978 #endif
9979 #else
9980 #ifdef NETIF_F_GRO
9981
9982         /* this is only needed on kernels prior to 2.6.39 */
9983         netdev->features |= NETIF_F_GRO;
9984 #endif
9985 #endif
9986
9987         /* set this bit last since it cannot be part of hw_features */
9988 #ifdef NETIF_F_HW_VLAN_CTAG_FILTER
9989         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
9990 #else
9991         netdev->features |= NETIF_F_HW_VLAN_FILTER;
9992 #endif
9993
9994 #ifdef HAVE_NETDEV_VLAN_FEATURES
9995         netdev->vlan_features |= NETIF_F_TSO |
9996                                  NETIF_F_TSO6 |
9997                                  NETIF_F_IP_CSUM |
9998                                  NETIF_F_IPV6_CSUM |
9999                                  NETIF_F_SG;
10000
10001 #endif
10002         if (pci_using_dac)
10003                 netdev->features |= NETIF_F_HIGHDMA;
10004
10005 #ifdef NO_KNI
10006         adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
10007 #ifdef DEBUG
10008         if (adapter->dmac != IGB_DMAC_DISABLE)
10009                 printk("%s: DMA Coalescing is enabled..\n", netdev->name);
10010 #endif
10011
10012         /* before reading the NVM, reset the controller to put the device in a
10013          * known good starting state */
10014         e1000_reset_hw(hw);
10015 #endif /* NO_KNI */
10016
10017         /* make sure the NVM is good */
10018         if (e1000_validate_nvm_checksum(hw) < 0) {
10019                 dev_err(pci_dev_to_dev(pdev), "The NVM Checksum Is Not"
10020                         " Valid\n");
10021                 err = -EIO;
10022                 goto err_eeprom;
10023         }
10024
10025         /* copy the MAC address out of the NVM */
10026         if (e1000_read_mac_addr(hw))
10027                 dev_err(pci_dev_to_dev(pdev), "NVM Read Error\n");
10028         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
10029 #ifdef ETHTOOL_GPERMADDR
10030         memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
10031
10032         if (!is_valid_ether_addr(netdev->perm_addr)) {
10033 #else
10034         if (!is_valid_ether_addr(netdev->dev_addr)) {
10035 #endif
10036                 dev_err(pci_dev_to_dev(pdev), "Invalid MAC Address\n");
10037                 err = -EIO;
10038                 goto err_eeprom;
10039         }
10040
10041         memcpy(&adapter->mac_table[0].addr, hw->mac.addr, netdev->addr_len);
10042         adapter->mac_table[0].queue = adapter->vfs_allocated_count;
10043         adapter->mac_table[0].state = (IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE);
10044         igb_rar_set(adapter, 0);
10045
10046         /* get firmware version for ethtool -i */
10047         igb_set_fw_version(adapter);
10048
10049         /* Check if Media Autosense is enabled */
10050         if (hw->mac.type == e1000_82580)
10051                 igb_init_mas(adapter);
10052
10053 #ifdef NO_KNI
10054         setup_timer(&adapter->watchdog_timer, &igb_watchdog,
10055                     (unsigned long) adapter);
10056         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
10057                 setup_timer(&adapter->dma_err_timer, &igb_dma_err_timer,
10058                             (unsigned long) adapter);
10059         setup_timer(&adapter->phy_info_timer, &igb_update_phy_info,
10060                     (unsigned long) adapter);
10061
10062         INIT_WORK(&adapter->reset_task, igb_reset_task);
10063         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
10064         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
10065                 INIT_WORK(&adapter->dma_err_task, igb_dma_err_task);
10066 #endif
10067
10068         /* Initialize link properties that are user-changeable */
10069         adapter->fc_autoneg = true;
10070         hw->mac.autoneg = true;
10071         hw->phy.autoneg_advertised = 0x2f;
10072
10073         hw->fc.requested_mode = e1000_fc_default;
10074         hw->fc.current_mode = e1000_fc_default;
10075
10076         e1000_validate_mdi_setting(hw);
10077
10078         /* By default, support wake on port A */
10079         if (hw->bus.func == 0)
10080                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
10081
10082         /* Check the NVM for wake support for non-port A ports */
10083         if (hw->mac.type >= e1000_82580)
10084                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
10085                                  NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
10086                                  &eeprom_data);
10087         else if (hw->bus.func == 1)
10088                 e1000_read_nvm(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
10089
10090         if (eeprom_data & IGB_EEPROM_APME)
10091                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
10092
10093         /* now that we have the eeprom settings, apply the special cases where
10094          * the eeprom may be wrong or the board simply won't support wake on
10095          * lan on a particular port */
10096         switch (pdev->device) {
10097         case E1000_DEV_ID_82575GB_QUAD_COPPER:
10098                 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10099                 break;
10100         case E1000_DEV_ID_82575EB_FIBER_SERDES:
10101         case E1000_DEV_ID_82576_FIBER:
10102         case E1000_DEV_ID_82576_SERDES:
10103                 /* Wake events only supported on port A for dual fiber
10104                  * regardless of eeprom setting */
10105                 if (E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_FUNC_1)
10106                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10107                 break;
10108         case E1000_DEV_ID_82576_QUAD_COPPER:
10109         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
10110                 /* if quad port adapter, disable WoL on all but port A */
10111                 if (global_quad_port_a != 0)
10112                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10113                 else
10114                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
10115                 /* Reset for multiple quad port adapters */
10116                 if (++global_quad_port_a == 4)
10117                         global_quad_port_a = 0;
10118                 break;
10119         default:
10120                 /* If the device can't wake, don't set software support */
10121                 if (!device_can_wakeup(&adapter->pdev->dev))
10122                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10123                 break;
10124         }
10125
10126         /* initialize the wol settings based on the eeprom settings */
10127         if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
10128                 adapter->wol |= E1000_WUFC_MAG;
10129
10130         /* Some vendors want WoL disabled by default, but still supported */
10131         if ((hw->mac.type == e1000_i350) &&
10132             (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
10133                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
10134                 adapter->wol = 0;
10135         }
10136
10137 #ifdef NO_KNI
10138         device_set_wakeup_enable(pci_dev_to_dev(adapter->pdev),
10139                                  adapter->flags & IGB_FLAG_WOL_SUPPORTED);
10140
10141         /* reset the hardware with the new settings */
10142         igb_reset(adapter);
10143         adapter->devrc = 0;
10144
10145 #ifdef HAVE_I2C_SUPPORT
10146         /* Init the I2C interface */
10147         err = igb_init_i2c(adapter);
10148         if (err) {
10149                 dev_err(&pdev->dev, "failed to init i2c interface\n");
10150                 goto err_eeprom;
10151         }
10152 #endif /* HAVE_I2C_SUPPORT */
10153
10154         /* let the f/w know that the h/w is now under the control of the
10155          * driver. */
10156         igb_get_hw_control(adapter);
10157
10158         strncpy(netdev->name, "eth%d", IFNAMSIZ);
10159         err = register_netdev(netdev);
10160         if (err)
10161                 goto err_register;
10162
10163 #ifdef CONFIG_IGB_VMDQ_NETDEV
10164         err = igb_init_vmdq_netdevs(adapter);
10165         if (err)
10166                 goto err_register;
10167 #endif
10168         /* carrier off reporting is important to ethtool even BEFORE open */
10169         netif_carrier_off(netdev);
10170
10171 #ifdef IGB_DCA
10172         if (dca_add_requester(&pdev->dev) == E1000_SUCCESS) {
10173                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
10174                 dev_info(pci_dev_to_dev(pdev), "DCA enabled\n");
10175                 igb_setup_dca(adapter);
10176         }
10177
10178 #endif
10179 #ifdef HAVE_PTP_1588_CLOCK
10180         /* do hw tstamp init after resetting */
10181         igb_ptp_init(adapter);
10182 #endif /* HAVE_PTP_1588_CLOCK */
10183
10184 #endif /* NO_KNI */
10185         dev_info(pci_dev_to_dev(pdev), "Intel(R) Gigabit Ethernet Network Connection\n");
10186         /* print bus type/speed/width info */
10187         dev_info(pci_dev_to_dev(pdev), "%s: (PCIe:%s:%s) ",
10188                  netdev->name,
10189                  ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5GT/s" :
10190                   (hw->bus.speed == e1000_bus_speed_5000) ? "5.0GT/s" :
10191                   (hw->mac.type == e1000_i354) ? "integrated" :
10192                                                             "unknown"),
10193                  ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
10194                   (hw->bus.width == e1000_bus_width_pcie_x2) ? "Width x2" :
10195                   (hw->bus.width == e1000_bus_width_pcie_x1) ? "Width x1" :
10196                   (hw->mac.type == e1000_i354) ? "integrated" :
10197                    "unknown"));
10198         dev_info(pci_dev_to_dev(pdev), "%s: MAC: ", netdev->name);
10199         for (i = 0; i < 6; i++)
10200                 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
10201
10202         ret_val = e1000_read_pba_string(hw, pba_str, E1000_PBANUM_LENGTH);
10203         if (ret_val)
10204                 strncpy(pba_str, "Unknown", sizeof(pba_str) - 1);
10205         dev_info(pci_dev_to_dev(pdev), "%s: PBA No: %s\n", netdev->name,
10206                  pba_str);
10207
10208
10209         /* Initialize the thermal sensor on i350 devices. */
10210         if (hw->mac.type == e1000_i350) {
10211                 if (hw->bus.func == 0) {
10212                         u16 ets_word;
10213
10214                         /*
10215                          * Read the NVM to determine if this i350 device
10216                          * supports an external thermal sensor.
10217                          */
10218                         e1000_read_nvm(hw, NVM_ETS_CFG, 1, &ets_word);
10219                         if (ets_word != 0x0000 && ets_word != 0xFFFF)
10220                                 adapter->ets = true;
10221                         else
10222                                 adapter->ets = false;
10223                 }
10224 #ifdef NO_KNI
10225 #ifdef IGB_HWMON
10226
10227                 igb_sysfs_init(adapter);
10228 #else
10229 #ifdef IGB_PROCFS
10230
10231                 igb_procfs_init(adapter);
10232 #endif /* IGB_PROCFS */
10233 #endif /* IGB_HWMON */
10234 #endif /* NO_KNI */
10235         } else {
10236                 adapter->ets = false;
10237         }
10238
10239         if (hw->phy.media_type == e1000_media_type_copper) {
10240                 switch (hw->mac.type) {
10241                 case e1000_i350:
10242                 case e1000_i210:
10243                 case e1000_i211:
10244                         /* Enable EEE for internal copper PHY devices */
10245                         err = e1000_set_eee_i350(hw);
10246                         if ((!err) &&
10247                             (adapter->flags & IGB_FLAG_EEE))
10248                                 adapter->eee_advert =
10249                                         MDIO_EEE_100TX | MDIO_EEE_1000T;
10250                         break;
10251                 case e1000_i354:
10252                         if ((E1000_READ_REG(hw, E1000_CTRL_EXT)) &
10253                             (E1000_CTRL_EXT_LINK_MODE_SGMII)) {
10254                                 err = e1000_set_eee_i354(hw);
10255                                 if ((!err) &&
10256                                     (adapter->flags & IGB_FLAG_EEE))
10257                                         adapter->eee_advert =
10258                                            MDIO_EEE_100TX | MDIO_EEE_1000T;
10259                         }
10260                         break;
10261                 default:
10262                         break;
10263                 }
10264         }
10265
10266         /* send driver version info to firmware */
10267         if (hw->mac.type >= e1000_i350)
10268                 igb_init_fw(adapter);
10269
10270 #ifndef IGB_NO_LRO
10271         if (netdev->features & NETIF_F_LRO)
10272                 dev_info(pci_dev_to_dev(pdev), "Internal LRO is enabled \n");
10273         else
10274                 dev_info(pci_dev_to_dev(pdev), "LRO is disabled \n");
10275 #endif
10276         dev_info(pci_dev_to_dev(pdev),
10277                  "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
10278                  adapter->msix_entries ? "MSI-X" :
10279                  (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
10280                  adapter->num_rx_queues, adapter->num_tx_queues);
10281
10282         cards_found++;
10283         *lad_dev = netdev;
10284
10285         pm_runtime_put_noidle(&pdev->dev);
10286         return 0;
10287
10288 //err_register:
10289 //      igb_release_hw_control(adapter);
10290 #ifdef HAVE_I2C_SUPPORT
10291         memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
10292 #endif /* HAVE_I2C_SUPPORT */
10293 err_eeprom:
10294 //      if (!e1000_check_reset_block(hw))
10295 //              e1000_phy_hw_reset(hw);
10296
10297         if (hw->flash_address)
10298                 iounmap(hw->flash_address);
10299 err_sw_init:
10300 //      igb_clear_interrupt_scheme(adapter);
10301 //      igb_reset_sriov_capability(adapter);
10302         iounmap(hw->hw_addr);
10303 err_ioremap:
10304         free_netdev(netdev);
10305 err_alloc_etherdev:
10306 //      pci_release_selected_regions(pdev,
10307 //                                   pci_select_bars(pdev, IORESOURCE_MEM));
10308 //err_pci_reg:
10309 //err_dma:
10310         pci_disable_device(pdev);
10311         return err;
10312 }
10313
10314
10315 void igb_kni_remove(struct pci_dev *pdev)
10316 {
10317         pci_disable_device(pdev);
10318 }