lib/librte_eal/linuxapp/kni/ethtool/igb/igb_main.c

   1 /*******************************************************************************
   2
   3   Intel(R) Gigabit Ethernet Linux driver
   4   Copyright(c) 2007-2013 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "COPYING".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 #include <linux/module.h>
  29 #include <linux/types.h>
  30 #include <linux/init.h>
  31 #include <linux/vmalloc.h>
  32 #include <linux/pagemap.h>
  33 #include <linux/netdevice.h>
  34 #include <linux/tcp.h>
  35 #ifdef NETIF_F_TSO
  36 #include <net/checksum.h>
  37 #ifdef NETIF_F_TSO6
  38 #include <linux/ipv6.h>
  39 #include <net/ip6_checksum.h>
  40 #endif
  41 #endif
  42 #ifdef SIOCGMIIPHY
  43 #include <linux/mii.h>
  44 #endif
  45 #ifdef SIOCETHTOOL
  46 #include <linux/ethtool.h>
  47 #endif
  48 #include <linux/if_vlan.h>
  49 #ifdef CONFIG_PM_RUNTIME
  50 #include <linux/pm_runtime.h>
  51 #endif /* CONFIG_PM_RUNTIME */
  52
  53 #include <linux/if_bridge.h>
  54 #include "igb.h"
  55 #include "igb_vmdq.h"
  56
  57 #include <linux/uio_driver.h>
  58
  59 #if defined(DEBUG) || defined (DEBUG_DUMP) || defined (DEBUG_ICR) || defined(DEBUG_ITR)
  60 #define DRV_DEBUG "_debug"
  61 #else
  62 #define DRV_DEBUG
  63 #endif
  64 #define DRV_HW_PERF
  65 #define VERSION_SUFFIX
  66
  67 #define MAJ 5
  68 #define MIN 0
  69 #define BUILD 6
  70 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." __stringify(BUILD) VERSION_SUFFIX DRV_DEBUG DRV_HW_PERF
  71
  72 char igb_driver_name[] = "igb";
  73 char igb_driver_version[] = DRV_VERSION;
  74 static const char igb_driver_string[] =
  75                                 "Intel(R) Gigabit Ethernet Network Driver";
  76 static const char igb_copyright[] =
  77                                 "Copyright (c) 2007-2013 Intel Corporation.";
  78
  79 const struct pci_device_id igb_pci_tbl[] = {
  80         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
  81         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
  82         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
  83         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER) },
  84         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER) },
  85         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES) },
  86         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII) },
  87         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER_FLASHLESS) },
  88         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES_FLASHLESS) },
  89         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER) },
  90         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER) },
  91         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER) },
  92         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES) },
  93         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII) },
  94         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER) },
  95         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER) },
  96         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER) },
  97         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES) },
  98         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII) },
  99         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL) },
 100         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII) },
 101         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES) },
 102         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE) },
 103         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP) },
 104         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576) },
 105         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS) },
 106         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES) },
 107         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER) },
 108         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES) },
 109         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD) },
 110         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2) },
 111         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER) },
 112         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER) },
 113         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES) },
 114         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER) },
 115         /* required last entry */
 116         {0, }
 117 };
 118
 119 //MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
 120 static void igb_set_sriov_capability(struct igb_adapter *adapter) __attribute__((__unused__));
 121 void igb_reset(struct igb_adapter *);
 122 static int igb_setup_all_tx_resources(struct igb_adapter *);
 123 static int igb_setup_all_rx_resources(struct igb_adapter *);
 124 static void igb_free_all_tx_resources(struct igb_adapter *);
 125 static void igb_free_all_rx_resources(struct igb_adapter *);
 126 static void igb_setup_mrqc(struct igb_adapter *);
 127 void igb_update_stats(struct igb_adapter *);
 128 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
 129 static void __devexit igb_remove(struct pci_dev *pdev);
 130 static int igb_sw_init(struct igb_adapter *);
 131 static int igb_open(struct net_device *);
 132 static int igb_close(struct net_device *);
 133 static void igb_configure(struct igb_adapter *);
 134 static void igb_configure_tx(struct igb_adapter *);
 135 static void igb_configure_rx(struct igb_adapter *);
 136 static void igb_clean_all_tx_rings(struct igb_adapter *);
 137 static void igb_clean_all_rx_rings(struct igb_adapter *);
 138 static void igb_clean_tx_ring(struct igb_ring *);
 139 static void igb_set_rx_mode(struct net_device *);
 140 static void igb_update_phy_info(unsigned long);
 141 static void igb_watchdog(unsigned long);
 142 static void igb_watchdog_task(struct work_struct *);
 143 static void igb_dma_err_task(struct work_struct *);
 144 static void igb_dma_err_timer(unsigned long data);
 145 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
 146 static struct net_device_stats *igb_get_stats(struct net_device *);
 147 static int igb_change_mtu(struct net_device *, int);
 148 void igb_full_sync_mac_table(struct igb_adapter *adapter);
 149 static int igb_set_mac(struct net_device *, void *);
 150 static void igb_set_uta(struct igb_adapter *adapter);
 151 static irqreturn_t igb_intr(int irq, void *);
 152 static irqreturn_t igb_intr_msi(int irq, void *);
 153 static irqreturn_t igb_msix_other(int irq, void *);
 154 static irqreturn_t igb_msix_ring(int irq, void *);
 155 #ifdef IGB_DCA
 156 static void igb_update_dca(struct igb_q_vector *);
 157 static void igb_setup_dca(struct igb_adapter *);
 158 #endif /* IGB_DCA */
 159 static int igb_poll(struct napi_struct *, int);
 160 static bool igb_clean_tx_irq(struct igb_q_vector *);
 161 static bool igb_clean_rx_irq(struct igb_q_vector *, int);
 162 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
 163 static void igb_tx_timeout(struct net_device *);
 164 static void igb_reset_task(struct work_struct *);
 165 #ifdef HAVE_VLAN_RX_REGISTER
 166 static void igb_vlan_mode(struct net_device *, struct vlan_group *);
 167 #endif
 168 #ifdef HAVE_VLAN_PROTOCOL
 169 static int igb_vlan_rx_add_vid(struct net_device *,
 170                                __be16 proto, u16);
 171 static int igb_vlan_rx_kill_vid(struct net_device *,
 172                                 __be16 proto, u16);
 173 #elif defined HAVE_INT_NDO_VLAN_RX_ADD_VID
 174 #ifdef NETIF_F_HW_VLAN_CTAG_RX
 175 static int igb_vlan_rx_add_vid(struct net_device *,
 176                                __always_unused __be16 proto, u16);
 177 static int igb_vlan_rx_kill_vid(struct net_device *,
 178                                 __always_unused __be16 proto, u16);
 179 #else
 180 static int igb_vlan_rx_add_vid(struct net_device *, u16);
 181 static int igb_vlan_rx_kill_vid(struct net_device *, u16);
 182 #endif
 183 #else
 184 static void igb_vlan_rx_add_vid(struct net_device *, u16);
 185 static void igb_vlan_rx_kill_vid(struct net_device *, u16);
 186 #endif
 187 static void igb_restore_vlan(struct igb_adapter *);
 188 void igb_rar_set(struct igb_adapter *adapter, u32 index);
 189 static void igb_ping_all_vfs(struct igb_adapter *);
 190 static void igb_msg_task(struct igb_adapter *);
 191 static void igb_vmm_control(struct igb_adapter *);
 192 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
 193 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
 194 static void igb_process_mdd_event(struct igb_adapter *);
 195 #ifdef IFLA_VF_MAX
 196 static int igb_ndo_set_vf_mac( struct net_device *netdev, int vf, u8 *mac);
 197 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
 198 #ifdef HAVE_VF_VLAN_PROTO
 199                                 int vf, u16 vlan, u8 qos, __be16 vlan_proto);
 200 #else
 201                                 int vf, u16 vlan, u8 qos);
 202 #endif
 203 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
 204 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
 205                                 bool setting);
 206 #endif
 207 #ifdef HAVE_VF_MIN_MAX_TXRATE
 208 static int igb_ndo_set_vf_bw(struct net_device *, int, int, int);
 209 #else /* HAVE_VF_MIN_MAX_TXRATE */
 210 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate);
 211 #endif /* HAVE_VF_MIN_MAX_TXRATE */
 212 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
 213                                  struct ifla_vf_info *ivi);
 214 static void igb_check_vf_rate_limit(struct igb_adapter *);
 215 #endif
 216 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
 217 #ifdef CONFIG_PM
 218 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
 219 static int igb_suspend(struct device *dev);
 220 static int igb_resume(struct device *dev);
 221 #ifdef CONFIG_PM_RUNTIME
 222 static int igb_runtime_suspend(struct device *dev);
 223 static int igb_runtime_resume(struct device *dev);
 224 static int igb_runtime_idle(struct device *dev);
 225 #endif /* CONFIG_PM_RUNTIME */
 226 static const struct dev_pm_ops igb_pm_ops = {
 227 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34)
 228         .suspend = igb_suspend,
 229         .resume = igb_resume,
 230         .freeze = igb_suspend,
 231         .thaw = igb_resume,
 232         .poweroff = igb_suspend,
 233         .restore = igb_resume,
 234 #ifdef CONFIG_PM_RUNTIME
 235         .runtime_suspend = igb_runtime_suspend,
 236         .runtime_resume = igb_runtime_resume,
 237         .runtime_idle = igb_runtime_idle,
 238 #endif
 239 #else /* Linux >= 2.6.34 */
 240         SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
 241 #ifdef CONFIG_PM_RUNTIME
 242         SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
 243                         igb_runtime_idle)
 244 #endif /* CONFIG_PM_RUNTIME */
 245 #endif /* Linux version */
 246 };
 247 #else
 248 static int igb_suspend(struct pci_dev *pdev, pm_message_t state);
 249 static int igb_resume(struct pci_dev *pdev);
 250 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
 251 #endif /* CONFIG_PM */
 252 #ifndef USE_REBOOT_NOTIFIER
 253 static void igb_shutdown(struct pci_dev *);
 254 #else
 255 static int igb_notify_reboot(struct notifier_block *, unsigned long, void *);
 256 static struct notifier_block igb_notifier_reboot = {
 257         .notifier_call  = igb_notify_reboot,
 258         .next           = NULL,
 259         .priority       = 0
 260 };
 261 #endif
 262 #ifdef IGB_DCA
 263 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
 264 static struct notifier_block dca_notifier = {
 265         .notifier_call  = igb_notify_dca,
 266         .next           = NULL,
 267         .priority       = 0
 268 };
 269 #endif
 270 #ifdef CONFIG_NET_POLL_CONTROLLER
 271 /* for netdump / net console */
 272 static void igb_netpoll(struct net_device *);
 273 #endif
 274
 275 #ifdef HAVE_PCI_ERS
 276 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
 277                      pci_channel_state_t);
 278 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
 279 static void igb_io_resume(struct pci_dev *);
 280
 281 static struct pci_error_handlers igb_err_handler = {
 282         .error_detected = igb_io_error_detected,
 283         .slot_reset = igb_io_slot_reset,
 284         .resume = igb_io_resume,
 285 };
 286 #endif
 287
 288 static void igb_init_fw(struct igb_adapter *adapter);
 289 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
 290
 291 static struct pci_driver igb_driver = {
 292         .name     = igb_driver_name,
 293         .id_table = igb_pci_tbl,
 294         .probe    = igb_probe,
 295         .remove   = __devexit_p(igb_remove),
 296 #ifdef CONFIG_PM
 297 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
 298         .driver.pm = &igb_pm_ops,
 299 #else
 300         .suspend  = igb_suspend,
 301         .resume   = igb_resume,
 302 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
 303 #endif /* CONFIG_PM */
 304 #ifndef USE_REBOOT_NOTIFIER
 305         .shutdown = igb_shutdown,
 306 #endif
 307 #ifdef HAVE_PCI_ERS
 308         .err_handler = &igb_err_handler
 309 #endif
 310 };
 311
 312 //MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
 313 //MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
 314 //MODULE_LICENSE("GPL");
 315 //MODULE_VERSION(DRV_VERSION);
 316
 317 static void igb_vfta_set(struct igb_adapter *adapter, u32 vid, bool add)
 318 {
 319         struct e1000_hw *hw = &adapter->hw;
 320         struct e1000_host_mng_dhcp_cookie *mng_cookie = &hw->mng_cookie;
 321         u32 index = (vid >> E1000_VFTA_ENTRY_SHIFT) & E1000_VFTA_ENTRY_MASK;
 322         u32 mask = 1 << (vid & E1000_VFTA_ENTRY_BIT_SHIFT_MASK);
 323         u32 vfta;
 324
 325         /*
 326          * if this is the management vlan the only option is to add it in so
 327          * that the management pass through will continue to work
 328          */
 329         if ((mng_cookie->status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
 330             (vid == mng_cookie->vlan_id))
 331                 add = TRUE;
 332
 333         vfta = adapter->shadow_vfta[index];
 334
 335         if (add)
 336                 vfta |= mask;
 337         else
 338                 vfta &= ~mask;
 339
 340         e1000_write_vfta(hw, index, vfta);
 341         adapter->shadow_vfta[index] = vfta;
 342 }
 343
 344 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
 345 //module_param(debug, int, 0);
 346 //MODULE_PARM_DESC(debug, "Debug level (0=none, ..., 16=all)");
 347
 348 /**
 349  * igb_init_module - Driver Registration Routine
 350  *
 351  * igb_init_module is the first routine called when the driver is
 352  * loaded. All it does is register with the PCI subsystem.
 353  **/
 354 static int __init igb_init_module(void)
 355 {
 356         int ret;
 357
 358         printk(KERN_INFO "%s - version %s\n",
 359                igb_driver_string, igb_driver_version);
 360
 361         printk(KERN_INFO "%s\n", igb_copyright);
 362 #ifdef IGB_HWMON
 363 /* only use IGB_PROCFS if IGB_HWMON is not defined */
 364 #else
 365 #ifdef IGB_PROCFS
 366         if (igb_procfs_topdir_init())
 367                 printk(KERN_INFO "Procfs failed to initialize topdir\n");
 368 #endif /* IGB_PROCFS */
 369 #endif /* IGB_HWMON  */
 370
 371 #ifdef IGB_DCA
 372         dca_register_notify(&dca_notifier);
 373 #endif
 374         ret = pci_register_driver(&igb_driver);
 375 #ifdef USE_REBOOT_NOTIFIER
 376         if (ret >= 0) {
 377                 register_reboot_notifier(&igb_notifier_reboot);
 378         }
 379 #endif
 380         return ret;
 381 }
 382
 383 #undef module_init
 384 #define module_init(x) static int x(void)  __attribute__((__unused__));
 385 module_init(igb_init_module);
 386
 387 /**
 388  * igb_exit_module - Driver Exit Cleanup Routine
 389  *
 390  * igb_exit_module is called just before the driver is removed
 391  * from memory.
 392  **/
 393 static void __exit igb_exit_module(void)
 394 {
 395 #ifdef IGB_DCA
 396         dca_unregister_notify(&dca_notifier);
 397 #endif
 398 #ifdef USE_REBOOT_NOTIFIER
 399         unregister_reboot_notifier(&igb_notifier_reboot);
 400 #endif
 401         pci_unregister_driver(&igb_driver);
 402
 403 #ifdef IGB_HWMON
 404 /* only compile IGB_PROCFS if IGB_HWMON is not defined */
 405 #else
 406 #ifdef IGB_PROCFS
 407         igb_procfs_topdir_exit();
 408 #endif /* IGB_PROCFS */
 409 #endif /* IGB_HWMON */
 410 }
 411
 412 #undef module_exit
 413 #define module_exit(x) static void x(void)  __attribute__((__unused__));
 414 module_exit(igb_exit_module);
 415
 416 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
 417 /**
 418  * igb_cache_ring_register - Descriptor ring to register mapping
 419  * @adapter: board private structure to initialize
 420  *
 421  * Once we know the feature-set enabled for the device, we'll cache
 422  * the register offset the descriptor ring is assigned to.
 423  **/
 424 static void igb_cache_ring_register(struct igb_adapter *adapter)
 425 {
 426         int i = 0, j = 0;
 427         u32 rbase_offset = adapter->vfs_allocated_count;
 428
 429         switch (adapter->hw.mac.type) {
 430         case e1000_82576:
 431                 /* The queues are allocated for virtualization such that VF 0
 432                  * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
 433                  * In order to avoid collision we start at the first free queue
 434                  * and continue consuming queues in the same sequence
 435                  */
 436                 if ((adapter->rss_queues > 1) && adapter->vmdq_pools) {
 437                         for (; i < adapter->rss_queues; i++)
 438                                 adapter->rx_ring[i]->reg_idx = rbase_offset +
 439                                                                Q_IDX_82576(i);
 440                 }
 441         case e1000_82575:
 442         case e1000_82580:
 443         case e1000_i350:
 444         case e1000_i354:
 445         case e1000_i210:
 446         case e1000_i211:
 447         default:
 448                 for (; i < adapter->num_rx_queues; i++)
 449                         adapter->rx_ring[i]->reg_idx = rbase_offset + i;
 450                 for (; j < adapter->num_tx_queues; j++)
 451                         adapter->tx_ring[j]->reg_idx = rbase_offset + j;
 452                 break;
 453         }
 454 }
 455
 456 static void igb_configure_lli(struct igb_adapter *adapter)
 457 {
 458         struct e1000_hw *hw = &adapter->hw;
 459         u16 port;
 460
 461         /* LLI should only be enabled for MSI-X or MSI interrupts */
 462         if (!adapter->msix_entries && !(adapter->flags & IGB_FLAG_HAS_MSI))
 463                 return;
 464
 465         if (adapter->lli_port) {
 466                 /* use filter 0 for port */
 467                 port = htons((u16)adapter->lli_port);
 468                 E1000_WRITE_REG(hw, E1000_IMIR(0),
 469                         (port | E1000_IMIR_PORT_IM_EN));
 470                 E1000_WRITE_REG(hw, E1000_IMIREXT(0),
 471                         (E1000_IMIREXT_SIZE_BP | E1000_IMIREXT_CTRL_BP));
 472         }
 473
 474         if (adapter->flags & IGB_FLAG_LLI_PUSH) {
 475                 /* use filter 1 for push flag */
 476                 E1000_WRITE_REG(hw, E1000_IMIR(1),
 477                         (E1000_IMIR_PORT_BP | E1000_IMIR_PORT_IM_EN));
 478                 E1000_WRITE_REG(hw, E1000_IMIREXT(1),
 479                         (E1000_IMIREXT_SIZE_BP | E1000_IMIREXT_CTRL_PSH));
 480         }
 481
 482         if (adapter->lli_size) {
 483                 /* use filter 2 for size */
 484                 E1000_WRITE_REG(hw, E1000_IMIR(2),
 485                         (E1000_IMIR_PORT_BP | E1000_IMIR_PORT_IM_EN));
 486                 E1000_WRITE_REG(hw, E1000_IMIREXT(2),
 487                         (adapter->lli_size | E1000_IMIREXT_CTRL_BP));
 488         }
 489
 490 }
 491
 492 /**
 493  *  igb_write_ivar - configure ivar for given MSI-X vector
 494  *  @hw: pointer to the HW structure
 495  *  @msix_vector: vector number we are allocating to a given ring
 496  *  @index: row index of IVAR register to write within IVAR table
 497  *  @offset: column offset of in IVAR, should be multiple of 8
 498  *
 499  *  This function is intended to handle the writing of the IVAR register
 500  *  for adapters 82576 and newer.  The IVAR table consists of 2 columns,
 501  *  each containing an cause allocation for an Rx and Tx ring, and a
 502  *  variable number of rows depending on the number of queues supported.
 503  **/
 504 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
 505                            int index, int offset)
 506 {
 507         u32 ivar = E1000_READ_REG_ARRAY(hw, E1000_IVAR0, index);
 508
 509         /* clear any bits that are currently set */
 510         ivar &= ~((u32)0xFF << offset);
 511
 512         /* write vector and valid bit */
 513         ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
 514
 515         E1000_WRITE_REG_ARRAY(hw, E1000_IVAR0, index, ivar);
 516 }
 517
 518 #define IGB_N0_QUEUE -1
 519 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
 520 {
 521         struct igb_adapter *adapter = q_vector->adapter;
 522         struct e1000_hw *hw = &adapter->hw;
 523         int rx_queue = IGB_N0_QUEUE;
 524         int tx_queue = IGB_N0_QUEUE;
 525         u32 msixbm = 0;
 526
 527         if (q_vector->rx.ring)
 528                 rx_queue = q_vector->rx.ring->reg_idx;
 529         if (q_vector->tx.ring)
 530                 tx_queue = q_vector->tx.ring->reg_idx;
 531
 532         switch (hw->mac.type) {
 533         case e1000_82575:
 534                 /* The 82575 assigns vectors using a bitmask, which matches the
 535                    bitmask for the EICR/EIMS/EIMC registers.  To assign one
 536                    or more queues to a vector, we write the appropriate bits
 537                    into the MSIXBM register for that vector. */
 538                 if (rx_queue > IGB_N0_QUEUE)
 539                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
 540                 if (tx_queue > IGB_N0_QUEUE)
 541                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
 542                 if (!adapter->msix_entries && msix_vector == 0)
 543                         msixbm |= E1000_EIMS_OTHER;
 544                 E1000_WRITE_REG_ARRAY(hw, E1000_MSIXBM(0), msix_vector, msixbm);
 545                 q_vector->eims_value = msixbm;
 546                 break;
 547         case e1000_82576:
 548                 /*
 549                  * 82576 uses a table that essentially consists of 2 columns
 550                  * with 8 rows.  The ordering is column-major so we use the
 551                  * lower 3 bits as the row index, and the 4th bit as the
 552                  * column offset.
 553                  */
 554                 if (rx_queue > IGB_N0_QUEUE)
 555                         igb_write_ivar(hw, msix_vector,
 556                                        rx_queue & 0x7,
 557                                        (rx_queue & 0x8) << 1);
 558                 if (tx_queue > IGB_N0_QUEUE)
 559                         igb_write_ivar(hw, msix_vector,
 560                                        tx_queue & 0x7,
 561                                        ((tx_queue & 0x8) << 1) + 8);
 562                 q_vector->eims_value = 1 << msix_vector;
 563                 break;
 564         case e1000_82580:
 565         case e1000_i350:
 566         case e1000_i354:
 567         case e1000_i210:
 568         case e1000_i211:
 569                 /*
 570                  * On 82580 and newer adapters the scheme is similar to 82576
 571                  * however instead of ordering column-major we have things
 572                  * ordered row-major.  So we traverse the table by using
 573                  * bit 0 as the column offset, and the remaining bits as the
 574                  * row index.
 575                  */
 576                 if (rx_queue > IGB_N0_QUEUE)
 577                         igb_write_ivar(hw, msix_vector,
 578                                        rx_queue >> 1,
 579                                        (rx_queue & 0x1) << 4);
 580                 if (tx_queue > IGB_N0_QUEUE)
 581                         igb_write_ivar(hw, msix_vector,
 582                                        tx_queue >> 1,
 583                                        ((tx_queue & 0x1) << 4) + 8);
 584                 q_vector->eims_value = 1 << msix_vector;
 585                 break;
 586         default:
 587                 BUG();
 588                 break;
 589         }
 590
 591         /* add q_vector eims value to global eims_enable_mask */
 592         adapter->eims_enable_mask |= q_vector->eims_value;
 593
 594         /* configure q_vector to set itr on first interrupt */
 595         q_vector->set_itr = 1;
 596 }
 597
 598 /**
 599  * igb_configure_msix - Configure MSI-X hardware
 600  *
 601  * igb_configure_msix sets up the hardware to properly
 602  * generate MSI-X interrupts.
 603  **/
 604 static void igb_configure_msix(struct igb_adapter *adapter)
 605 {
 606         u32 tmp;
 607         int i, vector = 0;
 608         struct e1000_hw *hw = &adapter->hw;
 609
 610         adapter->eims_enable_mask = 0;
 611
 612         /* set vector for other causes, i.e. link changes */
 613         switch (hw->mac.type) {
 614         case e1000_82575:
 615                 tmp = E1000_READ_REG(hw, E1000_CTRL_EXT);
 616                 /* enable MSI-X PBA support*/
 617                 tmp |= E1000_CTRL_EXT_PBA_CLR;
 618
 619                 /* Auto-Mask interrupts upon ICR read. */
 620                 tmp |= E1000_CTRL_EXT_EIAME;
 621                 tmp |= E1000_CTRL_EXT_IRCA;
 622
 623                 E1000_WRITE_REG(hw, E1000_CTRL_EXT, tmp);
 624
 625                 /* enable msix_other interrupt */
 626                 E1000_WRITE_REG_ARRAY(hw, E1000_MSIXBM(0), vector++,
 627                                       E1000_EIMS_OTHER);
 628                 adapter->eims_other = E1000_EIMS_OTHER;
 629
 630                 break;
 631
 632         case e1000_82576:
 633         case e1000_82580:
 634         case e1000_i350:
 635         case e1000_i354:
 636         case e1000_i210:
 637         case e1000_i211:
 638                 /* Turn on MSI-X capability first, or our settings
 639                  * won't stick.  And it will take days to debug. */
 640                 E1000_WRITE_REG(hw, E1000_GPIE, E1000_GPIE_MSIX_MODE |
 641                                 E1000_GPIE_PBA | E1000_GPIE_EIAME |
 642                                 E1000_GPIE_NSICR);
 643
 644                 /* enable msix_other interrupt */
 645                 adapter->eims_other = 1 << vector;
 646                 tmp = (vector++ | E1000_IVAR_VALID) << 8;
 647
 648                 E1000_WRITE_REG(hw, E1000_IVAR_MISC, tmp);
 649                 break;
 650         default:
 651                 /* do nothing, since nothing else supports MSI-X */
 652                 break;
 653         } /* switch (hw->mac.type) */
 654
 655         adapter->eims_enable_mask |= adapter->eims_other;
 656
 657         for (i = 0; i < adapter->num_q_vectors; i++)
 658                 igb_assign_vector(adapter->q_vector[i], vector++);
 659
 660         E1000_WRITE_FLUSH(hw);
 661 }
 662
 663 /**
 664  * igb_request_msix - Initialize MSI-X interrupts
 665  *
 666  * igb_request_msix allocates MSI-X vectors and requests interrupts from the
 667  * kernel.
 668  **/
 669 static int igb_request_msix(struct igb_adapter *adapter)
 670 {
 671         struct net_device *netdev = adapter->netdev;
 672         struct e1000_hw *hw = &adapter->hw;
 673         int i, err = 0, vector = 0, free_vector = 0;
 674
 675         err = request_irq(adapter->msix_entries[vector].vector,
 676                           &igb_msix_other, 0, netdev->name, adapter);
 677         if (err)
 678                 goto err_out;
 679
 680         for (i = 0; i < adapter->num_q_vectors; i++) {
 681                 struct igb_q_vector *q_vector = adapter->q_vector[i];
 682
 683                 vector++;
 684
 685                 q_vector->itr_register = hw->hw_addr + E1000_EITR(vector);
 686
 687                 if (q_vector->rx.ring && q_vector->tx.ring)
 688                         sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
 689                                 q_vector->rx.ring->queue_index);
 690                 else if (q_vector->tx.ring)
 691                         sprintf(q_vector->name, "%s-tx-%u", netdev->name,
 692                                 q_vector->tx.ring->queue_index);
 693                 else if (q_vector->rx.ring)
 694                         sprintf(q_vector->name, "%s-rx-%u", netdev->name,
 695                                 q_vector->rx.ring->queue_index);
 696                 else
 697                         sprintf(q_vector->name, "%s-unused", netdev->name);
 698
 699                 err = request_irq(adapter->msix_entries[vector].vector,
 700                                   igb_msix_ring, 0, q_vector->name,
 701                                   q_vector);
 702                 if (err)
 703                         goto err_free;
 704         }
 705
 706         igb_configure_msix(adapter);
 707         return 0;
 708
 709 err_free:
 710         /* free already assigned IRQs */
 711         free_irq(adapter->msix_entries[free_vector++].vector, adapter);
 712
 713         vector--;
 714         for (i = 0; i < vector; i++) {
 715                 free_irq(adapter->msix_entries[free_vector++].vector,
 716                          adapter->q_vector[i]);
 717         }
 718 err_out:
 719         return err;
 720 }
 721
 722 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
 723 {
 724         if (adapter->msix_entries) {
 725                 pci_disable_msix(adapter->pdev);
 726                 kfree(adapter->msix_entries);
 727                 adapter->msix_entries = NULL;
 728         } else if (adapter->flags & IGB_FLAG_HAS_MSI) {
 729                 pci_disable_msi(adapter->pdev);
 730         }
 731 }
 732
 733 /**
 734  * igb_free_q_vector - Free memory allocated for specific interrupt vector
 735  * @adapter: board private structure to initialize
 736  * @v_idx: Index of vector to be freed
 737  *
 738  * This function frees the memory allocated to the q_vector.  In addition if
 739  * NAPI is enabled it will delete any references to the NAPI struct prior
 740  * to freeing the q_vector.
 741  **/
 742 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
 743 {
 744         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
 745
 746         if (q_vector->tx.ring)
 747                 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
 748
 749         if (q_vector->rx.ring)
 750                 adapter->tx_ring[q_vector->rx.ring->queue_index] = NULL;
 751
 752         adapter->q_vector[v_idx] = NULL;
 753         netif_napi_del(&q_vector->napi);
 754 #ifndef IGB_NO_LRO
 755         __skb_queue_purge(&q_vector->lrolist.active);
 756 #endif
 757         kfree(q_vector);
 758 }
 759
 760 /**
 761  * igb_free_q_vectors - Free memory allocated for interrupt vectors
 762  * @adapter: board private structure to initialize
 763  *
 764  * This function frees the memory allocated to the q_vectors.  In addition if
 765  * NAPI is enabled it will delete any references to the NAPI struct prior
 766  * to freeing the q_vector.
 767  **/
 768 static void igb_free_q_vectors(struct igb_adapter *adapter)
 769 {
 770         int v_idx = adapter->num_q_vectors;
 771
 772         adapter->num_tx_queues = 0;
 773         adapter->num_rx_queues = 0;
 774         adapter->num_q_vectors = 0;
 775
 776         while (v_idx--)
 777                 igb_free_q_vector(adapter, v_idx);
 778 }
 779
 780 /**
 781  * igb_clear_interrupt_scheme - reset the device to a state of no interrupts
 782  *
 783  * This function resets the device so that it has 0 rx queues, tx queues, and
 784  * MSI-X interrupts allocated.
 785  */
 786 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
 787 {
 788         igb_free_q_vectors(adapter);
 789         igb_reset_interrupt_capability(adapter);
 790 }
 791
 792 /**
 793  * igb_process_mdd_event
 794  * @adapter - board private structure
 795  *
 796  * Identify a malicious VF, disable the VF TX/RX queues and log a message.
 797  */
 798 static void igb_process_mdd_event(struct igb_adapter *adapter)
 799 {
 800         struct e1000_hw *hw = &adapter->hw;
 801         u32 lvmmc, vfte, vfre, mdfb;
 802         u8 vf_queue;
 803
 804         lvmmc = E1000_READ_REG(hw, E1000_LVMMC);
 805         vf_queue = lvmmc >> 29;
 806
 807         /* VF index cannot be bigger or equal to VFs allocated */
 808         if (vf_queue >= adapter->vfs_allocated_count)
 809                 return;
 810
 811         netdev_info(adapter->netdev,
 812                     "VF %d misbehaved. VF queues are disabled. "
 813                     "VM misbehavior code is 0x%x\n", vf_queue, lvmmc);
 814
 815         /* Disable VFTE and VFRE related bits */
 816         vfte = E1000_READ_REG(hw, E1000_VFTE);
 817         vfte &= ~(1 << vf_queue);
 818         E1000_WRITE_REG(hw, E1000_VFTE, vfte);
 819
 820         vfre = E1000_READ_REG(hw, E1000_VFRE);
 821         vfre &= ~(1 << vf_queue);
 822         E1000_WRITE_REG(hw, E1000_VFRE, vfre);
 823
 824         /* Disable MDFB related bit. Clear on write */
 825         mdfb = E1000_READ_REG(hw, E1000_MDFB);
 826         mdfb |= (1 << vf_queue);
 827         E1000_WRITE_REG(hw, E1000_MDFB, mdfb);
 828
 829         /* Reset the specific VF */
 830         E1000_WRITE_REG(hw, E1000_VTCTRL(vf_queue), E1000_VTCTRL_RST);
 831 }
 832
 833 /**
 834  * igb_disable_mdd
 835  * @adapter - board private structure
 836  *
 837  * Disable MDD behavior in the HW
 838  **/
 839 static void igb_disable_mdd(struct igb_adapter *adapter)
 840 {
 841         struct e1000_hw *hw = &adapter->hw;
 842         u32 reg;
 843
 844         if ((hw->mac.type != e1000_i350) ||
 845             (hw->mac.type != e1000_i354))
 846                 return;
 847
 848         reg = E1000_READ_REG(hw, E1000_DTXCTL);
 849         reg &= (~E1000_DTXCTL_MDP_EN);
 850         E1000_WRITE_REG(hw, E1000_DTXCTL, reg);
 851 }
 852
 853 /**
 854  * igb_enable_mdd
 855  * @adapter - board private structure
 856  *
 857  * Enable the HW to detect malicious driver and sends an interrupt to
 858  * the driver.
 859  **/
 860 static void igb_enable_mdd(struct igb_adapter *adapter)
 861 {
 862         struct e1000_hw *hw = &adapter->hw;
 863         u32 reg;
 864
 865         /* Only available on i350 device */
 866         if (hw->mac.type != e1000_i350)
 867                 return;
 868
 869         reg = E1000_READ_REG(hw, E1000_DTXCTL);
 870         reg |= E1000_DTXCTL_MDP_EN;
 871         E1000_WRITE_REG(hw, E1000_DTXCTL, reg);
 872 }
 873
 874 /**
 875  * igb_reset_sriov_capability - disable SR-IOV if enabled
 876  *
 877  * Attempt to disable single root IO virtualization capabilites present in the
 878  * kernel.
 879  **/
 880 static void igb_reset_sriov_capability(struct igb_adapter *adapter)
 881 {
 882         struct pci_dev *pdev = adapter->pdev;
 883         struct e1000_hw *hw = &adapter->hw;
 884
 885         /* reclaim resources allocated to VFs */
 886         if (adapter->vf_data) {
 887                 if (!pci_vfs_assigned(pdev)) {
 888                         /*
 889                          * disable iov and allow time for transactions to
 890                          * clear
 891                          */
 892                         pci_disable_sriov(pdev);
 893                         msleep(500);
 894
 895                         dev_info(pci_dev_to_dev(pdev), "IOV Disabled\n");
 896                 } else {
 897                         dev_info(pci_dev_to_dev(pdev), "IOV Not Disabled\n "
 898                                         "VF(s) are assigned to guests!\n");
 899                 }
 900                 /* Disable Malicious Driver Detection */
 901                 igb_disable_mdd(adapter);
 902
 903                 /* free vf data storage */
 904                 kfree(adapter->vf_data);
 905                 adapter->vf_data = NULL;
 906
 907                 /* switch rings back to PF ownership */
 908                 E1000_WRITE_REG(hw, E1000_IOVCTL,
 909                                 E1000_IOVCTL_REUSE_VFQ);
 910                 E1000_WRITE_FLUSH(hw);
 911                 msleep(100);
 912         }
 913
 914         adapter->vfs_allocated_count = 0;
 915 }
 916
 917 /**
 918  * igb_set_sriov_capability - setup SR-IOV if supported
 919  *
 920  * Attempt to enable single root IO virtualization capabilites present in the
 921  * kernel.
 922  **/
 923 static void igb_set_sriov_capability(struct igb_adapter *adapter)
 924 {
 925         struct pci_dev *pdev = adapter->pdev;
 926         int old_vfs = 0;
 927         int i;
 928
 929         old_vfs = pci_num_vf(pdev);
 930         if (old_vfs) {
 931                 dev_info(pci_dev_to_dev(pdev),
 932                                 "%d pre-allocated VFs found - override "
 933                                 "max_vfs setting of %d\n", old_vfs,
 934                                 adapter->vfs_allocated_count);
 935                 adapter->vfs_allocated_count = old_vfs;
 936         }
 937         /* no VFs requested, do nothing */
 938         if (!adapter->vfs_allocated_count)
 939                 return;
 940
 941         /* allocate vf data storage */
 942         adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
 943                                    sizeof(struct vf_data_storage),
 944                                    GFP_KERNEL);
 945
 946         if (adapter->vf_data) {
 947                 if (!old_vfs) {
 948                         if (pci_enable_sriov(pdev,
 949                                         adapter->vfs_allocated_count))
 950                                 goto err_out;
 951                 }
 952                 for (i = 0; i < adapter->vfs_allocated_count; i++)
 953                         igb_vf_configure(adapter, i);
 954
 955                 switch (adapter->hw.mac.type) {
 956                 case e1000_82576:
 957                 case e1000_i350:
 958                         /* Enable VM to VM loopback by default */
 959                         adapter->flags |= IGB_FLAG_LOOPBACK_ENABLE;
 960                         break;
 961                 default:
 962                         /* Currently no other hardware supports loopback */
 963                         break;
 964                 }
 965
 966                 /* DMA Coalescing is not supported in IOV mode. */
 967                 if (adapter->hw.mac.type >= e1000_i350)
 968                 adapter->dmac = IGB_DMAC_DISABLE;
 969                 if (adapter->hw.mac.type < e1000_i350)
 970                 adapter->flags |= IGB_FLAG_DETECT_BAD_DMA;
 971                 return;
 972
 973         }
 974
 975 err_out:
 976         kfree(adapter->vf_data);
 977         adapter->vf_data = NULL;
 978         adapter->vfs_allocated_count = 0;
 979         dev_warn(pci_dev_to_dev(pdev),
 980                         "Failed to initialize SR-IOV virtualization\n");
 981 }
 982
 983 /**
 984  * igb_set_interrupt_capability - set MSI or MSI-X if supported
 985  *
 986  * Attempt to configure interrupts using the best available
 987  * capabilities of the hardware and kernel.
 988  **/
 989 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
 990 {
 991         struct pci_dev *pdev = adapter->pdev;
 992         int err;
 993         int numvecs, i;
 994
 995         if (!msix)
 996                 adapter->int_mode = IGB_INT_MODE_MSI;
 997
 998         /* Number of supported queues. */
 999         adapter->num_rx_queues = adapter->rss_queues;
1000
1001         if (adapter->vmdq_pools > 1)
1002                 adapter->num_rx_queues += adapter->vmdq_pools - 1;
1003
1004 #ifdef HAVE_TX_MQ
1005         if (adapter->vmdq_pools)
1006                 adapter->num_tx_queues = adapter->vmdq_pools;
1007         else
1008                 adapter->num_tx_queues = adapter->num_rx_queues;
1009 #else
1010         adapter->num_tx_queues = max_t(u32, 1, adapter->vmdq_pools);
1011 #endif
1012
1013         switch (adapter->int_mode) {
1014         case IGB_INT_MODE_MSIX:
1015                 /* start with one vector for every rx queue */
1016                 numvecs = adapter->num_rx_queues;
1017
1018                 /* if tx handler is separate add 1 for every tx queue */
1019                 if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1020                         numvecs += adapter->num_tx_queues;
1021
1022                 /* store the number of vectors reserved for queues */
1023                 adapter->num_q_vectors = numvecs;
1024
1025                 /* add 1 vector for link status interrupts */
1026                 numvecs++;
1027                 adapter->msix_entries = kcalloc(numvecs,
1028                                                 sizeof(struct msix_entry),
1029                                                 GFP_KERNEL);
1030                 if (adapter->msix_entries) {
1031                         for (i = 0; i < numvecs; i++)
1032                                 adapter->msix_entries[i].entry = i;
1033
1034                         err = pci_enable_msix(pdev,
1035                                               adapter->msix_entries, numvecs);
1036                         if (err == 0)
1037                                 break;
1038                 }
1039                 /* MSI-X failed, so fall through and try MSI */
1040                 dev_warn(pci_dev_to_dev(pdev), "Failed to initialize MSI-X interrupts. "
1041                          "Falling back to MSI interrupts.\n");
1042                 igb_reset_interrupt_capability(adapter);
1043         case IGB_INT_MODE_MSI:
1044                 if (!pci_enable_msi(pdev))
1045                         adapter->flags |= IGB_FLAG_HAS_MSI;
1046                 else
1047                         dev_warn(pci_dev_to_dev(pdev), "Failed to initialize MSI "
1048                                  "interrupts.  Falling back to legacy "
1049                                  "interrupts.\n");
1050                 /* Fall through */
1051         case IGB_INT_MODE_LEGACY:
1052                 /* disable advanced features and set number of queues to 1 */
1053                 igb_reset_sriov_capability(adapter);
1054                 adapter->vmdq_pools = 0;
1055                 adapter->rss_queues = 1;
1056                 adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1057                 adapter->num_rx_queues = 1;
1058                 adapter->num_tx_queues = 1;
1059                 adapter->num_q_vectors = 1;
1060                 /* Don't do anything; this is system default */
1061                 break;
1062         }
1063 }
1064
1065 static void igb_add_ring(struct igb_ring *ring,
1066                          struct igb_ring_container *head)
1067 {
1068         head->ring = ring;
1069         head->count++;
1070 }
1071
1072 /**
1073  * igb_alloc_q_vector - Allocate memory for a single interrupt vector
1074  * @adapter: board private structure to initialize
1075  * @v_count: q_vectors allocated on adapter, used for ring interleaving
1076  * @v_idx: index of vector in adapter struct
1077  * @txr_count: total number of Tx rings to allocate
1078  * @txr_idx: index of first Tx ring to allocate
1079  * @rxr_count: total number of Rx rings to allocate
1080  * @rxr_idx: index of first Rx ring to allocate
1081  *
1082  * We allocate one q_vector.  If allocation fails we return -ENOMEM.
1083  **/
1084 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1085                               unsigned int v_count, unsigned int v_idx,
1086                               unsigned int txr_count, unsigned int txr_idx,
1087                               unsigned int rxr_count, unsigned int rxr_idx)
1088 {
1089         struct igb_q_vector *q_vector;
1090         struct igb_ring *ring;
1091         int ring_count, size;
1092
1093         /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1094         if (txr_count > 1 || rxr_count > 1)
1095                 return -ENOMEM;
1096
1097         ring_count = txr_count + rxr_count;
1098         size = sizeof(struct igb_q_vector) +
1099                (sizeof(struct igb_ring) * ring_count);
1100
1101         /* allocate q_vector and rings */
1102         q_vector = kzalloc(size, GFP_KERNEL);
1103         if (!q_vector)
1104                 return -ENOMEM;
1105
1106 #ifndef IGB_NO_LRO
1107         /* initialize LRO */
1108         __skb_queue_head_init(&q_vector->lrolist.active);
1109
1110 #endif
1111         /* initialize NAPI */
1112         netif_napi_add(adapter->netdev, &q_vector->napi,
1113                        igb_poll, 64);
1114
1115         /* tie q_vector and adapter together */
1116         adapter->q_vector[v_idx] = q_vector;
1117         q_vector->adapter = adapter;
1118
1119         /* initialize work limits */
1120         q_vector->tx.work_limit = adapter->tx_work_limit;
1121
1122         /* initialize ITR configuration */
1123         q_vector->itr_register = adapter->hw.hw_addr + E1000_EITR(0);
1124         q_vector->itr_val = IGB_START_ITR;
1125
1126         /* initialize pointer to rings */
1127         ring = q_vector->ring;
1128
1129         /* intialize ITR */
1130         if (rxr_count) {
1131                 /* rx or rx/tx vector */
1132                 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1133                         q_vector->itr_val = adapter->rx_itr_setting;
1134         } else {
1135                 /* tx only vector */
1136                 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1137                         q_vector->itr_val = adapter->tx_itr_setting;
1138         }
1139
1140         if (txr_count) {
1141                 /* assign generic ring traits */
1142                 ring->dev = &adapter->pdev->dev;
1143                 ring->netdev = adapter->netdev;
1144
1145                 /* configure backlink on ring */
1146                 ring->q_vector = q_vector;
1147
1148                 /* update q_vector Tx values */
1149                 igb_add_ring(ring, &q_vector->tx);
1150
1151                 /* For 82575, context index must be unique per ring. */
1152                 if (adapter->hw.mac.type == e1000_82575)
1153                         set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1154
1155                 /* apply Tx specific ring traits */
1156                 ring->count = adapter->tx_ring_count;
1157                 ring->queue_index = txr_idx;
1158
1159                 /* assign ring to adapter */
1160                 adapter->tx_ring[txr_idx] = ring;
1161
1162                 /* push pointer to next ring */
1163                 ring++;
1164         }
1165
1166         if (rxr_count) {
1167                 /* assign generic ring traits */
1168                 ring->dev = &adapter->pdev->dev;
1169                 ring->netdev = adapter->netdev;
1170
1171                 /* configure backlink on ring */
1172                 ring->q_vector = q_vector;
1173
1174                 /* update q_vector Rx values */
1175                 igb_add_ring(ring, &q_vector->rx);
1176
1177 #ifndef HAVE_NDO_SET_FEATURES
1178                 /* enable rx checksum */
1179                 set_bit(IGB_RING_FLAG_RX_CSUM, &ring->flags);
1180
1181 #endif
1182                 /* set flag indicating ring supports SCTP checksum offload */
1183                 if (adapter->hw.mac.type >= e1000_82576)
1184                         set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1185
1186                 if ((adapter->hw.mac.type == e1000_i350) ||
1187                     (adapter->hw.mac.type == e1000_i354))
1188                         set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1189
1190                 /* apply Rx specific ring traits */
1191                 ring->count = adapter->rx_ring_count;
1192                 ring->queue_index = rxr_idx;
1193
1194                 /* assign ring to adapter */
1195                 adapter->rx_ring[rxr_idx] = ring;
1196         }
1197
1198         return 0;
1199 }
1200
1201 /**
1202  * igb_alloc_q_vectors - Allocate memory for interrupt vectors
1203  * @adapter: board private structure to initialize
1204  *
1205  * We allocate one q_vector per queue interrupt.  If allocation fails we
1206  * return -ENOMEM.
1207  **/
1208 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1209 {
1210         int q_vectors = adapter->num_q_vectors;
1211         int rxr_remaining = adapter->num_rx_queues;
1212         int txr_remaining = adapter->num_tx_queues;
1213         int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1214         int err;
1215
1216         if (q_vectors >= (rxr_remaining + txr_remaining)) {
1217                 for (; rxr_remaining; v_idx++) {
1218                         err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1219                                                  0, 0, 1, rxr_idx);
1220
1221                         if (err)
1222                                 goto err_out;
1223
1224                         /* update counts and index */
1225                         rxr_remaining--;
1226                         rxr_idx++;
1227                 }
1228         }
1229
1230         for (; v_idx < q_vectors; v_idx++) {
1231                 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1232                 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1233                 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1234                                          tqpv, txr_idx, rqpv, rxr_idx);
1235
1236                 if (err)
1237                         goto err_out;
1238
1239                 /* update counts and index */
1240                 rxr_remaining -= rqpv;
1241                 txr_remaining -= tqpv;
1242                 rxr_idx++;
1243                 txr_idx++;
1244         }
1245
1246         return 0;
1247
1248 err_out:
1249         adapter->num_tx_queues = 0;
1250         adapter->num_rx_queues = 0;
1251         adapter->num_q_vectors = 0;
1252
1253         while (v_idx--)
1254                 igb_free_q_vector(adapter, v_idx);
1255
1256         return -ENOMEM;
1257 }
1258
1259 /**
1260  * igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1261  *
1262  * This function initializes the interrupts and allocates all of the queues.
1263  **/
1264 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1265 {
1266         struct pci_dev *pdev = adapter->pdev;
1267         int err;
1268
1269         igb_set_interrupt_capability(adapter, msix);
1270
1271         err = igb_alloc_q_vectors(adapter);
1272         if (err) {
1273                 dev_err(pci_dev_to_dev(pdev), "Unable to allocate memory for vectors\n");
1274                 goto err_alloc_q_vectors;
1275         }
1276
1277         igb_cache_ring_register(adapter);
1278
1279         return 0;
1280
1281 err_alloc_q_vectors:
1282         igb_reset_interrupt_capability(adapter);
1283         return err;
1284 }
1285
1286 /**
1287  * igb_request_irq - initialize interrupts
1288  *
1289  * Attempts to configure interrupts using the best available
1290  * capabilities of the hardware and kernel.
1291  **/
1292 static int igb_request_irq(struct igb_adapter *adapter)
1293 {
1294         struct net_device *netdev = adapter->netdev;
1295         struct pci_dev *pdev = adapter->pdev;
1296         int err = 0;
1297
1298         if (adapter->msix_entries) {
1299                 err = igb_request_msix(adapter);
1300                 if (!err)
1301                         goto request_done;
1302                 /* fall back to MSI */
1303                 igb_free_all_tx_resources(adapter);
1304                 igb_free_all_rx_resources(adapter);
1305
1306                 igb_clear_interrupt_scheme(adapter);
1307                 igb_reset_sriov_capability(adapter);
1308                 err = igb_init_interrupt_scheme(adapter, false);
1309                 if (err)
1310                         goto request_done;
1311                 igb_setup_all_tx_resources(adapter);
1312                 igb_setup_all_rx_resources(adapter);
1313                 igb_configure(adapter);
1314         }
1315
1316         igb_assign_vector(adapter->q_vector[0], 0);
1317
1318         if (adapter->flags & IGB_FLAG_HAS_MSI) {
1319                 err = request_irq(pdev->irq, &igb_intr_msi, 0,
1320                                   netdev->name, adapter);
1321                 if (!err)
1322                         goto request_done;
1323
1324                 /* fall back to legacy interrupts */
1325                 igb_reset_interrupt_capability(adapter);
1326                 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1327         }
1328
1329         err = request_irq(pdev->irq, &igb_intr, IRQF_SHARED,
1330                           netdev->name, adapter);
1331
1332         if (err)
1333                 dev_err(pci_dev_to_dev(pdev), "Error %d getting interrupt\n",
1334                         err);
1335
1336 request_done:
1337         return err;
1338 }
1339
1340 static void igb_free_irq(struct igb_adapter *adapter)
1341 {
1342         if (adapter->msix_entries) {
1343                 int vector = 0, i;
1344
1345                 free_irq(adapter->msix_entries[vector++].vector, adapter);
1346
1347                 for (i = 0; i < adapter->num_q_vectors; i++)
1348                         free_irq(adapter->msix_entries[vector++].vector,
1349                                  adapter->q_vector[i]);
1350         } else {
1351                 free_irq(adapter->pdev->irq, adapter);
1352         }
1353 }
1354
1355 /**
1356  * igb_irq_disable - Mask off interrupt generation on the NIC
1357  * @adapter: board private structure
1358  **/
1359 static void igb_irq_disable(struct igb_adapter *adapter)
1360 {
1361         struct e1000_hw *hw = &adapter->hw;
1362
1363         /*
1364          * we need to be careful when disabling interrupts.  The VFs are also
1365          * mapped into these registers and so clearing the bits can cause
1366          * issues on the VF drivers so we only need to clear what we set
1367          */
1368         if (adapter->msix_entries) {
1369                 u32 regval = E1000_READ_REG(hw, E1000_EIAM);
1370                 E1000_WRITE_REG(hw, E1000_EIAM, regval & ~adapter->eims_enable_mask);
1371                 E1000_WRITE_REG(hw, E1000_EIMC, adapter->eims_enable_mask);
1372                 regval = E1000_READ_REG(hw, E1000_EIAC);
1373                 E1000_WRITE_REG(hw, E1000_EIAC, regval & ~adapter->eims_enable_mask);
1374         }
1375
1376         E1000_WRITE_REG(hw, E1000_IAM, 0);
1377         E1000_WRITE_REG(hw, E1000_IMC, ~0);
1378         E1000_WRITE_FLUSH(hw);
1379
1380         if (adapter->msix_entries) {
1381                 int vector = 0, i;
1382
1383                 synchronize_irq(adapter->msix_entries[vector++].vector);
1384
1385                 for (i = 0; i < adapter->num_q_vectors; i++)
1386                         synchronize_irq(adapter->msix_entries[vector++].vector);
1387         } else {
1388                 synchronize_irq(adapter->pdev->irq);
1389         }
1390 }
1391
1392 /**
1393  * igb_irq_enable - Enable default interrupt generation settings
1394  * @adapter: board private structure
1395  **/
1396 static void igb_irq_enable(struct igb_adapter *adapter)
1397 {
1398         struct e1000_hw *hw = &adapter->hw;
1399
1400         if (adapter->msix_entries) {
1401                 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1402                 u32 regval = E1000_READ_REG(hw, E1000_EIAC);
1403                 E1000_WRITE_REG(hw, E1000_EIAC, regval | adapter->eims_enable_mask);
1404                 regval = E1000_READ_REG(hw, E1000_EIAM);
1405                 E1000_WRITE_REG(hw, E1000_EIAM, regval | adapter->eims_enable_mask);
1406                 E1000_WRITE_REG(hw, E1000_EIMS, adapter->eims_enable_mask);
1407                 if (adapter->vfs_allocated_count) {
1408                         E1000_WRITE_REG(hw, E1000_MBVFIMR, 0xFF);
1409                         ims |= E1000_IMS_VMMB;
1410                         if (adapter->mdd)
1411                                 if ((adapter->hw.mac.type == e1000_i350) ||
1412                                     (adapter->hw.mac.type == e1000_i354))
1413                                 ims |= E1000_IMS_MDDET;
1414                 }
1415                 E1000_WRITE_REG(hw, E1000_IMS, ims);
1416         } else {
1417                 E1000_WRITE_REG(hw, E1000_IMS, IMS_ENABLE_MASK |
1418                                 E1000_IMS_DRSTA);
1419                 E1000_WRITE_REG(hw, E1000_IAM, IMS_ENABLE_MASK |
1420                                 E1000_IMS_DRSTA);
1421         }
1422 }
1423
1424 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1425 {
1426         struct e1000_hw *hw = &adapter->hw;
1427         u16 vid = adapter->hw.mng_cookie.vlan_id;
1428         u16 old_vid = adapter->mng_vlan_id;
1429
1430         if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1431                 /* add VID to filter table */
1432                 igb_vfta_set(adapter, vid, TRUE);
1433                 adapter->mng_vlan_id = vid;
1434         } else {
1435                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1436         }
1437
1438         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1439             (vid != old_vid) &&
1440 #ifdef HAVE_VLAN_RX_REGISTER
1441             !vlan_group_get_device(adapter->vlgrp, old_vid)) {
1442 #else
1443             !test_bit(old_vid, adapter->active_vlans)) {
1444 #endif
1445                 /* remove VID from filter table */
1446                 igb_vfta_set(adapter, old_vid, FALSE);
1447         }
1448 }
1449
1450 /**
1451  * igb_release_hw_control - release control of the h/w to f/w
1452  * @adapter: address of board private structure
1453  *
1454  * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1455  * For ASF and Pass Through versions of f/w this means that the
1456  * driver is no longer loaded.
1457  *
1458  **/
1459 static void igb_release_hw_control(struct igb_adapter *adapter)
1460 {
1461         struct e1000_hw *hw = &adapter->hw;
1462         u32 ctrl_ext;
1463
1464         /* Let firmware take over control of h/w */
1465         ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1466         E1000_WRITE_REG(hw, E1000_CTRL_EXT,
1467                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1468 }
1469
1470 /**
1471  * igb_get_hw_control - get control of the h/w from f/w
1472  * @adapter: address of board private structure
1473  *
1474  * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1475  * For ASF and Pass Through versions of f/w this means that
1476  * the driver is loaded.
1477  *
1478  **/
1479 static void igb_get_hw_control(struct igb_adapter *adapter)
1480 {
1481         struct e1000_hw *hw = &adapter->hw;
1482         u32 ctrl_ext;
1483
1484         /* Let firmware know the driver has taken over */
1485         ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1486         E1000_WRITE_REG(hw, E1000_CTRL_EXT,
1487                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1488 }
1489
1490 /**
1491  * igb_configure - configure the hardware for RX and TX
1492  * @adapter: private board structure
1493  **/
1494 static void igb_configure(struct igb_adapter *adapter)
1495 {
1496         struct net_device *netdev = adapter->netdev;
1497         int i;
1498
1499         igb_get_hw_control(adapter);
1500         igb_set_rx_mode(netdev);
1501
1502         igb_restore_vlan(adapter);
1503
1504         igb_setup_tctl(adapter);
1505         igb_setup_mrqc(adapter);
1506         igb_setup_rctl(adapter);
1507
1508         igb_configure_tx(adapter);
1509         igb_configure_rx(adapter);
1510
1511         e1000_rx_fifo_flush_82575(&adapter->hw);
1512 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1513         if (adapter->num_tx_queues > 1)
1514                 netdev->features |= NETIF_F_MULTI_QUEUE;
1515         else
1516                 netdev->features &= ~NETIF_F_MULTI_QUEUE;
1517 #endif
1518
1519         /* call igb_desc_unused which always leaves
1520          * at least 1 descriptor unused to make sure
1521          * next_to_use != next_to_clean */
1522         for (i = 0; i < adapter->num_rx_queues; i++) {
1523                 struct igb_ring *ring = adapter->rx_ring[i];
1524                 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
1525         }
1526 }
1527
1528 /**
1529  * igb_power_up_link - Power up the phy/serdes link
1530  * @adapter: address of board private structure
1531  **/
1532 void igb_power_up_link(struct igb_adapter *adapter)
1533 {
1534         e1000_phy_hw_reset(&adapter->hw);
1535
1536         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1537                 e1000_power_up_phy(&adapter->hw);
1538         else
1539                 e1000_power_up_fiber_serdes_link(&adapter->hw);
1540 }
1541
1542 /**
1543  * igb_power_down_link - Power down the phy/serdes link
1544  * @adapter: address of board private structure
1545  */
1546 static void igb_power_down_link(struct igb_adapter *adapter)
1547 {
1548         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1549                 e1000_power_down_phy(&adapter->hw);
1550         else
1551                 e1000_shutdown_fiber_serdes_link(&adapter->hw);
1552 }
1553
1554 /* Detect and switch function for Media Auto Sense */
1555 static void igb_check_swap_media(struct igb_adapter *adapter)
1556 {
1557         struct e1000_hw *hw = &adapter->hw;
1558         u32 ctrl_ext, connsw;
1559         bool swap_now = false;
1560         bool link;
1561
1562         ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1563         connsw = E1000_READ_REG(hw, E1000_CONNSW);
1564         link = igb_has_link(adapter);
1565
1566         /* need to live swap if current media is copper and we have fiber/serdes
1567          * to go to.
1568          */
1569
1570         if ((hw->phy.media_type == e1000_media_type_copper) &&
1571             (!(connsw & E1000_CONNSW_AUTOSENSE_EN))) {
1572                 swap_now = true;
1573         } else if (!(connsw & E1000_CONNSW_SERDESD)) {
1574                 /* copper signal takes time to appear */
1575                 if (adapter->copper_tries < 2) {
1576                         adapter->copper_tries++;
1577                         connsw |= E1000_CONNSW_AUTOSENSE_CONF;
1578                         E1000_WRITE_REG(hw, E1000_CONNSW, connsw);
1579                         return;
1580                 } else {
1581                         adapter->copper_tries = 0;
1582                         if ((connsw & E1000_CONNSW_PHYSD) &&
1583                             (!(connsw & E1000_CONNSW_PHY_PDN))) {
1584                                 swap_now = true;
1585                                 connsw &= ~E1000_CONNSW_AUTOSENSE_CONF;
1586                                 E1000_WRITE_REG(hw, E1000_CONNSW, connsw);
1587                         }
1588                 }
1589         }
1590
1591         if (swap_now) {
1592                 switch (hw->phy.media_type) {
1593                 case e1000_media_type_copper:
1594                         dev_info(pci_dev_to_dev(adapter->pdev),
1595                                  "%s:MAS: changing media to fiber/serdes\n",
1596                         adapter->netdev->name);
1597                         ctrl_ext |=
1598                                 E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1599                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
1600                         adapter->copper_tries = 0;
1601                         break;
1602                 case e1000_media_type_internal_serdes:
1603                 case e1000_media_type_fiber:
1604                         dev_info(pci_dev_to_dev(adapter->pdev),
1605                                  "%s:MAS: changing media to copper\n",
1606                                  adapter->netdev->name);
1607                         ctrl_ext &=
1608                                 ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1609                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
1610                         break;
1611                 default:
1612                         /* shouldn't get here during regular operation */
1613                         dev_err(pci_dev_to_dev(adapter->pdev),
1614                                 "%s:AMS: Invalid media type found, returning\n",
1615                                 adapter->netdev->name);
1616                         break;
1617                 }
1618                 E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
1619         }
1620 }
1621
1622 #ifdef HAVE_I2C_SUPPORT
1623 /*  igb_get_i2c_data - Reads the I2C SDA data bit
1624  *  @hw: pointer to hardware structure
1625  *  @i2cctl: Current value of I2CCTL register
1626  *
1627  *  Returns the I2C data bit value
1628  */
1629 static int igb_get_i2c_data(void *data)
1630 {
1631         struct igb_adapter *adapter = (struct igb_adapter *)data;
1632         struct e1000_hw *hw = &adapter->hw;
1633         s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1634
1635         return (i2cctl & E1000_I2C_DATA_IN) != 0;
1636 }
1637
1638 /* igb_set_i2c_data - Sets the I2C data bit
1639  *  @data: pointer to hardware structure
1640  *  @state: I2C data value (0 or 1) to set
1641  *
1642  *  Sets the I2C data bit
1643  */
1644 static void igb_set_i2c_data(void *data, int state)
1645 {
1646         struct igb_adapter *adapter = (struct igb_adapter *)data;
1647         struct e1000_hw *hw = &adapter->hw;
1648         s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1649
1650         if (state)
1651                 i2cctl |= E1000_I2C_DATA_OUT;
1652         else
1653                 i2cctl &= ~E1000_I2C_DATA_OUT;
1654
1655         i2cctl &= ~E1000_I2C_DATA_OE_N;
1656         i2cctl |= E1000_I2C_CLK_OE_N;
1657
1658         E1000_WRITE_REG(hw, E1000_I2CPARAMS, i2cctl);
1659         E1000_WRITE_FLUSH(hw);
1660
1661 }
1662
1663 /* igb_set_i2c_clk - Sets the I2C SCL clock
1664  *  @data: pointer to hardware structure
1665  *  @state: state to set clock
1666  *
1667  *  Sets the I2C clock line to state
1668  */
1669 static void igb_set_i2c_clk(void *data, int state)
1670 {
1671         struct igb_adapter *adapter = (struct igb_adapter *)data;
1672         struct e1000_hw *hw = &adapter->hw;
1673         s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1674
1675         if (state) {
1676                 i2cctl |= E1000_I2C_CLK_OUT;
1677                 i2cctl &= ~E1000_I2C_CLK_OE_N;
1678         } else {
1679                 i2cctl &= ~E1000_I2C_CLK_OUT;
1680                 i2cctl &= ~E1000_I2C_CLK_OE_N;
1681         }
1682         E1000_WRITE_REG(hw, E1000_I2CPARAMS, i2cctl);
1683         E1000_WRITE_FLUSH(hw);
1684 }
1685
1686 /* igb_get_i2c_clk - Gets the I2C SCL clock state
1687  *  @data: pointer to hardware structure
1688  *
1689  *  Gets the I2C clock state
1690  */
1691 static int igb_get_i2c_clk(void *data)
1692 {
1693         struct igb_adapter *adapter = (struct igb_adapter *)data;
1694         struct e1000_hw *hw = &adapter->hw;
1695         s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1696
1697         return (i2cctl & E1000_I2C_CLK_IN) != 0;
1698 }
1699
1700 static const struct i2c_algo_bit_data igb_i2c_algo = {
1701         .setsda         = igb_set_i2c_data,
1702         .setscl         = igb_set_i2c_clk,
1703         .getsda         = igb_get_i2c_data,
1704         .getscl         = igb_get_i2c_clk,
1705         .udelay         = 5,
1706         .timeout        = 20,
1707 };
1708
1709 /*  igb_init_i2c - Init I2C interface
1710  *  @adapter: pointer to adapter structure
1711  *
1712  */
1713 static s32 igb_init_i2c(struct igb_adapter *adapter)
1714 {
1715         s32 status = E1000_SUCCESS;
1716
1717         /* I2C interface supported on i350 devices */
1718         if (adapter->hw.mac.type != e1000_i350)
1719                 return E1000_SUCCESS;
1720
1721         /* Initialize the i2c bus which is controlled by the registers.
1722          * This bus will use the i2c_algo_bit structue that implements
1723          * the protocol through toggling of the 4 bits in the register.
1724          */
1725         adapter->i2c_adap.owner = THIS_MODULE;
1726         adapter->i2c_algo = igb_i2c_algo;
1727         adapter->i2c_algo.data = adapter;
1728         adapter->i2c_adap.algo_data = &adapter->i2c_algo;
1729         adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
1730         strlcpy(adapter->i2c_adap.name, "igb BB",
1731                 sizeof(adapter->i2c_adap.name));
1732         status = i2c_bit_add_bus(&adapter->i2c_adap);
1733         return status;
1734 }
1735
1736 #endif /* HAVE_I2C_SUPPORT */
1737 /**
1738  * igb_up - Open the interface and prepare it to handle traffic
1739  * @adapter: board private structure
1740  **/
1741 int igb_up(struct igb_adapter *adapter)
1742 {
1743         struct e1000_hw *hw = &adapter->hw;
1744         int i;
1745
1746         /* hardware has been reset, we need to reload some things */
1747         igb_configure(adapter);
1748
1749         clear_bit(__IGB_DOWN, &adapter->state);
1750
1751         for (i = 0; i < adapter->num_q_vectors; i++)
1752                 napi_enable(&(adapter->q_vector[i]->napi));
1753
1754         if (adapter->msix_entries)
1755                 igb_configure_msix(adapter);
1756         else
1757                 igb_assign_vector(adapter->q_vector[0], 0);
1758
1759         igb_configure_lli(adapter);
1760
1761         /* Clear any pending interrupts. */
1762         E1000_READ_REG(hw, E1000_ICR);
1763         igb_irq_enable(adapter);
1764
1765         /* notify VFs that reset has been completed */
1766         if (adapter->vfs_allocated_count) {
1767                 u32 reg_data = E1000_READ_REG(hw, E1000_CTRL_EXT);
1768                 reg_data |= E1000_CTRL_EXT_PFRSTD;
1769                 E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg_data);
1770         }
1771
1772         netif_tx_start_all_queues(adapter->netdev);
1773
1774         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
1775                 schedule_work(&adapter->dma_err_task);
1776         /* start the watchdog. */
1777         hw->mac.get_link_status = 1;
1778         schedule_work(&adapter->watchdog_task);
1779
1780         if ((adapter->flags & IGB_FLAG_EEE) &&
1781             (!hw->dev_spec._82575.eee_disable))
1782                 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
1783
1784         return 0;
1785 }
1786
1787 void igb_down(struct igb_adapter *adapter)
1788 {
1789         struct net_device *netdev = adapter->netdev;
1790         struct e1000_hw *hw = &adapter->hw;
1791         u32 tctl, rctl;
1792         int i;
1793
1794         /* signal that we're down so the interrupt handler does not
1795          * reschedule our watchdog timer */
1796         set_bit(__IGB_DOWN, &adapter->state);
1797
1798         /* disable receives in the hardware */
1799         rctl = E1000_READ_REG(hw, E1000_RCTL);
1800         E1000_WRITE_REG(hw, E1000_RCTL, rctl & ~E1000_RCTL_EN);
1801         /* flush and sleep below */
1802
1803         netif_tx_stop_all_queues(netdev);
1804
1805         /* disable transmits in the hardware */
1806         tctl = E1000_READ_REG(hw, E1000_TCTL);
1807         tctl &= ~E1000_TCTL_EN;
1808         E1000_WRITE_REG(hw, E1000_TCTL, tctl);
1809         /* flush both disables and wait for them to finish */
1810         E1000_WRITE_FLUSH(hw);
1811         usleep_range(10000, 20000);
1812
1813         for (i = 0; i < adapter->num_q_vectors; i++)
1814                 napi_disable(&(adapter->q_vector[i]->napi));
1815
1816         igb_irq_disable(adapter);
1817
1818         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
1819
1820         del_timer_sync(&adapter->watchdog_timer);
1821         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
1822                 del_timer_sync(&adapter->dma_err_timer);
1823         del_timer_sync(&adapter->phy_info_timer);
1824
1825         netif_carrier_off(netdev);
1826
1827         /* record the stats before reset*/
1828         igb_update_stats(adapter);
1829
1830         adapter->link_speed = 0;
1831         adapter->link_duplex = 0;
1832
1833 #ifdef HAVE_PCI_ERS
1834         if (!pci_channel_offline(adapter->pdev))
1835                 igb_reset(adapter);
1836 #else
1837         igb_reset(adapter);
1838 #endif
1839         igb_clean_all_tx_rings(adapter);
1840         igb_clean_all_rx_rings(adapter);
1841 #ifdef IGB_DCA
1842         /* since we reset the hardware DCA settings were cleared */
1843         igb_setup_dca(adapter);
1844 #endif
1845 }
1846
1847 void igb_reinit_locked(struct igb_adapter *adapter)
1848 {
1849         WARN_ON(in_interrupt());
1850         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
1851                 usleep_range(1000, 2000);
1852         igb_down(adapter);
1853         igb_up(adapter);
1854         clear_bit(__IGB_RESETTING, &adapter->state);
1855 }
1856
1857 /**
1858  * igb_enable_mas - Media Autosense re-enable after swap
1859  *
1860  * @adapter: adapter struct
1861  **/
1862 static s32  igb_enable_mas(struct igb_adapter *adapter)
1863 {
1864         struct e1000_hw *hw = &adapter->hw;
1865         u32 connsw;
1866         s32 ret_val = E1000_SUCCESS;
1867
1868         connsw = E1000_READ_REG(hw, E1000_CONNSW);
1869         if (hw->phy.media_type == e1000_media_type_copper) {
1870                 /* configure for SerDes media detect */
1871                 if (!(connsw & E1000_CONNSW_SERDESD)) {
1872                         connsw |= E1000_CONNSW_ENRGSRC;
1873                         connsw |= E1000_CONNSW_AUTOSENSE_EN;
1874                         E1000_WRITE_REG(hw, E1000_CONNSW, connsw);
1875                         E1000_WRITE_FLUSH(hw);
1876                 } else if (connsw & E1000_CONNSW_SERDESD) {
1877                         /* already SerDes, no need to enable anything */
1878                         return ret_val;
1879                 } else {
1880                         dev_info(pci_dev_to_dev(adapter->pdev),
1881                         "%s:MAS: Unable to configure feature, disabling..\n",
1882                         adapter->netdev->name);
1883                         adapter->flags &= ~IGB_FLAG_MAS_ENABLE;
1884                 }
1885         }
1886         return ret_val;
1887 }
1888
1889 void igb_reset(struct igb_adapter *adapter)
1890 {
1891         struct pci_dev *pdev = adapter->pdev;
1892         struct e1000_hw *hw = &adapter->hw;
1893         struct e1000_mac_info *mac = &hw->mac;
1894         struct e1000_fc_info *fc = &hw->fc;
1895         u32 pba = 0, tx_space, min_tx_space, min_rx_space, hwm;
1896
1897         /* Repartition Pba for greater than 9k mtu
1898          * To take effect CTRL.RST is required.
1899          */
1900         switch (mac->type) {
1901         case e1000_i350:
1902         case e1000_82580:
1903         case e1000_i354:
1904                 pba = E1000_READ_REG(hw, E1000_RXPBS);
1905                 pba = e1000_rxpbs_adjust_82580(pba);
1906                 break;
1907         case e1000_82576:
1908                 pba = E1000_READ_REG(hw, E1000_RXPBS);
1909                 pba &= E1000_RXPBS_SIZE_MASK_82576;
1910                 break;
1911         case e1000_82575:
1912         case e1000_i210:
1913         case e1000_i211:
1914         default:
1915                 pba = E1000_PBA_34K;
1916                 break;
1917         }
1918
1919         if ((adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) &&
1920             (mac->type < e1000_82576)) {
1921                 /* adjust PBA for jumbo frames */
1922                 E1000_WRITE_REG(hw, E1000_PBA, pba);
1923
1924                 /* To maintain wire speed transmits, the Tx FIFO should be
1925                  * large enough to accommodate two full transmit packets,
1926                  * rounded up to the next 1KB and expressed in KB.  Likewise,
1927                  * the Rx FIFO should be large enough to accommodate at least
1928                  * one full receive packet and is similarly rounded up and
1929                  * expressed in KB. */
1930                 pba = E1000_READ_REG(hw, E1000_PBA);
1931                 /* upper 16 bits has Tx packet buffer allocation size in KB */
1932                 tx_space = pba >> 16;
1933                 /* lower 16 bits has Rx packet buffer allocation size in KB */
1934                 pba &= 0xffff;
1935                 /* the tx fifo also stores 16 bytes of information about the tx
1936                  * but don't include ethernet FCS because hardware appends it */
1937                 min_tx_space = (adapter->max_frame_size +
1938                                 sizeof(union e1000_adv_tx_desc) -
1939                                 ETH_FCS_LEN) * 2;
1940                 min_tx_space = ALIGN(min_tx_space, 1024);
1941                 min_tx_space >>= 10;
1942                 /* software strips receive CRC, so leave room for it */
1943                 min_rx_space = adapter->max_frame_size;
1944                 min_rx_space = ALIGN(min_rx_space, 1024);
1945                 min_rx_space >>= 10;
1946
1947                 /* If current Tx allocation is less than the min Tx FIFO size,
1948                  * and the min Tx FIFO size is less than the current Rx FIFO
1949                  * allocation, take space away from current Rx allocation */
1950                 if (tx_space < min_tx_space &&
1951                     ((min_tx_space - tx_space) < pba)) {
1952                         pba = pba - (min_tx_space - tx_space);
1953
1954                         /* if short on rx space, rx wins and must trump tx
1955                          * adjustment */
1956                         if (pba < min_rx_space)
1957                                 pba = min_rx_space;
1958                 }
1959                 E1000_WRITE_REG(hw, E1000_PBA, pba);
1960         }
1961
1962         /* flow control settings */
1963         /* The high water mark must be low enough to fit one full frame
1964          * (or the size used for early receive) above it in the Rx FIFO.
1965          * Set it to the lower of:
1966          * - 90% of the Rx FIFO size, or
1967          * - the full Rx FIFO size minus one full frame */
1968         hwm = min(((pba << 10) * 9 / 10),
1969                         ((pba << 10) - 2 * adapter->max_frame_size));
1970
1971         fc->high_water = hwm & 0xFFFFFFF0;      /* 16-byte granularity */
1972         fc->low_water = fc->high_water - 16;
1973         fc->pause_time = 0xFFFF;
1974         fc->send_xon = 1;
1975         fc->current_mode = fc->requested_mode;
1976
1977         /* disable receive for all VFs and wait one second */
1978         if (adapter->vfs_allocated_count) {
1979                 int i;
1980                 /*
1981                  * Clear all flags except indication that the PF has set
1982                  * the VF MAC addresses administratively
1983                  */
1984                 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
1985                         adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
1986
1987                 /* ping all the active vfs to let them know we are going down */
1988                 igb_ping_all_vfs(adapter);
1989
1990                 /* disable transmits and receives */
1991                 E1000_WRITE_REG(hw, E1000_VFRE, 0);
1992                 E1000_WRITE_REG(hw, E1000_VFTE, 0);
1993         }
1994
1995         /* Allow time for pending master requests to run */
1996         e1000_reset_hw(hw);
1997         E1000_WRITE_REG(hw, E1000_WUC, 0);
1998
1999         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
2000                 e1000_setup_init_funcs(hw, TRUE);
2001                 igb_check_options(adapter);
2002                 e1000_get_bus_info(hw);
2003                 adapter->flags &= ~IGB_FLAG_MEDIA_RESET;
2004         }
2005         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
2006                 if (igb_enable_mas(adapter))
2007                         dev_err(pci_dev_to_dev(pdev),
2008                                 "Error enabling Media Auto Sense\n");
2009         }
2010         if (e1000_init_hw(hw))
2011                 dev_err(pci_dev_to_dev(pdev), "Hardware Error\n");
2012
2013         /*
2014          * Flow control settings reset on hardware reset, so guarantee flow
2015          * control is off when forcing speed.
2016          */
2017         if (!hw->mac.autoneg)
2018                 e1000_force_mac_fc(hw);
2019
2020         igb_init_dmac(adapter, pba);
2021         /* Re-initialize the thermal sensor on i350 devices. */
2022         if (mac->type == e1000_i350 && hw->bus.func == 0) {
2023                 /*
2024                  * If present, re-initialize the external thermal sensor
2025                  * interface.
2026                  */
2027                 if (adapter->ets)
2028                         e1000_set_i2c_bb(hw);
2029                 e1000_init_thermal_sensor_thresh(hw);
2030         }
2031
2032         /*Re-establish EEE setting */
2033         if (hw->phy.media_type == e1000_media_type_copper) {
2034                 switch (mac->type) {
2035                 case e1000_i350:
2036                 case e1000_i210:
2037                 case e1000_i211:
2038                         e1000_set_eee_i350(hw);
2039                         break;
2040                 case e1000_i354:
2041                         e1000_set_eee_i354(hw);
2042                         break;
2043                 default:
2044                         break;
2045                 }
2046         }
2047
2048         if (!netif_running(adapter->netdev))
2049                 igb_power_down_link(adapter);
2050
2051         igb_update_mng_vlan(adapter);
2052
2053         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2054         E1000_WRITE_REG(hw, E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
2055
2056
2057 #ifdef HAVE_PTP_1588_CLOCK
2058         /* Re-enable PTP, where applicable. */
2059         igb_ptp_reset(adapter);
2060 #endif /* HAVE_PTP_1588_CLOCK */
2061
2062         e1000_get_phy_info(hw);
2063
2064         adapter->devrc++;
2065 }
2066
2067 #ifdef HAVE_NDO_SET_FEATURES
2068 static kni_netdev_features_t igb_fix_features(struct net_device *netdev,
2069                                               kni_netdev_features_t features)
2070 {
2071         /*
2072          * Since there is no support for separate tx vlan accel
2073          * enabled make sure tx flag is cleared if rx is.
2074          */
2075 #ifdef NETIF_F_HW_VLAN_CTAG_RX
2076         if (!(features & NETIF_F_HW_VLAN_CTAG_RX))
2077                 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
2078 #else
2079         if (!(features & NETIF_F_HW_VLAN_RX))
2080                 features &= ~NETIF_F_HW_VLAN_TX;
2081 #endif
2082
2083         /* If Rx checksum is disabled, then LRO should also be disabled */
2084         if (!(features & NETIF_F_RXCSUM))
2085                 features &= ~NETIF_F_LRO;
2086
2087         return features;
2088 }
2089
2090 static int igb_set_features(struct net_device *netdev,
2091                             kni_netdev_features_t features)
2092 {
2093         u32 changed = netdev->features ^ features;
2094
2095 #ifdef NETIF_F_HW_VLAN_CTAG_RX
2096         if (changed & NETIF_F_HW_VLAN_CTAG_RX)
2097 #else
2098         if (changed & NETIF_F_HW_VLAN_RX)
2099 #endif
2100                 igb_vlan_mode(netdev, features);
2101
2102         return 0;
2103 }
2104
2105 #ifdef NTF_SELF
2106 #ifdef USE_CONST_DEV_UC_CHAR
2107 static int igb_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
2108                            struct net_device *dev,
2109                            const unsigned char *addr,
2110 #ifdef HAVE_NDO_FDB_ADD_VID
2111                            u16 vid,
2112 #endif
2113                            u16 flags)
2114 #else
2115 static int igb_ndo_fdb_add(struct ndmsg *ndm,
2116                            struct net_device *dev,
2117                            unsigned char *addr,
2118                            u16 flags)
2119 #endif
2120 {
2121         struct igb_adapter *adapter = netdev_priv(dev);
2122         struct e1000_hw *hw = &adapter->hw;
2123         int err;
2124
2125         if (!(adapter->vfs_allocated_count))
2126                 return -EOPNOTSUPP;
2127
2128         /* Hardware does not support aging addresses so if a
2129          * ndm_state is given only allow permanent addresses
2130          */
2131         if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
2132                 pr_info("%s: FDB only supports static addresses\n",
2133                         igb_driver_name);
2134                 return -EINVAL;
2135         }
2136
2137         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
2138                 u32 rar_uc_entries = hw->mac.rar_entry_count -
2139                                         (adapter->vfs_allocated_count + 1);
2140
2141                 if (netdev_uc_count(dev) < rar_uc_entries)
2142                         err = dev_uc_add_excl(dev, addr);
2143                 else
2144                         err = -ENOMEM;
2145         } else if (is_multicast_ether_addr(addr)) {
2146                 err = dev_mc_add_excl(dev, addr);
2147         } else {
2148                 err = -EINVAL;
2149         }
2150
2151         /* Only return duplicate errors if NLM_F_EXCL is set */
2152         if (err == -EEXIST && !(flags & NLM_F_EXCL))
2153                 err = 0;
2154
2155         return err;
2156 }
2157
2158 #ifndef USE_DEFAULT_FDB_DEL_DUMP
2159 #ifdef USE_CONST_DEV_UC_CHAR
2160 static int igb_ndo_fdb_del(struct ndmsg *ndm,
2161                            struct net_device *dev,
2162                            const unsigned char *addr)
2163 #else
2164 static int igb_ndo_fdb_del(struct ndmsg *ndm,
2165                            struct net_device *dev,
2166                            unsigned char *addr)
2167 #endif
2168 {
2169         struct igb_adapter *adapter = netdev_priv(dev);
2170         int err = -EOPNOTSUPP;
2171
2172         if (ndm->ndm_state & NUD_PERMANENT) {
2173                 pr_info("%s: FDB only supports static addresses\n",
2174                         igb_driver_name);
2175                 return -EINVAL;
2176         }
2177
2178         if (adapter->vfs_allocated_count) {
2179                 if (is_unicast_ether_addr(addr))
2180                         err = dev_uc_del(dev, addr);
2181                 else if (is_multicast_ether_addr(addr))
2182                         err = dev_mc_del(dev, addr);
2183                 else
2184                         err = -EINVAL;
2185         }
2186
2187         return err;
2188 }
2189
2190 static int igb_ndo_fdb_dump(struct sk_buff *skb,
2191                             struct netlink_callback *cb,
2192                             struct net_device *dev,
2193                             int idx)
2194 {
2195         struct igb_adapter *adapter = netdev_priv(dev);
2196
2197         if (adapter->vfs_allocated_count)
2198                 idx = ndo_dflt_fdb_dump(skb, cb, dev, idx);
2199
2200         return idx;
2201 }
2202 #endif /* USE_DEFAULT_FDB_DEL_DUMP */
2203
2204 #ifdef HAVE_BRIDGE_ATTRIBS
2205 #ifdef HAVE_NDO_BRIDGE_SET_DEL_LINK_FLAGS
2206 static int igb_ndo_bridge_setlink(struct net_device *dev,
2207                                   struct nlmsghdr *nlh,
2208                                   u16 flags)
2209 #else
2210 static int igb_ndo_bridge_setlink(struct net_device *dev,
2211                                   struct nlmsghdr *nlh)
2212 #endif /* HAVE_NDO_BRIDGE_SET_DEL_LINK_FLAGS */
2213 {
2214         struct igb_adapter *adapter = netdev_priv(dev);
2215         struct e1000_hw *hw = &adapter->hw;
2216         struct nlattr *attr, *br_spec;
2217         int rem;
2218
2219         if (!(adapter->vfs_allocated_count))
2220                 return -EOPNOTSUPP;
2221
2222         switch (adapter->hw.mac.type) {
2223         case e1000_82576:
2224         case e1000_i350:
2225         case e1000_i354:
2226                 break;
2227         default:
2228                 return -EOPNOTSUPP;
2229         }
2230
2231         br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
2232
2233         nla_for_each_nested(attr, br_spec, rem) {
2234                 __u16 mode;
2235
2236                 if (nla_type(attr) != IFLA_BRIDGE_MODE)
2237                         continue;
2238
2239                 mode = nla_get_u16(attr);
2240                 if (mode == BRIDGE_MODE_VEPA) {
2241                         e1000_vmdq_set_loopback_pf(hw, 0);
2242                         adapter->flags &= ~IGB_FLAG_LOOPBACK_ENABLE;
2243                 } else if (mode == BRIDGE_MODE_VEB) {
2244                         e1000_vmdq_set_loopback_pf(hw, 1);
2245                         adapter->flags |= IGB_FLAG_LOOPBACK_ENABLE;
2246                 } else
2247                         return -EINVAL;
2248
2249                 netdev_info(adapter->netdev, "enabling bridge mode: %s\n",
2250                             mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
2251         }
2252
2253         return 0;
2254 }
2255
2256 #ifdef HAVE_BRIDGE_FILTER
2257 #ifdef HAVE_NDO_BRIDGE_GETLINK_NLFLAGS
2258 static int igb_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
2259                                   struct net_device *dev, u32 filter_mask,
2260                                   int nlflags)
2261 #else
2262 static int igb_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
2263                                   struct net_device *dev, u32 filter_mask)
2264 #endif /* HAVE_NDO_BRIDGE_GETLINK_NLFLAGS */
2265 #else
2266 static int igb_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
2267                                   struct net_device *dev)
2268 #endif
2269 {
2270         struct igb_adapter *adapter = netdev_priv(dev);
2271         u16 mode;
2272
2273         if (!(adapter->vfs_allocated_count))
2274                 return -EOPNOTSUPP;
2275
2276         if (adapter->flags & IGB_FLAG_LOOPBACK_ENABLE)
2277                 mode = BRIDGE_MODE_VEB;
2278         else
2279                 mode = BRIDGE_MODE_VEPA;
2280
2281 #ifdef HAVE_NDO_DFLT_BRIDGE_ADD_MASK
2282 #ifdef HAVE_NDO_BRIDGE_GETLINK_NLFLAGS
2283 #ifdef HAVE_NDO_BRIDGE_GETLINK_FILTER_MASK_VLAN_FILL
2284         return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode, 0, 0,
2285                                 nlflags, filter_mask, NULL);
2286 #else
2287         return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode, 0, 0, nlflags);
2288 #endif /* HAVE_NDO_BRIDGE_GETLINK_FILTER_MASK_VLAN_FILL */
2289 #else
2290         return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode, 0, 0);
2291 #endif /* HAVE_NDO_BRIDGE_GETLINK_NLFLAGS */
2292 #else
2293         return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode);
2294 #endif /* HAVE_NDO_DFLT_BRIDGE_ADD_MASK */
2295 }
2296 #endif /* HAVE_BRIDGE_ATTRIBS */
2297 #endif /* NTF_SELF */
2298
2299 #endif /* HAVE_NDO_SET_FEATURES */
2300 #ifdef HAVE_NET_DEVICE_OPS
2301 static const struct net_device_ops igb_netdev_ops = {
2302         .ndo_open               = igb_open,
2303         .ndo_stop               = igb_close,
2304         .ndo_start_xmit         = igb_xmit_frame,
2305         .ndo_get_stats          = igb_get_stats,
2306         .ndo_set_rx_mode        = igb_set_rx_mode,
2307         .ndo_set_mac_address    = igb_set_mac,
2308         .ndo_change_mtu         = igb_change_mtu,
2309         .ndo_do_ioctl           = igb_ioctl,
2310         .ndo_tx_timeout         = igb_tx_timeout,
2311         .ndo_validate_addr      = eth_validate_addr,
2312         .ndo_vlan_rx_add_vid    = igb_vlan_rx_add_vid,
2313         .ndo_vlan_rx_kill_vid   = igb_vlan_rx_kill_vid,
2314 #ifdef IFLA_VF_MAX
2315         .ndo_set_vf_mac         = igb_ndo_set_vf_mac,
2316         .ndo_set_vf_vlan        = igb_ndo_set_vf_vlan,
2317 #ifdef HAVE_VF_MIN_MAX_TXRATE
2318         .ndo_set_vf_rate        = igb_ndo_set_vf_bw,
2319 #else /* HAVE_VF_MIN_MAX_TXRATE */
2320         .ndo_set_vf_tx_rate     = igb_ndo_set_vf_bw,
2321 #endif /* HAVE_VF_MIN_MAX_TXRATE */
2322         .ndo_get_vf_config      = igb_ndo_get_vf_config,
2323 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
2324         .ndo_set_vf_spoofchk    = igb_ndo_set_vf_spoofchk,
2325 #endif /* HAVE_VF_SPOOFCHK_CONFIGURE */
2326 #endif /* IFLA_VF_MAX */
2327 #ifdef CONFIG_NET_POLL_CONTROLLER
2328         .ndo_poll_controller    = igb_netpoll,
2329 #endif
2330 #ifdef HAVE_NDO_SET_FEATURES
2331         .ndo_fix_features       = igb_fix_features,
2332         .ndo_set_features       = igb_set_features,
2333 #endif
2334 #ifdef HAVE_VLAN_RX_REGISTER
2335         .ndo_vlan_rx_register   = igb_vlan_mode,
2336 #endif
2337 #ifndef HAVE_RHEL6_NETDEV_OPS_EXT_FDB
2338 #ifdef NTF_SELF
2339         .ndo_fdb_add            = igb_ndo_fdb_add,
2340 #ifndef USE_DEFAULT_FDB_DEL_DUMP
2341         .ndo_fdb_del            = igb_ndo_fdb_del,
2342         .ndo_fdb_dump           = igb_ndo_fdb_dump,
2343 #endif
2344 #endif /* ! HAVE_RHEL6_NETDEV_OPS_EXT_FDB */
2345 #ifdef HAVE_BRIDGE_ATTRIBS
2346         .ndo_bridge_setlink     = igb_ndo_bridge_setlink,
2347         .ndo_bridge_getlink     = igb_ndo_bridge_getlink,
2348 #endif /* HAVE_BRIDGE_ATTRIBS */
2349 #endif
2350 };
2351
2352 #ifdef CONFIG_IGB_VMDQ_NETDEV
2353 static const struct net_device_ops igb_vmdq_ops = {
2354         .ndo_open               = &igb_vmdq_open,
2355         .ndo_stop               = &igb_vmdq_close,
2356         .ndo_start_xmit         = &igb_vmdq_xmit_frame,
2357         .ndo_get_stats          = &igb_vmdq_get_stats,
2358         .ndo_set_rx_mode        = &igb_vmdq_set_rx_mode,
2359         .ndo_validate_addr      = eth_validate_addr,
2360         .ndo_set_mac_address    = &igb_vmdq_set_mac,
2361         .ndo_change_mtu         = &igb_vmdq_change_mtu,
2362         .ndo_tx_timeout         = &igb_vmdq_tx_timeout,
2363         .ndo_vlan_rx_register   = &igb_vmdq_vlan_rx_register,
2364         .ndo_vlan_rx_add_vid    = &igb_vmdq_vlan_rx_add_vid,
2365         .ndo_vlan_rx_kill_vid   = &igb_vmdq_vlan_rx_kill_vid,
2366 };
2367
2368 #endif /* CONFIG_IGB_VMDQ_NETDEV */
2369 #endif /* HAVE_NET_DEVICE_OPS */
2370 #ifdef CONFIG_IGB_VMDQ_NETDEV
2371 void igb_assign_vmdq_netdev_ops(struct net_device *vnetdev)
2372 {
2373 #ifdef HAVE_NET_DEVICE_OPS
2374         vnetdev->netdev_ops = &igb_vmdq_ops;
2375 #else
2376         dev->open = &igb_vmdq_open;
2377         dev->stop = &igb_vmdq_close;
2378         dev->hard_start_xmit = &igb_vmdq_xmit_frame;
2379         dev->get_stats = &igb_vmdq_get_stats;
2380 #ifdef HAVE_SET_RX_MODE
2381         dev->set_rx_mode = &igb_vmdq_set_rx_mode;
2382 #endif
2383         dev->set_multicast_list = &igb_vmdq_set_rx_mode;
2384         dev->set_mac_address = &igb_vmdq_set_mac;
2385         dev->change_mtu = &igb_vmdq_change_mtu;
2386 #ifdef HAVE_TX_TIMEOUT
2387         dev->tx_timeout = &igb_vmdq_tx_timeout;
2388 #endif
2389 #if defined(NETIF_F_HW_VLAN_TX) || defined(NETIF_F_HW_VLAN_CTAG_TX)
2390         dev->vlan_rx_register = &igb_vmdq_vlan_rx_register;
2391         dev->vlan_rx_add_vid = &igb_vmdq_vlan_rx_add_vid;
2392         dev->vlan_rx_kill_vid = &igb_vmdq_vlan_rx_kill_vid;
2393 #endif
2394 #endif
2395         igb_vmdq_set_ethtool_ops(vnetdev);
2396         vnetdev->watchdog_timeo = 5 * HZ;
2397
2398 }
2399
2400 int igb_init_vmdq_netdevs(struct igb_adapter *adapter)
2401 {
2402         int pool, err = 0, base_queue;
2403         struct net_device *vnetdev;
2404         struct igb_vmdq_adapter *vmdq_adapter;
2405
2406         for (pool = 1; pool < adapter->vmdq_pools; pool++) {
2407                 int qpp = (!adapter->rss_queues ? 1 : adapter->rss_queues);
2408                 base_queue = pool * qpp;
2409                 vnetdev = alloc_etherdev(sizeof(struct igb_vmdq_adapter));
2410                 if (!vnetdev) {
2411                         err = -ENOMEM;
2412                         break;
2413                 }
2414                 vmdq_adapter = netdev_priv(vnetdev);
2415                 vmdq_adapter->vnetdev = vnetdev;
2416                 vmdq_adapter->real_adapter = adapter;
2417                 vmdq_adapter->rx_ring = adapter->rx_ring[base_queue];
2418                 vmdq_adapter->tx_ring = adapter->tx_ring[base_queue];
2419                 igb_assign_vmdq_netdev_ops(vnetdev);
2420                 snprintf(vnetdev->name, IFNAMSIZ, "%sv%d",
2421                          adapter->netdev->name, pool);
2422                 vnetdev->features = adapter->netdev->features;
2423 #ifdef HAVE_NETDEV_VLAN_FEATURES
2424                 vnetdev->vlan_features = adapter->netdev->vlan_features;
2425 #endif
2426                 adapter->vmdq_netdev[pool-1] = vnetdev;
2427                 err = register_netdev(vnetdev);
2428                 if (err)
2429                         break;
2430         }
2431         return err;
2432 }
2433
2434 int igb_remove_vmdq_netdevs(struct igb_adapter *adapter)
2435 {
2436         int pool, err = 0;
2437
2438         for (pool = 1; pool < adapter->vmdq_pools; pool++) {
2439                 unregister_netdev(adapter->vmdq_netdev[pool-1]);
2440                 free_netdev(adapter->vmdq_netdev[pool-1]);
2441                 adapter->vmdq_netdev[pool-1] = NULL;
2442         }
2443         return err;
2444 }
2445 #endif /* CONFIG_IGB_VMDQ_NETDEV */
2446
2447 /**
2448  * igb_set_fw_version - Configure version string for ethtool
2449  * @adapter: adapter struct
2450  *
2451  **/
2452 static void igb_set_fw_version(struct igb_adapter *adapter)
2453 {
2454         struct e1000_hw *hw = &adapter->hw;
2455         struct e1000_fw_version fw;
2456
2457         e1000_get_fw_version(hw, &fw);
2458
2459         switch (hw->mac.type) {
2460         case e1000_i210:
2461         case e1000_i211:
2462                 if (!(e1000_get_flash_presence_i210(hw))) {
2463                         snprintf(adapter->fw_version,
2464                             sizeof(adapter->fw_version),
2465                             "%2d.%2d-%d",
2466                             fw.invm_major, fw.invm_minor, fw.invm_img_type);
2467                         break;
2468                 }
2469                 /* fall through */
2470         default:
2471                 /* if option rom is valid, display its version too*/
2472                 if (fw.or_valid) {
2473                         snprintf(adapter->fw_version,
2474                             sizeof(adapter->fw_version),
2475                             "%d.%d, 0x%08x, %d.%d.%d",
2476                             fw.eep_major, fw.eep_minor, fw.etrack_id,
2477                             fw.or_major, fw.or_build, fw.or_patch);
2478                 /* no option rom */
2479                 } else {
2480                         if (fw.etrack_id != 0X0000) {
2481                         snprintf(adapter->fw_version,
2482                             sizeof(adapter->fw_version),
2483                             "%d.%d, 0x%08x",
2484                             fw.eep_major, fw.eep_minor, fw.etrack_id);
2485                         } else {
2486                         snprintf(adapter->fw_version,
2487                             sizeof(adapter->fw_version),
2488                             "%d.%d.%d",
2489                             fw.eep_major, fw.eep_minor, fw.eep_build);
2490                         }
2491                 }
2492                 break;
2493         }
2494
2495         return;
2496 }
2497
2498 /**
2499  * igb_init_mas - init Media Autosense feature if enabled in the NVM
2500  *
2501  * @adapter: adapter struct
2502  **/
2503 static void igb_init_mas(struct igb_adapter *adapter)
2504 {
2505         struct e1000_hw *hw = &adapter->hw;
2506         u16 eeprom_data;
2507
2508         e1000_read_nvm(hw, NVM_COMPAT, 1, &eeprom_data);
2509         switch (hw->bus.func) {
2510         case E1000_FUNC_0:
2511                 if (eeprom_data & IGB_MAS_ENABLE_0)
2512                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2513                 break;
2514         case E1000_FUNC_1:
2515                 if (eeprom_data & IGB_MAS_ENABLE_1)
2516                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2517                 break;
2518         case E1000_FUNC_2:
2519                 if (eeprom_data & IGB_MAS_ENABLE_2)
2520                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2521                 break;
2522         case E1000_FUNC_3:
2523                 if (eeprom_data & IGB_MAS_ENABLE_3)
2524                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2525                 break;
2526         default:
2527                 /* Shouldn't get here */
2528                 dev_err(pci_dev_to_dev(adapter->pdev),
2529                         "%s:AMS: Invalid port configuration, returning\n",
2530                         adapter->netdev->name);
2531                 break;
2532         }
2533 }
2534
2535 /**
2536  * igb_probe - Device Initialization Routine
2537  * @pdev: PCI device information struct
2538  * @ent: entry in igb_pci_tbl
2539  *
2540  * Returns 0 on success, negative on failure
2541  *
2542  * igb_probe initializes an adapter identified by a pci_dev structure.
2543  * The OS initialization, configuring of the adapter private structure,
2544  * and a hardware reset occur.
2545  **/
2546 static int __devinit igb_probe(struct pci_dev *pdev,
2547                                const struct pci_device_id *ent)
2548 {
2549         struct net_device *netdev;
2550         struct igb_adapter *adapter;
2551         struct e1000_hw *hw;
2552         u16 eeprom_data = 0;
2553         u8 pba_str[E1000_PBANUM_LENGTH];
2554         s32 ret_val;
2555         static int global_quad_port_a; /* global quad port a indication */
2556         int i, err, pci_using_dac;
2557         static int cards_found;
2558
2559         err = pci_enable_device_mem(pdev);
2560         if (err)
2561                 return err;
2562
2563         pci_using_dac = 0;
2564         err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
2565         if (!err) {
2566                 err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
2567                 if (!err)
2568                         pci_using_dac = 1;
2569         } else {
2570                 err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
2571                 if (err) {
2572                         err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
2573                         if (err) {
2574                                 IGB_ERR("No usable DMA configuration, "
2575                                         "aborting\n");
2576                                 goto err_dma;
2577                         }
2578                 }
2579         }
2580
2581 #ifndef HAVE_ASPM_QUIRKS
2582         /* 82575 requires that the pci-e link partner disable the L0s state */
2583         switch (pdev->device) {
2584         case E1000_DEV_ID_82575EB_COPPER:
2585         case E1000_DEV_ID_82575EB_FIBER_SERDES:
2586         case E1000_DEV_ID_82575GB_QUAD_COPPER:
2587                 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S);
2588         default:
2589                 break;
2590         }
2591
2592 #endif /* HAVE_ASPM_QUIRKS */
2593         err = pci_request_selected_regions(pdev,
2594                                            pci_select_bars(pdev,
2595                                                            IORESOURCE_MEM),
2596                                            igb_driver_name);
2597         if (err)
2598                 goto err_pci_reg;
2599
2600         pci_enable_pcie_error_reporting(pdev);
2601
2602         pci_set_master(pdev);
2603
2604         err = -ENOMEM;
2605 #ifdef HAVE_TX_MQ
2606         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
2607                                    IGB_MAX_TX_QUEUES);
2608 #else
2609         netdev = alloc_etherdev(sizeof(struct igb_adapter));
2610 #endif /* HAVE_TX_MQ */
2611         if (!netdev)
2612                 goto err_alloc_etherdev;
2613
2614         SET_MODULE_OWNER(netdev);
2615         SET_NETDEV_DEV(netdev, &pdev->dev);
2616
2617         pci_set_drvdata(pdev, netdev);
2618         adapter = netdev_priv(netdev);
2619         adapter->netdev = netdev;
2620         adapter->pdev = pdev;
2621         hw = &adapter->hw;
2622         hw->back = adapter;
2623         adapter->port_num = hw->bus.func;
2624         adapter->msg_enable = (1 << debug) - 1;
2625
2626 #ifdef HAVE_PCI_ERS
2627         err = pci_save_state(pdev);
2628         if (err)
2629                 goto err_ioremap;
2630 #endif
2631         err = -EIO;
2632         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
2633                               pci_resource_len(pdev, 0));
2634         if (!hw->hw_addr)
2635                 goto err_ioremap;
2636
2637 #ifdef HAVE_NET_DEVICE_OPS
2638         netdev->netdev_ops = &igb_netdev_ops;
2639 #else /* HAVE_NET_DEVICE_OPS */
2640         netdev->open = &igb_open;
2641         netdev->stop = &igb_close;
2642         netdev->get_stats = &igb_get_stats;
2643 #ifdef HAVE_SET_RX_MODE
2644         netdev->set_rx_mode = &igb_set_rx_mode;
2645 #endif
2646         netdev->set_multicast_list = &igb_set_rx_mode;
2647         netdev->set_mac_address = &igb_set_mac;
2648         netdev->change_mtu = &igb_change_mtu;
2649         netdev->do_ioctl = &igb_ioctl;
2650 #ifdef HAVE_TX_TIMEOUT
2651         netdev->tx_timeout = &igb_tx_timeout;
2652 #endif
2653         netdev->vlan_rx_register = igb_vlan_mode;
2654         netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid;
2655         netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid;
2656 #ifdef CONFIG_NET_POLL_CONTROLLER
2657         netdev->poll_controller = igb_netpoll;
2658 #endif
2659         netdev->hard_start_xmit = &igb_xmit_frame;
2660 #endif /* HAVE_NET_DEVICE_OPS */
2661         igb_set_ethtool_ops(netdev);
2662 #ifdef HAVE_TX_TIMEOUT
2663         netdev->watchdog_timeo = 5 * HZ;
2664 #endif
2665
2666         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
2667
2668         adapter->bd_number = cards_found;
2669
2670         /* setup the private structure */
2671         err = igb_sw_init(adapter);
2672         if (err)
2673                 goto err_sw_init;
2674
2675         e1000_get_bus_info(hw);
2676
2677         hw->phy.autoneg_wait_to_complete = FALSE;
2678         hw->mac.adaptive_ifs = FALSE;
2679
2680         /* Copper options */
2681         if (hw->phy.media_type == e1000_media_type_copper) {
2682                 hw->phy.mdix = AUTO_ALL_MODES;
2683                 hw->phy.disable_polarity_correction = FALSE;
2684                 hw->phy.ms_type = e1000_ms_hw_default;
2685         }
2686
2687         if (e1000_check_reset_block(hw))
2688                 dev_info(pci_dev_to_dev(pdev),
2689                         "PHY reset is blocked due to SOL/IDER session.\n");
2690
2691         /*
2692          * features is initialized to 0 in allocation, it might have bits
2693          * set by igb_sw_init so we should use an or instead of an
2694          * assignment.
2695          */
2696         netdev->features |= NETIF_F_SG |
2697                             NETIF_F_IP_CSUM |
2698 #ifdef NETIF_F_IPV6_CSUM
2699                             NETIF_F_IPV6_CSUM |
2700 #endif
2701 #ifdef NETIF_F_TSO
2702                             NETIF_F_TSO |
2703 #ifdef NETIF_F_TSO6
2704                             NETIF_F_TSO6 |
2705 #endif
2706 #endif /* NETIF_F_TSO */
2707 #ifdef NETIF_F_RXHASH
2708                             NETIF_F_RXHASH |
2709 #endif
2710                             NETIF_F_RXCSUM |
2711 #ifdef NETIF_F_HW_VLAN_CTAG_RX
2712                             NETIF_F_HW_VLAN_CTAG_RX |
2713                             NETIF_F_HW_VLAN_CTAG_TX;
2714 #else
2715                             NETIF_F_HW_VLAN_RX |
2716                             NETIF_F_HW_VLAN_TX;
2717 #endif
2718
2719         if (hw->mac.type >= e1000_82576)
2720                 netdev->features |= NETIF_F_SCTP_CSUM;
2721
2722 #ifdef HAVE_NDO_SET_FEATURES
2723         /* copy netdev features into list of user selectable features */
2724         netdev->hw_features |= netdev->features;
2725 #ifndef IGB_NO_LRO
2726
2727         /* give us the option of enabling LRO later */
2728         netdev->hw_features |= NETIF_F_LRO;
2729 #endif
2730 #else
2731 #ifdef NETIF_F_GRO
2732
2733         /* this is only needed on kernels prior to 2.6.39 */
2734         netdev->features |= NETIF_F_GRO;
2735 #endif
2736 #endif
2737
2738         /* set this bit last since it cannot be part of hw_features */
2739 #ifdef NETIF_F_HW_VLAN_CTAG_FILTER
2740         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
2741 #else
2742         netdev->features |= NETIF_F_HW_VLAN_FILTER;
2743 #endif
2744
2745 #ifdef HAVE_NETDEV_VLAN_FEATURES
2746         netdev->vlan_features |= NETIF_F_TSO |
2747                                  NETIF_F_TSO6 |
2748                                  NETIF_F_IP_CSUM |
2749                                  NETIF_F_IPV6_CSUM |
2750                                  NETIF_F_SG;
2751
2752 #endif
2753         if (pci_using_dac)
2754                 netdev->features |= NETIF_F_HIGHDMA;
2755
2756         adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
2757 #ifdef DEBUG
2758         if (adapter->dmac != IGB_DMAC_DISABLE)
2759                 printk("%s: DMA Coalescing is enabled..\n", netdev->name);
2760 #endif
2761
2762         /* before reading the NVM, reset the controller to put the device in a
2763          * known good starting state */
2764         e1000_reset_hw(hw);
2765
2766         /* make sure the NVM is good */
2767         if (e1000_validate_nvm_checksum(hw) < 0) {
2768                 dev_err(pci_dev_to_dev(pdev), "The NVM Checksum Is Not"
2769                         " Valid\n");
2770                 err = -EIO;
2771                 goto err_eeprom;
2772         }
2773
2774         /* copy the MAC address out of the NVM */
2775         if (e1000_read_mac_addr(hw))
2776                 dev_err(pci_dev_to_dev(pdev), "NVM Read Error\n");
2777         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
2778 #ifdef ETHTOOL_GPERMADDR
2779         memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
2780
2781         if (!is_valid_ether_addr(netdev->perm_addr)) {
2782 #else
2783         if (!is_valid_ether_addr(netdev->dev_addr)) {
2784 #endif
2785                 dev_err(pci_dev_to_dev(pdev), "Invalid MAC Address\n");
2786                 err = -EIO;
2787                 goto err_eeprom;
2788         }
2789
2790         memcpy(&adapter->mac_table[0].addr, hw->mac.addr, netdev->addr_len);
2791         adapter->mac_table[0].queue = adapter->vfs_allocated_count;
2792         adapter->mac_table[0].state = (IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE);
2793         igb_rar_set(adapter, 0);
2794
2795         /* get firmware version for ethtool -i */
2796         igb_set_fw_version(adapter);
2797
2798         /* Check if Media Autosense is enabled */
2799         if (hw->mac.type == e1000_82580)
2800                 igb_init_mas(adapter);
2801         setup_timer(&adapter->watchdog_timer, &igb_watchdog,
2802                     (unsigned long) adapter);
2803         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
2804                 setup_timer(&adapter->dma_err_timer, &igb_dma_err_timer,
2805                             (unsigned long) adapter);
2806         setup_timer(&adapter->phy_info_timer, &igb_update_phy_info,
2807                     (unsigned long) adapter);
2808
2809         INIT_WORK(&adapter->reset_task, igb_reset_task);
2810         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
2811         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
2812                 INIT_WORK(&adapter->dma_err_task, igb_dma_err_task);
2813
2814         /* Initialize link properties that are user-changeable */
2815         adapter->fc_autoneg = true;
2816         hw->mac.autoneg = true;
2817         hw->phy.autoneg_advertised = 0x2f;
2818
2819         hw->fc.requested_mode = e1000_fc_default;
2820         hw->fc.current_mode = e1000_fc_default;
2821
2822         e1000_validate_mdi_setting(hw);
2823
2824         /* By default, support wake on port A */
2825         if (hw->bus.func == 0)
2826                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2827
2828         /* Check the NVM for wake support for non-port A ports */
2829         if (hw->mac.type >= e1000_82580)
2830                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
2831                                  NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
2832                                  &eeprom_data);
2833         else if (hw->bus.func == 1)
2834                 e1000_read_nvm(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
2835
2836         if (eeprom_data & IGB_EEPROM_APME)
2837                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2838
2839         /* now that we have the eeprom settings, apply the special cases where
2840          * the eeprom may be wrong or the board simply won't support wake on
2841          * lan on a particular port */
2842         switch (pdev->device) {
2843         case E1000_DEV_ID_82575GB_QUAD_COPPER:
2844                 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2845                 break;
2846         case E1000_DEV_ID_82575EB_FIBER_SERDES:
2847         case E1000_DEV_ID_82576_FIBER:
2848         case E1000_DEV_ID_82576_SERDES:
2849                 /* Wake events only supported on port A for dual fiber
2850                  * regardless of eeprom setting */
2851                 if (E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_FUNC_1)
2852                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2853                 break;
2854         case E1000_DEV_ID_82576_QUAD_COPPER:
2855         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
2856                 /* if quad port adapter, disable WoL on all but port A */
2857                 if (global_quad_port_a != 0)
2858                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2859                 else
2860                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
2861                 /* Reset for multiple quad port adapters */
2862                 if (++global_quad_port_a == 4)
2863                         global_quad_port_a = 0;
2864                 break;
2865         default:
2866                 /* If the device can't wake, don't set software support */
2867                 if (!device_can_wakeup(&adapter->pdev->dev))
2868                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2869                 break;
2870         }
2871
2872         /* initialize the wol settings based on the eeprom settings */
2873         if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
2874                 adapter->wol |= E1000_WUFC_MAG;
2875
2876         /* Some vendors want WoL disabled by default, but still supported */
2877         if ((hw->mac.type == e1000_i350) &&
2878             (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
2879                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2880                 adapter->wol = 0;
2881         }
2882
2883         device_set_wakeup_enable(pci_dev_to_dev(adapter->pdev),
2884                                  adapter->flags & IGB_FLAG_WOL_SUPPORTED);
2885
2886         /* reset the hardware with the new settings */
2887         igb_reset(adapter);
2888         adapter->devrc = 0;
2889
2890 #ifdef HAVE_I2C_SUPPORT
2891         /* Init the I2C interface */
2892         err = igb_init_i2c(adapter);
2893         if (err) {
2894                 dev_err(&pdev->dev, "failed to init i2c interface\n");
2895                 goto err_eeprom;
2896         }
2897 #endif /* HAVE_I2C_SUPPORT */
2898
2899         /* let the f/w know that the h/w is now under the control of the
2900          * driver. */
2901         igb_get_hw_control(adapter);
2902
2903         strncpy(netdev->name, "eth%d", IFNAMSIZ);
2904         err = register_netdev(netdev);
2905         if (err)
2906                 goto err_register;
2907
2908 #ifdef CONFIG_IGB_VMDQ_NETDEV
2909         err = igb_init_vmdq_netdevs(adapter);
2910         if (err)
2911                 goto err_register;
2912 #endif
2913         /* carrier off reporting is important to ethtool even BEFORE open */
2914         netif_carrier_off(netdev);
2915
2916 #ifdef IGB_DCA
2917         if (dca_add_requester(&pdev->dev) == E1000_SUCCESS) {
2918                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
2919                 dev_info(pci_dev_to_dev(pdev), "DCA enabled\n");
2920                 igb_setup_dca(adapter);
2921         }
2922
2923 #endif
2924 #ifdef HAVE_PTP_1588_CLOCK
2925         /* do hw tstamp init after resetting */
2926         igb_ptp_init(adapter);
2927 #endif /* HAVE_PTP_1588_CLOCK */
2928
2929         dev_info(pci_dev_to_dev(pdev), "Intel(R) Gigabit Ethernet Network Connection\n");
2930         /* print bus type/speed/width info */
2931         dev_info(pci_dev_to_dev(pdev), "%s: (PCIe:%s:%s) ",
2932                  netdev->name,
2933                  ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5GT/s" :
2934                   (hw->bus.speed == e1000_bus_speed_5000) ? "5.0GT/s" :
2935                   (hw->mac.type == e1000_i354) ? "integrated" :
2936                                                             "unknown"),
2937                  ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
2938                   (hw->bus.width == e1000_bus_width_pcie_x2) ? "Width x2" :
2939                   (hw->bus.width == e1000_bus_width_pcie_x1) ? "Width x1" :
2940                   (hw->mac.type == e1000_i354) ? "integrated" :
2941                    "unknown"));
2942         dev_info(pci_dev_to_dev(pdev), "%s: MAC: ", netdev->name);
2943         for (i = 0; i < 6; i++)
2944                 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
2945
2946         ret_val = e1000_read_pba_string(hw, pba_str, E1000_PBANUM_LENGTH);
2947         if (ret_val)
2948                 strncpy(pba_str, "Unknown", sizeof(pba_str) - 1);
2949         dev_info(pci_dev_to_dev(pdev), "%s: PBA No: %s\n", netdev->name,
2950                  pba_str);
2951
2952
2953         /* Initialize the thermal sensor on i350 devices. */
2954         if (hw->mac.type == e1000_i350) {
2955                 if (hw->bus.func == 0) {
2956                         u16 ets_word;
2957
2958                         /*
2959                          * Read the NVM to determine if this i350 device
2960                          * supports an external thermal sensor.
2961                          */
2962                         e1000_read_nvm(hw, NVM_ETS_CFG, 1, &ets_word);
2963                         if (ets_word != 0x0000 && ets_word != 0xFFFF)
2964                                 adapter->ets = true;
2965                         else
2966                                 adapter->ets = false;
2967                 }
2968 #ifdef IGB_HWMON
2969
2970                 igb_sysfs_init(adapter);
2971 #else
2972 #ifdef IGB_PROCFS
2973
2974                 igb_procfs_init(adapter);
2975 #endif /* IGB_PROCFS */
2976 #endif /* IGB_HWMON */
2977         } else {
2978                 adapter->ets = false;
2979         }
2980
2981         if (hw->phy.media_type == e1000_media_type_copper) {
2982                 switch (hw->mac.type) {
2983                 case e1000_i350:
2984                 case e1000_i210:
2985                 case e1000_i211:
2986                         /* Enable EEE for internal copper PHY devices */
2987                         err = e1000_set_eee_i350(hw);
2988                         if ((!err) &&
2989                             (adapter->flags & IGB_FLAG_EEE))
2990                                 adapter->eee_advert =
2991                                         MDIO_EEE_100TX | MDIO_EEE_1000T;
2992                         break;
2993                 case e1000_i354:
2994                         if ((E1000_READ_REG(hw, E1000_CTRL_EXT)) &
2995                             (E1000_CTRL_EXT_LINK_MODE_SGMII)) {
2996                                 err = e1000_set_eee_i354(hw);
2997                                 if ((!err) &&
2998                                     (adapter->flags & IGB_FLAG_EEE))
2999                                         adapter->eee_advert =
3000                                            MDIO_EEE_100TX | MDIO_EEE_1000T;
3001                         }
3002                         break;
3003                 default:
3004                         break;
3005                 }
3006         }
3007
3008         /* send driver version info to firmware */
3009         if (hw->mac.type >= e1000_i350)
3010                 igb_init_fw(adapter);
3011
3012 #ifndef IGB_NO_LRO
3013         if (netdev->features & NETIF_F_LRO)
3014                 dev_info(pci_dev_to_dev(pdev), "Internal LRO is enabled \n");
3015         else
3016                 dev_info(pci_dev_to_dev(pdev), "LRO is disabled \n");
3017 #endif
3018         dev_info(pci_dev_to_dev(pdev),
3019                  "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
3020                  adapter->msix_entries ? "MSI-X" :
3021                  (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
3022                  adapter->num_rx_queues, adapter->num_tx_queues);
3023
3024         cards_found++;
3025
3026         pm_runtime_put_noidle(&pdev->dev);
3027         return 0;
3028
3029 err_register:
3030         igb_release_hw_control(adapter);
3031 #ifdef HAVE_I2C_SUPPORT
3032         memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
3033 #endif /* HAVE_I2C_SUPPORT */
3034 err_eeprom:
3035         if (!e1000_check_reset_block(hw))
3036                 e1000_phy_hw_reset(hw);
3037
3038         if (hw->flash_address)
3039                 iounmap(hw->flash_address);
3040 err_sw_init:
3041         igb_clear_interrupt_scheme(adapter);
3042         igb_reset_sriov_capability(adapter);
3043         iounmap(hw->hw_addr);
3044 err_ioremap:
3045         free_netdev(netdev);
3046 err_alloc_etherdev:
3047         pci_release_selected_regions(pdev,
3048                                      pci_select_bars(pdev, IORESOURCE_MEM));
3049 err_pci_reg:
3050 err_dma:
3051         pci_disable_device(pdev);
3052         return err;
3053 }
3054 #ifdef HAVE_I2C_SUPPORT
3055 /*
3056  *  igb_remove_i2c - Cleanup  I2C interface
3057  *  @adapter: pointer to adapter structure
3058  *
3059  */
3060 static void igb_remove_i2c(struct igb_adapter *adapter)
3061 {
3062
3063         /* free the adapter bus structure */
3064         i2c_del_adapter(&adapter->i2c_adap);
3065 }
3066 #endif /* HAVE_I2C_SUPPORT */
3067
3068 /**
3069  * igb_remove - Device Removal Routine
3070  * @pdev: PCI device information struct
3071  *
3072  * igb_remove is called by the PCI subsystem to alert the driver
3073  * that it should release a PCI device.  The could be caused by a
3074  * Hot-Plug event, or because the driver is going to be removed from
3075  * memory.
3076  **/
3077 static void __devexit igb_remove(struct pci_dev *pdev)
3078 {
3079         struct net_device *netdev = pci_get_drvdata(pdev);
3080         struct igb_adapter *adapter = netdev_priv(netdev);
3081         struct e1000_hw *hw = &adapter->hw;
3082
3083         pm_runtime_get_noresume(&pdev->dev);
3084 #ifdef HAVE_I2C_SUPPORT
3085         igb_remove_i2c(adapter);
3086 #endif /* HAVE_I2C_SUPPORT */
3087 #ifdef HAVE_PTP_1588_CLOCK
3088         igb_ptp_stop(adapter);
3089 #endif /* HAVE_PTP_1588_CLOCK */
3090
3091         /* flush_scheduled work may reschedule our watchdog task, so
3092          * explicitly disable watchdog tasks from being rescheduled  */
3093         set_bit(__IGB_DOWN, &adapter->state);
3094         del_timer_sync(&adapter->watchdog_timer);
3095         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
3096                 del_timer_sync(&adapter->dma_err_timer);
3097         del_timer_sync(&adapter->phy_info_timer);
3098
3099         flush_scheduled_work();
3100
3101 #ifdef IGB_DCA
3102         if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
3103                 dev_info(pci_dev_to_dev(pdev), "DCA disabled\n");
3104                 dca_remove_requester(&pdev->dev);
3105                 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
3106                 E1000_WRITE_REG(hw, E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_DISABLE);
3107         }
3108 #endif
3109
3110         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
3111          * would have already happened in close and is redundant. */
3112         igb_release_hw_control(adapter);
3113
3114         unregister_netdev(netdev);
3115 #ifdef CONFIG_IGB_VMDQ_NETDEV
3116         igb_remove_vmdq_netdevs(adapter);
3117 #endif
3118
3119         igb_clear_interrupt_scheme(adapter);
3120         igb_reset_sriov_capability(adapter);
3121
3122         iounmap(hw->hw_addr);
3123         if (hw->flash_address)
3124                 iounmap(hw->flash_address);
3125         pci_release_selected_regions(pdev,
3126                                      pci_select_bars(pdev, IORESOURCE_MEM));
3127
3128 #ifdef IGB_HWMON
3129         igb_sysfs_exit(adapter);
3130 #else
3131 #ifdef IGB_PROCFS
3132         igb_procfs_exit(adapter);
3133 #endif /* IGB_PROCFS */
3134 #endif /* IGB_HWMON */
3135         kfree(adapter->mac_table);
3136         kfree(adapter->shadow_vfta);
3137         free_netdev(netdev);
3138
3139         pci_disable_pcie_error_reporting(pdev);
3140
3141         pci_disable_device(pdev);
3142 }
3143
3144 /**
3145  * igb_sw_init - Initialize general software structures (struct igb_adapter)
3146  * @adapter: board private structure to initialize
3147  *
3148  * igb_sw_init initializes the Adapter private data structure.
3149  * Fields are initialized based on PCI device information and
3150  * OS network device settings (MTU size).
3151  **/
3152 static int igb_sw_init(struct igb_adapter *adapter)
3153 {
3154         struct e1000_hw *hw = &adapter->hw;
3155         struct net_device *netdev = adapter->netdev;
3156         struct pci_dev *pdev = adapter->pdev;
3157
3158         /* PCI config space info */
3159
3160         hw->vendor_id = pdev->vendor;
3161         hw->device_id = pdev->device;
3162         hw->subsystem_vendor_id = pdev->subsystem_vendor;
3163         hw->subsystem_device_id = pdev->subsystem_device;
3164
3165         pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
3166
3167         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
3168
3169         /* set default ring sizes */
3170         adapter->tx_ring_count = IGB_DEFAULT_TXD;
3171         adapter->rx_ring_count = IGB_DEFAULT_RXD;
3172
3173         /* set default work limits */
3174         adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
3175
3176         adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN +
3177                                               VLAN_HLEN;
3178
3179         /* Initialize the hardware-specific values */
3180         if (e1000_setup_init_funcs(hw, TRUE)) {
3181                 dev_err(pci_dev_to_dev(pdev), "Hardware Initialization Failure\n");
3182                 return -EIO;
3183         }
3184
3185         adapter->mac_table = kzalloc(sizeof(struct igb_mac_addr) *
3186                                      hw->mac.rar_entry_count,
3187                                      GFP_ATOMIC);
3188
3189         /* Setup and initialize a copy of the hw vlan table array */
3190         adapter->shadow_vfta = kzalloc(sizeof(u32) * E1000_VFTA_ENTRIES,
3191                                        GFP_ATOMIC);
3192 #ifdef NO_KNI
3193         /* These calls may decrease the number of queues */
3194         if (hw->mac.type < e1000_i210) {
3195                 igb_set_sriov_capability(adapter);
3196         }
3197
3198         if (igb_init_interrupt_scheme(adapter, true)) {
3199                 dev_err(pci_dev_to_dev(pdev), "Unable to allocate memory for queues\n");
3200                 return -ENOMEM;
3201         }
3202
3203         /* Explicitly disable IRQ since the NIC can be in any state. */
3204         igb_irq_disable(adapter);
3205
3206         set_bit(__IGB_DOWN, &adapter->state);
3207 #endif
3208         return 0;
3209 }
3210
3211 /**
3212  * igb_open - Called when a network interface is made active
3213  * @netdev: network interface device structure
3214  *
3215  * Returns 0 on success, negative value on failure
3216  *
3217  * The open entry point is called when a network interface is made
3218  * active by the system (IFF_UP).  At this point all resources needed
3219  * for transmit and receive operations are allocated, the interrupt
3220  * handler is registered with the OS, the watchdog timer is started,
3221  * and the stack is notified that the interface is ready.
3222  **/
3223 static int __igb_open(struct net_device *netdev, bool resuming)
3224 {
3225         struct igb_adapter *adapter = netdev_priv(netdev);
3226         struct e1000_hw *hw = &adapter->hw;
3227 #ifdef CONFIG_PM_RUNTIME
3228         struct pci_dev *pdev = adapter->pdev;
3229 #endif /* CONFIG_PM_RUNTIME */
3230         int err;
3231         int i;
3232
3233         /* disallow open during test */
3234         if (test_bit(__IGB_TESTING, &adapter->state)) {
3235                 WARN_ON(resuming);
3236                 return -EBUSY;
3237         }
3238
3239 #ifdef CONFIG_PM_RUNTIME
3240         if (!resuming)
3241                 pm_runtime_get_sync(&pdev->dev);
3242 #endif /* CONFIG_PM_RUNTIME */
3243
3244         netif_carrier_off(netdev);
3245
3246         /* allocate transmit descriptors */
3247         err = igb_setup_all_tx_resources(adapter);
3248         if (err)
3249                 goto err_setup_tx;
3250
3251         /* allocate receive descriptors */
3252         err = igb_setup_all_rx_resources(adapter);
3253         if (err)
3254                 goto err_setup_rx;
3255
3256         igb_power_up_link(adapter);
3257
3258         /* before we allocate an interrupt, we must be ready to handle it.
3259          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3260          * as soon as we call pci_request_irq, so we have to setup our
3261          * clean_rx handler before we do so.  */
3262         igb_configure(adapter);
3263
3264         err = igb_request_irq(adapter);
3265         if (err)
3266                 goto err_req_irq;
3267
3268         /* Notify the stack of the actual queue counts. */
3269         netif_set_real_num_tx_queues(netdev,
3270                                      adapter->vmdq_pools ? 1 :
3271                                      adapter->num_tx_queues);
3272
3273         err = netif_set_real_num_rx_queues(netdev,
3274                                            adapter->vmdq_pools ? 1 :
3275                                            adapter->num_rx_queues);
3276         if (err)
3277                 goto err_set_queues;
3278
3279         /* From here on the code is the same as igb_up() */
3280         clear_bit(__IGB_DOWN, &adapter->state);
3281
3282         for (i = 0; i < adapter->num_q_vectors; i++)
3283                 napi_enable(&(adapter->q_vector[i]->napi));
3284         igb_configure_lli(adapter);
3285
3286         /* Clear any pending interrupts. */
3287         E1000_READ_REG(hw, E1000_ICR);
3288
3289         igb_irq_enable(adapter);
3290
3291         /* notify VFs that reset has been completed */
3292         if (adapter->vfs_allocated_count) {
3293                 u32 reg_data = E1000_READ_REG(hw, E1000_CTRL_EXT);
3294                 reg_data |= E1000_CTRL_EXT_PFRSTD;
3295                 E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg_data);
3296         }
3297
3298         netif_tx_start_all_queues(netdev);
3299
3300         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
3301                 schedule_work(&adapter->dma_err_task);
3302
3303         /* start the watchdog. */
3304         hw->mac.get_link_status = 1;
3305         schedule_work(&adapter->watchdog_task);
3306
3307         return E1000_SUCCESS;
3308
3309 err_set_queues:
3310         igb_free_irq(adapter);
3311 err_req_irq:
3312         igb_release_hw_control(adapter);
3313         igb_power_down_link(adapter);
3314         igb_free_all_rx_resources(adapter);
3315 err_setup_rx:
3316         igb_free_all_tx_resources(adapter);
3317 err_setup_tx:
3318         igb_reset(adapter);
3319
3320 #ifdef CONFIG_PM_RUNTIME
3321         if (!resuming)
3322                 pm_runtime_put(&pdev->dev);
3323 #endif /* CONFIG_PM_RUNTIME */
3324
3325         return err;
3326 }
3327
3328 static int igb_open(struct net_device *netdev)
3329 {
3330         return __igb_open(netdev, false);
3331 }
3332
3333 /**
3334  * igb_close - Disables a network interface
3335  * @netdev: network interface device structure
3336  *
3337  * Returns 0, this is not allowed to fail
3338  *
3339  * The close entry point is called when an interface is de-activated
3340  * by the OS.  The hardware is still under the driver's control, but
3341  * needs to be disabled.  A global MAC reset is issued to stop the
3342  * hardware, and all transmit and receive resources are freed.
3343  **/
3344 static int __igb_close(struct net_device *netdev, bool suspending)
3345 {
3346         struct igb_adapter *adapter = netdev_priv(netdev);
3347 #ifdef CONFIG_PM_RUNTIME
3348         struct pci_dev *pdev = adapter->pdev;
3349 #endif /* CONFIG_PM_RUNTIME */
3350
3351         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
3352
3353 #ifdef CONFIG_PM_RUNTIME
3354         if (!suspending)
3355                 pm_runtime_get_sync(&pdev->dev);
3356 #endif /* CONFIG_PM_RUNTIME */
3357
3358         igb_down(adapter);
3359
3360         igb_release_hw_control(adapter);
3361
3362         igb_free_irq(adapter);
3363
3364         igb_free_all_tx_resources(adapter);
3365         igb_free_all_rx_resources(adapter);
3366
3367 #ifdef CONFIG_PM_RUNTIME
3368         if (!suspending)
3369                 pm_runtime_put_sync(&pdev->dev);
3370 #endif /* CONFIG_PM_RUNTIME */
3371
3372         return 0;
3373 }
3374
3375 static int igb_close(struct net_device *netdev)
3376 {
3377         return __igb_close(netdev, false);
3378 }
3379
3380 /**
3381  * igb_setup_tx_resources - allocate Tx resources (Descriptors)
3382  * @tx_ring: tx descriptor ring (for a specific queue) to setup
3383  *
3384  * Return 0 on success, negative on failure
3385  **/
3386 int igb_setup_tx_resources(struct igb_ring *tx_ring)
3387 {
3388         struct device *dev = tx_ring->dev;
3389         int size;
3390
3391         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3392         tx_ring->tx_buffer_info = vzalloc(size);
3393         if (!tx_ring->tx_buffer_info)
3394                 goto err;
3395
3396         /* round up to nearest 4K */
3397         tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
3398         tx_ring->size = ALIGN(tx_ring->size, 4096);
3399
3400         tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
3401                                            &tx_ring->dma, GFP_KERNEL);
3402
3403         if (!tx_ring->desc)
3404                 goto err;
3405
3406         tx_ring->next_to_use = 0;
3407         tx_ring->next_to_clean = 0;
3408
3409         return 0;
3410
3411 err:
3412         vfree(tx_ring->tx_buffer_info);
3413         dev_err(dev,
3414                 "Unable to allocate memory for the transmit descriptor ring\n");
3415         return -ENOMEM;
3416 }
3417
3418 /**
3419  * igb_setup_all_tx_resources - wrapper to allocate Tx resources
3420  *                                (Descriptors) for all queues
3421  * @adapter: board private structure
3422  *
3423  * Return 0 on success, negative on failure
3424  **/
3425 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
3426 {
3427         struct pci_dev *pdev = adapter->pdev;
3428         int i, err = 0;
3429
3430         for (i = 0; i < adapter->num_tx_queues; i++) {
3431                 err = igb_setup_tx_resources(adapter->tx_ring[i]);
3432                 if (err) {
3433                         dev_err(pci_dev_to_dev(pdev),
3434                                 "Allocation for Tx Queue %u failed\n", i);
3435                         for (i--; i >= 0; i--)
3436                                 igb_free_tx_resources(adapter->tx_ring[i]);
3437                         break;
3438                 }
3439         }
3440
3441         return err;
3442 }
3443
3444 /**
3445  * igb_setup_tctl - configure the transmit control registers
3446  * @adapter: Board private structure
3447  **/
3448 void igb_setup_tctl(struct igb_adapter *adapter)
3449 {
3450         struct e1000_hw *hw = &adapter->hw;
3451         u32 tctl;
3452
3453         /* disable queue 0 which is enabled by default on 82575 and 82576 */
3454         E1000_WRITE_REG(hw, E1000_TXDCTL(0), 0);
3455
3456         /* Program the Transmit Control Register */
3457         tctl = E1000_READ_REG(hw, E1000_TCTL);
3458         tctl &= ~E1000_TCTL_CT;
3459         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
3460                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
3461
3462         e1000_config_collision_dist(hw);
3463
3464         /* Enable transmits */
3465         tctl |= E1000_TCTL_EN;
3466
3467         E1000_WRITE_REG(hw, E1000_TCTL, tctl);
3468 }
3469
3470 static u32 igb_tx_wthresh(struct igb_adapter *adapter)
3471 {
3472         struct e1000_hw *hw = &adapter->hw;
3473         switch (hw->mac.type) {
3474         case e1000_i354:
3475                 return 4;
3476         case e1000_82576:
3477                 if (adapter->msix_entries)
3478                         return 1;
3479         default:
3480                 break;
3481         }
3482
3483         return 16;
3484 }
3485
3486 /**
3487  * igb_configure_tx_ring - Configure transmit ring after Reset
3488  * @adapter: board private structure
3489  * @ring: tx ring to configure
3490  *
3491  * Configure a transmit ring after a reset.
3492  **/
3493 void igb_configure_tx_ring(struct igb_adapter *adapter,
3494                            struct igb_ring *ring)
3495 {
3496         struct e1000_hw *hw = &adapter->hw;
3497         u32 txdctl = 0;
3498         u64 tdba = ring->dma;
3499         int reg_idx = ring->reg_idx;
3500
3501         /* disable the queue */
3502         E1000_WRITE_REG(hw, E1000_TXDCTL(reg_idx), 0);
3503         E1000_WRITE_FLUSH(hw);
3504         mdelay(10);
3505
3506         E1000_WRITE_REG(hw, E1000_TDLEN(reg_idx),
3507                         ring->count * sizeof(union e1000_adv_tx_desc));
3508         E1000_WRITE_REG(hw, E1000_TDBAL(reg_idx),
3509                         tdba & 0x00000000ffffffffULL);
3510         E1000_WRITE_REG(hw, E1000_TDBAH(reg_idx), tdba >> 32);
3511
3512         ring->tail = hw->hw_addr + E1000_TDT(reg_idx);
3513         E1000_WRITE_REG(hw, E1000_TDH(reg_idx), 0);
3514         writel(0, ring->tail);
3515
3516         txdctl |= IGB_TX_PTHRESH;
3517         txdctl |= IGB_TX_HTHRESH << 8;
3518         txdctl |= igb_tx_wthresh(adapter) << 16;
3519
3520         txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
3521         E1000_WRITE_REG(hw, E1000_TXDCTL(reg_idx), txdctl);
3522 }
3523
3524 /**
3525  * igb_configure_tx - Configure transmit Unit after Reset
3526  * @adapter: board private structure
3527  *
3528  * Configure the Tx unit of the MAC after a reset.
3529  **/
3530 static void igb_configure_tx(struct igb_adapter *adapter)
3531 {
3532         int i;
3533
3534         for (i = 0; i < adapter->num_tx_queues; i++)
3535                 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
3536 }
3537
3538 /**
3539  * igb_setup_rx_resources - allocate Rx resources (Descriptors)
3540  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
3541  *
3542  * Returns 0 on success, negative on failure
3543  **/
3544 int igb_setup_rx_resources(struct igb_ring *rx_ring)
3545 {
3546         struct device *dev = rx_ring->dev;
3547         int size, desc_len;
3548
3549         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3550         rx_ring->rx_buffer_info = vzalloc(size);
3551         if (!rx_ring->rx_buffer_info)
3552                 goto err;
3553
3554         desc_len = sizeof(union e1000_adv_rx_desc);
3555
3556         /* Round up to nearest 4K */
3557         rx_ring->size = rx_ring->count * desc_len;
3558         rx_ring->size = ALIGN(rx_ring->size, 4096);
3559
3560         rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
3561                                            &rx_ring->dma, GFP_KERNEL);
3562
3563         if (!rx_ring->desc)
3564                 goto err;
3565
3566         rx_ring->next_to_alloc = 0;
3567         rx_ring->next_to_clean = 0;
3568         rx_ring->next_to_use = 0;
3569
3570         return 0;
3571
3572 err:
3573         vfree(rx_ring->rx_buffer_info);
3574         rx_ring->rx_buffer_info = NULL;
3575         dev_err(dev, "Unable to allocate memory for the receive descriptor"
3576                 " ring\n");
3577         return -ENOMEM;
3578 }
3579
3580 /**
3581  * igb_setup_all_rx_resources - wrapper to allocate Rx resources
3582  *                                (Descriptors) for all queues
3583  * @adapter: board private structure
3584  *
3585  * Return 0 on success, negative on failure
3586  **/
3587 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
3588 {
3589         struct pci_dev *pdev = adapter->pdev;
3590         int i, err = 0;
3591
3592         for (i = 0; i < adapter->num_rx_queues; i++) {
3593                 err = igb_setup_rx_resources(adapter->rx_ring[i]);
3594                 if (err) {
3595                         dev_err(pci_dev_to_dev(pdev),
3596                                 "Allocation for Rx Queue %u failed\n", i);
3597                         for (i--; i >= 0; i--)
3598                                 igb_free_rx_resources(adapter->rx_ring[i]);
3599                         break;
3600                 }
3601         }
3602
3603         return err;
3604 }
3605
3606 /**
3607  * igb_setup_mrqc - configure the multiple receive queue control registers
3608  * @adapter: Board private structure
3609  **/
3610 static void igb_setup_mrqc(struct igb_adapter *adapter)
3611 {
3612         struct e1000_hw *hw = &adapter->hw;
3613         u32 mrqc, rxcsum;
3614         u32 j, num_rx_queues, shift = 0, shift2 = 0;
3615         static const u32 rsskey[10] = { 0xDA565A6D, 0xC20E5B25, 0x3D256741,
3616                                         0xB08FA343, 0xCB2BCAD0, 0xB4307BAE,
3617                                         0xA32DCB77, 0x0CF23080, 0x3BB7426A,
3618                                         0xFA01ACBE };
3619
3620         /* Fill out hash function seeds */
3621         for (j = 0; j < 10; j++)
3622                 E1000_WRITE_REG(hw, E1000_RSSRK(j), rsskey[j]);
3623
3624         num_rx_queues = adapter->rss_queues;
3625
3626         /* 82575 and 82576 supports 2 RSS queues for VMDq */
3627         switch (hw->mac.type) {
3628         case e1000_82575:
3629                 if (adapter->vmdq_pools) {
3630                         shift = 2;
3631                         shift2 = 6;
3632                         break;
3633                 }
3634                 shift = 6;
3635                 break;
3636         case e1000_82576:
3637                 /* 82576 supports 2 RSS queues for SR-IOV */
3638                 if (adapter->vfs_allocated_count || adapter->vmdq_pools) {
3639                         shift = 3;
3640                         num_rx_queues = 2;
3641                 }
3642                 break;
3643         default:
3644                 break;
3645         }
3646
3647         /*
3648          * Populate the redirection table 4 entries at a time.  To do this
3649          * we are generating the results for n and n+2 and then interleaving
3650          * those with the results with n+1 and n+3.
3651          */
3652         for (j = 0; j < 32; j++) {
3653                 /* first pass generates n and n+2 */
3654                 u32 base = ((j * 0x00040004) + 0x00020000) * num_rx_queues;
3655                 u32 reta = (base & 0x07800780) >> (7 - shift);
3656
3657                 /* second pass generates n+1 and n+3 */
3658                 base += 0x00010001 * num_rx_queues;
3659                 reta |= (base & 0x07800780) << (1 + shift);
3660
3661                 /* generate 2nd table for 82575 based parts */
3662                 if (shift2)
3663                         reta |= (0x01010101 * num_rx_queues) << shift2;
3664
3665                 E1000_WRITE_REG(hw, E1000_RETA(j), reta);
3666         }
3667
3668         /*
3669          * Disable raw packet checksumming so that RSS hash is placed in
3670          * descriptor on writeback.  No need to enable TCP/UDP/IP checksum
3671          * offloads as they are enabled by default
3672          */
3673         rxcsum = E1000_READ_REG(hw, E1000_RXCSUM);
3674         rxcsum |= E1000_RXCSUM_PCSD;
3675
3676         if (adapter->hw.mac.type >= e1000_82576)
3677                 /* Enable Receive Checksum Offload for SCTP */
3678                 rxcsum |= E1000_RXCSUM_CRCOFL;
3679
3680         /* Don't need to set TUOFL or IPOFL, they default to 1 */
3681         E1000_WRITE_REG(hw, E1000_RXCSUM, rxcsum);
3682
3683         /* Generate RSS hash based on packet types, TCP/UDP
3684          * port numbers and/or IPv4/v6 src and dst addresses
3685          */
3686         mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
3687                E1000_MRQC_RSS_FIELD_IPV4_TCP |
3688                E1000_MRQC_RSS_FIELD_IPV6 |
3689                E1000_MRQC_RSS_FIELD_IPV6_TCP |
3690                E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
3691
3692         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
3693                 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
3694         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
3695                 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
3696
3697         /* If VMDq is enabled then we set the appropriate mode for that, else
3698          * we default to RSS so that an RSS hash is calculated per packet even
3699          * if we are only using one queue */
3700         if (adapter->vfs_allocated_count || adapter->vmdq_pools) {
3701                 if (hw->mac.type > e1000_82575) {
3702                         /* Set the default pool for the PF's first queue */
3703                         u32 vtctl = E1000_READ_REG(hw, E1000_VT_CTL);
3704                         vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
3705                                    E1000_VT_CTL_DISABLE_DEF_POOL);
3706                         vtctl |= adapter->vfs_allocated_count <<
3707                                 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
3708                         E1000_WRITE_REG(hw, E1000_VT_CTL, vtctl);
3709                 } else if (adapter->rss_queues > 1) {
3710                         /* set default queue for pool 1 to queue 2 */
3711                         E1000_WRITE_REG(hw, E1000_VT_CTL,
3712                                         adapter->rss_queues << 7);
3713                 }
3714                 if (adapter->rss_queues > 1)
3715                         mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_2Q;
3716                 else
3717                         mrqc |= E1000_MRQC_ENABLE_VMDQ;
3718         } else {
3719                 mrqc |= E1000_MRQC_ENABLE_RSS_4Q;
3720         }
3721         igb_vmm_control(adapter);
3722
3723         E1000_WRITE_REG(hw, E1000_MRQC, mrqc);
3724 }
3725
3726 /**
3727  * igb_setup_rctl - configure the receive control registers
3728  * @adapter: Board private structure
3729  **/
3730 void igb_setup_rctl(struct igb_adapter *adapter)
3731 {
3732         struct e1000_hw *hw = &adapter->hw;
3733         u32 rctl;
3734
3735         rctl = E1000_READ_REG(hw, E1000_RCTL);
3736
3737         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3738         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
3739
3740         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
3741                 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3742
3743         /*
3744          * enable stripping of CRC. It's unlikely this will break BMC
3745          * redirection as it did with e1000. Newer features require
3746          * that the HW strips the CRC.
3747          */
3748         rctl |= E1000_RCTL_SECRC;
3749
3750         /* disable store bad packets and clear size bits. */
3751         rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
3752
3753         /* enable LPE to prevent packets larger than max_frame_size */
3754         rctl |= E1000_RCTL_LPE;
3755
3756         /* disable queue 0 to prevent tail write w/o re-config */
3757         E1000_WRITE_REG(hw, E1000_RXDCTL(0), 0);
3758
3759         /* Attention!!!  For SR-IOV PF driver operations you must enable
3760          * queue drop for all VF and PF queues to prevent head of line blocking
3761          * if an un-trusted VF does not provide descriptors to hardware.
3762          */
3763         if (adapter->vfs_allocated_count) {
3764                 /* set all queue drop enable bits */
3765                 E1000_WRITE_REG(hw, E1000_QDE, ALL_QUEUES);
3766         }
3767
3768         E1000_WRITE_REG(hw, E1000_RCTL, rctl);
3769 }
3770
3771 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
3772                                    int vfn)
3773 {
3774         struct e1000_hw *hw = &adapter->hw;
3775         u32 vmolr;
3776
3777         /* if it isn't the PF check to see if VFs are enabled and
3778          * increase the size to support vlan tags */
3779         if (vfn < adapter->vfs_allocated_count &&
3780             adapter->vf_data[vfn].vlans_enabled)
3781                 size += VLAN_HLEN;
3782
3783 #ifdef CONFIG_IGB_VMDQ_NETDEV
3784         if (vfn >= adapter->vfs_allocated_count) {
3785                 int queue = vfn - adapter->vfs_allocated_count;
3786                 struct igb_vmdq_adapter *vadapter;
3787
3788                 vadapter = netdev_priv(adapter->vmdq_netdev[queue-1]);
3789                 if (vadapter->vlgrp)
3790                         size += VLAN_HLEN;
3791         }
3792 #endif
3793         vmolr = E1000_READ_REG(hw, E1000_VMOLR(vfn));
3794         vmolr &= ~E1000_VMOLR_RLPML_MASK;
3795         vmolr |= size | E1000_VMOLR_LPE;
3796         E1000_WRITE_REG(hw, E1000_VMOLR(vfn), vmolr);
3797
3798         return 0;
3799 }
3800
3801 /**
3802  * igb_rlpml_set - set maximum receive packet size
3803  * @adapter: board private structure
3804  *
3805  * Configure maximum receivable packet size.
3806  **/
3807 static void igb_rlpml_set(struct igb_adapter *adapter)
3808 {
3809         u32 max_frame_size = adapter->max_frame_size;
3810         struct e1000_hw *hw = &adapter->hw;
3811         u16 pf_id = adapter->vfs_allocated_count;
3812
3813         if (adapter->vmdq_pools && hw->mac.type != e1000_82575) {
3814                 int i;
3815                 for (i = 0; i < adapter->vmdq_pools; i++)
3816                         igb_set_vf_rlpml(adapter, max_frame_size, pf_id + i);
3817                 /*
3818                  * If we're in VMDQ or SR-IOV mode, then set global RLPML
3819                  * to our max jumbo frame size, in case we need to enable
3820                  * jumbo frames on one of the rings later.
3821                  * This will not pass over-length frames into the default
3822                  * queue because it's gated by the VMOLR.RLPML.
3823                  */
3824                 max_frame_size = MAX_JUMBO_FRAME_SIZE;
3825         }
3826         /* Set VF RLPML for the PF device. */
3827         if (adapter->vfs_allocated_count)
3828                 igb_set_vf_rlpml(adapter, max_frame_size, pf_id);
3829
3830         E1000_WRITE_REG(hw, E1000_RLPML, max_frame_size);
3831 }
3832
3833 static inline void igb_set_vf_vlan_strip(struct igb_adapter *adapter,
3834                                         int vfn, bool enable)
3835 {
3836         struct e1000_hw *hw = &adapter->hw;
3837         u32 val;
3838         void __iomem *reg;
3839
3840         if (hw->mac.type < e1000_82576)
3841                 return;
3842
3843         if (hw->mac.type == e1000_i350)
3844                 reg = hw->hw_addr + E1000_DVMOLR(vfn);
3845         else
3846                 reg = hw->hw_addr + E1000_VMOLR(vfn);
3847
3848         val = readl(reg);
3849         if (enable)
3850                 val |= E1000_VMOLR_STRVLAN;
3851         else
3852                 val &= ~(E1000_VMOLR_STRVLAN);
3853         writel(val, reg);
3854 }
3855 static inline void igb_set_vmolr(struct igb_adapter *adapter,
3856                                  int vfn, bool aupe)
3857 {
3858         struct e1000_hw *hw = &adapter->hw;
3859         u32 vmolr;
3860
3861         /*
3862          * This register exists only on 82576 and newer so if we are older then
3863          * we should exit and do nothing
3864          */
3865         if (hw->mac.type < e1000_82576)
3866                 return;
3867
3868         vmolr = E1000_READ_REG(hw, E1000_VMOLR(vfn));
3869
3870         if (aupe)
3871                 vmolr |= E1000_VMOLR_AUPE;        /* Accept untagged packets */
3872         else
3873                 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
3874
3875         /* clear all bits that might not be set */
3876         vmolr &= ~E1000_VMOLR_RSSE;
3877
3878         if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
3879                 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
3880
3881         vmolr |= E1000_VMOLR_BAM;          /* Accept broadcast */
3882         vmolr |= E1000_VMOLR_LPE;          /* Accept long packets */
3883
3884         E1000_WRITE_REG(hw, E1000_VMOLR(vfn), vmolr);
3885 }
3886
3887 /**
3888  * igb_configure_rx_ring - Configure a receive ring after Reset
3889  * @adapter: board private structure
3890  * @ring: receive ring to be configured
3891  *
3892  * Configure the Rx unit of the MAC after a reset.
3893  **/
3894 void igb_configure_rx_ring(struct igb_adapter *adapter,
3895                            struct igb_ring *ring)
3896 {
3897         struct e1000_hw *hw = &adapter->hw;
3898         u64 rdba = ring->dma;
3899         int reg_idx = ring->reg_idx;
3900         u32 srrctl = 0, rxdctl = 0;
3901
3902 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
3903         /*
3904          * RLPML prevents us from receiving a frame larger than max_frame so
3905          * it is safe to just set the rx_buffer_len to max_frame without the
3906          * risk of an skb over panic.
3907          */
3908         ring->rx_buffer_len = max_t(u32, adapter->max_frame_size,
3909                                     MAXIMUM_ETHERNET_VLAN_SIZE);
3910
3911 #endif
3912         /* disable the queue */
3913         E1000_WRITE_REG(hw, E1000_RXDCTL(reg_idx), 0);
3914
3915         /* Set DMA base address registers */
3916         E1000_WRITE_REG(hw, E1000_RDBAL(reg_idx),
3917                         rdba & 0x00000000ffffffffULL);
3918         E1000_WRITE_REG(hw, E1000_RDBAH(reg_idx), rdba >> 32);
3919         E1000_WRITE_REG(hw, E1000_RDLEN(reg_idx),
3920                        ring->count * sizeof(union e1000_adv_rx_desc));
3921
3922         /* initialize head and tail */
3923         ring->tail = hw->hw_addr + E1000_RDT(reg_idx);
3924         E1000_WRITE_REG(hw, E1000_RDH(reg_idx), 0);
3925         writel(0, ring->tail);
3926
3927         /* reset next-to- use/clean to place SW in sync with hardwdare */
3928         ring->next_to_clean = 0;
3929         ring->next_to_use = 0;
3930 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
3931         ring->next_to_alloc = 0;
3932
3933 #endif
3934         /* set descriptor configuration */
3935 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
3936         srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
3937         srrctl |= IGB_RX_BUFSZ >> E1000_SRRCTL_BSIZEPKT_SHIFT;
3938 #else /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
3939         srrctl = ALIGN(ring->rx_buffer_len, 1024) >>
3940                  E1000_SRRCTL_BSIZEPKT_SHIFT;
3941 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
3942         srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
3943 #ifdef HAVE_PTP_1588_CLOCK
3944         if (hw->mac.type >= e1000_82580)
3945                 srrctl |= E1000_SRRCTL_TIMESTAMP;
3946 #endif /* HAVE_PTP_1588_CLOCK */
3947         /*
3948          * We should set the drop enable bit if:
3949          *  SR-IOV is enabled
3950          *   or
3951          *  Flow Control is disabled and number of RX queues > 1
3952          *
3953          *  This allows us to avoid head of line blocking for security
3954          *  and performance reasons.
3955          */
3956         if (adapter->vfs_allocated_count ||
3957             (adapter->num_rx_queues > 1 &&
3958              (hw->fc.requested_mode == e1000_fc_none ||
3959               hw->fc.requested_mode == e1000_fc_rx_pause)))
3960                 srrctl |= E1000_SRRCTL_DROP_EN;
3961
3962         E1000_WRITE_REG(hw, E1000_SRRCTL(reg_idx), srrctl);
3963
3964         /* set filtering for VMDQ pools */
3965         igb_set_vmolr(adapter, reg_idx & 0x7, true);
3966
3967         rxdctl |= IGB_RX_PTHRESH;
3968         rxdctl |= IGB_RX_HTHRESH << 8;
3969         rxdctl |= IGB_RX_WTHRESH << 16;
3970
3971         /* enable receive descriptor fetching */
3972         rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
3973         E1000_WRITE_REG(hw, E1000_RXDCTL(reg_idx), rxdctl);
3974 }
3975
3976 /**
3977  * igb_configure_rx - Configure receive Unit after Reset
3978  * @adapter: board private structure
3979  *
3980  * Configure the Rx unit of the MAC after a reset.
3981  **/
3982 static void igb_configure_rx(struct igb_adapter *adapter)
3983 {
3984         int i;
3985
3986         /* set UTA to appropriate mode */
3987         igb_set_uta(adapter);
3988
3989         igb_full_sync_mac_table(adapter);
3990         /* Setup the HW Rx Head and Tail Descriptor Pointers and
3991          * the Base and Length of the Rx Descriptor Ring */
3992         for (i = 0; i < adapter->num_rx_queues; i++)
3993                 igb_configure_rx_ring(adapter, adapter->rx_ring[i]);
3994 }
3995
3996 /**
3997  * igb_free_tx_resources - Free Tx Resources per Queue
3998  * @tx_ring: Tx descriptor ring for a specific queue
3999  *
4000  * Free all transmit software resources
4001  **/
4002 void igb_free_tx_resources(struct igb_ring *tx_ring)
4003 {
4004         igb_clean_tx_ring(tx_ring);
4005
4006         vfree(tx_ring->tx_buffer_info);
4007         tx_ring->tx_buffer_info = NULL;
4008
4009         /* if not set, then don't free */
4010         if (!tx_ring->desc)
4011                 return;
4012
4013         dma_free_coherent(tx_ring->dev, tx_ring->size,
4014                           tx_ring->desc, tx_ring->dma);
4015
4016         tx_ring->desc = NULL;
4017 }
4018
4019 /**
4020  * igb_free_all_tx_resources - Free Tx Resources for All Queues
4021  * @adapter: board private structure
4022  *
4023  * Free all transmit software resources
4024  **/
4025 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
4026 {
4027         int i;
4028
4029         for (i = 0; i < adapter->num_tx_queues; i++)
4030                 igb_free_tx_resources(adapter->tx_ring[i]);
4031 }
4032
4033 void igb_unmap_and_free_tx_resource(struct igb_ring *ring,
4034                                     struct igb_tx_buffer *tx_buffer)
4035 {
4036         if (tx_buffer->skb) {
4037                 dev_kfree_skb_any(tx_buffer->skb);
4038                 if (dma_unmap_len(tx_buffer, len))
4039                         dma_unmap_single(ring->dev,
4040                                          dma_unmap_addr(tx_buffer, dma),
4041                                          dma_unmap_len(tx_buffer, len),
4042                                          DMA_TO_DEVICE);
4043         } else if (dma_unmap_len(tx_buffer, len)) {
4044                 dma_unmap_page(ring->dev,
4045                                dma_unmap_addr(tx_buffer, dma),
4046                                dma_unmap_len(tx_buffer, len),
4047                                DMA_TO_DEVICE);
4048         }
4049         tx_buffer->next_to_watch = NULL;
4050         tx_buffer->skb = NULL;
4051         dma_unmap_len_set(tx_buffer, len, 0);
4052         /* buffer_info must be completely set up in the transmit path */
4053 }
4054
4055 /**
4056  * igb_clean_tx_ring - Free Tx Buffers
4057  * @tx_ring: ring to be cleaned
4058  **/
4059 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
4060 {
4061         struct igb_tx_buffer *buffer_info;
4062         unsigned long size;
4063         u16 i;
4064
4065         if (!tx_ring->tx_buffer_info)
4066                 return;
4067         /* Free all the Tx ring sk_buffs */
4068
4069         for (i = 0; i < tx_ring->count; i++) {
4070                 buffer_info = &tx_ring->tx_buffer_info[i];
4071                 igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
4072         }
4073
4074         netdev_tx_reset_queue(txring_txq(tx_ring));
4075
4076         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
4077         memset(tx_ring->tx_buffer_info, 0, size);
4078
4079         /* Zero out the descriptor ring */
4080         memset(tx_ring->desc, 0, tx_ring->size);
4081
4082         tx_ring->next_to_use = 0;
4083         tx_ring->next_to_clean = 0;
4084 }
4085
4086 /**
4087  * igb_clean_all_tx_rings - Free Tx Buffers for all queues
4088  * @adapter: board private structure
4089  **/
4090 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
4091 {
4092         int i;
4093
4094         for (i = 0; i < adapter->num_tx_queues; i++)
4095                 igb_clean_tx_ring(adapter->tx_ring[i]);
4096 }
4097
4098 /**
4099  * igb_free_rx_resources - Free Rx Resources
4100  * @rx_ring: ring to clean the resources from
4101  *
4102  * Free all receive software resources
4103  **/
4104 void igb_free_rx_resources(struct igb_ring *rx_ring)
4105 {
4106         igb_clean_rx_ring(rx_ring);
4107
4108         vfree(rx_ring->rx_buffer_info);
4109         rx_ring->rx_buffer_info = NULL;
4110
4111         /* if not set, then don't free */
4112         if (!rx_ring->desc)
4113                 return;
4114
4115         dma_free_coherent(rx_ring->dev, rx_ring->size,
4116                           rx_ring->desc, rx_ring->dma);
4117
4118         rx_ring->desc = NULL;
4119 }
4120
4121 /**
4122  * igb_free_all_rx_resources - Free Rx Resources for All Queues
4123  * @adapter: board private structure
4124  *
4125  * Free all receive software resources
4126  **/
4127 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
4128 {
4129         int i;
4130
4131         for (i = 0; i < adapter->num_rx_queues; i++)
4132                 igb_free_rx_resources(adapter->rx_ring[i]);
4133 }
4134
4135 /**
4136  * igb_clean_rx_ring - Free Rx Buffers per Queue
4137  * @rx_ring: ring to free buffers from
4138  **/
4139 void igb_clean_rx_ring(struct igb_ring *rx_ring)
4140 {
4141         unsigned long size;
4142         u16 i;
4143
4144         if (!rx_ring->rx_buffer_info)
4145                 return;
4146
4147 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
4148         if (rx_ring->skb)
4149                 dev_kfree_skb(rx_ring->skb);
4150         rx_ring->skb = NULL;
4151
4152 #endif
4153         /* Free all the Rx ring sk_buffs */
4154         for (i = 0; i < rx_ring->count; i++) {
4155                 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
4156 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
4157                 if (buffer_info->dma) {
4158                         dma_unmap_single(rx_ring->dev,
4159                                          buffer_info->dma,
4160                                          rx_ring->rx_buffer_len,
4161                                          DMA_FROM_DEVICE);
4162                         buffer_info->dma = 0;
4163                 }
4164
4165                 if (buffer_info->skb) {
4166                         dev_kfree_skb(buffer_info->skb);
4167                         buffer_info->skb = NULL;
4168                 }
4169 #else
4170                 if (!buffer_info->page)
4171                         continue;
4172
4173                 dma_unmap_page(rx_ring->dev,
4174                                buffer_info->dma,
4175                                PAGE_SIZE,
4176                                DMA_FROM_DEVICE);
4177                 __free_page(buffer_info->page);
4178
4179                 buffer_info->page = NULL;
4180 #endif
4181         }
4182
4183         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
4184         memset(rx_ring->rx_buffer_info, 0, size);
4185
4186         /* Zero out the descriptor ring */
4187         memset(rx_ring->desc, 0, rx_ring->size);
4188
4189         rx_ring->next_to_alloc = 0;
4190         rx_ring->next_to_clean = 0;
4191         rx_ring->next_to_use = 0;
4192 }
4193
4194 /**
4195  * igb_clean_all_rx_rings - Free Rx Buffers for all queues
4196  * @adapter: board private structure
4197  **/
4198 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
4199 {
4200         int i;
4201
4202         for (i = 0; i < adapter->num_rx_queues; i++)
4203                 igb_clean_rx_ring(adapter->rx_ring[i]);
4204 }
4205
4206 /**
4207  * igb_set_mac - Change the Ethernet Address of the NIC
4208  * @netdev: network interface device structure
4209  * @p: pointer to an address structure
4210  *
4211  * Returns 0 on success, negative on failure
4212  **/
4213 static int igb_set_mac(struct net_device *netdev, void *p)
4214 {
4215         struct igb_adapter *adapter = netdev_priv(netdev);
4216         struct e1000_hw *hw = &adapter->hw;
4217         struct sockaddr *addr = p;
4218
4219         if (!is_valid_ether_addr(addr->sa_data))
4220                 return -EADDRNOTAVAIL;
4221
4222         igb_del_mac_filter(adapter, hw->mac.addr,
4223                            adapter->vfs_allocated_count);
4224         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4225         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
4226
4227         /* set the correct pool for the new PF MAC address in entry 0 */
4228         return igb_add_mac_filter(adapter, hw->mac.addr,
4229                            adapter->vfs_allocated_count);
4230 }
4231
4232 /**
4233  * igb_write_mc_addr_list - write multicast addresses to MTA
4234  * @netdev: network interface device structure
4235  *
4236  * Writes multicast address list to the MTA hash table.
4237  * Returns: -ENOMEM on failure
4238  *                0 on no addresses written
4239  *                X on writing X addresses to MTA
4240  **/
4241 int igb_write_mc_addr_list(struct net_device *netdev)
4242 {
4243         struct igb_adapter *adapter = netdev_priv(netdev);
4244         struct e1000_hw *hw = &adapter->hw;
4245 #ifdef NETDEV_HW_ADDR_T_MULTICAST
4246         struct netdev_hw_addr *ha;
4247 #else
4248         struct dev_mc_list *ha;
4249 #endif
4250         u8  *mta_list;
4251         int i, count;
4252 #ifdef CONFIG_IGB_VMDQ_NETDEV
4253         int vm;
4254 #endif
4255         count = netdev_mc_count(netdev);
4256 #ifdef CONFIG_IGB_VMDQ_NETDEV
4257         for (vm = 1; vm < adapter->vmdq_pools; vm++) {
4258                 if (!adapter->vmdq_netdev[vm])
4259                         break;
4260                 if (!netif_running(adapter->vmdq_netdev[vm]))
4261                         continue;
4262                 count += netdev_mc_count(adapter->vmdq_netdev[vm]);
4263         }
4264 #endif
4265
4266         if (!count) {
4267                 e1000_update_mc_addr_list(hw, NULL, 0);
4268                 return 0;
4269         }
4270         mta_list = kzalloc(count * 6, GFP_ATOMIC);
4271         if (!mta_list)
4272                 return -ENOMEM;
4273
4274         /* The shared function expects a packed array of only addresses. */
4275         i = 0;
4276         netdev_for_each_mc_addr(ha, netdev)
4277 #ifdef NETDEV_HW_ADDR_T_MULTICAST
4278                 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
4279 #else
4280                 memcpy(mta_list + (i++ * ETH_ALEN), ha->dmi_addr, ETH_ALEN);
4281 #endif
4282 #ifdef CONFIG_IGB_VMDQ_NETDEV
4283         for (vm = 1; vm < adapter->vmdq_pools; vm++) {
4284                 if (!adapter->vmdq_netdev[vm])
4285                         break;
4286                 if (!netif_running(adapter->vmdq_netdev[vm]) ||
4287                     !netdev_mc_count(adapter->vmdq_netdev[vm]))
4288                         continue;
4289                 netdev_for_each_mc_addr(ha, adapter->vmdq_netdev[vm])
4290 #ifdef NETDEV_HW_ADDR_T_MULTICAST
4291                         memcpy(mta_list + (i++ * ETH_ALEN),
4292                                ha->addr, ETH_ALEN);
4293 #else
4294                         memcpy(mta_list + (i++ * ETH_ALEN),
4295                                ha->dmi_addr, ETH_ALEN);
4296 #endif
4297         }
4298 #endif
4299         e1000_update_mc_addr_list(hw, mta_list, i);
4300         kfree(mta_list);
4301
4302         return count;
4303 }
4304
4305 void igb_rar_set(struct igb_adapter *adapter, u32 index)
4306 {
4307         u32 rar_low, rar_high;
4308         struct e1000_hw *hw = &adapter->hw;
4309         u8 *addr = adapter->mac_table[index].addr;
4310         /* HW expects these in little endian so we reverse the byte order
4311          * from network order (big endian) to little endian
4312          */
4313         rar_low = ((u32) addr[0] | ((u32) addr[1] << 8) |
4314                   ((u32) addr[2] << 16) | ((u32) addr[3] << 24));
4315         rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));
4316
4317         /* Indicate to hardware the Address is Valid. */
4318         if (adapter->mac_table[index].state & IGB_MAC_STATE_IN_USE)
4319                 rar_high |= E1000_RAH_AV;
4320
4321         if (hw->mac.type == e1000_82575)
4322                 rar_high |= E1000_RAH_POOL_1 * adapter->mac_table[index].queue;
4323         else
4324                 rar_high |= E1000_RAH_POOL_1 << adapter->mac_table[index].queue;
4325
4326         E1000_WRITE_REG(hw, E1000_RAL(index), rar_low);
4327         E1000_WRITE_FLUSH(hw);
4328         E1000_WRITE_REG(hw, E1000_RAH(index), rar_high);
4329         E1000_WRITE_FLUSH(hw);
4330 }
4331
4332 void igb_full_sync_mac_table(struct igb_adapter *adapter)
4333 {
4334         struct e1000_hw *hw = &adapter->hw;
4335         int i;
4336         for (i = 0; i < hw->mac.rar_entry_count; i++) {
4337                         igb_rar_set(adapter, i);
4338         }
4339 }
4340
4341 void igb_sync_mac_table(struct igb_adapter *adapter)
4342 {
4343         struct e1000_hw *hw = &adapter->hw;
4344         int i;
4345         for (i = 0; i < hw->mac.rar_entry_count; i++) {
4346                 if (adapter->mac_table[i].state & IGB_MAC_STATE_MODIFIED)
4347                         igb_rar_set(adapter, i);
4348                 adapter->mac_table[i].state &= ~(IGB_MAC_STATE_MODIFIED);
4349         }
4350 }
4351
4352 int igb_available_rars(struct igb_adapter *adapter)
4353 {
4354         struct e1000_hw *hw = &adapter->hw;
4355         int i, count = 0;
4356
4357         for (i = 0; i < hw->mac.rar_entry_count; i++) {
4358                 if (adapter->mac_table[i].state == 0)
4359                         count++;
4360         }
4361         return count;
4362 }
4363
4364 #ifdef HAVE_SET_RX_MODE
4365 /**
4366  * igb_write_uc_addr_list - write unicast addresses to RAR table
4367  * @netdev: network interface device structure
4368  *
4369  * Writes unicast address list to the RAR table.
4370  * Returns: -ENOMEM on failure/insufficient address space
4371  *                0 on no addresses written
4372  *                X on writing X addresses to the RAR table
4373  **/
4374 static int igb_write_uc_addr_list(struct net_device *netdev)
4375 {
4376         struct igb_adapter *adapter = netdev_priv(netdev);
4377         unsigned int vfn = adapter->vfs_allocated_count;
4378         int count = 0;
4379
4380         /* return ENOMEM indicating insufficient memory for addresses */
4381         if (netdev_uc_count(netdev) > igb_available_rars(adapter))
4382                 return -ENOMEM;
4383         if (!netdev_uc_empty(netdev)) {
4384 #ifdef NETDEV_HW_ADDR_T_UNICAST
4385                 struct netdev_hw_addr *ha;
4386 #else
4387                 struct dev_mc_list *ha;
4388 #endif
4389                 netdev_for_each_uc_addr(ha, netdev) {
4390 #ifdef NETDEV_HW_ADDR_T_UNICAST
4391                         igb_del_mac_filter(adapter, ha->addr, vfn);
4392                         igb_add_mac_filter(adapter, ha->addr, vfn);
4393 #else
4394                         igb_del_mac_filter(adapter, ha->da_addr, vfn);
4395                         igb_add_mac_filter(adapter, ha->da_addr, vfn);
4396 #endif
4397                         count++;
4398                 }
4399         }
4400         return count;
4401 }
4402
4403 #endif /* HAVE_SET_RX_MODE */
4404 /**
4405  * igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
4406  * @netdev: network interface device structure
4407  *
4408  * The set_rx_mode entry point is called whenever the unicast or multicast
4409  * address lists or the network interface flags are updated.  This routine is
4410  * responsible for configuring the hardware for proper unicast, multicast,
4411  * promiscuous mode, and all-multi behavior.
4412  **/
4413 static void igb_set_rx_mode(struct net_device *netdev)
4414 {
4415         struct igb_adapter *adapter = netdev_priv(netdev);
4416         struct e1000_hw *hw = &adapter->hw;
4417         unsigned int vfn = adapter->vfs_allocated_count;
4418         u32 rctl, vmolr = 0;
4419         int count;
4420
4421         /* Check for Promiscuous and All Multicast modes */
4422         rctl = E1000_READ_REG(hw, E1000_RCTL);
4423
4424         /* clear the effected bits */
4425         rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_VFE);
4426
4427         if (netdev->flags & IFF_PROMISC) {
4428                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
4429                 vmolr |= (E1000_VMOLR_ROPE | E1000_VMOLR_MPME);
4430                 /* retain VLAN HW filtering if in VT mode */
4431                 if (adapter->vfs_allocated_count || adapter->vmdq_pools)
4432                         rctl |= E1000_RCTL_VFE;
4433         } else {
4434                 if (netdev->flags & IFF_ALLMULTI) {
4435                         rctl |= E1000_RCTL_MPE;
4436                         vmolr |= E1000_VMOLR_MPME;
4437                 } else {
4438                         /*
4439                          * Write addresses to the MTA, if the attempt fails
4440                          * then we should just turn on promiscuous mode so
4441                          * that we can at least receive multicast traffic
4442                          */
4443                         count = igb_write_mc_addr_list(netdev);
4444                         if (count < 0) {
4445                                 rctl |= E1000_RCTL_MPE;
4446                                 vmolr |= E1000_VMOLR_MPME;
4447                         } else if (count) {
4448                                 vmolr |= E1000_VMOLR_ROMPE;
4449                         }
4450                 }
4451 #ifdef HAVE_SET_RX_MODE
4452                 /*
4453                  * Write addresses to available RAR registers, if there is not
4454                  * sufficient space to store all the addresses then enable
4455                  * unicast promiscuous mode
4456                  */
4457                 count = igb_write_uc_addr_list(netdev);
4458                 if (count < 0) {
4459                         rctl |= E1000_RCTL_UPE;
4460                         vmolr |= E1000_VMOLR_ROPE;
4461                 }
4462 #endif /* HAVE_SET_RX_MODE */
4463                 rctl |= E1000_RCTL_VFE;
4464         }
4465         E1000_WRITE_REG(hw, E1000_RCTL, rctl);
4466
4467         /*
4468          * In order to support SR-IOV and eventually VMDq it is necessary to set
4469          * the VMOLR to enable the appropriate modes.  Without this workaround
4470          * we will have issues with VLAN tag stripping not being done for frames
4471          * that are only arriving because we are the default pool
4472          */
4473         if (hw->mac.type < e1000_82576)
4474                 return;
4475
4476         vmolr |= E1000_READ_REG(hw, E1000_VMOLR(vfn)) &
4477                  ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
4478         E1000_WRITE_REG(hw, E1000_VMOLR(vfn), vmolr);
4479         igb_restore_vf_multicasts(adapter);
4480 }
4481
4482 static void igb_check_wvbr(struct igb_adapter *adapter)
4483 {
4484         struct e1000_hw *hw = &adapter->hw;
4485         u32 wvbr = 0;
4486
4487         switch (hw->mac.type) {
4488         case e1000_82576:
4489         case e1000_i350:
4490                 if (!(wvbr = E1000_READ_REG(hw, E1000_WVBR)))
4491                         return;
4492                 break;
4493         default:
4494                 break;
4495         }
4496
4497         adapter->wvbr |= wvbr;
4498 }
4499
4500 #define IGB_STAGGERED_QUEUE_OFFSET 8
4501
4502 static void igb_spoof_check(struct igb_adapter *adapter)
4503 {
4504         int j;
4505
4506         if (!adapter->wvbr)
4507                 return;
4508
4509         switch (adapter->hw.mac.type) {
4510         case e1000_82576:
4511                 for (j = 0; j < adapter->vfs_allocated_count; j++) {
4512                         if (adapter->wvbr & (1 << j) ||
4513                             adapter->wvbr & (1 << (j + IGB_STAGGERED_QUEUE_OFFSET))) {
4514                                 DPRINTK(DRV, WARNING,
4515                                         "Spoof event(s) detected on VF %d\n", j);
4516                                 adapter->wvbr &=
4517                                         ~((1 << j) |
4518                                           (1 << (j + IGB_STAGGERED_QUEUE_OFFSET)));
4519                         }
4520                 }
4521                 break;
4522         case e1000_i350:
4523                 for (j = 0; j < adapter->vfs_allocated_count; j++) {
4524                         if (adapter->wvbr & (1 << j)) {
4525                                 DPRINTK(DRV, WARNING,
4526                                         "Spoof event(s) detected on VF %d\n", j);
4527                                 adapter->wvbr &= ~(1 << j);
4528                         }
4529                 }
4530                 break;
4531         default:
4532                 break;
4533         }
4534 }
4535
4536 /* Need to wait a few seconds after link up to get diagnostic information from
4537  * the phy */
4538 static void igb_update_phy_info(unsigned long data)
4539 {
4540         struct igb_adapter *adapter = (struct igb_adapter *) data;
4541         e1000_get_phy_info(&adapter->hw);
4542 }
4543
4544 /**
4545  * igb_has_link - check shared code for link and determine up/down
4546  * @adapter: pointer to driver private info
4547  **/
4548 bool igb_has_link(struct igb_adapter *adapter)
4549 {
4550         struct e1000_hw *hw = &adapter->hw;
4551         bool link_active = FALSE;
4552
4553         /* get_link_status is set on LSC (link status) interrupt or
4554          * rx sequence error interrupt.  get_link_status will stay
4555          * false until the e1000_check_for_link establishes link
4556          * for copper adapters ONLY
4557          */
4558         switch (hw->phy.media_type) {
4559         case e1000_media_type_copper:
4560                 if (!hw->mac.get_link_status)
4561                         return true;
4562         case e1000_media_type_internal_serdes:
4563                 e1000_check_for_link(hw);
4564                 link_active = !hw->mac.get_link_status;
4565                 break;
4566         case e1000_media_type_unknown:
4567         default:
4568                 break;
4569         }
4570
4571         if (((hw->mac.type == e1000_i210) ||
4572              (hw->mac.type == e1000_i211)) &&
4573              (hw->phy.id == I210_I_PHY_ID)) {
4574                 if (!netif_carrier_ok(adapter->netdev)) {
4575                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4576                 } else if (!(adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)) {
4577                         adapter->flags |= IGB_FLAG_NEED_LINK_UPDATE;
4578                         adapter->link_check_timeout = jiffies;
4579                 }
4580         }
4581
4582         return link_active;
4583 }
4584
4585 /**
4586  * igb_watchdog - Timer Call-back
4587  * @data: pointer to adapter cast into an unsigned long
4588  **/
4589 static void igb_watchdog(unsigned long data)
4590 {
4591         struct igb_adapter *adapter = (struct igb_adapter *)data;
4592         /* Do the rest outside of interrupt context */
4593         schedule_work(&adapter->watchdog_task);
4594 }
4595
4596 static void igb_watchdog_task(struct work_struct *work)
4597 {
4598         struct igb_adapter *adapter = container_of(work,
4599                                                    struct igb_adapter,
4600                                                    watchdog_task);
4601         struct e1000_hw *hw = &adapter->hw;
4602         struct net_device *netdev = adapter->netdev;
4603         u32 link;
4604         int i;
4605         u32 thstat, ctrl_ext;
4606         u32 connsw;
4607
4608         link = igb_has_link(adapter);
4609         /* Force link down if we have fiber to swap to */
4610         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4611                 if (hw->phy.media_type == e1000_media_type_copper) {
4612                         connsw = E1000_READ_REG(hw, E1000_CONNSW);
4613                         if (!(connsw & E1000_CONNSW_AUTOSENSE_EN))
4614                                 link = 0;
4615                 }
4616         }
4617
4618         if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE) {
4619                 if (time_after(jiffies, (adapter->link_check_timeout + HZ)))
4620                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4621                 else
4622                         link = FALSE;
4623         }
4624
4625         if (link) {
4626                 /* Perform a reset if the media type changed. */
4627                 if (hw->dev_spec._82575.media_changed) {
4628                         hw->dev_spec._82575.media_changed = false;
4629                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
4630                         igb_reset(adapter);
4631                 }
4632
4633                 /* Cancel scheduled suspend requests. */
4634                 pm_runtime_resume(netdev->dev.parent);
4635
4636                 if (!netif_carrier_ok(netdev)) {
4637                         u32 ctrl;
4638                         e1000_get_speed_and_duplex(hw,
4639                                                    &adapter->link_speed,
4640                                                    &adapter->link_duplex);
4641
4642                         ctrl = E1000_READ_REG(hw, E1000_CTRL);
4643                         /* Links status message must follow this format */
4644                         printk(KERN_INFO "igb: %s NIC Link is Up %d Mbps %s, "
4645                                  "Flow Control: %s\n",
4646                                netdev->name,
4647                                adapter->link_speed,
4648                                adapter->link_duplex == FULL_DUPLEX ?
4649                                  "Full Duplex" : "Half Duplex",
4650                                ((ctrl & E1000_CTRL_TFCE) &&
4651                                 (ctrl & E1000_CTRL_RFCE)) ? "RX/TX":
4652                                ((ctrl & E1000_CTRL_RFCE) ?  "RX" :
4653                                ((ctrl & E1000_CTRL_TFCE) ?  "TX" : "None")));
4654                         /* adjust timeout factor according to speed/duplex */
4655                         adapter->tx_timeout_factor = 1;
4656                         switch (adapter->link_speed) {
4657                         case SPEED_10:
4658                                 adapter->tx_timeout_factor = 14;
4659                                 break;
4660                         case SPEED_100:
4661                                 /* maybe add some timeout factor ? */
4662                                 break;
4663                         default:
4664                                 break;
4665                         }
4666
4667                         netif_carrier_on(netdev);
4668                         netif_tx_wake_all_queues(netdev);
4669
4670                         igb_ping_all_vfs(adapter);
4671 #ifdef IFLA_VF_MAX
4672                         igb_check_vf_rate_limit(adapter);
4673 #endif /* IFLA_VF_MAX */
4674
4675                         /* link state has changed, schedule phy info update */
4676                         if (!test_bit(__IGB_DOWN, &adapter->state))
4677                                 mod_timer(&adapter->phy_info_timer,
4678                                           round_jiffies(jiffies + 2 * HZ));
4679                 }
4680         } else {
4681                 if (netif_carrier_ok(netdev)) {
4682                         adapter->link_speed = 0;
4683                         adapter->link_duplex = 0;
4684                         /* check for thermal sensor event on i350 */
4685                         if (hw->mac.type == e1000_i350) {
4686                                 thstat = E1000_READ_REG(hw, E1000_THSTAT);
4687                                 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
4688                                 if ((hw->phy.media_type ==
4689                                         e1000_media_type_copper) &&
4690                                         !(ctrl_ext &
4691                                         E1000_CTRL_EXT_LINK_MODE_SGMII)) {
4692                                         if (thstat & E1000_THSTAT_PWR_DOWN) {
4693                                                 printk(KERN_ERR "igb: %s The "
4694                                                 "network adapter was stopped "
4695                                                 "because it overheated.\n",
4696                                                 netdev->name);
4697                                         }
4698                                         if (thstat & E1000_THSTAT_LINK_THROTTLE) {
4699                                                 printk(KERN_INFO
4700                                                         "igb: %s The network "
4701                                                         "adapter supported "
4702                                                         "link speed "
4703                                                         "was downshifted "
4704                                                         "because it "
4705                                                         "overheated.\n",
4706                                                         netdev->name);
4707                                         }
4708                                 }
4709                         }
4710
4711                         /* Links status message must follow this format */
4712                         printk(KERN_INFO "igb: %s NIC Link is Down\n",
4713                                netdev->name);
4714                         netif_carrier_off(netdev);
4715                         netif_tx_stop_all_queues(netdev);
4716
4717                         igb_ping_all_vfs(adapter);
4718
4719                         /* link state has changed, schedule phy info update */
4720                         if (!test_bit(__IGB_DOWN, &adapter->state))
4721                                 mod_timer(&adapter->phy_info_timer,
4722                                           round_jiffies(jiffies + 2 * HZ));
4723                         /* link is down, time to check for alternate media */
4724                         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4725                                 igb_check_swap_media(adapter);
4726                                 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4727                                         schedule_work(&adapter->reset_task);
4728                                         /* return immediately */
4729                                         return;
4730                                 }
4731                         }
4732                         pm_schedule_suspend(netdev->dev.parent,
4733                                             MSEC_PER_SEC * 5);
4734
4735                 /* also check for alternate media here */
4736                 } else if (!netif_carrier_ok(netdev) &&
4737                            (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
4738                         hw->mac.ops.power_up_serdes(hw);
4739                         igb_check_swap_media(adapter);
4740                         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4741                                 schedule_work(&adapter->reset_task);
4742                                 /* return immediately */
4743                                 return;
4744                         }
4745                 }
4746         }
4747
4748         igb_update_stats(adapter);
4749
4750         for (i = 0; i < adapter->num_tx_queues; i++) {
4751                 struct igb_ring *tx_ring = adapter->tx_ring[i];
4752                 if (!netif_carrier_ok(netdev)) {
4753                         /* We've lost link, so the controller stops DMA,
4754                          * but we've got queued Tx work that's never going
4755                          * to get done, so reset controller to flush Tx.
4756                          * (Do the reset outside of interrupt context). */
4757                         if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
4758                                 adapter->tx_timeout_count++;
4759                                 schedule_work(&adapter->reset_task);
4760                                 /* return immediately since reset is imminent */
4761                                 return;
4762                         }
4763                 }
4764
4765                 /* Force detection of hung controller every watchdog period */
4766                 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
4767         }
4768
4769         /* Cause software interrupt to ensure rx ring is cleaned */
4770         if (adapter->msix_entries) {
4771                 u32 eics = 0;
4772                 for (i = 0; i < adapter->num_q_vectors; i++)
4773                         eics |= adapter->q_vector[i]->eims_value;
4774                 E1000_WRITE_REG(hw, E1000_EICS, eics);
4775         } else {
4776                 E1000_WRITE_REG(hw, E1000_ICS, E1000_ICS_RXDMT0);
4777         }
4778
4779         igb_spoof_check(adapter);
4780
4781         /* Reset the timer */
4782         if (!test_bit(__IGB_DOWN, &adapter->state)) {
4783                 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)
4784                         mod_timer(&adapter->watchdog_timer,
4785                                   round_jiffies(jiffies +  HZ));
4786                 else
4787                         mod_timer(&adapter->watchdog_timer,
4788                                   round_jiffies(jiffies + 2 * HZ));
4789         }
4790 }
4791
4792 static void igb_dma_err_task(struct work_struct *work)
4793 {
4794         struct igb_adapter *adapter = container_of(work,
4795                                                    struct igb_adapter,
4796                                                    dma_err_task);
4797         int vf;
4798         struct e1000_hw *hw = &adapter->hw;
4799         struct net_device *netdev = adapter->netdev;
4800         u32 hgptc;
4801         u32 ciaa, ciad;
4802
4803         hgptc = E1000_READ_REG(hw, E1000_HGPTC);
4804         if (hgptc) /* If incrementing then no need for the check below */
4805                 goto dma_timer_reset;
4806         /*
4807          * Check to see if a bad DMA write target from an errant or
4808          * malicious VF has caused a PCIe error.  If so then we can
4809          * issue a VFLR to the offending VF(s) and then resume without
4810          * requesting a full slot reset.
4811          */
4812
4813         for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
4814                 ciaa = (vf << 16) | 0x80000000;
4815                 /* 32 bit read so align, we really want status at offset 6 */
4816                 ciaa |= PCI_COMMAND;
4817                 E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4818                 ciad = E1000_READ_REG(hw, E1000_CIAD);
4819                 ciaa &= 0x7FFFFFFF;
4820                 /* disable debug mode asap after reading data */
4821                 E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4822                 /* Get the upper 16 bits which will be the PCI status reg */
4823                 ciad >>= 16;
4824                 if (ciad & (PCI_STATUS_REC_MASTER_ABORT |
4825                             PCI_STATUS_REC_TARGET_ABORT |
4826                             PCI_STATUS_SIG_SYSTEM_ERROR)) {
4827                         netdev_err(netdev, "VF %d suffered error\n", vf);
4828                         /* Issue VFLR */
4829                         ciaa = (vf << 16) | 0x80000000;
4830                         ciaa |= 0xA8;
4831                         E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4832                         ciad = 0x00008000;  /* VFLR */
4833                         E1000_WRITE_REG(hw, E1000_CIAD, ciad);
4834                         ciaa &= 0x7FFFFFFF;
4835                         E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4836                 }
4837         }
4838 dma_timer_reset:
4839         /* Reset the timer */
4840         if (!test_bit(__IGB_DOWN, &adapter->state))
4841                 mod_timer(&adapter->dma_err_timer,
4842                           round_jiffies(jiffies + HZ / 10));
4843 }
4844
4845 /**
4846  * igb_dma_err_timer - Timer Call-back
4847  * @data: pointer to adapter cast into an unsigned long
4848  **/
4849 static void igb_dma_err_timer(unsigned long data)
4850 {
4851         struct igb_adapter *adapter = (struct igb_adapter *)data;
4852         /* Do the rest outside of interrupt context */
4853         schedule_work(&adapter->dma_err_task);
4854 }
4855
4856 enum latency_range {
4857         lowest_latency = 0,
4858         low_latency = 1,
4859         bulk_latency = 2,
4860         latency_invalid = 255
4861 };
4862
4863 /**
4864  * igb_update_ring_itr - update the dynamic ITR value based on packet size
4865  *
4866  *      Stores a new ITR value based on strictly on packet size.  This
4867  *      algorithm is less sophisticated than that used in igb_update_itr,
4868  *      due to the difficulty of synchronizing statistics across multiple
4869  *      receive rings.  The divisors and thresholds used by this function
4870  *      were determined based on theoretical maximum wire speed and testing
4871  *      data, in order to minimize response time while increasing bulk
4872  *      throughput.
4873  *      This functionality is controlled by the InterruptThrottleRate module
4874  *      parameter (see igb_param.c)
4875  *      NOTE:  This function is called only when operating in a multiqueue
4876  *             receive environment.
4877  * @q_vector: pointer to q_vector
4878  **/
4879 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
4880 {
4881         int new_val = q_vector->itr_val;
4882         int avg_wire_size = 0;
4883         struct igb_adapter *adapter = q_vector->adapter;
4884         unsigned int packets;
4885
4886         /* For non-gigabit speeds, just fix the interrupt rate at 4000
4887          * ints/sec - ITR timer value of 120 ticks.
4888          */
4889         switch (adapter->link_speed) {
4890         case SPEED_10:
4891         case SPEED_100:
4892                 new_val = IGB_4K_ITR;
4893                 goto set_itr_val;
4894         default:
4895                 break;
4896         }
4897
4898         packets = q_vector->rx.total_packets;
4899         if (packets)
4900                 avg_wire_size = q_vector->rx.total_bytes / packets;
4901
4902         packets = q_vector->tx.total_packets;
4903         if (packets)
4904                 avg_wire_size = max_t(u32, avg_wire_size,
4905                                       q_vector->tx.total_bytes / packets);
4906
4907         /* if avg_wire_size isn't set no work was done */
4908         if (!avg_wire_size)
4909                 goto clear_counts;
4910
4911         /* Add 24 bytes to size to account for CRC, preamble, and gap */
4912         avg_wire_size += 24;
4913
4914         /* Don't starve jumbo frames */
4915         avg_wire_size = min(avg_wire_size, 3000);
4916
4917         /* Give a little boost to mid-size frames */
4918         if ((avg_wire_size > 300) && (avg_wire_size < 1200))
4919                 new_val = avg_wire_size / 3;
4920         else
4921                 new_val = avg_wire_size / 2;
4922
4923         /* conservative mode (itr 3) eliminates the lowest_latency setting */
4924         if (new_val < IGB_20K_ITR &&
4925             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4926              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4927                 new_val = IGB_20K_ITR;
4928
4929 set_itr_val:
4930         if (new_val != q_vector->itr_val) {
4931                 q_vector->itr_val = new_val;
4932                 q_vector->set_itr = 1;
4933         }
4934 clear_counts:
4935         q_vector->rx.total_bytes = 0;
4936         q_vector->rx.total_packets = 0;
4937         q_vector->tx.total_bytes = 0;
4938         q_vector->tx.total_packets = 0;
4939 }
4940
4941 /**
4942  * igb_update_itr - update the dynamic ITR value based on statistics
4943  *      Stores a new ITR value based on packets and byte
4944  *      counts during the last interrupt.  The advantage of per interrupt
4945  *      computation is faster updates and more accurate ITR for the current
4946  *      traffic pattern.  Constants in this function were computed
4947  *      based on theoretical maximum wire speed and thresholds were set based
4948  *      on testing data as well as attempting to minimize response time
4949  *      while increasing bulk throughput.
4950  *      this functionality is controlled by the InterruptThrottleRate module
4951  *      parameter (see igb_param.c)
4952  *      NOTE:  These calculations are only valid when operating in a single-
4953  *             queue environment.
4954  * @q_vector: pointer to q_vector
4955  * @ring_container: ring info to update the itr for
4956  **/
4957 static void igb_update_itr(struct igb_q_vector *q_vector,
4958                            struct igb_ring_container *ring_container)
4959 {
4960         unsigned int packets = ring_container->total_packets;
4961         unsigned int bytes = ring_container->total_bytes;
4962         u8 itrval = ring_container->itr;
4963
4964         /* no packets, exit with status unchanged */
4965         if (packets == 0)
4966                 return;
4967
4968         switch (itrval) {
4969         case lowest_latency:
4970                 /* handle TSO and jumbo frames */
4971                 if (bytes/packets > 8000)
4972                         itrval = bulk_latency;
4973                 else if ((packets < 5) && (bytes > 512))
4974                         itrval = low_latency;
4975                 break;
4976         case low_latency:  /* 50 usec aka 20000 ints/s */
4977                 if (bytes > 10000) {
4978                         /* this if handles the TSO accounting */
4979                         if (bytes/packets > 8000) {
4980                                 itrval = bulk_latency;
4981                         } else if ((packets < 10) || ((bytes/packets) > 1200)) {
4982                                 itrval = bulk_latency;
4983                         } else if ((packets > 35)) {
4984                                 itrval = lowest_latency;
4985                         }
4986                 } else if (bytes/packets > 2000) {
4987                         itrval = bulk_latency;
4988                 } else if (packets <= 2 && bytes < 512) {
4989                         itrval = lowest_latency;
4990                 }
4991                 break;
4992         case bulk_latency: /* 250 usec aka 4000 ints/s */
4993                 if (bytes > 25000) {
4994                         if (packets > 35)
4995                                 itrval = low_latency;
4996                 } else if (bytes < 1500) {
4997                         itrval = low_latency;
4998                 }
4999                 break;
5000         }
5001
5002         /* clear work counters since we have the values we need */
5003         ring_container->total_bytes = 0;
5004         ring_container->total_packets = 0;
5005
5006         /* write updated itr to ring container */
5007         ring_container->itr = itrval;
5008 }
5009
5010 static void igb_set_itr(struct igb_q_vector *q_vector)
5011 {
5012         struct igb_adapter *adapter = q_vector->adapter;
5013         u32 new_itr = q_vector->itr_val;
5014         u8 current_itr = 0;
5015
5016         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
5017         switch (adapter->link_speed) {
5018         case SPEED_10:
5019         case SPEED_100:
5020                 current_itr = 0;
5021                 new_itr = IGB_4K_ITR;
5022                 goto set_itr_now;
5023         default:
5024                 break;
5025         }
5026
5027         igb_update_itr(q_vector, &q_vector->tx);
5028         igb_update_itr(q_vector, &q_vector->rx);
5029
5030         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
5031
5032         /* conservative mode (itr 3) eliminates the lowest_latency setting */
5033         if (current_itr == lowest_latency &&
5034             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
5035              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
5036                 current_itr = low_latency;
5037
5038         switch (current_itr) {
5039         /* counts and packets in update_itr are dependent on these numbers */
5040         case lowest_latency:
5041                 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
5042                 break;
5043         case low_latency:
5044                 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
5045                 break;
5046         case bulk_latency:
5047                 new_itr = IGB_4K_ITR;  /* 4,000 ints/sec */
5048                 break;
5049         default:
5050                 break;
5051         }
5052
5053 set_itr_now:
5054         if (new_itr != q_vector->itr_val) {
5055                 /* this attempts to bias the interrupt rate towards Bulk
5056                  * by adding intermediate steps when interrupt rate is
5057                  * increasing */
5058                 new_itr = new_itr > q_vector->itr_val ?
5059                              max((new_itr * q_vector->itr_val) /
5060                                  (new_itr + (q_vector->itr_val >> 2)),
5061                                  new_itr) :
5062                              new_itr;
5063                 /* Don't write the value here; it resets the adapter's
5064                  * internal timer, and causes us to delay far longer than
5065                  * we should between interrupts.  Instead, we write the ITR
5066                  * value at the beginning of the next interrupt so the timing
5067                  * ends up being correct.
5068                  */
5069                 q_vector->itr_val = new_itr;
5070                 q_vector->set_itr = 1;
5071         }
5072 }
5073
5074 void igb_tx_ctxtdesc(struct igb_ring *tx_ring, u32 vlan_macip_lens,
5075                      u32 type_tucmd, u32 mss_l4len_idx)
5076 {
5077         struct e1000_adv_tx_context_desc *context_desc;
5078         u16 i = tx_ring->next_to_use;
5079
5080         context_desc = IGB_TX_CTXTDESC(tx_ring, i);
5081
5082         i++;
5083         tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
5084
5085         /* set bits to identify this as an advanced context descriptor */
5086         type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
5087
5088         /* For 82575, context index must be unique per ring. */
5089         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5090                 mss_l4len_idx |= tx_ring->reg_idx << 4;
5091
5092         context_desc->vlan_macip_lens   = cpu_to_le32(vlan_macip_lens);
5093         context_desc->seqnum_seed       = 0;
5094         context_desc->type_tucmd_mlhl   = cpu_to_le32(type_tucmd);
5095         context_desc->mss_l4len_idx     = cpu_to_le32(mss_l4len_idx);
5096 }
5097
5098 static int igb_tso(struct igb_ring *tx_ring,
5099                    struct igb_tx_buffer *first,
5100                    u8 *hdr_len)
5101 {
5102 #ifdef NETIF_F_TSO
5103         struct sk_buff *skb = first->skb;
5104         u32 vlan_macip_lens, type_tucmd;
5105         u32 mss_l4len_idx, l4len;
5106
5107         if (skb->ip_summed != CHECKSUM_PARTIAL)
5108                 return 0;
5109
5110         if (!skb_is_gso(skb))
5111 #endif /* NETIF_F_TSO */
5112                 return 0;
5113 #ifdef NETIF_F_TSO
5114
5115         if (skb_header_cloned(skb)) {
5116                 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
5117                 if (err)
5118                         return err;
5119         }
5120
5121         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
5122         type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
5123
5124         if (first->protocol == __constant_htons(ETH_P_IP)) {
5125                 struct iphdr *iph = ip_hdr(skb);
5126                 iph->tot_len = 0;
5127                 iph->check = 0;
5128                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
5129                                                          iph->daddr, 0,
5130                                                          IPPROTO_TCP,
5131                                                          0);
5132                 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
5133                 first->tx_flags |= IGB_TX_FLAGS_TSO |
5134                                    IGB_TX_FLAGS_CSUM |
5135                                    IGB_TX_FLAGS_IPV4;
5136 #ifdef NETIF_F_TSO6
5137         } else if (skb_is_gso_v6(skb)) {
5138                 ipv6_hdr(skb)->payload_len = 0;
5139                 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
5140                                                        &ipv6_hdr(skb)->daddr,
5141                                                        0, IPPROTO_TCP, 0);
5142                 first->tx_flags |= IGB_TX_FLAGS_TSO |
5143                                    IGB_TX_FLAGS_CSUM;
5144 #endif
5145         }
5146
5147         /* compute header lengths */
5148         l4len = tcp_hdrlen(skb);
5149         *hdr_len = skb_transport_offset(skb) + l4len;
5150
5151         /* update gso size and bytecount with header size */
5152         first->gso_segs = skb_shinfo(skb)->gso_segs;
5153         first->bytecount += (first->gso_segs - 1) * *hdr_len;
5154
5155         /* MSS L4LEN IDX */
5156         mss_l4len_idx = l4len << E1000_ADVTXD_L4LEN_SHIFT;
5157         mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
5158
5159         /* VLAN MACLEN IPLEN */
5160         vlan_macip_lens = skb_network_header_len(skb);
5161         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
5162         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5163
5164         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
5165
5166         return 1;
5167 #endif  /* NETIF_F_TSO */
5168 }
5169
5170 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
5171 {
5172         struct sk_buff *skb = first->skb;
5173         u32 vlan_macip_lens = 0;
5174         u32 mss_l4len_idx = 0;
5175         u32 type_tucmd = 0;
5176
5177         if (skb->ip_summed != CHECKSUM_PARTIAL) {
5178                 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN))
5179                         return;
5180         } else {
5181                 u8 nexthdr = 0;
5182                 switch (first->protocol) {
5183                 case __constant_htons(ETH_P_IP):
5184                         vlan_macip_lens |= skb_network_header_len(skb);
5185                         type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
5186                         nexthdr = ip_hdr(skb)->protocol;
5187                         break;
5188 #ifdef NETIF_F_IPV6_CSUM
5189                 case __constant_htons(ETH_P_IPV6):
5190                         vlan_macip_lens |= skb_network_header_len(skb);
5191                         nexthdr = ipv6_hdr(skb)->nexthdr;
5192                         break;
5193 #endif
5194                 default:
5195                         if (unlikely(net_ratelimit())) {
5196                                 dev_warn(tx_ring->dev,
5197                                  "partial checksum but proto=%x!\n",
5198                                  first->protocol);
5199                         }
5200                         break;
5201                 }
5202
5203                 switch (nexthdr) {
5204                 case IPPROTO_TCP:
5205                         type_tucmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
5206                         mss_l4len_idx = tcp_hdrlen(skb) <<
5207                                         E1000_ADVTXD_L4LEN_SHIFT;
5208                         break;
5209 #ifdef HAVE_SCTP
5210                 case IPPROTO_SCTP:
5211                         type_tucmd |= E1000_ADVTXD_TUCMD_L4T_SCTP;
5212                         mss_l4len_idx = sizeof(struct sctphdr) <<
5213                                         E1000_ADVTXD_L4LEN_SHIFT;
5214                         break;
5215 #endif
5216                 case IPPROTO_UDP:
5217                         mss_l4len_idx = sizeof(struct udphdr) <<
5218                                         E1000_ADVTXD_L4LEN_SHIFT;
5219                         break;
5220                 default:
5221                         if (unlikely(net_ratelimit())) {
5222                                 dev_warn(tx_ring->dev,
5223                                  "partial checksum but l4 proto=%x!\n",
5224                                  nexthdr);
5225                         }
5226                         break;
5227                 }
5228
5229                 /* update TX checksum flag */
5230                 first->tx_flags |= IGB_TX_FLAGS_CSUM;
5231         }
5232
5233         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
5234         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5235
5236         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
5237 }
5238
5239 #define IGB_SET_FLAG(_input, _flag, _result) \
5240         ((_flag <= _result) ? \
5241          ((u32)(_input & _flag) * (_result / _flag)) : \
5242          ((u32)(_input & _flag) / (_flag / _result)))
5243
5244 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
5245 {
5246         /* set type for advanced descriptor with frame checksum insertion */
5247         u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
5248                        E1000_ADVTXD_DCMD_DEXT |
5249                        E1000_ADVTXD_DCMD_IFCS;
5250
5251         /* set HW vlan bit if vlan is present */
5252         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
5253                                  (E1000_ADVTXD_DCMD_VLE));
5254
5255         /* set segmentation bits for TSO */
5256         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
5257                                  (E1000_ADVTXD_DCMD_TSE));
5258
5259         /* set timestamp bit if present */
5260         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
5261                                  (E1000_ADVTXD_MAC_TSTAMP));
5262
5263         return cmd_type;
5264 }
5265
5266 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
5267                                  union e1000_adv_tx_desc *tx_desc,
5268                                  u32 tx_flags, unsigned int paylen)
5269 {
5270         u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
5271
5272         /* 82575 requires a unique index per ring */
5273         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5274                 olinfo_status |= tx_ring->reg_idx << 4;
5275
5276         /* insert L4 checksum */
5277         olinfo_status |= IGB_SET_FLAG(tx_flags,
5278                                       IGB_TX_FLAGS_CSUM,
5279                                       (E1000_TXD_POPTS_TXSM << 8));
5280
5281         /* insert IPv4 checksum */
5282         olinfo_status |= IGB_SET_FLAG(tx_flags,
5283                                       IGB_TX_FLAGS_IPV4,
5284                                       (E1000_TXD_POPTS_IXSM << 8));
5285
5286         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
5287 }
5288
5289 static void igb_tx_map(struct igb_ring *tx_ring,
5290                        struct igb_tx_buffer *first,
5291                        const u8 hdr_len)
5292 {
5293         struct sk_buff *skb = first->skb;
5294         struct igb_tx_buffer *tx_buffer;
5295         union e1000_adv_tx_desc *tx_desc;
5296         struct skb_frag_struct *frag;
5297         dma_addr_t dma;
5298         unsigned int data_len, size;
5299         u32 tx_flags = first->tx_flags;
5300         u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
5301         u16 i = tx_ring->next_to_use;
5302
5303         tx_desc = IGB_TX_DESC(tx_ring, i);
5304
5305         igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
5306
5307         size = skb_headlen(skb);
5308         data_len = skb->data_len;
5309
5310         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
5311
5312         tx_buffer = first;
5313
5314         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
5315                 if (dma_mapping_error(tx_ring->dev, dma))
5316                         goto dma_error;
5317
5318                 /* record length, and DMA address */
5319                 dma_unmap_len_set(tx_buffer, len, size);
5320                 dma_unmap_addr_set(tx_buffer, dma, dma);
5321
5322                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
5323
5324                 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
5325                         tx_desc->read.cmd_type_len =
5326                                 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
5327
5328                         i++;
5329                         tx_desc++;
5330                         if (i == tx_ring->count) {
5331                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
5332                                 i = 0;
5333                         }
5334                         tx_desc->read.olinfo_status = 0;
5335
5336                         dma += IGB_MAX_DATA_PER_TXD;
5337                         size -= IGB_MAX_DATA_PER_TXD;
5338
5339                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
5340                 }
5341
5342                 if (likely(!data_len))
5343                         break;
5344
5345                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
5346
5347                 i++;
5348                 tx_desc++;
5349                 if (i == tx_ring->count) {
5350                         tx_desc = IGB_TX_DESC(tx_ring, 0);
5351                         i = 0;
5352                 }
5353                 tx_desc->read.olinfo_status = 0;
5354
5355                 size = skb_frag_size(frag);
5356                 data_len -= size;
5357
5358                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
5359                                        size, DMA_TO_DEVICE);
5360
5361                 tx_buffer = &tx_ring->tx_buffer_info[i];
5362         }
5363
5364         /* write last descriptor with RS and EOP bits */
5365         cmd_type |= size | IGB_TXD_DCMD;
5366         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
5367
5368         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
5369         /* set the timestamp */
5370         first->time_stamp = jiffies;
5371
5372         /*
5373          * Force memory writes to complete before letting h/w know there
5374          * are new descriptors to fetch.  (Only applicable for weak-ordered
5375          * memory model archs, such as IA-64).
5376          *
5377          * We also need this memory barrier to make certain all of the
5378          * status bits have been updated before next_to_watch is written.
5379          */
5380         wmb();
5381
5382         /* set next_to_watch value indicating a packet is present */
5383         first->next_to_watch = tx_desc;
5384
5385         i++;
5386         if (i == tx_ring->count)
5387                 i = 0;
5388
5389         tx_ring->next_to_use = i;
5390
5391         writel(i, tx_ring->tail);
5392
5393         /* we need this if more than one processor can write to our tail
5394          * at a time, it syncronizes IO on IA64/Altix systems */
5395         mmiowb();
5396
5397         return;
5398
5399 dma_error:
5400         dev_err(tx_ring->dev, "TX DMA map failed\n");
5401
5402         /* clear dma mappings for failed tx_buffer_info map */
5403         for (;;) {
5404                 tx_buffer = &tx_ring->tx_buffer_info[i];
5405                 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer);
5406                 if (tx_buffer == first)
5407                         break;
5408                 if (i == 0)
5409                         i = tx_ring->count;
5410                 i--;
5411         }
5412
5413         tx_ring->next_to_use = i;
5414 }
5415
5416 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5417 {
5418         struct net_device *netdev = netdev_ring(tx_ring);
5419
5420         if (netif_is_multiqueue(netdev))
5421                 netif_stop_subqueue(netdev, ring_queue_index(tx_ring));
5422         else
5423                 netif_stop_queue(netdev);
5424
5425         /* Herbert's original patch had:
5426          *  smp_mb__after_netif_stop_queue();
5427          * but since that doesn't exist yet, just open code it. */
5428         smp_mb();
5429
5430         /* We need to check again in a case another CPU has just
5431          * made room available. */
5432         if (igb_desc_unused(tx_ring) < size)
5433                 return -EBUSY;
5434
5435         /* A reprieve! */
5436         if (netif_is_multiqueue(netdev))
5437                 netif_wake_subqueue(netdev, ring_queue_index(tx_ring));
5438         else
5439                 netif_wake_queue(netdev);
5440
5441         tx_ring->tx_stats.restart_queue++;
5442
5443         return 0;
5444 }
5445
5446 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5447 {
5448         if (igb_desc_unused(tx_ring) >= size)
5449                 return 0;
5450         return __igb_maybe_stop_tx(tx_ring, size);
5451 }
5452
5453 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
5454                                 struct igb_ring *tx_ring)
5455 {
5456         struct igb_tx_buffer *first;
5457         int tso;
5458         u32 tx_flags = 0;
5459 #if PAGE_SIZE > IGB_MAX_DATA_PER_TXD
5460         unsigned short f;
5461 #endif
5462         u16 count = TXD_USE_COUNT(skb_headlen(skb));
5463         __be16 protocol = vlan_get_protocol(skb);
5464         u8 hdr_len = 0;
5465
5466         /*
5467          * need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
5468          *       + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
5469          *       + 2 desc gap to keep tail from touching head,
5470          *       + 1 desc for context descriptor,
5471          * otherwise try next time
5472          */
5473 #if PAGE_SIZE > IGB_MAX_DATA_PER_TXD
5474         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
5475                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
5476 #else
5477         count += skb_shinfo(skb)->nr_frags;
5478 #endif
5479         if (igb_maybe_stop_tx(tx_ring, count + 3)) {
5480                 /* this is a hard error */
5481                 return NETDEV_TX_BUSY;
5482         }
5483
5484         /* record the location of the first descriptor for this packet */
5485         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
5486         first->skb = skb;
5487         first->bytecount = skb->len;
5488         first->gso_segs = 1;
5489
5490         skb_tx_timestamp(skb);
5491
5492 #ifdef HAVE_PTP_1588_CLOCK
5493         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
5494                 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
5495                 if (!adapter->ptp_tx_skb) {
5496                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5497                         tx_flags |= IGB_TX_FLAGS_TSTAMP;
5498
5499                         adapter->ptp_tx_skb = skb_get(skb);
5500                         adapter->ptp_tx_start = jiffies;
5501                         if (adapter->hw.mac.type == e1000_82576)
5502                                 schedule_work(&adapter->ptp_tx_work);
5503                 }
5504         }
5505 #endif /* HAVE_PTP_1588_CLOCK */
5506
5507         if (vlan_tx_tag_present(skb)) {
5508                 tx_flags |= IGB_TX_FLAGS_VLAN;
5509                 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
5510         }
5511
5512         /* record initial flags and protocol */
5513         first->tx_flags = tx_flags;
5514         first->protocol = protocol;
5515
5516         tso = igb_tso(tx_ring, first, &hdr_len);
5517         if (tso < 0)
5518                 goto out_drop;
5519         else if (!tso)
5520                 igb_tx_csum(tx_ring, first);
5521
5522         igb_tx_map(tx_ring, first, hdr_len);
5523
5524 #ifndef HAVE_TRANS_START_IN_QUEUE
5525         netdev_ring(tx_ring)->trans_start = jiffies;
5526
5527 #endif
5528         /* Make sure there is space in the ring for the next send. */
5529         igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
5530
5531         return NETDEV_TX_OK;
5532
5533 out_drop:
5534         igb_unmap_and_free_tx_resource(tx_ring, first);
5535
5536         return NETDEV_TX_OK;
5537 }
5538
5539 #ifdef HAVE_TX_MQ
5540 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
5541                                                     struct sk_buff *skb)
5542 {
5543         unsigned int r_idx = skb->queue_mapping;
5544
5545         if (r_idx >= adapter->num_tx_queues)
5546                 r_idx = r_idx % adapter->num_tx_queues;
5547
5548         return adapter->tx_ring[r_idx];
5549 }
5550 #else
5551 #define igb_tx_queue_mapping(_adapter, _skb) (_adapter)->tx_ring[0]
5552 #endif
5553
5554 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
5555                                   struct net_device *netdev)
5556 {
5557         struct igb_adapter *adapter = netdev_priv(netdev);
5558
5559         if (test_bit(__IGB_DOWN, &adapter->state)) {
5560                 dev_kfree_skb_any(skb);
5561                 return NETDEV_TX_OK;
5562         }
5563
5564         if (skb->len <= 0) {
5565                 dev_kfree_skb_any(skb);
5566                 return NETDEV_TX_OK;
5567         }
5568
5569         /*
5570          * The minimum packet size with TCTL.PSP set is 17 so pad the skb
5571          * in order to meet this minimum size requirement.
5572          */
5573         if (skb->len < 17) {
5574                 if (skb_padto(skb, 17))
5575                         return NETDEV_TX_OK;
5576                 skb->len = 17;
5577         }
5578
5579         return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
5580 }
5581
5582 /**
5583  * igb_tx_timeout - Respond to a Tx Hang
5584  * @netdev: network interface device structure
5585  **/
5586 static void igb_tx_timeout(struct net_device *netdev)
5587 {
5588         struct igb_adapter *adapter = netdev_priv(netdev);
5589         struct e1000_hw *hw = &adapter->hw;
5590
5591         /* Do the reset outside of interrupt context */
5592         adapter->tx_timeout_count++;
5593
5594         if (hw->mac.type >= e1000_82580)
5595                 hw->dev_spec._82575.global_device_reset = true;
5596
5597         schedule_work(&adapter->reset_task);
5598         E1000_WRITE_REG(hw, E1000_EICS,
5599                         (adapter->eims_enable_mask & ~adapter->eims_other));
5600 }
5601
5602 static void igb_reset_task(struct work_struct *work)
5603 {
5604         struct igb_adapter *adapter;
5605         adapter = container_of(work, struct igb_adapter, reset_task);
5606
5607         igb_reinit_locked(adapter);
5608 }
5609
5610 /**
5611  * igb_get_stats - Get System Network Statistics
5612  * @netdev: network interface device structure
5613  *
5614  * Returns the address of the device statistics structure.
5615  * The statistics are updated here and also from the timer callback.
5616  **/
5617 static struct net_device_stats *igb_get_stats(struct net_device *netdev)
5618 {
5619         struct igb_adapter *adapter = netdev_priv(netdev);
5620
5621         if (!test_bit(__IGB_RESETTING, &adapter->state))
5622                 igb_update_stats(adapter);
5623
5624 #ifdef HAVE_NETDEV_STATS_IN_NETDEV
5625         /* only return the current stats */
5626         return &netdev->stats;
5627 #else
5628         /* only return the current stats */
5629         return &adapter->net_stats;
5630 #endif /* HAVE_NETDEV_STATS_IN_NETDEV */
5631 }
5632
5633 /**
5634  * igb_change_mtu - Change the Maximum Transfer Unit
5635  * @netdev: network interface device structure
5636  * @new_mtu: new value for maximum frame size
5637  *
5638  * Returns 0 on success, negative on failure
5639  **/
5640 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
5641 {
5642         struct igb_adapter *adapter = netdev_priv(netdev);
5643         struct e1000_hw *hw = &adapter->hw;
5644         struct pci_dev *pdev = adapter->pdev;
5645         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
5646
5647         if ((new_mtu < 68) || (max_frame > MAX_JUMBO_FRAME_SIZE)) {
5648                 dev_err(pci_dev_to_dev(pdev), "Invalid MTU setting\n");
5649                 return -EINVAL;
5650         }
5651
5652 #define MAX_STD_JUMBO_FRAME_SIZE 9238
5653         if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
5654                 dev_err(pci_dev_to_dev(pdev), "MTU > 9216 not supported.\n");
5655                 return -EINVAL;
5656         }
5657
5658         /* adjust max frame to be at least the size of a standard frame */
5659         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
5660                 max_frame = ETH_FRAME_LEN + ETH_FCS_LEN;
5661
5662         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
5663                 usleep_range(1000, 2000);
5664
5665         /* igb_down has a dependency on max_frame_size */
5666         adapter->max_frame_size = max_frame;
5667
5668         if (netif_running(netdev))
5669                 igb_down(adapter);
5670
5671         dev_info(pci_dev_to_dev(pdev), "changing MTU from %d to %d\n",
5672                 netdev->mtu, new_mtu);
5673         netdev->mtu = new_mtu;
5674         hw->dev_spec._82575.mtu = new_mtu;
5675
5676         if (netif_running(netdev))
5677                 igb_up(adapter);
5678         else
5679                 igb_reset(adapter);
5680
5681         clear_bit(__IGB_RESETTING, &adapter->state);
5682
5683         return 0;
5684 }
5685
5686 /**
5687  * igb_update_stats - Update the board statistics counters
5688  * @adapter: board private structure
5689  **/
5690
5691 void igb_update_stats(struct igb_adapter *adapter)
5692 {
5693 #ifdef HAVE_NETDEV_STATS_IN_NETDEV
5694         struct net_device_stats *net_stats = &adapter->netdev->stats;
5695 #else
5696         struct net_device_stats *net_stats = &adapter->net_stats;
5697 #endif /* HAVE_NETDEV_STATS_IN_NETDEV */
5698         struct e1000_hw *hw = &adapter->hw;
5699 #ifdef HAVE_PCI_ERS
5700         struct pci_dev *pdev = adapter->pdev;
5701 #endif
5702         u32 reg, mpc;
5703         u16 phy_tmp;
5704         int i;
5705         u64 bytes, packets;
5706 #ifndef IGB_NO_LRO
5707         u32 flushed = 0, coal = 0;
5708         struct igb_q_vector *q_vector;
5709 #endif
5710
5711 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
5712
5713         /*
5714          * Prevent stats update while adapter is being reset, or if the pci
5715          * connection is down.
5716          */
5717         if (adapter->link_speed == 0)
5718                 return;
5719 #ifdef HAVE_PCI_ERS
5720         if (pci_channel_offline(pdev))
5721                 return;
5722
5723 #endif
5724 #ifndef IGB_NO_LRO
5725         for (i = 0; i < adapter->num_q_vectors; i++) {
5726                 q_vector = adapter->q_vector[i];
5727                 if (!q_vector)
5728                         continue;
5729                 flushed += q_vector->lrolist.stats.flushed;
5730                 coal += q_vector->lrolist.stats.coal;
5731         }
5732         adapter->lro_stats.flushed = flushed;
5733         adapter->lro_stats.coal = coal;
5734
5735 #endif
5736         bytes = 0;
5737         packets = 0;
5738         for (i = 0; i < adapter->num_rx_queues; i++) {
5739                 u32 rqdpc_tmp = E1000_READ_REG(hw, E1000_RQDPC(i)) & 0x0FFF;
5740                 struct igb_ring *ring = adapter->rx_ring[i];
5741                 ring->rx_stats.drops += rqdpc_tmp;
5742                 net_stats->rx_fifo_errors += rqdpc_tmp;
5743 #ifdef CONFIG_IGB_VMDQ_NETDEV
5744                 if (!ring->vmdq_netdev) {
5745                         bytes += ring->rx_stats.bytes;
5746                         packets += ring->rx_stats.packets;
5747                 }
5748 #else
5749                 bytes += ring->rx_stats.bytes;
5750                 packets += ring->rx_stats.packets;
5751 #endif
5752         }
5753
5754         net_stats->rx_bytes = bytes;
5755         net_stats->rx_packets = packets;
5756
5757         bytes = 0;
5758         packets = 0;
5759         for (i = 0; i < adapter->num_tx_queues; i++) {
5760                 struct igb_ring *ring = adapter->tx_ring[i];
5761 #ifdef CONFIG_IGB_VMDQ_NETDEV
5762                 if (!ring->vmdq_netdev) {
5763                         bytes += ring->tx_stats.bytes;
5764                         packets += ring->tx_stats.packets;
5765                 }
5766 #else
5767                 bytes += ring->tx_stats.bytes;
5768                 packets += ring->tx_stats.packets;
5769 #endif
5770         }
5771         net_stats->tx_bytes = bytes;
5772         net_stats->tx_packets = packets;
5773
5774         /* read stats registers */
5775         adapter->stats.crcerrs += E1000_READ_REG(hw, E1000_CRCERRS);
5776         adapter->stats.gprc += E1000_READ_REG(hw, E1000_GPRC);
5777         adapter->stats.gorc += E1000_READ_REG(hw, E1000_GORCL);
5778         E1000_READ_REG(hw, E1000_GORCH); /* clear GORCL */
5779         adapter->stats.bprc += E1000_READ_REG(hw, E1000_BPRC);
5780         adapter->stats.mprc += E1000_READ_REG(hw, E1000_MPRC);
5781         adapter->stats.roc += E1000_READ_REG(hw, E1000_ROC);
5782
5783         adapter->stats.prc64 += E1000_READ_REG(hw, E1000_PRC64);
5784         adapter->stats.prc127 += E1000_READ_REG(hw, E1000_PRC127);
5785         adapter->stats.prc255 += E1000_READ_REG(hw, E1000_PRC255);
5786         adapter->stats.prc511 += E1000_READ_REG(hw, E1000_PRC511);
5787         adapter->stats.prc1023 += E1000_READ_REG(hw, E1000_PRC1023);
5788         adapter->stats.prc1522 += E1000_READ_REG(hw, E1000_PRC1522);
5789         adapter->stats.symerrs += E1000_READ_REG(hw, E1000_SYMERRS);
5790         adapter->stats.sec += E1000_READ_REG(hw, E1000_SEC);
5791
5792         mpc = E1000_READ_REG(hw, E1000_MPC);
5793         adapter->stats.mpc += mpc;
5794         net_stats->rx_fifo_errors += mpc;
5795         adapter->stats.scc += E1000_READ_REG(hw, E1000_SCC);
5796         adapter->stats.ecol += E1000_READ_REG(hw, E1000_ECOL);
5797         adapter->stats.mcc += E1000_READ_REG(hw, E1000_MCC);
5798         adapter->stats.latecol += E1000_READ_REG(hw, E1000_LATECOL);
5799         adapter->stats.dc += E1000_READ_REG(hw, E1000_DC);
5800         adapter->stats.rlec += E1000_READ_REG(hw, E1000_RLEC);
5801         adapter->stats.xonrxc += E1000_READ_REG(hw, E1000_XONRXC);
5802         adapter->stats.xontxc += E1000_READ_REG(hw, E1000_XONTXC);
5803         adapter->stats.xoffrxc += E1000_READ_REG(hw, E1000_XOFFRXC);
5804         adapter->stats.xofftxc += E1000_READ_REG(hw, E1000_XOFFTXC);
5805         adapter->stats.fcruc += E1000_READ_REG(hw, E1000_FCRUC);
5806         adapter->stats.gptc += E1000_READ_REG(hw, E1000_GPTC);
5807         adapter->stats.gotc += E1000_READ_REG(hw, E1000_GOTCL);
5808         E1000_READ_REG(hw, E1000_GOTCH); /* clear GOTCL */
5809         adapter->stats.rnbc += E1000_READ_REG(hw, E1000_RNBC);
5810         adapter->stats.ruc += E1000_READ_REG(hw, E1000_RUC);
5811         adapter->stats.rfc += E1000_READ_REG(hw, E1000_RFC);
5812         adapter->stats.rjc += E1000_READ_REG(hw, E1000_RJC);
5813         adapter->stats.tor += E1000_READ_REG(hw, E1000_TORH);
5814         adapter->stats.tot += E1000_READ_REG(hw, E1000_TOTH);
5815         adapter->stats.tpr += E1000_READ_REG(hw, E1000_TPR);
5816
5817         adapter->stats.ptc64 += E1000_READ_REG(hw, E1000_PTC64);
5818         adapter->stats.ptc127 += E1000_READ_REG(hw, E1000_PTC127);
5819         adapter->stats.ptc255 += E1000_READ_REG(hw, E1000_PTC255);
5820         adapter->stats.ptc511 += E1000_READ_REG(hw, E1000_PTC511);
5821         adapter->stats.ptc1023 += E1000_READ_REG(hw, E1000_PTC1023);
5822         adapter->stats.ptc1522 += E1000_READ_REG(hw, E1000_PTC1522);
5823
5824         adapter->stats.mptc += E1000_READ_REG(hw, E1000_MPTC);
5825         adapter->stats.bptc += E1000_READ_REG(hw, E1000_BPTC);
5826
5827         adapter->stats.tpt += E1000_READ_REG(hw, E1000_TPT);
5828         adapter->stats.colc += E1000_READ_REG(hw, E1000_COLC);
5829
5830         adapter->stats.algnerrc += E1000_READ_REG(hw, E1000_ALGNERRC);
5831         /* read internal phy sepecific stats */
5832         reg = E1000_READ_REG(hw, E1000_CTRL_EXT);
5833         if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
5834                 adapter->stats.rxerrc += E1000_READ_REG(hw, E1000_RXERRC);
5835
5836                 /* this stat has invalid values on i210/i211 */
5837                 if ((hw->mac.type != e1000_i210) &&
5838                     (hw->mac.type != e1000_i211))
5839                         adapter->stats.tncrs += E1000_READ_REG(hw, E1000_TNCRS);
5840         }
5841         adapter->stats.tsctc += E1000_READ_REG(hw, E1000_TSCTC);
5842         adapter->stats.tsctfc += E1000_READ_REG(hw, E1000_TSCTFC);
5843
5844         adapter->stats.iac += E1000_READ_REG(hw, E1000_IAC);
5845         adapter->stats.icrxoc += E1000_READ_REG(hw, E1000_ICRXOC);
5846         adapter->stats.icrxptc += E1000_READ_REG(hw, E1000_ICRXPTC);
5847         adapter->stats.icrxatc += E1000_READ_REG(hw, E1000_ICRXATC);
5848         adapter->stats.ictxptc += E1000_READ_REG(hw, E1000_ICTXPTC);
5849         adapter->stats.ictxatc += E1000_READ_REG(hw, E1000_ICTXATC);
5850         adapter->stats.ictxqec += E1000_READ_REG(hw, E1000_ICTXQEC);
5851         adapter->stats.ictxqmtc += E1000_READ_REG(hw, E1000_ICTXQMTC);
5852         adapter->stats.icrxdmtc += E1000_READ_REG(hw, E1000_ICRXDMTC);
5853
5854         /* Fill out the OS statistics structure */
5855         net_stats->multicast = adapter->stats.mprc;
5856         net_stats->collisions = adapter->stats.colc;
5857
5858         /* Rx Errors */
5859
5860         /* RLEC on some newer hardware can be incorrect so build
5861          * our own version based on RUC and ROC */
5862         net_stats->rx_errors = adapter->stats.rxerrc +
5863                 adapter->stats.crcerrs + adapter->stats.algnerrc +
5864                 adapter->stats.ruc + adapter->stats.roc +
5865                 adapter->stats.cexterr;
5866         net_stats->rx_length_errors = adapter->stats.ruc +
5867                                       adapter->stats.roc;
5868         net_stats->rx_crc_errors = adapter->stats.crcerrs;
5869         net_stats->rx_frame_errors = adapter->stats.algnerrc;
5870         net_stats->rx_missed_errors = adapter->stats.mpc;
5871
5872         /* Tx Errors */
5873         net_stats->tx_errors = adapter->stats.ecol +
5874                                adapter->stats.latecol;
5875         net_stats->tx_aborted_errors = adapter->stats.ecol;
5876         net_stats->tx_window_errors = adapter->stats.latecol;
5877         net_stats->tx_carrier_errors = adapter->stats.tncrs;
5878
5879         /* Tx Dropped needs to be maintained elsewhere */
5880
5881         /* Phy Stats */
5882         if (hw->phy.media_type == e1000_media_type_copper) {
5883                 if ((adapter->link_speed == SPEED_1000) &&
5884                    (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
5885                         phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
5886                         adapter->phy_stats.idle_errors += phy_tmp;
5887                 }
5888         }
5889
5890         /* Management Stats */
5891         adapter->stats.mgptc += E1000_READ_REG(hw, E1000_MGTPTC);
5892         adapter->stats.mgprc += E1000_READ_REG(hw, E1000_MGTPRC);
5893         if (hw->mac.type > e1000_82580) {
5894                 adapter->stats.o2bgptc += E1000_READ_REG(hw, E1000_O2BGPTC);
5895                 adapter->stats.o2bspc += E1000_READ_REG(hw, E1000_O2BSPC);
5896                 adapter->stats.b2ospc += E1000_READ_REG(hw, E1000_B2OSPC);
5897                 adapter->stats.b2ogprc += E1000_READ_REG(hw, E1000_B2OGPRC);
5898         }
5899 }
5900
5901 static irqreturn_t igb_msix_other(int irq, void *data)
5902 {
5903         struct igb_adapter *adapter = data;
5904         struct e1000_hw *hw = &adapter->hw;
5905         u32 icr = E1000_READ_REG(hw, E1000_ICR);
5906         /* reading ICR causes bit 31 of EICR to be cleared */
5907
5908         if (icr & E1000_ICR_DRSTA)
5909                 schedule_work(&adapter->reset_task);
5910
5911         if (icr & E1000_ICR_DOUTSYNC) {
5912                 /* HW is reporting DMA is out of sync */
5913                 adapter->stats.doosync++;
5914                 /* The DMA Out of Sync is also indication of a spoof event
5915                  * in IOV mode. Check the Wrong VM Behavior register to
5916                  * see if it is really a spoof event. */
5917                 igb_check_wvbr(adapter);
5918         }
5919
5920         /* Check for a mailbox event */
5921         if (icr & E1000_ICR_VMMB)
5922                 igb_msg_task(adapter);
5923
5924         if (icr & E1000_ICR_LSC) {
5925                 hw->mac.get_link_status = 1;
5926                 /* guard against interrupt when we're going down */
5927                 if (!test_bit(__IGB_DOWN, &adapter->state))
5928                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
5929         }
5930
5931 #ifdef HAVE_PTP_1588_CLOCK
5932         if (icr & E1000_ICR_TS) {
5933                 u32 tsicr = E1000_READ_REG(hw, E1000_TSICR);
5934
5935                 if (tsicr & E1000_TSICR_TXTS) {
5936                         /* acknowledge the interrupt */
5937                         E1000_WRITE_REG(hw, E1000_TSICR, E1000_TSICR_TXTS);
5938                         /* retrieve hardware timestamp */
5939                         schedule_work(&adapter->ptp_tx_work);
5940                 }
5941         }
5942 #endif /* HAVE_PTP_1588_CLOCK */
5943
5944         /* Check for MDD event */
5945         if (icr & E1000_ICR_MDDET)
5946                 igb_process_mdd_event(adapter);
5947
5948         E1000_WRITE_REG(hw, E1000_EIMS, adapter->eims_other);
5949
5950         return IRQ_HANDLED;
5951 }
5952
5953 static void igb_write_itr(struct igb_q_vector *q_vector)
5954 {
5955         struct igb_adapter *adapter = q_vector->adapter;
5956         u32 itr_val = q_vector->itr_val & 0x7FFC;
5957
5958         if (!q_vector->set_itr)
5959                 return;
5960
5961         if (!itr_val)
5962                 itr_val = 0x4;
5963
5964         if (adapter->hw.mac.type == e1000_82575)
5965                 itr_val |= itr_val << 16;
5966         else
5967                 itr_val |= E1000_EITR_CNT_IGNR;
5968
5969         writel(itr_val, q_vector->itr_register);
5970         q_vector->set_itr = 0;
5971 }
5972
5973 static irqreturn_t igb_msix_ring(int irq, void *data)
5974 {
5975         struct igb_q_vector *q_vector = data;
5976
5977         /* Write the ITR value calculated from the previous interrupt. */
5978         igb_write_itr(q_vector);
5979
5980         napi_schedule(&q_vector->napi);
5981
5982         return IRQ_HANDLED;
5983 }
5984
5985 #ifdef IGB_DCA
5986 static void igb_update_tx_dca(struct igb_adapter *adapter,
5987                               struct igb_ring *tx_ring,
5988                               int cpu)
5989 {
5990         struct e1000_hw *hw = &adapter->hw;
5991         u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
5992
5993         if (hw->mac.type != e1000_82575)
5994                 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT_82576;
5995
5996         /*
5997          * We can enable relaxed ordering for reads, but not writes when
5998          * DCA is enabled.  This is due to a known issue in some chipsets
5999          * which will cause the DCA tag to be cleared.
6000          */
6001         txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
6002                   E1000_DCA_TXCTRL_DATA_RRO_EN |
6003                   E1000_DCA_TXCTRL_DESC_DCA_EN;
6004
6005         E1000_WRITE_REG(hw, E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
6006 }
6007
6008 static void igb_update_rx_dca(struct igb_adapter *adapter,
6009                               struct igb_ring *rx_ring,
6010                               int cpu)
6011 {
6012         struct e1000_hw *hw = &adapter->hw;
6013         u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
6014
6015         if (hw->mac.type != e1000_82575)
6016                 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT_82576;
6017
6018         /*
6019          * We can enable relaxed ordering for reads, but not writes when
6020          * DCA is enabled.  This is due to a known issue in some chipsets
6021          * which will cause the DCA tag to be cleared.
6022          */
6023         rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
6024                   E1000_DCA_RXCTRL_DESC_DCA_EN;
6025
6026         E1000_WRITE_REG(hw, E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
6027 }
6028
6029 static void igb_update_dca(struct igb_q_vector *q_vector)
6030 {
6031         struct igb_adapter *adapter = q_vector->adapter;
6032         int cpu = get_cpu();
6033
6034         if (q_vector->cpu == cpu)
6035                 goto out_no_update;
6036
6037         if (q_vector->tx.ring)
6038                 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
6039
6040         if (q_vector->rx.ring)
6041                 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
6042
6043         q_vector->cpu = cpu;
6044 out_no_update:
6045         put_cpu();
6046 }
6047
6048 static void igb_setup_dca(struct igb_adapter *adapter)
6049 {
6050         struct e1000_hw *hw = &adapter->hw;
6051         int i;
6052
6053         if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
6054                 return;
6055
6056         /* Always use CB2 mode, difference is masked in the CB driver. */
6057         E1000_WRITE_REG(hw, E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
6058
6059         for (i = 0; i < adapter->num_q_vectors; i++) {
6060                 adapter->q_vector[i]->cpu = -1;
6061                 igb_update_dca(adapter->q_vector[i]);
6062         }
6063 }
6064
6065 static int __igb_notify_dca(struct device *dev, void *data)
6066 {
6067         struct net_device *netdev = dev_get_drvdata(dev);
6068         struct igb_adapter *adapter = netdev_priv(netdev);
6069         struct pci_dev *pdev = adapter->pdev;
6070         struct e1000_hw *hw = &adapter->hw;
6071         unsigned long event = *(unsigned long *)data;
6072
6073         switch (event) {
6074         case DCA_PROVIDER_ADD:
6075                 /* if already enabled, don't do it again */
6076                 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
6077                         break;
6078                 if (dca_add_requester(dev) == E1000_SUCCESS) {
6079                         adapter->flags |= IGB_FLAG_DCA_ENABLED;
6080                         dev_info(pci_dev_to_dev(pdev), "DCA enabled\n");
6081                         igb_setup_dca(adapter);
6082                         break;
6083                 }
6084                 /* Fall Through since DCA is disabled. */
6085         case DCA_PROVIDER_REMOVE:
6086                 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
6087                         /* without this a class_device is left
6088                          * hanging around in the sysfs model */
6089                         dca_remove_requester(dev);
6090                         dev_info(pci_dev_to_dev(pdev), "DCA disabled\n");
6091                         adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
6092                         E1000_WRITE_REG(hw, E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_DISABLE);
6093                 }
6094                 break;
6095         }
6096
6097         return E1000_SUCCESS;
6098 }
6099
6100 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
6101                           void *p)
6102 {
6103         int ret_val;
6104
6105         ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
6106                                          __igb_notify_dca);
6107
6108         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
6109 }
6110 #endif /* IGB_DCA */
6111
6112 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
6113 {
6114         unsigned char mac_addr[ETH_ALEN];
6115
6116         random_ether_addr(mac_addr);
6117         igb_set_vf_mac(adapter, vf, mac_addr);
6118
6119 #ifdef IFLA_VF_MAX
6120 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
6121         /* By default spoof check is enabled for all VFs */
6122         adapter->vf_data[vf].spoofchk_enabled = true;
6123 #endif
6124 #endif
6125
6126         return true;
6127 }
6128
6129 static void igb_ping_all_vfs(struct igb_adapter *adapter)
6130 {
6131         struct e1000_hw *hw = &adapter->hw;
6132         u32 ping;
6133         int i;
6134
6135         for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
6136                 ping = E1000_PF_CONTROL_MSG;
6137                 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
6138                         ping |= E1000_VT_MSGTYPE_CTS;
6139                 e1000_write_mbx(hw, &ping, 1, i);
6140         }
6141 }
6142
6143 /**
6144  *  igb_mta_set_ - Set multicast filter table address
6145  *  @adapter: pointer to the adapter structure
6146  *  @hash_value: determines the MTA register and bit to set
6147  *
6148  *  The multicast table address is a register array of 32-bit registers.
6149  *  The hash_value is used to determine what register the bit is in, the
6150  *  current value is read, the new bit is OR'd in and the new value is
6151  *  written back into the register.
6152  **/
6153 void igb_mta_set(struct igb_adapter *adapter, u32 hash_value)
6154 {
6155         struct e1000_hw *hw = &adapter->hw;
6156         u32 hash_bit, hash_reg, mta;
6157
6158         /*
6159          * The MTA is a register array of 32-bit registers. It is
6160          * treated like an array of (32*mta_reg_count) bits.  We want to
6161          * set bit BitArray[hash_value]. So we figure out what register
6162          * the bit is in, read it, OR in the new bit, then write
6163          * back the new value.  The (hw->mac.mta_reg_count - 1) serves as a
6164          * mask to bits 31:5 of the hash value which gives us the
6165          * register we're modifying.  The hash bit within that register
6166          * is determined by the lower 5 bits of the hash value.
6167          */
6168         hash_reg = (hash_value >> 5) & (hw->mac.mta_reg_count - 1);
6169         hash_bit = hash_value & 0x1F;
6170
6171         mta = E1000_READ_REG_ARRAY(hw, E1000_MTA, hash_reg);
6172
6173         mta |= (1 << hash_bit);
6174
6175         E1000_WRITE_REG_ARRAY(hw, E1000_MTA, hash_reg, mta);
6176         E1000_WRITE_FLUSH(hw);
6177 }
6178
6179 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
6180 {
6181
6182         struct e1000_hw *hw = &adapter->hw;
6183         u32 vmolr = E1000_READ_REG(hw, E1000_VMOLR(vf));
6184         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6185
6186         vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
6187                             IGB_VF_FLAG_MULTI_PROMISC);
6188         vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
6189
6190 #ifdef IGB_ENABLE_VF_PROMISC
6191         if (*msgbuf & E1000_VF_SET_PROMISC_UNICAST) {
6192                 vmolr |= E1000_VMOLR_ROPE;
6193                 vf_data->flags |= IGB_VF_FLAG_UNI_PROMISC;
6194                 *msgbuf &= ~E1000_VF_SET_PROMISC_UNICAST;
6195         }
6196 #endif
6197         if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
6198                 vmolr |= E1000_VMOLR_MPME;
6199                 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
6200                 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
6201         } else {
6202                 /*
6203                  * if we have hashes and we are clearing a multicast promisc
6204                  * flag we need to write the hashes to the MTA as this step
6205                  * was previously skipped
6206                  */
6207                 if (vf_data->num_vf_mc_hashes > 30) {
6208                         vmolr |= E1000_VMOLR_MPME;
6209                 } else if (vf_data->num_vf_mc_hashes) {
6210                         int j;
6211                         vmolr |= E1000_VMOLR_ROMPE;
6212                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6213                                 igb_mta_set(adapter, vf_data->vf_mc_hashes[j]);
6214                 }
6215         }
6216
6217         E1000_WRITE_REG(hw, E1000_VMOLR(vf), vmolr);
6218
6219         /* there are flags left unprocessed, likely not supported */
6220         if (*msgbuf & E1000_VT_MSGINFO_MASK)
6221                 return -EINVAL;
6222
6223         return 0;
6224
6225 }
6226
6227 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
6228                                   u32 *msgbuf, u32 vf)
6229 {
6230         int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6231         u16 *hash_list = (u16 *)&msgbuf[1];
6232         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6233         int i;
6234
6235         /* salt away the number of multicast addresses assigned
6236          * to this VF for later use to restore when the PF multi cast
6237          * list changes
6238          */
6239         vf_data->num_vf_mc_hashes = n;
6240
6241         /* only up to 30 hash values supported */
6242         if (n > 30)
6243                 n = 30;
6244
6245         /* store the hashes for later use */
6246         for (i = 0; i < n; i++)
6247                 vf_data->vf_mc_hashes[i] = hash_list[i];
6248
6249         /* Flush and reset the mta with the new values */
6250         igb_set_rx_mode(adapter->netdev);
6251
6252         return 0;
6253 }
6254
6255 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
6256 {
6257         struct e1000_hw *hw = &adapter->hw;
6258         struct vf_data_storage *vf_data;
6259         int i, j;
6260
6261         for (i = 0; i < adapter->vfs_allocated_count; i++) {
6262                 u32 vmolr = E1000_READ_REG(hw, E1000_VMOLR(i));
6263                 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
6264
6265                 vf_data = &adapter->vf_data[i];
6266
6267                 if ((vf_data->num_vf_mc_hashes > 30) ||
6268                     (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
6269                         vmolr |= E1000_VMOLR_MPME;
6270                 } else if (vf_data->num_vf_mc_hashes) {
6271                         vmolr |= E1000_VMOLR_ROMPE;
6272                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6273                                 igb_mta_set(adapter, vf_data->vf_mc_hashes[j]);
6274                 }
6275                 E1000_WRITE_REG(hw, E1000_VMOLR(i), vmolr);
6276         }
6277 }
6278
6279 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
6280 {
6281         struct e1000_hw *hw = &adapter->hw;
6282         u32 pool_mask, reg, vid;
6283         u16 vlan_default;
6284         int i;
6285
6286         pool_mask = 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
6287
6288         /* Find the vlan filter for this id */
6289         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6290                 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6291
6292                 /* remove the vf from the pool */
6293                 reg &= ~pool_mask;
6294
6295                 /* if pool is empty then remove entry from vfta */
6296                 if (!(reg & E1000_VLVF_POOLSEL_MASK) &&
6297                     (reg & E1000_VLVF_VLANID_ENABLE)) {
6298                         reg = 0;
6299                         vid = reg & E1000_VLVF_VLANID_MASK;
6300                         igb_vfta_set(adapter, vid, FALSE);
6301                 }
6302
6303                 E1000_WRITE_REG(hw, E1000_VLVF(i), reg);
6304         }
6305
6306         adapter->vf_data[vf].vlans_enabled = 0;
6307
6308         vlan_default = adapter->vf_data[vf].default_vf_vlan_id;
6309         if (vlan_default)
6310                 igb_vlvf_set(adapter, vlan_default, true, vf);
6311 }
6312
6313 s32 igb_vlvf_set(struct igb_adapter *adapter, u32 vid, bool add, u32 vf)
6314 {
6315         struct e1000_hw *hw = &adapter->hw;
6316         u32 reg, i;
6317
6318         /* The vlvf table only exists on 82576 hardware and newer */
6319         if (hw->mac.type < e1000_82576)
6320                 return -1;
6321
6322         /* we only need to do this if VMDq is enabled */
6323         if (!adapter->vmdq_pools)
6324                 return -1;
6325
6326         /* Find the vlan filter for this id */
6327         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6328                 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6329                 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
6330                     vid == (reg & E1000_VLVF_VLANID_MASK))
6331                         break;
6332         }
6333
6334         if (add) {
6335                 if (i == E1000_VLVF_ARRAY_SIZE) {
6336                         /* Did not find a matching VLAN ID entry that was
6337                          * enabled.  Search for a free filter entry, i.e.
6338                          * one without the enable bit set
6339                          */
6340                         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6341                                 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6342                                 if (!(reg & E1000_VLVF_VLANID_ENABLE))
6343                                         break;
6344                         }
6345                 }
6346                 if (i < E1000_VLVF_ARRAY_SIZE) {
6347                         /* Found an enabled/available entry */
6348                         reg |= 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
6349
6350                         /* if !enabled we need to set this up in vfta */
6351                         if (!(reg & E1000_VLVF_VLANID_ENABLE)) {
6352                                 /* add VID to filter table */
6353                                 igb_vfta_set(adapter, vid, TRUE);
6354                                 reg |= E1000_VLVF_VLANID_ENABLE;
6355                         }
6356                         reg &= ~E1000_VLVF_VLANID_MASK;
6357                         reg |= vid;
6358                         E1000_WRITE_REG(hw, E1000_VLVF(i), reg);
6359
6360                         /* do not modify RLPML for PF devices */
6361                         if (vf >= adapter->vfs_allocated_count)
6362                                 return E1000_SUCCESS;
6363
6364                         if (!adapter->vf_data[vf].vlans_enabled) {
6365                                 u32 size;
6366                                 reg = E1000_READ_REG(hw, E1000_VMOLR(vf));
6367                                 size = reg & E1000_VMOLR_RLPML_MASK;
6368                                 size += 4;
6369                                 reg &= ~E1000_VMOLR_RLPML_MASK;
6370                                 reg |= size;
6371                                 E1000_WRITE_REG(hw, E1000_VMOLR(vf), reg);
6372                         }
6373
6374                         adapter->vf_data[vf].vlans_enabled++;
6375                 }
6376         } else {
6377                 if (i < E1000_VLVF_ARRAY_SIZE) {
6378                         /* remove vf from the pool */
6379                         reg &= ~(1 << (E1000_VLVF_POOLSEL_SHIFT + vf));
6380                         /* if pool is empty then remove entry from vfta */
6381                         if (!(reg & E1000_VLVF_POOLSEL_MASK)) {
6382                                 reg = 0;
6383                                 igb_vfta_set(adapter, vid, FALSE);
6384                         }
6385                         E1000_WRITE_REG(hw, E1000_VLVF(i), reg);
6386
6387                         /* do not modify RLPML for PF devices */
6388                         if (vf >= adapter->vfs_allocated_count)
6389                                 return E1000_SUCCESS;
6390
6391                         adapter->vf_data[vf].vlans_enabled--;
6392                         if (!adapter->vf_data[vf].vlans_enabled) {
6393                                 u32 size;
6394                                 reg = E1000_READ_REG(hw, E1000_VMOLR(vf));
6395                                 size = reg & E1000_VMOLR_RLPML_MASK;
6396                                 size -= 4;
6397                                 reg &= ~E1000_VMOLR_RLPML_MASK;
6398                                 reg |= size;
6399                                 E1000_WRITE_REG(hw, E1000_VMOLR(vf), reg);
6400                         }
6401                 }
6402         }
6403         return E1000_SUCCESS;
6404 }
6405
6406 #ifdef IFLA_VF_MAX
6407 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
6408 {
6409         struct e1000_hw *hw = &adapter->hw;
6410
6411         if (vid)
6412                 E1000_WRITE_REG(hw, E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
6413         else
6414                 E1000_WRITE_REG(hw, E1000_VMVIR(vf), 0);
6415 }
6416
6417 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
6418 #ifdef HAVE_VF_VLAN_PROTO
6419                                int vf, u16 vlan, u8 qos, __be16 vlan_proto)
6420 #else
6421                                int vf, u16 vlan, u8 qos)
6422 #endif
6423 {
6424         int err = 0;
6425         struct igb_adapter *adapter = netdev_priv(netdev);
6426
6427         /* VLAN IDs accepted range 0-4094 */
6428         if ((vf >= adapter->vfs_allocated_count) || (vlan > VLAN_VID_MASK-1) || (qos > 7))
6429                 return -EINVAL;
6430
6431 #ifdef HAVE_VF_VLAN_PROTO
6432         if (vlan_proto != htons(ETH_P_8021Q))
6433                 return -EPROTONOSUPPORT;
6434 #endif
6435
6436         if (vlan || qos) {
6437                 err = igb_vlvf_set(adapter, vlan, !!vlan, vf);
6438                 if (err)
6439                         goto out;
6440                 igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
6441                 igb_set_vmolr(adapter, vf, !vlan);
6442                 adapter->vf_data[vf].pf_vlan = vlan;
6443                 adapter->vf_data[vf].pf_qos = qos;
6444                 igb_set_vf_vlan_strip(adapter, vf, true);
6445                 dev_info(&adapter->pdev->dev,
6446                          "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
6447                 if (test_bit(__IGB_DOWN, &adapter->state)) {
6448                         dev_warn(&adapter->pdev->dev,
6449                                  "The VF VLAN has been set,"
6450                                  " but the PF device is not up.\n");
6451                         dev_warn(&adapter->pdev->dev,
6452                                  "Bring the PF device up before"
6453                                  " attempting to use the VF device.\n");
6454                 }
6455         } else {
6456                 if (adapter->vf_data[vf].pf_vlan)
6457                         dev_info(&adapter->pdev->dev,
6458                                  "Clearing VLAN on VF %d\n", vf);
6459                 igb_vlvf_set(adapter, adapter->vf_data[vf].pf_vlan,
6460                                    false, vf);
6461                 igb_set_vmvir(adapter, vlan, vf);
6462                 igb_set_vmolr(adapter, vf, true);
6463                 igb_set_vf_vlan_strip(adapter, vf, false);
6464                 adapter->vf_data[vf].pf_vlan = 0;
6465                 adapter->vf_data[vf].pf_qos = 0;
6466        }
6467 out:
6468        return err;
6469 }
6470
6471 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
6472 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
6473                                 bool setting)
6474 {
6475         struct igb_adapter *adapter = netdev_priv(netdev);
6476         struct e1000_hw *hw = &adapter->hw;
6477         u32 dtxswc, reg_offset;
6478
6479         if (!adapter->vfs_allocated_count)
6480                 return -EOPNOTSUPP;
6481
6482         if (vf >= adapter->vfs_allocated_count)
6483                 return -EINVAL;
6484
6485         reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
6486         dtxswc = E1000_READ_REG(hw, reg_offset);
6487         if (setting)
6488                 dtxswc |= ((1 << vf) |
6489                            (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
6490         else
6491                 dtxswc &= ~((1 << vf) |
6492                             (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
6493         E1000_WRITE_REG(hw, reg_offset, dtxswc);
6494
6495         adapter->vf_data[vf].spoofchk_enabled = setting;
6496         return E1000_SUCCESS;
6497 }
6498 #endif /* HAVE_VF_SPOOFCHK_CONFIGURE */
6499 #endif /* IFLA_VF_MAX */
6500
6501 static int igb_find_vlvf_entry(struct igb_adapter *adapter, int vid)
6502 {
6503         struct e1000_hw *hw = &adapter->hw;
6504         int i;
6505         u32 reg;
6506
6507         /* Find the vlan filter for this id */
6508         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6509                 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6510                 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
6511                     vid == (reg & E1000_VLVF_VLANID_MASK))
6512                         break;
6513         }
6514
6515         if (i >= E1000_VLVF_ARRAY_SIZE)
6516                 i = -1;
6517
6518         return i;
6519 }
6520
6521 static int igb_set_vf_vlan(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
6522 {
6523         struct e1000_hw *hw = &adapter->hw;
6524         int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6525         int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
6526         int err = 0;
6527
6528         if (vid)
6529                 igb_set_vf_vlan_strip(adapter, vf, true);
6530         else
6531                 igb_set_vf_vlan_strip(adapter, vf, false);
6532
6533         /* If in promiscuous mode we need to make sure the PF also has
6534          * the VLAN filter set.
6535          */
6536         if (add && (adapter->netdev->flags & IFF_PROMISC))
6537                 err = igb_vlvf_set(adapter, vid, add,
6538                                    adapter->vfs_allocated_count);
6539         if (err)
6540                 goto out;
6541
6542         err = igb_vlvf_set(adapter, vid, add, vf);
6543
6544         if (err)
6545                 goto out;
6546
6547         /* Go through all the checks to see if the VLAN filter should
6548          * be wiped completely.
6549          */
6550         if (!add && (adapter->netdev->flags & IFF_PROMISC)) {
6551                 u32 vlvf, bits;
6552
6553                 int regndx = igb_find_vlvf_entry(adapter, vid);
6554                 if (regndx < 0)
6555                         goto out;
6556                 /* See if any other pools are set for this VLAN filter
6557                  * entry other than the PF.
6558                  */
6559                 vlvf = bits = E1000_READ_REG(hw, E1000_VLVF(regndx));
6560                 bits &= 1 << (E1000_VLVF_POOLSEL_SHIFT +
6561                               adapter->vfs_allocated_count);
6562                 /* If the filter was removed then ensure PF pool bit
6563                  * is cleared if the PF only added itself to the pool
6564                  * because the PF is in promiscuous mode.
6565                  */
6566                 if ((vlvf & VLAN_VID_MASK) == vid &&
6567 #ifndef HAVE_VLAN_RX_REGISTER
6568                     !test_bit(vid, adapter->active_vlans) &&
6569 #endif
6570                     !bits)
6571                         igb_vlvf_set(adapter, vid, add,
6572                                      adapter->vfs_allocated_count);
6573         }
6574
6575 out:
6576         return err;
6577 }
6578
6579 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
6580 {
6581         struct e1000_hw *hw = &adapter->hw;
6582
6583         /* clear flags except flag that the PF has set the MAC */
6584         adapter->vf_data[vf].flags &= IGB_VF_FLAG_PF_SET_MAC;
6585         adapter->vf_data[vf].last_nack = jiffies;
6586
6587         /* reset offloads to defaults */
6588         igb_set_vmolr(adapter, vf, true);
6589
6590         /* reset vlans for device */
6591         igb_clear_vf_vfta(adapter, vf);
6592 #ifdef IFLA_VF_MAX
6593         if (adapter->vf_data[vf].pf_vlan)
6594                 igb_ndo_set_vf_vlan(adapter->netdev, vf,
6595                                     adapter->vf_data[vf].pf_vlan,
6596 #ifdef HAVE_VF_VLAN_PROTO
6597                                     adapter->vf_data[vf].pf_qos,
6598                                     htons(ETH_P_8021Q));
6599 #else
6600                                     adapter->vf_data[vf].pf_qos);
6601 #endif
6602         else
6603                 igb_clear_vf_vfta(adapter, vf);
6604 #endif
6605
6606         /* reset multicast table array for vf */
6607         adapter->vf_data[vf].num_vf_mc_hashes = 0;
6608
6609         /* Flush and reset the mta with the new values */
6610         igb_set_rx_mode(adapter->netdev);
6611
6612         /*
6613          * Reset the VFs TDWBAL and TDWBAH registers which are not
6614          * cleared by a VFLR
6615          */
6616         E1000_WRITE_REG(hw, E1000_TDWBAH(vf), 0);
6617         E1000_WRITE_REG(hw, E1000_TDWBAL(vf), 0);
6618         if (hw->mac.type == e1000_82576) {
6619                 E1000_WRITE_REG(hw, E1000_TDWBAH(IGB_MAX_VF_FUNCTIONS + vf), 0);
6620                 E1000_WRITE_REG(hw, E1000_TDWBAL(IGB_MAX_VF_FUNCTIONS + vf), 0);
6621         }
6622 }
6623
6624 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
6625 {
6626         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6627
6628         /* generate a new mac address as we were hotplug removed/added */
6629         if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
6630                 random_ether_addr(vf_mac);
6631
6632         /* process remaining reset events */
6633         igb_vf_reset(adapter, vf);
6634 }
6635
6636 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
6637 {
6638         struct e1000_hw *hw = &adapter->hw;
6639         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6640         u32 reg, msgbuf[3];
6641         u8 *addr = (u8 *)(&msgbuf[1]);
6642
6643         /* process all the same items cleared in a function level reset */
6644         igb_vf_reset(adapter, vf);
6645
6646         /* set vf mac address */
6647         igb_del_mac_filter(adapter, vf_mac, vf);
6648         igb_add_mac_filter(adapter, vf_mac, vf);
6649
6650         /* enable transmit and receive for vf */
6651         reg = E1000_READ_REG(hw, E1000_VFTE);
6652         E1000_WRITE_REG(hw, E1000_VFTE, reg | (1 << vf));
6653         reg = E1000_READ_REG(hw, E1000_VFRE);
6654         E1000_WRITE_REG(hw, E1000_VFRE, reg | (1 << vf));
6655
6656         adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
6657
6658         /* reply to reset with ack and vf mac address */
6659         msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
6660         memcpy(addr, vf_mac, 6);
6661         e1000_write_mbx(hw, msgbuf, 3, vf);
6662 }
6663
6664 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
6665 {
6666         /*
6667          * The VF MAC Address is stored in a packed array of bytes
6668          * starting at the second 32 bit word of the msg array
6669          */
6670         unsigned char *addr = (unsigned char *)&msg[1];
6671         int err = -1;
6672
6673         if (is_valid_ether_addr(addr))
6674                 err = igb_set_vf_mac(adapter, vf, addr);
6675
6676         return err;
6677 }
6678
6679 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
6680 {
6681         struct e1000_hw *hw = &adapter->hw;
6682         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6683         u32 msg = E1000_VT_MSGTYPE_NACK;
6684
6685         /* if device isn't clear to send it shouldn't be reading either */
6686         if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
6687             time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
6688                 e1000_write_mbx(hw, &msg, 1, vf);
6689                 vf_data->last_nack = jiffies;
6690         }
6691 }
6692
6693 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
6694 {
6695         struct pci_dev *pdev = adapter->pdev;
6696         u32 msgbuf[E1000_VFMAILBOX_SIZE];
6697         struct e1000_hw *hw = &adapter->hw;
6698         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6699         s32 retval;
6700
6701         retval = e1000_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf);
6702
6703         if (retval) {
6704                 dev_err(pci_dev_to_dev(pdev), "Error receiving message from VF\n");
6705                 return;
6706         }
6707
6708         /* this is a message we already processed, do nothing */
6709         if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
6710                 return;
6711
6712         /*
6713          * until the vf completes a reset it should not be
6714          * allowed to start any configuration.
6715          */
6716
6717         if (msgbuf[0] == E1000_VF_RESET) {
6718                 igb_vf_reset_msg(adapter, vf);
6719                 return;
6720         }
6721
6722         if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
6723                 msgbuf[0] = E1000_VT_MSGTYPE_NACK;
6724                 if (time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
6725                         e1000_write_mbx(hw, msgbuf, 1, vf);
6726                         vf_data->last_nack = jiffies;
6727                 }
6728                 return;
6729         }
6730
6731         switch ((msgbuf[0] & 0xFFFF)) {
6732         case E1000_VF_SET_MAC_ADDR:
6733                 retval = -EINVAL;
6734 #ifndef IGB_DISABLE_VF_MAC_SET
6735                 if (!(vf_data->flags & IGB_VF_FLAG_PF_SET_MAC))
6736                         retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
6737                 else
6738                         DPRINTK(DRV, INFO,
6739                                 "VF %d attempted to override administratively "
6740                                 "set MAC address\nReload the VF driver to "
6741                                 "resume operations\n", vf);
6742 #endif
6743                 break;
6744         case E1000_VF_SET_PROMISC:
6745                 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
6746                 break;
6747         case E1000_VF_SET_MULTICAST:
6748                 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
6749                 break;
6750         case E1000_VF_SET_LPE:
6751                 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
6752                 break;
6753         case E1000_VF_SET_VLAN:
6754                 retval = -1;
6755 #ifdef IFLA_VF_MAX
6756                 if (vf_data->pf_vlan)
6757                         DPRINTK(DRV, INFO,
6758                                 "VF %d attempted to override administratively "
6759                                 "set VLAN tag\nReload the VF driver to "
6760                                 "resume operations\n", vf);
6761                 else
6762 #endif
6763                         retval = igb_set_vf_vlan(adapter, msgbuf, vf);
6764                 break;
6765         default:
6766                 dev_err(pci_dev_to_dev(pdev), "Unhandled Msg %08x\n", msgbuf[0]);
6767                 retval = -E1000_ERR_MBX;
6768                 break;
6769         }
6770
6771         /* notify the VF of the results of what it sent us */
6772         if (retval)
6773                 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
6774         else
6775                 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
6776
6777         msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
6778
6779         e1000_write_mbx(hw, msgbuf, 1, vf);
6780 }
6781
6782 static void igb_msg_task(struct igb_adapter *adapter)
6783 {
6784         struct e1000_hw *hw = &adapter->hw;
6785         u32 vf;
6786
6787         for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
6788                 /* process any reset requests */
6789                 if (!e1000_check_for_rst(hw, vf))
6790                         igb_vf_reset_event(adapter, vf);
6791
6792                 /* process any messages pending */
6793                 if (!e1000_check_for_msg(hw, vf))
6794                         igb_rcv_msg_from_vf(adapter, vf);
6795
6796                 /* process any acks */
6797                 if (!e1000_check_for_ack(hw, vf))
6798                         igb_rcv_ack_from_vf(adapter, vf);
6799         }
6800 }
6801
6802 /**
6803  *  igb_set_uta - Set unicast filter table address
6804  *  @adapter: board private structure
6805  *
6806  *  The unicast table address is a register array of 32-bit registers.
6807  *  The table is meant to be used in a way similar to how the MTA is used
6808  *  however due to certain limitations in the hardware it is necessary to
6809  *  set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
6810  *  enable bit to allow vlan tag stripping when promiscuous mode is enabled
6811  **/
6812 static void igb_set_uta(struct igb_adapter *adapter)
6813 {
6814         struct e1000_hw *hw = &adapter->hw;
6815         int i;
6816
6817         /* The UTA table only exists on 82576 hardware and newer */
6818         if (hw->mac.type < e1000_82576)
6819                 return;
6820
6821         /* we only need to do this if VMDq is enabled */
6822         if (!adapter->vmdq_pools)
6823                 return;
6824
6825         for (i = 0; i < hw->mac.uta_reg_count; i++)
6826                 E1000_WRITE_REG_ARRAY(hw, E1000_UTA, i, ~0);
6827 }
6828
6829 /**
6830  * igb_intr_msi - Interrupt Handler
6831  * @irq: interrupt number
6832  * @data: pointer to a network interface device structure
6833  **/
6834 static irqreturn_t igb_intr_msi(int irq, void *data)
6835 {
6836         struct igb_adapter *adapter = data;
6837         struct igb_q_vector *q_vector = adapter->q_vector[0];
6838         struct e1000_hw *hw = &adapter->hw;
6839         /* read ICR disables interrupts using IAM */
6840         u32 icr = E1000_READ_REG(hw, E1000_ICR);
6841
6842         igb_write_itr(q_vector);
6843
6844         if (icr & E1000_ICR_DRSTA)
6845                 schedule_work(&adapter->reset_task);
6846
6847         if (icr & E1000_ICR_DOUTSYNC) {
6848                 /* HW is reporting DMA is out of sync */
6849                 adapter->stats.doosync++;
6850         }
6851
6852         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6853                 hw->mac.get_link_status = 1;
6854                 if (!test_bit(__IGB_DOWN, &adapter->state))
6855                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6856         }
6857
6858 #ifdef HAVE_PTP_1588_CLOCK
6859         if (icr & E1000_ICR_TS) {
6860                 u32 tsicr = E1000_READ_REG(hw, E1000_TSICR);
6861
6862                 if (tsicr & E1000_TSICR_TXTS) {
6863                         /* acknowledge the interrupt */
6864                         E1000_WRITE_REG(hw, E1000_TSICR, E1000_TSICR_TXTS);
6865                         /* retrieve hardware timestamp */
6866                         schedule_work(&adapter->ptp_tx_work);
6867                 }
6868         }
6869 #endif /* HAVE_PTP_1588_CLOCK */
6870
6871         napi_schedule(&q_vector->napi);
6872
6873         return IRQ_HANDLED;
6874 }
6875
6876 /**
6877  * igb_intr - Legacy Interrupt Handler
6878  * @irq: interrupt number
6879  * @data: pointer to a network interface device structure
6880  **/
6881 static irqreturn_t igb_intr(int irq, void *data)
6882 {
6883         struct igb_adapter *adapter = data;
6884         struct igb_q_vector *q_vector = adapter->q_vector[0];
6885         struct e1000_hw *hw = &adapter->hw;
6886         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
6887          * need for the IMC write */
6888         u32 icr = E1000_READ_REG(hw, E1000_ICR);
6889
6890         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
6891          * not set, then the adapter didn't send an interrupt */
6892         if (!(icr & E1000_ICR_INT_ASSERTED))
6893                 return IRQ_NONE;
6894
6895         igb_write_itr(q_vector);
6896
6897         if (icr & E1000_ICR_DRSTA)
6898                 schedule_work(&adapter->reset_task);
6899
6900         if (icr & E1000_ICR_DOUTSYNC) {
6901                 /* HW is reporting DMA is out of sync */
6902                 adapter->stats.doosync++;
6903         }
6904
6905         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6906                 hw->mac.get_link_status = 1;
6907                 /* guard against interrupt when we're going down */
6908                 if (!test_bit(__IGB_DOWN, &adapter->state))
6909                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6910         }
6911
6912 #ifdef HAVE_PTP_1588_CLOCK
6913         if (icr & E1000_ICR_TS) {
6914                 u32 tsicr = E1000_READ_REG(hw, E1000_TSICR);
6915
6916                 if (tsicr & E1000_TSICR_TXTS) {
6917                         /* acknowledge the interrupt */
6918                         E1000_WRITE_REG(hw, E1000_TSICR, E1000_TSICR_TXTS);
6919                         /* retrieve hardware timestamp */
6920                         schedule_work(&adapter->ptp_tx_work);
6921                 }
6922         }
6923 #endif /* HAVE_PTP_1588_CLOCK */
6924
6925         napi_schedule(&q_vector->napi);
6926
6927         return IRQ_HANDLED;
6928 }
6929
6930 void igb_ring_irq_enable(struct igb_q_vector *q_vector)
6931 {
6932         struct igb_adapter *adapter = q_vector->adapter;
6933         struct e1000_hw *hw = &adapter->hw;
6934
6935         if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
6936             (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
6937                 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
6938                         igb_set_itr(q_vector);
6939                 else
6940                         igb_update_ring_itr(q_vector);
6941         }
6942
6943         if (!test_bit(__IGB_DOWN, &adapter->state)) {
6944                 if (adapter->msix_entries)
6945                         E1000_WRITE_REG(hw, E1000_EIMS, q_vector->eims_value);
6946                 else
6947                         igb_irq_enable(adapter);
6948         }
6949 }
6950
6951 /**
6952  * igb_poll - NAPI Rx polling callback
6953  * @napi: napi polling structure
6954  * @budget: count of how many packets we should handle
6955  **/
6956 static int igb_poll(struct napi_struct *napi, int budget)
6957 {
6958         struct igb_q_vector *q_vector = container_of(napi, struct igb_q_vector, napi);
6959         bool clean_complete = true;
6960
6961 #ifdef IGB_DCA
6962         if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
6963                 igb_update_dca(q_vector);
6964 #endif
6965         if (q_vector->tx.ring)
6966                 clean_complete = igb_clean_tx_irq(q_vector);
6967
6968         if (q_vector->rx.ring)
6969                 clean_complete &= igb_clean_rx_irq(q_vector, budget);
6970
6971 #ifndef HAVE_NETDEV_NAPI_LIST
6972         /* if netdev is disabled we need to stop polling */
6973         if (!netif_running(q_vector->adapter->netdev))
6974                 clean_complete = true;
6975
6976 #endif
6977         /* If all work not completed, return budget and keep polling */
6978         if (!clean_complete)
6979                 return budget;
6980
6981         /* If not enough Rx work done, exit the polling mode */
6982         napi_complete(napi);
6983         igb_ring_irq_enable(q_vector);
6984
6985         return 0;
6986 }
6987
6988 /**
6989  * igb_clean_tx_irq - Reclaim resources after transmit completes
6990  * @q_vector: pointer to q_vector containing needed info
6991  * returns TRUE if ring is completely cleaned
6992  **/
6993 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector)
6994 {
6995         struct igb_adapter *adapter = q_vector->adapter;
6996         struct igb_ring *tx_ring = q_vector->tx.ring;
6997         struct igb_tx_buffer *tx_buffer;
6998         union e1000_adv_tx_desc *tx_desc;
6999         unsigned int total_bytes = 0, total_packets = 0;
7000         unsigned int budget = q_vector->tx.work_limit;
7001         unsigned int i = tx_ring->next_to_clean;
7002
7003         if (test_bit(__IGB_DOWN, &adapter->state))
7004                 return true;
7005
7006         tx_buffer = &tx_ring->tx_buffer_info[i];
7007         tx_desc = IGB_TX_DESC(tx_ring, i);
7008         i -= tx_ring->count;
7009
7010         do {
7011                 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
7012
7013                 /* if next_to_watch is not set then there is no work pending */
7014                 if (!eop_desc)
7015                         break;
7016
7017                 /* prevent any other reads prior to eop_desc */
7018                 read_barrier_depends();
7019
7020                 /* if DD is not set pending work has not been completed */
7021                 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
7022                         break;
7023
7024                 /* clear next_to_watch to prevent false hangs */
7025                 tx_buffer->next_to_watch = NULL;
7026
7027                 /* update the statistics for this packet */
7028                 total_bytes += tx_buffer->bytecount;
7029                 total_packets += tx_buffer->gso_segs;
7030
7031                 /* free the skb */
7032                 dev_kfree_skb_any(tx_buffer->skb);
7033
7034                 /* unmap skb header data */
7035                 dma_unmap_single(tx_ring->dev,
7036                                  dma_unmap_addr(tx_buffer, dma),
7037                                  dma_unmap_len(tx_buffer, len),
7038                                  DMA_TO_DEVICE);
7039
7040                 /* clear tx_buffer data */
7041                 tx_buffer->skb = NULL;
7042                 dma_unmap_len_set(tx_buffer, len, 0);
7043
7044                 /* clear last DMA location and unmap remaining buffers */
7045                 while (tx_desc != eop_desc) {
7046                         tx_buffer++;
7047                         tx_desc++;
7048                         i++;
7049                         if (unlikely(!i)) {
7050                                 i -= tx_ring->count;
7051                                 tx_buffer = tx_ring->tx_buffer_info;
7052                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
7053                         }
7054
7055                         /* unmap any remaining paged data */
7056                         if (dma_unmap_len(tx_buffer, len)) {
7057                                 dma_unmap_page(tx_ring->dev,
7058                                                dma_unmap_addr(tx_buffer, dma),
7059                                                dma_unmap_len(tx_buffer, len),
7060                                                DMA_TO_DEVICE);
7061                                 dma_unmap_len_set(tx_buffer, len, 0);
7062                         }
7063                 }
7064
7065                 /* move us one more past the eop_desc for start of next pkt */
7066                 tx_buffer++;
7067                 tx_desc++;
7068                 i++;
7069                 if (unlikely(!i)) {
7070                         i -= tx_ring->count;
7071                         tx_buffer = tx_ring->tx_buffer_info;
7072                         tx_desc = IGB_TX_DESC(tx_ring, 0);
7073                 }
7074
7075                 /* issue prefetch for next Tx descriptor */
7076                 prefetch(tx_desc);
7077
7078                 /* update budget accounting */
7079                 budget--;
7080         } while (likely(budget));
7081
7082         netdev_tx_completed_queue(txring_txq(tx_ring),
7083                                   total_packets, total_bytes);
7084
7085         i += tx_ring->count;
7086         tx_ring->next_to_clean = i;
7087         tx_ring->tx_stats.bytes += total_bytes;
7088         tx_ring->tx_stats.packets += total_packets;
7089         q_vector->tx.total_bytes += total_bytes;
7090         q_vector->tx.total_packets += total_packets;
7091
7092 #ifdef DEBUG
7093         if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags) &&
7094             !(adapter->disable_hw_reset && adapter->tx_hang_detected)) {
7095 #else
7096         if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
7097 #endif
7098                 struct e1000_hw *hw = &adapter->hw;
7099
7100                 /* Detect a transmit hang in hardware, this serializes the
7101                  * check with the clearing of time_stamp and movement of i */
7102                 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
7103                 if (tx_buffer->next_to_watch &&
7104                     time_after(jiffies, tx_buffer->time_stamp +
7105                                (adapter->tx_timeout_factor * HZ))
7106                     && !(E1000_READ_REG(hw, E1000_STATUS) &
7107                          E1000_STATUS_TXOFF)) {
7108
7109                         /* detected Tx unit hang */
7110 #ifdef DEBUG
7111                         adapter->tx_hang_detected = TRUE;
7112                         if (adapter->disable_hw_reset) {
7113                                 DPRINTK(DRV, WARNING,
7114                                         "Deactivating netdev watchdog timer\n");
7115                                 if (del_timer(&netdev_ring(tx_ring)->watchdog_timer))
7116                                         dev_put(netdev_ring(tx_ring));
7117 #ifndef HAVE_NET_DEVICE_OPS
7118                                 netdev_ring(tx_ring)->tx_timeout = NULL;
7119 #endif
7120                         }
7121 #endif /* DEBUG */
7122                         dev_err(tx_ring->dev,
7123                                 "Detected Tx Unit Hang\n"
7124                                 "  Tx Queue             <%d>\n"
7125                                 "  TDH                  <%x>\n"
7126                                 "  TDT                  <%x>\n"
7127                                 "  next_to_use          <%x>\n"
7128                                 "  next_to_clean        <%x>\n"
7129                                 "buffer_info[next_to_clean]\n"
7130                                 "  time_stamp           <%lx>\n"
7131                                 "  next_to_watch        <%p>\n"
7132                                 "  jiffies              <%lx>\n"
7133                                 "  desc.status          <%x>\n",
7134                                 tx_ring->queue_index,
7135                                 E1000_READ_REG(hw, E1000_TDH(tx_ring->reg_idx)),
7136                                 readl(tx_ring->tail),
7137                                 tx_ring->next_to_use,
7138                                 tx_ring->next_to_clean,
7139                                 tx_buffer->time_stamp,
7140                                 tx_buffer->next_to_watch,
7141                                 jiffies,
7142                                 tx_buffer->next_to_watch->wb.status);
7143                         if (netif_is_multiqueue(netdev_ring(tx_ring)))
7144                                 netif_stop_subqueue(netdev_ring(tx_ring),
7145                                                     ring_queue_index(tx_ring));
7146                         else
7147                                 netif_stop_queue(netdev_ring(tx_ring));
7148
7149                         /* we are about to reset, no point in enabling stuff */
7150                         return true;
7151                 }
7152         }
7153
7154 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
7155         if (unlikely(total_packets &&
7156                      netif_carrier_ok(netdev_ring(tx_ring)) &&
7157                      igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
7158                 /* Make sure that anybody stopping the queue after this
7159                  * sees the new next_to_clean.
7160                  */
7161                 smp_mb();
7162                 if (netif_is_multiqueue(netdev_ring(tx_ring))) {
7163                         if (__netif_subqueue_stopped(netdev_ring(tx_ring),
7164                                                      ring_queue_index(tx_ring)) &&
7165                             !(test_bit(__IGB_DOWN, &adapter->state))) {
7166                                 netif_wake_subqueue(netdev_ring(tx_ring),
7167                                                     ring_queue_index(tx_ring));
7168                                 tx_ring->tx_stats.restart_queue++;
7169                         }
7170                 } else {
7171                         if (netif_queue_stopped(netdev_ring(tx_ring)) &&
7172                             !(test_bit(__IGB_DOWN, &adapter->state))) {
7173                                 netif_wake_queue(netdev_ring(tx_ring));
7174                                 tx_ring->tx_stats.restart_queue++;
7175                         }
7176                 }
7177         }
7178
7179         return !!budget;
7180 }
7181
7182 #ifdef HAVE_VLAN_RX_REGISTER
7183 /**
7184  * igb_receive_skb - helper function to handle rx indications
7185  * @q_vector: structure containing interrupt and ring information
7186  * @skb: packet to send up
7187  **/
7188 static void igb_receive_skb(struct igb_q_vector *q_vector,
7189                             struct sk_buff *skb)
7190 {
7191         struct vlan_group **vlgrp = netdev_priv(skb->dev);
7192
7193         if (IGB_CB(skb)->vid) {
7194                 if (*vlgrp) {
7195                         vlan_gro_receive(&q_vector->napi, *vlgrp,
7196                                          IGB_CB(skb)->vid, skb);
7197                 } else {
7198                         dev_kfree_skb_any(skb);
7199                 }
7200         } else {
7201                 napi_gro_receive(&q_vector->napi, skb);
7202         }
7203 }
7204
7205 #endif /* HAVE_VLAN_RX_REGISTER */
7206 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7207 /**
7208  * igb_reuse_rx_page - page flip buffer and store it back on the ring
7209  * @rx_ring: rx descriptor ring to store buffers on
7210  * @old_buff: donor buffer to have page reused
7211  *
7212  * Synchronizes page for reuse by the adapter
7213  **/
7214 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
7215                               struct igb_rx_buffer *old_buff)
7216 {
7217         struct igb_rx_buffer *new_buff;
7218         u16 nta = rx_ring->next_to_alloc;
7219
7220         new_buff = &rx_ring->rx_buffer_info[nta];
7221
7222         /* update, and store next to alloc */
7223         nta++;
7224         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
7225
7226         /* transfer page from old buffer to new buffer */
7227         memcpy(new_buff, old_buff, sizeof(struct igb_rx_buffer));
7228
7229         /* sync the buffer for use by the device */
7230         dma_sync_single_range_for_device(rx_ring->dev, old_buff->dma,
7231                                          old_buff->page_offset,
7232                                          IGB_RX_BUFSZ,
7233                                          DMA_FROM_DEVICE);
7234 }
7235
7236 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer,
7237                                   struct page *page,
7238                                   unsigned int truesize)
7239 {
7240         /* avoid re-using remote pages */
7241         if (unlikely(page_to_nid(page) != numa_node_id()))
7242                 return false;
7243
7244 #if (PAGE_SIZE < 8192)
7245         /* if we are only owner of page we can reuse it */
7246         if (unlikely(page_count(page) != 1))
7247                 return false;
7248
7249         /* flip page offset to other buffer */
7250         rx_buffer->page_offset ^= IGB_RX_BUFSZ;
7251
7252 #else
7253         /* move offset up to the next cache line */
7254         rx_buffer->page_offset += truesize;
7255
7256         if (rx_buffer->page_offset > (PAGE_SIZE - IGB_RX_BUFSZ))
7257                 return false;
7258 #endif
7259
7260         /* bump ref count on page before it is given to the stack */
7261         get_page(page);
7262
7263         return true;
7264 }
7265
7266 /**
7267  * igb_add_rx_frag - Add contents of Rx buffer to sk_buff
7268  * @rx_ring: rx descriptor ring to transact packets on
7269  * @rx_buffer: buffer containing page to add
7270  * @rx_desc: descriptor containing length of buffer written by hardware
7271  * @skb: sk_buff to place the data into
7272  *
7273  * This function will add the data contained in rx_buffer->page to the skb.
7274  * This is done either through a direct copy if the data in the buffer is
7275  * less than the skb header size, otherwise it will just attach the page as
7276  * a frag to the skb.
7277  *
7278  * The function will then update the page offset if necessary and return
7279  * true if the buffer can be reused by the adapter.
7280  **/
7281 static bool igb_add_rx_frag(struct igb_ring *rx_ring,
7282                             struct igb_rx_buffer *rx_buffer,
7283                             union e1000_adv_rx_desc *rx_desc,
7284                             struct sk_buff *skb)
7285 {
7286         struct page *page = rx_buffer->page;
7287         unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
7288 #if (PAGE_SIZE < 8192)
7289         unsigned int truesize = IGB_RX_BUFSZ;
7290 #else
7291         unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
7292 #endif
7293
7294         if ((size <= IGB_RX_HDR_LEN) && !skb_is_nonlinear(skb)) {
7295                 unsigned char *va = page_address(page) + rx_buffer->page_offset;
7296
7297 #ifdef HAVE_PTP_1588_CLOCK
7298                 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
7299                         igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
7300                         va += IGB_TS_HDR_LEN;
7301                         size -= IGB_TS_HDR_LEN;
7302                 }
7303 #endif /* HAVE_PTP_1588_CLOCK */
7304
7305                 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
7306
7307                 /* we can reuse buffer as-is, just make sure it is local */
7308                 if (likely(page_to_nid(page) == numa_node_id()))
7309                         return true;
7310
7311                 /* this page cannot be reused so discard it */
7312                 put_page(page);
7313                 return false;
7314         }
7315
7316         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
7317                         rx_buffer->page_offset, size, truesize);
7318
7319         return igb_can_reuse_rx_page(rx_buffer, page, truesize);
7320 }
7321
7322 static struct sk_buff *igb_fetch_rx_buffer(struct igb_ring *rx_ring,
7323                                            union e1000_adv_rx_desc *rx_desc,
7324                                            struct sk_buff *skb)
7325 {
7326         struct igb_rx_buffer *rx_buffer;
7327         struct page *page;
7328
7329         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
7330
7331         page = rx_buffer->page;
7332         prefetchw(page);
7333
7334         if (likely(!skb)) {
7335                 void *page_addr = page_address(page) +
7336                                   rx_buffer->page_offset;
7337
7338                 /* prefetch first cache line of first page */
7339                 prefetch(page_addr);
7340 #if L1_CACHE_BYTES < 128
7341                 prefetch(page_addr + L1_CACHE_BYTES);
7342 #endif
7343
7344                 /* allocate a skb to store the frags */
7345                 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
7346                                                 IGB_RX_HDR_LEN);
7347                 if (unlikely(!skb)) {
7348                         rx_ring->rx_stats.alloc_failed++;
7349                         return NULL;
7350                 }
7351
7352                 /*
7353                  * we will be copying header into skb->data in
7354                  * pskb_may_pull so it is in our interest to prefetch
7355                  * it now to avoid a possible cache miss
7356                  */
7357                 prefetchw(skb->data);
7358         }
7359
7360         /* we are reusing so sync this buffer for CPU use */
7361         dma_sync_single_range_for_cpu(rx_ring->dev,
7362                                       rx_buffer->dma,
7363                                       rx_buffer->page_offset,
7364                                       IGB_RX_BUFSZ,
7365                                       DMA_FROM_DEVICE);
7366
7367         /* pull page into skb */
7368         if (igb_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
7369                 /* hand second half of page back to the ring */
7370                 igb_reuse_rx_page(rx_ring, rx_buffer);
7371         } else {
7372                 /* we are not reusing the buffer so unmap it */
7373                 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
7374                                PAGE_SIZE, DMA_FROM_DEVICE);
7375         }
7376
7377         /* clear contents of rx_buffer */
7378         rx_buffer->page = NULL;
7379
7380         return skb;
7381 }
7382
7383 #endif
7384 static inline void igb_rx_checksum(struct igb_ring *ring,
7385                                    union e1000_adv_rx_desc *rx_desc,
7386                                    struct sk_buff *skb)
7387 {
7388         skb_checksum_none_assert(skb);
7389
7390         /* Ignore Checksum bit is set */
7391         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
7392                 return;
7393
7394         /* Rx checksum disabled via ethtool */
7395         if (!(netdev_ring(ring)->features & NETIF_F_RXCSUM))
7396                 return;
7397
7398         /* TCP/UDP checksum error bit is set */
7399         if (igb_test_staterr(rx_desc,
7400                              E1000_RXDEXT_STATERR_TCPE |
7401                              E1000_RXDEXT_STATERR_IPE)) {
7402                 /*
7403                  * work around errata with sctp packets where the TCPE aka
7404                  * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
7405                  * packets, (aka let the stack check the crc32c)
7406                  */
7407                 if (!((skb->len == 60) &&
7408                       test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags)))
7409                         ring->rx_stats.csum_err++;
7410
7411                 /* let the stack verify checksum errors */
7412                 return;
7413         }
7414         /* It must be a TCP or UDP packet with a valid checksum */
7415         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
7416                                       E1000_RXD_STAT_UDPCS))
7417                 skb->ip_summed = CHECKSUM_UNNECESSARY;
7418 }
7419
7420 #ifdef NETIF_F_RXHASH
7421 static inline void igb_rx_hash(struct igb_ring *ring,
7422                                union e1000_adv_rx_desc *rx_desc,
7423                                struct sk_buff *skb)
7424 {
7425         if (netdev_ring(ring)->features & NETIF_F_RXHASH)
7426                 skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
7427                              PKT_HASH_TYPE_L3);
7428 }
7429
7430 #endif
7431 #ifndef IGB_NO_LRO
7432 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7433 /**
7434  * igb_merge_active_tail - merge active tail into lro skb
7435  * @tail: pointer to active tail in frag_list
7436  *
7437  * This function merges the length and data of an active tail into the
7438  * skb containing the frag_list.  It resets the tail's pointer to the head,
7439  * but it leaves the heads pointer to tail intact.
7440  **/
7441 static inline struct sk_buff *igb_merge_active_tail(struct sk_buff *tail)
7442 {
7443         struct sk_buff *head = IGB_CB(tail)->head;
7444
7445         if (!head)
7446                 return tail;
7447
7448         head->len += tail->len;
7449         head->data_len += tail->len;
7450         head->truesize += tail->len;
7451
7452         IGB_CB(tail)->head = NULL;
7453
7454         return head;
7455 }
7456
7457 /**
7458  * igb_add_active_tail - adds an active tail into the skb frag_list
7459  * @head: pointer to the start of the skb
7460  * @tail: pointer to active tail to add to frag_list
7461  *
7462  * This function adds an active tail to the end of the frag list.  This tail
7463  * will still be receiving data so we cannot yet ad it's stats to the main
7464  * skb.  That is done via igb_merge_active_tail.
7465  **/
7466 static inline void igb_add_active_tail(struct sk_buff *head, struct sk_buff *tail)
7467 {
7468         struct sk_buff *old_tail = IGB_CB(head)->tail;
7469
7470         if (old_tail) {
7471                 igb_merge_active_tail(old_tail);
7472                 old_tail->next = tail;
7473         } else {
7474                 skb_shinfo(head)->frag_list = tail;
7475         }
7476
7477         IGB_CB(tail)->head = head;
7478         IGB_CB(head)->tail = tail;
7479
7480         IGB_CB(head)->append_cnt++;
7481 }
7482
7483 /**
7484  * igb_close_active_frag_list - cleanup pointers on a frag_list skb
7485  * @head: pointer to head of an active frag list
7486  *
7487  * This function will clear the frag_tail_tracker pointer on an active
7488  * frag_list and returns true if the pointer was actually set
7489  **/
7490 static inline bool igb_close_active_frag_list(struct sk_buff *head)
7491 {
7492         struct sk_buff *tail = IGB_CB(head)->tail;
7493
7494         if (!tail)
7495                 return false;
7496
7497         igb_merge_active_tail(tail);
7498
7499         IGB_CB(head)->tail = NULL;
7500
7501         return true;
7502 }
7503
7504 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
7505 /**
7506  * igb_can_lro - returns true if packet is TCP/IPV4 and LRO is enabled
7507  * @adapter: board private structure
7508  * @rx_desc: pointer to the rx descriptor
7509  * @skb: pointer to the skb to be merged
7510  *
7511  **/
7512 static inline bool igb_can_lro(struct igb_ring *rx_ring,
7513                                union e1000_adv_rx_desc *rx_desc,
7514                                struct sk_buff *skb)
7515 {
7516         struct iphdr *iph = (struct iphdr *)skb->data;
7517         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
7518
7519         /* verify hardware indicates this is IPv4/TCP */
7520         if((!(pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_TCP)) ||
7521             !(pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV4))))
7522                 return false;
7523
7524         /* .. and LRO is enabled */
7525         if (!(netdev_ring(rx_ring)->features & NETIF_F_LRO))
7526                 return false;
7527
7528         /* .. and we are not in promiscuous mode */
7529         if (netdev_ring(rx_ring)->flags & IFF_PROMISC)
7530                 return false;
7531
7532         /* .. and the header is large enough for us to read IP/TCP fields */
7533         if (!pskb_may_pull(skb, sizeof(struct igb_lrohdr)))
7534                 return false;
7535
7536         /* .. and there are no VLANs on packet */
7537         if (skb->protocol != __constant_htons(ETH_P_IP))
7538                 return false;
7539
7540         /* .. and we are version 4 with no options */
7541         if (*(u8 *)iph != 0x45)
7542                 return false;
7543
7544         /* .. and the packet is not fragmented */
7545         if (iph->frag_off & htons(IP_MF | IP_OFFSET))
7546                 return false;
7547
7548         /* .. and that next header is TCP */
7549         if (iph->protocol != IPPROTO_TCP)
7550                 return false;
7551
7552         return true;
7553 }
7554
7555 static inline struct igb_lrohdr *igb_lro_hdr(struct sk_buff *skb)
7556 {
7557         return (struct igb_lrohdr *)skb->data;
7558 }
7559
7560 /**
7561  * igb_lro_flush - Indicate packets to upper layer.
7562  *
7563  * Update IP and TCP header part of head skb if more than one
7564  * skb's chained and indicate packets to upper layer.
7565  **/
7566 static void igb_lro_flush(struct igb_q_vector *q_vector,
7567                           struct sk_buff *skb)
7568 {
7569         struct igb_lro_list *lrolist = &q_vector->lrolist;
7570
7571         __skb_unlink(skb, &lrolist->active);
7572
7573         if (IGB_CB(skb)->append_cnt) {
7574                 struct igb_lrohdr *lroh = igb_lro_hdr(skb);
7575
7576 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7577                 /* close any active lro contexts */
7578                 igb_close_active_frag_list(skb);
7579
7580 #endif
7581                 /* incorporate ip header and re-calculate checksum */
7582                 lroh->iph.tot_len = ntohs(skb->len);
7583                 lroh->iph.check = 0;
7584
7585                 /* header length is 5 since we know no options exist */
7586                 lroh->iph.check = ip_fast_csum((u8 *)lroh, 5);
7587
7588                 /* clear TCP checksum to indicate we are an LRO frame */
7589                 lroh->th.check = 0;
7590
7591                 /* incorporate latest timestamp into the tcp header */
7592                 if (IGB_CB(skb)->tsecr) {
7593                         lroh->ts[2] = IGB_CB(skb)->tsecr;
7594                         lroh->ts[1] = htonl(IGB_CB(skb)->tsval);
7595                 }
7596 #ifdef NETIF_F_GSO
7597
7598                 skb_shinfo(skb)->gso_size = IGB_CB(skb)->mss;
7599                 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
7600 #endif
7601         }
7602
7603 #ifdef HAVE_VLAN_RX_REGISTER
7604         igb_receive_skb(q_vector, skb);
7605 #else
7606         napi_gro_receive(&q_vector->napi, skb);
7607 #endif
7608         lrolist->stats.flushed++;
7609 }
7610
7611 static void igb_lro_flush_all(struct igb_q_vector *q_vector)
7612 {
7613         struct igb_lro_list *lrolist = &q_vector->lrolist;
7614         struct sk_buff *skb, *tmp;
7615
7616         skb_queue_reverse_walk_safe(&lrolist->active, skb, tmp)
7617                 igb_lro_flush(q_vector, skb);
7618 }
7619
7620 /*
7621  * igb_lro_header_ok - Main LRO function.
7622  **/
7623 static void igb_lro_header_ok(struct sk_buff *skb)
7624 {
7625         struct igb_lrohdr *lroh = igb_lro_hdr(skb);
7626         u16 opt_bytes, data_len;
7627
7628 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7629         IGB_CB(skb)->tail = NULL;
7630 #endif
7631         IGB_CB(skb)->tsecr = 0;
7632         IGB_CB(skb)->append_cnt = 0;
7633         IGB_CB(skb)->mss = 0;
7634
7635         /* ensure that the checksum is valid */
7636         if (skb->ip_summed != CHECKSUM_UNNECESSARY)
7637                 return;
7638
7639         /* If we see CE codepoint in IP header, packet is not mergeable */
7640         if (INET_ECN_is_ce(ipv4_get_dsfield(&lroh->iph)))
7641                 return;
7642
7643         /* ensure no bits set besides ack or psh */
7644         if (lroh->th.fin || lroh->th.syn || lroh->th.rst ||
7645             lroh->th.urg || lroh->th.ece || lroh->th.cwr ||
7646             !lroh->th.ack)
7647                 return;
7648
7649         /* store the total packet length */
7650         data_len = ntohs(lroh->iph.tot_len);
7651
7652         /* remove any padding from the end of the skb */
7653         __pskb_trim(skb, data_len);
7654
7655         /* remove header length from data length */
7656         data_len -= sizeof(struct igb_lrohdr);
7657
7658         /*
7659          * check for timestamps. Since the only option we handle are timestamps,
7660          * we only have to handle the simple case of aligned timestamps
7661          */
7662         opt_bytes = (lroh->th.doff << 2) - sizeof(struct tcphdr);
7663         if (opt_bytes != 0) {
7664                 if ((opt_bytes != TCPOLEN_TSTAMP_ALIGNED) ||
7665                     !pskb_may_pull(skb, sizeof(struct igb_lrohdr) +
7666                                         TCPOLEN_TSTAMP_ALIGNED) ||
7667                     (lroh->ts[0] != htonl((TCPOPT_NOP << 24) |
7668                                              (TCPOPT_NOP << 16) |
7669                                              (TCPOPT_TIMESTAMP << 8) |
7670                                               TCPOLEN_TIMESTAMP)) ||
7671                     (lroh->ts[2] == 0)) {
7672                         return;
7673                 }
7674
7675                 IGB_CB(skb)->tsval = ntohl(lroh->ts[1]);
7676                 IGB_CB(skb)->tsecr = lroh->ts[2];
7677
7678                 data_len -= TCPOLEN_TSTAMP_ALIGNED;
7679         }
7680
7681         /* record data_len as mss for the packet */
7682         IGB_CB(skb)->mss = data_len;
7683         IGB_CB(skb)->next_seq = ntohl(lroh->th.seq);
7684 }
7685
7686 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7687 static void igb_merge_frags(struct sk_buff *lro_skb, struct sk_buff *new_skb)
7688 {
7689         struct skb_shared_info *sh_info;
7690         struct skb_shared_info *new_skb_info;
7691         unsigned int data_len;
7692
7693         sh_info = skb_shinfo(lro_skb);
7694         new_skb_info = skb_shinfo(new_skb);
7695
7696         /* copy frags into the last skb */
7697         memcpy(sh_info->frags + sh_info->nr_frags,
7698                new_skb_info->frags,
7699                new_skb_info->nr_frags * sizeof(skb_frag_t));
7700
7701         /* copy size data over */
7702         sh_info->nr_frags += new_skb_info->nr_frags;
7703         data_len = IGB_CB(new_skb)->mss;
7704         lro_skb->len += data_len;
7705         lro_skb->data_len += data_len;
7706         lro_skb->truesize += data_len;
7707
7708         /* wipe record of data from new_skb */
7709         new_skb_info->nr_frags = 0;
7710         new_skb->len = new_skb->data_len = 0;
7711         dev_kfree_skb_any(new_skb);
7712 }
7713
7714 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
7715 /**
7716  * igb_lro_receive - if able, queue skb into lro chain
7717  * @q_vector: structure containing interrupt and ring information
7718  * @new_skb: pointer to current skb being checked
7719  *
7720  * Checks whether the skb given is eligible for LRO and if that's
7721  * fine chains it to the existing lro_skb based on flowid. If an LRO for
7722  * the flow doesn't exist create one.
7723  **/
7724 static void igb_lro_receive(struct igb_q_vector *q_vector,
7725                             struct sk_buff *new_skb)
7726 {
7727         struct sk_buff *lro_skb;
7728         struct igb_lro_list *lrolist = &q_vector->lrolist;
7729         struct igb_lrohdr *lroh = igb_lro_hdr(new_skb);
7730         __be32 saddr = lroh->iph.saddr;
7731         __be32 daddr = lroh->iph.daddr;
7732         __be32 tcp_ports = *(__be32 *)&lroh->th;
7733         u16 data_len;
7734 #ifdef HAVE_VLAN_RX_REGISTER
7735         u16 vid = IGB_CB(new_skb)->vid;
7736 #else
7737         u16 vid = new_skb->vlan_tci;
7738 #endif
7739
7740         igb_lro_header_ok(new_skb);
7741
7742         /*
7743          * we have a packet that might be eligible for LRO,
7744          * so see if it matches anything we might expect
7745          */
7746         skb_queue_walk(&lrolist->active, lro_skb) {
7747                 if (*(__be32 *)&igb_lro_hdr(lro_skb)->th != tcp_ports ||
7748                     igb_lro_hdr(lro_skb)->iph.saddr != saddr ||
7749                     igb_lro_hdr(lro_skb)->iph.daddr != daddr)
7750                         continue;
7751
7752 #ifdef HAVE_VLAN_RX_REGISTER
7753                 if (IGB_CB(lro_skb)->vid != vid)
7754 #else
7755                 if (lro_skb->vlan_tci != vid)
7756 #endif
7757                         continue;
7758
7759                 /* out of order packet */
7760                 if (IGB_CB(lro_skb)->next_seq != IGB_CB(new_skb)->next_seq) {
7761                         igb_lro_flush(q_vector, lro_skb);
7762                         IGB_CB(new_skb)->mss = 0;
7763                         break;
7764                 }
7765
7766                 /* TCP timestamp options have changed */
7767                 if (!IGB_CB(lro_skb)->tsecr != !IGB_CB(new_skb)->tsecr) {
7768                         igb_lro_flush(q_vector, lro_skb);
7769                         break;
7770                 }
7771
7772                 /* make sure timestamp values are increasing */
7773                 if (IGB_CB(lro_skb)->tsecr &&
7774                     IGB_CB(lro_skb)->tsval > IGB_CB(new_skb)->tsval) {
7775                         igb_lro_flush(q_vector, lro_skb);
7776                         IGB_CB(new_skb)->mss = 0;
7777                         break;
7778                 }
7779
7780                 data_len = IGB_CB(new_skb)->mss;
7781
7782                 /* Check for all of the above below
7783                  *   malformed header
7784                  *   no tcp data
7785                  *   resultant packet would be too large
7786                  *   new skb is larger than our current mss
7787                  *   data would remain in header
7788                  *   we would consume more frags then the sk_buff contains
7789                  *   ack sequence numbers changed
7790                  *   window size has changed
7791                  */
7792                 if (data_len == 0 ||
7793                     data_len > IGB_CB(lro_skb)->mss ||
7794                     data_len > IGB_CB(lro_skb)->free ||
7795 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7796                     data_len != new_skb->data_len ||
7797                     skb_shinfo(new_skb)->nr_frags >=
7798                     (MAX_SKB_FRAGS - skb_shinfo(lro_skb)->nr_frags) ||
7799 #endif
7800                     igb_lro_hdr(lro_skb)->th.ack_seq != lroh->th.ack_seq ||
7801                     igb_lro_hdr(lro_skb)->th.window != lroh->th.window) {
7802                         igb_lro_flush(q_vector, lro_skb);
7803                         break;
7804                 }
7805
7806                 /* Remove IP and TCP header*/
7807                 skb_pull(new_skb, new_skb->len - data_len);
7808
7809                 /* update timestamp and timestamp echo response */
7810                 IGB_CB(lro_skb)->tsval = IGB_CB(new_skb)->tsval;
7811                 IGB_CB(lro_skb)->tsecr = IGB_CB(new_skb)->tsecr;
7812
7813                 /* update sequence and free space */
7814                 IGB_CB(lro_skb)->next_seq += data_len;
7815                 IGB_CB(lro_skb)->free -= data_len;
7816
7817                 /* update append_cnt */
7818                 IGB_CB(lro_skb)->append_cnt++;
7819
7820 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7821                 /* if header is empty pull pages into current skb */
7822                 igb_merge_frags(lro_skb, new_skb);
7823 #else
7824                 /* chain this new skb in frag_list */
7825                 igb_add_active_tail(lro_skb, new_skb);
7826 #endif
7827
7828                 if ((data_len < IGB_CB(lro_skb)->mss) || lroh->th.psh ||
7829                     skb_shinfo(lro_skb)->nr_frags == MAX_SKB_FRAGS) {
7830                         igb_lro_hdr(lro_skb)->th.psh |= lroh->th.psh;
7831                         igb_lro_flush(q_vector, lro_skb);
7832                 }
7833
7834                 lrolist->stats.coal++;
7835                 return;
7836         }
7837
7838         if (IGB_CB(new_skb)->mss && !lroh->th.psh) {
7839                 /* if we are at capacity flush the tail */
7840                 if (skb_queue_len(&lrolist->active) >= IGB_LRO_MAX) {
7841                         lro_skb = skb_peek_tail(&lrolist->active);
7842                         if (lro_skb)
7843                                 igb_lro_flush(q_vector, lro_skb);
7844                 }
7845
7846                 /* update sequence and free space */
7847                 IGB_CB(new_skb)->next_seq += IGB_CB(new_skb)->mss;
7848                 IGB_CB(new_skb)->free = 65521 - new_skb->len;
7849
7850                 /* .. and insert at the front of the active list */
7851                 __skb_queue_head(&lrolist->active, new_skb);
7852
7853                 lrolist->stats.coal++;
7854                 return;
7855         }
7856
7857         /* packet not handled by any of the above, pass it to the stack */
7858 #ifdef HAVE_VLAN_RX_REGISTER
7859         igb_receive_skb(q_vector, new_skb);
7860 #else
7861         napi_gro_receive(&q_vector->napi, new_skb);
7862 #endif
7863 }
7864
7865 #endif /* IGB_NO_LRO */
7866 /**
7867  * igb_process_skb_fields - Populate skb header fields from Rx descriptor
7868  * @rx_ring: rx descriptor ring packet is being transacted on
7869  * @rx_desc: pointer to the EOP Rx descriptor
7870  * @skb: pointer to current skb being populated
7871  *
7872  * This function checks the ring, descriptor, and packet information in
7873  * order to populate the hash, checksum, VLAN, timestamp, protocol, and
7874  * other fields within the skb.
7875  **/
7876 static void igb_process_skb_fields(struct igb_ring *rx_ring,
7877                                    union e1000_adv_rx_desc *rx_desc,
7878                                    struct sk_buff *skb)
7879 {
7880         struct net_device *dev = rx_ring->netdev;
7881         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
7882
7883 #ifdef NETIF_F_RXHASH
7884         igb_rx_hash(rx_ring, rx_desc, skb);
7885
7886 #endif
7887         igb_rx_checksum(rx_ring, rx_desc, skb);
7888
7889     /* update packet type stats */
7890         if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV4))
7891                 rx_ring->rx_stats.ipv4_packets++;
7892         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV4_EX))
7893                 rx_ring->rx_stats.ipv4e_packets++;
7894         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV6))
7895                 rx_ring->rx_stats.ipv6_packets++;
7896         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV6_EX))
7897                 rx_ring->rx_stats.ipv6e_packets++;
7898         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_TCP))
7899                 rx_ring->rx_stats.tcp_packets++;
7900         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_UDP))
7901                 rx_ring->rx_stats.udp_packets++;
7902         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_SCTP))
7903                 rx_ring->rx_stats.sctp_packets++;
7904         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_NFS))
7905                 rx_ring->rx_stats.nfs_packets++;
7906
7907 #ifdef HAVE_PTP_1588_CLOCK
7908         igb_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
7909 #endif /* HAVE_PTP_1588_CLOCK */
7910
7911 #ifdef NETIF_F_HW_VLAN_CTAG_RX
7912         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
7913 #else
7914         if ((dev->features & NETIF_F_HW_VLAN_RX) &&
7915 #endif
7916             igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
7917                 u16 vid = 0;
7918                 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
7919                     test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
7920                         vid = be16_to_cpu(rx_desc->wb.upper.vlan);
7921                 else
7922                         vid = le16_to_cpu(rx_desc->wb.upper.vlan);
7923 #ifdef HAVE_VLAN_RX_REGISTER
7924                 IGB_CB(skb)->vid = vid;
7925         } else {
7926                 IGB_CB(skb)->vid = 0;
7927 #else
7928
7929 #ifdef HAVE_VLAN_PROTOCOL
7930                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
7931 #else
7932                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
7933 #endif
7934
7935
7936 #endif
7937         }
7938
7939         skb_record_rx_queue(skb, rx_ring->queue_index);
7940
7941         skb->protocol = eth_type_trans(skb, dev);
7942 }
7943
7944 /**
7945  * igb_is_non_eop - process handling of non-EOP buffers
7946  * @rx_ring: Rx ring being processed
7947  * @rx_desc: Rx descriptor for current buffer
7948  *
7949  * This function updates next to clean.  If the buffer is an EOP buffer
7950  * this function exits returning false, otherwise it will place the
7951  * sk_buff in the next buffer to be chained and return true indicating
7952  * that this is in fact a non-EOP buffer.
7953  **/
7954 static bool igb_is_non_eop(struct igb_ring *rx_ring,
7955                            union e1000_adv_rx_desc *rx_desc)
7956 {
7957         u32 ntc = rx_ring->next_to_clean + 1;
7958
7959         /* fetch, update, and store next to clean */
7960         ntc = (ntc < rx_ring->count) ? ntc : 0;
7961         rx_ring->next_to_clean = ntc;
7962
7963         prefetch(IGB_RX_DESC(rx_ring, ntc));
7964
7965         if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
7966                 return false;
7967
7968         return true;
7969 }
7970
7971 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7972 /* igb_clean_rx_irq -- * legacy */
7973 static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, int budget)
7974 {
7975         struct igb_ring *rx_ring = q_vector->rx.ring;
7976         unsigned int total_bytes = 0, total_packets = 0;
7977         u16 cleaned_count = igb_desc_unused(rx_ring);
7978
7979         do {
7980                 struct igb_rx_buffer *rx_buffer;
7981                 union e1000_adv_rx_desc *rx_desc;
7982                 struct sk_buff *skb;
7983                 u16 ntc;
7984
7985                 /* return some buffers to hardware, one at a time is too slow */
7986                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
7987                         igb_alloc_rx_buffers(rx_ring, cleaned_count);
7988                         cleaned_count = 0;
7989                 }
7990
7991                 ntc = rx_ring->next_to_clean;
7992                 rx_desc = IGB_RX_DESC(rx_ring, ntc);
7993                 rx_buffer = &rx_ring->rx_buffer_info[ntc];
7994
7995                 if (!igb_test_staterr(rx_desc, E1000_RXD_STAT_DD))
7996                         break;
7997
7998                 /*
7999                  * This memory barrier is needed to keep us from reading
8000                  * any other fields out of the rx_desc until we know the
8001                  * RXD_STAT_DD bit is set
8002                  */
8003                 rmb();
8004
8005                 skb = rx_buffer->skb;
8006
8007                 prefetch(skb->data);
8008
8009                 /* pull the header of the skb in */
8010                 __skb_put(skb, le16_to_cpu(rx_desc->wb.upper.length));
8011
8012                 /* clear skb reference in buffer info structure */
8013                 rx_buffer->skb = NULL;
8014
8015                 cleaned_count++;
8016
8017                 BUG_ON(igb_is_non_eop(rx_ring, rx_desc));
8018
8019                 dma_unmap_single(rx_ring->dev, rx_buffer->dma,
8020                                  rx_ring->rx_buffer_len,
8021                                  DMA_FROM_DEVICE);
8022                 rx_buffer->dma = 0;
8023
8024                 if (igb_test_staterr(rx_desc,
8025                                      E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
8026                         dev_kfree_skb_any(skb);
8027                         continue;
8028                 }
8029
8030                 total_bytes += skb->len;
8031
8032                 /* populate checksum, timestamp, VLAN, and protocol */
8033                 igb_process_skb_fields(rx_ring, rx_desc, skb);
8034
8035 #ifndef IGB_NO_LRO
8036                 if (igb_can_lro(rx_ring, rx_desc, skb))
8037                         igb_lro_receive(q_vector, skb);
8038                 else
8039 #endif
8040 #ifdef HAVE_VLAN_RX_REGISTER
8041                         igb_receive_skb(q_vector, skb);
8042 #else
8043                         napi_gro_receive(&q_vector->napi, skb);
8044 #endif
8045
8046 #ifndef NETIF_F_GRO
8047                 netdev_ring(rx_ring)->last_rx = jiffies;
8048
8049 #endif
8050                 /* update budget accounting */
8051                 total_packets++;
8052         } while (likely(total_packets < budget));
8053
8054         rx_ring->rx_stats.packets += total_packets;
8055         rx_ring->rx_stats.bytes += total_bytes;
8056         q_vector->rx.total_packets += total_packets;
8057         q_vector->rx.total_bytes += total_bytes;
8058
8059         if (cleaned_count)
8060                 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8061
8062 #ifndef IGB_NO_LRO
8063         igb_lro_flush_all(q_vector);
8064
8065 #endif /* IGB_NO_LRO */
8066         return total_packets < budget;
8067 }
8068 #else /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8069 /**
8070  * igb_get_headlen - determine size of header for LRO/GRO
8071  * @data: pointer to the start of the headers
8072  * @max_len: total length of section to find headers in
8073  *
8074  * This function is meant to determine the length of headers that will
8075  * be recognized by hardware for LRO, and GRO offloads.  The main
8076  * motivation of doing this is to only perform one pull for IPv4 TCP
8077  * packets so that we can do basic things like calculating the gso_size
8078  * based on the average data per packet.
8079  **/
8080 static unsigned int igb_get_headlen(unsigned char *data,
8081                                     unsigned int max_len)
8082 {
8083         union {
8084                 unsigned char *network;
8085                 /* l2 headers */
8086                 struct ethhdr *eth;
8087                 struct vlan_hdr *vlan;
8088                 /* l3 headers */
8089                 struct iphdr *ipv4;
8090                 struct ipv6hdr *ipv6;
8091         } hdr;
8092         __be16 protocol;
8093         u8 nexthdr = 0; /* default to not TCP */
8094         u8 hlen;
8095
8096         /* this should never happen, but better safe than sorry */
8097         if (max_len < ETH_HLEN)
8098                 return max_len;
8099
8100         /* initialize network frame pointer */
8101         hdr.network = data;
8102
8103         /* set first protocol and move network header forward */
8104         protocol = hdr.eth->h_proto;
8105         hdr.network += ETH_HLEN;
8106
8107         /* handle any vlan tag if present */
8108         if (protocol == __constant_htons(ETH_P_8021Q)) {
8109                 if ((hdr.network - data) > (max_len - VLAN_HLEN))
8110                         return max_len;
8111
8112                 protocol = hdr.vlan->h_vlan_encapsulated_proto;
8113                 hdr.network += VLAN_HLEN;
8114         }
8115
8116         /* handle L3 protocols */
8117         if (protocol == __constant_htons(ETH_P_IP)) {
8118                 if ((hdr.network - data) > (max_len - sizeof(struct iphdr)))
8119                         return max_len;
8120
8121                 /* access ihl as a u8 to avoid unaligned access on ia64 */
8122                 hlen = (hdr.network[0] & 0x0F) << 2;
8123
8124                 /* verify hlen meets minimum size requirements */
8125                 if (hlen < sizeof(struct iphdr))
8126                         return hdr.network - data;
8127
8128                 /* record next protocol if header is present */
8129                 if (!(hdr.ipv4->frag_off & htons(IP_OFFSET)))
8130                         nexthdr = hdr.ipv4->protocol;
8131 #ifdef NETIF_F_TSO6
8132         } else if (protocol == __constant_htons(ETH_P_IPV6)) {
8133                 if ((hdr.network - data) > (max_len - sizeof(struct ipv6hdr)))
8134                         return max_len;
8135
8136                 /* record next protocol */
8137                 nexthdr = hdr.ipv6->nexthdr;
8138                 hlen = sizeof(struct ipv6hdr);
8139 #endif /* NETIF_F_TSO6 */
8140         } else {
8141                 return hdr.network - data;
8142         }
8143
8144         /* relocate pointer to start of L4 header */
8145         hdr.network += hlen;
8146
8147         /* finally sort out TCP */
8148         if (nexthdr == IPPROTO_TCP) {
8149                 if ((hdr.network - data) > (max_len - sizeof(struct tcphdr)))
8150                         return max_len;
8151
8152                 /* access doff as a u8 to avoid unaligned access on ia64 */
8153                 hlen = (hdr.network[12] & 0xF0) >> 2;
8154
8155                 /* verify hlen meets minimum size requirements */
8156                 if (hlen < sizeof(struct tcphdr))
8157                         return hdr.network - data;
8158
8159                 hdr.network += hlen;
8160         } else if (nexthdr == IPPROTO_UDP) {
8161                 if ((hdr.network - data) > (max_len - sizeof(struct udphdr)))
8162                         return max_len;
8163
8164                 hdr.network += sizeof(struct udphdr);
8165         }
8166
8167         /*
8168          * If everything has gone correctly hdr.network should be the
8169          * data section of the packet and will be the end of the header.
8170          * If not then it probably represents the end of the last recognized
8171          * header.
8172          */
8173         if ((hdr.network - data) < max_len)
8174                 return hdr.network - data;
8175         else
8176                 return max_len;
8177 }
8178
8179 /**
8180  * igb_pull_tail - igb specific version of skb_pull_tail
8181  * @rx_ring: rx descriptor ring packet is being transacted on
8182  * @rx_desc: pointer to the EOP Rx descriptor
8183  * @skb: pointer to current skb being adjusted
8184  *
8185  * This function is an igb specific version of __pskb_pull_tail.  The
8186  * main difference between this version and the original function is that
8187  * this function can make several assumptions about the state of things
8188  * that allow for significant optimizations versus the standard function.
8189  * As a result we can do things like drop a frag and maintain an accurate
8190  * truesize for the skb.
8191  */
8192 static void igb_pull_tail(struct igb_ring *rx_ring,
8193                           union e1000_adv_rx_desc *rx_desc,
8194                           struct sk_buff *skb)
8195 {
8196         struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
8197         unsigned char *va;
8198         unsigned int pull_len;
8199
8200         /*
8201          * it is valid to use page_address instead of kmap since we are
8202          * working with pages allocated out of the lomem pool per
8203          * alloc_page(GFP_ATOMIC)
8204          */
8205         va = skb_frag_address(frag);
8206
8207 #ifdef HAVE_PTP_1588_CLOCK
8208         if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
8209                 /* retrieve timestamp from buffer */
8210                 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
8211
8212                 /* update pointers to remove timestamp header */
8213                 skb_frag_size_sub(frag, IGB_TS_HDR_LEN);
8214                 frag->page_offset += IGB_TS_HDR_LEN;
8215                 skb->data_len -= IGB_TS_HDR_LEN;
8216                 skb->len -= IGB_TS_HDR_LEN;
8217
8218                 /* move va to start of packet data */
8219                 va += IGB_TS_HDR_LEN;
8220         }
8221 #endif /* HAVE_PTP_1588_CLOCK */
8222
8223         /*
8224          * we need the header to contain the greater of either ETH_HLEN or
8225          * 60 bytes if the skb->len is less than 60 for skb_pad.
8226          */
8227         pull_len = igb_get_headlen(va, IGB_RX_HDR_LEN);
8228
8229         /* align pull length to size of long to optimize memcpy performance */
8230         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
8231
8232         /* update all of the pointers */
8233         skb_frag_size_sub(frag, pull_len);
8234         frag->page_offset += pull_len;
8235         skb->data_len -= pull_len;
8236         skb->tail += pull_len;
8237 }
8238
8239 /**
8240  * igb_cleanup_headers - Correct corrupted or empty headers
8241  * @rx_ring: rx descriptor ring packet is being transacted on
8242  * @rx_desc: pointer to the EOP Rx descriptor
8243  * @skb: pointer to current skb being fixed
8244  *
8245  * Address the case where we are pulling data in on pages only
8246  * and as such no data is present in the skb header.
8247  *
8248  * In addition if skb is not at least 60 bytes we need to pad it so that
8249  * it is large enough to qualify as a valid Ethernet frame.
8250  *
8251  * Returns true if an error was encountered and skb was freed.
8252  **/
8253 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
8254                                 union e1000_adv_rx_desc *rx_desc,
8255                                 struct sk_buff *skb)
8256 {
8257
8258         if (unlikely((igb_test_staterr(rx_desc,
8259                                        E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
8260                 struct net_device *netdev = rx_ring->netdev;
8261                 if (!(netdev->features & NETIF_F_RXALL)) {
8262                         dev_kfree_skb_any(skb);
8263                         return true;
8264                 }
8265         }
8266
8267         /* place header in linear portion of buffer */
8268         if (skb_is_nonlinear(skb))
8269                 igb_pull_tail(rx_ring, rx_desc, skb);
8270
8271         /* if skb_pad returns an error the skb was freed */
8272         if (unlikely(skb->len < 60)) {
8273                 int pad_len = 60 - skb->len;
8274
8275                 if (skb_pad(skb, pad_len))
8276                         return true;
8277                 __skb_put(skb, pad_len);
8278         }
8279
8280         return false;
8281 }
8282
8283 /* igb_clean_rx_irq -- * packet split */
8284 static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, int budget)
8285 {
8286         struct igb_ring *rx_ring = q_vector->rx.ring;
8287         struct sk_buff *skb = rx_ring->skb;
8288         unsigned int total_bytes = 0, total_packets = 0;
8289         u16 cleaned_count = igb_desc_unused(rx_ring);
8290
8291         do {
8292                 union e1000_adv_rx_desc *rx_desc;
8293
8294                 /* return some buffers to hardware, one at a time is too slow */
8295                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
8296                         igb_alloc_rx_buffers(rx_ring, cleaned_count);
8297                         cleaned_count = 0;
8298                 }
8299
8300                 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
8301
8302                 if (!igb_test_staterr(rx_desc, E1000_RXD_STAT_DD))
8303                         break;
8304
8305                 /*
8306                  * This memory barrier is needed to keep us from reading
8307                  * any other fields out of the rx_desc until we know the
8308                  * RXD_STAT_DD bit is set
8309                  */
8310                 rmb();
8311
8312                 /* retrieve a buffer from the ring */
8313                 skb = igb_fetch_rx_buffer(rx_ring, rx_desc, skb);
8314
8315                 /* exit if we failed to retrieve a buffer */
8316                 if (!skb)
8317                         break;
8318
8319                 cleaned_count++;
8320
8321                 /* fetch next buffer in frame if non-eop */
8322                 if (igb_is_non_eop(rx_ring, rx_desc))
8323                         continue;
8324
8325                 /* verify the packet layout is correct */
8326                 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
8327                         skb = NULL;
8328                         continue;
8329                 }
8330
8331                 /* probably a little skewed due to removing CRC */
8332                 total_bytes += skb->len;
8333
8334                 /* populate checksum, timestamp, VLAN, and protocol */
8335                 igb_process_skb_fields(rx_ring, rx_desc, skb);
8336
8337 #ifndef IGB_NO_LRO
8338                 if (igb_can_lro(rx_ring, rx_desc, skb))
8339                         igb_lro_receive(q_vector, skb);
8340                 else
8341 #endif
8342 #ifdef HAVE_VLAN_RX_REGISTER
8343                         igb_receive_skb(q_vector, skb);
8344 #else
8345                         napi_gro_receive(&q_vector->napi, skb);
8346 #endif
8347 #ifndef NETIF_F_GRO
8348
8349                 netdev_ring(rx_ring)->last_rx = jiffies;
8350 #endif
8351
8352                 /* reset skb pointer */
8353                 skb = NULL;
8354
8355                 /* update budget accounting */
8356                 total_packets++;
8357         } while (likely(total_packets < budget));
8358
8359         /* place incomplete frames back on ring for completion */
8360         rx_ring->skb = skb;
8361
8362         rx_ring->rx_stats.packets += total_packets;
8363         rx_ring->rx_stats.bytes += total_bytes;
8364         q_vector->rx.total_packets += total_packets;
8365         q_vector->rx.total_bytes += total_bytes;
8366
8367         if (cleaned_count)
8368                 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8369
8370 #ifndef IGB_NO_LRO
8371         igb_lro_flush_all(q_vector);
8372
8373 #endif /* IGB_NO_LRO */
8374         return total_packets < budget;
8375 }
8376 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8377
8378 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8379 static bool igb_alloc_mapped_skb(struct igb_ring *rx_ring,
8380                                  struct igb_rx_buffer *bi)
8381 {
8382         struct sk_buff *skb = bi->skb;
8383         dma_addr_t dma = bi->dma;
8384
8385         if (dma)
8386                 return true;
8387
8388         if (likely(!skb)) {
8389                 skb = netdev_alloc_skb_ip_align(netdev_ring(rx_ring),
8390                                                 rx_ring->rx_buffer_len);
8391                 bi->skb = skb;
8392                 if (!skb) {
8393                         rx_ring->rx_stats.alloc_failed++;
8394                         return false;
8395                 }
8396
8397                 /* initialize skb for ring */
8398                 skb_record_rx_queue(skb, ring_queue_index(rx_ring));
8399         }
8400
8401         dma = dma_map_single(rx_ring->dev, skb->data,
8402                              rx_ring->rx_buffer_len, DMA_FROM_DEVICE);
8403
8404         /* if mapping failed free memory back to system since
8405          * there isn't much point in holding memory we can't use
8406          */
8407         if (dma_mapping_error(rx_ring->dev, dma)) {
8408                 dev_kfree_skb_any(skb);
8409                 bi->skb = NULL;
8410
8411                 rx_ring->rx_stats.alloc_failed++;
8412                 return false;
8413         }
8414
8415         bi->dma = dma;
8416         return true;
8417 }
8418
8419 #else /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8420 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
8421                                   struct igb_rx_buffer *bi)
8422 {
8423         struct page *page = bi->page;
8424         dma_addr_t dma;
8425
8426         /* since we are recycling buffers we should seldom need to alloc */
8427         if (likely(page))
8428                 return true;
8429
8430         /* alloc new page for storage */
8431         page = alloc_page(GFP_ATOMIC | __GFP_COLD);
8432         if (unlikely(!page)) {
8433                 rx_ring->rx_stats.alloc_failed++;
8434                 return false;
8435         }
8436
8437         /* map page for use */
8438         dma = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
8439
8440         /*
8441          * if mapping failed free memory back to system since
8442          * there isn't much point in holding memory we can't use
8443          */
8444         if (dma_mapping_error(rx_ring->dev, dma)) {
8445                 __free_page(page);
8446
8447                 rx_ring->rx_stats.alloc_failed++;
8448                 return false;
8449         }
8450
8451         bi->dma = dma;
8452         bi->page = page;
8453         bi->page_offset = 0;
8454
8455         return true;
8456 }
8457
8458 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8459 /**
8460  * igb_alloc_rx_buffers - Replace used receive buffers; packet split
8461  * @adapter: address of board private structure
8462  **/
8463 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
8464 {
8465         union e1000_adv_rx_desc *rx_desc;
8466         struct igb_rx_buffer *bi;
8467         u16 i = rx_ring->next_to_use;
8468
8469         /* nothing to do */
8470         if (!cleaned_count)
8471                 return;
8472
8473         rx_desc = IGB_RX_DESC(rx_ring, i);
8474         bi = &rx_ring->rx_buffer_info[i];
8475         i -= rx_ring->count;
8476
8477         do {
8478 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8479                 if (!igb_alloc_mapped_skb(rx_ring, bi))
8480 #else
8481                 if (!igb_alloc_mapped_page(rx_ring, bi))
8482 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8483                         break;
8484
8485                 /*
8486                  * Refresh the desc even if buffer_addrs didn't change
8487                  * because each write-back erases this info.
8488                  */
8489 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8490                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
8491 #else
8492                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
8493 #endif
8494
8495                 rx_desc++;
8496                 bi++;
8497                 i++;
8498                 if (unlikely(!i)) {
8499                         rx_desc = IGB_RX_DESC(rx_ring, 0);
8500                         bi = rx_ring->rx_buffer_info;
8501                         i -= rx_ring->count;
8502                 }
8503
8504                 /* clear the hdr_addr for the next_to_use descriptor */
8505                 rx_desc->read.hdr_addr = 0;
8506
8507                 cleaned_count--;
8508         } while (cleaned_count);
8509
8510         i += rx_ring->count;
8511
8512         if (rx_ring->next_to_use != i) {
8513                 /* record the next descriptor to use */
8514                 rx_ring->next_to_use = i;
8515
8516 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
8517                 /* update next to alloc since we have filled the ring */
8518                 rx_ring->next_to_alloc = i;
8519
8520 #endif
8521                 /*
8522                  * Force memory writes to complete before letting h/w
8523                  * know there are new descriptors to fetch.  (Only
8524                  * applicable for weak-ordered memory model archs,
8525                  * such as IA-64).
8526                  */
8527                 wmb();
8528                 writel(i, rx_ring->tail);
8529         }
8530 }
8531
8532 #ifdef SIOCGMIIPHY
8533 /**
8534  * igb_mii_ioctl -
8535  * @netdev:
8536  * @ifreq:
8537  * @cmd:
8538  **/
8539 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
8540 {
8541         struct igb_adapter *adapter = netdev_priv(netdev);
8542         struct mii_ioctl_data *data = if_mii(ifr);
8543
8544         if (adapter->hw.phy.media_type != e1000_media_type_copper)
8545                 return -EOPNOTSUPP;
8546
8547         switch (cmd) {
8548         case SIOCGMIIPHY:
8549                 data->phy_id = adapter->hw.phy.addr;
8550                 break;
8551         case SIOCGMIIREG:
8552                 if (!capable(CAP_NET_ADMIN))
8553                         return -EPERM;
8554                 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
8555                                    &data->val_out))
8556                         return -EIO;
8557                 break;
8558         case SIOCSMIIREG:
8559         default:
8560                 return -EOPNOTSUPP;
8561         }
8562         return E1000_SUCCESS;
8563 }
8564
8565 #endif
8566 /**
8567  * igb_ioctl -
8568  * @netdev:
8569  * @ifreq:
8570  * @cmd:
8571  **/
8572 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
8573 {
8574         switch (cmd) {
8575 #ifdef SIOCGMIIPHY
8576         case SIOCGMIIPHY:
8577         case SIOCGMIIREG:
8578         case SIOCSMIIREG:
8579                 return igb_mii_ioctl(netdev, ifr, cmd);
8580 #endif
8581 #ifdef HAVE_PTP_1588_CLOCK
8582         case SIOCSHWTSTAMP:
8583                 return igb_ptp_hwtstamp_ioctl(netdev, ifr, cmd);
8584 #endif /* HAVE_PTP_1588_CLOCK */
8585 #ifdef ETHTOOL_OPS_COMPAT
8586         case SIOCETHTOOL:
8587                 return ethtool_ioctl(ifr);
8588 #endif
8589         default:
8590                 return -EOPNOTSUPP;
8591         }
8592 }
8593
8594 s32 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
8595 {
8596         struct igb_adapter *adapter = hw->back;
8597         u16 cap_offset;
8598
8599         cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
8600         if (!cap_offset)
8601                 return -E1000_ERR_CONFIG;
8602
8603         pci_read_config_word(adapter->pdev, cap_offset + reg, value);
8604
8605         return E1000_SUCCESS;
8606 }
8607
8608 s32 e1000_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
8609 {
8610         struct igb_adapter *adapter = hw->back;
8611         u16 cap_offset;
8612
8613         cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
8614         if (!cap_offset)
8615                 return -E1000_ERR_CONFIG;
8616
8617         pci_write_config_word(adapter->pdev, cap_offset + reg, *value);
8618
8619         return E1000_SUCCESS;
8620 }
8621
8622 #ifdef HAVE_VLAN_RX_REGISTER
8623 static void igb_vlan_mode(struct net_device *netdev, struct vlan_group *vlgrp)
8624 #else
8625 void igb_vlan_mode(struct net_device *netdev, u32 features)
8626 #endif
8627 {
8628         struct igb_adapter *adapter = netdev_priv(netdev);
8629         struct e1000_hw *hw = &adapter->hw;
8630         u32 ctrl, rctl;
8631         int i;
8632 #ifdef HAVE_VLAN_RX_REGISTER
8633         bool enable = !!vlgrp;
8634
8635         igb_irq_disable(adapter);
8636
8637         adapter->vlgrp = vlgrp;
8638
8639         if (!test_bit(__IGB_DOWN, &adapter->state))
8640                 igb_irq_enable(adapter);
8641 #else
8642 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8643         bool enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
8644 #else
8645         bool enable = !!(features & NETIF_F_HW_VLAN_RX);
8646 #endif
8647 #endif
8648
8649         if (enable) {
8650                 /* enable VLAN tag insert/strip */
8651                 ctrl = E1000_READ_REG(hw, E1000_CTRL);
8652                 ctrl |= E1000_CTRL_VME;
8653                 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
8654
8655                 /* Disable CFI check */
8656                 rctl = E1000_READ_REG(hw, E1000_RCTL);
8657                 rctl &= ~E1000_RCTL_CFIEN;
8658                 E1000_WRITE_REG(hw, E1000_RCTL, rctl);
8659         } else {
8660                 /* disable VLAN tag insert/strip */
8661                 ctrl = E1000_READ_REG(hw, E1000_CTRL);
8662                 ctrl &= ~E1000_CTRL_VME;
8663                 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
8664         }
8665
8666 #ifndef CONFIG_IGB_VMDQ_NETDEV
8667         for (i = 0; i < adapter->vmdq_pools; i++) {
8668                 igb_set_vf_vlan_strip(adapter,
8669                                       adapter->vfs_allocated_count + i,
8670                                       enable);
8671         }
8672
8673 #else
8674         igb_set_vf_vlan_strip(adapter,
8675                               adapter->vfs_allocated_count,
8676                               enable);
8677
8678         for (i = 1; i < adapter->vmdq_pools; i++) {
8679 #ifdef HAVE_VLAN_RX_REGISTER
8680                 struct igb_vmdq_adapter *vadapter;
8681                 vadapter = netdev_priv(adapter->vmdq_netdev[i-1]);
8682                 enable = !!vadapter->vlgrp;
8683 #else
8684                 struct net_device *vnetdev;
8685                 vnetdev = adapter->vmdq_netdev[i-1];
8686 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8687                 enable = !!(vnetdev->features & NETIF_F_HW_VLAN_CTAG_RX);
8688 #else
8689                 enable = !!(vnetdev->features & NETIF_F_HW_VLAN_RX);
8690 #endif
8691 #endif
8692                 igb_set_vf_vlan_strip(adapter,
8693                                       adapter->vfs_allocated_count + i,
8694                                       enable);
8695         }
8696
8697 #endif
8698         igb_rlpml_set(adapter);
8699 }
8700
8701 #ifdef HAVE_VLAN_PROTOCOL
8702 static int igb_vlan_rx_add_vid(struct net_device *netdev, __be16 proto, u16 vid)
8703 #elif defined HAVE_INT_NDO_VLAN_RX_ADD_VID
8704 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8705 static int igb_vlan_rx_add_vid(struct net_device *netdev,
8706                                __always_unused __be16 proto, u16 vid)
8707 #else
8708 static int igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
8709 #endif
8710 #else
8711 static void igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
8712 #endif
8713 {
8714         struct igb_adapter *adapter = netdev_priv(netdev);
8715         int pf_id = adapter->vfs_allocated_count;
8716
8717         /* attempt to add filter to vlvf array */
8718         igb_vlvf_set(adapter, vid, TRUE, pf_id);
8719
8720         /* add the filter since PF can receive vlans w/o entry in vlvf */
8721         igb_vfta_set(adapter, vid, TRUE);
8722 #ifndef HAVE_NETDEV_VLAN_FEATURES
8723
8724         /* Copy feature flags from netdev to the vlan netdev for this vid.
8725          * This allows things like TSO to bubble down to our vlan device.
8726          * There is no need to update netdev for vlan 0 (DCB), since it
8727          * wouldn't has v_netdev.
8728          */
8729         if (adapter->vlgrp) {
8730                 struct vlan_group *vlgrp = adapter->vlgrp;
8731                 struct net_device *v_netdev = vlan_group_get_device(vlgrp, vid);
8732                 if (v_netdev) {
8733                         v_netdev->features |= netdev->features;
8734                         vlan_group_set_device(vlgrp, vid, v_netdev);
8735                 }
8736         }
8737 #endif
8738 #ifndef HAVE_VLAN_RX_REGISTER
8739
8740         set_bit(vid, adapter->active_vlans);
8741 #endif
8742 #ifdef HAVE_INT_NDO_VLAN_RX_ADD_VID
8743         return 0;
8744 #endif
8745 }
8746
8747 #ifdef HAVE_VLAN_PROTOCOL
8748 static int igb_vlan_rx_kill_vid(struct net_device *netdev, __be16 proto, u16 vid)
8749 #elif defined HAVE_INT_NDO_VLAN_RX_ADD_VID
8750 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8751 static int igb_vlan_rx_kill_vid(struct net_device *netdev,
8752                                 __always_unused __be16 proto, u16 vid)
8753 #else
8754 static int igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
8755 #endif
8756 #else
8757 static void igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
8758 #endif
8759 {
8760         struct igb_adapter *adapter = netdev_priv(netdev);
8761         int pf_id = adapter->vfs_allocated_count;
8762         s32 err;
8763
8764 #ifdef HAVE_VLAN_RX_REGISTER
8765         igb_irq_disable(adapter);
8766
8767         vlan_group_set_device(adapter->vlgrp, vid, NULL);
8768
8769         if (!test_bit(__IGB_DOWN, &adapter->state))
8770                 igb_irq_enable(adapter);
8771
8772 #endif /* HAVE_VLAN_RX_REGISTER */
8773         /* remove vlan from VLVF table array */
8774         err = igb_vlvf_set(adapter, vid, FALSE, pf_id);
8775
8776         /* if vid was not present in VLVF just remove it from table */
8777         if (err)
8778                 igb_vfta_set(adapter, vid, FALSE);
8779 #ifndef HAVE_VLAN_RX_REGISTER
8780
8781         clear_bit(vid, adapter->active_vlans);
8782 #endif
8783 #ifdef HAVE_INT_NDO_VLAN_RX_ADD_VID
8784         return 0;
8785 #endif
8786 }
8787
8788 static void igb_restore_vlan(struct igb_adapter *adapter)
8789 {
8790 #ifdef HAVE_VLAN_RX_REGISTER
8791         igb_vlan_mode(adapter->netdev, adapter->vlgrp);
8792
8793         if (adapter->vlgrp) {
8794                 u16 vid;
8795                 for (vid = 0; vid < VLAN_N_VID; vid++) {
8796                         if (!vlan_group_get_device(adapter->vlgrp, vid))
8797                                 continue;
8798 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8799                         igb_vlan_rx_add_vid(adapter->netdev,
8800                                             htons(ETH_P_8021Q), vid);
8801 #else
8802                         igb_vlan_rx_add_vid(adapter->netdev, vid);
8803 #endif
8804                 }
8805         }
8806 #else
8807         u16 vid;
8808
8809         igb_vlan_mode(adapter->netdev, adapter->netdev->features);
8810
8811         for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
8812 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8813                 igb_vlan_rx_add_vid(adapter->netdev,
8814                                     htons(ETH_P_8021Q), vid);
8815 #else
8816                 igb_vlan_rx_add_vid(adapter->netdev, vid);
8817 #endif
8818 #endif
8819 }
8820
8821 int igb_set_spd_dplx(struct igb_adapter *adapter, u16 spddplx)
8822 {
8823         struct pci_dev *pdev = adapter->pdev;
8824         struct e1000_mac_info *mac = &adapter->hw.mac;
8825
8826         mac->autoneg = 0;
8827
8828         /* SerDes device's does not support 10Mbps Full/duplex
8829          * and 100Mbps Half duplex
8830          */
8831         if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
8832                 switch (spddplx) {
8833                 case SPEED_10 + DUPLEX_HALF:
8834                 case SPEED_10 + DUPLEX_FULL:
8835                 case SPEED_100 + DUPLEX_HALF:
8836                         dev_err(pci_dev_to_dev(pdev),
8837                                 "Unsupported Speed/Duplex configuration\n");
8838                         return -EINVAL;
8839                 default:
8840                         break;
8841                 }
8842         }
8843
8844         switch (spddplx) {
8845         case SPEED_10 + DUPLEX_HALF:
8846                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
8847                 break;
8848         case SPEED_10 + DUPLEX_FULL:
8849                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
8850                 break;
8851         case SPEED_100 + DUPLEX_HALF:
8852                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
8853                 break;
8854         case SPEED_100 + DUPLEX_FULL:
8855                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
8856                 break;
8857         case SPEED_1000 + DUPLEX_FULL:
8858                 mac->autoneg = 1;
8859                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
8860                 break;
8861         case SPEED_1000 + DUPLEX_HALF: /* not supported */
8862         default:
8863                 dev_err(pci_dev_to_dev(pdev), "Unsupported Speed/Duplex configuration\n");
8864                 return -EINVAL;
8865         }
8866
8867         /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
8868         adapter->hw.phy.mdix = AUTO_ALL_MODES;
8869
8870         return 0;
8871 }
8872
8873 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
8874                           bool runtime)
8875 {
8876         struct net_device *netdev = pci_get_drvdata(pdev);
8877         struct igb_adapter *adapter = netdev_priv(netdev);
8878         struct e1000_hw *hw = &adapter->hw;
8879         u32 ctrl, rctl, status;
8880         u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
8881 #ifdef CONFIG_PM
8882         int retval = 0;
8883 #endif
8884
8885         netif_device_detach(netdev);
8886
8887         status = E1000_READ_REG(hw, E1000_STATUS);
8888         if (status & E1000_STATUS_LU)
8889                 wufc &= ~E1000_WUFC_LNKC;
8890
8891         if (netif_running(netdev))
8892                 __igb_close(netdev, true);
8893
8894         igb_clear_interrupt_scheme(adapter);
8895
8896 #ifdef CONFIG_PM
8897         retval = pci_save_state(pdev);
8898         if (retval)
8899                 return retval;
8900 #endif
8901
8902         if (wufc) {
8903                 igb_setup_rctl(adapter);
8904                 igb_set_rx_mode(netdev);
8905
8906                 /* turn on all-multi mode if wake on multicast is enabled */
8907                 if (wufc & E1000_WUFC_MC) {
8908                         rctl = E1000_READ_REG(hw, E1000_RCTL);
8909                         rctl |= E1000_RCTL_MPE;
8910                         E1000_WRITE_REG(hw, E1000_RCTL, rctl);
8911                 }
8912
8913                 ctrl = E1000_READ_REG(hw, E1000_CTRL);
8914                 /* phy power management enable */
8915                 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
8916                 ctrl |= E1000_CTRL_ADVD3WUC;
8917                 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
8918
8919                 /* Allow time for pending master requests to run */
8920                 e1000_disable_pcie_master(hw);
8921
8922                 E1000_WRITE_REG(hw, E1000_WUC, E1000_WUC_PME_EN);
8923                 E1000_WRITE_REG(hw, E1000_WUFC, wufc);
8924         } else {
8925                 E1000_WRITE_REG(hw, E1000_WUC, 0);
8926                 E1000_WRITE_REG(hw, E1000_WUFC, 0);
8927         }
8928
8929         *enable_wake = wufc || adapter->en_mng_pt;
8930         if (!*enable_wake)
8931                 igb_power_down_link(adapter);
8932         else
8933                 igb_power_up_link(adapter);
8934
8935         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
8936          * would have already happened in close and is redundant. */
8937         igb_release_hw_control(adapter);
8938
8939         pci_disable_device(pdev);
8940
8941         return 0;
8942 }
8943
8944 #ifdef CONFIG_PM
8945 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8946 static int igb_suspend(struct device *dev)
8947 #else
8948 static int igb_suspend(struct pci_dev *pdev, pm_message_t state)
8949 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8950 {
8951 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8952         struct pci_dev *pdev = to_pci_dev(dev);
8953 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8954         int retval;
8955         bool wake;
8956
8957         retval = __igb_shutdown(pdev, &wake, 0);
8958         if (retval)
8959                 return retval;
8960
8961         if (wake) {
8962                 pci_prepare_to_sleep(pdev);
8963         } else {
8964                 pci_wake_from_d3(pdev, false);
8965                 pci_set_power_state(pdev, PCI_D3hot);
8966         }
8967
8968         return 0;
8969 }
8970
8971 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8972 static int igb_resume(struct device *dev)
8973 #else
8974 static int igb_resume(struct pci_dev *pdev)
8975 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8976 {
8977 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8978         struct pci_dev *pdev = to_pci_dev(dev);
8979 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8980         struct net_device *netdev = pci_get_drvdata(pdev);
8981         struct igb_adapter *adapter = netdev_priv(netdev);
8982         struct e1000_hw *hw = &adapter->hw;
8983         u32 err;
8984
8985         pci_set_power_state(pdev, PCI_D0);
8986         pci_restore_state(pdev);
8987         pci_save_state(pdev);
8988
8989         err = pci_enable_device_mem(pdev);
8990         if (err) {
8991                 dev_err(pci_dev_to_dev(pdev),
8992                         "igb: Cannot enable PCI device from suspend\n");
8993                 return err;
8994         }
8995         pci_set_master(pdev);
8996
8997         pci_enable_wake(pdev, PCI_D3hot, 0);
8998         pci_enable_wake(pdev, PCI_D3cold, 0);
8999
9000         if (igb_init_interrupt_scheme(adapter, true)) {
9001                 dev_err(pci_dev_to_dev(pdev), "Unable to allocate memory for queues\n");
9002                 return -ENOMEM;
9003         }
9004
9005         igb_reset(adapter);
9006
9007         /* let the f/w know that the h/w is now under the control of the
9008          * driver. */
9009         igb_get_hw_control(adapter);
9010
9011         E1000_WRITE_REG(hw, E1000_WUS, ~0);
9012
9013         if (netdev->flags & IFF_UP) {
9014                 rtnl_lock();
9015                 err = __igb_open(netdev, true);
9016                 rtnl_unlock();
9017                 if (err)
9018                         return err;
9019         }
9020
9021         netif_device_attach(netdev);
9022
9023         return 0;
9024 }
9025
9026 #ifdef CONFIG_PM_RUNTIME
9027 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
9028 static int igb_runtime_idle(struct device *dev)
9029 {
9030         struct pci_dev *pdev = to_pci_dev(dev);
9031         struct net_device *netdev = pci_get_drvdata(pdev);
9032         struct igb_adapter *adapter = netdev_priv(netdev);
9033
9034         if (!igb_has_link(adapter))
9035                 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
9036
9037         return -EBUSY;
9038 }
9039
9040 static int igb_runtime_suspend(struct device *dev)
9041 {
9042         struct pci_dev *pdev = to_pci_dev(dev);
9043         int retval;
9044         bool wake;
9045
9046         retval = __igb_shutdown(pdev, &wake, 1);
9047         if (retval)
9048                 return retval;
9049
9050         if (wake) {
9051                 pci_prepare_to_sleep(pdev);
9052         } else {
9053                 pci_wake_from_d3(pdev, false);
9054                 pci_set_power_state(pdev, PCI_D3hot);
9055         }
9056
9057         return 0;
9058 }
9059
9060 static int igb_runtime_resume(struct device *dev)
9061 {
9062         return igb_resume(dev);
9063 }
9064 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
9065 #endif /* CONFIG_PM_RUNTIME */
9066 #endif /* CONFIG_PM */
9067
9068 #ifdef USE_REBOOT_NOTIFIER
9069 /* only want to do this for 2.4 kernels? */
9070 static int igb_notify_reboot(struct notifier_block *nb, unsigned long event,
9071                              void *p)
9072 {
9073         struct pci_dev *pdev = NULL;
9074         bool wake;
9075
9076         switch (event) {
9077         case SYS_DOWN:
9078         case SYS_HALT:
9079         case SYS_POWER_OFF:
9080                 while ((pdev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pdev))) {
9081                         if (pci_dev_driver(pdev) == &igb_driver) {
9082                                 __igb_shutdown(pdev, &wake, 0);
9083                                 if (event == SYS_POWER_OFF) {
9084                                         pci_wake_from_d3(pdev, wake);
9085                                         pci_set_power_state(pdev, PCI_D3hot);
9086                                 }
9087                         }
9088                 }
9089         }
9090         return NOTIFY_DONE;
9091 }
9092 #else
9093 static void igb_shutdown(struct pci_dev *pdev)
9094 {
9095         bool wake = false;
9096
9097         __igb_shutdown(pdev, &wake, 0);
9098
9099         if (system_state == SYSTEM_POWER_OFF) {
9100                 pci_wake_from_d3(pdev, wake);
9101                 pci_set_power_state(pdev, PCI_D3hot);
9102         }
9103 }
9104 #endif /* USE_REBOOT_NOTIFIER */
9105
9106 #ifdef CONFIG_NET_POLL_CONTROLLER
9107 /*
9108  * Polling 'interrupt' - used by things like netconsole to send skbs
9109  * without having to re-enable interrupts. It's not called while
9110  * the interrupt routine is executing.
9111  */
9112 static void igb_netpoll(struct net_device *netdev)
9113 {
9114         struct igb_adapter *adapter = netdev_priv(netdev);
9115         struct e1000_hw *hw = &adapter->hw;
9116         struct igb_q_vector *q_vector;
9117         int i;
9118
9119         for (i = 0; i < adapter->num_q_vectors; i++) {
9120                 q_vector = adapter->q_vector[i];
9121                 if (adapter->msix_entries)
9122                         E1000_WRITE_REG(hw, E1000_EIMC, q_vector->eims_value);
9123                 else
9124                         igb_irq_disable(adapter);
9125                 napi_schedule(&q_vector->napi);
9126         }
9127 }
9128 #endif /* CONFIG_NET_POLL_CONTROLLER */
9129
9130 #ifdef HAVE_PCI_ERS
9131 #define E1000_DEV_ID_82576_VF 0x10CA
9132 /**
9133  * igb_io_error_detected - called when PCI error is detected
9134  * @pdev: Pointer to PCI device
9135  * @state: The current pci connection state
9136  *
9137  * This function is called after a PCI bus error affecting
9138  * this device has been detected.
9139  */
9140 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
9141                                               pci_channel_state_t state)
9142 {
9143         struct net_device *netdev = pci_get_drvdata(pdev);
9144         struct igb_adapter *adapter = netdev_priv(netdev);
9145
9146 #ifdef CONFIG_PCI_IOV__UNUSED
9147         struct pci_dev *bdev, *vfdev;
9148         u32 dw0, dw1, dw2, dw3;
9149         int vf, pos;
9150         u16 req_id, pf_func;
9151
9152         if (!(adapter->flags & IGB_FLAG_DETECT_BAD_DMA))
9153                 goto skip_bad_vf_detection;
9154
9155         bdev = pdev->bus->self;
9156         while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
9157                 bdev = bdev->bus->self;
9158
9159         if (!bdev)
9160                 goto skip_bad_vf_detection;
9161
9162         pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
9163         if (!pos)
9164                 goto skip_bad_vf_detection;
9165
9166         pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG, &dw0);
9167         pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 4, &dw1);
9168         pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 8, &dw2);
9169         pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 12, &dw3);
9170
9171         req_id = dw1 >> 16;
9172         /* On the 82576 if bit 7 of the requestor ID is set then it's a VF */
9173         if (!(req_id & 0x0080))
9174                 goto skip_bad_vf_detection;
9175
9176         pf_func = req_id & 0x01;
9177         if ((pf_func & 1) == (pdev->devfn & 1)) {
9178
9179                 vf = (req_id & 0x7F) >> 1;
9180                 dev_err(pci_dev_to_dev(pdev),
9181                         "VF %d has caused a PCIe error\n", vf);
9182                 dev_err(pci_dev_to_dev(pdev),
9183                         "TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
9184                         "%8.8x\tdw3: %8.8x\n",
9185                         dw0, dw1, dw2, dw3);
9186
9187                 /* Find the pci device of the offending VF */
9188                 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
9189                                        E1000_DEV_ID_82576_VF, NULL);
9190                 while (vfdev) {
9191                         if (vfdev->devfn == (req_id & 0xFF))
9192                                 break;
9193                         vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
9194                                                E1000_DEV_ID_82576_VF, vfdev);
9195                 }
9196                 /*
9197                  * There's a slim chance the VF could have been hot plugged,
9198                  * so if it is no longer present we don't need to issue the
9199                  * VFLR.  Just clean up the AER in that case.
9200                  */
9201                 if (vfdev) {
9202                         dev_err(pci_dev_to_dev(pdev),
9203                                 "Issuing VFLR to VF %d\n", vf);
9204                         pci_write_config_dword(vfdev, 0xA8, 0x00008000);
9205                 }
9206
9207                 pci_cleanup_aer_uncorrect_error_status(pdev);
9208         }
9209
9210         /*
9211          * Even though the error may have occurred on the other port
9212          * we still need to increment the vf error reference count for
9213          * both ports because the I/O resume function will be called
9214          * for both of them.
9215          */
9216         adapter->vferr_refcount++;
9217
9218         return PCI_ERS_RESULT_RECOVERED;
9219
9220 skip_bad_vf_detection:
9221 #endif /* CONFIG_PCI_IOV */
9222
9223         netif_device_detach(netdev);
9224
9225         if (state == pci_channel_io_perm_failure)
9226                 return PCI_ERS_RESULT_DISCONNECT;
9227
9228         if (netif_running(netdev))
9229                 igb_down(adapter);
9230         pci_disable_device(pdev);
9231
9232         /* Request a slot slot reset. */
9233         return PCI_ERS_RESULT_NEED_RESET;
9234 }
9235
9236 /**
9237  * igb_io_slot_reset - called after the pci bus has been reset.
9238  * @pdev: Pointer to PCI device
9239  *
9240  * Restart the card from scratch, as if from a cold-boot. Implementation
9241  * resembles the first-half of the igb_resume routine.
9242  */
9243 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
9244 {
9245         struct net_device *netdev = pci_get_drvdata(pdev);
9246         struct igb_adapter *adapter = netdev_priv(netdev);
9247         struct e1000_hw *hw = &adapter->hw;
9248         pci_ers_result_t result;
9249
9250         if (pci_enable_device_mem(pdev)) {
9251                 dev_err(pci_dev_to_dev(pdev),
9252                         "Cannot re-enable PCI device after reset.\n");
9253                 result = PCI_ERS_RESULT_DISCONNECT;
9254         } else {
9255                 pci_set_master(pdev);
9256                 pci_restore_state(pdev);
9257                 pci_save_state(pdev);
9258
9259                 pci_enable_wake(pdev, PCI_D3hot, 0);
9260                 pci_enable_wake(pdev, PCI_D3cold, 0);
9261
9262                 schedule_work(&adapter->reset_task);
9263                 E1000_WRITE_REG(hw, E1000_WUS, ~0);
9264                 result = PCI_ERS_RESULT_RECOVERED;
9265         }
9266
9267         pci_cleanup_aer_uncorrect_error_status(pdev);
9268
9269         return result;
9270 }
9271
9272 /**
9273  * igb_io_resume - called when traffic can start flowing again.
9274  * @pdev: Pointer to PCI device
9275  *
9276  * This callback is called when the error recovery driver tells us that
9277  * its OK to resume normal operation. Implementation resembles the
9278  * second-half of the igb_resume routine.
9279  */
9280 static void igb_io_resume(struct pci_dev *pdev)
9281 {
9282         struct net_device *netdev = pci_get_drvdata(pdev);
9283         struct igb_adapter *adapter = netdev_priv(netdev);
9284
9285         if (adapter->vferr_refcount) {
9286                 dev_info(pci_dev_to_dev(pdev), "Resuming after VF err\n");
9287                 adapter->vferr_refcount--;
9288                 return;
9289         }
9290
9291         if (netif_running(netdev)) {
9292                 if (igb_up(adapter)) {
9293                         dev_err(pci_dev_to_dev(pdev), "igb_up failed after reset\n");
9294                         return;
9295                 }
9296         }
9297
9298         netif_device_attach(netdev);
9299
9300         /* let the f/w know that the h/w is now under the control of the
9301          * driver. */
9302         igb_get_hw_control(adapter);
9303 }
9304
9305 #endif /* HAVE_PCI_ERS */
9306
9307 int igb_add_mac_filter(struct igb_adapter *adapter, u8 *addr, u16 queue)
9308 {
9309         struct e1000_hw *hw = &adapter->hw;
9310         int i;
9311
9312         if (is_zero_ether_addr(addr))
9313                 return 0;
9314
9315         for (i = 0; i < hw->mac.rar_entry_count; i++) {
9316                 if (adapter->mac_table[i].state & IGB_MAC_STATE_IN_USE)
9317                         continue;
9318                 adapter->mac_table[i].state = (IGB_MAC_STATE_MODIFIED |
9319                                                    IGB_MAC_STATE_IN_USE);
9320                 memcpy(adapter->mac_table[i].addr, addr, ETH_ALEN);
9321                 adapter->mac_table[i].queue = queue;
9322                 igb_sync_mac_table(adapter);
9323                 return 0;
9324         }
9325         return -ENOMEM;
9326 }
9327 int igb_del_mac_filter(struct igb_adapter *adapter, u8* addr, u16 queue)
9328 {
9329         /* search table for addr, if found, set to 0 and sync */
9330         int i;
9331         struct e1000_hw *hw = &adapter->hw;
9332
9333         if (is_zero_ether_addr(addr))
9334                 return 0;
9335         for (i = 0; i < hw->mac.rar_entry_count; i++) {
9336                 if (ether_addr_equal(addr, adapter->mac_table[i].addr) &&
9337                     adapter->mac_table[i].queue == queue) {
9338                         adapter->mac_table[i].state = IGB_MAC_STATE_MODIFIED;
9339                         memset(adapter->mac_table[i].addr, 0, ETH_ALEN);
9340                         adapter->mac_table[i].queue = 0;
9341                         igb_sync_mac_table(adapter);
9342                         return 0;
9343                 }
9344         }
9345         return -ENOMEM;
9346 }
9347 static int igb_set_vf_mac(struct igb_adapter *adapter,
9348                           int vf, unsigned char *mac_addr)
9349 {
9350         igb_del_mac_filter(adapter, adapter->vf_data[vf].vf_mac_addresses, vf);
9351         memcpy(adapter->vf_data[vf].vf_mac_addresses, mac_addr, ETH_ALEN);
9352
9353         igb_add_mac_filter(adapter, mac_addr, vf);
9354
9355         return 0;
9356 }
9357
9358 #ifdef IFLA_VF_MAX
9359 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
9360 {
9361         struct igb_adapter *adapter = netdev_priv(netdev);
9362         if (!is_valid_ether_addr(mac) || (vf >= adapter->vfs_allocated_count))
9363                 return -EINVAL;
9364         adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
9365         dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n", mac, vf);
9366         dev_info(&adapter->pdev->dev, "Reload the VF driver to make this"
9367                                       " change effective.\n");
9368         if (test_bit(__IGB_DOWN, &adapter->state)) {
9369                 dev_warn(&adapter->pdev->dev, "The VF MAC address has been set,"
9370                          " but the PF device is not up.\n");
9371                 dev_warn(&adapter->pdev->dev, "Bring the PF device up before"
9372                          " attempting to use the VF device.\n");
9373         }
9374         return igb_set_vf_mac(adapter, vf, mac);
9375 }
9376
9377 static int igb_link_mbps(int internal_link_speed)
9378 {
9379         switch (internal_link_speed) {
9380         case SPEED_100:
9381                 return 100;
9382         case SPEED_1000:
9383                 return 1000;
9384         case SPEED_2500:
9385                 return 2500;
9386         default:
9387                 return 0;
9388         }
9389 }
9390
9391 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
9392                         int link_speed)
9393 {
9394         int rf_dec, rf_int;
9395         u32 bcnrc_val;
9396
9397         if (tx_rate != 0) {
9398                 /* Calculate the rate factor values to set */
9399                 rf_int = link_speed / tx_rate;
9400                 rf_dec = (link_speed - (rf_int * tx_rate));
9401                 rf_dec = (rf_dec * (1<<E1000_RTTBCNRC_RF_INT_SHIFT)) / tx_rate;
9402
9403                 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
9404                 bcnrc_val |= ((rf_int<<E1000_RTTBCNRC_RF_INT_SHIFT) &
9405                                 E1000_RTTBCNRC_RF_INT_MASK);
9406                 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
9407         } else {
9408                 bcnrc_val = 0;
9409         }
9410
9411         E1000_WRITE_REG(hw, E1000_RTTDQSEL, vf); /* vf X uses queue X */
9412         /*
9413          * Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
9414          * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
9415          */
9416         E1000_WRITE_REG(hw, E1000_RTTBCNRM(0), 0x14);
9417         E1000_WRITE_REG(hw, E1000_RTTBCNRC, bcnrc_val);
9418 }
9419
9420 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
9421 {
9422         int actual_link_speed, i;
9423         bool reset_rate = false;
9424
9425         /* VF TX rate limit was not set */
9426         if ((adapter->vf_rate_link_speed == 0) ||
9427                 (adapter->hw.mac.type != e1000_82576))
9428                 return;
9429
9430         actual_link_speed = igb_link_mbps(adapter->link_speed);
9431         if (actual_link_speed != adapter->vf_rate_link_speed) {
9432                 reset_rate = true;
9433                 adapter->vf_rate_link_speed = 0;
9434                 dev_info(&adapter->pdev->dev,
9435                 "Link speed has been changed. VF Transmit rate is disabled\n");
9436         }
9437
9438         for (i = 0; i < adapter->vfs_allocated_count; i++) {
9439                 if (reset_rate)
9440                         adapter->vf_data[i].tx_rate = 0;
9441
9442                 igb_set_vf_rate_limit(&adapter->hw, i,
9443                         adapter->vf_data[i].tx_rate, actual_link_speed);
9444         }
9445 }
9446
9447 #ifdef HAVE_VF_MIN_MAX_TXRATE
9448 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int min_tx_rate,
9449                              int tx_rate)
9450 #else /* HAVE_VF_MIN_MAX_TXRATE */
9451 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate)
9452 #endif /* HAVE_VF_MIN_MAX_TXRATE */
9453 {
9454         struct igb_adapter *adapter = netdev_priv(netdev);
9455         struct e1000_hw *hw = &adapter->hw;
9456         int actual_link_speed;
9457
9458         if (hw->mac.type != e1000_82576)
9459                 return -EOPNOTSUPP;
9460
9461 #ifdef HAVE_VF_MIN_MAX_TXRATE
9462         if (min_tx_rate)
9463                 return -EINVAL;
9464 #endif /* HAVE_VF_MIN_MAX_TXRATE */
9465
9466         actual_link_speed = igb_link_mbps(adapter->link_speed);
9467         if ((vf >= adapter->vfs_allocated_count) ||
9468                 (!(E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_LU)) ||
9469                 (tx_rate < 0) || (tx_rate > actual_link_speed))
9470                 return -EINVAL;
9471
9472         adapter->vf_rate_link_speed = actual_link_speed;
9473         adapter->vf_data[vf].tx_rate = (u16)tx_rate;
9474         igb_set_vf_rate_limit(hw, vf, tx_rate, actual_link_speed);
9475
9476         return 0;
9477 }
9478
9479 static int igb_ndo_get_vf_config(struct net_device *netdev,
9480                                  int vf, struct ifla_vf_info *ivi)
9481 {
9482         struct igb_adapter *adapter = netdev_priv(netdev);
9483         if (vf >= adapter->vfs_allocated_count)
9484                 return -EINVAL;
9485         ivi->vf = vf;
9486         memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
9487 #ifdef HAVE_VF_MIN_MAX_TXRATE
9488         ivi->max_tx_rate = adapter->vf_data[vf].tx_rate;
9489         ivi->min_tx_rate = 0;
9490 #else /* HAVE_VF_MIN_MAX_TXRATE */
9491         ivi->tx_rate = adapter->vf_data[vf].tx_rate;
9492 #endif /* HAVE_VF_MIN_MAX_TXRATE */
9493         ivi->vlan = adapter->vf_data[vf].pf_vlan;
9494         ivi->qos = adapter->vf_data[vf].pf_qos;
9495 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
9496         ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
9497 #endif
9498         return 0;
9499 }
9500 #endif
9501 static void igb_vmm_control(struct igb_adapter *adapter)
9502 {
9503         struct e1000_hw *hw = &adapter->hw;
9504         int count;
9505         u32 reg;
9506
9507         switch (hw->mac.type) {
9508         case e1000_82575:
9509         default:
9510                 /* replication is not supported for 82575 */
9511                 return;
9512         case e1000_82576:
9513                 /* notify HW that the MAC is adding vlan tags */
9514                 reg = E1000_READ_REG(hw, E1000_DTXCTL);
9515                 reg |= (E1000_DTXCTL_VLAN_ADDED |
9516                         E1000_DTXCTL_SPOOF_INT);
9517                 E1000_WRITE_REG(hw, E1000_DTXCTL, reg);
9518         case e1000_82580:
9519                 /* enable replication vlan tag stripping */
9520                 reg = E1000_READ_REG(hw, E1000_RPLOLR);
9521                 reg |= E1000_RPLOLR_STRVLAN;
9522                 E1000_WRITE_REG(hw, E1000_RPLOLR, reg);
9523         case e1000_i350:
9524         case e1000_i354:
9525                 /* none of the above registers are supported by i350 */
9526                 break;
9527         }
9528
9529         /* Enable Malicious Driver Detection */
9530         if ((adapter->vfs_allocated_count) &&
9531             (adapter->mdd)) {
9532                 if (hw->mac.type == e1000_i350)
9533                         igb_enable_mdd(adapter);
9534         }
9535
9536                 /* enable replication and loopback support */
9537                 count = adapter->vfs_allocated_count || adapter->vmdq_pools;
9538                 if (adapter->flags & IGB_FLAG_LOOPBACK_ENABLE && count)
9539                         e1000_vmdq_set_loopback_pf(hw, 1);
9540                 e1000_vmdq_set_anti_spoofing_pf(hw,
9541                         adapter->vfs_allocated_count || adapter->vmdq_pools,
9542                         adapter->vfs_allocated_count);
9543         e1000_vmdq_set_replication_pf(hw, adapter->vfs_allocated_count ||
9544                                       adapter->vmdq_pools);
9545 }
9546
9547 static void igb_init_fw(struct igb_adapter *adapter)
9548 {
9549         struct e1000_fw_drv_info fw_cmd;
9550         struct e1000_hw *hw = &adapter->hw;
9551         int i;
9552         u16 mask;
9553
9554         if (hw->mac.type == e1000_i210)
9555                 mask = E1000_SWFW_EEP_SM;
9556         else
9557                 mask = E1000_SWFW_PHY0_SM;
9558         /* i211 parts do not support this feature */
9559         if (hw->mac.type == e1000_i211)
9560                 hw->mac.arc_subsystem_valid = false;
9561
9562         if (!hw->mac.ops.acquire_swfw_sync(hw, mask)) {
9563                 for (i = 0; i <= FW_MAX_RETRIES; i++) {
9564                         E1000_WRITE_REG(hw, E1000_FWSTS, E1000_FWSTS_FWRI);
9565                         fw_cmd.hdr.cmd = FW_CMD_DRV_INFO;
9566                         fw_cmd.hdr.buf_len = FW_CMD_DRV_INFO_LEN;
9567                         fw_cmd.hdr.cmd_or_resp.cmd_resv = FW_CMD_RESERVED;
9568                         fw_cmd.port_num = hw->bus.func;
9569                         fw_cmd.drv_version = FW_FAMILY_DRV_VER;
9570                         fw_cmd.hdr.checksum = 0;
9571                         fw_cmd.hdr.checksum = e1000_calculate_checksum((u8 *)&fw_cmd,
9572                                                                    (FW_HDR_LEN +
9573                                                                     fw_cmd.hdr.buf_len));
9574                          e1000_host_interface_command(hw, (u8*)&fw_cmd,
9575                                                      sizeof(fw_cmd));
9576                         if (fw_cmd.hdr.cmd_or_resp.ret_status == FW_STATUS_SUCCESS)
9577                                 break;
9578                 }
9579         } else
9580                 dev_warn(pci_dev_to_dev(adapter->pdev),
9581                          "Unable to get semaphore, firmware init failed.\n");
9582         hw->mac.ops.release_swfw_sync(hw, mask);
9583 }
9584
9585 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
9586 {
9587         struct e1000_hw *hw = &adapter->hw;
9588         u32 dmac_thr;
9589         u16 hwm;
9590         u32 status;
9591
9592         if (hw->mac.type == e1000_i211)
9593                 return;
9594
9595         if (hw->mac.type > e1000_82580) {
9596                 if (adapter->dmac != IGB_DMAC_DISABLE) {
9597                         u32 reg;
9598
9599                         /* force threshold to 0.  */
9600                         E1000_WRITE_REG(hw, E1000_DMCTXTH, 0);
9601
9602                         /*
9603                          * DMA Coalescing high water mark needs to be greater
9604                          * than the Rx threshold. Set hwm to PBA - max frame
9605                          * size in 16B units, capping it at PBA - 6KB.
9606                          */
9607                         hwm = 64 * pba - adapter->max_frame_size / 16;
9608                         if (hwm < 64 * (pba - 6))
9609                                 hwm = 64 * (pba - 6);
9610                         reg = E1000_READ_REG(hw, E1000_FCRTC);
9611                         reg &= ~E1000_FCRTC_RTH_COAL_MASK;
9612                         reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
9613                                 & E1000_FCRTC_RTH_COAL_MASK);
9614                         E1000_WRITE_REG(hw, E1000_FCRTC, reg);
9615
9616                         /*
9617                          * Set the DMA Coalescing Rx threshold to PBA - 2 * max
9618                          * frame size, capping it at PBA - 10KB.
9619                          */
9620                         dmac_thr = pba - adapter->max_frame_size / 512;
9621                         if (dmac_thr < pba - 10)
9622                                 dmac_thr = pba - 10;
9623                         reg = E1000_READ_REG(hw, E1000_DMACR);
9624                         reg &= ~E1000_DMACR_DMACTHR_MASK;
9625                         reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
9626                                 & E1000_DMACR_DMACTHR_MASK);
9627
9628                         /* transition to L0x or L1 if available..*/
9629                         reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
9630
9631                         /* Check if status is 2.5Gb backplane connection
9632                          * before configuration of watchdog timer, which is
9633                          * in msec values in 12.8usec intervals
9634                          * watchdog timer= msec values in 32usec intervals
9635                          * for non 2.5Gb connection
9636                          */
9637                         if (hw->mac.type == e1000_i354) {
9638                                 status = E1000_READ_REG(hw, E1000_STATUS);
9639                                 if ((status & E1000_STATUS_2P5_SKU) &&
9640                                     (!(status & E1000_STATUS_2P5_SKU_OVER)))
9641                                         reg |= ((adapter->dmac * 5) >> 6);
9642                                 else
9643                                         reg |= ((adapter->dmac) >> 5);
9644                         } else {
9645                                 reg |= ((adapter->dmac) >> 5);
9646                         }
9647
9648                         /*
9649                          * Disable BMC-to-OS Watchdog enable
9650                          * on devices that support OS-to-BMC
9651                          */
9652                         if (hw->mac.type != e1000_i354)
9653                                 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
9654                         E1000_WRITE_REG(hw, E1000_DMACR, reg);
9655
9656                         /* no lower threshold to disable coalescing(smart fifb)-UTRESH=0*/
9657                         E1000_WRITE_REG(hw, E1000_DMCRTRH, 0);
9658
9659                         /* This sets the time to wait before requesting
9660                          * transition to low power state to number of usecs
9661                          * needed to receive 1 512 byte frame at gigabit
9662                          * line rate. On i350 device, time to make transition
9663                          * to Lx state is delayed by 4 usec with flush disable
9664                          * bit set to avoid losing mailbox interrupts
9665                          */
9666                         reg = E1000_READ_REG(hw, E1000_DMCTLX);
9667                         if (hw->mac.type == e1000_i350)
9668                                 reg |= IGB_DMCTLX_DCFLUSH_DIS;
9669
9670                         /* in 2.5Gb connection, TTLX unit is 0.4 usec
9671                          * which is 0x4*2 = 0xA. But delay is still 4 usec
9672                          */
9673                         if (hw->mac.type == e1000_i354) {
9674                                 status = E1000_READ_REG(hw, E1000_STATUS);
9675                                 if ((status & E1000_STATUS_2P5_SKU) &&
9676                                     (!(status & E1000_STATUS_2P5_SKU_OVER)))
9677                                         reg |= 0xA;
9678                                 else
9679                                         reg |= 0x4;
9680                         } else {
9681                                 reg |= 0x4;
9682                         }
9683                         E1000_WRITE_REG(hw, E1000_DMCTLX, reg);
9684
9685                         /* free space in tx packet buffer to wake from DMA coal */
9686                         E1000_WRITE_REG(hw, E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
9687                                 (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
9688
9689                         /* make low power state decision controlled by DMA coal */
9690                         reg = E1000_READ_REG(hw, E1000_PCIEMISC);
9691                         reg &= ~E1000_PCIEMISC_LX_DECISION;
9692                         E1000_WRITE_REG(hw, E1000_PCIEMISC, reg);
9693                 } /* endif adapter->dmac is not disabled */
9694         } else if (hw->mac.type == e1000_82580) {
9695                 u32 reg = E1000_READ_REG(hw, E1000_PCIEMISC);
9696                 E1000_WRITE_REG(hw, E1000_PCIEMISC,
9697                                 reg & ~E1000_PCIEMISC_LX_DECISION);
9698                 E1000_WRITE_REG(hw, E1000_DMACR, 0);
9699         }
9700 }
9701
9702 #ifdef HAVE_I2C_SUPPORT
9703 /*  igb_read_i2c_byte - Reads 8 bit word over I2C
9704  *  @hw: pointer to hardware structure
9705  *  @byte_offset: byte offset to read
9706  *  @dev_addr: device address
9707  *  @data: value read
9708  *
9709  *  Performs byte read operation over I2C interface at
9710  *  a specified device address.
9711  */
9712 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
9713                                 u8 dev_addr, u8 *data)
9714 {
9715         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
9716         struct i2c_client *this_client = adapter->i2c_client;
9717         s32 status;
9718         u16 swfw_mask = 0;
9719
9720         if (!this_client)
9721                 return E1000_ERR_I2C;
9722
9723         swfw_mask = E1000_SWFW_PHY0_SM;
9724
9725         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)
9726             != E1000_SUCCESS)
9727                 return E1000_ERR_SWFW_SYNC;
9728
9729         status = i2c_smbus_read_byte_data(this_client, byte_offset);
9730         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
9731
9732         if (status < 0)
9733                 return E1000_ERR_I2C;
9734         else {
9735                 *data = status;
9736                 return E1000_SUCCESS;
9737         }
9738 }
9739
9740 /*  igb_write_i2c_byte - Writes 8 bit word over I2C
9741  *  @hw: pointer to hardware structure
9742  *  @byte_offset: byte offset to write
9743  *  @dev_addr: device address
9744  *  @data: value to write
9745  *
9746  *  Performs byte write operation over I2C interface at
9747  *  a specified device address.
9748  */
9749 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
9750                                  u8 dev_addr, u8 data)
9751 {
9752         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
9753         struct i2c_client *this_client = adapter->i2c_client;
9754         s32 status;
9755         u16 swfw_mask = E1000_SWFW_PHY0_SM;
9756
9757         if (!this_client)
9758                 return E1000_ERR_I2C;
9759
9760         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask) != E1000_SUCCESS)
9761                 return E1000_ERR_SWFW_SYNC;
9762         status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
9763         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
9764
9765         if (status)
9766                 return E1000_ERR_I2C;
9767         else
9768                 return E1000_SUCCESS;
9769 }
9770 #endif /*  HAVE_I2C_SUPPORT */
9771 /* igb_main.c */
9772
9773
9774 /**
9775  * igb_probe - Device Initialization Routine
9776  * @pdev: PCI device information struct
9777  * @ent: entry in igb_pci_tbl
9778  *
9779  * Returns 0 on success, negative on failure
9780  *
9781  * igb_probe initializes an adapter identified by a pci_dev structure.
9782  * The OS initialization, configuring of the adapter private structure,
9783  * and a hardware reset occur.
9784  **/
9785 int igb_kni_probe(struct pci_dev *pdev,
9786                                struct net_device **lad_dev)
9787 {
9788         struct net_device *netdev;
9789         struct igb_adapter *adapter;
9790         struct e1000_hw *hw;
9791         u16 eeprom_data = 0;
9792         u8 pba_str[E1000_PBANUM_LENGTH];
9793         s32 ret_val;
9794         static int global_quad_port_a; /* global quad port a indication */
9795         int i, err, pci_using_dac = 0;
9796         static int cards_found;
9797
9798         err = pci_enable_device_mem(pdev);
9799         if (err)
9800                 return err;
9801
9802 #ifdef NO_KNI
9803         pci_using_dac = 0;
9804         err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
9805         if (!err) {
9806                 err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
9807                 if (!err)
9808                         pci_using_dac = 1;
9809         } else {
9810                 err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
9811                 if (err) {
9812                         err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
9813                         if (err) {
9814                                 IGB_ERR("No usable DMA configuration, "
9815                                         "aborting\n");
9816                                 goto err_dma;
9817                         }
9818                 }
9819         }
9820
9821 #ifndef HAVE_ASPM_QUIRKS
9822         /* 82575 requires that the pci-e link partner disable the L0s state */
9823         switch (pdev->device) {
9824         case E1000_DEV_ID_82575EB_COPPER:
9825         case E1000_DEV_ID_82575EB_FIBER_SERDES:
9826         case E1000_DEV_ID_82575GB_QUAD_COPPER:
9827                 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S);
9828         default:
9829                 break;
9830         }
9831
9832 #endif /* HAVE_ASPM_QUIRKS */
9833         err = pci_request_selected_regions(pdev,
9834                                            pci_select_bars(pdev,
9835                                                            IORESOURCE_MEM),
9836                                            igb_driver_name);
9837         if (err)
9838                 goto err_pci_reg;
9839
9840         pci_enable_pcie_error_reporting(pdev);
9841
9842         pci_set_master(pdev);
9843
9844         err = -ENOMEM;
9845 #endif /* NO_KNI */
9846 #ifdef HAVE_TX_MQ
9847         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
9848                                    IGB_MAX_TX_QUEUES);
9849 #else
9850         netdev = alloc_etherdev(sizeof(struct igb_adapter));
9851 #endif /* HAVE_TX_MQ */
9852         if (!netdev)
9853                 goto err_alloc_etherdev;
9854
9855         SET_MODULE_OWNER(netdev);
9856         SET_NETDEV_DEV(netdev, &pdev->dev);
9857
9858         //pci_set_drvdata(pdev, netdev);
9859         adapter = netdev_priv(netdev);
9860         adapter->netdev = netdev;
9861         adapter->pdev = pdev;
9862         hw = &adapter->hw;
9863         hw->back = adapter;
9864         adapter->port_num = hw->bus.func;
9865         adapter->msg_enable = (1 << debug) - 1;
9866
9867 #ifdef HAVE_PCI_ERS
9868         err = pci_save_state(pdev);
9869         if (err)
9870                 goto err_ioremap;
9871 #endif
9872         err = -EIO;
9873         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
9874                               pci_resource_len(pdev, 0));
9875         if (!hw->hw_addr)
9876                 goto err_ioremap;
9877
9878 #ifdef HAVE_NET_DEVICE_OPS
9879         netdev->netdev_ops = &igb_netdev_ops;
9880 #else /* HAVE_NET_DEVICE_OPS */
9881         netdev->open = &igb_open;
9882         netdev->stop = &igb_close;
9883         netdev->get_stats = &igb_get_stats;
9884 #ifdef HAVE_SET_RX_MODE
9885         netdev->set_rx_mode = &igb_set_rx_mode;
9886 #endif
9887         netdev->set_multicast_list = &igb_set_rx_mode;
9888         netdev->set_mac_address = &igb_set_mac;
9889         netdev->change_mtu = &igb_change_mtu;
9890         netdev->do_ioctl = &igb_ioctl;
9891 #ifdef HAVE_TX_TIMEOUT
9892         netdev->tx_timeout = &igb_tx_timeout;
9893 #endif
9894         netdev->vlan_rx_register = igb_vlan_mode;
9895         netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid;
9896         netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid;
9897 #ifdef CONFIG_NET_POLL_CONTROLLER
9898         netdev->poll_controller = igb_netpoll;
9899 #endif
9900         netdev->hard_start_xmit = &igb_xmit_frame;
9901 #endif /* HAVE_NET_DEVICE_OPS */
9902         igb_set_ethtool_ops(netdev);
9903 #ifdef HAVE_TX_TIMEOUT
9904         netdev->watchdog_timeo = 5 * HZ;
9905 #endif
9906
9907         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
9908
9909         adapter->bd_number = cards_found;
9910
9911         /* setup the private structure */
9912         err = igb_sw_init(adapter);
9913         if (err)
9914                 goto err_sw_init;
9915
9916         e1000_get_bus_info(hw);
9917
9918         hw->phy.autoneg_wait_to_complete = FALSE;
9919         hw->mac.adaptive_ifs = FALSE;
9920
9921         /* Copper options */
9922         if (hw->phy.media_type == e1000_media_type_copper) {
9923                 hw->phy.mdix = AUTO_ALL_MODES;
9924                 hw->phy.disable_polarity_correction = FALSE;
9925                 hw->phy.ms_type = e1000_ms_hw_default;
9926         }
9927
9928         if (e1000_check_reset_block(hw))
9929                 dev_info(pci_dev_to_dev(pdev),
9930                         "PHY reset is blocked due to SOL/IDER session.\n");
9931
9932         /*
9933          * features is initialized to 0 in allocation, it might have bits
9934          * set by igb_sw_init so we should use an or instead of an
9935          * assignment.
9936          */
9937         netdev->features |= NETIF_F_SG |
9938                             NETIF_F_IP_CSUM |
9939 #ifdef NETIF_F_IPV6_CSUM
9940                             NETIF_F_IPV6_CSUM |
9941 #endif
9942 #ifdef NETIF_F_TSO
9943                             NETIF_F_TSO |
9944 #ifdef NETIF_F_TSO6
9945                             NETIF_F_TSO6 |
9946 #endif
9947 #endif /* NETIF_F_TSO */
9948 #ifdef NETIF_F_RXHASH
9949                             NETIF_F_RXHASH |
9950 #endif
9951                             NETIF_F_RXCSUM |
9952 #ifdef NETIF_F_HW_VLAN_CTAG_RX
9953                             NETIF_F_HW_VLAN_CTAG_RX |
9954                             NETIF_F_HW_VLAN_CTAG_TX;
9955 #else
9956                             NETIF_F_HW_VLAN_RX |
9957                             NETIF_F_HW_VLAN_TX;
9958 #endif
9959
9960         if (hw->mac.type >= e1000_82576)
9961                 netdev->features |= NETIF_F_SCTP_CSUM;
9962
9963 #ifdef HAVE_NDO_SET_FEATURES
9964         /* copy netdev features into list of user selectable features */
9965         netdev->hw_features |= netdev->features;
9966 #ifndef IGB_NO_LRO
9967
9968         /* give us the option of enabling LRO later */
9969         netdev->hw_features |= NETIF_F_LRO;
9970 #endif
9971 #else
9972 #ifdef NETIF_F_GRO
9973
9974         /* this is only needed on kernels prior to 2.6.39 */
9975         netdev->features |= NETIF_F_GRO;
9976 #endif
9977 #endif
9978
9979         /* set this bit last since it cannot be part of hw_features */
9980 #ifdef NETIF_F_HW_VLAN_CTAG_FILTER
9981         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
9982 #else
9983         netdev->features |= NETIF_F_HW_VLAN_FILTER;
9984 #endif
9985
9986 #ifdef HAVE_NETDEV_VLAN_FEATURES
9987         netdev->vlan_features |= NETIF_F_TSO |
9988                                  NETIF_F_TSO6 |
9989                                  NETIF_F_IP_CSUM |
9990                                  NETIF_F_IPV6_CSUM |
9991                                  NETIF_F_SG;
9992
9993 #endif
9994         if (pci_using_dac)
9995                 netdev->features |= NETIF_F_HIGHDMA;
9996
9997 #ifdef NO_KNI
9998         adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
9999 #ifdef DEBUG
10000         if (adapter->dmac != IGB_DMAC_DISABLE)
10001                 printk("%s: DMA Coalescing is enabled..\n", netdev->name);
10002 #endif
10003
10004         /* before reading the NVM, reset the controller to put the device in a
10005          * known good starting state */
10006         e1000_reset_hw(hw);
10007 #endif /* NO_KNI */
10008
10009         /* make sure the NVM is good */
10010         if (e1000_validate_nvm_checksum(hw) < 0) {
10011                 dev_err(pci_dev_to_dev(pdev), "The NVM Checksum Is Not"
10012                         " Valid\n");
10013                 err = -EIO;
10014                 goto err_eeprom;
10015         }
10016
10017         /* copy the MAC address out of the NVM */
10018         if (e1000_read_mac_addr(hw))
10019                 dev_err(pci_dev_to_dev(pdev), "NVM Read Error\n");
10020         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
10021 #ifdef ETHTOOL_GPERMADDR
10022         memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
10023
10024         if (!is_valid_ether_addr(netdev->perm_addr)) {
10025 #else
10026         if (!is_valid_ether_addr(netdev->dev_addr)) {
10027 #endif
10028                 dev_err(pci_dev_to_dev(pdev), "Invalid MAC Address\n");
10029                 err = -EIO;
10030                 goto err_eeprom;
10031         }
10032
10033         memcpy(&adapter->mac_table[0].addr, hw->mac.addr, netdev->addr_len);
10034         adapter->mac_table[0].queue = adapter->vfs_allocated_count;
10035         adapter->mac_table[0].state = (IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE);
10036         igb_rar_set(adapter, 0);
10037
10038         /* get firmware version for ethtool -i */
10039         igb_set_fw_version(adapter);
10040
10041         /* Check if Media Autosense is enabled */
10042         if (hw->mac.type == e1000_82580)
10043                 igb_init_mas(adapter);
10044
10045 #ifdef NO_KNI
10046         setup_timer(&adapter->watchdog_timer, &igb_watchdog,
10047                     (unsigned long) adapter);
10048         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
10049                 setup_timer(&adapter->dma_err_timer, &igb_dma_err_timer,
10050                             (unsigned long) adapter);
10051         setup_timer(&adapter->phy_info_timer, &igb_update_phy_info,
10052                     (unsigned long) adapter);
10053
10054         INIT_WORK(&adapter->reset_task, igb_reset_task);
10055         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
10056         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
10057                 INIT_WORK(&adapter->dma_err_task, igb_dma_err_task);
10058 #endif
10059
10060         /* Initialize link properties that are user-changeable */
10061         adapter->fc_autoneg = true;
10062         hw->mac.autoneg = true;
10063         hw->phy.autoneg_advertised = 0x2f;
10064
10065         hw->fc.requested_mode = e1000_fc_default;
10066         hw->fc.current_mode = e1000_fc_default;
10067
10068         e1000_validate_mdi_setting(hw);
10069
10070         /* By default, support wake on port A */
10071         if (hw->bus.func == 0)
10072                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
10073
10074         /* Check the NVM for wake support for non-port A ports */
10075         if (hw->mac.type >= e1000_82580)
10076                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
10077                                  NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
10078                                  &eeprom_data);
10079         else if (hw->bus.func == 1)
10080                 e1000_read_nvm(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
10081
10082         if (eeprom_data & IGB_EEPROM_APME)
10083                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
10084
10085         /* now that we have the eeprom settings, apply the special cases where
10086          * the eeprom may be wrong or the board simply won't support wake on
10087          * lan on a particular port */
10088         switch (pdev->device) {
10089         case E1000_DEV_ID_82575GB_QUAD_COPPER:
10090                 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10091                 break;
10092         case E1000_DEV_ID_82575EB_FIBER_SERDES:
10093         case E1000_DEV_ID_82576_FIBER:
10094         case E1000_DEV_ID_82576_SERDES:
10095                 /* Wake events only supported on port A for dual fiber
10096                  * regardless of eeprom setting */
10097                 if (E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_FUNC_1)
10098                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10099                 break;
10100         case E1000_DEV_ID_82576_QUAD_COPPER:
10101         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
10102                 /* if quad port adapter, disable WoL on all but port A */
10103                 if (global_quad_port_a != 0)
10104                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10105                 else
10106                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
10107                 /* Reset for multiple quad port adapters */
10108                 if (++global_quad_port_a == 4)
10109                         global_quad_port_a = 0;
10110                 break;
10111         default:
10112                 /* If the device can't wake, don't set software support */
10113                 if (!device_can_wakeup(&adapter->pdev->dev))
10114                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10115                 break;
10116         }
10117
10118         /* initialize the wol settings based on the eeprom settings */
10119         if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
10120                 adapter->wol |= E1000_WUFC_MAG;
10121
10122         /* Some vendors want WoL disabled by default, but still supported */
10123         if ((hw->mac.type == e1000_i350) &&
10124             (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
10125                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
10126                 adapter->wol = 0;
10127         }
10128
10129 #ifdef NO_KNI
10130         device_set_wakeup_enable(pci_dev_to_dev(adapter->pdev),
10131                                  adapter->flags & IGB_FLAG_WOL_SUPPORTED);
10132
10133         /* reset the hardware with the new settings */
10134         igb_reset(adapter);
10135         adapter->devrc = 0;
10136
10137 #ifdef HAVE_I2C_SUPPORT
10138         /* Init the I2C interface */
10139         err = igb_init_i2c(adapter);
10140         if (err) {
10141                 dev_err(&pdev->dev, "failed to init i2c interface\n");
10142                 goto err_eeprom;
10143         }
10144 #endif /* HAVE_I2C_SUPPORT */
10145
10146         /* let the f/w know that the h/w is now under the control of the
10147          * driver. */
10148         igb_get_hw_control(adapter);
10149
10150         strncpy(netdev->name, "eth%d", IFNAMSIZ);
10151         err = register_netdev(netdev);
10152         if (err)
10153                 goto err_register;
10154
10155 #ifdef CONFIG_IGB_VMDQ_NETDEV
10156         err = igb_init_vmdq_netdevs(adapter);
10157         if (err)
10158                 goto err_register;
10159 #endif
10160         /* carrier off reporting is important to ethtool even BEFORE open */
10161         netif_carrier_off(netdev);
10162
10163 #ifdef IGB_DCA
10164         if (dca_add_requester(&pdev->dev) == E1000_SUCCESS) {
10165                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
10166                 dev_info(pci_dev_to_dev(pdev), "DCA enabled\n");
10167                 igb_setup_dca(adapter);
10168         }
10169
10170 #endif
10171 #ifdef HAVE_PTP_1588_CLOCK
10172         /* do hw tstamp init after resetting */
10173         igb_ptp_init(adapter);
10174 #endif /* HAVE_PTP_1588_CLOCK */
10175
10176 #endif /* NO_KNI */
10177         dev_info(pci_dev_to_dev(pdev), "Intel(R) Gigabit Ethernet Network Connection\n");
10178         /* print bus type/speed/width info */
10179         dev_info(pci_dev_to_dev(pdev), "%s: (PCIe:%s:%s) ",
10180                  netdev->name,
10181                  ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5GT/s" :
10182                   (hw->bus.speed == e1000_bus_speed_5000) ? "5.0GT/s" :
10183                   (hw->mac.type == e1000_i354) ? "integrated" :
10184                                                             "unknown"),
10185                  ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
10186                   (hw->bus.width == e1000_bus_width_pcie_x2) ? "Width x2" :
10187                   (hw->bus.width == e1000_bus_width_pcie_x1) ? "Width x1" :
10188                   (hw->mac.type == e1000_i354) ? "integrated" :
10189                    "unknown"));
10190         dev_info(pci_dev_to_dev(pdev), "%s: MAC: ", netdev->name);
10191         for (i = 0; i < 6; i++)
10192                 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
10193
10194         ret_val = e1000_read_pba_string(hw, pba_str, E1000_PBANUM_LENGTH);
10195         if (ret_val)
10196                 strncpy(pba_str, "Unknown", sizeof(pba_str) - 1);
10197         dev_info(pci_dev_to_dev(pdev), "%s: PBA No: %s\n", netdev->name,
10198                  pba_str);
10199
10200
10201         /* Initialize the thermal sensor on i350 devices. */
10202         if (hw->mac.type == e1000_i350) {
10203                 if (hw->bus.func == 0) {
10204                         u16 ets_word;
10205
10206                         /*
10207                          * Read the NVM to determine if this i350 device
10208                          * supports an external thermal sensor.
10209                          */
10210                         e1000_read_nvm(hw, NVM_ETS_CFG, 1, &ets_word);
10211                         if (ets_word != 0x0000 && ets_word != 0xFFFF)
10212                                 adapter->ets = true;
10213                         else
10214                                 adapter->ets = false;
10215                 }
10216 #ifdef NO_KNI
10217 #ifdef IGB_HWMON
10218
10219                 igb_sysfs_init(adapter);
10220 #else
10221 #ifdef IGB_PROCFS
10222
10223                 igb_procfs_init(adapter);
10224 #endif /* IGB_PROCFS */
10225 #endif /* IGB_HWMON */
10226 #endif /* NO_KNI */
10227         } else {
10228                 adapter->ets = false;
10229         }
10230
10231         if (hw->phy.media_type == e1000_media_type_copper) {
10232                 switch (hw->mac.type) {
10233                 case e1000_i350:
10234                 case e1000_i210:
10235                 case e1000_i211:
10236                         /* Enable EEE for internal copper PHY devices */
10237                         err = e1000_set_eee_i350(hw);
10238                         if ((!err) &&
10239                             (adapter->flags & IGB_FLAG_EEE))
10240                                 adapter->eee_advert =
10241                                         MDIO_EEE_100TX | MDIO_EEE_1000T;
10242                         break;
10243                 case e1000_i354:
10244                         if ((E1000_READ_REG(hw, E1000_CTRL_EXT)) &
10245                             (E1000_CTRL_EXT_LINK_MODE_SGMII)) {
10246                                 err = e1000_set_eee_i354(hw);
10247                                 if ((!err) &&
10248                                     (adapter->flags & IGB_FLAG_EEE))
10249                                         adapter->eee_advert =
10250                                            MDIO_EEE_100TX | MDIO_EEE_1000T;
10251                         }
10252                         break;
10253                 default:
10254                         break;
10255                 }
10256         }
10257
10258         /* send driver version info to firmware */
10259         if (hw->mac.type >= e1000_i350)
10260                 igb_init_fw(adapter);
10261
10262 #ifndef IGB_NO_LRO
10263         if (netdev->features & NETIF_F_LRO)
10264                 dev_info(pci_dev_to_dev(pdev), "Internal LRO is enabled \n");
10265         else
10266                 dev_info(pci_dev_to_dev(pdev), "LRO is disabled \n");
10267 #endif
10268         dev_info(pci_dev_to_dev(pdev),
10269                  "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
10270                  adapter->msix_entries ? "MSI-X" :
10271                  (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
10272                  adapter->num_rx_queues, adapter->num_tx_queues);
10273
10274         cards_found++;
10275         *lad_dev = netdev;
10276
10277         pm_runtime_put_noidle(&pdev->dev);
10278         return 0;
10279
10280 //err_register:
10281 //      igb_release_hw_control(adapter);
10282 #ifdef HAVE_I2C_SUPPORT
10283         memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
10284 #endif /* HAVE_I2C_SUPPORT */
10285 err_eeprom:
10286 //      if (!e1000_check_reset_block(hw))
10287 //              e1000_phy_hw_reset(hw);
10288
10289         if (hw->flash_address)
10290                 iounmap(hw->flash_address);
10291 err_sw_init:
10292 //      igb_clear_interrupt_scheme(adapter);
10293 //      igb_reset_sriov_capability(adapter);
10294         iounmap(hw->hw_addr);
10295 err_ioremap:
10296         free_netdev(netdev);
10297 err_alloc_etherdev:
10298 //      pci_release_selected_regions(pdev,
10299 //                                   pci_select_bars(pdev, IORESOURCE_MEM));
10300 //err_pci_reg:
10301 //err_dma:
10302         pci_disable_device(pdev);
10303         return err;
10304 }
10305
10306
10307 void igb_kni_remove(struct pci_dev *pdev)
10308 {
10309         pci_disable_device(pdev);
10310 }