lib/librte_eal/linuxapp/kni/ethtool/igb/igb_main.c

   1 /*******************************************************************************
   2
   3   Intel(R) Gigabit Ethernet Linux driver
   4   Copyright(c) 2007-2013 Intel Corporation.
   5
   6   This program is free software; you can redistribute it and/or modify it
   7   under the terms and conditions of the GNU General Public License,
   8   version 2, as published by the Free Software Foundation.
   9
  10   This program is distributed in the hope it will be useful, but WITHOUT
  11   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  12   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  13   more details.
  14
  15   You should have received a copy of the GNU General Public License along with
  16   this program; if not, write to the Free Software Foundation, Inc.,
  17   51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  18
  19   The full GNU General Public License is included in this distribution in
  20   the file called "LICENSE.GPL".
  21
  22   Contact Information:
  23   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  24   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  25
  26 *******************************************************************************/
  27
  28 #include <linux/module.h>
  29 #include <linux/types.h>
  30 #include <linux/init.h>
  31 #include <linux/vmalloc.h>
  32 #include <linux/pagemap.h>
  33 #include <linux/netdevice.h>
  34 #include <linux/tcp.h>
  35 #ifdef NETIF_F_TSO
  36 #include <net/checksum.h>
  37 #ifdef NETIF_F_TSO6
  38 #include <linux/ipv6.h>
  39 #include <net/ip6_checksum.h>
  40 #endif
  41 #endif
  42 #ifdef SIOCGMIIPHY
  43 #include <linux/mii.h>
  44 #endif
  45 #ifdef SIOCETHTOOL
  46 #include <linux/ethtool.h>
  47 #endif
  48 #include <linux/if_vlan.h>
  49 #ifdef CONFIG_PM_RUNTIME
  50 #include <linux/pm_runtime.h>
  51 #endif /* CONFIG_PM_RUNTIME */
  52
  53 #include <linux/if_bridge.h>
  54 #include "igb.h"
  55 #include "igb_vmdq.h"
  56
  57 #include <linux/uio_driver.h>
  58
  59 #if defined(DEBUG) || defined (DEBUG_DUMP) || defined (DEBUG_ICR) || defined(DEBUG_ITR)
  60 #define DRV_DEBUG "_debug"
  61 #else
  62 #define DRV_DEBUG
  63 #endif
  64 #define DRV_HW_PERF
  65 #define VERSION_SUFFIX
  66
  67 #define MAJ 5
  68 #define MIN 0
  69 #define BUILD 6
  70 #define DRV_VERSION __stringify(MAJ) "." __stringify(MIN) "." __stringify(BUILD) VERSION_SUFFIX DRV_DEBUG DRV_HW_PERF
  71
  72 char igb_driver_name[] = "igb";
  73 char igb_driver_version[] = DRV_VERSION;
  74 static const char igb_driver_string[] =
  75                                 "Intel(R) Gigabit Ethernet Network Driver";
  76 static const char igb_copyright[] =
  77                                 "Copyright (c) 2007-2013 Intel Corporation.";
  78
  79 const struct pci_device_id igb_pci_tbl[] = {
  80         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_1GBPS) },
  81         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_SGMII) },
  82         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I354_BACKPLANE_2_5GBPS) },
  83         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER) },
  84         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_FIBER) },
  85         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES) },
  86         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SGMII) },
  87         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_COPPER_FLASHLESS) },
  88         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I210_SERDES_FLASHLESS) },
  89         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I211_COPPER) },
  90         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_COPPER) },
  91         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_FIBER) },
  92         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SERDES) },
  93         { PCI_VDEVICE(INTEL, E1000_DEV_ID_I350_SGMII) },
  94         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER) },
  95         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_FIBER) },
  96         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_QUAD_FIBER) },
  97         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SERDES) },
  98         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_SGMII) },
  99         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82580_COPPER_DUAL) },
 100         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SGMII) },
 101         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SERDES) },
 102         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_BACKPLANE) },
 103         { PCI_VDEVICE(INTEL, E1000_DEV_ID_DH89XXCC_SFP) },
 104         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576) },
 105         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS) },
 106         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_NS_SERDES) },
 107         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_FIBER) },
 108         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES) },
 109         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_SERDES_QUAD) },
 110         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER_ET2) },
 111         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82576_QUAD_COPPER) },
 112         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_COPPER) },
 113         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575EB_FIBER_SERDES) },
 114         { PCI_VDEVICE(INTEL, E1000_DEV_ID_82575GB_QUAD_COPPER) },
 115         /* required last entry */
 116         {0, }
 117 };
 118
 119 //MODULE_DEVICE_TABLE(pci, igb_pci_tbl);
 120 static void igb_set_sriov_capability(struct igb_adapter *adapter) __attribute__((__unused__));
 121 void igb_reset(struct igb_adapter *);
 122 static int igb_setup_all_tx_resources(struct igb_adapter *);
 123 static int igb_setup_all_rx_resources(struct igb_adapter *);
 124 static void igb_free_all_tx_resources(struct igb_adapter *);
 125 static void igb_free_all_rx_resources(struct igb_adapter *);
 126 static void igb_setup_mrqc(struct igb_adapter *);
 127 void igb_update_stats(struct igb_adapter *);
 128 static int igb_probe(struct pci_dev *, const struct pci_device_id *);
 129 static void __devexit igb_remove(struct pci_dev *pdev);
 130 static int igb_sw_init(struct igb_adapter *);
 131 static int igb_open(struct net_device *);
 132 static int igb_close(struct net_device *);
 133 static void igb_configure(struct igb_adapter *);
 134 static void igb_configure_tx(struct igb_adapter *);
 135 static void igb_configure_rx(struct igb_adapter *);
 136 static void igb_clean_all_tx_rings(struct igb_adapter *);
 137 static void igb_clean_all_rx_rings(struct igb_adapter *);
 138 static void igb_clean_tx_ring(struct igb_ring *);
 139 static void igb_set_rx_mode(struct net_device *);
 140 static void igb_update_phy_info(unsigned long);
 141 static void igb_watchdog(unsigned long);
 142 static void igb_watchdog_task(struct work_struct *);
 143 static void igb_dma_err_task(struct work_struct *);
 144 static void igb_dma_err_timer(unsigned long data);
 145 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb, struct net_device *);
 146 static struct net_device_stats *igb_get_stats(struct net_device *);
 147 static int igb_change_mtu(struct net_device *, int);
 148 void igb_full_sync_mac_table(struct igb_adapter *adapter);
 149 static int igb_set_mac(struct net_device *, void *);
 150 static void igb_set_uta(struct igb_adapter *adapter);
 151 static irqreturn_t igb_intr(int irq, void *);
 152 static irqreturn_t igb_intr_msi(int irq, void *);
 153 static irqreturn_t igb_msix_other(int irq, void *);
 154 static irqreturn_t igb_msix_ring(int irq, void *);
 155 #ifdef IGB_DCA
 156 static void igb_update_dca(struct igb_q_vector *);
 157 static void igb_setup_dca(struct igb_adapter *);
 158 #endif /* IGB_DCA */
 159 static int igb_poll(struct napi_struct *, int);
 160 static bool igb_clean_tx_irq(struct igb_q_vector *);
 161 static bool igb_clean_rx_irq(struct igb_q_vector *, int);
 162 static int igb_ioctl(struct net_device *, struct ifreq *, int cmd);
 163 static void igb_tx_timeout(struct net_device *);
 164 static void igb_reset_task(struct work_struct *);
 165 #ifdef HAVE_VLAN_RX_REGISTER
 166 static void igb_vlan_mode(struct net_device *, struct vlan_group *);
 167 #endif
 168 #ifdef HAVE_VLAN_PROTOCOL
 169 static int igb_vlan_rx_add_vid(struct net_device *,
 170                                __be16 proto, u16);
 171 static int igb_vlan_rx_kill_vid(struct net_device *,
 172                                 __be16 proto, u16);
 173 #elif defined HAVE_INT_NDO_VLAN_RX_ADD_VID
 174 #ifdef NETIF_F_HW_VLAN_CTAG_RX
 175 static int igb_vlan_rx_add_vid(struct net_device *,
 176                                __always_unused __be16 proto, u16);
 177 static int igb_vlan_rx_kill_vid(struct net_device *,
 178                                 __always_unused __be16 proto, u16);
 179 #else
 180 static int igb_vlan_rx_add_vid(struct net_device *, u16);
 181 static int igb_vlan_rx_kill_vid(struct net_device *, u16);
 182 #endif
 183 #else
 184 static void igb_vlan_rx_add_vid(struct net_device *, u16);
 185 static void igb_vlan_rx_kill_vid(struct net_device *, u16);
 186 #endif
 187 static void igb_restore_vlan(struct igb_adapter *);
 188 void igb_rar_set(struct igb_adapter *adapter, u32 index);
 189 static void igb_ping_all_vfs(struct igb_adapter *);
 190 static void igb_msg_task(struct igb_adapter *);
 191 static void igb_vmm_control(struct igb_adapter *);
 192 static int igb_set_vf_mac(struct igb_adapter *, int, unsigned char *);
 193 static void igb_restore_vf_multicasts(struct igb_adapter *adapter);
 194 static void igb_process_mdd_event(struct igb_adapter *);
 195 #ifdef IFLA_VF_MAX
 196 static int igb_ndo_set_vf_mac( struct net_device *netdev, int vf, u8 *mac);
 197 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
 198 #ifdef HAVE_VF_VLAN_PROTO
 199                                 int vf, u16 vlan, u8 qos, __be16 vlan_proto);
 200 #else
 201                                 int vf, u16 vlan, u8 qos);
 202 #endif
 203 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
 204 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
 205                                 bool setting);
 206 #endif
 207 #ifdef HAVE_VF_MIN_MAX_TXRATE
 208 static int igb_ndo_set_vf_bw(struct net_device *, int, int, int);
 209 #else /* HAVE_VF_MIN_MAX_TXRATE */
 210 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate);
 211 #endif /* HAVE_VF_MIN_MAX_TXRATE */
 212 static int igb_ndo_get_vf_config(struct net_device *netdev, int vf,
 213                                  struct ifla_vf_info *ivi);
 214 static void igb_check_vf_rate_limit(struct igb_adapter *);
 215 #endif
 216 static int igb_vf_configure(struct igb_adapter *adapter, int vf);
 217 #ifdef CONFIG_PM
 218 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
 219 static int igb_suspend(struct device *dev);
 220 static int igb_resume(struct device *dev);
 221 #ifdef CONFIG_PM_RUNTIME
 222 static int igb_runtime_suspend(struct device *dev);
 223 static int igb_runtime_resume(struct device *dev);
 224 static int igb_runtime_idle(struct device *dev);
 225 #endif /* CONFIG_PM_RUNTIME */
 226 static const struct dev_pm_ops igb_pm_ops = {
 227 #if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,34)
 228         .suspend = igb_suspend,
 229         .resume = igb_resume,
 230         .freeze = igb_suspend,
 231         .thaw = igb_resume,
 232         .poweroff = igb_suspend,
 233         .restore = igb_resume,
 234 #ifdef CONFIG_PM_RUNTIME
 235         .runtime_suspend = igb_runtime_suspend,
 236         .runtime_resume = igb_runtime_resume,
 237         .runtime_idle = igb_runtime_idle,
 238 #endif
 239 #else /* Linux >= 2.6.34 */
 240         SET_SYSTEM_SLEEP_PM_OPS(igb_suspend, igb_resume)
 241 #ifdef CONFIG_PM_RUNTIME
 242         SET_RUNTIME_PM_OPS(igb_runtime_suspend, igb_runtime_resume,
 243                         igb_runtime_idle)
 244 #endif /* CONFIG_PM_RUNTIME */
 245 #endif /* Linux version */
 246 };
 247 #else
 248 static int igb_suspend(struct pci_dev *pdev, pm_message_t state);
 249 static int igb_resume(struct pci_dev *pdev);
 250 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
 251 #endif /* CONFIG_PM */
 252 #ifndef USE_REBOOT_NOTIFIER
 253 static void igb_shutdown(struct pci_dev *);
 254 #else
 255 static int igb_notify_reboot(struct notifier_block *, unsigned long, void *);
 256 static struct notifier_block igb_notifier_reboot = {
 257         .notifier_call  = igb_notify_reboot,
 258         .next           = NULL,
 259         .priority       = 0
 260 };
 261 #endif
 262 #ifdef IGB_DCA
 263 static int igb_notify_dca(struct notifier_block *, unsigned long, void *);
 264 static struct notifier_block dca_notifier = {
 265         .notifier_call  = igb_notify_dca,
 266         .next           = NULL,
 267         .priority       = 0
 268 };
 269 #endif
 270 #ifdef CONFIG_NET_POLL_CONTROLLER
 271 /* for netdump / net console */
 272 static void igb_netpoll(struct net_device *);
 273 #endif
 274
 275 #ifdef HAVE_PCI_ERS
 276 static pci_ers_result_t igb_io_error_detected(struct pci_dev *,
 277                      pci_channel_state_t);
 278 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *);
 279 static void igb_io_resume(struct pci_dev *);
 280
 281 static struct pci_error_handlers igb_err_handler = {
 282         .error_detected = igb_io_error_detected,
 283         .slot_reset = igb_io_slot_reset,
 284         .resume = igb_io_resume,
 285 };
 286 #endif
 287
 288 static void igb_init_fw(struct igb_adapter *adapter);
 289 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba);
 290
 291 static struct pci_driver igb_driver = {
 292         .name     = igb_driver_name,
 293         .id_table = igb_pci_tbl,
 294         .probe    = igb_probe,
 295         .remove   = __devexit_p(igb_remove),
 296 #ifdef CONFIG_PM
 297 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
 298         .driver.pm = &igb_pm_ops,
 299 #else
 300         .suspend  = igb_suspend,
 301         .resume   = igb_resume,
 302 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
 303 #endif /* CONFIG_PM */
 304 #ifndef USE_REBOOT_NOTIFIER
 305         .shutdown = igb_shutdown,
 306 #endif
 307 #ifdef HAVE_PCI_ERS
 308         .err_handler = &igb_err_handler
 309 #endif
 310 };
 311
 312 //MODULE_AUTHOR("Intel Corporation, <e1000-devel@lists.sourceforge.net>");
 313 //MODULE_DESCRIPTION("Intel(R) Gigabit Ethernet Network Driver");
 314 //MODULE_LICENSE("GPL");
 315 //MODULE_VERSION(DRV_VERSION);
 316
 317 static void igb_vfta_set(struct igb_adapter *adapter, u32 vid, bool add)
 318 {
 319         struct e1000_hw *hw = &adapter->hw;
 320         struct e1000_host_mng_dhcp_cookie *mng_cookie = &hw->mng_cookie;
 321         u32 index = (vid >> E1000_VFTA_ENTRY_SHIFT) & E1000_VFTA_ENTRY_MASK;
 322         u32 mask = 1 << (vid & E1000_VFTA_ENTRY_BIT_SHIFT_MASK);
 323         u32 vfta;
 324
 325         /*
 326          * if this is the management vlan the only option is to add it in so
 327          * that the management pass through will continue to work
 328          */
 329         if ((mng_cookie->status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
 330             (vid == mng_cookie->vlan_id))
 331                 add = TRUE;
 332
 333         vfta = adapter->shadow_vfta[index];
 334
 335         if (add)
 336                 vfta |= mask;
 337         else
 338                 vfta &= ~mask;
 339
 340         e1000_write_vfta(hw, index, vfta);
 341         adapter->shadow_vfta[index] = vfta;
 342 }
 343
 344 static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
 345 //module_param(debug, int, 0);
 346 //MODULE_PARM_DESC(debug, "Debug level (0=none, ..., 16=all)");
 347
 348 /**
 349  * igb_init_module - Driver Registration Routine
 350  *
 351  * igb_init_module is the first routine called when the driver is
 352  * loaded. All it does is register with the PCI subsystem.
 353  **/
 354 static int __init igb_init_module(void)
 355 {
 356         int ret;
 357
 358         printk(KERN_INFO "%s - version %s\n",
 359                igb_driver_string, igb_driver_version);
 360
 361         printk(KERN_INFO "%s\n", igb_copyright);
 362 #ifdef IGB_HWMON
 363 /* only use IGB_PROCFS if IGB_HWMON is not defined */
 364 #else
 365 #ifdef IGB_PROCFS
 366         if (igb_procfs_topdir_init())
 367                 printk(KERN_INFO "Procfs failed to initialize topdir\n");
 368 #endif /* IGB_PROCFS */
 369 #endif /* IGB_HWMON  */
 370
 371 #ifdef IGB_DCA
 372         dca_register_notify(&dca_notifier);
 373 #endif
 374         ret = pci_register_driver(&igb_driver);
 375 #ifdef USE_REBOOT_NOTIFIER
 376         if (ret >= 0) {
 377                 register_reboot_notifier(&igb_notifier_reboot);
 378         }
 379 #endif
 380         return ret;
 381 }
 382
 383 #undef module_init
 384 #define module_init(x) static int x(void)  __attribute__((__unused__));
 385 module_init(igb_init_module);
 386
 387 /**
 388  * igb_exit_module - Driver Exit Cleanup Routine
 389  *
 390  * igb_exit_module is called just before the driver is removed
 391  * from memory.
 392  **/
 393 static void __exit igb_exit_module(void)
 394 {
 395 #ifdef IGB_DCA
 396         dca_unregister_notify(&dca_notifier);
 397 #endif
 398 #ifdef USE_REBOOT_NOTIFIER
 399         unregister_reboot_notifier(&igb_notifier_reboot);
 400 #endif
 401         pci_unregister_driver(&igb_driver);
 402
 403 #ifdef IGB_HWMON
 404 /* only compile IGB_PROCFS if IGB_HWMON is not defined */
 405 #else
 406 #ifdef IGB_PROCFS
 407         igb_procfs_topdir_exit();
 408 #endif /* IGB_PROCFS */
 409 #endif /* IGB_HWMON */
 410 }
 411
 412 #undef module_exit
 413 #define module_exit(x) static void x(void)  __attribute__((__unused__));
 414 module_exit(igb_exit_module);
 415
 416 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))
 417 /**
 418  * igb_cache_ring_register - Descriptor ring to register mapping
 419  * @adapter: board private structure to initialize
 420  *
 421  * Once we know the feature-set enabled for the device, we'll cache
 422  * the register offset the descriptor ring is assigned to.
 423  **/
 424 static void igb_cache_ring_register(struct igb_adapter *adapter)
 425 {
 426         int i = 0, j = 0;
 427         u32 rbase_offset = adapter->vfs_allocated_count;
 428
 429         switch (adapter->hw.mac.type) {
 430         case e1000_82576:
 431                 /* The queues are allocated for virtualization such that VF 0
 432                  * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc.
 433                  * In order to avoid collision we start at the first free queue
 434                  * and continue consuming queues in the same sequence
 435                  */
 436                 if ((adapter->rss_queues > 1) && adapter->vmdq_pools) {
 437                         for (; i < adapter->rss_queues; i++)
 438                                 adapter->rx_ring[i]->reg_idx = rbase_offset +
 439                                                                Q_IDX_82576(i);
 440                 }
 441         case e1000_82575:
 442         case e1000_82580:
 443         case e1000_i350:
 444         case e1000_i354:
 445         case e1000_i210:
 446         case e1000_i211:
 447         default:
 448                 for (; i < adapter->num_rx_queues; i++)
 449                         adapter->rx_ring[i]->reg_idx = rbase_offset + i;
 450                 for (; j < adapter->num_tx_queues; j++)
 451                         adapter->tx_ring[j]->reg_idx = rbase_offset + j;
 452                 break;
 453         }
 454 }
 455
 456 static void igb_configure_lli(struct igb_adapter *adapter)
 457 {
 458         struct e1000_hw *hw = &adapter->hw;
 459         u16 port;
 460
 461         /* LLI should only be enabled for MSI-X or MSI interrupts */
 462         if (!adapter->msix_entries && !(adapter->flags & IGB_FLAG_HAS_MSI))
 463                 return;
 464
 465         if (adapter->lli_port) {
 466                 /* use filter 0 for port */
 467                 port = htons((u16)adapter->lli_port);
 468                 E1000_WRITE_REG(hw, E1000_IMIR(0),
 469                         (port | E1000_IMIR_PORT_IM_EN));
 470                 E1000_WRITE_REG(hw, E1000_IMIREXT(0),
 471                         (E1000_IMIREXT_SIZE_BP | E1000_IMIREXT_CTRL_BP));
 472         }
 473
 474         if (adapter->flags & IGB_FLAG_LLI_PUSH) {
 475                 /* use filter 1 for push flag */
 476                 E1000_WRITE_REG(hw, E1000_IMIR(1),
 477                         (E1000_IMIR_PORT_BP | E1000_IMIR_PORT_IM_EN));
 478                 E1000_WRITE_REG(hw, E1000_IMIREXT(1),
 479                         (E1000_IMIREXT_SIZE_BP | E1000_IMIREXT_CTRL_PSH));
 480         }
 481
 482         if (adapter->lli_size) {
 483                 /* use filter 2 for size */
 484                 E1000_WRITE_REG(hw, E1000_IMIR(2),
 485                         (E1000_IMIR_PORT_BP | E1000_IMIR_PORT_IM_EN));
 486                 E1000_WRITE_REG(hw, E1000_IMIREXT(2),
 487                         (adapter->lli_size | E1000_IMIREXT_CTRL_BP));
 488         }
 489
 490 }
 491
 492 /**
 493  *  igb_write_ivar - configure ivar for given MSI-X vector
 494  *  @hw: pointer to the HW structure
 495  *  @msix_vector: vector number we are allocating to a given ring
 496  *  @index: row index of IVAR register to write within IVAR table
 497  *  @offset: column offset of in IVAR, should be multiple of 8
 498  *
 499  *  This function is intended to handle the writing of the IVAR register
 500  *  for adapters 82576 and newer.  The IVAR table consists of 2 columns,
 501  *  each containing an cause allocation for an Rx and Tx ring, and a
 502  *  variable number of rows depending on the number of queues supported.
 503  **/
 504 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector,
 505                            int index, int offset)
 506 {
 507         u32 ivar = E1000_READ_REG_ARRAY(hw, E1000_IVAR0, index);
 508
 509         /* clear any bits that are currently set */
 510         ivar &= ~((u32)0xFF << offset);
 511
 512         /* write vector and valid bit */
 513         ivar |= (msix_vector | E1000_IVAR_VALID) << offset;
 514
 515         E1000_WRITE_REG_ARRAY(hw, E1000_IVAR0, index, ivar);
 516 }
 517
 518 #define IGB_N0_QUEUE -1
 519 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector)
 520 {
 521         struct igb_adapter *adapter = q_vector->adapter;
 522         struct e1000_hw *hw = &adapter->hw;
 523         int rx_queue = IGB_N0_QUEUE;
 524         int tx_queue = IGB_N0_QUEUE;
 525         u32 msixbm = 0;
 526
 527         if (q_vector->rx.ring)
 528                 rx_queue = q_vector->rx.ring->reg_idx;
 529         if (q_vector->tx.ring)
 530                 tx_queue = q_vector->tx.ring->reg_idx;
 531
 532         switch (hw->mac.type) {
 533         case e1000_82575:
 534                 /* The 82575 assigns vectors using a bitmask, which matches the
 535                    bitmask for the EICR/EIMS/EIMC registers.  To assign one
 536                    or more queues to a vector, we write the appropriate bits
 537                    into the MSIXBM register for that vector. */
 538                 if (rx_queue > IGB_N0_QUEUE)
 539                         msixbm = E1000_EICR_RX_QUEUE0 << rx_queue;
 540                 if (tx_queue > IGB_N0_QUEUE)
 541                         msixbm |= E1000_EICR_TX_QUEUE0 << tx_queue;
 542                 if (!adapter->msix_entries && msix_vector == 0)
 543                         msixbm |= E1000_EIMS_OTHER;
 544                 E1000_WRITE_REG_ARRAY(hw, E1000_MSIXBM(0), msix_vector, msixbm);
 545                 q_vector->eims_value = msixbm;
 546                 break;
 547         case e1000_82576:
 548                 /*
 549                  * 82576 uses a table that essentially consists of 2 columns
 550                  * with 8 rows.  The ordering is column-major so we use the
 551                  * lower 3 bits as the row index, and the 4th bit as the
 552                  * column offset.
 553                  */
 554                 if (rx_queue > IGB_N0_QUEUE)
 555                         igb_write_ivar(hw, msix_vector,
 556                                        rx_queue & 0x7,
 557                                        (rx_queue & 0x8) << 1);
 558                 if (tx_queue > IGB_N0_QUEUE)
 559                         igb_write_ivar(hw, msix_vector,
 560                                        tx_queue & 0x7,
 561                                        ((tx_queue & 0x8) << 1) + 8);
 562                 q_vector->eims_value = 1 << msix_vector;
 563                 break;
 564         case e1000_82580:
 565         case e1000_i350:
 566         case e1000_i354:
 567         case e1000_i210:
 568         case e1000_i211:
 569                 /*
 570                  * On 82580 and newer adapters the scheme is similar to 82576
 571                  * however instead of ordering column-major we have things
 572                  * ordered row-major.  So we traverse the table by using
 573                  * bit 0 as the column offset, and the remaining bits as the
 574                  * row index.
 575                  */
 576                 if (rx_queue > IGB_N0_QUEUE)
 577                         igb_write_ivar(hw, msix_vector,
 578                                        rx_queue >> 1,
 579                                        (rx_queue & 0x1) << 4);
 580                 if (tx_queue > IGB_N0_QUEUE)
 581                         igb_write_ivar(hw, msix_vector,
 582                                        tx_queue >> 1,
 583                                        ((tx_queue & 0x1) << 4) + 8);
 584                 q_vector->eims_value = 1 << msix_vector;
 585                 break;
 586         default:
 587                 BUG();
 588                 break;
 589         }
 590
 591         /* add q_vector eims value to global eims_enable_mask */
 592         adapter->eims_enable_mask |= q_vector->eims_value;
 593
 594         /* configure q_vector to set itr on first interrupt */
 595         q_vector->set_itr = 1;
 596 }
 597
 598 /**
 599  * igb_configure_msix - Configure MSI-X hardware
 600  *
 601  * igb_configure_msix sets up the hardware to properly
 602  * generate MSI-X interrupts.
 603  **/
 604 static void igb_configure_msix(struct igb_adapter *adapter)
 605 {
 606         u32 tmp;
 607         int i, vector = 0;
 608         struct e1000_hw *hw = &adapter->hw;
 609
 610         adapter->eims_enable_mask = 0;
 611
 612         /* set vector for other causes, i.e. link changes */
 613         switch (hw->mac.type) {
 614         case e1000_82575:
 615                 tmp = E1000_READ_REG(hw, E1000_CTRL_EXT);
 616                 /* enable MSI-X PBA support*/
 617                 tmp |= E1000_CTRL_EXT_PBA_CLR;
 618
 619                 /* Auto-Mask interrupts upon ICR read. */
 620                 tmp |= E1000_CTRL_EXT_EIAME;
 621                 tmp |= E1000_CTRL_EXT_IRCA;
 622
 623                 E1000_WRITE_REG(hw, E1000_CTRL_EXT, tmp);
 624
 625                 /* enable msix_other interrupt */
 626                 E1000_WRITE_REG_ARRAY(hw, E1000_MSIXBM(0), vector++,
 627                                       E1000_EIMS_OTHER);
 628                 adapter->eims_other = E1000_EIMS_OTHER;
 629
 630                 break;
 631
 632         case e1000_82576:
 633         case e1000_82580:
 634         case e1000_i350:
 635         case e1000_i354:
 636         case e1000_i210:
 637         case e1000_i211:
 638                 /* Turn on MSI-X capability first, or our settings
 639                  * won't stick.  And it will take days to debug. */
 640                 E1000_WRITE_REG(hw, E1000_GPIE, E1000_GPIE_MSIX_MODE |
 641                                 E1000_GPIE_PBA | E1000_GPIE_EIAME |
 642                                 E1000_GPIE_NSICR);
 643
 644                 /* enable msix_other interrupt */
 645                 adapter->eims_other = 1 << vector;
 646                 tmp = (vector++ | E1000_IVAR_VALID) << 8;
 647
 648                 E1000_WRITE_REG(hw, E1000_IVAR_MISC, tmp);
 649                 break;
 650         default:
 651                 /* do nothing, since nothing else supports MSI-X */
 652                 break;
 653         } /* switch (hw->mac.type) */
 654
 655         adapter->eims_enable_mask |= adapter->eims_other;
 656
 657         for (i = 0; i < adapter->num_q_vectors; i++)
 658                 igb_assign_vector(adapter->q_vector[i], vector++);
 659
 660         E1000_WRITE_FLUSH(hw);
 661 }
 662
 663 /**
 664  * igb_request_msix - Initialize MSI-X interrupts
 665  *
 666  * igb_request_msix allocates MSI-X vectors and requests interrupts from the
 667  * kernel.
 668  **/
 669 static int igb_request_msix(struct igb_adapter *adapter)
 670 {
 671         struct net_device *netdev = adapter->netdev;
 672         struct e1000_hw *hw = &adapter->hw;
 673         int i, err = 0, vector = 0, free_vector = 0;
 674
 675         err = request_irq(adapter->msix_entries[vector].vector,
 676                           &igb_msix_other, 0, netdev->name, adapter);
 677         if (err)
 678                 goto err_out;
 679
 680         for (i = 0; i < adapter->num_q_vectors; i++) {
 681                 struct igb_q_vector *q_vector = adapter->q_vector[i];
 682
 683                 vector++;
 684
 685                 q_vector->itr_register = hw->hw_addr + E1000_EITR(vector);
 686
 687                 if (q_vector->rx.ring && q_vector->tx.ring)
 688                         sprintf(q_vector->name, "%s-TxRx-%u", netdev->name,
 689                                 q_vector->rx.ring->queue_index);
 690                 else if (q_vector->tx.ring)
 691                         sprintf(q_vector->name, "%s-tx-%u", netdev->name,
 692                                 q_vector->tx.ring->queue_index);
 693                 else if (q_vector->rx.ring)
 694                         sprintf(q_vector->name, "%s-rx-%u", netdev->name,
 695                                 q_vector->rx.ring->queue_index);
 696                 else
 697                         sprintf(q_vector->name, "%s-unused", netdev->name);
 698
 699                 err = request_irq(adapter->msix_entries[vector].vector,
 700                                   igb_msix_ring, 0, q_vector->name,
 701                                   q_vector);
 702                 if (err)
 703                         goto err_free;
 704         }
 705
 706         igb_configure_msix(adapter);
 707         return 0;
 708
 709 err_free:
 710         /* free already assigned IRQs */
 711         free_irq(adapter->msix_entries[free_vector++].vector, adapter);
 712
 713         vector--;
 714         for (i = 0; i < vector; i++) {
 715                 free_irq(adapter->msix_entries[free_vector++].vector,
 716                          adapter->q_vector[i]);
 717         }
 718 err_out:
 719         return err;
 720 }
 721
 722 static void igb_reset_interrupt_capability(struct igb_adapter *adapter)
 723 {
 724         if (adapter->msix_entries) {
 725                 pci_disable_msix(adapter->pdev);
 726                 kfree(adapter->msix_entries);
 727                 adapter->msix_entries = NULL;
 728         } else if (adapter->flags & IGB_FLAG_HAS_MSI) {
 729                 pci_disable_msi(adapter->pdev);
 730         }
 731 }
 732
 733 /**
 734  * igb_free_q_vector - Free memory allocated for specific interrupt vector
 735  * @adapter: board private structure to initialize
 736  * @v_idx: Index of vector to be freed
 737  *
 738  * This function frees the memory allocated to the q_vector.  In addition if
 739  * NAPI is enabled it will delete any references to the NAPI struct prior
 740  * to freeing the q_vector.
 741  **/
 742 static void igb_free_q_vector(struct igb_adapter *adapter, int v_idx)
 743 {
 744         struct igb_q_vector *q_vector = adapter->q_vector[v_idx];
 745
 746         if (q_vector->tx.ring)
 747                 adapter->tx_ring[q_vector->tx.ring->queue_index] = NULL;
 748
 749         if (q_vector->rx.ring)
 750                 adapter->tx_ring[q_vector->rx.ring->queue_index] = NULL;
 751
 752         adapter->q_vector[v_idx] = NULL;
 753         netif_napi_del(&q_vector->napi);
 754 #ifndef IGB_NO_LRO
 755         __skb_queue_purge(&q_vector->lrolist.active);
 756 #endif
 757         kfree(q_vector);
 758 }
 759
 760 /**
 761  * igb_free_q_vectors - Free memory allocated for interrupt vectors
 762  * @adapter: board private structure to initialize
 763  *
 764  * This function frees the memory allocated to the q_vectors.  In addition if
 765  * NAPI is enabled it will delete any references to the NAPI struct prior
 766  * to freeing the q_vector.
 767  **/
 768 static void igb_free_q_vectors(struct igb_adapter *adapter)
 769 {
 770         int v_idx = adapter->num_q_vectors;
 771
 772         adapter->num_tx_queues = 0;
 773         adapter->num_rx_queues = 0;
 774         adapter->num_q_vectors = 0;
 775
 776         while (v_idx--)
 777                 igb_free_q_vector(adapter, v_idx);
 778 }
 779
 780 /**
 781  * igb_clear_interrupt_scheme - reset the device to a state of no interrupts
 782  *
 783  * This function resets the device so that it has 0 rx queues, tx queues, and
 784  * MSI-X interrupts allocated.
 785  */
 786 static void igb_clear_interrupt_scheme(struct igb_adapter *adapter)
 787 {
 788         igb_free_q_vectors(adapter);
 789         igb_reset_interrupt_capability(adapter);
 790 }
 791
 792 /**
 793  * igb_process_mdd_event
 794  * @adapter - board private structure
 795  *
 796  * Identify a malicious VF, disable the VF TX/RX queues and log a message.
 797  */
 798 static void igb_process_mdd_event(struct igb_adapter *adapter)
 799 {
 800         struct e1000_hw *hw = &adapter->hw;
 801         u32 lvmmc, vfte, vfre, mdfb;
 802         u8 vf_queue;
 803
 804         lvmmc = E1000_READ_REG(hw, E1000_LVMMC);
 805         vf_queue = lvmmc >> 29;
 806
 807         /* VF index cannot be bigger or equal to VFs allocated */
 808         if (vf_queue >= adapter->vfs_allocated_count)
 809                 return;
 810
 811         netdev_info(adapter->netdev,
 812                     "VF %d misbehaved. VF queues are disabled. "
 813                     "VM misbehavior code is 0x%x\n", vf_queue, lvmmc);
 814
 815         /* Disable VFTE and VFRE related bits */
 816         vfte = E1000_READ_REG(hw, E1000_VFTE);
 817         vfte &= ~(1 << vf_queue);
 818         E1000_WRITE_REG(hw, E1000_VFTE, vfte);
 819
 820         vfre = E1000_READ_REG(hw, E1000_VFRE);
 821         vfre &= ~(1 << vf_queue);
 822         E1000_WRITE_REG(hw, E1000_VFRE, vfre);
 823
 824         /* Disable MDFB related bit. Clear on write */
 825         mdfb = E1000_READ_REG(hw, E1000_MDFB);
 826         mdfb |= (1 << vf_queue);
 827         E1000_WRITE_REG(hw, E1000_MDFB, mdfb);
 828
 829         /* Reset the specific VF */
 830         E1000_WRITE_REG(hw, E1000_VTCTRL(vf_queue), E1000_VTCTRL_RST);
 831 }
 832
 833 /**
 834  * igb_disable_mdd
 835  * @adapter - board private structure
 836  *
 837  * Disable MDD behavior in the HW
 838  **/
 839 static void igb_disable_mdd(struct igb_adapter *adapter)
 840 {
 841         struct e1000_hw *hw = &adapter->hw;
 842         u32 reg;
 843
 844         if ((hw->mac.type != e1000_i350) ||
 845             (hw->mac.type != e1000_i354))
 846                 return;
 847
 848         reg = E1000_READ_REG(hw, E1000_DTXCTL);
 849         reg &= (~E1000_DTXCTL_MDP_EN);
 850         E1000_WRITE_REG(hw, E1000_DTXCTL, reg);
 851 }
 852
 853 /**
 854  * igb_enable_mdd
 855  * @adapter - board private structure
 856  *
 857  * Enable the HW to detect malicious driver and sends an interrupt to
 858  * the driver.
 859  **/
 860 static void igb_enable_mdd(struct igb_adapter *adapter)
 861 {
 862         struct e1000_hw *hw = &adapter->hw;
 863         u32 reg;
 864
 865         /* Only available on i350 device */
 866         if (hw->mac.type != e1000_i350)
 867                 return;
 868
 869         reg = E1000_READ_REG(hw, E1000_DTXCTL);
 870         reg |= E1000_DTXCTL_MDP_EN;
 871         E1000_WRITE_REG(hw, E1000_DTXCTL, reg);
 872 }
 873
 874 /**
 875  * igb_reset_sriov_capability - disable SR-IOV if enabled
 876  *
 877  * Attempt to disable single root IO virtualization capabilites present in the
 878  * kernel.
 879  **/
 880 static void igb_reset_sriov_capability(struct igb_adapter *adapter)
 881 {
 882         struct pci_dev *pdev = adapter->pdev;
 883         struct e1000_hw *hw = &adapter->hw;
 884
 885         /* reclaim resources allocated to VFs */
 886         if (adapter->vf_data) {
 887                 if (!pci_vfs_assigned(pdev)) {
 888                         /*
 889                          * disable iov and allow time for transactions to
 890                          * clear
 891                          */
 892                         pci_disable_sriov(pdev);
 893                         msleep(500);
 894
 895                         dev_info(pci_dev_to_dev(pdev), "IOV Disabled\n");
 896                 } else {
 897                         dev_info(pci_dev_to_dev(pdev), "IOV Not Disabled\n "
 898                                         "VF(s) are assigned to guests!\n");
 899                 }
 900                 /* Disable Malicious Driver Detection */
 901                 igb_disable_mdd(adapter);
 902
 903                 /* free vf data storage */
 904                 kfree(adapter->vf_data);
 905                 adapter->vf_data = NULL;
 906
 907                 /* switch rings back to PF ownership */
 908                 E1000_WRITE_REG(hw, E1000_IOVCTL,
 909                                 E1000_IOVCTL_REUSE_VFQ);
 910                 E1000_WRITE_FLUSH(hw);
 911                 msleep(100);
 912         }
 913
 914         adapter->vfs_allocated_count = 0;
 915 }
 916
 917 /**
 918  * igb_set_sriov_capability - setup SR-IOV if supported
 919  *
 920  * Attempt to enable single root IO virtualization capabilites present in the
 921  * kernel.
 922  **/
 923 static void igb_set_sriov_capability(struct igb_adapter *adapter)
 924 {
 925         struct pci_dev *pdev = adapter->pdev;
 926         int old_vfs = 0;
 927         int i;
 928
 929         old_vfs = pci_num_vf(pdev);
 930         if (old_vfs) {
 931                 dev_info(pci_dev_to_dev(pdev),
 932                                 "%d pre-allocated VFs found - override "
 933                                 "max_vfs setting of %d\n", old_vfs,
 934                                 adapter->vfs_allocated_count);
 935                 adapter->vfs_allocated_count = old_vfs;
 936         }
 937         /* no VFs requested, do nothing */
 938         if (!adapter->vfs_allocated_count)
 939                 return;
 940
 941         /* allocate vf data storage */
 942         adapter->vf_data = kcalloc(adapter->vfs_allocated_count,
 943                                    sizeof(struct vf_data_storage),
 944                                    GFP_KERNEL);
 945
 946         if (adapter->vf_data) {
 947                 if (!old_vfs) {
 948                         if (pci_enable_sriov(pdev,
 949                                         adapter->vfs_allocated_count))
 950                                 goto err_out;
 951                 }
 952                 for (i = 0; i < adapter->vfs_allocated_count; i++)
 953                         igb_vf_configure(adapter, i);
 954
 955                 switch (adapter->hw.mac.type) {
 956                 case e1000_82576:
 957                 case e1000_i350:
 958                         /* Enable VM to VM loopback by default */
 959                         adapter->flags |= IGB_FLAG_LOOPBACK_ENABLE;
 960                         break;
 961                 default:
 962                         /* Currently no other hardware supports loopback */
 963                         break;
 964                 }
 965
 966                 /* DMA Coalescing is not supported in IOV mode. */
 967                 if (adapter->hw.mac.type >= e1000_i350)
 968                 adapter->dmac = IGB_DMAC_DISABLE;
 969                 if (adapter->hw.mac.type < e1000_i350)
 970                 adapter->flags |= IGB_FLAG_DETECT_BAD_DMA;
 971                 return;
 972
 973         }
 974
 975 err_out:
 976         kfree(adapter->vf_data);
 977         adapter->vf_data = NULL;
 978         adapter->vfs_allocated_count = 0;
 979         dev_warn(pci_dev_to_dev(pdev),
 980                         "Failed to initialize SR-IOV virtualization\n");
 981 }
 982
 983 /**
 984  * igb_set_interrupt_capability - set MSI or MSI-X if supported
 985  *
 986  * Attempt to configure interrupts using the best available
 987  * capabilities of the hardware and kernel.
 988  **/
 989 static void igb_set_interrupt_capability(struct igb_adapter *adapter, bool msix)
 990 {
 991         struct pci_dev *pdev = adapter->pdev;
 992         int err;
 993         int numvecs, i;
 994
 995         if (!msix)
 996                 adapter->int_mode = IGB_INT_MODE_MSI;
 997
 998         /* Number of supported queues. */
 999         adapter->num_rx_queues = adapter->rss_queues;
1000
1001         if (adapter->vmdq_pools > 1)
1002                 adapter->num_rx_queues += adapter->vmdq_pools - 1;
1003
1004 #ifdef HAVE_TX_MQ
1005         if (adapter->vmdq_pools)
1006                 adapter->num_tx_queues = adapter->vmdq_pools;
1007         else
1008                 adapter->num_tx_queues = adapter->num_rx_queues;
1009 #else
1010         adapter->num_tx_queues = max_t(u32, 1, adapter->vmdq_pools);
1011 #endif
1012
1013         switch (adapter->int_mode) {
1014         case IGB_INT_MODE_MSIX:
1015                 /* start with one vector for every rx queue */
1016                 numvecs = adapter->num_rx_queues;
1017
1018                 /* if tx handler is separate add 1 for every tx queue */
1019                 if (!(adapter->flags & IGB_FLAG_QUEUE_PAIRS))
1020                         numvecs += adapter->num_tx_queues;
1021
1022                 /* store the number of vectors reserved for queues */
1023                 adapter->num_q_vectors = numvecs;
1024
1025                 /* add 1 vector for link status interrupts */
1026                 numvecs++;
1027                 adapter->msix_entries = kcalloc(numvecs,
1028                                                 sizeof(struct msix_entry),
1029                                                 GFP_KERNEL);
1030                 if (adapter->msix_entries) {
1031                         for (i = 0; i < numvecs; i++)
1032                                 adapter->msix_entries[i].entry = i;
1033
1034                         err = pci_enable_msix(pdev,
1035                                               adapter->msix_entries, numvecs);
1036                         if (err == 0)
1037                                 break;
1038                 }
1039                 /* MSI-X failed, so fall through and try MSI */
1040                 dev_warn(pci_dev_to_dev(pdev), "Failed to initialize MSI-X interrupts. "
1041                          "Falling back to MSI interrupts.\n");
1042                 igb_reset_interrupt_capability(adapter);
1043         case IGB_INT_MODE_MSI:
1044                 if (!pci_enable_msi(pdev))
1045                         adapter->flags |= IGB_FLAG_HAS_MSI;
1046                 else
1047                         dev_warn(pci_dev_to_dev(pdev), "Failed to initialize MSI "
1048                                  "interrupts.  Falling back to legacy "
1049                                  "interrupts.\n");
1050                 /* Fall through */
1051         case IGB_INT_MODE_LEGACY:
1052                 /* disable advanced features and set number of queues to 1 */
1053                 igb_reset_sriov_capability(adapter);
1054                 adapter->vmdq_pools = 0;
1055                 adapter->rss_queues = 1;
1056                 adapter->flags |= IGB_FLAG_QUEUE_PAIRS;
1057                 adapter->num_rx_queues = 1;
1058                 adapter->num_tx_queues = 1;
1059                 adapter->num_q_vectors = 1;
1060                 /* Don't do anything; this is system default */
1061                 break;
1062         }
1063 }
1064
1065 static void igb_add_ring(struct igb_ring *ring,
1066                          struct igb_ring_container *head)
1067 {
1068         head->ring = ring;
1069         head->count++;
1070 }
1071
1072 /**
1073  * igb_alloc_q_vector - Allocate memory for a single interrupt vector
1074  * @adapter: board private structure to initialize
1075  * @v_count: q_vectors allocated on adapter, used for ring interleaving
1076  * @v_idx: index of vector in adapter struct
1077  * @txr_count: total number of Tx rings to allocate
1078  * @txr_idx: index of first Tx ring to allocate
1079  * @rxr_count: total number of Rx rings to allocate
1080  * @rxr_idx: index of first Rx ring to allocate
1081  *
1082  * We allocate one q_vector.  If allocation fails we return -ENOMEM.
1083  **/
1084 static int igb_alloc_q_vector(struct igb_adapter *adapter,
1085                               unsigned int v_count, unsigned int v_idx,
1086                               unsigned int txr_count, unsigned int txr_idx,
1087                               unsigned int rxr_count, unsigned int rxr_idx)
1088 {
1089         struct igb_q_vector *q_vector;
1090         struct igb_ring *ring;
1091         int ring_count, size;
1092
1093         /* igb only supports 1 Tx and/or 1 Rx queue per vector */
1094         if (txr_count > 1 || rxr_count > 1)
1095                 return -ENOMEM;
1096
1097         ring_count = txr_count + rxr_count;
1098         size = sizeof(struct igb_q_vector) +
1099                (sizeof(struct igb_ring) * ring_count);
1100
1101         /* allocate q_vector and rings */
1102         q_vector = kzalloc(size, GFP_KERNEL);
1103         if (!q_vector)
1104                 return -ENOMEM;
1105
1106 #ifndef IGB_NO_LRO
1107         /* initialize LRO */
1108         __skb_queue_head_init(&q_vector->lrolist.active);
1109
1110 #endif
1111         /* initialize NAPI */
1112         netif_napi_add(adapter->netdev, &q_vector->napi,
1113                        igb_poll, 64);
1114
1115         /* tie q_vector and adapter together */
1116         adapter->q_vector[v_idx] = q_vector;
1117         q_vector->adapter = adapter;
1118
1119         /* initialize work limits */
1120         q_vector->tx.work_limit = adapter->tx_work_limit;
1121
1122         /* initialize ITR configuration */
1123         q_vector->itr_register = adapter->hw.hw_addr + E1000_EITR(0);
1124         q_vector->itr_val = IGB_START_ITR;
1125
1126         /* initialize pointer to rings */
1127         ring = q_vector->ring;
1128
1129         /* intialize ITR */
1130         if (rxr_count) {
1131                 /* rx or rx/tx vector */
1132                 if (!adapter->rx_itr_setting || adapter->rx_itr_setting > 3)
1133                         q_vector->itr_val = adapter->rx_itr_setting;
1134         } else {
1135                 /* tx only vector */
1136                 if (!adapter->tx_itr_setting || adapter->tx_itr_setting > 3)
1137                         q_vector->itr_val = adapter->tx_itr_setting;
1138         }
1139
1140         if (txr_count) {
1141                 /* assign generic ring traits */
1142                 ring->dev = &adapter->pdev->dev;
1143                 ring->netdev = adapter->netdev;
1144
1145                 /* configure backlink on ring */
1146                 ring->q_vector = q_vector;
1147
1148                 /* update q_vector Tx values */
1149                 igb_add_ring(ring, &q_vector->tx);
1150
1151                 /* For 82575, context index must be unique per ring. */
1152                 if (adapter->hw.mac.type == e1000_82575)
1153                         set_bit(IGB_RING_FLAG_TX_CTX_IDX, &ring->flags);
1154
1155                 /* apply Tx specific ring traits */
1156                 ring->count = adapter->tx_ring_count;
1157                 ring->queue_index = txr_idx;
1158
1159                 /* assign ring to adapter */
1160                 adapter->tx_ring[txr_idx] = ring;
1161
1162                 /* push pointer to next ring */
1163                 ring++;
1164         }
1165
1166         if (rxr_count) {
1167                 /* assign generic ring traits */
1168                 ring->dev = &adapter->pdev->dev;
1169                 ring->netdev = adapter->netdev;
1170
1171                 /* configure backlink on ring */
1172                 ring->q_vector = q_vector;
1173
1174                 /* update q_vector Rx values */
1175                 igb_add_ring(ring, &q_vector->rx);
1176
1177 #ifndef HAVE_NDO_SET_FEATURES
1178                 /* enable rx checksum */
1179                 set_bit(IGB_RING_FLAG_RX_CSUM, &ring->flags);
1180
1181 #endif
1182                 /* set flag indicating ring supports SCTP checksum offload */
1183                 if (adapter->hw.mac.type >= e1000_82576)
1184                         set_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags);
1185
1186                 if ((adapter->hw.mac.type == e1000_i350) ||
1187                     (adapter->hw.mac.type == e1000_i354))
1188                         set_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &ring->flags);
1189
1190                 /* apply Rx specific ring traits */
1191                 ring->count = adapter->rx_ring_count;
1192                 ring->queue_index = rxr_idx;
1193
1194                 /* assign ring to adapter */
1195                 adapter->rx_ring[rxr_idx] = ring;
1196         }
1197
1198         return 0;
1199 }
1200
1201 /**
1202  * igb_alloc_q_vectors - Allocate memory for interrupt vectors
1203  * @adapter: board private structure to initialize
1204  *
1205  * We allocate one q_vector per queue interrupt.  If allocation fails we
1206  * return -ENOMEM.
1207  **/
1208 static int igb_alloc_q_vectors(struct igb_adapter *adapter)
1209 {
1210         int q_vectors = adapter->num_q_vectors;
1211         int rxr_remaining = adapter->num_rx_queues;
1212         int txr_remaining = adapter->num_tx_queues;
1213         int rxr_idx = 0, txr_idx = 0, v_idx = 0;
1214         int err;
1215
1216         if (q_vectors >= (rxr_remaining + txr_remaining)) {
1217                 for (; rxr_remaining; v_idx++) {
1218                         err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1219                                                  0, 0, 1, rxr_idx);
1220
1221                         if (err)
1222                                 goto err_out;
1223
1224                         /* update counts and index */
1225                         rxr_remaining--;
1226                         rxr_idx++;
1227                 }
1228         }
1229
1230         for (; v_idx < q_vectors; v_idx++) {
1231                 int rqpv = DIV_ROUND_UP(rxr_remaining, q_vectors - v_idx);
1232                 int tqpv = DIV_ROUND_UP(txr_remaining, q_vectors - v_idx);
1233                 err = igb_alloc_q_vector(adapter, q_vectors, v_idx,
1234                                          tqpv, txr_idx, rqpv, rxr_idx);
1235
1236                 if (err)
1237                         goto err_out;
1238
1239                 /* update counts and index */
1240                 rxr_remaining -= rqpv;
1241                 txr_remaining -= tqpv;
1242                 rxr_idx++;
1243                 txr_idx++;
1244         }
1245
1246         return 0;
1247
1248 err_out:
1249         adapter->num_tx_queues = 0;
1250         adapter->num_rx_queues = 0;
1251         adapter->num_q_vectors = 0;
1252
1253         while (v_idx--)
1254                 igb_free_q_vector(adapter, v_idx);
1255
1256         return -ENOMEM;
1257 }
1258
1259 /**
1260  * igb_init_interrupt_scheme - initialize interrupts, allocate queues/vectors
1261  *
1262  * This function initializes the interrupts and allocates all of the queues.
1263  **/
1264 static int igb_init_interrupt_scheme(struct igb_adapter *adapter, bool msix)
1265 {
1266         struct pci_dev *pdev = adapter->pdev;
1267         int err;
1268
1269         igb_set_interrupt_capability(adapter, msix);
1270
1271         err = igb_alloc_q_vectors(adapter);
1272         if (err) {
1273                 dev_err(pci_dev_to_dev(pdev), "Unable to allocate memory for vectors\n");
1274                 goto err_alloc_q_vectors;
1275         }
1276
1277         igb_cache_ring_register(adapter);
1278
1279         return 0;
1280
1281 err_alloc_q_vectors:
1282         igb_reset_interrupt_capability(adapter);
1283         return err;
1284 }
1285
1286 /**
1287  * igb_request_irq - initialize interrupts
1288  *
1289  * Attempts to configure interrupts using the best available
1290  * capabilities of the hardware and kernel.
1291  **/
1292 static int igb_request_irq(struct igb_adapter *adapter)
1293 {
1294         struct net_device *netdev = adapter->netdev;
1295         struct pci_dev *pdev = adapter->pdev;
1296         int err = 0;
1297
1298         if (adapter->msix_entries) {
1299                 err = igb_request_msix(adapter);
1300                 if (!err)
1301                         goto request_done;
1302                 /* fall back to MSI */
1303                 igb_free_all_tx_resources(adapter);
1304                 igb_free_all_rx_resources(adapter);
1305
1306                 igb_clear_interrupt_scheme(adapter);
1307                 igb_reset_sriov_capability(adapter);
1308                 err = igb_init_interrupt_scheme(adapter, false);
1309                 if (err)
1310                         goto request_done;
1311                 igb_setup_all_tx_resources(adapter);
1312                 igb_setup_all_rx_resources(adapter);
1313                 igb_configure(adapter);
1314         }
1315
1316         igb_assign_vector(adapter->q_vector[0], 0);
1317
1318         if (adapter->flags & IGB_FLAG_HAS_MSI) {
1319                 err = request_irq(pdev->irq, &igb_intr_msi, 0,
1320                                   netdev->name, adapter);
1321                 if (!err)
1322                         goto request_done;
1323
1324                 /* fall back to legacy interrupts */
1325                 igb_reset_interrupt_capability(adapter);
1326                 adapter->flags &= ~IGB_FLAG_HAS_MSI;
1327         }
1328
1329         err = request_irq(pdev->irq, &igb_intr, IRQF_SHARED,
1330                           netdev->name, adapter);
1331
1332         if (err)
1333                 dev_err(pci_dev_to_dev(pdev), "Error %d getting interrupt\n",
1334                         err);
1335
1336 request_done:
1337         return err;
1338 }
1339
1340 static void igb_free_irq(struct igb_adapter *adapter)
1341 {
1342         if (adapter->msix_entries) {
1343                 int vector = 0, i;
1344
1345                 free_irq(adapter->msix_entries[vector++].vector, adapter);
1346
1347                 for (i = 0; i < adapter->num_q_vectors; i++)
1348                         free_irq(adapter->msix_entries[vector++].vector,
1349                                  adapter->q_vector[i]);
1350         } else {
1351                 free_irq(adapter->pdev->irq, adapter);
1352         }
1353 }
1354
1355 /**
1356  * igb_irq_disable - Mask off interrupt generation on the NIC
1357  * @adapter: board private structure
1358  **/
1359 static void igb_irq_disable(struct igb_adapter *adapter)
1360 {
1361         struct e1000_hw *hw = &adapter->hw;
1362
1363         /*
1364          * we need to be careful when disabling interrupts.  The VFs are also
1365          * mapped into these registers and so clearing the bits can cause
1366          * issues on the VF drivers so we only need to clear what we set
1367          */
1368         if (adapter->msix_entries) {
1369                 u32 regval = E1000_READ_REG(hw, E1000_EIAM);
1370                 E1000_WRITE_REG(hw, E1000_EIAM, regval & ~adapter->eims_enable_mask);
1371                 E1000_WRITE_REG(hw, E1000_EIMC, adapter->eims_enable_mask);
1372                 regval = E1000_READ_REG(hw, E1000_EIAC);
1373                 E1000_WRITE_REG(hw, E1000_EIAC, regval & ~adapter->eims_enable_mask);
1374         }
1375
1376         E1000_WRITE_REG(hw, E1000_IAM, 0);
1377         E1000_WRITE_REG(hw, E1000_IMC, ~0);
1378         E1000_WRITE_FLUSH(hw);
1379
1380         if (adapter->msix_entries) {
1381                 int vector = 0, i;
1382
1383                 synchronize_irq(adapter->msix_entries[vector++].vector);
1384
1385                 for (i = 0; i < adapter->num_q_vectors; i++)
1386                         synchronize_irq(adapter->msix_entries[vector++].vector);
1387         } else {
1388                 synchronize_irq(adapter->pdev->irq);
1389         }
1390 }
1391
1392 /**
1393  * igb_irq_enable - Enable default interrupt generation settings
1394  * @adapter: board private structure
1395  **/
1396 static void igb_irq_enable(struct igb_adapter *adapter)
1397 {
1398         struct e1000_hw *hw = &adapter->hw;
1399
1400         if (adapter->msix_entries) {
1401                 u32 ims = E1000_IMS_LSC | E1000_IMS_DOUTSYNC | E1000_IMS_DRSTA;
1402                 u32 regval = E1000_READ_REG(hw, E1000_EIAC);
1403                 E1000_WRITE_REG(hw, E1000_EIAC, regval | adapter->eims_enable_mask);
1404                 regval = E1000_READ_REG(hw, E1000_EIAM);
1405                 E1000_WRITE_REG(hw, E1000_EIAM, regval | adapter->eims_enable_mask);
1406                 E1000_WRITE_REG(hw, E1000_EIMS, adapter->eims_enable_mask);
1407                 if (adapter->vfs_allocated_count) {
1408                         E1000_WRITE_REG(hw, E1000_MBVFIMR, 0xFF);
1409                         ims |= E1000_IMS_VMMB;
1410                         if (adapter->mdd)
1411                                 if ((adapter->hw.mac.type == e1000_i350) ||
1412                                     (adapter->hw.mac.type == e1000_i354))
1413                                 ims |= E1000_IMS_MDDET;
1414                 }
1415                 E1000_WRITE_REG(hw, E1000_IMS, ims);
1416         } else {
1417                 E1000_WRITE_REG(hw, E1000_IMS, IMS_ENABLE_MASK |
1418                                 E1000_IMS_DRSTA);
1419                 E1000_WRITE_REG(hw, E1000_IAM, IMS_ENABLE_MASK |
1420                                 E1000_IMS_DRSTA);
1421         }
1422 }
1423
1424 static void igb_update_mng_vlan(struct igb_adapter *adapter)
1425 {
1426         struct e1000_hw *hw = &adapter->hw;
1427         u16 vid = adapter->hw.mng_cookie.vlan_id;
1428         u16 old_vid = adapter->mng_vlan_id;
1429
1430         if (hw->mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
1431                 /* add VID to filter table */
1432                 igb_vfta_set(adapter, vid, TRUE);
1433                 adapter->mng_vlan_id = vid;
1434         } else {
1435                 adapter->mng_vlan_id = IGB_MNG_VLAN_NONE;
1436         }
1437
1438         if ((old_vid != (u16)IGB_MNG_VLAN_NONE) &&
1439             (vid != old_vid) &&
1440 #ifdef HAVE_VLAN_RX_REGISTER
1441             !vlan_group_get_device(adapter->vlgrp, old_vid)) {
1442 #else
1443             !test_bit(old_vid, adapter->active_vlans)) {
1444 #endif
1445                 /* remove VID from filter table */
1446                 igb_vfta_set(adapter, old_vid, FALSE);
1447         }
1448 }
1449
1450 /**
1451  * igb_release_hw_control - release control of the h/w to f/w
1452  * @adapter: address of board private structure
1453  *
1454  * igb_release_hw_control resets CTRL_EXT:DRV_LOAD bit.
1455  * For ASF and Pass Through versions of f/w this means that the
1456  * driver is no longer loaded.
1457  *
1458  **/
1459 static void igb_release_hw_control(struct igb_adapter *adapter)
1460 {
1461         struct e1000_hw *hw = &adapter->hw;
1462         u32 ctrl_ext;
1463
1464         /* Let firmware take over control of h/w */
1465         ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1466         E1000_WRITE_REG(hw, E1000_CTRL_EXT,
1467                         ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
1468 }
1469
1470 /**
1471  * igb_get_hw_control - get control of the h/w from f/w
1472  * @adapter: address of board private structure
1473  *
1474  * igb_get_hw_control sets CTRL_EXT:DRV_LOAD bit.
1475  * For ASF and Pass Through versions of f/w this means that
1476  * the driver is loaded.
1477  *
1478  **/
1479 static void igb_get_hw_control(struct igb_adapter *adapter)
1480 {
1481         struct e1000_hw *hw = &adapter->hw;
1482         u32 ctrl_ext;
1483
1484         /* Let firmware know the driver has taken over */
1485         ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1486         E1000_WRITE_REG(hw, E1000_CTRL_EXT,
1487                         ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
1488 }
1489
1490 /**
1491  * igb_configure - configure the hardware for RX and TX
1492  * @adapter: private board structure
1493  **/
1494 static void igb_configure(struct igb_adapter *adapter)
1495 {
1496         struct net_device *netdev = adapter->netdev;
1497         int i;
1498
1499         igb_get_hw_control(adapter);
1500         igb_set_rx_mode(netdev);
1501
1502         igb_restore_vlan(adapter);
1503
1504         igb_setup_tctl(adapter);
1505         igb_setup_mrqc(adapter);
1506         igb_setup_rctl(adapter);
1507
1508         igb_configure_tx(adapter);
1509         igb_configure_rx(adapter);
1510
1511         e1000_rx_fifo_flush_82575(&adapter->hw);
1512 #ifdef CONFIG_NETDEVICES_MULTIQUEUE
1513         if (adapter->num_tx_queues > 1)
1514                 netdev->features |= NETIF_F_MULTI_QUEUE;
1515         else
1516                 netdev->features &= ~NETIF_F_MULTI_QUEUE;
1517 #endif
1518
1519         /* call igb_desc_unused which always leaves
1520          * at least 1 descriptor unused to make sure
1521          * next_to_use != next_to_clean */
1522         for (i = 0; i < adapter->num_rx_queues; i++) {
1523                 struct igb_ring *ring = adapter->rx_ring[i];
1524                 igb_alloc_rx_buffers(ring, igb_desc_unused(ring));
1525         }
1526 }
1527
1528 /**
1529  * igb_power_up_link - Power up the phy/serdes link
1530  * @adapter: address of board private structure
1531  **/
1532 void igb_power_up_link(struct igb_adapter *adapter)
1533 {
1534         e1000_phy_hw_reset(&adapter->hw);
1535
1536         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1537                 e1000_power_up_phy(&adapter->hw);
1538         else
1539                 e1000_power_up_fiber_serdes_link(&adapter->hw);
1540 }
1541
1542 /**
1543  * igb_power_down_link - Power down the phy/serdes link
1544  * @adapter: address of board private structure
1545  */
1546 static void igb_power_down_link(struct igb_adapter *adapter)
1547 {
1548         if (adapter->hw.phy.media_type == e1000_media_type_copper)
1549                 e1000_power_down_phy(&adapter->hw);
1550         else
1551                 e1000_shutdown_fiber_serdes_link(&adapter->hw);
1552 }
1553
1554 /* Detect and switch function for Media Auto Sense */
1555 static void igb_check_swap_media(struct igb_adapter *adapter)
1556 {
1557         struct e1000_hw *hw = &adapter->hw;
1558         u32 ctrl_ext, connsw;
1559         bool swap_now = false;
1560         bool link;
1561
1562         ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
1563         connsw = E1000_READ_REG(hw, E1000_CONNSW);
1564         link = igb_has_link(adapter);
1565         (void) link;
1566
1567         /* need to live swap if current media is copper and we have fiber/serdes
1568          * to go to.
1569          */
1570
1571         if ((hw->phy.media_type == e1000_media_type_copper) &&
1572             (!(connsw & E1000_CONNSW_AUTOSENSE_EN))) {
1573                 swap_now = true;
1574         } else if (!(connsw & E1000_CONNSW_SERDESD)) {
1575                 /* copper signal takes time to appear */
1576                 if (adapter->copper_tries < 2) {
1577                         adapter->copper_tries++;
1578                         connsw |= E1000_CONNSW_AUTOSENSE_CONF;
1579                         E1000_WRITE_REG(hw, E1000_CONNSW, connsw);
1580                         return;
1581                 } else {
1582                         adapter->copper_tries = 0;
1583                         if ((connsw & E1000_CONNSW_PHYSD) &&
1584                             (!(connsw & E1000_CONNSW_PHY_PDN))) {
1585                                 swap_now = true;
1586                                 connsw &= ~E1000_CONNSW_AUTOSENSE_CONF;
1587                                 E1000_WRITE_REG(hw, E1000_CONNSW, connsw);
1588                         }
1589                 }
1590         }
1591
1592         if (swap_now) {
1593                 switch (hw->phy.media_type) {
1594                 case e1000_media_type_copper:
1595                         dev_info(pci_dev_to_dev(adapter->pdev),
1596                                  "%s:MAS: changing media to fiber/serdes\n",
1597                         adapter->netdev->name);
1598                         ctrl_ext |=
1599                                 E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1600                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
1601                         adapter->copper_tries = 0;
1602                         break;
1603                 case e1000_media_type_internal_serdes:
1604                 case e1000_media_type_fiber:
1605                         dev_info(pci_dev_to_dev(adapter->pdev),
1606                                  "%s:MAS: changing media to copper\n",
1607                                  adapter->netdev->name);
1608                         ctrl_ext &=
1609                                 ~E1000_CTRL_EXT_LINK_MODE_PCIE_SERDES;
1610                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
1611                         break;
1612                 default:
1613                         /* shouldn't get here during regular operation */
1614                         dev_err(pci_dev_to_dev(adapter->pdev),
1615                                 "%s:AMS: Invalid media type found, returning\n",
1616                                 adapter->netdev->name);
1617                         break;
1618                 }
1619                 E1000_WRITE_REG(hw, E1000_CTRL_EXT, ctrl_ext);
1620         }
1621 }
1622
1623 #ifdef HAVE_I2C_SUPPORT
1624 /*  igb_get_i2c_data - Reads the I2C SDA data bit
1625  *  @hw: pointer to hardware structure
1626  *  @i2cctl: Current value of I2CCTL register
1627  *
1628  *  Returns the I2C data bit value
1629  */
1630 static int igb_get_i2c_data(void *data)
1631 {
1632         struct igb_adapter *adapter = (struct igb_adapter *)data;
1633         struct e1000_hw *hw = &adapter->hw;
1634         s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1635
1636         return (i2cctl & E1000_I2C_DATA_IN) != 0;
1637 }
1638
1639 /* igb_set_i2c_data - Sets the I2C data bit
1640  *  @data: pointer to hardware structure
1641  *  @state: I2C data value (0 or 1) to set
1642  *
1643  *  Sets the I2C data bit
1644  */
1645 static void igb_set_i2c_data(void *data, int state)
1646 {
1647         struct igb_adapter *adapter = (struct igb_adapter *)data;
1648         struct e1000_hw *hw = &adapter->hw;
1649         s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1650
1651         if (state)
1652                 i2cctl |= E1000_I2C_DATA_OUT;
1653         else
1654                 i2cctl &= ~E1000_I2C_DATA_OUT;
1655
1656         i2cctl &= ~E1000_I2C_DATA_OE_N;
1657         i2cctl |= E1000_I2C_CLK_OE_N;
1658
1659         E1000_WRITE_REG(hw, E1000_I2CPARAMS, i2cctl);
1660         E1000_WRITE_FLUSH(hw);
1661
1662 }
1663
1664 /* igb_set_i2c_clk - Sets the I2C SCL clock
1665  *  @data: pointer to hardware structure
1666  *  @state: state to set clock
1667  *
1668  *  Sets the I2C clock line to state
1669  */
1670 static void igb_set_i2c_clk(void *data, int state)
1671 {
1672         struct igb_adapter *adapter = (struct igb_adapter *)data;
1673         struct e1000_hw *hw = &adapter->hw;
1674         s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1675
1676         if (state) {
1677                 i2cctl |= E1000_I2C_CLK_OUT;
1678                 i2cctl &= ~E1000_I2C_CLK_OE_N;
1679         } else {
1680                 i2cctl &= ~E1000_I2C_CLK_OUT;
1681                 i2cctl &= ~E1000_I2C_CLK_OE_N;
1682         }
1683         E1000_WRITE_REG(hw, E1000_I2CPARAMS, i2cctl);
1684         E1000_WRITE_FLUSH(hw);
1685 }
1686
1687 /* igb_get_i2c_clk - Gets the I2C SCL clock state
1688  *  @data: pointer to hardware structure
1689  *
1690  *  Gets the I2C clock state
1691  */
1692 static int igb_get_i2c_clk(void *data)
1693 {
1694         struct igb_adapter *adapter = (struct igb_adapter *)data;
1695         struct e1000_hw *hw = &adapter->hw;
1696         s32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
1697
1698         return (i2cctl & E1000_I2C_CLK_IN) != 0;
1699 }
1700
1701 static const struct i2c_algo_bit_data igb_i2c_algo = {
1702         .setsda         = igb_set_i2c_data,
1703         .setscl         = igb_set_i2c_clk,
1704         .getsda         = igb_get_i2c_data,
1705         .getscl         = igb_get_i2c_clk,
1706         .udelay         = 5,
1707         .timeout        = 20,
1708 };
1709
1710 /*  igb_init_i2c - Init I2C interface
1711  *  @adapter: pointer to adapter structure
1712  *
1713  */
1714 static s32 igb_init_i2c(struct igb_adapter *adapter)
1715 {
1716         s32 status = E1000_SUCCESS;
1717
1718         /* I2C interface supported on i350 devices */
1719         if (adapter->hw.mac.type != e1000_i350)
1720                 return E1000_SUCCESS;
1721
1722         /* Initialize the i2c bus which is controlled by the registers.
1723          * This bus will use the i2c_algo_bit structue that implements
1724          * the protocol through toggling of the 4 bits in the register.
1725          */
1726         adapter->i2c_adap.owner = THIS_MODULE;
1727         adapter->i2c_algo = igb_i2c_algo;
1728         adapter->i2c_algo.data = adapter;
1729         adapter->i2c_adap.algo_data = &adapter->i2c_algo;
1730         adapter->i2c_adap.dev.parent = &adapter->pdev->dev;
1731         strlcpy(adapter->i2c_adap.name, "igb BB",
1732                 sizeof(adapter->i2c_adap.name));
1733         status = i2c_bit_add_bus(&adapter->i2c_adap);
1734         return status;
1735 }
1736
1737 #endif /* HAVE_I2C_SUPPORT */
1738 /**
1739  * igb_up - Open the interface and prepare it to handle traffic
1740  * @adapter: board private structure
1741  **/
1742 int igb_up(struct igb_adapter *adapter)
1743 {
1744         struct e1000_hw *hw = &adapter->hw;
1745         int i;
1746
1747         /* hardware has been reset, we need to reload some things */
1748         igb_configure(adapter);
1749
1750         clear_bit(__IGB_DOWN, &adapter->state);
1751
1752         for (i = 0; i < adapter->num_q_vectors; i++)
1753                 napi_enable(&(adapter->q_vector[i]->napi));
1754
1755         if (adapter->msix_entries)
1756                 igb_configure_msix(adapter);
1757         else
1758                 igb_assign_vector(adapter->q_vector[0], 0);
1759
1760         igb_configure_lli(adapter);
1761
1762         /* Clear any pending interrupts. */
1763         E1000_READ_REG(hw, E1000_ICR);
1764         igb_irq_enable(adapter);
1765
1766         /* notify VFs that reset has been completed */
1767         if (adapter->vfs_allocated_count) {
1768                 u32 reg_data = E1000_READ_REG(hw, E1000_CTRL_EXT);
1769                 reg_data |= E1000_CTRL_EXT_PFRSTD;
1770                 E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg_data);
1771         }
1772
1773         netif_tx_start_all_queues(adapter->netdev);
1774
1775         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
1776                 schedule_work(&adapter->dma_err_task);
1777         /* start the watchdog. */
1778         hw->mac.get_link_status = 1;
1779         schedule_work(&adapter->watchdog_task);
1780
1781         if ((adapter->flags & IGB_FLAG_EEE) &&
1782             (!hw->dev_spec._82575.eee_disable))
1783                 adapter->eee_advert = MDIO_EEE_100TX | MDIO_EEE_1000T;
1784
1785         return 0;
1786 }
1787
1788 void igb_down(struct igb_adapter *adapter)
1789 {
1790         struct net_device *netdev = adapter->netdev;
1791         struct e1000_hw *hw = &adapter->hw;
1792         u32 tctl, rctl;
1793         int i;
1794
1795         /* signal that we're down so the interrupt handler does not
1796          * reschedule our watchdog timer */
1797         set_bit(__IGB_DOWN, &adapter->state);
1798
1799         /* disable receives in the hardware */
1800         rctl = E1000_READ_REG(hw, E1000_RCTL);
1801         E1000_WRITE_REG(hw, E1000_RCTL, rctl & ~E1000_RCTL_EN);
1802         /* flush and sleep below */
1803
1804         netif_tx_stop_all_queues(netdev);
1805
1806         /* disable transmits in the hardware */
1807         tctl = E1000_READ_REG(hw, E1000_TCTL);
1808         tctl &= ~E1000_TCTL_EN;
1809         E1000_WRITE_REG(hw, E1000_TCTL, tctl);
1810         /* flush both disables and wait for them to finish */
1811         E1000_WRITE_FLUSH(hw);
1812         usleep_range(10000, 20000);
1813
1814         for (i = 0; i < adapter->num_q_vectors; i++)
1815                 napi_disable(&(adapter->q_vector[i]->napi));
1816
1817         igb_irq_disable(adapter);
1818
1819         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
1820
1821         del_timer_sync(&adapter->watchdog_timer);
1822         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
1823                 del_timer_sync(&adapter->dma_err_timer);
1824         del_timer_sync(&adapter->phy_info_timer);
1825
1826         netif_carrier_off(netdev);
1827
1828         /* record the stats before reset*/
1829         igb_update_stats(adapter);
1830
1831         adapter->link_speed = 0;
1832         adapter->link_duplex = 0;
1833
1834 #ifdef HAVE_PCI_ERS
1835         if (!pci_channel_offline(adapter->pdev))
1836                 igb_reset(adapter);
1837 #else
1838         igb_reset(adapter);
1839 #endif
1840         igb_clean_all_tx_rings(adapter);
1841         igb_clean_all_rx_rings(adapter);
1842 #ifdef IGB_DCA
1843         /* since we reset the hardware DCA settings were cleared */
1844         igb_setup_dca(adapter);
1845 #endif
1846 }
1847
1848 void igb_reinit_locked(struct igb_adapter *adapter)
1849 {
1850         WARN_ON(in_interrupt());
1851         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
1852                 usleep_range(1000, 2000);
1853         igb_down(adapter);
1854         igb_up(adapter);
1855         clear_bit(__IGB_RESETTING, &adapter->state);
1856 }
1857
1858 /**
1859  * igb_enable_mas - Media Autosense re-enable after swap
1860  *
1861  * @adapter: adapter struct
1862  **/
1863 static s32  igb_enable_mas(struct igb_adapter *adapter)
1864 {
1865         struct e1000_hw *hw = &adapter->hw;
1866         u32 connsw;
1867         s32 ret_val = E1000_SUCCESS;
1868
1869         connsw = E1000_READ_REG(hw, E1000_CONNSW);
1870         if (hw->phy.media_type == e1000_media_type_copper) {
1871                 /* configure for SerDes media detect */
1872                 if (!(connsw & E1000_CONNSW_SERDESD)) {
1873                         connsw |= E1000_CONNSW_ENRGSRC;
1874                         connsw |= E1000_CONNSW_AUTOSENSE_EN;
1875                         E1000_WRITE_REG(hw, E1000_CONNSW, connsw);
1876                         E1000_WRITE_FLUSH(hw);
1877                 } else if (connsw & E1000_CONNSW_SERDESD) {
1878                         /* already SerDes, no need to enable anything */
1879                         return ret_val;
1880                 } else {
1881                         dev_info(pci_dev_to_dev(adapter->pdev),
1882                         "%s:MAS: Unable to configure feature, disabling..\n",
1883                         adapter->netdev->name);
1884                         adapter->flags &= ~IGB_FLAG_MAS_ENABLE;
1885                 }
1886         }
1887         return ret_val;
1888 }
1889
1890 void igb_reset(struct igb_adapter *adapter)
1891 {
1892         struct pci_dev *pdev = adapter->pdev;
1893         struct e1000_hw *hw = &adapter->hw;
1894         struct e1000_mac_info *mac = &hw->mac;
1895         struct e1000_fc_info *fc = &hw->fc;
1896         u32 pba = 0, tx_space, min_tx_space, min_rx_space, hwm;
1897
1898         /* Repartition Pba for greater than 9k mtu
1899          * To take effect CTRL.RST is required.
1900          */
1901         switch (mac->type) {
1902         case e1000_i350:
1903         case e1000_82580:
1904         case e1000_i354:
1905                 pba = E1000_READ_REG(hw, E1000_RXPBS);
1906                 pba = e1000_rxpbs_adjust_82580(pba);
1907                 break;
1908         case e1000_82576:
1909                 pba = E1000_READ_REG(hw, E1000_RXPBS);
1910                 pba &= E1000_RXPBS_SIZE_MASK_82576;
1911                 break;
1912         case e1000_82575:
1913         case e1000_i210:
1914         case e1000_i211:
1915         default:
1916                 pba = E1000_PBA_34K;
1917                 break;
1918         }
1919
1920         if ((adapter->max_frame_size > ETH_FRAME_LEN + ETH_FCS_LEN) &&
1921             (mac->type < e1000_82576)) {
1922                 /* adjust PBA for jumbo frames */
1923                 E1000_WRITE_REG(hw, E1000_PBA, pba);
1924
1925                 /* To maintain wire speed transmits, the Tx FIFO should be
1926                  * large enough to accommodate two full transmit packets,
1927                  * rounded up to the next 1KB and expressed in KB.  Likewise,
1928                  * the Rx FIFO should be large enough to accommodate at least
1929                  * one full receive packet and is similarly rounded up and
1930                  * expressed in KB. */
1931                 pba = E1000_READ_REG(hw, E1000_PBA);
1932                 /* upper 16 bits has Tx packet buffer allocation size in KB */
1933                 tx_space = pba >> 16;
1934                 /* lower 16 bits has Rx packet buffer allocation size in KB */
1935                 pba &= 0xffff;
1936                 /* the tx fifo also stores 16 bytes of information about the tx
1937                  * but don't include ethernet FCS because hardware appends it */
1938                 min_tx_space = (adapter->max_frame_size +
1939                                 sizeof(union e1000_adv_tx_desc) -
1940                                 ETH_FCS_LEN) * 2;
1941                 min_tx_space = ALIGN(min_tx_space, 1024);
1942                 min_tx_space >>= 10;
1943                 /* software strips receive CRC, so leave room for it */
1944                 min_rx_space = adapter->max_frame_size;
1945                 min_rx_space = ALIGN(min_rx_space, 1024);
1946                 min_rx_space >>= 10;
1947
1948                 /* If current Tx allocation is less than the min Tx FIFO size,
1949                  * and the min Tx FIFO size is less than the current Rx FIFO
1950                  * allocation, take space away from current Rx allocation */
1951                 if (tx_space < min_tx_space &&
1952                     ((min_tx_space - tx_space) < pba)) {
1953                         pba = pba - (min_tx_space - tx_space);
1954
1955                         /* if short on rx space, rx wins and must trump tx
1956                          * adjustment */
1957                         if (pba < min_rx_space)
1958                                 pba = min_rx_space;
1959                 }
1960                 E1000_WRITE_REG(hw, E1000_PBA, pba);
1961         }
1962
1963         /* flow control settings */
1964         /* The high water mark must be low enough to fit one full frame
1965          * (or the size used for early receive) above it in the Rx FIFO.
1966          * Set it to the lower of:
1967          * - 90% of the Rx FIFO size, or
1968          * - the full Rx FIFO size minus one full frame */
1969         hwm = min(((pba << 10) * 9 / 10),
1970                         ((pba << 10) - 2 * adapter->max_frame_size));
1971
1972         fc->high_water = hwm & 0xFFFFFFF0;      /* 16-byte granularity */
1973         fc->low_water = fc->high_water - 16;
1974         fc->pause_time = 0xFFFF;
1975         fc->send_xon = 1;
1976         fc->current_mode = fc->requested_mode;
1977
1978         /* disable receive for all VFs and wait one second */
1979         if (adapter->vfs_allocated_count) {
1980                 int i;
1981                 /*
1982                  * Clear all flags except indication that the PF has set
1983                  * the VF MAC addresses administratively
1984                  */
1985                 for (i = 0 ; i < adapter->vfs_allocated_count; i++)
1986                         adapter->vf_data[i].flags &= IGB_VF_FLAG_PF_SET_MAC;
1987
1988                 /* ping all the active vfs to let them know we are going down */
1989                 igb_ping_all_vfs(adapter);
1990
1991                 /* disable transmits and receives */
1992                 E1000_WRITE_REG(hw, E1000_VFRE, 0);
1993                 E1000_WRITE_REG(hw, E1000_VFTE, 0);
1994         }
1995
1996         /* Allow time for pending master requests to run */
1997         e1000_reset_hw(hw);
1998         E1000_WRITE_REG(hw, E1000_WUC, 0);
1999
2000         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
2001                 e1000_setup_init_funcs(hw, TRUE);
2002                 igb_check_options(adapter);
2003                 e1000_get_bus_info(hw);
2004                 adapter->flags &= ~IGB_FLAG_MEDIA_RESET;
2005         }
2006         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
2007                 if (igb_enable_mas(adapter))
2008                         dev_err(pci_dev_to_dev(pdev),
2009                                 "Error enabling Media Auto Sense\n");
2010         }
2011         if (e1000_init_hw(hw))
2012                 dev_err(pci_dev_to_dev(pdev), "Hardware Error\n");
2013
2014         /*
2015          * Flow control settings reset on hardware reset, so guarantee flow
2016          * control is off when forcing speed.
2017          */
2018         if (!hw->mac.autoneg)
2019                 e1000_force_mac_fc(hw);
2020
2021         igb_init_dmac(adapter, pba);
2022         /* Re-initialize the thermal sensor on i350 devices. */
2023         if (mac->type == e1000_i350 && hw->bus.func == 0) {
2024                 /*
2025                  * If present, re-initialize the external thermal sensor
2026                  * interface.
2027                  */
2028                 if (adapter->ets)
2029                         e1000_set_i2c_bb(hw);
2030                 e1000_init_thermal_sensor_thresh(hw);
2031         }
2032
2033         /*Re-establish EEE setting */
2034         if (hw->phy.media_type == e1000_media_type_copper) {
2035                 switch (mac->type) {
2036                 case e1000_i350:
2037                 case e1000_i210:
2038                 case e1000_i211:
2039                         e1000_set_eee_i350(hw);
2040                         break;
2041                 case e1000_i354:
2042                         e1000_set_eee_i354(hw);
2043                         break;
2044                 default:
2045                         break;
2046                 }
2047         }
2048
2049         if (!netif_running(adapter->netdev))
2050                 igb_power_down_link(adapter);
2051
2052         igb_update_mng_vlan(adapter);
2053
2054         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
2055         E1000_WRITE_REG(hw, E1000_VET, ETHERNET_IEEE_VLAN_TYPE);
2056
2057
2058 #ifdef HAVE_PTP_1588_CLOCK
2059         /* Re-enable PTP, where applicable. */
2060         igb_ptp_reset(adapter);
2061 #endif /* HAVE_PTP_1588_CLOCK */
2062
2063         e1000_get_phy_info(hw);
2064
2065         adapter->devrc++;
2066 }
2067
2068 #ifdef HAVE_NDO_SET_FEATURES
2069 static kni_netdev_features_t igb_fix_features(struct net_device *netdev,
2070                                               kni_netdev_features_t features)
2071 {
2072         /*
2073          * Since there is no support for separate tx vlan accel
2074          * enabled make sure tx flag is cleared if rx is.
2075          */
2076 #ifdef NETIF_F_HW_VLAN_CTAG_RX
2077         if (!(features & NETIF_F_HW_VLAN_CTAG_RX))
2078                 features &= ~NETIF_F_HW_VLAN_CTAG_TX;
2079 #else
2080         if (!(features & NETIF_F_HW_VLAN_RX))
2081                 features &= ~NETIF_F_HW_VLAN_TX;
2082 #endif
2083
2084         /* If Rx checksum is disabled, then LRO should also be disabled */
2085         if (!(features & NETIF_F_RXCSUM))
2086                 features &= ~NETIF_F_LRO;
2087
2088         return features;
2089 }
2090
2091 static int igb_set_features(struct net_device *netdev,
2092                             kni_netdev_features_t features)
2093 {
2094         u32 changed = netdev->features ^ features;
2095
2096 #ifdef NETIF_F_HW_VLAN_CTAG_RX
2097         if (changed & NETIF_F_HW_VLAN_CTAG_RX)
2098 #else
2099         if (changed & NETIF_F_HW_VLAN_RX)
2100 #endif
2101                 igb_vlan_mode(netdev, features);
2102
2103         return 0;
2104 }
2105
2106 #ifdef NTF_SELF
2107 #ifdef USE_CONST_DEV_UC_CHAR
2108 static int igb_ndo_fdb_add(struct ndmsg *ndm, struct nlattr *tb[],
2109                            struct net_device *dev,
2110                            const unsigned char *addr,
2111 #ifdef HAVE_NDO_FDB_ADD_VID
2112                            u16 vid,
2113 #endif
2114                            u16 flags)
2115 #else
2116 static int igb_ndo_fdb_add(struct ndmsg *ndm,
2117                            struct net_device *dev,
2118                            unsigned char *addr,
2119                            u16 flags)
2120 #endif
2121 {
2122         struct igb_adapter *adapter = netdev_priv(dev);
2123         struct e1000_hw *hw = &adapter->hw;
2124         int err;
2125
2126         if (!(adapter->vfs_allocated_count))
2127                 return -EOPNOTSUPP;
2128
2129         /* Hardware does not support aging addresses so if a
2130          * ndm_state is given only allow permanent addresses
2131          */
2132         if (ndm->ndm_state && !(ndm->ndm_state & NUD_PERMANENT)) {
2133                 pr_info("%s: FDB only supports static addresses\n",
2134                         igb_driver_name);
2135                 return -EINVAL;
2136         }
2137
2138         if (is_unicast_ether_addr(addr) || is_link_local_ether_addr(addr)) {
2139                 u32 rar_uc_entries = hw->mac.rar_entry_count -
2140                                         (adapter->vfs_allocated_count + 1);
2141
2142                 if (netdev_uc_count(dev) < rar_uc_entries)
2143                         err = dev_uc_add_excl(dev, addr);
2144                 else
2145                         err = -ENOMEM;
2146         } else if (is_multicast_ether_addr(addr)) {
2147                 err = dev_mc_add_excl(dev, addr);
2148         } else {
2149                 err = -EINVAL;
2150         }
2151
2152         /* Only return duplicate errors if NLM_F_EXCL is set */
2153         if (err == -EEXIST && !(flags & NLM_F_EXCL))
2154                 err = 0;
2155
2156         return err;
2157 }
2158
2159 #ifndef USE_DEFAULT_FDB_DEL_DUMP
2160 #ifdef USE_CONST_DEV_UC_CHAR
2161 static int igb_ndo_fdb_del(struct ndmsg *ndm,
2162                            struct net_device *dev,
2163                            const unsigned char *addr)
2164 #else
2165 static int igb_ndo_fdb_del(struct ndmsg *ndm,
2166                            struct net_device *dev,
2167                            unsigned char *addr)
2168 #endif
2169 {
2170         struct igb_adapter *adapter = netdev_priv(dev);
2171         int err = -EOPNOTSUPP;
2172
2173         if (ndm->ndm_state & NUD_PERMANENT) {
2174                 pr_info("%s: FDB only supports static addresses\n",
2175                         igb_driver_name);
2176                 return -EINVAL;
2177         }
2178
2179         if (adapter->vfs_allocated_count) {
2180                 if (is_unicast_ether_addr(addr))
2181                         err = dev_uc_del(dev, addr);
2182                 else if (is_multicast_ether_addr(addr))
2183                         err = dev_mc_del(dev, addr);
2184                 else
2185                         err = -EINVAL;
2186         }
2187
2188         return err;
2189 }
2190
2191 static int igb_ndo_fdb_dump(struct sk_buff *skb,
2192                             struct netlink_callback *cb,
2193                             struct net_device *dev,
2194                             int idx)
2195 {
2196         struct igb_adapter *adapter = netdev_priv(dev);
2197
2198         if (adapter->vfs_allocated_count)
2199                 idx = ndo_dflt_fdb_dump(skb, cb, dev, idx);
2200
2201         return idx;
2202 }
2203 #endif /* USE_DEFAULT_FDB_DEL_DUMP */
2204
2205 #ifdef HAVE_BRIDGE_ATTRIBS
2206 #ifdef HAVE_NDO_BRIDGE_SET_DEL_LINK_FLAGS
2207 static int igb_ndo_bridge_setlink(struct net_device *dev,
2208                                   struct nlmsghdr *nlh,
2209                                   u16 flags)
2210 #else
2211 static int igb_ndo_bridge_setlink(struct net_device *dev,
2212                                   struct nlmsghdr *nlh)
2213 #endif /* HAVE_NDO_BRIDGE_SET_DEL_LINK_FLAGS */
2214 {
2215         struct igb_adapter *adapter = netdev_priv(dev);
2216         struct e1000_hw *hw = &adapter->hw;
2217         struct nlattr *attr, *br_spec;
2218         int rem;
2219
2220         if (!(adapter->vfs_allocated_count))
2221                 return -EOPNOTSUPP;
2222
2223         switch (adapter->hw.mac.type) {
2224         case e1000_82576:
2225         case e1000_i350:
2226         case e1000_i354:
2227                 break;
2228         default:
2229                 return -EOPNOTSUPP;
2230         }
2231
2232         br_spec = nlmsg_find_attr(nlh, sizeof(struct ifinfomsg), IFLA_AF_SPEC);
2233
2234         nla_for_each_nested(attr, br_spec, rem) {
2235                 __u16 mode;
2236
2237                 if (nla_type(attr) != IFLA_BRIDGE_MODE)
2238                         continue;
2239
2240                 mode = nla_get_u16(attr);
2241                 if (mode == BRIDGE_MODE_VEPA) {
2242                         e1000_vmdq_set_loopback_pf(hw, 0);
2243                         adapter->flags &= ~IGB_FLAG_LOOPBACK_ENABLE;
2244                 } else if (mode == BRIDGE_MODE_VEB) {
2245                         e1000_vmdq_set_loopback_pf(hw, 1);
2246                         adapter->flags |= IGB_FLAG_LOOPBACK_ENABLE;
2247                 } else
2248                         return -EINVAL;
2249
2250                 netdev_info(adapter->netdev, "enabling bridge mode: %s\n",
2251                             mode == BRIDGE_MODE_VEPA ? "VEPA" : "VEB");
2252         }
2253
2254         return 0;
2255 }
2256
2257 #ifdef HAVE_BRIDGE_FILTER
2258 #ifdef HAVE_NDO_BRIDGE_GETLINK_NLFLAGS
2259 static int igb_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
2260                                   struct net_device *dev, u32 filter_mask,
2261                                   int nlflags)
2262 #else
2263 static int igb_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
2264                                   struct net_device *dev, u32 filter_mask)
2265 #endif /* HAVE_NDO_BRIDGE_GETLINK_NLFLAGS */
2266 #else
2267 static int igb_ndo_bridge_getlink(struct sk_buff *skb, u32 pid, u32 seq,
2268                                   struct net_device *dev)
2269 #endif
2270 {
2271         struct igb_adapter *adapter = netdev_priv(dev);
2272         u16 mode;
2273
2274         if (!(adapter->vfs_allocated_count))
2275                 return -EOPNOTSUPP;
2276
2277         if (adapter->flags & IGB_FLAG_LOOPBACK_ENABLE)
2278                 mode = BRIDGE_MODE_VEB;
2279         else
2280                 mode = BRIDGE_MODE_VEPA;
2281
2282 #ifdef HAVE_NDO_DFLT_BRIDGE_ADD_MASK
2283 #ifdef HAVE_NDO_BRIDGE_GETLINK_NLFLAGS
2284 #ifdef HAVE_NDO_BRIDGE_GETLINK_FILTER_MASK_VLAN_FILL
2285         return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode, 0, 0,
2286                                 nlflags, filter_mask, NULL);
2287 #else
2288         return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode, 0, 0, nlflags);
2289 #endif /* HAVE_NDO_BRIDGE_GETLINK_FILTER_MASK_VLAN_FILL */
2290 #else
2291         return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode, 0, 0);
2292 #endif /* HAVE_NDO_BRIDGE_GETLINK_NLFLAGS */
2293 #else
2294         return ndo_dflt_bridge_getlink(skb, pid, seq, dev, mode);
2295 #endif /* HAVE_NDO_DFLT_BRIDGE_ADD_MASK */
2296 }
2297 #endif /* HAVE_BRIDGE_ATTRIBS */
2298 #endif /* NTF_SELF */
2299
2300 #endif /* HAVE_NDO_SET_FEATURES */
2301 #ifdef HAVE_NET_DEVICE_OPS
2302 static const struct net_device_ops igb_netdev_ops = {
2303         .ndo_open               = igb_open,
2304         .ndo_stop               = igb_close,
2305         .ndo_start_xmit         = igb_xmit_frame,
2306         .ndo_get_stats          = igb_get_stats,
2307         .ndo_set_rx_mode        = igb_set_rx_mode,
2308         .ndo_set_mac_address    = igb_set_mac,
2309         .ndo_change_mtu         = igb_change_mtu,
2310         .ndo_do_ioctl           = igb_ioctl,
2311         .ndo_tx_timeout         = igb_tx_timeout,
2312         .ndo_validate_addr      = eth_validate_addr,
2313         .ndo_vlan_rx_add_vid    = igb_vlan_rx_add_vid,
2314         .ndo_vlan_rx_kill_vid   = igb_vlan_rx_kill_vid,
2315 #ifdef IFLA_VF_MAX
2316         .ndo_set_vf_mac         = igb_ndo_set_vf_mac,
2317         .ndo_set_vf_vlan        = igb_ndo_set_vf_vlan,
2318 #ifdef HAVE_VF_MIN_MAX_TXRATE
2319         .ndo_set_vf_rate        = igb_ndo_set_vf_bw,
2320 #else /* HAVE_VF_MIN_MAX_TXRATE */
2321         .ndo_set_vf_tx_rate     = igb_ndo_set_vf_bw,
2322 #endif /* HAVE_VF_MIN_MAX_TXRATE */
2323         .ndo_get_vf_config      = igb_ndo_get_vf_config,
2324 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
2325         .ndo_set_vf_spoofchk    = igb_ndo_set_vf_spoofchk,
2326 #endif /* HAVE_VF_SPOOFCHK_CONFIGURE */
2327 #endif /* IFLA_VF_MAX */
2328 #ifdef CONFIG_NET_POLL_CONTROLLER
2329         .ndo_poll_controller    = igb_netpoll,
2330 #endif
2331 #ifdef HAVE_NDO_SET_FEATURES
2332         .ndo_fix_features       = igb_fix_features,
2333         .ndo_set_features       = igb_set_features,
2334 #endif
2335 #ifdef HAVE_VLAN_RX_REGISTER
2336         .ndo_vlan_rx_register   = igb_vlan_mode,
2337 #endif
2338 #ifndef HAVE_RHEL6_NETDEV_OPS_EXT_FDB
2339 #ifdef NTF_SELF
2340         .ndo_fdb_add            = igb_ndo_fdb_add,
2341 #ifndef USE_DEFAULT_FDB_DEL_DUMP
2342         .ndo_fdb_del            = igb_ndo_fdb_del,
2343         .ndo_fdb_dump           = igb_ndo_fdb_dump,
2344 #endif
2345 #endif /* ! HAVE_RHEL6_NETDEV_OPS_EXT_FDB */
2346 #ifdef HAVE_BRIDGE_ATTRIBS
2347         .ndo_bridge_setlink     = igb_ndo_bridge_setlink,
2348         .ndo_bridge_getlink     = igb_ndo_bridge_getlink,
2349 #endif /* HAVE_BRIDGE_ATTRIBS */
2350 #endif
2351 };
2352
2353 #ifdef CONFIG_IGB_VMDQ_NETDEV
2354 static const struct net_device_ops igb_vmdq_ops = {
2355         .ndo_open               = &igb_vmdq_open,
2356         .ndo_stop               = &igb_vmdq_close,
2357         .ndo_start_xmit         = &igb_vmdq_xmit_frame,
2358         .ndo_get_stats          = &igb_vmdq_get_stats,
2359         .ndo_set_rx_mode        = &igb_vmdq_set_rx_mode,
2360         .ndo_validate_addr      = eth_validate_addr,
2361         .ndo_set_mac_address    = &igb_vmdq_set_mac,
2362         .ndo_change_mtu         = &igb_vmdq_change_mtu,
2363         .ndo_tx_timeout         = &igb_vmdq_tx_timeout,
2364         .ndo_vlan_rx_register   = &igb_vmdq_vlan_rx_register,
2365         .ndo_vlan_rx_add_vid    = &igb_vmdq_vlan_rx_add_vid,
2366         .ndo_vlan_rx_kill_vid   = &igb_vmdq_vlan_rx_kill_vid,
2367 };
2368
2369 #endif /* CONFIG_IGB_VMDQ_NETDEV */
2370 #endif /* HAVE_NET_DEVICE_OPS */
2371 #ifdef CONFIG_IGB_VMDQ_NETDEV
2372 void igb_assign_vmdq_netdev_ops(struct net_device *vnetdev)
2373 {
2374 #ifdef HAVE_NET_DEVICE_OPS
2375         vnetdev->netdev_ops = &igb_vmdq_ops;
2376 #else
2377         dev->open = &igb_vmdq_open;
2378         dev->stop = &igb_vmdq_close;
2379         dev->hard_start_xmit = &igb_vmdq_xmit_frame;
2380         dev->get_stats = &igb_vmdq_get_stats;
2381 #ifdef HAVE_SET_RX_MODE
2382         dev->set_rx_mode = &igb_vmdq_set_rx_mode;
2383 #endif
2384         dev->set_multicast_list = &igb_vmdq_set_rx_mode;
2385         dev->set_mac_address = &igb_vmdq_set_mac;
2386         dev->change_mtu = &igb_vmdq_change_mtu;
2387 #ifdef HAVE_TX_TIMEOUT
2388         dev->tx_timeout = &igb_vmdq_tx_timeout;
2389 #endif
2390 #if defined(NETIF_F_HW_VLAN_TX) || defined(NETIF_F_HW_VLAN_CTAG_TX)
2391         dev->vlan_rx_register = &igb_vmdq_vlan_rx_register;
2392         dev->vlan_rx_add_vid = &igb_vmdq_vlan_rx_add_vid;
2393         dev->vlan_rx_kill_vid = &igb_vmdq_vlan_rx_kill_vid;
2394 #endif
2395 #endif
2396         igb_vmdq_set_ethtool_ops(vnetdev);
2397         vnetdev->watchdog_timeo = 5 * HZ;
2398
2399 }
2400
2401 int igb_init_vmdq_netdevs(struct igb_adapter *adapter)
2402 {
2403         int pool, err = 0, base_queue;
2404         struct net_device *vnetdev;
2405         struct igb_vmdq_adapter *vmdq_adapter;
2406
2407         for (pool = 1; pool < adapter->vmdq_pools; pool++) {
2408                 int qpp = (!adapter->rss_queues ? 1 : adapter->rss_queues);
2409                 base_queue = pool * qpp;
2410                 vnetdev = alloc_etherdev(sizeof(struct igb_vmdq_adapter));
2411                 if (!vnetdev) {
2412                         err = -ENOMEM;
2413                         break;
2414                 }
2415                 vmdq_adapter = netdev_priv(vnetdev);
2416                 vmdq_adapter->vnetdev = vnetdev;
2417                 vmdq_adapter->real_adapter = adapter;
2418                 vmdq_adapter->rx_ring = adapter->rx_ring[base_queue];
2419                 vmdq_adapter->tx_ring = adapter->tx_ring[base_queue];
2420                 igb_assign_vmdq_netdev_ops(vnetdev);
2421                 snprintf(vnetdev->name, IFNAMSIZ, "%sv%d",
2422                          adapter->netdev->name, pool);
2423                 vnetdev->features = adapter->netdev->features;
2424 #ifdef HAVE_NETDEV_VLAN_FEATURES
2425                 vnetdev->vlan_features = adapter->netdev->vlan_features;
2426 #endif
2427                 adapter->vmdq_netdev[pool-1] = vnetdev;
2428                 err = register_netdev(vnetdev);
2429                 if (err)
2430                         break;
2431         }
2432         return err;
2433 }
2434
2435 int igb_remove_vmdq_netdevs(struct igb_adapter *adapter)
2436 {
2437         int pool, err = 0;
2438
2439         for (pool = 1; pool < adapter->vmdq_pools; pool++) {
2440                 unregister_netdev(adapter->vmdq_netdev[pool-1]);
2441                 free_netdev(adapter->vmdq_netdev[pool-1]);
2442                 adapter->vmdq_netdev[pool-1] = NULL;
2443         }
2444         return err;
2445 }
2446 #endif /* CONFIG_IGB_VMDQ_NETDEV */
2447
2448 /**
2449  * igb_set_fw_version - Configure version string for ethtool
2450  * @adapter: adapter struct
2451  *
2452  **/
2453 static void igb_set_fw_version(struct igb_adapter *adapter)
2454 {
2455         struct e1000_hw *hw = &adapter->hw;
2456         struct e1000_fw_version fw;
2457
2458         e1000_get_fw_version(hw, &fw);
2459
2460         switch (hw->mac.type) {
2461         case e1000_i210:
2462         case e1000_i211:
2463                 if (!(e1000_get_flash_presence_i210(hw))) {
2464                         snprintf(adapter->fw_version,
2465                             sizeof(adapter->fw_version),
2466                             "%2d.%2d-%d",
2467                             fw.invm_major, fw.invm_minor, fw.invm_img_type);
2468                         break;
2469                 }
2470                 /* fall through */
2471         default:
2472                 /* if option rom is valid, display its version too*/
2473                 if (fw.or_valid) {
2474                         snprintf(adapter->fw_version,
2475                             sizeof(adapter->fw_version),
2476                             "%d.%d, 0x%08x, %d.%d.%d",
2477                             fw.eep_major, fw.eep_minor, fw.etrack_id,
2478                             fw.or_major, fw.or_build, fw.or_patch);
2479                 /* no option rom */
2480                 } else {
2481                         if (fw.etrack_id != 0X0000) {
2482                         snprintf(adapter->fw_version,
2483                             sizeof(adapter->fw_version),
2484                             "%d.%d, 0x%08x",
2485                             fw.eep_major, fw.eep_minor, fw.etrack_id);
2486                         } else {
2487                         snprintf(adapter->fw_version,
2488                             sizeof(adapter->fw_version),
2489                             "%d.%d.%d",
2490                             fw.eep_major, fw.eep_minor, fw.eep_build);
2491                         }
2492                 }
2493                 break;
2494         }
2495
2496         return;
2497 }
2498
2499 /**
2500  * igb_init_mas - init Media Autosense feature if enabled in the NVM
2501  *
2502  * @adapter: adapter struct
2503  **/
2504 static void igb_init_mas(struct igb_adapter *adapter)
2505 {
2506         struct e1000_hw *hw = &adapter->hw;
2507         u16 eeprom_data;
2508
2509         e1000_read_nvm(hw, NVM_COMPAT, 1, &eeprom_data);
2510         switch (hw->bus.func) {
2511         case E1000_FUNC_0:
2512                 if (eeprom_data & IGB_MAS_ENABLE_0)
2513                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2514                 break;
2515         case E1000_FUNC_1:
2516                 if (eeprom_data & IGB_MAS_ENABLE_1)
2517                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2518                 break;
2519         case E1000_FUNC_2:
2520                 if (eeprom_data & IGB_MAS_ENABLE_2)
2521                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2522                 break;
2523         case E1000_FUNC_3:
2524                 if (eeprom_data & IGB_MAS_ENABLE_3)
2525                         adapter->flags |= IGB_FLAG_MAS_ENABLE;
2526                 break;
2527         default:
2528                 /* Shouldn't get here */
2529                 dev_err(pci_dev_to_dev(adapter->pdev),
2530                         "%s:AMS: Invalid port configuration, returning\n",
2531                         adapter->netdev->name);
2532                 break;
2533         }
2534 }
2535
2536 /**
2537  * igb_probe - Device Initialization Routine
2538  * @pdev: PCI device information struct
2539  * @ent: entry in igb_pci_tbl
2540  *
2541  * Returns 0 on success, negative on failure
2542  *
2543  * igb_probe initializes an adapter identified by a pci_dev structure.
2544  * The OS initialization, configuring of the adapter private structure,
2545  * and a hardware reset occur.
2546  **/
2547 static int __devinit igb_probe(struct pci_dev *pdev,
2548                                const struct pci_device_id *ent)
2549 {
2550         struct net_device *netdev;
2551         struct igb_adapter *adapter;
2552         struct e1000_hw *hw;
2553         u16 eeprom_data = 0;
2554         u8 pba_str[E1000_PBANUM_LENGTH];
2555         s32 ret_val;
2556         static int global_quad_port_a; /* global quad port a indication */
2557         int i, err, pci_using_dac;
2558         static int cards_found;
2559
2560         err = pci_enable_device_mem(pdev);
2561         if (err)
2562                 return err;
2563
2564         pci_using_dac = 0;
2565         err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
2566         if (!err) {
2567                 err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
2568                 if (!err)
2569                         pci_using_dac = 1;
2570         } else {
2571                 err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
2572                 if (err) {
2573                         err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
2574                         if (err) {
2575                                 IGB_ERR("No usable DMA configuration, "
2576                                         "aborting\n");
2577                                 goto err_dma;
2578                         }
2579                 }
2580         }
2581
2582 #ifndef HAVE_ASPM_QUIRKS
2583         /* 82575 requires that the pci-e link partner disable the L0s state */
2584         switch (pdev->device) {
2585         case E1000_DEV_ID_82575EB_COPPER:
2586         case E1000_DEV_ID_82575EB_FIBER_SERDES:
2587         case E1000_DEV_ID_82575GB_QUAD_COPPER:
2588                 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S);
2589         default:
2590                 break;
2591         }
2592
2593 #endif /* HAVE_ASPM_QUIRKS */
2594         err = pci_request_selected_regions(pdev,
2595                                            pci_select_bars(pdev,
2596                                                            IORESOURCE_MEM),
2597                                            igb_driver_name);
2598         if (err)
2599                 goto err_pci_reg;
2600
2601         pci_enable_pcie_error_reporting(pdev);
2602
2603         pci_set_master(pdev);
2604
2605         err = -ENOMEM;
2606 #ifdef HAVE_TX_MQ
2607         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
2608                                    IGB_MAX_TX_QUEUES);
2609 #else
2610         netdev = alloc_etherdev(sizeof(struct igb_adapter));
2611 #endif /* HAVE_TX_MQ */
2612         if (!netdev)
2613                 goto err_alloc_etherdev;
2614
2615         SET_MODULE_OWNER(netdev);
2616         SET_NETDEV_DEV(netdev, &pdev->dev);
2617
2618         pci_set_drvdata(pdev, netdev);
2619         adapter = netdev_priv(netdev);
2620         adapter->netdev = netdev;
2621         adapter->pdev = pdev;
2622         hw = &adapter->hw;
2623         hw->back = adapter;
2624         adapter->port_num = hw->bus.func;
2625         adapter->msg_enable = (1 << debug) - 1;
2626
2627 #ifdef HAVE_PCI_ERS
2628         err = pci_save_state(pdev);
2629         if (err)
2630                 goto err_ioremap;
2631 #endif
2632         err = -EIO;
2633         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
2634                               pci_resource_len(pdev, 0));
2635         if (!hw->hw_addr)
2636                 goto err_ioremap;
2637
2638 #ifdef HAVE_NET_DEVICE_OPS
2639         netdev->netdev_ops = &igb_netdev_ops;
2640 #else /* HAVE_NET_DEVICE_OPS */
2641         netdev->open = &igb_open;
2642         netdev->stop = &igb_close;
2643         netdev->get_stats = &igb_get_stats;
2644 #ifdef HAVE_SET_RX_MODE
2645         netdev->set_rx_mode = &igb_set_rx_mode;
2646 #endif
2647         netdev->set_multicast_list = &igb_set_rx_mode;
2648         netdev->set_mac_address = &igb_set_mac;
2649         netdev->change_mtu = &igb_change_mtu;
2650         netdev->do_ioctl = &igb_ioctl;
2651 #ifdef HAVE_TX_TIMEOUT
2652         netdev->tx_timeout = &igb_tx_timeout;
2653 #endif
2654         netdev->vlan_rx_register = igb_vlan_mode;
2655         netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid;
2656         netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid;
2657 #ifdef CONFIG_NET_POLL_CONTROLLER
2658         netdev->poll_controller = igb_netpoll;
2659 #endif
2660         netdev->hard_start_xmit = &igb_xmit_frame;
2661 #endif /* HAVE_NET_DEVICE_OPS */
2662         igb_set_ethtool_ops(netdev);
2663 #ifdef HAVE_TX_TIMEOUT
2664         netdev->watchdog_timeo = 5 * HZ;
2665 #endif
2666
2667         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
2668
2669         adapter->bd_number = cards_found;
2670
2671         /* setup the private structure */
2672         err = igb_sw_init(adapter);
2673         if (err)
2674                 goto err_sw_init;
2675
2676         e1000_get_bus_info(hw);
2677
2678         hw->phy.autoneg_wait_to_complete = FALSE;
2679         hw->mac.adaptive_ifs = FALSE;
2680
2681         /* Copper options */
2682         if (hw->phy.media_type == e1000_media_type_copper) {
2683                 hw->phy.mdix = AUTO_ALL_MODES;
2684                 hw->phy.disable_polarity_correction = FALSE;
2685                 hw->phy.ms_type = e1000_ms_hw_default;
2686         }
2687
2688         if (e1000_check_reset_block(hw))
2689                 dev_info(pci_dev_to_dev(pdev),
2690                         "PHY reset is blocked due to SOL/IDER session.\n");
2691
2692         /*
2693          * features is initialized to 0 in allocation, it might have bits
2694          * set by igb_sw_init so we should use an or instead of an
2695          * assignment.
2696          */
2697         netdev->features |= NETIF_F_SG |
2698                             NETIF_F_IP_CSUM |
2699 #ifdef NETIF_F_IPV6_CSUM
2700                             NETIF_F_IPV6_CSUM |
2701 #endif
2702 #ifdef NETIF_F_TSO
2703                             NETIF_F_TSO |
2704 #ifdef NETIF_F_TSO6
2705                             NETIF_F_TSO6 |
2706 #endif
2707 #endif /* NETIF_F_TSO */
2708 #ifdef NETIF_F_RXHASH
2709                             NETIF_F_RXHASH |
2710 #endif
2711                             NETIF_F_RXCSUM |
2712 #ifdef NETIF_F_HW_VLAN_CTAG_RX
2713                             NETIF_F_HW_VLAN_CTAG_RX |
2714                             NETIF_F_HW_VLAN_CTAG_TX;
2715 #else
2716                             NETIF_F_HW_VLAN_RX |
2717                             NETIF_F_HW_VLAN_TX;
2718 #endif
2719
2720         if (hw->mac.type >= e1000_82576)
2721                 netdev->features |= NETIF_F_SCTP_CSUM;
2722
2723 #ifdef HAVE_NDO_SET_FEATURES
2724         /* copy netdev features into list of user selectable features */
2725         netdev->hw_features |= netdev->features;
2726 #ifndef IGB_NO_LRO
2727
2728         /* give us the option of enabling LRO later */
2729         netdev->hw_features |= NETIF_F_LRO;
2730 #endif
2731 #else
2732 #ifdef NETIF_F_GRO
2733
2734         /* this is only needed on kernels prior to 2.6.39 */
2735         netdev->features |= NETIF_F_GRO;
2736 #endif
2737 #endif
2738
2739         /* set this bit last since it cannot be part of hw_features */
2740 #ifdef NETIF_F_HW_VLAN_CTAG_FILTER
2741         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
2742 #else
2743         netdev->features |= NETIF_F_HW_VLAN_FILTER;
2744 #endif
2745
2746 #ifdef HAVE_NETDEV_VLAN_FEATURES
2747         netdev->vlan_features |= NETIF_F_TSO |
2748                                  NETIF_F_TSO6 |
2749                                  NETIF_F_IP_CSUM |
2750                                  NETIF_F_IPV6_CSUM |
2751                                  NETIF_F_SG;
2752
2753 #endif
2754         if (pci_using_dac)
2755                 netdev->features |= NETIF_F_HIGHDMA;
2756
2757         adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
2758 #ifdef DEBUG
2759         if (adapter->dmac != IGB_DMAC_DISABLE)
2760                 printk("%s: DMA Coalescing is enabled..\n", netdev->name);
2761 #endif
2762
2763         /* before reading the NVM, reset the controller to put the device in a
2764          * known good starting state */
2765         e1000_reset_hw(hw);
2766
2767         /* make sure the NVM is good */
2768         if (e1000_validate_nvm_checksum(hw) < 0) {
2769                 dev_err(pci_dev_to_dev(pdev), "The NVM Checksum Is Not"
2770                         " Valid\n");
2771                 err = -EIO;
2772                 goto err_eeprom;
2773         }
2774
2775         /* copy the MAC address out of the NVM */
2776         if (e1000_read_mac_addr(hw))
2777                 dev_err(pci_dev_to_dev(pdev), "NVM Read Error\n");
2778         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
2779 #ifdef ETHTOOL_GPERMADDR
2780         memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
2781
2782         if (!is_valid_ether_addr(netdev->perm_addr)) {
2783 #else
2784         if (!is_valid_ether_addr(netdev->dev_addr)) {
2785 #endif
2786                 dev_err(pci_dev_to_dev(pdev), "Invalid MAC Address\n");
2787                 err = -EIO;
2788                 goto err_eeprom;
2789         }
2790
2791         memcpy(&adapter->mac_table[0].addr, hw->mac.addr, netdev->addr_len);
2792         adapter->mac_table[0].queue = adapter->vfs_allocated_count;
2793         adapter->mac_table[0].state = (IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE);
2794         igb_rar_set(adapter, 0);
2795
2796         /* get firmware version for ethtool -i */
2797         igb_set_fw_version(adapter);
2798
2799         /* Check if Media Autosense is enabled */
2800         if (hw->mac.type == e1000_82580)
2801                 igb_init_mas(adapter);
2802         setup_timer(&adapter->watchdog_timer, &igb_watchdog,
2803                     (unsigned long) adapter);
2804         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
2805                 setup_timer(&adapter->dma_err_timer, &igb_dma_err_timer,
2806                             (unsigned long) adapter);
2807         setup_timer(&adapter->phy_info_timer, &igb_update_phy_info,
2808                     (unsigned long) adapter);
2809
2810         INIT_WORK(&adapter->reset_task, igb_reset_task);
2811         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
2812         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
2813                 INIT_WORK(&adapter->dma_err_task, igb_dma_err_task);
2814
2815         /* Initialize link properties that are user-changeable */
2816         adapter->fc_autoneg = true;
2817         hw->mac.autoneg = true;
2818         hw->phy.autoneg_advertised = 0x2f;
2819
2820         hw->fc.requested_mode = e1000_fc_default;
2821         hw->fc.current_mode = e1000_fc_default;
2822
2823         e1000_validate_mdi_setting(hw);
2824
2825         /* By default, support wake on port A */
2826         if (hw->bus.func == 0)
2827                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2828
2829         /* Check the NVM for wake support for non-port A ports */
2830         if (hw->mac.type >= e1000_82580)
2831                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
2832                                  NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
2833                                  &eeprom_data);
2834         else if (hw->bus.func == 1)
2835                 e1000_read_nvm(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
2836
2837         if (eeprom_data & IGB_EEPROM_APME)
2838                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2839
2840         /* now that we have the eeprom settings, apply the special cases where
2841          * the eeprom may be wrong or the board simply won't support wake on
2842          * lan on a particular port */
2843         switch (pdev->device) {
2844         case E1000_DEV_ID_82575GB_QUAD_COPPER:
2845                 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2846                 break;
2847         case E1000_DEV_ID_82575EB_FIBER_SERDES:
2848         case E1000_DEV_ID_82576_FIBER:
2849         case E1000_DEV_ID_82576_SERDES:
2850                 /* Wake events only supported on port A for dual fiber
2851                  * regardless of eeprom setting */
2852                 if (E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_FUNC_1)
2853                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2854                 break;
2855         case E1000_DEV_ID_82576_QUAD_COPPER:
2856         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
2857                 /* if quad port adapter, disable WoL on all but port A */
2858                 if (global_quad_port_a != 0)
2859                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2860                 else
2861                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
2862                 /* Reset for multiple quad port adapters */
2863                 if (++global_quad_port_a == 4)
2864                         global_quad_port_a = 0;
2865                 break;
2866         default:
2867                 /* If the device can't wake, don't set software support */
2868                 if (!device_can_wakeup(&adapter->pdev->dev))
2869                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
2870                 break;
2871         }
2872
2873         /* initialize the wol settings based on the eeprom settings */
2874         if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
2875                 adapter->wol |= E1000_WUFC_MAG;
2876
2877         /* Some vendors want WoL disabled by default, but still supported */
2878         if ((hw->mac.type == e1000_i350) &&
2879             (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
2880                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
2881                 adapter->wol = 0;
2882         }
2883
2884         device_set_wakeup_enable(pci_dev_to_dev(adapter->pdev),
2885                                  adapter->flags & IGB_FLAG_WOL_SUPPORTED);
2886
2887         /* reset the hardware with the new settings */
2888         igb_reset(adapter);
2889         adapter->devrc = 0;
2890
2891 #ifdef HAVE_I2C_SUPPORT
2892         /* Init the I2C interface */
2893         err = igb_init_i2c(adapter);
2894         if (err) {
2895                 dev_err(&pdev->dev, "failed to init i2c interface\n");
2896                 goto err_eeprom;
2897         }
2898 #endif /* HAVE_I2C_SUPPORT */
2899
2900         /* let the f/w know that the h/w is now under the control of the
2901          * driver. */
2902         igb_get_hw_control(adapter);
2903
2904         strncpy(netdev->name, "eth%d", IFNAMSIZ);
2905         err = register_netdev(netdev);
2906         if (err)
2907                 goto err_register;
2908
2909 #ifdef CONFIG_IGB_VMDQ_NETDEV
2910         err = igb_init_vmdq_netdevs(adapter);
2911         if (err)
2912                 goto err_register;
2913 #endif
2914         /* carrier off reporting is important to ethtool even BEFORE open */
2915         netif_carrier_off(netdev);
2916
2917 #ifdef IGB_DCA
2918         if (dca_add_requester(&pdev->dev) == E1000_SUCCESS) {
2919                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
2920                 dev_info(pci_dev_to_dev(pdev), "DCA enabled\n");
2921                 igb_setup_dca(adapter);
2922         }
2923
2924 #endif
2925 #ifdef HAVE_PTP_1588_CLOCK
2926         /* do hw tstamp init after resetting */
2927         igb_ptp_init(adapter);
2928 #endif /* HAVE_PTP_1588_CLOCK */
2929
2930         dev_info(pci_dev_to_dev(pdev), "Intel(R) Gigabit Ethernet Network Connection\n");
2931         /* print bus type/speed/width info */
2932         dev_info(pci_dev_to_dev(pdev), "%s: (PCIe:%s:%s) ",
2933                  netdev->name,
2934                  ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5GT/s" :
2935                   (hw->bus.speed == e1000_bus_speed_5000) ? "5.0GT/s" :
2936                   (hw->mac.type == e1000_i354) ? "integrated" :
2937                                                             "unknown"),
2938                  ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
2939                   (hw->bus.width == e1000_bus_width_pcie_x2) ? "Width x2" :
2940                   (hw->bus.width == e1000_bus_width_pcie_x1) ? "Width x1" :
2941                   (hw->mac.type == e1000_i354) ? "integrated" :
2942                    "unknown"));
2943         dev_info(pci_dev_to_dev(pdev), "%s: MAC: ", netdev->name);
2944         for (i = 0; i < 6; i++)
2945                 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
2946
2947         ret_val = e1000_read_pba_string(hw, pba_str, E1000_PBANUM_LENGTH);
2948         if (ret_val)
2949                 strncpy(pba_str, "Unknown", sizeof(pba_str) - 1);
2950         dev_info(pci_dev_to_dev(pdev), "%s: PBA No: %s\n", netdev->name,
2951                  pba_str);
2952
2953
2954         /* Initialize the thermal sensor on i350 devices. */
2955         if (hw->mac.type == e1000_i350) {
2956                 if (hw->bus.func == 0) {
2957                         u16 ets_word;
2958
2959                         /*
2960                          * Read the NVM to determine if this i350 device
2961                          * supports an external thermal sensor.
2962                          */
2963                         e1000_read_nvm(hw, NVM_ETS_CFG, 1, &ets_word);
2964                         if (ets_word != 0x0000 && ets_word != 0xFFFF)
2965                                 adapter->ets = true;
2966                         else
2967                                 adapter->ets = false;
2968                 }
2969 #ifdef IGB_HWMON
2970
2971                 igb_sysfs_init(adapter);
2972 #else
2973 #ifdef IGB_PROCFS
2974
2975                 igb_procfs_init(adapter);
2976 #endif /* IGB_PROCFS */
2977 #endif /* IGB_HWMON */
2978         } else {
2979                 adapter->ets = false;
2980         }
2981
2982         if (hw->phy.media_type == e1000_media_type_copper) {
2983                 switch (hw->mac.type) {
2984                 case e1000_i350:
2985                 case e1000_i210:
2986                 case e1000_i211:
2987                         /* Enable EEE for internal copper PHY devices */
2988                         err = e1000_set_eee_i350(hw);
2989                         if ((!err) &&
2990                             (adapter->flags & IGB_FLAG_EEE))
2991                                 adapter->eee_advert =
2992                                         MDIO_EEE_100TX | MDIO_EEE_1000T;
2993                         break;
2994                 case e1000_i354:
2995                         if ((E1000_READ_REG(hw, E1000_CTRL_EXT)) &
2996                             (E1000_CTRL_EXT_LINK_MODE_SGMII)) {
2997                                 err = e1000_set_eee_i354(hw);
2998                                 if ((!err) &&
2999                                     (adapter->flags & IGB_FLAG_EEE))
3000                                         adapter->eee_advert =
3001                                            MDIO_EEE_100TX | MDIO_EEE_1000T;
3002                         }
3003                         break;
3004                 default:
3005                         break;
3006                 }
3007         }
3008
3009         /* send driver version info to firmware */
3010         if (hw->mac.type >= e1000_i350)
3011                 igb_init_fw(adapter);
3012
3013 #ifndef IGB_NO_LRO
3014         if (netdev->features & NETIF_F_LRO)
3015                 dev_info(pci_dev_to_dev(pdev), "Internal LRO is enabled \n");
3016         else
3017                 dev_info(pci_dev_to_dev(pdev), "LRO is disabled \n");
3018 #endif
3019         dev_info(pci_dev_to_dev(pdev),
3020                  "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
3021                  adapter->msix_entries ? "MSI-X" :
3022                  (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
3023                  adapter->num_rx_queues, adapter->num_tx_queues);
3024
3025         cards_found++;
3026
3027         pm_runtime_put_noidle(&pdev->dev);
3028         return 0;
3029
3030 err_register:
3031         igb_release_hw_control(adapter);
3032 #ifdef HAVE_I2C_SUPPORT
3033         memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
3034 #endif /* HAVE_I2C_SUPPORT */
3035 err_eeprom:
3036         if (!e1000_check_reset_block(hw))
3037                 e1000_phy_hw_reset(hw);
3038
3039         if (hw->flash_address)
3040                 iounmap(hw->flash_address);
3041 err_sw_init:
3042         igb_clear_interrupt_scheme(adapter);
3043         igb_reset_sriov_capability(adapter);
3044         iounmap(hw->hw_addr);
3045 err_ioremap:
3046         free_netdev(netdev);
3047 err_alloc_etherdev:
3048         pci_release_selected_regions(pdev,
3049                                      pci_select_bars(pdev, IORESOURCE_MEM));
3050 err_pci_reg:
3051 err_dma:
3052         pci_disable_device(pdev);
3053         return err;
3054 }
3055 #ifdef HAVE_I2C_SUPPORT
3056 /*
3057  *  igb_remove_i2c - Cleanup  I2C interface
3058  *  @adapter: pointer to adapter structure
3059  *
3060  */
3061 static void igb_remove_i2c(struct igb_adapter *adapter)
3062 {
3063
3064         /* free the adapter bus structure */
3065         i2c_del_adapter(&adapter->i2c_adap);
3066 }
3067 #endif /* HAVE_I2C_SUPPORT */
3068
3069 /**
3070  * igb_remove - Device Removal Routine
3071  * @pdev: PCI device information struct
3072  *
3073  * igb_remove is called by the PCI subsystem to alert the driver
3074  * that it should release a PCI device.  The could be caused by a
3075  * Hot-Plug event, or because the driver is going to be removed from
3076  * memory.
3077  **/
3078 static void __devexit igb_remove(struct pci_dev *pdev)
3079 {
3080         struct net_device *netdev = pci_get_drvdata(pdev);
3081         struct igb_adapter *adapter = netdev_priv(netdev);
3082         struct e1000_hw *hw = &adapter->hw;
3083
3084         pm_runtime_get_noresume(&pdev->dev);
3085 #ifdef HAVE_I2C_SUPPORT
3086         igb_remove_i2c(adapter);
3087 #endif /* HAVE_I2C_SUPPORT */
3088 #ifdef HAVE_PTP_1588_CLOCK
3089         igb_ptp_stop(adapter);
3090 #endif /* HAVE_PTP_1588_CLOCK */
3091
3092         /* flush_scheduled work may reschedule our watchdog task, so
3093          * explicitly disable watchdog tasks from being rescheduled  */
3094         set_bit(__IGB_DOWN, &adapter->state);
3095         del_timer_sync(&adapter->watchdog_timer);
3096         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
3097                 del_timer_sync(&adapter->dma_err_timer);
3098         del_timer_sync(&adapter->phy_info_timer);
3099
3100         flush_scheduled_work();
3101
3102 #ifdef IGB_DCA
3103         if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
3104                 dev_info(pci_dev_to_dev(pdev), "DCA disabled\n");
3105                 dca_remove_requester(&pdev->dev);
3106                 adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
3107                 E1000_WRITE_REG(hw, E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_DISABLE);
3108         }
3109 #endif
3110
3111         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
3112          * would have already happened in close and is redundant. */
3113         igb_release_hw_control(adapter);
3114
3115         unregister_netdev(netdev);
3116 #ifdef CONFIG_IGB_VMDQ_NETDEV
3117         igb_remove_vmdq_netdevs(adapter);
3118 #endif
3119
3120         igb_clear_interrupt_scheme(adapter);
3121         igb_reset_sriov_capability(adapter);
3122
3123         iounmap(hw->hw_addr);
3124         if (hw->flash_address)
3125                 iounmap(hw->flash_address);
3126         pci_release_selected_regions(pdev,
3127                                      pci_select_bars(pdev, IORESOURCE_MEM));
3128
3129 #ifdef IGB_HWMON
3130         igb_sysfs_exit(adapter);
3131 #else
3132 #ifdef IGB_PROCFS
3133         igb_procfs_exit(adapter);
3134 #endif /* IGB_PROCFS */
3135 #endif /* IGB_HWMON */
3136         kfree(adapter->mac_table);
3137         kfree(adapter->shadow_vfta);
3138         free_netdev(netdev);
3139
3140         pci_disable_pcie_error_reporting(pdev);
3141
3142         pci_disable_device(pdev);
3143 }
3144
3145 /**
3146  * igb_sw_init - Initialize general software structures (struct igb_adapter)
3147  * @adapter: board private structure to initialize
3148  *
3149  * igb_sw_init initializes the Adapter private data structure.
3150  * Fields are initialized based on PCI device information and
3151  * OS network device settings (MTU size).
3152  **/
3153 static int igb_sw_init(struct igb_adapter *adapter)
3154 {
3155         struct e1000_hw *hw = &adapter->hw;
3156         struct net_device *netdev = adapter->netdev;
3157         struct pci_dev *pdev = adapter->pdev;
3158
3159         /* PCI config space info */
3160
3161         hw->vendor_id = pdev->vendor;
3162         hw->device_id = pdev->device;
3163         hw->subsystem_vendor_id = pdev->subsystem_vendor;
3164         hw->subsystem_device_id = pdev->subsystem_device;
3165
3166         pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
3167
3168         pci_read_config_word(pdev, PCI_COMMAND, &hw->bus.pci_cmd_word);
3169
3170         /* set default ring sizes */
3171         adapter->tx_ring_count = IGB_DEFAULT_TXD;
3172         adapter->rx_ring_count = IGB_DEFAULT_RXD;
3173
3174         /* set default work limits */
3175         adapter->tx_work_limit = IGB_DEFAULT_TX_WORK;
3176
3177         adapter->max_frame_size = netdev->mtu + ETH_HLEN + ETH_FCS_LEN +
3178                                               VLAN_HLEN;
3179
3180         /* Initialize the hardware-specific values */
3181         if (e1000_setup_init_funcs(hw, TRUE)) {
3182                 dev_err(pci_dev_to_dev(pdev), "Hardware Initialization Failure\n");
3183                 return -EIO;
3184         }
3185
3186         adapter->mac_table = kzalloc(sizeof(struct igb_mac_addr) *
3187                                      hw->mac.rar_entry_count,
3188                                      GFP_ATOMIC);
3189
3190         /* Setup and initialize a copy of the hw vlan table array */
3191         adapter->shadow_vfta = kzalloc(sizeof(u32) * E1000_VFTA_ENTRIES,
3192                                        GFP_ATOMIC);
3193 #ifdef NO_KNI
3194         /* These calls may decrease the number of queues */
3195         if (hw->mac.type < e1000_i210) {
3196                 igb_set_sriov_capability(adapter);
3197         }
3198
3199         if (igb_init_interrupt_scheme(adapter, true)) {
3200                 dev_err(pci_dev_to_dev(pdev), "Unable to allocate memory for queues\n");
3201                 return -ENOMEM;
3202         }
3203
3204         /* Explicitly disable IRQ since the NIC can be in any state. */
3205         igb_irq_disable(adapter);
3206
3207         set_bit(__IGB_DOWN, &adapter->state);
3208 #endif
3209         return 0;
3210 }
3211
3212 /**
3213  * igb_open - Called when a network interface is made active
3214  * @netdev: network interface device structure
3215  *
3216  * Returns 0 on success, negative value on failure
3217  *
3218  * The open entry point is called when a network interface is made
3219  * active by the system (IFF_UP).  At this point all resources needed
3220  * for transmit and receive operations are allocated, the interrupt
3221  * handler is registered with the OS, the watchdog timer is started,
3222  * and the stack is notified that the interface is ready.
3223  **/
3224 static int __igb_open(struct net_device *netdev, bool resuming)
3225 {
3226         struct igb_adapter *adapter = netdev_priv(netdev);
3227         struct e1000_hw *hw = &adapter->hw;
3228 #ifdef CONFIG_PM_RUNTIME
3229         struct pci_dev *pdev = adapter->pdev;
3230 #endif /* CONFIG_PM_RUNTIME */
3231         int err;
3232         int i;
3233
3234         /* disallow open during test */
3235         if (test_bit(__IGB_TESTING, &adapter->state)) {
3236                 WARN_ON(resuming);
3237                 return -EBUSY;
3238         }
3239
3240 #ifdef CONFIG_PM_RUNTIME
3241         if (!resuming)
3242                 pm_runtime_get_sync(&pdev->dev);
3243 #endif /* CONFIG_PM_RUNTIME */
3244
3245         netif_carrier_off(netdev);
3246
3247         /* allocate transmit descriptors */
3248         err = igb_setup_all_tx_resources(adapter);
3249         if (err)
3250                 goto err_setup_tx;
3251
3252         /* allocate receive descriptors */
3253         err = igb_setup_all_rx_resources(adapter);
3254         if (err)
3255                 goto err_setup_rx;
3256
3257         igb_power_up_link(adapter);
3258
3259         /* before we allocate an interrupt, we must be ready to handle it.
3260          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
3261          * as soon as we call pci_request_irq, so we have to setup our
3262          * clean_rx handler before we do so.  */
3263         igb_configure(adapter);
3264
3265         err = igb_request_irq(adapter);
3266         if (err)
3267                 goto err_req_irq;
3268
3269         /* Notify the stack of the actual queue counts. */
3270         netif_set_real_num_tx_queues(netdev,
3271                                      adapter->vmdq_pools ? 1 :
3272                                      adapter->num_tx_queues);
3273
3274         err = netif_set_real_num_rx_queues(netdev,
3275                                            adapter->vmdq_pools ? 1 :
3276                                            adapter->num_rx_queues);
3277         if (err)
3278                 goto err_set_queues;
3279
3280         /* From here on the code is the same as igb_up() */
3281         clear_bit(__IGB_DOWN, &adapter->state);
3282
3283         for (i = 0; i < adapter->num_q_vectors; i++)
3284                 napi_enable(&(adapter->q_vector[i]->napi));
3285         igb_configure_lli(adapter);
3286
3287         /* Clear any pending interrupts. */
3288         E1000_READ_REG(hw, E1000_ICR);
3289
3290         igb_irq_enable(adapter);
3291
3292         /* notify VFs that reset has been completed */
3293         if (adapter->vfs_allocated_count) {
3294                 u32 reg_data = E1000_READ_REG(hw, E1000_CTRL_EXT);
3295                 reg_data |= E1000_CTRL_EXT_PFRSTD;
3296                 E1000_WRITE_REG(hw, E1000_CTRL_EXT, reg_data);
3297         }
3298
3299         netif_tx_start_all_queues(netdev);
3300
3301         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
3302                 schedule_work(&adapter->dma_err_task);
3303
3304         /* start the watchdog. */
3305         hw->mac.get_link_status = 1;
3306         schedule_work(&adapter->watchdog_task);
3307
3308         return E1000_SUCCESS;
3309
3310 err_set_queues:
3311         igb_free_irq(adapter);
3312 err_req_irq:
3313         igb_release_hw_control(adapter);
3314         igb_power_down_link(adapter);
3315         igb_free_all_rx_resources(adapter);
3316 err_setup_rx:
3317         igb_free_all_tx_resources(adapter);
3318 err_setup_tx:
3319         igb_reset(adapter);
3320
3321 #ifdef CONFIG_PM_RUNTIME
3322         if (!resuming)
3323                 pm_runtime_put(&pdev->dev);
3324 #endif /* CONFIG_PM_RUNTIME */
3325
3326         return err;
3327 }
3328
3329 static int igb_open(struct net_device *netdev)
3330 {
3331         return __igb_open(netdev, false);
3332 }
3333
3334 /**
3335  * igb_close - Disables a network interface
3336  * @netdev: network interface device structure
3337  *
3338  * Returns 0, this is not allowed to fail
3339  *
3340  * The close entry point is called when an interface is de-activated
3341  * by the OS.  The hardware is still under the driver's control, but
3342  * needs to be disabled.  A global MAC reset is issued to stop the
3343  * hardware, and all transmit and receive resources are freed.
3344  **/
3345 static int __igb_close(struct net_device *netdev, bool suspending)
3346 {
3347         struct igb_adapter *adapter = netdev_priv(netdev);
3348 #ifdef CONFIG_PM_RUNTIME
3349         struct pci_dev *pdev = adapter->pdev;
3350 #endif /* CONFIG_PM_RUNTIME */
3351
3352         WARN_ON(test_bit(__IGB_RESETTING, &adapter->state));
3353
3354 #ifdef CONFIG_PM_RUNTIME
3355         if (!suspending)
3356                 pm_runtime_get_sync(&pdev->dev);
3357 #endif /* CONFIG_PM_RUNTIME */
3358
3359         igb_down(adapter);
3360
3361         igb_release_hw_control(adapter);
3362
3363         igb_free_irq(adapter);
3364
3365         igb_free_all_tx_resources(adapter);
3366         igb_free_all_rx_resources(adapter);
3367
3368 #ifdef CONFIG_PM_RUNTIME
3369         if (!suspending)
3370                 pm_runtime_put_sync(&pdev->dev);
3371 #endif /* CONFIG_PM_RUNTIME */
3372
3373         return 0;
3374 }
3375
3376 static int igb_close(struct net_device *netdev)
3377 {
3378         return __igb_close(netdev, false);
3379 }
3380
3381 /**
3382  * igb_setup_tx_resources - allocate Tx resources (Descriptors)
3383  * @tx_ring: tx descriptor ring (for a specific queue) to setup
3384  *
3385  * Return 0 on success, negative on failure
3386  **/
3387 int igb_setup_tx_resources(struct igb_ring *tx_ring)
3388 {
3389         struct device *dev = tx_ring->dev;
3390         int size;
3391
3392         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
3393         tx_ring->tx_buffer_info = vzalloc(size);
3394         if (!tx_ring->tx_buffer_info)
3395                 goto err;
3396
3397         /* round up to nearest 4K */
3398         tx_ring->size = tx_ring->count * sizeof(union e1000_adv_tx_desc);
3399         tx_ring->size = ALIGN(tx_ring->size, 4096);
3400
3401         tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
3402                                            &tx_ring->dma, GFP_KERNEL);
3403
3404         if (!tx_ring->desc)
3405                 goto err;
3406
3407         tx_ring->next_to_use = 0;
3408         tx_ring->next_to_clean = 0;
3409
3410         return 0;
3411
3412 err:
3413         vfree(tx_ring->tx_buffer_info);
3414         dev_err(dev,
3415                 "Unable to allocate memory for the transmit descriptor ring\n");
3416         return -ENOMEM;
3417 }
3418
3419 /**
3420  * igb_setup_all_tx_resources - wrapper to allocate Tx resources
3421  *                                (Descriptors) for all queues
3422  * @adapter: board private structure
3423  *
3424  * Return 0 on success, negative on failure
3425  **/
3426 static int igb_setup_all_tx_resources(struct igb_adapter *adapter)
3427 {
3428         struct pci_dev *pdev = adapter->pdev;
3429         int i, err = 0;
3430
3431         for (i = 0; i < adapter->num_tx_queues; i++) {
3432                 err = igb_setup_tx_resources(adapter->tx_ring[i]);
3433                 if (err) {
3434                         dev_err(pci_dev_to_dev(pdev),
3435                                 "Allocation for Tx Queue %u failed\n", i);
3436                         for (i--; i >= 0; i--)
3437                                 igb_free_tx_resources(adapter->tx_ring[i]);
3438                         break;
3439                 }
3440         }
3441
3442         return err;
3443 }
3444
3445 /**
3446  * igb_setup_tctl - configure the transmit control registers
3447  * @adapter: Board private structure
3448  **/
3449 void igb_setup_tctl(struct igb_adapter *adapter)
3450 {
3451         struct e1000_hw *hw = &adapter->hw;
3452         u32 tctl;
3453
3454         /* disable queue 0 which is enabled by default on 82575 and 82576 */
3455         E1000_WRITE_REG(hw, E1000_TXDCTL(0), 0);
3456
3457         /* Program the Transmit Control Register */
3458         tctl = E1000_READ_REG(hw, E1000_TCTL);
3459         tctl &= ~E1000_TCTL_CT;
3460         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
3461                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
3462
3463         e1000_config_collision_dist(hw);
3464
3465         /* Enable transmits */
3466         tctl |= E1000_TCTL_EN;
3467
3468         E1000_WRITE_REG(hw, E1000_TCTL, tctl);
3469 }
3470
3471 static u32 igb_tx_wthresh(struct igb_adapter *adapter)
3472 {
3473         struct e1000_hw *hw = &adapter->hw;
3474         switch (hw->mac.type) {
3475         case e1000_i354:
3476                 return 4;
3477         case e1000_82576:
3478                 if (adapter->msix_entries)
3479                         return 1;
3480         default:
3481                 break;
3482         }
3483
3484         return 16;
3485 }
3486
3487 /**
3488  * igb_configure_tx_ring - Configure transmit ring after Reset
3489  * @adapter: board private structure
3490  * @ring: tx ring to configure
3491  *
3492  * Configure a transmit ring after a reset.
3493  **/
3494 void igb_configure_tx_ring(struct igb_adapter *adapter,
3495                            struct igb_ring *ring)
3496 {
3497         struct e1000_hw *hw = &adapter->hw;
3498         u32 txdctl = 0;
3499         u64 tdba = ring->dma;
3500         int reg_idx = ring->reg_idx;
3501
3502         /* disable the queue */
3503         E1000_WRITE_REG(hw, E1000_TXDCTL(reg_idx), 0);
3504         E1000_WRITE_FLUSH(hw);
3505         mdelay(10);
3506
3507         E1000_WRITE_REG(hw, E1000_TDLEN(reg_idx),
3508                         ring->count * sizeof(union e1000_adv_tx_desc));
3509         E1000_WRITE_REG(hw, E1000_TDBAL(reg_idx),
3510                         tdba & 0x00000000ffffffffULL);
3511         E1000_WRITE_REG(hw, E1000_TDBAH(reg_idx), tdba >> 32);
3512
3513         ring->tail = hw->hw_addr + E1000_TDT(reg_idx);
3514         E1000_WRITE_REG(hw, E1000_TDH(reg_idx), 0);
3515         writel(0, ring->tail);
3516
3517         txdctl |= IGB_TX_PTHRESH;
3518         txdctl |= IGB_TX_HTHRESH << 8;
3519         txdctl |= igb_tx_wthresh(adapter) << 16;
3520
3521         txdctl |= E1000_TXDCTL_QUEUE_ENABLE;
3522         E1000_WRITE_REG(hw, E1000_TXDCTL(reg_idx), txdctl);
3523 }
3524
3525 /**
3526  * igb_configure_tx - Configure transmit Unit after Reset
3527  * @adapter: board private structure
3528  *
3529  * Configure the Tx unit of the MAC after a reset.
3530  **/
3531 static void igb_configure_tx(struct igb_adapter *adapter)
3532 {
3533         int i;
3534
3535         for (i = 0; i < adapter->num_tx_queues; i++)
3536                 igb_configure_tx_ring(adapter, adapter->tx_ring[i]);
3537 }
3538
3539 /**
3540  * igb_setup_rx_resources - allocate Rx resources (Descriptors)
3541  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
3542  *
3543  * Returns 0 on success, negative on failure
3544  **/
3545 int igb_setup_rx_resources(struct igb_ring *rx_ring)
3546 {
3547         struct device *dev = rx_ring->dev;
3548         int size, desc_len;
3549
3550         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
3551         rx_ring->rx_buffer_info = vzalloc(size);
3552         if (!rx_ring->rx_buffer_info)
3553                 goto err;
3554
3555         desc_len = sizeof(union e1000_adv_rx_desc);
3556
3557         /* Round up to nearest 4K */
3558         rx_ring->size = rx_ring->count * desc_len;
3559         rx_ring->size = ALIGN(rx_ring->size, 4096);
3560
3561         rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
3562                                            &rx_ring->dma, GFP_KERNEL);
3563
3564         if (!rx_ring->desc)
3565                 goto err;
3566
3567         rx_ring->next_to_alloc = 0;
3568         rx_ring->next_to_clean = 0;
3569         rx_ring->next_to_use = 0;
3570
3571         return 0;
3572
3573 err:
3574         vfree(rx_ring->rx_buffer_info);
3575         rx_ring->rx_buffer_info = NULL;
3576         dev_err(dev, "Unable to allocate memory for the receive descriptor"
3577                 " ring\n");
3578         return -ENOMEM;
3579 }
3580
3581 /**
3582  * igb_setup_all_rx_resources - wrapper to allocate Rx resources
3583  *                                (Descriptors) for all queues
3584  * @adapter: board private structure
3585  *
3586  * Return 0 on success, negative on failure
3587  **/
3588 static int igb_setup_all_rx_resources(struct igb_adapter *adapter)
3589 {
3590         struct pci_dev *pdev = adapter->pdev;
3591         int i, err = 0;
3592
3593         for (i = 0; i < adapter->num_rx_queues; i++) {
3594                 err = igb_setup_rx_resources(adapter->rx_ring[i]);
3595                 if (err) {
3596                         dev_err(pci_dev_to_dev(pdev),
3597                                 "Allocation for Rx Queue %u failed\n", i);
3598                         for (i--; i >= 0; i--)
3599                                 igb_free_rx_resources(adapter->rx_ring[i]);
3600                         break;
3601                 }
3602         }
3603
3604         return err;
3605 }
3606
3607 /**
3608  * igb_setup_mrqc - configure the multiple receive queue control registers
3609  * @adapter: Board private structure
3610  **/
3611 static void igb_setup_mrqc(struct igb_adapter *adapter)
3612 {
3613         struct e1000_hw *hw = &adapter->hw;
3614         u32 mrqc, rxcsum;
3615         u32 j, num_rx_queues, shift = 0, shift2 = 0;
3616         static const u32 rsskey[10] = { 0xDA565A6D, 0xC20E5B25, 0x3D256741,
3617                                         0xB08FA343, 0xCB2BCAD0, 0xB4307BAE,
3618                                         0xA32DCB77, 0x0CF23080, 0x3BB7426A,
3619                                         0xFA01ACBE };
3620
3621         /* Fill out hash function seeds */
3622         for (j = 0; j < 10; j++)
3623                 E1000_WRITE_REG(hw, E1000_RSSRK(j), rsskey[j]);
3624
3625         num_rx_queues = adapter->rss_queues;
3626
3627         /* 82575 and 82576 supports 2 RSS queues for VMDq */
3628         switch (hw->mac.type) {
3629         case e1000_82575:
3630                 if (adapter->vmdq_pools) {
3631                         shift = 2;
3632                         shift2 = 6;
3633                         break;
3634                 }
3635                 shift = 6;
3636                 break;
3637         case e1000_82576:
3638                 /* 82576 supports 2 RSS queues for SR-IOV */
3639                 if (adapter->vfs_allocated_count || adapter->vmdq_pools) {
3640                         shift = 3;
3641                         num_rx_queues = 2;
3642                 }
3643                 break;
3644         default:
3645                 break;
3646         }
3647
3648         /*
3649          * Populate the redirection table 4 entries at a time.  To do this
3650          * we are generating the results for n and n+2 and then interleaving
3651          * those with the results with n+1 and n+3.
3652          */
3653         for (j = 0; j < 32; j++) {
3654                 /* first pass generates n and n+2 */
3655                 u32 base = ((j * 0x00040004) + 0x00020000) * num_rx_queues;
3656                 u32 reta = (base & 0x07800780) >> (7 - shift);
3657
3658                 /* second pass generates n+1 and n+3 */
3659                 base += 0x00010001 * num_rx_queues;
3660                 reta |= (base & 0x07800780) << (1 + shift);
3661
3662                 /* generate 2nd table for 82575 based parts */
3663                 if (shift2)
3664                         reta |= (0x01010101 * num_rx_queues) << shift2;
3665
3666                 E1000_WRITE_REG(hw, E1000_RETA(j), reta);
3667         }
3668
3669         /*
3670          * Disable raw packet checksumming so that RSS hash is placed in
3671          * descriptor on writeback.  No need to enable TCP/UDP/IP checksum
3672          * offloads as they are enabled by default
3673          */
3674         rxcsum = E1000_READ_REG(hw, E1000_RXCSUM);
3675         rxcsum |= E1000_RXCSUM_PCSD;
3676
3677         if (adapter->hw.mac.type >= e1000_82576)
3678                 /* Enable Receive Checksum Offload for SCTP */
3679                 rxcsum |= E1000_RXCSUM_CRCOFL;
3680
3681         /* Don't need to set TUOFL or IPOFL, they default to 1 */
3682         E1000_WRITE_REG(hw, E1000_RXCSUM, rxcsum);
3683
3684         /* Generate RSS hash based on packet types, TCP/UDP
3685          * port numbers and/or IPv4/v6 src and dst addresses
3686          */
3687         mrqc = E1000_MRQC_RSS_FIELD_IPV4 |
3688                E1000_MRQC_RSS_FIELD_IPV4_TCP |
3689                E1000_MRQC_RSS_FIELD_IPV6 |
3690                E1000_MRQC_RSS_FIELD_IPV6_TCP |
3691                E1000_MRQC_RSS_FIELD_IPV6_TCP_EX;
3692
3693         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV4_UDP)
3694                 mrqc |= E1000_MRQC_RSS_FIELD_IPV4_UDP;
3695         if (adapter->flags & IGB_FLAG_RSS_FIELD_IPV6_UDP)
3696                 mrqc |= E1000_MRQC_RSS_FIELD_IPV6_UDP;
3697
3698         /* If VMDq is enabled then we set the appropriate mode for that, else
3699          * we default to RSS so that an RSS hash is calculated per packet even
3700          * if we are only using one queue */
3701         if (adapter->vfs_allocated_count || adapter->vmdq_pools) {
3702                 if (hw->mac.type > e1000_82575) {
3703                         /* Set the default pool for the PF's first queue */
3704                         u32 vtctl = E1000_READ_REG(hw, E1000_VT_CTL);
3705                         vtctl &= ~(E1000_VT_CTL_DEFAULT_POOL_MASK |
3706                                    E1000_VT_CTL_DISABLE_DEF_POOL);
3707                         vtctl |= adapter->vfs_allocated_count <<
3708                                 E1000_VT_CTL_DEFAULT_POOL_SHIFT;
3709                         E1000_WRITE_REG(hw, E1000_VT_CTL, vtctl);
3710                 } else if (adapter->rss_queues > 1) {
3711                         /* set default queue for pool 1 to queue 2 */
3712                         E1000_WRITE_REG(hw, E1000_VT_CTL,
3713                                         adapter->rss_queues << 7);
3714                 }
3715                 if (adapter->rss_queues > 1)
3716                         mrqc |= E1000_MRQC_ENABLE_VMDQ_RSS_2Q;
3717                 else
3718                         mrqc |= E1000_MRQC_ENABLE_VMDQ;
3719         } else {
3720                 mrqc |= E1000_MRQC_ENABLE_RSS_4Q;
3721         }
3722         igb_vmm_control(adapter);
3723
3724         E1000_WRITE_REG(hw, E1000_MRQC, mrqc);
3725 }
3726
3727 /**
3728  * igb_setup_rctl - configure the receive control registers
3729  * @adapter: Board private structure
3730  **/
3731 void igb_setup_rctl(struct igb_adapter *adapter)
3732 {
3733         struct e1000_hw *hw = &adapter->hw;
3734         u32 rctl;
3735
3736         rctl = E1000_READ_REG(hw, E1000_RCTL);
3737
3738         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3739         rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
3740
3741         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_RDMTS_HALF |
3742                 (hw->mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3743
3744         /*
3745          * enable stripping of CRC. It's unlikely this will break BMC
3746          * redirection as it did with e1000. Newer features require
3747          * that the HW strips the CRC.
3748          */
3749         rctl |= E1000_RCTL_SECRC;
3750
3751         /* disable store bad packets and clear size bits. */
3752         rctl &= ~(E1000_RCTL_SBP | E1000_RCTL_SZ_256);
3753
3754         /* enable LPE to prevent packets larger than max_frame_size */
3755         rctl |= E1000_RCTL_LPE;
3756
3757         /* disable queue 0 to prevent tail write w/o re-config */
3758         E1000_WRITE_REG(hw, E1000_RXDCTL(0), 0);
3759
3760         /* Attention!!!  For SR-IOV PF driver operations you must enable
3761          * queue drop for all VF and PF queues to prevent head of line blocking
3762          * if an un-trusted VF does not provide descriptors to hardware.
3763          */
3764         if (adapter->vfs_allocated_count) {
3765                 /* set all queue drop enable bits */
3766                 E1000_WRITE_REG(hw, E1000_QDE, ALL_QUEUES);
3767         }
3768
3769         E1000_WRITE_REG(hw, E1000_RCTL, rctl);
3770 }
3771
3772 static inline int igb_set_vf_rlpml(struct igb_adapter *adapter, int size,
3773                                    int vfn)
3774 {
3775         struct e1000_hw *hw = &adapter->hw;
3776         u32 vmolr;
3777
3778         /* if it isn't the PF check to see if VFs are enabled and
3779          * increase the size to support vlan tags */
3780         if (vfn < adapter->vfs_allocated_count &&
3781             adapter->vf_data[vfn].vlans_enabled)
3782                 size += VLAN_HLEN;
3783
3784 #ifdef CONFIG_IGB_VMDQ_NETDEV
3785         if (vfn >= adapter->vfs_allocated_count) {
3786                 int queue = vfn - adapter->vfs_allocated_count;
3787                 struct igb_vmdq_adapter *vadapter;
3788
3789                 vadapter = netdev_priv(adapter->vmdq_netdev[queue-1]);
3790                 if (vadapter->vlgrp)
3791                         size += VLAN_HLEN;
3792         }
3793 #endif
3794         vmolr = E1000_READ_REG(hw, E1000_VMOLR(vfn));
3795         vmolr &= ~E1000_VMOLR_RLPML_MASK;
3796         vmolr |= size | E1000_VMOLR_LPE;
3797         E1000_WRITE_REG(hw, E1000_VMOLR(vfn), vmolr);
3798
3799         return 0;
3800 }
3801
3802 /**
3803  * igb_rlpml_set - set maximum receive packet size
3804  * @adapter: board private structure
3805  *
3806  * Configure maximum receivable packet size.
3807  **/
3808 static void igb_rlpml_set(struct igb_adapter *adapter)
3809 {
3810         u32 max_frame_size = adapter->max_frame_size;
3811         struct e1000_hw *hw = &adapter->hw;
3812         u16 pf_id = adapter->vfs_allocated_count;
3813
3814         if (adapter->vmdq_pools && hw->mac.type != e1000_82575) {
3815                 int i;
3816                 for (i = 0; i < adapter->vmdq_pools; i++)
3817                         igb_set_vf_rlpml(adapter, max_frame_size, pf_id + i);
3818                 /*
3819                  * If we're in VMDQ or SR-IOV mode, then set global RLPML
3820                  * to our max jumbo frame size, in case we need to enable
3821                  * jumbo frames on one of the rings later.
3822                  * This will not pass over-length frames into the default
3823                  * queue because it's gated by the VMOLR.RLPML.
3824                  */
3825                 max_frame_size = MAX_JUMBO_FRAME_SIZE;
3826         }
3827         /* Set VF RLPML for the PF device. */
3828         if (adapter->vfs_allocated_count)
3829                 igb_set_vf_rlpml(adapter, max_frame_size, pf_id);
3830
3831         E1000_WRITE_REG(hw, E1000_RLPML, max_frame_size);
3832 }
3833
3834 static inline void igb_set_vf_vlan_strip(struct igb_adapter *adapter,
3835                                         int vfn, bool enable)
3836 {
3837         struct e1000_hw *hw = &adapter->hw;
3838         u32 val;
3839         void __iomem *reg;
3840
3841         if (hw->mac.type < e1000_82576)
3842                 return;
3843
3844         if (hw->mac.type == e1000_i350)
3845                 reg = hw->hw_addr + E1000_DVMOLR(vfn);
3846         else
3847                 reg = hw->hw_addr + E1000_VMOLR(vfn);
3848
3849         val = readl(reg);
3850         if (enable)
3851                 val |= E1000_VMOLR_STRVLAN;
3852         else
3853                 val &= ~(E1000_VMOLR_STRVLAN);
3854         writel(val, reg);
3855 }
3856 static inline void igb_set_vmolr(struct igb_adapter *adapter,
3857                                  int vfn, bool aupe)
3858 {
3859         struct e1000_hw *hw = &adapter->hw;
3860         u32 vmolr;
3861
3862         /*
3863          * This register exists only on 82576 and newer so if we are older then
3864          * we should exit and do nothing
3865          */
3866         if (hw->mac.type < e1000_82576)
3867                 return;
3868
3869         vmolr = E1000_READ_REG(hw, E1000_VMOLR(vfn));
3870
3871         if (aupe)
3872                 vmolr |= E1000_VMOLR_AUPE;        /* Accept untagged packets */
3873         else
3874                 vmolr &= ~(E1000_VMOLR_AUPE); /* Tagged packets ONLY */
3875
3876         /* clear all bits that might not be set */
3877         vmolr &= ~E1000_VMOLR_RSSE;
3878
3879         if (adapter->rss_queues > 1 && vfn == adapter->vfs_allocated_count)
3880                 vmolr |= E1000_VMOLR_RSSE; /* enable RSS */
3881
3882         vmolr |= E1000_VMOLR_BAM;          /* Accept broadcast */
3883         vmolr |= E1000_VMOLR_LPE;          /* Accept long packets */
3884
3885         E1000_WRITE_REG(hw, E1000_VMOLR(vfn), vmolr);
3886 }
3887
3888 /**
3889  * igb_configure_rx_ring - Configure a receive ring after Reset
3890  * @adapter: board private structure
3891  * @ring: receive ring to be configured
3892  *
3893  * Configure the Rx unit of the MAC after a reset.
3894  **/
3895 void igb_configure_rx_ring(struct igb_adapter *adapter,
3896                            struct igb_ring *ring)
3897 {
3898         struct e1000_hw *hw = &adapter->hw;
3899         u64 rdba = ring->dma;
3900         int reg_idx = ring->reg_idx;
3901         u32 srrctl = 0, rxdctl = 0;
3902
3903 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
3904         /*
3905          * RLPML prevents us from receiving a frame larger than max_frame so
3906          * it is safe to just set the rx_buffer_len to max_frame without the
3907          * risk of an skb over panic.
3908          */
3909         ring->rx_buffer_len = max_t(u32, adapter->max_frame_size,
3910                                     MAXIMUM_ETHERNET_VLAN_SIZE);
3911
3912 #endif
3913         /* disable the queue */
3914         E1000_WRITE_REG(hw, E1000_RXDCTL(reg_idx), 0);
3915
3916         /* Set DMA base address registers */
3917         E1000_WRITE_REG(hw, E1000_RDBAL(reg_idx),
3918                         rdba & 0x00000000ffffffffULL);
3919         E1000_WRITE_REG(hw, E1000_RDBAH(reg_idx), rdba >> 32);
3920         E1000_WRITE_REG(hw, E1000_RDLEN(reg_idx),
3921                        ring->count * sizeof(union e1000_adv_rx_desc));
3922
3923         /* initialize head and tail */
3924         ring->tail = hw->hw_addr + E1000_RDT(reg_idx);
3925         E1000_WRITE_REG(hw, E1000_RDH(reg_idx), 0);
3926         writel(0, ring->tail);
3927
3928         /* reset next-to- use/clean to place SW in sync with hardwdare */
3929         ring->next_to_clean = 0;
3930         ring->next_to_use = 0;
3931 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
3932         ring->next_to_alloc = 0;
3933
3934 #endif
3935         /* set descriptor configuration */
3936 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
3937         srrctl = IGB_RX_HDR_LEN << E1000_SRRCTL_BSIZEHDRSIZE_SHIFT;
3938         srrctl |= IGB_RX_BUFSZ >> E1000_SRRCTL_BSIZEPKT_SHIFT;
3939 #else /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
3940         srrctl = ALIGN(ring->rx_buffer_len, 1024) >>
3941                  E1000_SRRCTL_BSIZEPKT_SHIFT;
3942 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
3943         srrctl |= E1000_SRRCTL_DESCTYPE_ADV_ONEBUF;
3944 #ifdef HAVE_PTP_1588_CLOCK
3945         if (hw->mac.type >= e1000_82580)
3946                 srrctl |= E1000_SRRCTL_TIMESTAMP;
3947 #endif /* HAVE_PTP_1588_CLOCK */
3948         /*
3949          * We should set the drop enable bit if:
3950          *  SR-IOV is enabled
3951          *   or
3952          *  Flow Control is disabled and number of RX queues > 1
3953          *
3954          *  This allows us to avoid head of line blocking for security
3955          *  and performance reasons.
3956          */
3957         if (adapter->vfs_allocated_count ||
3958             (adapter->num_rx_queues > 1 &&
3959              (hw->fc.requested_mode == e1000_fc_none ||
3960               hw->fc.requested_mode == e1000_fc_rx_pause)))
3961                 srrctl |= E1000_SRRCTL_DROP_EN;
3962
3963         E1000_WRITE_REG(hw, E1000_SRRCTL(reg_idx), srrctl);
3964
3965         /* set filtering for VMDQ pools */
3966         igb_set_vmolr(adapter, reg_idx & 0x7, true);
3967
3968         rxdctl |= IGB_RX_PTHRESH;
3969         rxdctl |= IGB_RX_HTHRESH << 8;
3970         rxdctl |= IGB_RX_WTHRESH << 16;
3971
3972         /* enable receive descriptor fetching */
3973         rxdctl |= E1000_RXDCTL_QUEUE_ENABLE;
3974         E1000_WRITE_REG(hw, E1000_RXDCTL(reg_idx), rxdctl);
3975 }
3976
3977 /**
3978  * igb_configure_rx - Configure receive Unit after Reset
3979  * @adapter: board private structure
3980  *
3981  * Configure the Rx unit of the MAC after a reset.
3982  **/
3983 static void igb_configure_rx(struct igb_adapter *adapter)
3984 {
3985         int i;
3986
3987         /* set UTA to appropriate mode */
3988         igb_set_uta(adapter);
3989
3990         igb_full_sync_mac_table(adapter);
3991         /* Setup the HW Rx Head and Tail Descriptor Pointers and
3992          * the Base and Length of the Rx Descriptor Ring */
3993         for (i = 0; i < adapter->num_rx_queues; i++)
3994                 igb_configure_rx_ring(adapter, adapter->rx_ring[i]);
3995 }
3996
3997 /**
3998  * igb_free_tx_resources - Free Tx Resources per Queue
3999  * @tx_ring: Tx descriptor ring for a specific queue
4000  *
4001  * Free all transmit software resources
4002  **/
4003 void igb_free_tx_resources(struct igb_ring *tx_ring)
4004 {
4005         igb_clean_tx_ring(tx_ring);
4006
4007         vfree(tx_ring->tx_buffer_info);
4008         tx_ring->tx_buffer_info = NULL;
4009
4010         /* if not set, then don't free */
4011         if (!tx_ring->desc)
4012                 return;
4013
4014         dma_free_coherent(tx_ring->dev, tx_ring->size,
4015                           tx_ring->desc, tx_ring->dma);
4016
4017         tx_ring->desc = NULL;
4018 }
4019
4020 /**
4021  * igb_free_all_tx_resources - Free Tx Resources for All Queues
4022  * @adapter: board private structure
4023  *
4024  * Free all transmit software resources
4025  **/
4026 static void igb_free_all_tx_resources(struct igb_adapter *adapter)
4027 {
4028         int i;
4029
4030         for (i = 0; i < adapter->num_tx_queues; i++)
4031                 igb_free_tx_resources(adapter->tx_ring[i]);
4032 }
4033
4034 void igb_unmap_and_free_tx_resource(struct igb_ring *ring,
4035                                     struct igb_tx_buffer *tx_buffer)
4036 {
4037         if (tx_buffer->skb) {
4038                 dev_kfree_skb_any(tx_buffer->skb);
4039                 if (dma_unmap_len(tx_buffer, len))
4040                         dma_unmap_single(ring->dev,
4041                                          dma_unmap_addr(tx_buffer, dma),
4042                                          dma_unmap_len(tx_buffer, len),
4043                                          DMA_TO_DEVICE);
4044         } else if (dma_unmap_len(tx_buffer, len)) {
4045                 dma_unmap_page(ring->dev,
4046                                dma_unmap_addr(tx_buffer, dma),
4047                                dma_unmap_len(tx_buffer, len),
4048                                DMA_TO_DEVICE);
4049         }
4050         tx_buffer->next_to_watch = NULL;
4051         tx_buffer->skb = NULL;
4052         dma_unmap_len_set(tx_buffer, len, 0);
4053         /* buffer_info must be completely set up in the transmit path */
4054 }
4055
4056 /**
4057  * igb_clean_tx_ring - Free Tx Buffers
4058  * @tx_ring: ring to be cleaned
4059  **/
4060 static void igb_clean_tx_ring(struct igb_ring *tx_ring)
4061 {
4062         struct igb_tx_buffer *buffer_info;
4063         unsigned long size;
4064         u16 i;
4065
4066         if (!tx_ring->tx_buffer_info)
4067                 return;
4068         /* Free all the Tx ring sk_buffs */
4069
4070         for (i = 0; i < tx_ring->count; i++) {
4071                 buffer_info = &tx_ring->tx_buffer_info[i];
4072                 igb_unmap_and_free_tx_resource(tx_ring, buffer_info);
4073         }
4074
4075         netdev_tx_reset_queue(txring_txq(tx_ring));
4076
4077         size = sizeof(struct igb_tx_buffer) * tx_ring->count;
4078         memset(tx_ring->tx_buffer_info, 0, size);
4079
4080         /* Zero out the descriptor ring */
4081         memset(tx_ring->desc, 0, tx_ring->size);
4082
4083         tx_ring->next_to_use = 0;
4084         tx_ring->next_to_clean = 0;
4085 }
4086
4087 /**
4088  * igb_clean_all_tx_rings - Free Tx Buffers for all queues
4089  * @adapter: board private structure
4090  **/
4091 static void igb_clean_all_tx_rings(struct igb_adapter *adapter)
4092 {
4093         int i;
4094
4095         for (i = 0; i < adapter->num_tx_queues; i++)
4096                 igb_clean_tx_ring(adapter->tx_ring[i]);
4097 }
4098
4099 /**
4100  * igb_free_rx_resources - Free Rx Resources
4101  * @rx_ring: ring to clean the resources from
4102  *
4103  * Free all receive software resources
4104  **/
4105 void igb_free_rx_resources(struct igb_ring *rx_ring)
4106 {
4107         igb_clean_rx_ring(rx_ring);
4108
4109         vfree(rx_ring->rx_buffer_info);
4110         rx_ring->rx_buffer_info = NULL;
4111
4112         /* if not set, then don't free */
4113         if (!rx_ring->desc)
4114                 return;
4115
4116         dma_free_coherent(rx_ring->dev, rx_ring->size,
4117                           rx_ring->desc, rx_ring->dma);
4118
4119         rx_ring->desc = NULL;
4120 }
4121
4122 /**
4123  * igb_free_all_rx_resources - Free Rx Resources for All Queues
4124  * @adapter: board private structure
4125  *
4126  * Free all receive software resources
4127  **/
4128 static void igb_free_all_rx_resources(struct igb_adapter *adapter)
4129 {
4130         int i;
4131
4132         for (i = 0; i < adapter->num_rx_queues; i++)
4133                 igb_free_rx_resources(adapter->rx_ring[i]);
4134 }
4135
4136 /**
4137  * igb_clean_rx_ring - Free Rx Buffers per Queue
4138  * @rx_ring: ring to free buffers from
4139  **/
4140 void igb_clean_rx_ring(struct igb_ring *rx_ring)
4141 {
4142         unsigned long size;
4143         u16 i;
4144
4145         if (!rx_ring->rx_buffer_info)
4146                 return;
4147
4148 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
4149         if (rx_ring->skb)
4150                 dev_kfree_skb(rx_ring->skb);
4151         rx_ring->skb = NULL;
4152
4153 #endif
4154         /* Free all the Rx ring sk_buffs */
4155         for (i = 0; i < rx_ring->count; i++) {
4156                 struct igb_rx_buffer *buffer_info = &rx_ring->rx_buffer_info[i];
4157 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
4158                 if (buffer_info->dma) {
4159                         dma_unmap_single(rx_ring->dev,
4160                                          buffer_info->dma,
4161                                          rx_ring->rx_buffer_len,
4162                                          DMA_FROM_DEVICE);
4163                         buffer_info->dma = 0;
4164                 }
4165
4166                 if (buffer_info->skb) {
4167                         dev_kfree_skb(buffer_info->skb);
4168                         buffer_info->skb = NULL;
4169                 }
4170 #else
4171                 if (!buffer_info->page)
4172                         continue;
4173
4174                 dma_unmap_page(rx_ring->dev,
4175                                buffer_info->dma,
4176                                PAGE_SIZE,
4177                                DMA_FROM_DEVICE);
4178                 __free_page(buffer_info->page);
4179
4180                 buffer_info->page = NULL;
4181 #endif
4182         }
4183
4184         size = sizeof(struct igb_rx_buffer) * rx_ring->count;
4185         memset(rx_ring->rx_buffer_info, 0, size);
4186
4187         /* Zero out the descriptor ring */
4188         memset(rx_ring->desc, 0, rx_ring->size);
4189
4190         rx_ring->next_to_alloc = 0;
4191         rx_ring->next_to_clean = 0;
4192         rx_ring->next_to_use = 0;
4193 }
4194
4195 /**
4196  * igb_clean_all_rx_rings - Free Rx Buffers for all queues
4197  * @adapter: board private structure
4198  **/
4199 static void igb_clean_all_rx_rings(struct igb_adapter *adapter)
4200 {
4201         int i;
4202
4203         for (i = 0; i < adapter->num_rx_queues; i++)
4204                 igb_clean_rx_ring(adapter->rx_ring[i]);
4205 }
4206
4207 /**
4208  * igb_set_mac - Change the Ethernet Address of the NIC
4209  * @netdev: network interface device structure
4210  * @p: pointer to an address structure
4211  *
4212  * Returns 0 on success, negative on failure
4213  **/
4214 static int igb_set_mac(struct net_device *netdev, void *p)
4215 {
4216         struct igb_adapter *adapter = netdev_priv(netdev);
4217         struct e1000_hw *hw = &adapter->hw;
4218         struct sockaddr *addr = p;
4219
4220         if (!is_valid_ether_addr(addr->sa_data))
4221                 return -EADDRNOTAVAIL;
4222
4223         igb_del_mac_filter(adapter, hw->mac.addr,
4224                            adapter->vfs_allocated_count);
4225         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4226         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
4227
4228         /* set the correct pool for the new PF MAC address in entry 0 */
4229         return igb_add_mac_filter(adapter, hw->mac.addr,
4230                            adapter->vfs_allocated_count);
4231 }
4232
4233 /**
4234  * igb_write_mc_addr_list - write multicast addresses to MTA
4235  * @netdev: network interface device structure
4236  *
4237  * Writes multicast address list to the MTA hash table.
4238  * Returns: -ENOMEM on failure
4239  *                0 on no addresses written
4240  *                X on writing X addresses to MTA
4241  **/
4242 int igb_write_mc_addr_list(struct net_device *netdev)
4243 {
4244         struct igb_adapter *adapter = netdev_priv(netdev);
4245         struct e1000_hw *hw = &adapter->hw;
4246 #ifdef NETDEV_HW_ADDR_T_MULTICAST
4247         struct netdev_hw_addr *ha;
4248 #else
4249         struct dev_mc_list *ha;
4250 #endif
4251         u8  *mta_list;
4252         int i, count;
4253 #ifdef CONFIG_IGB_VMDQ_NETDEV
4254         int vm;
4255 #endif
4256         count = netdev_mc_count(netdev);
4257 #ifdef CONFIG_IGB_VMDQ_NETDEV
4258         for (vm = 1; vm < adapter->vmdq_pools; vm++) {
4259                 if (!adapter->vmdq_netdev[vm])
4260                         break;
4261                 if (!netif_running(adapter->vmdq_netdev[vm]))
4262                         continue;
4263                 count += netdev_mc_count(adapter->vmdq_netdev[vm]);
4264         }
4265 #endif
4266
4267         if (!count) {
4268                 e1000_update_mc_addr_list(hw, NULL, 0);
4269                 return 0;
4270         }
4271         mta_list = kzalloc(count * 6, GFP_ATOMIC);
4272         if (!mta_list)
4273                 return -ENOMEM;
4274
4275         /* The shared function expects a packed array of only addresses. */
4276         i = 0;
4277         netdev_for_each_mc_addr(ha, netdev)
4278 #ifdef NETDEV_HW_ADDR_T_MULTICAST
4279                 memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
4280 #else
4281                 memcpy(mta_list + (i++ * ETH_ALEN), ha->dmi_addr, ETH_ALEN);
4282 #endif
4283 #ifdef CONFIG_IGB_VMDQ_NETDEV
4284         for (vm = 1; vm < adapter->vmdq_pools; vm++) {
4285                 if (!adapter->vmdq_netdev[vm])
4286                         break;
4287                 if (!netif_running(adapter->vmdq_netdev[vm]) ||
4288                     !netdev_mc_count(adapter->vmdq_netdev[vm]))
4289                         continue;
4290                 netdev_for_each_mc_addr(ha, adapter->vmdq_netdev[vm])
4291 #ifdef NETDEV_HW_ADDR_T_MULTICAST
4292                         memcpy(mta_list + (i++ * ETH_ALEN),
4293                                ha->addr, ETH_ALEN);
4294 #else
4295                         memcpy(mta_list + (i++ * ETH_ALEN),
4296                                ha->dmi_addr, ETH_ALEN);
4297 #endif
4298         }
4299 #endif
4300         e1000_update_mc_addr_list(hw, mta_list, i);
4301         kfree(mta_list);
4302
4303         return count;
4304 }
4305
4306 void igb_rar_set(struct igb_adapter *adapter, u32 index)
4307 {
4308         u32 rar_low, rar_high;
4309         struct e1000_hw *hw = &adapter->hw;
4310         u8 *addr = adapter->mac_table[index].addr;
4311         /* HW expects these in little endian so we reverse the byte order
4312          * from network order (big endian) to little endian
4313          */
4314         rar_low = ((u32) addr[0] | ((u32) addr[1] << 8) |
4315                   ((u32) addr[2] << 16) | ((u32) addr[3] << 24));
4316         rar_high = ((u32) addr[4] | ((u32) addr[5] << 8));
4317
4318         /* Indicate to hardware the Address is Valid. */
4319         if (adapter->mac_table[index].state & IGB_MAC_STATE_IN_USE)
4320                 rar_high |= E1000_RAH_AV;
4321
4322         if (hw->mac.type == e1000_82575)
4323                 rar_high |= E1000_RAH_POOL_1 * adapter->mac_table[index].queue;
4324         else
4325                 rar_high |= E1000_RAH_POOL_1 << adapter->mac_table[index].queue;
4326
4327         E1000_WRITE_REG(hw, E1000_RAL(index), rar_low);
4328         E1000_WRITE_FLUSH(hw);
4329         E1000_WRITE_REG(hw, E1000_RAH(index), rar_high);
4330         E1000_WRITE_FLUSH(hw);
4331 }
4332
4333 void igb_full_sync_mac_table(struct igb_adapter *adapter)
4334 {
4335         struct e1000_hw *hw = &adapter->hw;
4336         int i;
4337         for (i = 0; i < hw->mac.rar_entry_count; i++) {
4338                         igb_rar_set(adapter, i);
4339         }
4340 }
4341
4342 void igb_sync_mac_table(struct igb_adapter *adapter)
4343 {
4344         struct e1000_hw *hw = &adapter->hw;
4345         int i;
4346         for (i = 0; i < hw->mac.rar_entry_count; i++) {
4347                 if (adapter->mac_table[i].state & IGB_MAC_STATE_MODIFIED)
4348                         igb_rar_set(adapter, i);
4349                 adapter->mac_table[i].state &= ~(IGB_MAC_STATE_MODIFIED);
4350         }
4351 }
4352
4353 int igb_available_rars(struct igb_adapter *adapter)
4354 {
4355         struct e1000_hw *hw = &adapter->hw;
4356         int i, count = 0;
4357
4358         for (i = 0; i < hw->mac.rar_entry_count; i++) {
4359                 if (adapter->mac_table[i].state == 0)
4360                         count++;
4361         }
4362         return count;
4363 }
4364
4365 #ifdef HAVE_SET_RX_MODE
4366 /**
4367  * igb_write_uc_addr_list - write unicast addresses to RAR table
4368  * @netdev: network interface device structure
4369  *
4370  * Writes unicast address list to the RAR table.
4371  * Returns: -ENOMEM on failure/insufficient address space
4372  *                0 on no addresses written
4373  *                X on writing X addresses to the RAR table
4374  **/
4375 static int igb_write_uc_addr_list(struct net_device *netdev)
4376 {
4377         struct igb_adapter *adapter = netdev_priv(netdev);
4378         unsigned int vfn = adapter->vfs_allocated_count;
4379         int count = 0;
4380
4381         /* return ENOMEM indicating insufficient memory for addresses */
4382         if (netdev_uc_count(netdev) > igb_available_rars(adapter))
4383                 return -ENOMEM;
4384         if (!netdev_uc_empty(netdev)) {
4385 #ifdef NETDEV_HW_ADDR_T_UNICAST
4386                 struct netdev_hw_addr *ha;
4387 #else
4388                 struct dev_mc_list *ha;
4389 #endif
4390                 netdev_for_each_uc_addr(ha, netdev) {
4391 #ifdef NETDEV_HW_ADDR_T_UNICAST
4392                         igb_del_mac_filter(adapter, ha->addr, vfn);
4393                         igb_add_mac_filter(adapter, ha->addr, vfn);
4394 #else
4395                         igb_del_mac_filter(adapter, ha->da_addr, vfn);
4396                         igb_add_mac_filter(adapter, ha->da_addr, vfn);
4397 #endif
4398                         count++;
4399                 }
4400         }
4401         return count;
4402 }
4403
4404 #endif /* HAVE_SET_RX_MODE */
4405 /**
4406  * igb_set_rx_mode - Secondary Unicast, Multicast and Promiscuous mode set
4407  * @netdev: network interface device structure
4408  *
4409  * The set_rx_mode entry point is called whenever the unicast or multicast
4410  * address lists or the network interface flags are updated.  This routine is
4411  * responsible for configuring the hardware for proper unicast, multicast,
4412  * promiscuous mode, and all-multi behavior.
4413  **/
4414 static void igb_set_rx_mode(struct net_device *netdev)
4415 {
4416         struct igb_adapter *adapter = netdev_priv(netdev);
4417         struct e1000_hw *hw = &adapter->hw;
4418         unsigned int vfn = adapter->vfs_allocated_count;
4419         u32 rctl, vmolr = 0;
4420         int count;
4421
4422         /* Check for Promiscuous and All Multicast modes */
4423         rctl = E1000_READ_REG(hw, E1000_RCTL);
4424
4425         /* clear the effected bits */
4426         rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE | E1000_RCTL_VFE);
4427
4428         if (netdev->flags & IFF_PROMISC) {
4429                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
4430                 vmolr |= (E1000_VMOLR_ROPE | E1000_VMOLR_MPME);
4431                 /* retain VLAN HW filtering if in VT mode */
4432                 if (adapter->vfs_allocated_count || adapter->vmdq_pools)
4433                         rctl |= E1000_RCTL_VFE;
4434         } else {
4435                 if (netdev->flags & IFF_ALLMULTI) {
4436                         rctl |= E1000_RCTL_MPE;
4437                         vmolr |= E1000_VMOLR_MPME;
4438                 } else {
4439                         /*
4440                          * Write addresses to the MTA, if the attempt fails
4441                          * then we should just turn on promiscuous mode so
4442                          * that we can at least receive multicast traffic
4443                          */
4444                         count = igb_write_mc_addr_list(netdev);
4445                         if (count < 0) {
4446                                 rctl |= E1000_RCTL_MPE;
4447                                 vmolr |= E1000_VMOLR_MPME;
4448                         } else if (count) {
4449                                 vmolr |= E1000_VMOLR_ROMPE;
4450                         }
4451                 }
4452 #ifdef HAVE_SET_RX_MODE
4453                 /*
4454                  * Write addresses to available RAR registers, if there is not
4455                  * sufficient space to store all the addresses then enable
4456                  * unicast promiscuous mode
4457                  */
4458                 count = igb_write_uc_addr_list(netdev);
4459                 if (count < 0) {
4460                         rctl |= E1000_RCTL_UPE;
4461                         vmolr |= E1000_VMOLR_ROPE;
4462                 }
4463 #endif /* HAVE_SET_RX_MODE */
4464                 rctl |= E1000_RCTL_VFE;
4465         }
4466         E1000_WRITE_REG(hw, E1000_RCTL, rctl);
4467
4468         /*
4469          * In order to support SR-IOV and eventually VMDq it is necessary to set
4470          * the VMOLR to enable the appropriate modes.  Without this workaround
4471          * we will have issues with VLAN tag stripping not being done for frames
4472          * that are only arriving because we are the default pool
4473          */
4474         if (hw->mac.type < e1000_82576)
4475                 return;
4476
4477         vmolr |= E1000_READ_REG(hw, E1000_VMOLR(vfn)) &
4478                  ~(E1000_VMOLR_ROPE | E1000_VMOLR_MPME | E1000_VMOLR_ROMPE);
4479         E1000_WRITE_REG(hw, E1000_VMOLR(vfn), vmolr);
4480         igb_restore_vf_multicasts(adapter);
4481 }
4482
4483 static void igb_check_wvbr(struct igb_adapter *adapter)
4484 {
4485         struct e1000_hw *hw = &adapter->hw;
4486         u32 wvbr = 0;
4487
4488         switch (hw->mac.type) {
4489         case e1000_82576:
4490         case e1000_i350:
4491                 if (!(wvbr = E1000_READ_REG(hw, E1000_WVBR)))
4492                         return;
4493                 break;
4494         default:
4495                 break;
4496         }
4497
4498         adapter->wvbr |= wvbr;
4499 }
4500
4501 #define IGB_STAGGERED_QUEUE_OFFSET 8
4502
4503 static void igb_spoof_check(struct igb_adapter *adapter)
4504 {
4505         int j;
4506
4507         if (!adapter->wvbr)
4508                 return;
4509
4510         switch (adapter->hw.mac.type) {
4511         case e1000_82576:
4512                 for (j = 0; j < adapter->vfs_allocated_count; j++) {
4513                         if (adapter->wvbr & (1 << j) ||
4514                             adapter->wvbr & (1 << (j + IGB_STAGGERED_QUEUE_OFFSET))) {
4515                                 DPRINTK(DRV, WARNING,
4516                                         "Spoof event(s) detected on VF %d\n", j);
4517                                 adapter->wvbr &=
4518                                         ~((1 << j) |
4519                                           (1 << (j + IGB_STAGGERED_QUEUE_OFFSET)));
4520                         }
4521                 }
4522                 break;
4523         case e1000_i350:
4524                 for (j = 0; j < adapter->vfs_allocated_count; j++) {
4525                         if (adapter->wvbr & (1 << j)) {
4526                                 DPRINTK(DRV, WARNING,
4527                                         "Spoof event(s) detected on VF %d\n", j);
4528                                 adapter->wvbr &= ~(1 << j);
4529                         }
4530                 }
4531                 break;
4532         default:
4533                 break;
4534         }
4535 }
4536
4537 /* Need to wait a few seconds after link up to get diagnostic information from
4538  * the phy */
4539 static void igb_update_phy_info(unsigned long data)
4540 {
4541         struct igb_adapter *adapter = (struct igb_adapter *) data;
4542         e1000_get_phy_info(&adapter->hw);
4543 }
4544
4545 /**
4546  * igb_has_link - check shared code for link and determine up/down
4547  * @adapter: pointer to driver private info
4548  **/
4549 bool igb_has_link(struct igb_adapter *adapter)
4550 {
4551         struct e1000_hw *hw = &adapter->hw;
4552         bool link_active = FALSE;
4553
4554         /* get_link_status is set on LSC (link status) interrupt or
4555          * rx sequence error interrupt.  get_link_status will stay
4556          * false until the e1000_check_for_link establishes link
4557          * for copper adapters ONLY
4558          */
4559         switch (hw->phy.media_type) {
4560         case e1000_media_type_copper:
4561                 if (!hw->mac.get_link_status)
4562                         return true;
4563         case e1000_media_type_internal_serdes:
4564                 e1000_check_for_link(hw);
4565                 link_active = !hw->mac.get_link_status;
4566                 break;
4567         case e1000_media_type_unknown:
4568         default:
4569                 break;
4570         }
4571
4572         if (((hw->mac.type == e1000_i210) ||
4573              (hw->mac.type == e1000_i211)) &&
4574              (hw->phy.id == I210_I_PHY_ID)) {
4575                 if (!netif_carrier_ok(adapter->netdev)) {
4576                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4577                 } else if (!(adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)) {
4578                         adapter->flags |= IGB_FLAG_NEED_LINK_UPDATE;
4579                         adapter->link_check_timeout = jiffies;
4580                 }
4581         }
4582
4583         return link_active;
4584 }
4585
4586 /**
4587  * igb_watchdog - Timer Call-back
4588  * @data: pointer to adapter cast into an unsigned long
4589  **/
4590 static void igb_watchdog(unsigned long data)
4591 {
4592         struct igb_adapter *adapter = (struct igb_adapter *)data;
4593         /* Do the rest outside of interrupt context */
4594         schedule_work(&adapter->watchdog_task);
4595 }
4596
4597 static void igb_watchdog_task(struct work_struct *work)
4598 {
4599         struct igb_adapter *adapter = container_of(work,
4600                                                    struct igb_adapter,
4601                                                    watchdog_task);
4602         struct e1000_hw *hw = &adapter->hw;
4603         struct net_device *netdev = adapter->netdev;
4604         u32 link;
4605         int i;
4606         u32 thstat, ctrl_ext;
4607         u32 connsw;
4608
4609         link = igb_has_link(adapter);
4610         /* Force link down if we have fiber to swap to */
4611         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4612                 if (hw->phy.media_type == e1000_media_type_copper) {
4613                         connsw = E1000_READ_REG(hw, E1000_CONNSW);
4614                         if (!(connsw & E1000_CONNSW_AUTOSENSE_EN))
4615                                 link = 0;
4616                 }
4617         }
4618
4619         if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE) {
4620                 if (time_after(jiffies, (adapter->link_check_timeout + HZ)))
4621                         adapter->flags &= ~IGB_FLAG_NEED_LINK_UPDATE;
4622                 else
4623                         link = FALSE;
4624         }
4625
4626         if (link) {
4627                 /* Perform a reset if the media type changed. */
4628                 if (hw->dev_spec._82575.media_changed) {
4629                         hw->dev_spec._82575.media_changed = false;
4630                         adapter->flags |= IGB_FLAG_MEDIA_RESET;
4631                         igb_reset(adapter);
4632                 }
4633
4634                 /* Cancel scheduled suspend requests. */
4635                 pm_runtime_resume(netdev->dev.parent);
4636
4637                 if (!netif_carrier_ok(netdev)) {
4638                         u32 ctrl;
4639                         e1000_get_speed_and_duplex(hw,
4640                                                    &adapter->link_speed,
4641                                                    &adapter->link_duplex);
4642
4643                         ctrl = E1000_READ_REG(hw, E1000_CTRL);
4644                         /* Links status message must follow this format */
4645                         printk(KERN_INFO "igb: %s NIC Link is Up %d Mbps %s, "
4646                                  "Flow Control: %s\n",
4647                                netdev->name,
4648                                adapter->link_speed,
4649                                adapter->link_duplex == FULL_DUPLEX ?
4650                                  "Full Duplex" : "Half Duplex",
4651                                ((ctrl & E1000_CTRL_TFCE) &&
4652                                 (ctrl & E1000_CTRL_RFCE)) ? "RX/TX":
4653                                ((ctrl & E1000_CTRL_RFCE) ?  "RX" :
4654                                ((ctrl & E1000_CTRL_TFCE) ?  "TX" : "None")));
4655                         /* adjust timeout factor according to speed/duplex */
4656                         adapter->tx_timeout_factor = 1;
4657                         switch (adapter->link_speed) {
4658                         case SPEED_10:
4659                                 adapter->tx_timeout_factor = 14;
4660                                 break;
4661                         case SPEED_100:
4662                                 /* maybe add some timeout factor ? */
4663                                 break;
4664                         default:
4665                                 break;
4666                         }
4667
4668                         netif_carrier_on(netdev);
4669                         netif_tx_wake_all_queues(netdev);
4670
4671                         igb_ping_all_vfs(adapter);
4672 #ifdef IFLA_VF_MAX
4673                         igb_check_vf_rate_limit(adapter);
4674 #endif /* IFLA_VF_MAX */
4675
4676                         /* link state has changed, schedule phy info update */
4677                         if (!test_bit(__IGB_DOWN, &adapter->state))
4678                                 mod_timer(&adapter->phy_info_timer,
4679                                           round_jiffies(jiffies + 2 * HZ));
4680                 }
4681         } else {
4682                 if (netif_carrier_ok(netdev)) {
4683                         adapter->link_speed = 0;
4684                         adapter->link_duplex = 0;
4685                         /* check for thermal sensor event on i350 */
4686                         if (hw->mac.type == e1000_i350) {
4687                                 thstat = E1000_READ_REG(hw, E1000_THSTAT);
4688                                 ctrl_ext = E1000_READ_REG(hw, E1000_CTRL_EXT);
4689                                 if ((hw->phy.media_type ==
4690                                         e1000_media_type_copper) &&
4691                                         !(ctrl_ext &
4692                                         E1000_CTRL_EXT_LINK_MODE_SGMII)) {
4693                                         if (thstat & E1000_THSTAT_PWR_DOWN) {
4694                                                 printk(KERN_ERR "igb: %s The "
4695                                                 "network adapter was stopped "
4696                                                 "because it overheated.\n",
4697                                                 netdev->name);
4698                                         }
4699                                         if (thstat & E1000_THSTAT_LINK_THROTTLE) {
4700                                                 printk(KERN_INFO
4701                                                         "igb: %s The network "
4702                                                         "adapter supported "
4703                                                         "link speed "
4704                                                         "was downshifted "
4705                                                         "because it "
4706                                                         "overheated.\n",
4707                                                         netdev->name);
4708                                         }
4709                                 }
4710                         }
4711
4712                         /* Links status message must follow this format */
4713                         printk(KERN_INFO "igb: %s NIC Link is Down\n",
4714                                netdev->name);
4715                         netif_carrier_off(netdev);
4716                         netif_tx_stop_all_queues(netdev);
4717
4718                         igb_ping_all_vfs(adapter);
4719
4720                         /* link state has changed, schedule phy info update */
4721                         if (!test_bit(__IGB_DOWN, &adapter->state))
4722                                 mod_timer(&adapter->phy_info_timer,
4723                                           round_jiffies(jiffies + 2 * HZ));
4724                         /* link is down, time to check for alternate media */
4725                         if (adapter->flags & IGB_FLAG_MAS_ENABLE) {
4726                                 igb_check_swap_media(adapter);
4727                                 if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4728                                         schedule_work(&adapter->reset_task);
4729                                         /* return immediately */
4730                                         return;
4731                                 }
4732                         }
4733                         pm_schedule_suspend(netdev->dev.parent,
4734                                             MSEC_PER_SEC * 5);
4735
4736                 /* also check for alternate media here */
4737                 } else if (!netif_carrier_ok(netdev) &&
4738                            (adapter->flags & IGB_FLAG_MAS_ENABLE)) {
4739                         hw->mac.ops.power_up_serdes(hw);
4740                         igb_check_swap_media(adapter);
4741                         if (adapter->flags & IGB_FLAG_MEDIA_RESET) {
4742                                 schedule_work(&adapter->reset_task);
4743                                 /* return immediately */
4744                                 return;
4745                         }
4746                 }
4747         }
4748
4749         igb_update_stats(adapter);
4750
4751         for (i = 0; i < adapter->num_tx_queues; i++) {
4752                 struct igb_ring *tx_ring = adapter->tx_ring[i];
4753                 if (!netif_carrier_ok(netdev)) {
4754                         /* We've lost link, so the controller stops DMA,
4755                          * but we've got queued Tx work that's never going
4756                          * to get done, so reset controller to flush Tx.
4757                          * (Do the reset outside of interrupt context). */
4758                         if (igb_desc_unused(tx_ring) + 1 < tx_ring->count) {
4759                                 adapter->tx_timeout_count++;
4760                                 schedule_work(&adapter->reset_task);
4761                                 /* return immediately since reset is imminent */
4762                                 return;
4763                         }
4764                 }
4765
4766                 /* Force detection of hung controller every watchdog period */
4767                 set_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
4768         }
4769
4770         /* Cause software interrupt to ensure rx ring is cleaned */
4771         if (adapter->msix_entries) {
4772                 u32 eics = 0;
4773                 for (i = 0; i < adapter->num_q_vectors; i++)
4774                         eics |= adapter->q_vector[i]->eims_value;
4775                 E1000_WRITE_REG(hw, E1000_EICS, eics);
4776         } else {
4777                 E1000_WRITE_REG(hw, E1000_ICS, E1000_ICS_RXDMT0);
4778         }
4779
4780         igb_spoof_check(adapter);
4781
4782         /* Reset the timer */
4783         if (!test_bit(__IGB_DOWN, &adapter->state)) {
4784                 if (adapter->flags & IGB_FLAG_NEED_LINK_UPDATE)
4785                         mod_timer(&adapter->watchdog_timer,
4786                                   round_jiffies(jiffies +  HZ));
4787                 else
4788                         mod_timer(&adapter->watchdog_timer,
4789                                   round_jiffies(jiffies + 2 * HZ));
4790         }
4791 }
4792
4793 static void igb_dma_err_task(struct work_struct *work)
4794 {
4795         struct igb_adapter *adapter = container_of(work,
4796                                                    struct igb_adapter,
4797                                                    dma_err_task);
4798         int vf;
4799         struct e1000_hw *hw = &adapter->hw;
4800         struct net_device *netdev = adapter->netdev;
4801         u32 hgptc;
4802         u32 ciaa, ciad;
4803
4804         hgptc = E1000_READ_REG(hw, E1000_HGPTC);
4805         if (hgptc) /* If incrementing then no need for the check below */
4806                 goto dma_timer_reset;
4807         /*
4808          * Check to see if a bad DMA write target from an errant or
4809          * malicious VF has caused a PCIe error.  If so then we can
4810          * issue a VFLR to the offending VF(s) and then resume without
4811          * requesting a full slot reset.
4812          */
4813
4814         for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
4815                 ciaa = (vf << 16) | 0x80000000;
4816                 /* 32 bit read so align, we really want status at offset 6 */
4817                 ciaa |= PCI_COMMAND;
4818                 E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4819                 ciad = E1000_READ_REG(hw, E1000_CIAD);
4820                 ciaa &= 0x7FFFFFFF;
4821                 /* disable debug mode asap after reading data */
4822                 E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4823                 /* Get the upper 16 bits which will be the PCI status reg */
4824                 ciad >>= 16;
4825                 if (ciad & (PCI_STATUS_REC_MASTER_ABORT |
4826                             PCI_STATUS_REC_TARGET_ABORT |
4827                             PCI_STATUS_SIG_SYSTEM_ERROR)) {
4828                         netdev_err(netdev, "VF %d suffered error\n", vf);
4829                         /* Issue VFLR */
4830                         ciaa = (vf << 16) | 0x80000000;
4831                         ciaa |= 0xA8;
4832                         E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4833                         ciad = 0x00008000;  /* VFLR */
4834                         E1000_WRITE_REG(hw, E1000_CIAD, ciad);
4835                         ciaa &= 0x7FFFFFFF;
4836                         E1000_WRITE_REG(hw, E1000_CIAA, ciaa);
4837                 }
4838         }
4839 dma_timer_reset:
4840         /* Reset the timer */
4841         if (!test_bit(__IGB_DOWN, &adapter->state))
4842                 mod_timer(&adapter->dma_err_timer,
4843                           round_jiffies(jiffies + HZ / 10));
4844 }
4845
4846 /**
4847  * igb_dma_err_timer - Timer Call-back
4848  * @data: pointer to adapter cast into an unsigned long
4849  **/
4850 static void igb_dma_err_timer(unsigned long data)
4851 {
4852         struct igb_adapter *adapter = (struct igb_adapter *)data;
4853         /* Do the rest outside of interrupt context */
4854         schedule_work(&adapter->dma_err_task);
4855 }
4856
4857 enum latency_range {
4858         lowest_latency = 0,
4859         low_latency = 1,
4860         bulk_latency = 2,
4861         latency_invalid = 255
4862 };
4863
4864 /**
4865  * igb_update_ring_itr - update the dynamic ITR value based on packet size
4866  *
4867  *      Stores a new ITR value based on strictly on packet size.  This
4868  *      algorithm is less sophisticated than that used in igb_update_itr,
4869  *      due to the difficulty of synchronizing statistics across multiple
4870  *      receive rings.  The divisors and thresholds used by this function
4871  *      were determined based on theoretical maximum wire speed and testing
4872  *      data, in order to minimize response time while increasing bulk
4873  *      throughput.
4874  *      This functionality is controlled by the InterruptThrottleRate module
4875  *      parameter (see igb_param.c)
4876  *      NOTE:  This function is called only when operating in a multiqueue
4877  *             receive environment.
4878  * @q_vector: pointer to q_vector
4879  **/
4880 static void igb_update_ring_itr(struct igb_q_vector *q_vector)
4881 {
4882         int new_val = q_vector->itr_val;
4883         int avg_wire_size = 0;
4884         struct igb_adapter *adapter = q_vector->adapter;
4885         unsigned int packets;
4886
4887         /* For non-gigabit speeds, just fix the interrupt rate at 4000
4888          * ints/sec - ITR timer value of 120 ticks.
4889          */
4890         switch (adapter->link_speed) {
4891         case SPEED_10:
4892         case SPEED_100:
4893                 new_val = IGB_4K_ITR;
4894                 goto set_itr_val;
4895         default:
4896                 break;
4897         }
4898
4899         packets = q_vector->rx.total_packets;
4900         if (packets)
4901                 avg_wire_size = q_vector->rx.total_bytes / packets;
4902
4903         packets = q_vector->tx.total_packets;
4904         if (packets)
4905                 avg_wire_size = max_t(u32, avg_wire_size,
4906                                       q_vector->tx.total_bytes / packets);
4907
4908         /* if avg_wire_size isn't set no work was done */
4909         if (!avg_wire_size)
4910                 goto clear_counts;
4911
4912         /* Add 24 bytes to size to account for CRC, preamble, and gap */
4913         avg_wire_size += 24;
4914
4915         /* Don't starve jumbo frames */
4916         avg_wire_size = min(avg_wire_size, 3000);
4917
4918         /* Give a little boost to mid-size frames */
4919         if ((avg_wire_size > 300) && (avg_wire_size < 1200))
4920                 new_val = avg_wire_size / 3;
4921         else
4922                 new_val = avg_wire_size / 2;
4923
4924         /* conservative mode (itr 3) eliminates the lowest_latency setting */
4925         if (new_val < IGB_20K_ITR &&
4926             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
4927              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
4928                 new_val = IGB_20K_ITR;
4929
4930 set_itr_val:
4931         if (new_val != q_vector->itr_val) {
4932                 q_vector->itr_val = new_val;
4933                 q_vector->set_itr = 1;
4934         }
4935 clear_counts:
4936         q_vector->rx.total_bytes = 0;
4937         q_vector->rx.total_packets = 0;
4938         q_vector->tx.total_bytes = 0;
4939         q_vector->tx.total_packets = 0;
4940 }
4941
4942 /**
4943  * igb_update_itr - update the dynamic ITR value based on statistics
4944  *      Stores a new ITR value based on packets and byte
4945  *      counts during the last interrupt.  The advantage of per interrupt
4946  *      computation is faster updates and more accurate ITR for the current
4947  *      traffic pattern.  Constants in this function were computed
4948  *      based on theoretical maximum wire speed and thresholds were set based
4949  *      on testing data as well as attempting to minimize response time
4950  *      while increasing bulk throughput.
4951  *      this functionality is controlled by the InterruptThrottleRate module
4952  *      parameter (see igb_param.c)
4953  *      NOTE:  These calculations are only valid when operating in a single-
4954  *             queue environment.
4955  * @q_vector: pointer to q_vector
4956  * @ring_container: ring info to update the itr for
4957  **/
4958 static void igb_update_itr(struct igb_q_vector *q_vector,
4959                            struct igb_ring_container *ring_container)
4960 {
4961         unsigned int packets = ring_container->total_packets;
4962         unsigned int bytes = ring_container->total_bytes;
4963         u8 itrval = ring_container->itr;
4964
4965         /* no packets, exit with status unchanged */
4966         if (packets == 0)
4967                 return;
4968
4969         switch (itrval) {
4970         case lowest_latency:
4971                 /* handle TSO and jumbo frames */
4972                 if (bytes/packets > 8000)
4973                         itrval = bulk_latency;
4974                 else if ((packets < 5) && (bytes > 512))
4975                         itrval = low_latency;
4976                 break;
4977         case low_latency:  /* 50 usec aka 20000 ints/s */
4978                 if (bytes > 10000) {
4979                         /* this if handles the TSO accounting */
4980                         if (bytes/packets > 8000) {
4981                                 itrval = bulk_latency;
4982                         } else if ((packets < 10) || ((bytes/packets) > 1200)) {
4983                                 itrval = bulk_latency;
4984                         } else if ((packets > 35)) {
4985                                 itrval = lowest_latency;
4986                         }
4987                 } else if (bytes/packets > 2000) {
4988                         itrval = bulk_latency;
4989                 } else if (packets <= 2 && bytes < 512) {
4990                         itrval = lowest_latency;
4991                 }
4992                 break;
4993         case bulk_latency: /* 250 usec aka 4000 ints/s */
4994                 if (bytes > 25000) {
4995                         if (packets > 35)
4996                                 itrval = low_latency;
4997                 } else if (bytes < 1500) {
4998                         itrval = low_latency;
4999                 }
5000                 break;
5001         }
5002
5003         /* clear work counters since we have the values we need */
5004         ring_container->total_bytes = 0;
5005         ring_container->total_packets = 0;
5006
5007         /* write updated itr to ring container */
5008         ring_container->itr = itrval;
5009 }
5010
5011 static void igb_set_itr(struct igb_q_vector *q_vector)
5012 {
5013         struct igb_adapter *adapter = q_vector->adapter;
5014         u32 new_itr = q_vector->itr_val;
5015         u8 current_itr = 0;
5016
5017         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
5018         switch (adapter->link_speed) {
5019         case SPEED_10:
5020         case SPEED_100:
5021                 current_itr = 0;
5022                 new_itr = IGB_4K_ITR;
5023                 goto set_itr_now;
5024         default:
5025                 break;
5026         }
5027
5028         igb_update_itr(q_vector, &q_vector->tx);
5029         igb_update_itr(q_vector, &q_vector->rx);
5030
5031         current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
5032
5033         /* conservative mode (itr 3) eliminates the lowest_latency setting */
5034         if (current_itr == lowest_latency &&
5035             ((q_vector->rx.ring && adapter->rx_itr_setting == 3) ||
5036              (!q_vector->rx.ring && adapter->tx_itr_setting == 3)))
5037                 current_itr = low_latency;
5038
5039         switch (current_itr) {
5040         /* counts and packets in update_itr are dependent on these numbers */
5041         case lowest_latency:
5042                 new_itr = IGB_70K_ITR; /* 70,000 ints/sec */
5043                 break;
5044         case low_latency:
5045                 new_itr = IGB_20K_ITR; /* 20,000 ints/sec */
5046                 break;
5047         case bulk_latency:
5048                 new_itr = IGB_4K_ITR;  /* 4,000 ints/sec */
5049                 break;
5050         default:
5051                 break;
5052         }
5053
5054 set_itr_now:
5055         if (new_itr != q_vector->itr_val) {
5056                 /* this attempts to bias the interrupt rate towards Bulk
5057                  * by adding intermediate steps when interrupt rate is
5058                  * increasing */
5059                 new_itr = new_itr > q_vector->itr_val ?
5060                              max((new_itr * q_vector->itr_val) /
5061                                  (new_itr + (q_vector->itr_val >> 2)),
5062                                  new_itr) :
5063                              new_itr;
5064                 /* Don't write the value here; it resets the adapter's
5065                  * internal timer, and causes us to delay far longer than
5066                  * we should between interrupts.  Instead, we write the ITR
5067                  * value at the beginning of the next interrupt so the timing
5068                  * ends up being correct.
5069                  */
5070                 q_vector->itr_val = new_itr;
5071                 q_vector->set_itr = 1;
5072         }
5073 }
5074
5075 void igb_tx_ctxtdesc(struct igb_ring *tx_ring, u32 vlan_macip_lens,
5076                      u32 type_tucmd, u32 mss_l4len_idx)
5077 {
5078         struct e1000_adv_tx_context_desc *context_desc;
5079         u16 i = tx_ring->next_to_use;
5080
5081         context_desc = IGB_TX_CTXTDESC(tx_ring, i);
5082
5083         i++;
5084         tx_ring->next_to_use = (i < tx_ring->count) ? i : 0;
5085
5086         /* set bits to identify this as an advanced context descriptor */
5087         type_tucmd |= E1000_TXD_CMD_DEXT | E1000_ADVTXD_DTYP_CTXT;
5088
5089         /* For 82575, context index must be unique per ring. */
5090         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5091                 mss_l4len_idx |= tx_ring->reg_idx << 4;
5092
5093         context_desc->vlan_macip_lens   = cpu_to_le32(vlan_macip_lens);
5094         context_desc->seqnum_seed       = 0;
5095         context_desc->type_tucmd_mlhl   = cpu_to_le32(type_tucmd);
5096         context_desc->mss_l4len_idx     = cpu_to_le32(mss_l4len_idx);
5097 }
5098
5099 static int igb_tso(struct igb_ring *tx_ring,
5100                    struct igb_tx_buffer *first,
5101                    u8 *hdr_len)
5102 {
5103 #ifdef NETIF_F_TSO
5104         struct sk_buff *skb = first->skb;
5105         u32 vlan_macip_lens, type_tucmd;
5106         u32 mss_l4len_idx, l4len;
5107
5108         if (skb->ip_summed != CHECKSUM_PARTIAL)
5109                 return 0;
5110
5111         if (!skb_is_gso(skb))
5112 #endif /* NETIF_F_TSO */
5113                 return 0;
5114 #ifdef NETIF_F_TSO
5115
5116         if (skb_header_cloned(skb)) {
5117                 int err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
5118                 if (err)
5119                         return err;
5120         }
5121
5122         /* ADV DTYP TUCMD MKRLOC/ISCSIHEDLEN */
5123         type_tucmd = E1000_ADVTXD_TUCMD_L4T_TCP;
5124
5125         if (first->protocol == __constant_htons(ETH_P_IP)) {
5126                 struct iphdr *iph = ip_hdr(skb);
5127                 iph->tot_len = 0;
5128                 iph->check = 0;
5129                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr,
5130                                                          iph->daddr, 0,
5131                                                          IPPROTO_TCP,
5132                                                          0);
5133                 type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
5134                 first->tx_flags |= IGB_TX_FLAGS_TSO |
5135                                    IGB_TX_FLAGS_CSUM |
5136                                    IGB_TX_FLAGS_IPV4;
5137 #ifdef NETIF_F_TSO6
5138         } else if (skb_is_gso_v6(skb)) {
5139                 ipv6_hdr(skb)->payload_len = 0;
5140                 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
5141                                                        &ipv6_hdr(skb)->daddr,
5142                                                        0, IPPROTO_TCP, 0);
5143                 first->tx_flags |= IGB_TX_FLAGS_TSO |
5144                                    IGB_TX_FLAGS_CSUM;
5145 #endif
5146         }
5147
5148         /* compute header lengths */
5149         l4len = tcp_hdrlen(skb);
5150         *hdr_len = skb_transport_offset(skb) + l4len;
5151
5152         /* update gso size and bytecount with header size */
5153         first->gso_segs = skb_shinfo(skb)->gso_segs;
5154         first->bytecount += (first->gso_segs - 1) * *hdr_len;
5155
5156         /* MSS L4LEN IDX */
5157         mss_l4len_idx = l4len << E1000_ADVTXD_L4LEN_SHIFT;
5158         mss_l4len_idx |= skb_shinfo(skb)->gso_size << E1000_ADVTXD_MSS_SHIFT;
5159
5160         /* VLAN MACLEN IPLEN */
5161         vlan_macip_lens = skb_network_header_len(skb);
5162         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
5163         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5164
5165         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
5166
5167         return 1;
5168 #endif  /* NETIF_F_TSO */
5169 }
5170
5171 static void igb_tx_csum(struct igb_ring *tx_ring, struct igb_tx_buffer *first)
5172 {
5173         struct sk_buff *skb = first->skb;
5174         u32 vlan_macip_lens = 0;
5175         u32 mss_l4len_idx = 0;
5176         u32 type_tucmd = 0;
5177
5178         if (skb->ip_summed != CHECKSUM_PARTIAL) {
5179                 if (!(first->tx_flags & IGB_TX_FLAGS_VLAN))
5180                         return;
5181         } else {
5182                 u8 nexthdr = 0;
5183                 switch (first->protocol) {
5184                 case __constant_htons(ETH_P_IP):
5185                         vlan_macip_lens |= skb_network_header_len(skb);
5186                         type_tucmd |= E1000_ADVTXD_TUCMD_IPV4;
5187                         nexthdr = ip_hdr(skb)->protocol;
5188                         break;
5189 #ifdef NETIF_F_IPV6_CSUM
5190                 case __constant_htons(ETH_P_IPV6):
5191                         vlan_macip_lens |= skb_network_header_len(skb);
5192                         nexthdr = ipv6_hdr(skb)->nexthdr;
5193                         break;
5194 #endif
5195                 default:
5196                         if (unlikely(net_ratelimit())) {
5197                                 dev_warn(tx_ring->dev,
5198                                  "partial checksum but proto=%x!\n",
5199                                  first->protocol);
5200                         }
5201                         break;
5202                 }
5203
5204                 switch (nexthdr) {
5205                 case IPPROTO_TCP:
5206                         type_tucmd |= E1000_ADVTXD_TUCMD_L4T_TCP;
5207                         mss_l4len_idx = tcp_hdrlen(skb) <<
5208                                         E1000_ADVTXD_L4LEN_SHIFT;
5209                         break;
5210 #ifdef HAVE_SCTP
5211                 case IPPROTO_SCTP:
5212                         type_tucmd |= E1000_ADVTXD_TUCMD_L4T_SCTP;
5213                         mss_l4len_idx = sizeof(struct sctphdr) <<
5214                                         E1000_ADVTXD_L4LEN_SHIFT;
5215                         break;
5216 #endif
5217                 case IPPROTO_UDP:
5218                         mss_l4len_idx = sizeof(struct udphdr) <<
5219                                         E1000_ADVTXD_L4LEN_SHIFT;
5220                         break;
5221                 default:
5222                         if (unlikely(net_ratelimit())) {
5223                                 dev_warn(tx_ring->dev,
5224                                  "partial checksum but l4 proto=%x!\n",
5225                                  nexthdr);
5226                         }
5227                         break;
5228                 }
5229
5230                 /* update TX checksum flag */
5231                 first->tx_flags |= IGB_TX_FLAGS_CSUM;
5232         }
5233
5234         vlan_macip_lens |= skb_network_offset(skb) << E1000_ADVTXD_MACLEN_SHIFT;
5235         vlan_macip_lens |= first->tx_flags & IGB_TX_FLAGS_VLAN_MASK;
5236
5237         igb_tx_ctxtdesc(tx_ring, vlan_macip_lens, type_tucmd, mss_l4len_idx);
5238 }
5239
5240 #define IGB_SET_FLAG(_input, _flag, _result) \
5241         ((_flag <= _result) ? \
5242          ((u32)(_input & _flag) * (_result / _flag)) : \
5243          ((u32)(_input & _flag) / (_flag / _result)))
5244
5245 static u32 igb_tx_cmd_type(struct sk_buff *skb, u32 tx_flags)
5246 {
5247         /* set type for advanced descriptor with frame checksum insertion */
5248         u32 cmd_type = E1000_ADVTXD_DTYP_DATA |
5249                        E1000_ADVTXD_DCMD_DEXT |
5250                        E1000_ADVTXD_DCMD_IFCS;
5251
5252         /* set HW vlan bit if vlan is present */
5253         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_VLAN,
5254                                  (E1000_ADVTXD_DCMD_VLE));
5255
5256         /* set segmentation bits for TSO */
5257         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSO,
5258                                  (E1000_ADVTXD_DCMD_TSE));
5259
5260         /* set timestamp bit if present */
5261         cmd_type |= IGB_SET_FLAG(tx_flags, IGB_TX_FLAGS_TSTAMP,
5262                                  (E1000_ADVTXD_MAC_TSTAMP));
5263
5264         return cmd_type;
5265 }
5266
5267 static void igb_tx_olinfo_status(struct igb_ring *tx_ring,
5268                                  union e1000_adv_tx_desc *tx_desc,
5269                                  u32 tx_flags, unsigned int paylen)
5270 {
5271         u32 olinfo_status = paylen << E1000_ADVTXD_PAYLEN_SHIFT;
5272
5273         /* 82575 requires a unique index per ring */
5274         if (test_bit(IGB_RING_FLAG_TX_CTX_IDX, &tx_ring->flags))
5275                 olinfo_status |= tx_ring->reg_idx << 4;
5276
5277         /* insert L4 checksum */
5278         olinfo_status |= IGB_SET_FLAG(tx_flags,
5279                                       IGB_TX_FLAGS_CSUM,
5280                                       (E1000_TXD_POPTS_TXSM << 8));
5281
5282         /* insert IPv4 checksum */
5283         olinfo_status |= IGB_SET_FLAG(tx_flags,
5284                                       IGB_TX_FLAGS_IPV4,
5285                                       (E1000_TXD_POPTS_IXSM << 8));
5286
5287         tx_desc->read.olinfo_status = cpu_to_le32(olinfo_status);
5288 }
5289
5290 static void igb_tx_map(struct igb_ring *tx_ring,
5291                        struct igb_tx_buffer *first,
5292                        const u8 hdr_len)
5293 {
5294         struct sk_buff *skb = first->skb;
5295         struct igb_tx_buffer *tx_buffer;
5296         union e1000_adv_tx_desc *tx_desc;
5297         struct skb_frag_struct *frag;
5298         dma_addr_t dma;
5299         unsigned int data_len, size;
5300         u32 tx_flags = first->tx_flags;
5301         u32 cmd_type = igb_tx_cmd_type(skb, tx_flags);
5302         u16 i = tx_ring->next_to_use;
5303
5304         tx_desc = IGB_TX_DESC(tx_ring, i);
5305
5306         igb_tx_olinfo_status(tx_ring, tx_desc, tx_flags, skb->len - hdr_len);
5307
5308         size = skb_headlen(skb);
5309         data_len = skb->data_len;
5310
5311         dma = dma_map_single(tx_ring->dev, skb->data, size, DMA_TO_DEVICE);
5312
5313         tx_buffer = first;
5314
5315         for (frag = &skb_shinfo(skb)->frags[0];; frag++) {
5316                 if (dma_mapping_error(tx_ring->dev, dma))
5317                         goto dma_error;
5318
5319                 /* record length, and DMA address */
5320                 dma_unmap_len_set(tx_buffer, len, size);
5321                 dma_unmap_addr_set(tx_buffer, dma, dma);
5322
5323                 tx_desc->read.buffer_addr = cpu_to_le64(dma);
5324
5325                 while (unlikely(size > IGB_MAX_DATA_PER_TXD)) {
5326                         tx_desc->read.cmd_type_len =
5327                                 cpu_to_le32(cmd_type ^ IGB_MAX_DATA_PER_TXD);
5328
5329                         i++;
5330                         tx_desc++;
5331                         if (i == tx_ring->count) {
5332                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
5333                                 i = 0;
5334                         }
5335                         tx_desc->read.olinfo_status = 0;
5336
5337                         dma += IGB_MAX_DATA_PER_TXD;
5338                         size -= IGB_MAX_DATA_PER_TXD;
5339
5340                         tx_desc->read.buffer_addr = cpu_to_le64(dma);
5341                 }
5342
5343                 if (likely(!data_len))
5344                         break;
5345
5346                 tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type ^ size);
5347
5348                 i++;
5349                 tx_desc++;
5350                 if (i == tx_ring->count) {
5351                         tx_desc = IGB_TX_DESC(tx_ring, 0);
5352                         i = 0;
5353                 }
5354                 tx_desc->read.olinfo_status = 0;
5355
5356                 size = skb_frag_size(frag);
5357                 data_len -= size;
5358
5359                 dma = skb_frag_dma_map(tx_ring->dev, frag, 0,
5360                                        size, DMA_TO_DEVICE);
5361
5362                 tx_buffer = &tx_ring->tx_buffer_info[i];
5363         }
5364
5365         /* write last descriptor with RS and EOP bits */
5366         cmd_type |= size | IGB_TXD_DCMD;
5367         tx_desc->read.cmd_type_len = cpu_to_le32(cmd_type);
5368
5369         netdev_tx_sent_queue(txring_txq(tx_ring), first->bytecount);
5370         /* set the timestamp */
5371         first->time_stamp = jiffies;
5372
5373         /*
5374          * Force memory writes to complete before letting h/w know there
5375          * are new descriptors to fetch.  (Only applicable for weak-ordered
5376          * memory model archs, such as IA-64).
5377          *
5378          * We also need this memory barrier to make certain all of the
5379          * status bits have been updated before next_to_watch is written.
5380          */
5381         wmb();
5382
5383         /* set next_to_watch value indicating a packet is present */
5384         first->next_to_watch = tx_desc;
5385
5386         i++;
5387         if (i == tx_ring->count)
5388                 i = 0;
5389
5390         tx_ring->next_to_use = i;
5391
5392         writel(i, tx_ring->tail);
5393
5394         /* we need this if more than one processor can write to our tail
5395          * at a time, it syncronizes IO on IA64/Altix systems */
5396         mmiowb();
5397
5398         return;
5399
5400 dma_error:
5401         dev_err(tx_ring->dev, "TX DMA map failed\n");
5402
5403         /* clear dma mappings for failed tx_buffer_info map */
5404         for (;;) {
5405                 tx_buffer = &tx_ring->tx_buffer_info[i];
5406                 igb_unmap_and_free_tx_resource(tx_ring, tx_buffer);
5407                 if (tx_buffer == first)
5408                         break;
5409                 if (i == 0)
5410                         i = tx_ring->count;
5411                 i--;
5412         }
5413
5414         tx_ring->next_to_use = i;
5415 }
5416
5417 static int __igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5418 {
5419         struct net_device *netdev = netdev_ring(tx_ring);
5420
5421         if (netif_is_multiqueue(netdev))
5422                 netif_stop_subqueue(netdev, ring_queue_index(tx_ring));
5423         else
5424                 netif_stop_queue(netdev);
5425
5426         /* Herbert's original patch had:
5427          *  smp_mb__after_netif_stop_queue();
5428          * but since that doesn't exist yet, just open code it. */
5429         smp_mb();
5430
5431         /* We need to check again in a case another CPU has just
5432          * made room available. */
5433         if (igb_desc_unused(tx_ring) < size)
5434                 return -EBUSY;
5435
5436         /* A reprieve! */
5437         if (netif_is_multiqueue(netdev))
5438                 netif_wake_subqueue(netdev, ring_queue_index(tx_ring));
5439         else
5440                 netif_wake_queue(netdev);
5441
5442         tx_ring->tx_stats.restart_queue++;
5443
5444         return 0;
5445 }
5446
5447 static inline int igb_maybe_stop_tx(struct igb_ring *tx_ring, const u16 size)
5448 {
5449         if (igb_desc_unused(tx_ring) >= size)
5450                 return 0;
5451         return __igb_maybe_stop_tx(tx_ring, size);
5452 }
5453
5454 netdev_tx_t igb_xmit_frame_ring(struct sk_buff *skb,
5455                                 struct igb_ring *tx_ring)
5456 {
5457         struct igb_tx_buffer *first;
5458         int tso;
5459         u32 tx_flags = 0;
5460 #if PAGE_SIZE > IGB_MAX_DATA_PER_TXD
5461         unsigned short f;
5462 #endif
5463         u16 count = TXD_USE_COUNT(skb_headlen(skb));
5464         __be16 protocol = vlan_get_protocol(skb);
5465         u8 hdr_len = 0;
5466
5467         /*
5468          * need: 1 descriptor per page * PAGE_SIZE/IGB_MAX_DATA_PER_TXD,
5469          *       + 1 desc for skb_headlen/IGB_MAX_DATA_PER_TXD,
5470          *       + 2 desc gap to keep tail from touching head,
5471          *       + 1 desc for context descriptor,
5472          * otherwise try next time
5473          */
5474 #if PAGE_SIZE > IGB_MAX_DATA_PER_TXD
5475         for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
5476                 count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size);
5477 #else
5478         count += skb_shinfo(skb)->nr_frags;
5479 #endif
5480         if (igb_maybe_stop_tx(tx_ring, count + 3)) {
5481                 /* this is a hard error */
5482                 return NETDEV_TX_BUSY;
5483         }
5484
5485         /* record the location of the first descriptor for this packet */
5486         first = &tx_ring->tx_buffer_info[tx_ring->next_to_use];
5487         first->skb = skb;
5488         first->bytecount = skb->len;
5489         first->gso_segs = 1;
5490
5491         skb_tx_timestamp(skb);
5492
5493 #ifdef HAVE_PTP_1588_CLOCK
5494         if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP)) {
5495                 struct igb_adapter *adapter = netdev_priv(tx_ring->netdev);
5496                 if (!adapter->ptp_tx_skb) {
5497                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5498                         tx_flags |= IGB_TX_FLAGS_TSTAMP;
5499
5500                         adapter->ptp_tx_skb = skb_get(skb);
5501                         adapter->ptp_tx_start = jiffies;
5502                         if (adapter->hw.mac.type == e1000_82576)
5503                                 schedule_work(&adapter->ptp_tx_work);
5504                 }
5505         }
5506 #endif /* HAVE_PTP_1588_CLOCK */
5507
5508         if (vlan_tx_tag_present(skb)) {
5509                 tx_flags |= IGB_TX_FLAGS_VLAN;
5510                 tx_flags |= (vlan_tx_tag_get(skb) << IGB_TX_FLAGS_VLAN_SHIFT);
5511         }
5512
5513         /* record initial flags and protocol */
5514         first->tx_flags = tx_flags;
5515         first->protocol = protocol;
5516
5517         tso = igb_tso(tx_ring, first, &hdr_len);
5518         if (tso < 0)
5519                 goto out_drop;
5520         else if (!tso)
5521                 igb_tx_csum(tx_ring, first);
5522
5523         igb_tx_map(tx_ring, first, hdr_len);
5524
5525 #ifndef HAVE_TRANS_START_IN_QUEUE
5526         netdev_ring(tx_ring)->trans_start = jiffies;
5527
5528 #endif
5529         /* Make sure there is space in the ring for the next send. */
5530         igb_maybe_stop_tx(tx_ring, DESC_NEEDED);
5531
5532         return NETDEV_TX_OK;
5533
5534 out_drop:
5535         igb_unmap_and_free_tx_resource(tx_ring, first);
5536
5537         return NETDEV_TX_OK;
5538 }
5539
5540 #ifdef HAVE_TX_MQ
5541 static inline struct igb_ring *igb_tx_queue_mapping(struct igb_adapter *adapter,
5542                                                     struct sk_buff *skb)
5543 {
5544         unsigned int r_idx = skb->queue_mapping;
5545
5546         if (r_idx >= adapter->num_tx_queues)
5547                 r_idx = r_idx % adapter->num_tx_queues;
5548
5549         return adapter->tx_ring[r_idx];
5550 }
5551 #else
5552 #define igb_tx_queue_mapping(_adapter, _skb) (_adapter)->tx_ring[0]
5553 #endif
5554
5555 static netdev_tx_t igb_xmit_frame(struct sk_buff *skb,
5556                                   struct net_device *netdev)
5557 {
5558         struct igb_adapter *adapter = netdev_priv(netdev);
5559
5560         if (test_bit(__IGB_DOWN, &adapter->state)) {
5561                 dev_kfree_skb_any(skb);
5562                 return NETDEV_TX_OK;
5563         }
5564
5565         if (skb->len <= 0) {
5566                 dev_kfree_skb_any(skb);
5567                 return NETDEV_TX_OK;
5568         }
5569
5570         /*
5571          * The minimum packet size with TCTL.PSP set is 17 so pad the skb
5572          * in order to meet this minimum size requirement.
5573          */
5574         if (skb->len < 17) {
5575                 if (skb_padto(skb, 17))
5576                         return NETDEV_TX_OK;
5577                 skb->len = 17;
5578         }
5579
5580         return igb_xmit_frame_ring(skb, igb_tx_queue_mapping(adapter, skb));
5581 }
5582
5583 /**
5584  * igb_tx_timeout - Respond to a Tx Hang
5585  * @netdev: network interface device structure
5586  **/
5587 static void igb_tx_timeout(struct net_device *netdev)
5588 {
5589         struct igb_adapter *adapter = netdev_priv(netdev);
5590         struct e1000_hw *hw = &adapter->hw;
5591
5592         /* Do the reset outside of interrupt context */
5593         adapter->tx_timeout_count++;
5594
5595         if (hw->mac.type >= e1000_82580)
5596                 hw->dev_spec._82575.global_device_reset = true;
5597
5598         schedule_work(&adapter->reset_task);
5599         E1000_WRITE_REG(hw, E1000_EICS,
5600                         (adapter->eims_enable_mask & ~adapter->eims_other));
5601 }
5602
5603 static void igb_reset_task(struct work_struct *work)
5604 {
5605         struct igb_adapter *adapter;
5606         adapter = container_of(work, struct igb_adapter, reset_task);
5607
5608         igb_reinit_locked(adapter);
5609 }
5610
5611 /**
5612  * igb_get_stats - Get System Network Statistics
5613  * @netdev: network interface device structure
5614  *
5615  * Returns the address of the device statistics structure.
5616  * The statistics are updated here and also from the timer callback.
5617  **/
5618 static struct net_device_stats *igb_get_stats(struct net_device *netdev)
5619 {
5620         struct igb_adapter *adapter = netdev_priv(netdev);
5621
5622         if (!test_bit(__IGB_RESETTING, &adapter->state))
5623                 igb_update_stats(adapter);
5624
5625 #ifdef HAVE_NETDEV_STATS_IN_NETDEV
5626         /* only return the current stats */
5627         return &netdev->stats;
5628 #else
5629         /* only return the current stats */
5630         return &adapter->net_stats;
5631 #endif /* HAVE_NETDEV_STATS_IN_NETDEV */
5632 }
5633
5634 /**
5635  * igb_change_mtu - Change the Maximum Transfer Unit
5636  * @netdev: network interface device structure
5637  * @new_mtu: new value for maximum frame size
5638  *
5639  * Returns 0 on success, negative on failure
5640  **/
5641 static int igb_change_mtu(struct net_device *netdev, int new_mtu)
5642 {
5643         struct igb_adapter *adapter = netdev_priv(netdev);
5644         struct e1000_hw *hw = &adapter->hw;
5645         struct pci_dev *pdev = adapter->pdev;
5646         int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
5647
5648         if ((new_mtu < 68) || (max_frame > MAX_JUMBO_FRAME_SIZE)) {
5649                 dev_err(pci_dev_to_dev(pdev), "Invalid MTU setting\n");
5650                 return -EINVAL;
5651         }
5652
5653 #define MAX_STD_JUMBO_FRAME_SIZE 9238
5654         if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
5655                 dev_err(pci_dev_to_dev(pdev), "MTU > 9216 not supported.\n");
5656                 return -EINVAL;
5657         }
5658
5659         /* adjust max frame to be at least the size of a standard frame */
5660         if (max_frame < (ETH_FRAME_LEN + ETH_FCS_LEN))
5661                 max_frame = ETH_FRAME_LEN + ETH_FCS_LEN;
5662
5663         while (test_and_set_bit(__IGB_RESETTING, &adapter->state))
5664                 usleep_range(1000, 2000);
5665
5666         /* igb_down has a dependency on max_frame_size */
5667         adapter->max_frame_size = max_frame;
5668
5669         if (netif_running(netdev))
5670                 igb_down(adapter);
5671
5672         dev_info(pci_dev_to_dev(pdev), "changing MTU from %d to %d\n",
5673                 netdev->mtu, new_mtu);
5674         netdev->mtu = new_mtu;
5675         hw->dev_spec._82575.mtu = new_mtu;
5676
5677         if (netif_running(netdev))
5678                 igb_up(adapter);
5679         else
5680                 igb_reset(adapter);
5681
5682         clear_bit(__IGB_RESETTING, &adapter->state);
5683
5684         return 0;
5685 }
5686
5687 /**
5688  * igb_update_stats - Update the board statistics counters
5689  * @adapter: board private structure
5690  **/
5691
5692 void igb_update_stats(struct igb_adapter *adapter)
5693 {
5694 #ifdef HAVE_NETDEV_STATS_IN_NETDEV
5695         struct net_device_stats *net_stats = &adapter->netdev->stats;
5696 #else
5697         struct net_device_stats *net_stats = &adapter->net_stats;
5698 #endif /* HAVE_NETDEV_STATS_IN_NETDEV */
5699         struct e1000_hw *hw = &adapter->hw;
5700 #ifdef HAVE_PCI_ERS
5701         struct pci_dev *pdev = adapter->pdev;
5702 #endif
5703         u32 reg, mpc;
5704         u16 phy_tmp;
5705         int i;
5706         u64 bytes, packets;
5707 #ifndef IGB_NO_LRO
5708         u32 flushed = 0, coal = 0;
5709         struct igb_q_vector *q_vector;
5710 #endif
5711
5712 #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
5713
5714         /*
5715          * Prevent stats update while adapter is being reset, or if the pci
5716          * connection is down.
5717          */
5718         if (adapter->link_speed == 0)
5719                 return;
5720 #ifdef HAVE_PCI_ERS
5721         if (pci_channel_offline(pdev))
5722                 return;
5723
5724 #endif
5725 #ifndef IGB_NO_LRO
5726         for (i = 0; i < adapter->num_q_vectors; i++) {
5727                 q_vector = adapter->q_vector[i];
5728                 if (!q_vector)
5729                         continue;
5730                 flushed += q_vector->lrolist.stats.flushed;
5731                 coal += q_vector->lrolist.stats.coal;
5732         }
5733         adapter->lro_stats.flushed = flushed;
5734         adapter->lro_stats.coal = coal;
5735
5736 #endif
5737         bytes = 0;
5738         packets = 0;
5739         for (i = 0; i < adapter->num_rx_queues; i++) {
5740                 u32 rqdpc_tmp = E1000_READ_REG(hw, E1000_RQDPC(i)) & 0x0FFF;
5741                 struct igb_ring *ring = adapter->rx_ring[i];
5742                 ring->rx_stats.drops += rqdpc_tmp;
5743                 net_stats->rx_fifo_errors += rqdpc_tmp;
5744 #ifdef CONFIG_IGB_VMDQ_NETDEV
5745                 if (!ring->vmdq_netdev) {
5746                         bytes += ring->rx_stats.bytes;
5747                         packets += ring->rx_stats.packets;
5748                 }
5749 #else
5750                 bytes += ring->rx_stats.bytes;
5751                 packets += ring->rx_stats.packets;
5752 #endif
5753         }
5754
5755         net_stats->rx_bytes = bytes;
5756         net_stats->rx_packets = packets;
5757
5758         bytes = 0;
5759         packets = 0;
5760         for (i = 0; i < adapter->num_tx_queues; i++) {
5761                 struct igb_ring *ring = adapter->tx_ring[i];
5762 #ifdef CONFIG_IGB_VMDQ_NETDEV
5763                 if (!ring->vmdq_netdev) {
5764                         bytes += ring->tx_stats.bytes;
5765                         packets += ring->tx_stats.packets;
5766                 }
5767 #else
5768                 bytes += ring->tx_stats.bytes;
5769                 packets += ring->tx_stats.packets;
5770 #endif
5771         }
5772         net_stats->tx_bytes = bytes;
5773         net_stats->tx_packets = packets;
5774
5775         /* read stats registers */
5776         adapter->stats.crcerrs += E1000_READ_REG(hw, E1000_CRCERRS);
5777         adapter->stats.gprc += E1000_READ_REG(hw, E1000_GPRC);
5778         adapter->stats.gorc += E1000_READ_REG(hw, E1000_GORCL);
5779         E1000_READ_REG(hw, E1000_GORCH); /* clear GORCL */
5780         adapter->stats.bprc += E1000_READ_REG(hw, E1000_BPRC);
5781         adapter->stats.mprc += E1000_READ_REG(hw, E1000_MPRC);
5782         adapter->stats.roc += E1000_READ_REG(hw, E1000_ROC);
5783
5784         adapter->stats.prc64 += E1000_READ_REG(hw, E1000_PRC64);
5785         adapter->stats.prc127 += E1000_READ_REG(hw, E1000_PRC127);
5786         adapter->stats.prc255 += E1000_READ_REG(hw, E1000_PRC255);
5787         adapter->stats.prc511 += E1000_READ_REG(hw, E1000_PRC511);
5788         adapter->stats.prc1023 += E1000_READ_REG(hw, E1000_PRC1023);
5789         adapter->stats.prc1522 += E1000_READ_REG(hw, E1000_PRC1522);
5790         adapter->stats.symerrs += E1000_READ_REG(hw, E1000_SYMERRS);
5791         adapter->stats.sec += E1000_READ_REG(hw, E1000_SEC);
5792
5793         mpc = E1000_READ_REG(hw, E1000_MPC);
5794         adapter->stats.mpc += mpc;
5795         net_stats->rx_fifo_errors += mpc;
5796         adapter->stats.scc += E1000_READ_REG(hw, E1000_SCC);
5797         adapter->stats.ecol += E1000_READ_REG(hw, E1000_ECOL);
5798         adapter->stats.mcc += E1000_READ_REG(hw, E1000_MCC);
5799         adapter->stats.latecol += E1000_READ_REG(hw, E1000_LATECOL);
5800         adapter->stats.dc += E1000_READ_REG(hw, E1000_DC);
5801         adapter->stats.rlec += E1000_READ_REG(hw, E1000_RLEC);
5802         adapter->stats.xonrxc += E1000_READ_REG(hw, E1000_XONRXC);
5803         adapter->stats.xontxc += E1000_READ_REG(hw, E1000_XONTXC);
5804         adapter->stats.xoffrxc += E1000_READ_REG(hw, E1000_XOFFRXC);
5805         adapter->stats.xofftxc += E1000_READ_REG(hw, E1000_XOFFTXC);
5806         adapter->stats.fcruc += E1000_READ_REG(hw, E1000_FCRUC);
5807         adapter->stats.gptc += E1000_READ_REG(hw, E1000_GPTC);
5808         adapter->stats.gotc += E1000_READ_REG(hw, E1000_GOTCL);
5809         E1000_READ_REG(hw, E1000_GOTCH); /* clear GOTCL */
5810         adapter->stats.rnbc += E1000_READ_REG(hw, E1000_RNBC);
5811         adapter->stats.ruc += E1000_READ_REG(hw, E1000_RUC);
5812         adapter->stats.rfc += E1000_READ_REG(hw, E1000_RFC);
5813         adapter->stats.rjc += E1000_READ_REG(hw, E1000_RJC);
5814         adapter->stats.tor += E1000_READ_REG(hw, E1000_TORH);
5815         adapter->stats.tot += E1000_READ_REG(hw, E1000_TOTH);
5816         adapter->stats.tpr += E1000_READ_REG(hw, E1000_TPR);
5817
5818         adapter->stats.ptc64 += E1000_READ_REG(hw, E1000_PTC64);
5819         adapter->stats.ptc127 += E1000_READ_REG(hw, E1000_PTC127);
5820         adapter->stats.ptc255 += E1000_READ_REG(hw, E1000_PTC255);
5821         adapter->stats.ptc511 += E1000_READ_REG(hw, E1000_PTC511);
5822         adapter->stats.ptc1023 += E1000_READ_REG(hw, E1000_PTC1023);
5823         adapter->stats.ptc1522 += E1000_READ_REG(hw, E1000_PTC1522);
5824
5825         adapter->stats.mptc += E1000_READ_REG(hw, E1000_MPTC);
5826         adapter->stats.bptc += E1000_READ_REG(hw, E1000_BPTC);
5827
5828         adapter->stats.tpt += E1000_READ_REG(hw, E1000_TPT);
5829         adapter->stats.colc += E1000_READ_REG(hw, E1000_COLC);
5830
5831         adapter->stats.algnerrc += E1000_READ_REG(hw, E1000_ALGNERRC);
5832         /* read internal phy sepecific stats */
5833         reg = E1000_READ_REG(hw, E1000_CTRL_EXT);
5834         if (!(reg & E1000_CTRL_EXT_LINK_MODE_MASK)) {
5835                 adapter->stats.rxerrc += E1000_READ_REG(hw, E1000_RXERRC);
5836
5837                 /* this stat has invalid values on i210/i211 */
5838                 if ((hw->mac.type != e1000_i210) &&
5839                     (hw->mac.type != e1000_i211))
5840                         adapter->stats.tncrs += E1000_READ_REG(hw, E1000_TNCRS);
5841         }
5842         adapter->stats.tsctc += E1000_READ_REG(hw, E1000_TSCTC);
5843         adapter->stats.tsctfc += E1000_READ_REG(hw, E1000_TSCTFC);
5844
5845         adapter->stats.iac += E1000_READ_REG(hw, E1000_IAC);
5846         adapter->stats.icrxoc += E1000_READ_REG(hw, E1000_ICRXOC);
5847         adapter->stats.icrxptc += E1000_READ_REG(hw, E1000_ICRXPTC);
5848         adapter->stats.icrxatc += E1000_READ_REG(hw, E1000_ICRXATC);
5849         adapter->stats.ictxptc += E1000_READ_REG(hw, E1000_ICTXPTC);
5850         adapter->stats.ictxatc += E1000_READ_REG(hw, E1000_ICTXATC);
5851         adapter->stats.ictxqec += E1000_READ_REG(hw, E1000_ICTXQEC);
5852         adapter->stats.ictxqmtc += E1000_READ_REG(hw, E1000_ICTXQMTC);
5853         adapter->stats.icrxdmtc += E1000_READ_REG(hw, E1000_ICRXDMTC);
5854
5855         /* Fill out the OS statistics structure */
5856         net_stats->multicast = adapter->stats.mprc;
5857         net_stats->collisions = adapter->stats.colc;
5858
5859         /* Rx Errors */
5860
5861         /* RLEC on some newer hardware can be incorrect so build
5862          * our own version based on RUC and ROC */
5863         net_stats->rx_errors = adapter->stats.rxerrc +
5864                 adapter->stats.crcerrs + adapter->stats.algnerrc +
5865                 adapter->stats.ruc + adapter->stats.roc +
5866                 adapter->stats.cexterr;
5867         net_stats->rx_length_errors = adapter->stats.ruc +
5868                                       adapter->stats.roc;
5869         net_stats->rx_crc_errors = adapter->stats.crcerrs;
5870         net_stats->rx_frame_errors = adapter->stats.algnerrc;
5871         net_stats->rx_missed_errors = adapter->stats.mpc;
5872
5873         /* Tx Errors */
5874         net_stats->tx_errors = adapter->stats.ecol +
5875                                adapter->stats.latecol;
5876         net_stats->tx_aborted_errors = adapter->stats.ecol;
5877         net_stats->tx_window_errors = adapter->stats.latecol;
5878         net_stats->tx_carrier_errors = adapter->stats.tncrs;
5879
5880         /* Tx Dropped needs to be maintained elsewhere */
5881
5882         /* Phy Stats */
5883         if (hw->phy.media_type == e1000_media_type_copper) {
5884                 if ((adapter->link_speed == SPEED_1000) &&
5885                    (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
5886                         phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
5887                         adapter->phy_stats.idle_errors += phy_tmp;
5888                 }
5889         }
5890
5891         /* Management Stats */
5892         adapter->stats.mgptc += E1000_READ_REG(hw, E1000_MGTPTC);
5893         adapter->stats.mgprc += E1000_READ_REG(hw, E1000_MGTPRC);
5894         if (hw->mac.type > e1000_82580) {
5895                 adapter->stats.o2bgptc += E1000_READ_REG(hw, E1000_O2BGPTC);
5896                 adapter->stats.o2bspc += E1000_READ_REG(hw, E1000_O2BSPC);
5897                 adapter->stats.b2ospc += E1000_READ_REG(hw, E1000_B2OSPC);
5898                 adapter->stats.b2ogprc += E1000_READ_REG(hw, E1000_B2OGPRC);
5899         }
5900 }
5901
5902 static irqreturn_t igb_msix_other(int irq, void *data)
5903 {
5904         struct igb_adapter *adapter = data;
5905         struct e1000_hw *hw = &adapter->hw;
5906         u32 icr = E1000_READ_REG(hw, E1000_ICR);
5907         /* reading ICR causes bit 31 of EICR to be cleared */
5908
5909         if (icr & E1000_ICR_DRSTA)
5910                 schedule_work(&adapter->reset_task);
5911
5912         if (icr & E1000_ICR_DOUTSYNC) {
5913                 /* HW is reporting DMA is out of sync */
5914                 adapter->stats.doosync++;
5915                 /* The DMA Out of Sync is also indication of a spoof event
5916                  * in IOV mode. Check the Wrong VM Behavior register to
5917                  * see if it is really a spoof event. */
5918                 igb_check_wvbr(adapter);
5919         }
5920
5921         /* Check for a mailbox event */
5922         if (icr & E1000_ICR_VMMB)
5923                 igb_msg_task(adapter);
5924
5925         if (icr & E1000_ICR_LSC) {
5926                 hw->mac.get_link_status = 1;
5927                 /* guard against interrupt when we're going down */
5928                 if (!test_bit(__IGB_DOWN, &adapter->state))
5929                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
5930         }
5931
5932 #ifdef HAVE_PTP_1588_CLOCK
5933         if (icr & E1000_ICR_TS) {
5934                 u32 tsicr = E1000_READ_REG(hw, E1000_TSICR);
5935
5936                 if (tsicr & E1000_TSICR_TXTS) {
5937                         /* acknowledge the interrupt */
5938                         E1000_WRITE_REG(hw, E1000_TSICR, E1000_TSICR_TXTS);
5939                         /* retrieve hardware timestamp */
5940                         schedule_work(&adapter->ptp_tx_work);
5941                 }
5942         }
5943 #endif /* HAVE_PTP_1588_CLOCK */
5944
5945         /* Check for MDD event */
5946         if (icr & E1000_ICR_MDDET)
5947                 igb_process_mdd_event(adapter);
5948
5949         E1000_WRITE_REG(hw, E1000_EIMS, adapter->eims_other);
5950
5951         return IRQ_HANDLED;
5952 }
5953
5954 static void igb_write_itr(struct igb_q_vector *q_vector)
5955 {
5956         struct igb_adapter *adapter = q_vector->adapter;
5957         u32 itr_val = q_vector->itr_val & 0x7FFC;
5958
5959         if (!q_vector->set_itr)
5960                 return;
5961
5962         if (!itr_val)
5963                 itr_val = 0x4;
5964
5965         if (adapter->hw.mac.type == e1000_82575)
5966                 itr_val |= itr_val << 16;
5967         else
5968                 itr_val |= E1000_EITR_CNT_IGNR;
5969
5970         writel(itr_val, q_vector->itr_register);
5971         q_vector->set_itr = 0;
5972 }
5973
5974 static irqreturn_t igb_msix_ring(int irq, void *data)
5975 {
5976         struct igb_q_vector *q_vector = data;
5977
5978         /* Write the ITR value calculated from the previous interrupt. */
5979         igb_write_itr(q_vector);
5980
5981         napi_schedule(&q_vector->napi);
5982
5983         return IRQ_HANDLED;
5984 }
5985
5986 #ifdef IGB_DCA
5987 static void igb_update_tx_dca(struct igb_adapter *adapter,
5988                               struct igb_ring *tx_ring,
5989                               int cpu)
5990 {
5991         struct e1000_hw *hw = &adapter->hw;
5992         u32 txctrl = dca3_get_tag(tx_ring->dev, cpu);
5993
5994         if (hw->mac.type != e1000_82575)
5995                 txctrl <<= E1000_DCA_TXCTRL_CPUID_SHIFT_82576;
5996
5997         /*
5998          * We can enable relaxed ordering for reads, but not writes when
5999          * DCA is enabled.  This is due to a known issue in some chipsets
6000          * which will cause the DCA tag to be cleared.
6001          */
6002         txctrl |= E1000_DCA_TXCTRL_DESC_RRO_EN |
6003                   E1000_DCA_TXCTRL_DATA_RRO_EN |
6004                   E1000_DCA_TXCTRL_DESC_DCA_EN;
6005
6006         E1000_WRITE_REG(hw, E1000_DCA_TXCTRL(tx_ring->reg_idx), txctrl);
6007 }
6008
6009 static void igb_update_rx_dca(struct igb_adapter *adapter,
6010                               struct igb_ring *rx_ring,
6011                               int cpu)
6012 {
6013         struct e1000_hw *hw = &adapter->hw;
6014         u32 rxctrl = dca3_get_tag(&adapter->pdev->dev, cpu);
6015
6016         if (hw->mac.type != e1000_82575)
6017                 rxctrl <<= E1000_DCA_RXCTRL_CPUID_SHIFT_82576;
6018
6019         /*
6020          * We can enable relaxed ordering for reads, but not writes when
6021          * DCA is enabled.  This is due to a known issue in some chipsets
6022          * which will cause the DCA tag to be cleared.
6023          */
6024         rxctrl |= E1000_DCA_RXCTRL_DESC_RRO_EN |
6025                   E1000_DCA_RXCTRL_DESC_DCA_EN;
6026
6027         E1000_WRITE_REG(hw, E1000_DCA_RXCTRL(rx_ring->reg_idx), rxctrl);
6028 }
6029
6030 static void igb_update_dca(struct igb_q_vector *q_vector)
6031 {
6032         struct igb_adapter *adapter = q_vector->adapter;
6033         int cpu = get_cpu();
6034
6035         if (q_vector->cpu == cpu)
6036                 goto out_no_update;
6037
6038         if (q_vector->tx.ring)
6039                 igb_update_tx_dca(adapter, q_vector->tx.ring, cpu);
6040
6041         if (q_vector->rx.ring)
6042                 igb_update_rx_dca(adapter, q_vector->rx.ring, cpu);
6043
6044         q_vector->cpu = cpu;
6045 out_no_update:
6046         put_cpu();
6047 }
6048
6049 static void igb_setup_dca(struct igb_adapter *adapter)
6050 {
6051         struct e1000_hw *hw = &adapter->hw;
6052         int i;
6053
6054         if (!(adapter->flags & IGB_FLAG_DCA_ENABLED))
6055                 return;
6056
6057         /* Always use CB2 mode, difference is masked in the CB driver. */
6058         E1000_WRITE_REG(hw, E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_MODE_CB2);
6059
6060         for (i = 0; i < adapter->num_q_vectors; i++) {
6061                 adapter->q_vector[i]->cpu = -1;
6062                 igb_update_dca(adapter->q_vector[i]);
6063         }
6064 }
6065
6066 static int __igb_notify_dca(struct device *dev, void *data)
6067 {
6068         struct net_device *netdev = dev_get_drvdata(dev);
6069         struct igb_adapter *adapter = netdev_priv(netdev);
6070         struct pci_dev *pdev = adapter->pdev;
6071         struct e1000_hw *hw = &adapter->hw;
6072         unsigned long event = *(unsigned long *)data;
6073
6074         switch (event) {
6075         case DCA_PROVIDER_ADD:
6076                 /* if already enabled, don't do it again */
6077                 if (adapter->flags & IGB_FLAG_DCA_ENABLED)
6078                         break;
6079                 if (dca_add_requester(dev) == E1000_SUCCESS) {
6080                         adapter->flags |= IGB_FLAG_DCA_ENABLED;
6081                         dev_info(pci_dev_to_dev(pdev), "DCA enabled\n");
6082                         igb_setup_dca(adapter);
6083                         break;
6084                 }
6085                 /* Fall Through since DCA is disabled. */
6086         case DCA_PROVIDER_REMOVE:
6087                 if (adapter->flags & IGB_FLAG_DCA_ENABLED) {
6088                         /* without this a class_device is left
6089                          * hanging around in the sysfs model */
6090                         dca_remove_requester(dev);
6091                         dev_info(pci_dev_to_dev(pdev), "DCA disabled\n");
6092                         adapter->flags &= ~IGB_FLAG_DCA_ENABLED;
6093                         E1000_WRITE_REG(hw, E1000_DCA_CTRL, E1000_DCA_CTRL_DCA_DISABLE);
6094                 }
6095                 break;
6096         }
6097
6098         return E1000_SUCCESS;
6099 }
6100
6101 static int igb_notify_dca(struct notifier_block *nb, unsigned long event,
6102                           void *p)
6103 {
6104         int ret_val;
6105
6106         ret_val = driver_for_each_device(&igb_driver.driver, NULL, &event,
6107                                          __igb_notify_dca);
6108
6109         return ret_val ? NOTIFY_BAD : NOTIFY_DONE;
6110 }
6111 #endif /* IGB_DCA */
6112
6113 static int igb_vf_configure(struct igb_adapter *adapter, int vf)
6114 {
6115         unsigned char mac_addr[ETH_ALEN];
6116
6117         random_ether_addr(mac_addr);
6118         igb_set_vf_mac(adapter, vf, mac_addr);
6119
6120 #ifdef IFLA_VF_MAX
6121 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
6122         /* By default spoof check is enabled for all VFs */
6123         adapter->vf_data[vf].spoofchk_enabled = true;
6124 #endif
6125 #endif
6126
6127         return true;
6128 }
6129
6130 static void igb_ping_all_vfs(struct igb_adapter *adapter)
6131 {
6132         struct e1000_hw *hw = &adapter->hw;
6133         u32 ping;
6134         int i;
6135
6136         for (i = 0 ; i < adapter->vfs_allocated_count; i++) {
6137                 ping = E1000_PF_CONTROL_MSG;
6138                 if (adapter->vf_data[i].flags & IGB_VF_FLAG_CTS)
6139                         ping |= E1000_VT_MSGTYPE_CTS;
6140                 e1000_write_mbx(hw, &ping, 1, i);
6141         }
6142 }
6143
6144 /**
6145  *  igb_mta_set_ - Set multicast filter table address
6146  *  @adapter: pointer to the adapter structure
6147  *  @hash_value: determines the MTA register and bit to set
6148  *
6149  *  The multicast table address is a register array of 32-bit registers.
6150  *  The hash_value is used to determine what register the bit is in, the
6151  *  current value is read, the new bit is OR'd in and the new value is
6152  *  written back into the register.
6153  **/
6154 void igb_mta_set(struct igb_adapter *adapter, u32 hash_value)
6155 {
6156         struct e1000_hw *hw = &adapter->hw;
6157         u32 hash_bit, hash_reg, mta;
6158
6159         /*
6160          * The MTA is a register array of 32-bit registers. It is
6161          * treated like an array of (32*mta_reg_count) bits.  We want to
6162          * set bit BitArray[hash_value]. So we figure out what register
6163          * the bit is in, read it, OR in the new bit, then write
6164          * back the new value.  The (hw->mac.mta_reg_count - 1) serves as a
6165          * mask to bits 31:5 of the hash value which gives us the
6166          * register we're modifying.  The hash bit within that register
6167          * is determined by the lower 5 bits of the hash value.
6168          */
6169         hash_reg = (hash_value >> 5) & (hw->mac.mta_reg_count - 1);
6170         hash_bit = hash_value & 0x1F;
6171
6172         mta = E1000_READ_REG_ARRAY(hw, E1000_MTA, hash_reg);
6173
6174         mta |= (1 << hash_bit);
6175
6176         E1000_WRITE_REG_ARRAY(hw, E1000_MTA, hash_reg, mta);
6177         E1000_WRITE_FLUSH(hw);
6178 }
6179
6180 static int igb_set_vf_promisc(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
6181 {
6182
6183         struct e1000_hw *hw = &adapter->hw;
6184         u32 vmolr = E1000_READ_REG(hw, E1000_VMOLR(vf));
6185         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6186
6187         vf_data->flags &= ~(IGB_VF_FLAG_UNI_PROMISC |
6188                             IGB_VF_FLAG_MULTI_PROMISC);
6189         vmolr &= ~(E1000_VMOLR_ROPE | E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
6190
6191 #ifdef IGB_ENABLE_VF_PROMISC
6192         if (*msgbuf & E1000_VF_SET_PROMISC_UNICAST) {
6193                 vmolr |= E1000_VMOLR_ROPE;
6194                 vf_data->flags |= IGB_VF_FLAG_UNI_PROMISC;
6195                 *msgbuf &= ~E1000_VF_SET_PROMISC_UNICAST;
6196         }
6197 #endif
6198         if (*msgbuf & E1000_VF_SET_PROMISC_MULTICAST) {
6199                 vmolr |= E1000_VMOLR_MPME;
6200                 vf_data->flags |= IGB_VF_FLAG_MULTI_PROMISC;
6201                 *msgbuf &= ~E1000_VF_SET_PROMISC_MULTICAST;
6202         } else {
6203                 /*
6204                  * if we have hashes and we are clearing a multicast promisc
6205                  * flag we need to write the hashes to the MTA as this step
6206                  * was previously skipped
6207                  */
6208                 if (vf_data->num_vf_mc_hashes > 30) {
6209                         vmolr |= E1000_VMOLR_MPME;
6210                 } else if (vf_data->num_vf_mc_hashes) {
6211                         int j;
6212                         vmolr |= E1000_VMOLR_ROMPE;
6213                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6214                                 igb_mta_set(adapter, vf_data->vf_mc_hashes[j]);
6215                 }
6216         }
6217
6218         E1000_WRITE_REG(hw, E1000_VMOLR(vf), vmolr);
6219
6220         /* there are flags left unprocessed, likely not supported */
6221         if (*msgbuf & E1000_VT_MSGINFO_MASK)
6222                 return -EINVAL;
6223
6224         return 0;
6225
6226 }
6227
6228 static int igb_set_vf_multicasts(struct igb_adapter *adapter,
6229                                   u32 *msgbuf, u32 vf)
6230 {
6231         int n = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6232         u16 *hash_list = (u16 *)&msgbuf[1];
6233         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6234         int i;
6235
6236         /* salt away the number of multicast addresses assigned
6237          * to this VF for later use to restore when the PF multi cast
6238          * list changes
6239          */
6240         vf_data->num_vf_mc_hashes = n;
6241
6242         /* only up to 30 hash values supported */
6243         if (n > 30)
6244                 n = 30;
6245
6246         /* store the hashes for later use */
6247         for (i = 0; i < n; i++)
6248                 vf_data->vf_mc_hashes[i] = hash_list[i];
6249
6250         /* Flush and reset the mta with the new values */
6251         igb_set_rx_mode(adapter->netdev);
6252
6253         return 0;
6254 }
6255
6256 static void igb_restore_vf_multicasts(struct igb_adapter *adapter)
6257 {
6258         struct e1000_hw *hw = &adapter->hw;
6259         struct vf_data_storage *vf_data;
6260         int i, j;
6261
6262         for (i = 0; i < adapter->vfs_allocated_count; i++) {
6263                 u32 vmolr = E1000_READ_REG(hw, E1000_VMOLR(i));
6264                 vmolr &= ~(E1000_VMOLR_ROMPE | E1000_VMOLR_MPME);
6265
6266                 vf_data = &adapter->vf_data[i];
6267
6268                 if ((vf_data->num_vf_mc_hashes > 30) ||
6269                     (vf_data->flags & IGB_VF_FLAG_MULTI_PROMISC)) {
6270                         vmolr |= E1000_VMOLR_MPME;
6271                 } else if (vf_data->num_vf_mc_hashes) {
6272                         vmolr |= E1000_VMOLR_ROMPE;
6273                         for (j = 0; j < vf_data->num_vf_mc_hashes; j++)
6274                                 igb_mta_set(adapter, vf_data->vf_mc_hashes[j]);
6275                 }
6276                 E1000_WRITE_REG(hw, E1000_VMOLR(i), vmolr);
6277         }
6278 }
6279
6280 static void igb_clear_vf_vfta(struct igb_adapter *adapter, u32 vf)
6281 {
6282         struct e1000_hw *hw = &adapter->hw;
6283         u32 pool_mask, reg, vid;
6284         u16 vlan_default;
6285         int i;
6286
6287         pool_mask = 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
6288
6289         /* Find the vlan filter for this id */
6290         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6291                 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6292
6293                 /* remove the vf from the pool */
6294                 reg &= ~pool_mask;
6295
6296                 /* if pool is empty then remove entry from vfta */
6297                 if (!(reg & E1000_VLVF_POOLSEL_MASK) &&
6298                     (reg & E1000_VLVF_VLANID_ENABLE)) {
6299                         reg = 0;
6300                         vid = reg & E1000_VLVF_VLANID_MASK;
6301                         igb_vfta_set(adapter, vid, FALSE);
6302                 }
6303
6304                 E1000_WRITE_REG(hw, E1000_VLVF(i), reg);
6305         }
6306
6307         adapter->vf_data[vf].vlans_enabled = 0;
6308
6309         vlan_default = adapter->vf_data[vf].default_vf_vlan_id;
6310         if (vlan_default)
6311                 igb_vlvf_set(adapter, vlan_default, true, vf);
6312 }
6313
6314 s32 igb_vlvf_set(struct igb_adapter *adapter, u32 vid, bool add, u32 vf)
6315 {
6316         struct e1000_hw *hw = &adapter->hw;
6317         u32 reg, i;
6318
6319         /* The vlvf table only exists on 82576 hardware and newer */
6320         if (hw->mac.type < e1000_82576)
6321                 return -1;
6322
6323         /* we only need to do this if VMDq is enabled */
6324         if (!adapter->vmdq_pools)
6325                 return -1;
6326
6327         /* Find the vlan filter for this id */
6328         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6329                 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6330                 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
6331                     vid == (reg & E1000_VLVF_VLANID_MASK))
6332                         break;
6333         }
6334
6335         if (add) {
6336                 if (i == E1000_VLVF_ARRAY_SIZE) {
6337                         /* Did not find a matching VLAN ID entry that was
6338                          * enabled.  Search for a free filter entry, i.e.
6339                          * one without the enable bit set
6340                          */
6341                         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6342                                 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6343                                 if (!(reg & E1000_VLVF_VLANID_ENABLE))
6344                                         break;
6345                         }
6346                 }
6347                 if (i < E1000_VLVF_ARRAY_SIZE) {
6348                         /* Found an enabled/available entry */
6349                         reg |= 1 << (E1000_VLVF_POOLSEL_SHIFT + vf);
6350
6351                         /* if !enabled we need to set this up in vfta */
6352                         if (!(reg & E1000_VLVF_VLANID_ENABLE)) {
6353                                 /* add VID to filter table */
6354                                 igb_vfta_set(adapter, vid, TRUE);
6355                                 reg |= E1000_VLVF_VLANID_ENABLE;
6356                         }
6357                         reg &= ~E1000_VLVF_VLANID_MASK;
6358                         reg |= vid;
6359                         E1000_WRITE_REG(hw, E1000_VLVF(i), reg);
6360
6361                         /* do not modify RLPML for PF devices */
6362                         if (vf >= adapter->vfs_allocated_count)
6363                                 return E1000_SUCCESS;
6364
6365                         if (!adapter->vf_data[vf].vlans_enabled) {
6366                                 u32 size;
6367                                 reg = E1000_READ_REG(hw, E1000_VMOLR(vf));
6368                                 size = reg & E1000_VMOLR_RLPML_MASK;
6369                                 size += 4;
6370                                 reg &= ~E1000_VMOLR_RLPML_MASK;
6371                                 reg |= size;
6372                                 E1000_WRITE_REG(hw, E1000_VMOLR(vf), reg);
6373                         }
6374
6375                         adapter->vf_data[vf].vlans_enabled++;
6376                 }
6377         } else {
6378                 if (i < E1000_VLVF_ARRAY_SIZE) {
6379                         /* remove vf from the pool */
6380                         reg &= ~(1 << (E1000_VLVF_POOLSEL_SHIFT + vf));
6381                         /* if pool is empty then remove entry from vfta */
6382                         if (!(reg & E1000_VLVF_POOLSEL_MASK)) {
6383                                 reg = 0;
6384                                 igb_vfta_set(adapter, vid, FALSE);
6385                         }
6386                         E1000_WRITE_REG(hw, E1000_VLVF(i), reg);
6387
6388                         /* do not modify RLPML for PF devices */
6389                         if (vf >= adapter->vfs_allocated_count)
6390                                 return E1000_SUCCESS;
6391
6392                         adapter->vf_data[vf].vlans_enabled--;
6393                         if (!adapter->vf_data[vf].vlans_enabled) {
6394                                 u32 size;
6395                                 reg = E1000_READ_REG(hw, E1000_VMOLR(vf));
6396                                 size = reg & E1000_VMOLR_RLPML_MASK;
6397                                 size -= 4;
6398                                 reg &= ~E1000_VMOLR_RLPML_MASK;
6399                                 reg |= size;
6400                                 E1000_WRITE_REG(hw, E1000_VMOLR(vf), reg);
6401                         }
6402                 }
6403         }
6404         return E1000_SUCCESS;
6405 }
6406
6407 #ifdef IFLA_VF_MAX
6408 static void igb_set_vmvir(struct igb_adapter *adapter, u32 vid, u32 vf)
6409 {
6410         struct e1000_hw *hw = &adapter->hw;
6411
6412         if (vid)
6413                 E1000_WRITE_REG(hw, E1000_VMVIR(vf), (vid | E1000_VMVIR_VLANA_DEFAULT));
6414         else
6415                 E1000_WRITE_REG(hw, E1000_VMVIR(vf), 0);
6416 }
6417
6418 static int igb_ndo_set_vf_vlan(struct net_device *netdev,
6419 #ifdef HAVE_VF_VLAN_PROTO
6420                                int vf, u16 vlan, u8 qos, __be16 vlan_proto)
6421 #else
6422                                int vf, u16 vlan, u8 qos)
6423 #endif
6424 {
6425         int err = 0;
6426         struct igb_adapter *adapter = netdev_priv(netdev);
6427
6428         /* VLAN IDs accepted range 0-4094 */
6429         if ((vf >= adapter->vfs_allocated_count) || (vlan > VLAN_VID_MASK-1) || (qos > 7))
6430                 return -EINVAL;
6431
6432 #ifdef HAVE_VF_VLAN_PROTO
6433         if (vlan_proto != htons(ETH_P_8021Q))
6434                 return -EPROTONOSUPPORT;
6435 #endif
6436
6437         if (vlan || qos) {
6438                 err = igb_vlvf_set(adapter, vlan, !!vlan, vf);
6439                 if (err)
6440                         goto out;
6441                 igb_set_vmvir(adapter, vlan | (qos << VLAN_PRIO_SHIFT), vf);
6442                 igb_set_vmolr(adapter, vf, !vlan);
6443                 adapter->vf_data[vf].pf_vlan = vlan;
6444                 adapter->vf_data[vf].pf_qos = qos;
6445                 igb_set_vf_vlan_strip(adapter, vf, true);
6446                 dev_info(&adapter->pdev->dev,
6447                          "Setting VLAN %d, QOS 0x%x on VF %d\n", vlan, qos, vf);
6448                 if (test_bit(__IGB_DOWN, &adapter->state)) {
6449                         dev_warn(&adapter->pdev->dev,
6450                                  "The VF VLAN has been set,"
6451                                  " but the PF device is not up.\n");
6452                         dev_warn(&adapter->pdev->dev,
6453                                  "Bring the PF device up before"
6454                                  " attempting to use the VF device.\n");
6455                 }
6456         } else {
6457                 if (adapter->vf_data[vf].pf_vlan)
6458                         dev_info(&adapter->pdev->dev,
6459                                  "Clearing VLAN on VF %d\n", vf);
6460                 igb_vlvf_set(adapter, adapter->vf_data[vf].pf_vlan,
6461                                    false, vf);
6462                 igb_set_vmvir(adapter, vlan, vf);
6463                 igb_set_vmolr(adapter, vf, true);
6464                 igb_set_vf_vlan_strip(adapter, vf, false);
6465                 adapter->vf_data[vf].pf_vlan = 0;
6466                 adapter->vf_data[vf].pf_qos = 0;
6467        }
6468 out:
6469        return err;
6470 }
6471
6472 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
6473 static int igb_ndo_set_vf_spoofchk(struct net_device *netdev, int vf,
6474                                 bool setting)
6475 {
6476         struct igb_adapter *adapter = netdev_priv(netdev);
6477         struct e1000_hw *hw = &adapter->hw;
6478         u32 dtxswc, reg_offset;
6479
6480         if (!adapter->vfs_allocated_count)
6481                 return -EOPNOTSUPP;
6482
6483         if (vf >= adapter->vfs_allocated_count)
6484                 return -EINVAL;
6485
6486         reg_offset = (hw->mac.type == e1000_82576) ? E1000_DTXSWC : E1000_TXSWC;
6487         dtxswc = E1000_READ_REG(hw, reg_offset);
6488         if (setting)
6489                 dtxswc |= ((1 << vf) |
6490                            (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
6491         else
6492                 dtxswc &= ~((1 << vf) |
6493                             (1 << (vf + E1000_DTXSWC_VLAN_SPOOF_SHIFT)));
6494         E1000_WRITE_REG(hw, reg_offset, dtxswc);
6495
6496         adapter->vf_data[vf].spoofchk_enabled = setting;
6497         return E1000_SUCCESS;
6498 }
6499 #endif /* HAVE_VF_SPOOFCHK_CONFIGURE */
6500 #endif /* IFLA_VF_MAX */
6501
6502 static int igb_find_vlvf_entry(struct igb_adapter *adapter, int vid)
6503 {
6504         struct e1000_hw *hw = &adapter->hw;
6505         int i;
6506         u32 reg;
6507
6508         /* Find the vlan filter for this id */
6509         for (i = 0; i < E1000_VLVF_ARRAY_SIZE; i++) {
6510                 reg = E1000_READ_REG(hw, E1000_VLVF(i));
6511                 if ((reg & E1000_VLVF_VLANID_ENABLE) &&
6512                     vid == (reg & E1000_VLVF_VLANID_MASK))
6513                         break;
6514         }
6515
6516         if (i >= E1000_VLVF_ARRAY_SIZE)
6517                 i = -1;
6518
6519         return i;
6520 }
6521
6522 static int igb_set_vf_vlan(struct igb_adapter *adapter, u32 *msgbuf, u32 vf)
6523 {
6524         struct e1000_hw *hw = &adapter->hw;
6525         int add = (msgbuf[0] & E1000_VT_MSGINFO_MASK) >> E1000_VT_MSGINFO_SHIFT;
6526         int vid = (msgbuf[1] & E1000_VLVF_VLANID_MASK);
6527         int err = 0;
6528
6529         if (vid)
6530                 igb_set_vf_vlan_strip(adapter, vf, true);
6531         else
6532                 igb_set_vf_vlan_strip(adapter, vf, false);
6533
6534         /* If in promiscuous mode we need to make sure the PF also has
6535          * the VLAN filter set.
6536          */
6537         if (add && (adapter->netdev->flags & IFF_PROMISC))
6538                 err = igb_vlvf_set(adapter, vid, add,
6539                                    adapter->vfs_allocated_count);
6540         if (err)
6541                 goto out;
6542
6543         err = igb_vlvf_set(adapter, vid, add, vf);
6544
6545         if (err)
6546                 goto out;
6547
6548         /* Go through all the checks to see if the VLAN filter should
6549          * be wiped completely.
6550          */
6551         if (!add && (adapter->netdev->flags & IFF_PROMISC)) {
6552                 u32 vlvf, bits;
6553
6554                 int regndx = igb_find_vlvf_entry(adapter, vid);
6555                 if (regndx < 0)
6556                         goto out;
6557                 /* See if any other pools are set for this VLAN filter
6558                  * entry other than the PF.
6559                  */
6560                 vlvf = bits = E1000_READ_REG(hw, E1000_VLVF(regndx));
6561                 bits &= 1 << (E1000_VLVF_POOLSEL_SHIFT +
6562                               adapter->vfs_allocated_count);
6563                 /* If the filter was removed then ensure PF pool bit
6564                  * is cleared if the PF only added itself to the pool
6565                  * because the PF is in promiscuous mode.
6566                  */
6567                 if ((vlvf & VLAN_VID_MASK) == vid &&
6568 #ifndef HAVE_VLAN_RX_REGISTER
6569                     !test_bit(vid, adapter->active_vlans) &&
6570 #endif
6571                     !bits)
6572                         igb_vlvf_set(adapter, vid, add,
6573                                      adapter->vfs_allocated_count);
6574         }
6575
6576 out:
6577         return err;
6578 }
6579
6580 static inline void igb_vf_reset(struct igb_adapter *adapter, u32 vf)
6581 {
6582         struct e1000_hw *hw = &adapter->hw;
6583
6584         /* clear flags except flag that the PF has set the MAC */
6585         adapter->vf_data[vf].flags &= IGB_VF_FLAG_PF_SET_MAC;
6586         adapter->vf_data[vf].last_nack = jiffies;
6587
6588         /* reset offloads to defaults */
6589         igb_set_vmolr(adapter, vf, true);
6590
6591         /* reset vlans for device */
6592         igb_clear_vf_vfta(adapter, vf);
6593 #ifdef IFLA_VF_MAX
6594         if (adapter->vf_data[vf].pf_vlan)
6595                 igb_ndo_set_vf_vlan(adapter->netdev, vf,
6596                                     adapter->vf_data[vf].pf_vlan,
6597 #ifdef HAVE_VF_VLAN_PROTO
6598                                     adapter->vf_data[vf].pf_qos,
6599                                     htons(ETH_P_8021Q));
6600 #else
6601                                     adapter->vf_data[vf].pf_qos);
6602 #endif
6603         else
6604                 igb_clear_vf_vfta(adapter, vf);
6605 #endif
6606
6607         /* reset multicast table array for vf */
6608         adapter->vf_data[vf].num_vf_mc_hashes = 0;
6609
6610         /* Flush and reset the mta with the new values */
6611         igb_set_rx_mode(adapter->netdev);
6612
6613         /*
6614          * Reset the VFs TDWBAL and TDWBAH registers which are not
6615          * cleared by a VFLR
6616          */
6617         E1000_WRITE_REG(hw, E1000_TDWBAH(vf), 0);
6618         E1000_WRITE_REG(hw, E1000_TDWBAL(vf), 0);
6619         if (hw->mac.type == e1000_82576) {
6620                 E1000_WRITE_REG(hw, E1000_TDWBAH(IGB_MAX_VF_FUNCTIONS + vf), 0);
6621                 E1000_WRITE_REG(hw, E1000_TDWBAL(IGB_MAX_VF_FUNCTIONS + vf), 0);
6622         }
6623 }
6624
6625 static void igb_vf_reset_event(struct igb_adapter *adapter, u32 vf)
6626 {
6627         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6628
6629         /* generate a new mac address as we were hotplug removed/added */
6630         if (!(adapter->vf_data[vf].flags & IGB_VF_FLAG_PF_SET_MAC))
6631                 random_ether_addr(vf_mac);
6632
6633         /* process remaining reset events */
6634         igb_vf_reset(adapter, vf);
6635 }
6636
6637 static void igb_vf_reset_msg(struct igb_adapter *adapter, u32 vf)
6638 {
6639         struct e1000_hw *hw = &adapter->hw;
6640         unsigned char *vf_mac = adapter->vf_data[vf].vf_mac_addresses;
6641         u32 reg, msgbuf[3];
6642         u8 *addr = (u8 *)(&msgbuf[1]);
6643
6644         /* process all the same items cleared in a function level reset */
6645         igb_vf_reset(adapter, vf);
6646
6647         /* set vf mac address */
6648         igb_del_mac_filter(adapter, vf_mac, vf);
6649         igb_add_mac_filter(adapter, vf_mac, vf);
6650
6651         /* enable transmit and receive for vf */
6652         reg = E1000_READ_REG(hw, E1000_VFTE);
6653         E1000_WRITE_REG(hw, E1000_VFTE, reg | (1 << vf));
6654         reg = E1000_READ_REG(hw, E1000_VFRE);
6655         E1000_WRITE_REG(hw, E1000_VFRE, reg | (1 << vf));
6656
6657         adapter->vf_data[vf].flags |= IGB_VF_FLAG_CTS;
6658
6659         /* reply to reset with ack and vf mac address */
6660         msgbuf[0] = E1000_VF_RESET | E1000_VT_MSGTYPE_ACK;
6661         memcpy(addr, vf_mac, 6);
6662         e1000_write_mbx(hw, msgbuf, 3, vf);
6663 }
6664
6665 static int igb_set_vf_mac_addr(struct igb_adapter *adapter, u32 *msg, int vf)
6666 {
6667         /*
6668          * The VF MAC Address is stored in a packed array of bytes
6669          * starting at the second 32 bit word of the msg array
6670          */
6671         unsigned char *addr = (unsigned char *)&msg[1];
6672         int err = -1;
6673
6674         if (is_valid_ether_addr(addr))
6675                 err = igb_set_vf_mac(adapter, vf, addr);
6676
6677         return err;
6678 }
6679
6680 static void igb_rcv_ack_from_vf(struct igb_adapter *adapter, u32 vf)
6681 {
6682         struct e1000_hw *hw = &adapter->hw;
6683         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6684         u32 msg = E1000_VT_MSGTYPE_NACK;
6685
6686         /* if device isn't clear to send it shouldn't be reading either */
6687         if (!(vf_data->flags & IGB_VF_FLAG_CTS) &&
6688             time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
6689                 e1000_write_mbx(hw, &msg, 1, vf);
6690                 vf_data->last_nack = jiffies;
6691         }
6692 }
6693
6694 static void igb_rcv_msg_from_vf(struct igb_adapter *adapter, u32 vf)
6695 {
6696         struct pci_dev *pdev = adapter->pdev;
6697         u32 msgbuf[E1000_VFMAILBOX_SIZE];
6698         struct e1000_hw *hw = &adapter->hw;
6699         struct vf_data_storage *vf_data = &adapter->vf_data[vf];
6700         s32 retval;
6701
6702         retval = e1000_read_mbx(hw, msgbuf, E1000_VFMAILBOX_SIZE, vf);
6703
6704         if (retval) {
6705                 dev_err(pci_dev_to_dev(pdev), "Error receiving message from VF\n");
6706                 return;
6707         }
6708
6709         /* this is a message we already processed, do nothing */
6710         if (msgbuf[0] & (E1000_VT_MSGTYPE_ACK | E1000_VT_MSGTYPE_NACK))
6711                 return;
6712
6713         /*
6714          * until the vf completes a reset it should not be
6715          * allowed to start any configuration.
6716          */
6717
6718         if (msgbuf[0] == E1000_VF_RESET) {
6719                 igb_vf_reset_msg(adapter, vf);
6720                 return;
6721         }
6722
6723         if (!(vf_data->flags & IGB_VF_FLAG_CTS)) {
6724                 msgbuf[0] = E1000_VT_MSGTYPE_NACK;
6725                 if (time_after(jiffies, vf_data->last_nack + (2 * HZ))) {
6726                         e1000_write_mbx(hw, msgbuf, 1, vf);
6727                         vf_data->last_nack = jiffies;
6728                 }
6729                 return;
6730         }
6731
6732         switch ((msgbuf[0] & 0xFFFF)) {
6733         case E1000_VF_SET_MAC_ADDR:
6734                 retval = -EINVAL;
6735 #ifndef IGB_DISABLE_VF_MAC_SET
6736                 if (!(vf_data->flags & IGB_VF_FLAG_PF_SET_MAC))
6737                         retval = igb_set_vf_mac_addr(adapter, msgbuf, vf);
6738                 else
6739                         DPRINTK(DRV, INFO,
6740                                 "VF %d attempted to override administratively "
6741                                 "set MAC address\nReload the VF driver to "
6742                                 "resume operations\n", vf);
6743 #endif
6744                 break;
6745         case E1000_VF_SET_PROMISC:
6746                 retval = igb_set_vf_promisc(adapter, msgbuf, vf);
6747                 break;
6748         case E1000_VF_SET_MULTICAST:
6749                 retval = igb_set_vf_multicasts(adapter, msgbuf, vf);
6750                 break;
6751         case E1000_VF_SET_LPE:
6752                 retval = igb_set_vf_rlpml(adapter, msgbuf[1], vf);
6753                 break;
6754         case E1000_VF_SET_VLAN:
6755                 retval = -1;
6756 #ifdef IFLA_VF_MAX
6757                 if (vf_data->pf_vlan)
6758                         DPRINTK(DRV, INFO,
6759                                 "VF %d attempted to override administratively "
6760                                 "set VLAN tag\nReload the VF driver to "
6761                                 "resume operations\n", vf);
6762                 else
6763 #endif
6764                         retval = igb_set_vf_vlan(adapter, msgbuf, vf);
6765                 break;
6766         default:
6767                 dev_err(pci_dev_to_dev(pdev), "Unhandled Msg %08x\n", msgbuf[0]);
6768                 retval = -E1000_ERR_MBX;
6769                 break;
6770         }
6771
6772         /* notify the VF of the results of what it sent us */
6773         if (retval)
6774                 msgbuf[0] |= E1000_VT_MSGTYPE_NACK;
6775         else
6776                 msgbuf[0] |= E1000_VT_MSGTYPE_ACK;
6777
6778         msgbuf[0] |= E1000_VT_MSGTYPE_CTS;
6779
6780         e1000_write_mbx(hw, msgbuf, 1, vf);
6781 }
6782
6783 static void igb_msg_task(struct igb_adapter *adapter)
6784 {
6785         struct e1000_hw *hw = &adapter->hw;
6786         u32 vf;
6787
6788         for (vf = 0; vf < adapter->vfs_allocated_count; vf++) {
6789                 /* process any reset requests */
6790                 if (!e1000_check_for_rst(hw, vf))
6791                         igb_vf_reset_event(adapter, vf);
6792
6793                 /* process any messages pending */
6794                 if (!e1000_check_for_msg(hw, vf))
6795                         igb_rcv_msg_from_vf(adapter, vf);
6796
6797                 /* process any acks */
6798                 if (!e1000_check_for_ack(hw, vf))
6799                         igb_rcv_ack_from_vf(adapter, vf);
6800         }
6801 }
6802
6803 /**
6804  *  igb_set_uta - Set unicast filter table address
6805  *  @adapter: board private structure
6806  *
6807  *  The unicast table address is a register array of 32-bit registers.
6808  *  The table is meant to be used in a way similar to how the MTA is used
6809  *  however due to certain limitations in the hardware it is necessary to
6810  *  set all the hash bits to 1 and use the VMOLR ROPE bit as a promiscuous
6811  *  enable bit to allow vlan tag stripping when promiscuous mode is enabled
6812  **/
6813 static void igb_set_uta(struct igb_adapter *adapter)
6814 {
6815         struct e1000_hw *hw = &adapter->hw;
6816         int i;
6817
6818         /* The UTA table only exists on 82576 hardware and newer */
6819         if (hw->mac.type < e1000_82576)
6820                 return;
6821
6822         /* we only need to do this if VMDq is enabled */
6823         if (!adapter->vmdq_pools)
6824                 return;
6825
6826         for (i = 0; i < hw->mac.uta_reg_count; i++)
6827                 E1000_WRITE_REG_ARRAY(hw, E1000_UTA, i, ~0);
6828 }
6829
6830 /**
6831  * igb_intr_msi - Interrupt Handler
6832  * @irq: interrupt number
6833  * @data: pointer to a network interface device structure
6834  **/
6835 static irqreturn_t igb_intr_msi(int irq, void *data)
6836 {
6837         struct igb_adapter *adapter = data;
6838         struct igb_q_vector *q_vector = adapter->q_vector[0];
6839         struct e1000_hw *hw = &adapter->hw;
6840         /* read ICR disables interrupts using IAM */
6841         u32 icr = E1000_READ_REG(hw, E1000_ICR);
6842
6843         igb_write_itr(q_vector);
6844
6845         if (icr & E1000_ICR_DRSTA)
6846                 schedule_work(&adapter->reset_task);
6847
6848         if (icr & E1000_ICR_DOUTSYNC) {
6849                 /* HW is reporting DMA is out of sync */
6850                 adapter->stats.doosync++;
6851         }
6852
6853         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6854                 hw->mac.get_link_status = 1;
6855                 if (!test_bit(__IGB_DOWN, &adapter->state))
6856                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6857         }
6858
6859 #ifdef HAVE_PTP_1588_CLOCK
6860         if (icr & E1000_ICR_TS) {
6861                 u32 tsicr = E1000_READ_REG(hw, E1000_TSICR);
6862
6863                 if (tsicr & E1000_TSICR_TXTS) {
6864                         /* acknowledge the interrupt */
6865                         E1000_WRITE_REG(hw, E1000_TSICR, E1000_TSICR_TXTS);
6866                         /* retrieve hardware timestamp */
6867                         schedule_work(&adapter->ptp_tx_work);
6868                 }
6869         }
6870 #endif /* HAVE_PTP_1588_CLOCK */
6871
6872         napi_schedule(&q_vector->napi);
6873
6874         return IRQ_HANDLED;
6875 }
6876
6877 /**
6878  * igb_intr - Legacy Interrupt Handler
6879  * @irq: interrupt number
6880  * @data: pointer to a network interface device structure
6881  **/
6882 static irqreturn_t igb_intr(int irq, void *data)
6883 {
6884         struct igb_adapter *adapter = data;
6885         struct igb_q_vector *q_vector = adapter->q_vector[0];
6886         struct e1000_hw *hw = &adapter->hw;
6887         /* Interrupt Auto-Mask...upon reading ICR, interrupts are masked.  No
6888          * need for the IMC write */
6889         u32 icr = E1000_READ_REG(hw, E1000_ICR);
6890
6891         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
6892          * not set, then the adapter didn't send an interrupt */
6893         if (!(icr & E1000_ICR_INT_ASSERTED))
6894                 return IRQ_NONE;
6895
6896         igb_write_itr(q_vector);
6897
6898         if (icr & E1000_ICR_DRSTA)
6899                 schedule_work(&adapter->reset_task);
6900
6901         if (icr & E1000_ICR_DOUTSYNC) {
6902                 /* HW is reporting DMA is out of sync */
6903                 adapter->stats.doosync++;
6904         }
6905
6906         if (icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
6907                 hw->mac.get_link_status = 1;
6908                 /* guard against interrupt when we're going down */
6909                 if (!test_bit(__IGB_DOWN, &adapter->state))
6910                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
6911         }
6912
6913 #ifdef HAVE_PTP_1588_CLOCK
6914         if (icr & E1000_ICR_TS) {
6915                 u32 tsicr = E1000_READ_REG(hw, E1000_TSICR);
6916
6917                 if (tsicr & E1000_TSICR_TXTS) {
6918                         /* acknowledge the interrupt */
6919                         E1000_WRITE_REG(hw, E1000_TSICR, E1000_TSICR_TXTS);
6920                         /* retrieve hardware timestamp */
6921                         schedule_work(&adapter->ptp_tx_work);
6922                 }
6923         }
6924 #endif /* HAVE_PTP_1588_CLOCK */
6925
6926         napi_schedule(&q_vector->napi);
6927
6928         return IRQ_HANDLED;
6929 }
6930
6931 void igb_ring_irq_enable(struct igb_q_vector *q_vector)
6932 {
6933         struct igb_adapter *adapter = q_vector->adapter;
6934         struct e1000_hw *hw = &adapter->hw;
6935
6936         if ((q_vector->rx.ring && (adapter->rx_itr_setting & 3)) ||
6937             (!q_vector->rx.ring && (adapter->tx_itr_setting & 3))) {
6938                 if ((adapter->num_q_vectors == 1) && !adapter->vf_data)
6939                         igb_set_itr(q_vector);
6940                 else
6941                         igb_update_ring_itr(q_vector);
6942         }
6943
6944         if (!test_bit(__IGB_DOWN, &adapter->state)) {
6945                 if (adapter->msix_entries)
6946                         E1000_WRITE_REG(hw, E1000_EIMS, q_vector->eims_value);
6947                 else
6948                         igb_irq_enable(adapter);
6949         }
6950 }
6951
6952 /**
6953  * igb_poll - NAPI Rx polling callback
6954  * @napi: napi polling structure
6955  * @budget: count of how many packets we should handle
6956  **/
6957 static int igb_poll(struct napi_struct *napi, int budget)
6958 {
6959         struct igb_q_vector *q_vector = container_of(napi, struct igb_q_vector, napi);
6960         bool clean_complete = true;
6961
6962 #ifdef IGB_DCA
6963         if (q_vector->adapter->flags & IGB_FLAG_DCA_ENABLED)
6964                 igb_update_dca(q_vector);
6965 #endif
6966         if (q_vector->tx.ring)
6967                 clean_complete = igb_clean_tx_irq(q_vector);
6968
6969         if (q_vector->rx.ring)
6970                 clean_complete &= igb_clean_rx_irq(q_vector, budget);
6971
6972 #ifndef HAVE_NETDEV_NAPI_LIST
6973         /* if netdev is disabled we need to stop polling */
6974         if (!netif_running(q_vector->adapter->netdev))
6975                 clean_complete = true;
6976
6977 #endif
6978         /* If all work not completed, return budget and keep polling */
6979         if (!clean_complete)
6980                 return budget;
6981
6982         /* If not enough Rx work done, exit the polling mode */
6983         napi_complete(napi);
6984         igb_ring_irq_enable(q_vector);
6985
6986         return 0;
6987 }
6988
6989 /**
6990  * igb_clean_tx_irq - Reclaim resources after transmit completes
6991  * @q_vector: pointer to q_vector containing needed info
6992  * returns TRUE if ring is completely cleaned
6993  **/
6994 static bool igb_clean_tx_irq(struct igb_q_vector *q_vector)
6995 {
6996         struct igb_adapter *adapter = q_vector->adapter;
6997         struct igb_ring *tx_ring = q_vector->tx.ring;
6998         struct igb_tx_buffer *tx_buffer;
6999         union e1000_adv_tx_desc *tx_desc;
7000         unsigned int total_bytes = 0, total_packets = 0;
7001         unsigned int budget = q_vector->tx.work_limit;
7002         unsigned int i = tx_ring->next_to_clean;
7003
7004         if (test_bit(__IGB_DOWN, &adapter->state))
7005                 return true;
7006
7007         tx_buffer = &tx_ring->tx_buffer_info[i];
7008         tx_desc = IGB_TX_DESC(tx_ring, i);
7009         i -= tx_ring->count;
7010
7011         do {
7012                 union e1000_adv_tx_desc *eop_desc = tx_buffer->next_to_watch;
7013
7014                 /* if next_to_watch is not set then there is no work pending */
7015                 if (!eop_desc)
7016                         break;
7017
7018                 /* prevent any other reads prior to eop_desc */
7019                 read_barrier_depends();
7020
7021                 /* if DD is not set pending work has not been completed */
7022                 if (!(eop_desc->wb.status & cpu_to_le32(E1000_TXD_STAT_DD)))
7023                         break;
7024
7025                 /* clear next_to_watch to prevent false hangs */
7026                 tx_buffer->next_to_watch = NULL;
7027
7028                 /* update the statistics for this packet */
7029                 total_bytes += tx_buffer->bytecount;
7030                 total_packets += tx_buffer->gso_segs;
7031
7032                 /* free the skb */
7033                 dev_kfree_skb_any(tx_buffer->skb);
7034
7035                 /* unmap skb header data */
7036                 dma_unmap_single(tx_ring->dev,
7037                                  dma_unmap_addr(tx_buffer, dma),
7038                                  dma_unmap_len(tx_buffer, len),
7039                                  DMA_TO_DEVICE);
7040
7041                 /* clear tx_buffer data */
7042                 tx_buffer->skb = NULL;
7043                 dma_unmap_len_set(tx_buffer, len, 0);
7044
7045                 /* clear last DMA location and unmap remaining buffers */
7046                 while (tx_desc != eop_desc) {
7047                         tx_buffer++;
7048                         tx_desc++;
7049                         i++;
7050                         if (unlikely(!i)) {
7051                                 i -= tx_ring->count;
7052                                 tx_buffer = tx_ring->tx_buffer_info;
7053                                 tx_desc = IGB_TX_DESC(tx_ring, 0);
7054                         }
7055
7056                         /* unmap any remaining paged data */
7057                         if (dma_unmap_len(tx_buffer, len)) {
7058                                 dma_unmap_page(tx_ring->dev,
7059                                                dma_unmap_addr(tx_buffer, dma),
7060                                                dma_unmap_len(tx_buffer, len),
7061                                                DMA_TO_DEVICE);
7062                                 dma_unmap_len_set(tx_buffer, len, 0);
7063                         }
7064                 }
7065
7066                 /* move us one more past the eop_desc for start of next pkt */
7067                 tx_buffer++;
7068                 tx_desc++;
7069                 i++;
7070                 if (unlikely(!i)) {
7071                         i -= tx_ring->count;
7072                         tx_buffer = tx_ring->tx_buffer_info;
7073                         tx_desc = IGB_TX_DESC(tx_ring, 0);
7074                 }
7075
7076                 /* issue prefetch for next Tx descriptor */
7077                 prefetch(tx_desc);
7078
7079                 /* update budget accounting */
7080                 budget--;
7081         } while (likely(budget));
7082
7083         netdev_tx_completed_queue(txring_txq(tx_ring),
7084                                   total_packets, total_bytes);
7085
7086         i += tx_ring->count;
7087         tx_ring->next_to_clean = i;
7088         tx_ring->tx_stats.bytes += total_bytes;
7089         tx_ring->tx_stats.packets += total_packets;
7090         q_vector->tx.total_bytes += total_bytes;
7091         q_vector->tx.total_packets += total_packets;
7092
7093 #ifdef DEBUG
7094         if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags) &&
7095             !(adapter->disable_hw_reset && adapter->tx_hang_detected)) {
7096 #else
7097         if (test_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags)) {
7098 #endif
7099                 struct e1000_hw *hw = &adapter->hw;
7100
7101                 /* Detect a transmit hang in hardware, this serializes the
7102                  * check with the clearing of time_stamp and movement of i */
7103                 clear_bit(IGB_RING_FLAG_TX_DETECT_HANG, &tx_ring->flags);
7104                 if (tx_buffer->next_to_watch &&
7105                     time_after(jiffies, tx_buffer->time_stamp +
7106                                (adapter->tx_timeout_factor * HZ))
7107                     && !(E1000_READ_REG(hw, E1000_STATUS) &
7108                          E1000_STATUS_TXOFF)) {
7109
7110                         /* detected Tx unit hang */
7111 #ifdef DEBUG
7112                         adapter->tx_hang_detected = TRUE;
7113                         if (adapter->disable_hw_reset) {
7114                                 DPRINTK(DRV, WARNING,
7115                                         "Deactivating netdev watchdog timer\n");
7116                                 if (del_timer(&netdev_ring(tx_ring)->watchdog_timer))
7117                                         dev_put(netdev_ring(tx_ring));
7118 #ifndef HAVE_NET_DEVICE_OPS
7119                                 netdev_ring(tx_ring)->tx_timeout = NULL;
7120 #endif
7121                         }
7122 #endif /* DEBUG */
7123                         dev_err(tx_ring->dev,
7124                                 "Detected Tx Unit Hang\n"
7125                                 "  Tx Queue             <%d>\n"
7126                                 "  TDH                  <%x>\n"
7127                                 "  TDT                  <%x>\n"
7128                                 "  next_to_use          <%x>\n"
7129                                 "  next_to_clean        <%x>\n"
7130                                 "buffer_info[next_to_clean]\n"
7131                                 "  time_stamp           <%lx>\n"
7132                                 "  next_to_watch        <%p>\n"
7133                                 "  jiffies              <%lx>\n"
7134                                 "  desc.status          <%x>\n",
7135                                 tx_ring->queue_index,
7136                                 E1000_READ_REG(hw, E1000_TDH(tx_ring->reg_idx)),
7137                                 readl(tx_ring->tail),
7138                                 tx_ring->next_to_use,
7139                                 tx_ring->next_to_clean,
7140                                 tx_buffer->time_stamp,
7141                                 tx_buffer->next_to_watch,
7142                                 jiffies,
7143                                 tx_buffer->next_to_watch->wb.status);
7144                         if (netif_is_multiqueue(netdev_ring(tx_ring)))
7145                                 netif_stop_subqueue(netdev_ring(tx_ring),
7146                                                     ring_queue_index(tx_ring));
7147                         else
7148                                 netif_stop_queue(netdev_ring(tx_ring));
7149
7150                         /* we are about to reset, no point in enabling stuff */
7151                         return true;
7152                 }
7153         }
7154
7155 #define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
7156         if (unlikely(total_packets &&
7157                      netif_carrier_ok(netdev_ring(tx_ring)) &&
7158                      igb_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD)) {
7159                 /* Make sure that anybody stopping the queue after this
7160                  * sees the new next_to_clean.
7161                  */
7162                 smp_mb();
7163                 if (netif_is_multiqueue(netdev_ring(tx_ring))) {
7164                         if (__netif_subqueue_stopped(netdev_ring(tx_ring),
7165                                                      ring_queue_index(tx_ring)) &&
7166                             !(test_bit(__IGB_DOWN, &adapter->state))) {
7167                                 netif_wake_subqueue(netdev_ring(tx_ring),
7168                                                     ring_queue_index(tx_ring));
7169                                 tx_ring->tx_stats.restart_queue++;
7170                         }
7171                 } else {
7172                         if (netif_queue_stopped(netdev_ring(tx_ring)) &&
7173                             !(test_bit(__IGB_DOWN, &adapter->state))) {
7174                                 netif_wake_queue(netdev_ring(tx_ring));
7175                                 tx_ring->tx_stats.restart_queue++;
7176                         }
7177                 }
7178         }
7179
7180         return !!budget;
7181 }
7182
7183 #ifdef HAVE_VLAN_RX_REGISTER
7184 /**
7185  * igb_receive_skb - helper function to handle rx indications
7186  * @q_vector: structure containing interrupt and ring information
7187  * @skb: packet to send up
7188  **/
7189 static void igb_receive_skb(struct igb_q_vector *q_vector,
7190                             struct sk_buff *skb)
7191 {
7192         struct vlan_group **vlgrp = netdev_priv(skb->dev);
7193
7194         if (IGB_CB(skb)->vid) {
7195                 if (*vlgrp) {
7196                         vlan_gro_receive(&q_vector->napi, *vlgrp,
7197                                          IGB_CB(skb)->vid, skb);
7198                 } else {
7199                         dev_kfree_skb_any(skb);
7200                 }
7201         } else {
7202                 napi_gro_receive(&q_vector->napi, skb);
7203         }
7204 }
7205
7206 #endif /* HAVE_VLAN_RX_REGISTER */
7207 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7208 /**
7209  * igb_reuse_rx_page - page flip buffer and store it back on the ring
7210  * @rx_ring: rx descriptor ring to store buffers on
7211  * @old_buff: donor buffer to have page reused
7212  *
7213  * Synchronizes page for reuse by the adapter
7214  **/
7215 static void igb_reuse_rx_page(struct igb_ring *rx_ring,
7216                               struct igb_rx_buffer *old_buff)
7217 {
7218         struct igb_rx_buffer *new_buff;
7219         u16 nta = rx_ring->next_to_alloc;
7220
7221         new_buff = &rx_ring->rx_buffer_info[nta];
7222
7223         /* update, and store next to alloc */
7224         nta++;
7225         rx_ring->next_to_alloc = (nta < rx_ring->count) ? nta : 0;
7226
7227         /* transfer page from old buffer to new buffer */
7228         memcpy(new_buff, old_buff, sizeof(struct igb_rx_buffer));
7229
7230         /* sync the buffer for use by the device */
7231         dma_sync_single_range_for_device(rx_ring->dev, old_buff->dma,
7232                                          old_buff->page_offset,
7233                                          IGB_RX_BUFSZ,
7234                                          DMA_FROM_DEVICE);
7235 }
7236
7237 static bool igb_can_reuse_rx_page(struct igb_rx_buffer *rx_buffer,
7238                                   struct page *page,
7239                                   unsigned int truesize)
7240 {
7241         /* avoid re-using remote pages */
7242         if (unlikely(page_to_nid(page) != numa_node_id()))
7243                 return false;
7244
7245 #if (PAGE_SIZE < 8192)
7246         /* if we are only owner of page we can reuse it */
7247         if (unlikely(page_count(page) != 1))
7248                 return false;
7249
7250         /* flip page offset to other buffer */
7251         rx_buffer->page_offset ^= IGB_RX_BUFSZ;
7252
7253 #else
7254         /* move offset up to the next cache line */
7255         rx_buffer->page_offset += truesize;
7256
7257         if (rx_buffer->page_offset > (PAGE_SIZE - IGB_RX_BUFSZ))
7258                 return false;
7259 #endif
7260
7261         /* bump ref count on page before it is given to the stack */
7262         get_page(page);
7263
7264         return true;
7265 }
7266
7267 /**
7268  * igb_add_rx_frag - Add contents of Rx buffer to sk_buff
7269  * @rx_ring: rx descriptor ring to transact packets on
7270  * @rx_buffer: buffer containing page to add
7271  * @rx_desc: descriptor containing length of buffer written by hardware
7272  * @skb: sk_buff to place the data into
7273  *
7274  * This function will add the data contained in rx_buffer->page to the skb.
7275  * This is done either through a direct copy if the data in the buffer is
7276  * less than the skb header size, otherwise it will just attach the page as
7277  * a frag to the skb.
7278  *
7279  * The function will then update the page offset if necessary and return
7280  * true if the buffer can be reused by the adapter.
7281  **/
7282 static bool igb_add_rx_frag(struct igb_ring *rx_ring,
7283                             struct igb_rx_buffer *rx_buffer,
7284                             union e1000_adv_rx_desc *rx_desc,
7285                             struct sk_buff *skb)
7286 {
7287         struct page *page = rx_buffer->page;
7288         unsigned int size = le16_to_cpu(rx_desc->wb.upper.length);
7289 #if (PAGE_SIZE < 8192)
7290         unsigned int truesize = IGB_RX_BUFSZ;
7291 #else
7292         unsigned int truesize = ALIGN(size, L1_CACHE_BYTES);
7293 #endif
7294
7295         if ((size <= IGB_RX_HDR_LEN) && !skb_is_nonlinear(skb)) {
7296                 unsigned char *va = page_address(page) + rx_buffer->page_offset;
7297
7298 #ifdef HAVE_PTP_1588_CLOCK
7299                 if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
7300                         igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
7301                         va += IGB_TS_HDR_LEN;
7302                         size -= IGB_TS_HDR_LEN;
7303                 }
7304 #endif /* HAVE_PTP_1588_CLOCK */
7305
7306                 memcpy(__skb_put(skb, size), va, ALIGN(size, sizeof(long)));
7307
7308                 /* we can reuse buffer as-is, just make sure it is local */
7309                 if (likely(page_to_nid(page) == numa_node_id()))
7310                         return true;
7311
7312                 /* this page cannot be reused so discard it */
7313                 put_page(page);
7314                 return false;
7315         }
7316
7317         skb_add_rx_frag(skb, skb_shinfo(skb)->nr_frags, page,
7318                         rx_buffer->page_offset, size, truesize);
7319
7320         return igb_can_reuse_rx_page(rx_buffer, page, truesize);
7321 }
7322
7323 static struct sk_buff *igb_fetch_rx_buffer(struct igb_ring *rx_ring,
7324                                            union e1000_adv_rx_desc *rx_desc,
7325                                            struct sk_buff *skb)
7326 {
7327         struct igb_rx_buffer *rx_buffer;
7328         struct page *page;
7329
7330         rx_buffer = &rx_ring->rx_buffer_info[rx_ring->next_to_clean];
7331
7332         page = rx_buffer->page;
7333         prefetchw(page);
7334
7335         if (likely(!skb)) {
7336                 void *page_addr = page_address(page) +
7337                                   rx_buffer->page_offset;
7338
7339                 /* prefetch first cache line of first page */
7340                 prefetch(page_addr);
7341 #if L1_CACHE_BYTES < 128
7342                 prefetch(page_addr + L1_CACHE_BYTES);
7343 #endif
7344
7345                 /* allocate a skb to store the frags */
7346                 skb = netdev_alloc_skb_ip_align(rx_ring->netdev,
7347                                                 IGB_RX_HDR_LEN);
7348                 if (unlikely(!skb)) {
7349                         rx_ring->rx_stats.alloc_failed++;
7350                         return NULL;
7351                 }
7352
7353                 /*
7354                  * we will be copying header into skb->data in
7355                  * pskb_may_pull so it is in our interest to prefetch
7356                  * it now to avoid a possible cache miss
7357                  */
7358                 prefetchw(skb->data);
7359         }
7360
7361         /* we are reusing so sync this buffer for CPU use */
7362         dma_sync_single_range_for_cpu(rx_ring->dev,
7363                                       rx_buffer->dma,
7364                                       rx_buffer->page_offset,
7365                                       IGB_RX_BUFSZ,
7366                                       DMA_FROM_DEVICE);
7367
7368         /* pull page into skb */
7369         if (igb_add_rx_frag(rx_ring, rx_buffer, rx_desc, skb)) {
7370                 /* hand second half of page back to the ring */
7371                 igb_reuse_rx_page(rx_ring, rx_buffer);
7372         } else {
7373                 /* we are not reusing the buffer so unmap it */
7374                 dma_unmap_page(rx_ring->dev, rx_buffer->dma,
7375                                PAGE_SIZE, DMA_FROM_DEVICE);
7376         }
7377
7378         /* clear contents of rx_buffer */
7379         rx_buffer->page = NULL;
7380
7381         return skb;
7382 }
7383
7384 #endif
7385 static inline void igb_rx_checksum(struct igb_ring *ring,
7386                                    union e1000_adv_rx_desc *rx_desc,
7387                                    struct sk_buff *skb)
7388 {
7389         skb_checksum_none_assert(skb);
7390
7391         /* Ignore Checksum bit is set */
7392         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_IXSM))
7393                 return;
7394
7395         /* Rx checksum disabled via ethtool */
7396         if (!(netdev_ring(ring)->features & NETIF_F_RXCSUM))
7397                 return;
7398
7399         /* TCP/UDP checksum error bit is set */
7400         if (igb_test_staterr(rx_desc,
7401                              E1000_RXDEXT_STATERR_TCPE |
7402                              E1000_RXDEXT_STATERR_IPE)) {
7403                 /*
7404                  * work around errata with sctp packets where the TCPE aka
7405                  * L4E bit is set incorrectly on 64 byte (60 byte w/o crc)
7406                  * packets, (aka let the stack check the crc32c)
7407                  */
7408                 if (!((skb->len == 60) &&
7409                       test_bit(IGB_RING_FLAG_RX_SCTP_CSUM, &ring->flags)))
7410                         ring->rx_stats.csum_err++;
7411
7412                 /* let the stack verify checksum errors */
7413                 return;
7414         }
7415         /* It must be a TCP or UDP packet with a valid checksum */
7416         if (igb_test_staterr(rx_desc, E1000_RXD_STAT_TCPCS |
7417                                       E1000_RXD_STAT_UDPCS))
7418                 skb->ip_summed = CHECKSUM_UNNECESSARY;
7419 }
7420
7421 #ifdef NETIF_F_RXHASH
7422 static inline void igb_rx_hash(struct igb_ring *ring,
7423                                union e1000_adv_rx_desc *rx_desc,
7424                                struct sk_buff *skb)
7425 {
7426         if (netdev_ring(ring)->features & NETIF_F_RXHASH)
7427                 skb_set_hash(skb, le32_to_cpu(rx_desc->wb.lower.hi_dword.rss),
7428                              PKT_HASH_TYPE_L3);
7429 }
7430
7431 #endif
7432 #ifndef IGB_NO_LRO
7433 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7434 /**
7435  * igb_merge_active_tail - merge active tail into lro skb
7436  * @tail: pointer to active tail in frag_list
7437  *
7438  * This function merges the length and data of an active tail into the
7439  * skb containing the frag_list.  It resets the tail's pointer to the head,
7440  * but it leaves the heads pointer to tail intact.
7441  **/
7442 static inline struct sk_buff *igb_merge_active_tail(struct sk_buff *tail)
7443 {
7444         struct sk_buff *head = IGB_CB(tail)->head;
7445
7446         if (!head)
7447                 return tail;
7448
7449         head->len += tail->len;
7450         head->data_len += tail->len;
7451         head->truesize += tail->len;
7452
7453         IGB_CB(tail)->head = NULL;
7454
7455         return head;
7456 }
7457
7458 /**
7459  * igb_add_active_tail - adds an active tail into the skb frag_list
7460  * @head: pointer to the start of the skb
7461  * @tail: pointer to active tail to add to frag_list
7462  *
7463  * This function adds an active tail to the end of the frag list.  This tail
7464  * will still be receiving data so we cannot yet ad it's stats to the main
7465  * skb.  That is done via igb_merge_active_tail.
7466  **/
7467 static inline void igb_add_active_tail(struct sk_buff *head, struct sk_buff *tail)
7468 {
7469         struct sk_buff *old_tail = IGB_CB(head)->tail;
7470
7471         if (old_tail) {
7472                 igb_merge_active_tail(old_tail);
7473                 old_tail->next = tail;
7474         } else {
7475                 skb_shinfo(head)->frag_list = tail;
7476         }
7477
7478         IGB_CB(tail)->head = head;
7479         IGB_CB(head)->tail = tail;
7480
7481         IGB_CB(head)->append_cnt++;
7482 }
7483
7484 /**
7485  * igb_close_active_frag_list - cleanup pointers on a frag_list skb
7486  * @head: pointer to head of an active frag list
7487  *
7488  * This function will clear the frag_tail_tracker pointer on an active
7489  * frag_list and returns true if the pointer was actually set
7490  **/
7491 static inline bool igb_close_active_frag_list(struct sk_buff *head)
7492 {
7493         struct sk_buff *tail = IGB_CB(head)->tail;
7494
7495         if (!tail)
7496                 return false;
7497
7498         igb_merge_active_tail(tail);
7499
7500         IGB_CB(head)->tail = NULL;
7501
7502         return true;
7503 }
7504
7505 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
7506 /**
7507  * igb_can_lro - returns true if packet is TCP/IPV4 and LRO is enabled
7508  * @adapter: board private structure
7509  * @rx_desc: pointer to the rx descriptor
7510  * @skb: pointer to the skb to be merged
7511  *
7512  **/
7513 static inline bool igb_can_lro(struct igb_ring *rx_ring,
7514                                union e1000_adv_rx_desc *rx_desc,
7515                                struct sk_buff *skb)
7516 {
7517         struct iphdr *iph = (struct iphdr *)skb->data;
7518         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
7519
7520         /* verify hardware indicates this is IPv4/TCP */
7521         if((!(pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_TCP)) ||
7522             !(pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV4))))
7523                 return false;
7524
7525         /* .. and LRO is enabled */
7526         if (!(netdev_ring(rx_ring)->features & NETIF_F_LRO))
7527                 return false;
7528
7529         /* .. and we are not in promiscuous mode */
7530         if (netdev_ring(rx_ring)->flags & IFF_PROMISC)
7531                 return false;
7532
7533         /* .. and the header is large enough for us to read IP/TCP fields */
7534         if (!pskb_may_pull(skb, sizeof(struct igb_lrohdr)))
7535                 return false;
7536
7537         /* .. and there are no VLANs on packet */
7538         if (skb->protocol != __constant_htons(ETH_P_IP))
7539                 return false;
7540
7541         /* .. and we are version 4 with no options */
7542         if (*(u8 *)iph != 0x45)
7543                 return false;
7544
7545         /* .. and the packet is not fragmented */
7546         if (iph->frag_off & htons(IP_MF | IP_OFFSET))
7547                 return false;
7548
7549         /* .. and that next header is TCP */
7550         if (iph->protocol != IPPROTO_TCP)
7551                 return false;
7552
7553         return true;
7554 }
7555
7556 static inline struct igb_lrohdr *igb_lro_hdr(struct sk_buff *skb)
7557 {
7558         return (struct igb_lrohdr *)skb->data;
7559 }
7560
7561 /**
7562  * igb_lro_flush - Indicate packets to upper layer.
7563  *
7564  * Update IP and TCP header part of head skb if more than one
7565  * skb's chained and indicate packets to upper layer.
7566  **/
7567 static void igb_lro_flush(struct igb_q_vector *q_vector,
7568                           struct sk_buff *skb)
7569 {
7570         struct igb_lro_list *lrolist = &q_vector->lrolist;
7571
7572         __skb_unlink(skb, &lrolist->active);
7573
7574         if (IGB_CB(skb)->append_cnt) {
7575                 struct igb_lrohdr *lroh = igb_lro_hdr(skb);
7576
7577 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7578                 /* close any active lro contexts */
7579                 igb_close_active_frag_list(skb);
7580
7581 #endif
7582                 /* incorporate ip header and re-calculate checksum */
7583                 lroh->iph.tot_len = ntohs(skb->len);
7584                 lroh->iph.check = 0;
7585
7586                 /* header length is 5 since we know no options exist */
7587                 lroh->iph.check = ip_fast_csum((u8 *)lroh, 5);
7588
7589                 /* clear TCP checksum to indicate we are an LRO frame */
7590                 lroh->th.check = 0;
7591
7592                 /* incorporate latest timestamp into the tcp header */
7593                 if (IGB_CB(skb)->tsecr) {
7594                         lroh->ts[2] = IGB_CB(skb)->tsecr;
7595                         lroh->ts[1] = htonl(IGB_CB(skb)->tsval);
7596                 }
7597 #ifdef NETIF_F_GSO
7598
7599                 skb_shinfo(skb)->gso_size = IGB_CB(skb)->mss;
7600                 skb_shinfo(skb)->gso_type = SKB_GSO_TCPV4;
7601 #endif
7602         }
7603
7604 #ifdef HAVE_VLAN_RX_REGISTER
7605         igb_receive_skb(q_vector, skb);
7606 #else
7607         napi_gro_receive(&q_vector->napi, skb);
7608 #endif
7609         lrolist->stats.flushed++;
7610 }
7611
7612 static void igb_lro_flush_all(struct igb_q_vector *q_vector)
7613 {
7614         struct igb_lro_list *lrolist = &q_vector->lrolist;
7615         struct sk_buff *skb, *tmp;
7616
7617         skb_queue_reverse_walk_safe(&lrolist->active, skb, tmp)
7618                 igb_lro_flush(q_vector, skb);
7619 }
7620
7621 /*
7622  * igb_lro_header_ok - Main LRO function.
7623  **/
7624 static void igb_lro_header_ok(struct sk_buff *skb)
7625 {
7626         struct igb_lrohdr *lroh = igb_lro_hdr(skb);
7627         u16 opt_bytes, data_len;
7628
7629 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7630         IGB_CB(skb)->tail = NULL;
7631 #endif
7632         IGB_CB(skb)->tsecr = 0;
7633         IGB_CB(skb)->append_cnt = 0;
7634         IGB_CB(skb)->mss = 0;
7635
7636         /* ensure that the checksum is valid */
7637         if (skb->ip_summed != CHECKSUM_UNNECESSARY)
7638                 return;
7639
7640         /* If we see CE codepoint in IP header, packet is not mergeable */
7641         if (INET_ECN_is_ce(ipv4_get_dsfield(&lroh->iph)))
7642                 return;
7643
7644         /* ensure no bits set besides ack or psh */
7645         if (lroh->th.fin || lroh->th.syn || lroh->th.rst ||
7646             lroh->th.urg || lroh->th.ece || lroh->th.cwr ||
7647             !lroh->th.ack)
7648                 return;
7649
7650         /* store the total packet length */
7651         data_len = ntohs(lroh->iph.tot_len);
7652
7653         /* remove any padding from the end of the skb */
7654         __pskb_trim(skb, data_len);
7655
7656         /* remove header length from data length */
7657         data_len -= sizeof(struct igb_lrohdr);
7658
7659         /*
7660          * check for timestamps. Since the only option we handle are timestamps,
7661          * we only have to handle the simple case of aligned timestamps
7662          */
7663         opt_bytes = (lroh->th.doff << 2) - sizeof(struct tcphdr);
7664         if (opt_bytes != 0) {
7665                 if ((opt_bytes != TCPOLEN_TSTAMP_ALIGNED) ||
7666                     !pskb_may_pull(skb, sizeof(struct igb_lrohdr) +
7667                                         TCPOLEN_TSTAMP_ALIGNED) ||
7668                     (lroh->ts[0] != htonl((TCPOPT_NOP << 24) |
7669                                              (TCPOPT_NOP << 16) |
7670                                              (TCPOPT_TIMESTAMP << 8) |
7671                                               TCPOLEN_TIMESTAMP)) ||
7672                     (lroh->ts[2] == 0)) {
7673                         return;
7674                 }
7675
7676                 IGB_CB(skb)->tsval = ntohl(lroh->ts[1]);
7677                 IGB_CB(skb)->tsecr = lroh->ts[2];
7678
7679                 data_len -= TCPOLEN_TSTAMP_ALIGNED;
7680         }
7681
7682         /* record data_len as mss for the packet */
7683         IGB_CB(skb)->mss = data_len;
7684         IGB_CB(skb)->next_seq = ntohl(lroh->th.seq);
7685 }
7686
7687 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7688 static void igb_merge_frags(struct sk_buff *lro_skb, struct sk_buff *new_skb)
7689 {
7690         struct skb_shared_info *sh_info;
7691         struct skb_shared_info *new_skb_info;
7692         unsigned int data_len;
7693
7694         sh_info = skb_shinfo(lro_skb);
7695         new_skb_info = skb_shinfo(new_skb);
7696
7697         /* copy frags into the last skb */
7698         memcpy(sh_info->frags + sh_info->nr_frags,
7699                new_skb_info->frags,
7700                new_skb_info->nr_frags * sizeof(skb_frag_t));
7701
7702         /* copy size data over */
7703         sh_info->nr_frags += new_skb_info->nr_frags;
7704         data_len = IGB_CB(new_skb)->mss;
7705         lro_skb->len += data_len;
7706         lro_skb->data_len += data_len;
7707         lro_skb->truesize += data_len;
7708
7709         /* wipe record of data from new_skb */
7710         new_skb_info->nr_frags = 0;
7711         new_skb->len = new_skb->data_len = 0;
7712         dev_kfree_skb_any(new_skb);
7713 }
7714
7715 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
7716 /**
7717  * igb_lro_receive - if able, queue skb into lro chain
7718  * @q_vector: structure containing interrupt and ring information
7719  * @new_skb: pointer to current skb being checked
7720  *
7721  * Checks whether the skb given is eligible for LRO and if that's
7722  * fine chains it to the existing lro_skb based on flowid. If an LRO for
7723  * the flow doesn't exist create one.
7724  **/
7725 static void igb_lro_receive(struct igb_q_vector *q_vector,
7726                             struct sk_buff *new_skb)
7727 {
7728         struct sk_buff *lro_skb;
7729         struct igb_lro_list *lrolist = &q_vector->lrolist;
7730         struct igb_lrohdr *lroh = igb_lro_hdr(new_skb);
7731         __be32 saddr = lroh->iph.saddr;
7732         __be32 daddr = lroh->iph.daddr;
7733         __be32 tcp_ports = *(__be32 *)&lroh->th;
7734         u16 data_len;
7735 #ifdef HAVE_VLAN_RX_REGISTER
7736         u16 vid = IGB_CB(new_skb)->vid;
7737 #else
7738         u16 vid = new_skb->vlan_tci;
7739 #endif
7740
7741         igb_lro_header_ok(new_skb);
7742
7743         /*
7744          * we have a packet that might be eligible for LRO,
7745          * so see if it matches anything we might expect
7746          */
7747         skb_queue_walk(&lrolist->active, lro_skb) {
7748                 if (*(__be32 *)&igb_lro_hdr(lro_skb)->th != tcp_ports ||
7749                     igb_lro_hdr(lro_skb)->iph.saddr != saddr ||
7750                     igb_lro_hdr(lro_skb)->iph.daddr != daddr)
7751                         continue;
7752
7753 #ifdef HAVE_VLAN_RX_REGISTER
7754                 if (IGB_CB(lro_skb)->vid != vid)
7755 #else
7756                 if (lro_skb->vlan_tci != vid)
7757 #endif
7758                         continue;
7759
7760                 /* out of order packet */
7761                 if (IGB_CB(lro_skb)->next_seq != IGB_CB(new_skb)->next_seq) {
7762                         igb_lro_flush(q_vector, lro_skb);
7763                         IGB_CB(new_skb)->mss = 0;
7764                         break;
7765                 }
7766
7767                 /* TCP timestamp options have changed */
7768                 if (!IGB_CB(lro_skb)->tsecr != !IGB_CB(new_skb)->tsecr) {
7769                         igb_lro_flush(q_vector, lro_skb);
7770                         break;
7771                 }
7772
7773                 /* make sure timestamp values are increasing */
7774                 if (IGB_CB(lro_skb)->tsecr &&
7775                     IGB_CB(lro_skb)->tsval > IGB_CB(new_skb)->tsval) {
7776                         igb_lro_flush(q_vector, lro_skb);
7777                         IGB_CB(new_skb)->mss = 0;
7778                         break;
7779                 }
7780
7781                 data_len = IGB_CB(new_skb)->mss;
7782
7783                 /* Check for all of the above below
7784                  *   malformed header
7785                  *   no tcp data
7786                  *   resultant packet would be too large
7787                  *   new skb is larger than our current mss
7788                  *   data would remain in header
7789                  *   we would consume more frags then the sk_buff contains
7790                  *   ack sequence numbers changed
7791                  *   window size has changed
7792                  */
7793                 if (data_len == 0 ||
7794                     data_len > IGB_CB(lro_skb)->mss ||
7795                     data_len > IGB_CB(lro_skb)->free ||
7796 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7797                     data_len != new_skb->data_len ||
7798                     skb_shinfo(new_skb)->nr_frags >=
7799                     (MAX_SKB_FRAGS - skb_shinfo(lro_skb)->nr_frags) ||
7800 #endif
7801                     igb_lro_hdr(lro_skb)->th.ack_seq != lroh->th.ack_seq ||
7802                     igb_lro_hdr(lro_skb)->th.window != lroh->th.window) {
7803                         igb_lro_flush(q_vector, lro_skb);
7804                         break;
7805                 }
7806
7807                 /* Remove IP and TCP header*/
7808                 skb_pull(new_skb, new_skb->len - data_len);
7809
7810                 /* update timestamp and timestamp echo response */
7811                 IGB_CB(lro_skb)->tsval = IGB_CB(new_skb)->tsval;
7812                 IGB_CB(lro_skb)->tsecr = IGB_CB(new_skb)->tsecr;
7813
7814                 /* update sequence and free space */
7815                 IGB_CB(lro_skb)->next_seq += data_len;
7816                 IGB_CB(lro_skb)->free -= data_len;
7817
7818                 /* update append_cnt */
7819                 IGB_CB(lro_skb)->append_cnt++;
7820
7821 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
7822                 /* if header is empty pull pages into current skb */
7823                 igb_merge_frags(lro_skb, new_skb);
7824 #else
7825                 /* chain this new skb in frag_list */
7826                 igb_add_active_tail(lro_skb, new_skb);
7827 #endif
7828
7829                 if ((data_len < IGB_CB(lro_skb)->mss) || lroh->th.psh ||
7830                     skb_shinfo(lro_skb)->nr_frags == MAX_SKB_FRAGS) {
7831                         igb_lro_hdr(lro_skb)->th.psh |= lroh->th.psh;
7832                         igb_lro_flush(q_vector, lro_skb);
7833                 }
7834
7835                 lrolist->stats.coal++;
7836                 return;
7837         }
7838
7839         if (IGB_CB(new_skb)->mss && !lroh->th.psh) {
7840                 /* if we are at capacity flush the tail */
7841                 if (skb_queue_len(&lrolist->active) >= IGB_LRO_MAX) {
7842                         lro_skb = skb_peek_tail(&lrolist->active);
7843                         if (lro_skb)
7844                                 igb_lro_flush(q_vector, lro_skb);
7845                 }
7846
7847                 /* update sequence and free space */
7848                 IGB_CB(new_skb)->next_seq += IGB_CB(new_skb)->mss;
7849                 IGB_CB(new_skb)->free = 65521 - new_skb->len;
7850
7851                 /* .. and insert at the front of the active list */
7852                 __skb_queue_head(&lrolist->active, new_skb);
7853
7854                 lrolist->stats.coal++;
7855                 return;
7856         }
7857
7858         /* packet not handled by any of the above, pass it to the stack */
7859 #ifdef HAVE_VLAN_RX_REGISTER
7860         igb_receive_skb(q_vector, new_skb);
7861 #else
7862         napi_gro_receive(&q_vector->napi, new_skb);
7863 #endif
7864 }
7865
7866 #endif /* IGB_NO_LRO */
7867 /**
7868  * igb_process_skb_fields - Populate skb header fields from Rx descriptor
7869  * @rx_ring: rx descriptor ring packet is being transacted on
7870  * @rx_desc: pointer to the EOP Rx descriptor
7871  * @skb: pointer to current skb being populated
7872  *
7873  * This function checks the ring, descriptor, and packet information in
7874  * order to populate the hash, checksum, VLAN, timestamp, protocol, and
7875  * other fields within the skb.
7876  **/
7877 static void igb_process_skb_fields(struct igb_ring *rx_ring,
7878                                    union e1000_adv_rx_desc *rx_desc,
7879                                    struct sk_buff *skb)
7880 {
7881         struct net_device *dev = rx_ring->netdev;
7882         __le16 pkt_info = rx_desc->wb.lower.lo_dword.hs_rss.pkt_info;
7883
7884 #ifdef NETIF_F_RXHASH
7885         igb_rx_hash(rx_ring, rx_desc, skb);
7886
7887 #endif
7888         igb_rx_checksum(rx_ring, rx_desc, skb);
7889
7890     /* update packet type stats */
7891         if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV4))
7892                 rx_ring->rx_stats.ipv4_packets++;
7893         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV4_EX))
7894                 rx_ring->rx_stats.ipv4e_packets++;
7895         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV6))
7896                 rx_ring->rx_stats.ipv6_packets++;
7897         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_IPV6_EX))
7898                 rx_ring->rx_stats.ipv6e_packets++;
7899         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_TCP))
7900                 rx_ring->rx_stats.tcp_packets++;
7901         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_UDP))
7902                 rx_ring->rx_stats.udp_packets++;
7903         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_SCTP))
7904                 rx_ring->rx_stats.sctp_packets++;
7905         else if (pkt_info & cpu_to_le16(E1000_RXDADV_PKTTYPE_NFS))
7906                 rx_ring->rx_stats.nfs_packets++;
7907
7908 #ifdef HAVE_PTP_1588_CLOCK
7909         igb_ptp_rx_hwtstamp(rx_ring, rx_desc, skb);
7910 #endif /* HAVE_PTP_1588_CLOCK */
7911
7912 #ifdef NETIF_F_HW_VLAN_CTAG_RX
7913         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
7914 #else
7915         if ((dev->features & NETIF_F_HW_VLAN_RX) &&
7916 #endif
7917             igb_test_staterr(rx_desc, E1000_RXD_STAT_VP)) {
7918                 u16 vid = 0;
7919                 if (igb_test_staterr(rx_desc, E1000_RXDEXT_STATERR_LB) &&
7920                     test_bit(IGB_RING_FLAG_RX_LB_VLAN_BSWAP, &rx_ring->flags))
7921                         vid = be16_to_cpu(rx_desc->wb.upper.vlan);
7922                 else
7923                         vid = le16_to_cpu(rx_desc->wb.upper.vlan);
7924 #ifdef HAVE_VLAN_RX_REGISTER
7925                 IGB_CB(skb)->vid = vid;
7926         } else {
7927                 IGB_CB(skb)->vid = 0;
7928 #else
7929
7930 #ifdef HAVE_VLAN_PROTOCOL
7931                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
7932 #else
7933                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
7934 #endif
7935
7936
7937 #endif
7938         }
7939
7940         skb_record_rx_queue(skb, rx_ring->queue_index);
7941
7942         skb->protocol = eth_type_trans(skb, dev);
7943 }
7944
7945 /**
7946  * igb_is_non_eop - process handling of non-EOP buffers
7947  * @rx_ring: Rx ring being processed
7948  * @rx_desc: Rx descriptor for current buffer
7949  *
7950  * This function updates next to clean.  If the buffer is an EOP buffer
7951  * this function exits returning false, otherwise it will place the
7952  * sk_buff in the next buffer to be chained and return true indicating
7953  * that this is in fact a non-EOP buffer.
7954  **/
7955 static bool igb_is_non_eop(struct igb_ring *rx_ring,
7956                            union e1000_adv_rx_desc *rx_desc)
7957 {
7958         u32 ntc = rx_ring->next_to_clean + 1;
7959
7960         /* fetch, update, and store next to clean */
7961         ntc = (ntc < rx_ring->count) ? ntc : 0;
7962         rx_ring->next_to_clean = ntc;
7963
7964         prefetch(IGB_RX_DESC(rx_ring, ntc));
7965
7966         if (likely(igb_test_staterr(rx_desc, E1000_RXD_STAT_EOP)))
7967                 return false;
7968
7969         return true;
7970 }
7971
7972 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
7973 /* igb_clean_rx_irq -- * legacy */
7974 static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, int budget)
7975 {
7976         struct igb_ring *rx_ring = q_vector->rx.ring;
7977         unsigned int total_bytes = 0, total_packets = 0;
7978         u16 cleaned_count = igb_desc_unused(rx_ring);
7979
7980         do {
7981                 struct igb_rx_buffer *rx_buffer;
7982                 union e1000_adv_rx_desc *rx_desc;
7983                 struct sk_buff *skb;
7984                 u16 ntc;
7985
7986                 /* return some buffers to hardware, one at a time is too slow */
7987                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
7988                         igb_alloc_rx_buffers(rx_ring, cleaned_count);
7989                         cleaned_count = 0;
7990                 }
7991
7992                 ntc = rx_ring->next_to_clean;
7993                 rx_desc = IGB_RX_DESC(rx_ring, ntc);
7994                 rx_buffer = &rx_ring->rx_buffer_info[ntc];
7995
7996                 if (!igb_test_staterr(rx_desc, E1000_RXD_STAT_DD))
7997                         break;
7998
7999                 /*
8000                  * This memory barrier is needed to keep us from reading
8001                  * any other fields out of the rx_desc until we know the
8002                  * RXD_STAT_DD bit is set
8003                  */
8004                 rmb();
8005
8006                 skb = rx_buffer->skb;
8007
8008                 prefetch(skb->data);
8009
8010                 /* pull the header of the skb in */
8011                 __skb_put(skb, le16_to_cpu(rx_desc->wb.upper.length));
8012
8013                 /* clear skb reference in buffer info structure */
8014                 rx_buffer->skb = NULL;
8015
8016                 cleaned_count++;
8017
8018                 BUG_ON(igb_is_non_eop(rx_ring, rx_desc));
8019
8020                 dma_unmap_single(rx_ring->dev, rx_buffer->dma,
8021                                  rx_ring->rx_buffer_len,
8022                                  DMA_FROM_DEVICE);
8023                 rx_buffer->dma = 0;
8024
8025                 if (igb_test_staterr(rx_desc,
8026                                      E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
8027                         dev_kfree_skb_any(skb);
8028                         continue;
8029                 }
8030
8031                 total_bytes += skb->len;
8032
8033                 /* populate checksum, timestamp, VLAN, and protocol */
8034                 igb_process_skb_fields(rx_ring, rx_desc, skb);
8035
8036 #ifndef IGB_NO_LRO
8037                 if (igb_can_lro(rx_ring, rx_desc, skb))
8038                         igb_lro_receive(q_vector, skb);
8039                 else
8040 #endif
8041 #ifdef HAVE_VLAN_RX_REGISTER
8042                         igb_receive_skb(q_vector, skb);
8043 #else
8044                         napi_gro_receive(&q_vector->napi, skb);
8045 #endif
8046
8047 #ifndef NETIF_F_GRO
8048                 netdev_ring(rx_ring)->last_rx = jiffies;
8049
8050 #endif
8051                 /* update budget accounting */
8052                 total_packets++;
8053         } while (likely(total_packets < budget));
8054
8055         rx_ring->rx_stats.packets += total_packets;
8056         rx_ring->rx_stats.bytes += total_bytes;
8057         q_vector->rx.total_packets += total_packets;
8058         q_vector->rx.total_bytes += total_bytes;
8059
8060         if (cleaned_count)
8061                 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8062
8063 #ifndef IGB_NO_LRO
8064         igb_lro_flush_all(q_vector);
8065
8066 #endif /* IGB_NO_LRO */
8067         return total_packets < budget;
8068 }
8069 #else /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8070 /**
8071  * igb_get_headlen - determine size of header for LRO/GRO
8072  * @data: pointer to the start of the headers
8073  * @max_len: total length of section to find headers in
8074  *
8075  * This function is meant to determine the length of headers that will
8076  * be recognized by hardware for LRO, and GRO offloads.  The main
8077  * motivation of doing this is to only perform one pull for IPv4 TCP
8078  * packets so that we can do basic things like calculating the gso_size
8079  * based on the average data per packet.
8080  **/
8081 static unsigned int igb_get_headlen(unsigned char *data,
8082                                     unsigned int max_len)
8083 {
8084         union {
8085                 unsigned char *network;
8086                 /* l2 headers */
8087                 struct ethhdr *eth;
8088                 struct vlan_hdr *vlan;
8089                 /* l3 headers */
8090                 struct iphdr *ipv4;
8091                 struct ipv6hdr *ipv6;
8092         } hdr;
8093         __be16 protocol;
8094         u8 nexthdr = 0; /* default to not TCP */
8095         u8 hlen;
8096
8097         /* this should never happen, but better safe than sorry */
8098         if (max_len < ETH_HLEN)
8099                 return max_len;
8100
8101         /* initialize network frame pointer */
8102         hdr.network = data;
8103
8104         /* set first protocol and move network header forward */
8105         protocol = hdr.eth->h_proto;
8106         hdr.network += ETH_HLEN;
8107
8108         /* handle any vlan tag if present */
8109         if (protocol == __constant_htons(ETH_P_8021Q)) {
8110                 if ((hdr.network - data) > (max_len - VLAN_HLEN))
8111                         return max_len;
8112
8113                 protocol = hdr.vlan->h_vlan_encapsulated_proto;
8114                 hdr.network += VLAN_HLEN;
8115         }
8116
8117         /* handle L3 protocols */
8118         if (protocol == __constant_htons(ETH_P_IP)) {
8119                 if ((hdr.network - data) > (max_len - sizeof(struct iphdr)))
8120                         return max_len;
8121
8122                 /* access ihl as a u8 to avoid unaligned access on ia64 */
8123                 hlen = (hdr.network[0] & 0x0F) << 2;
8124
8125                 /* verify hlen meets minimum size requirements */
8126                 if (hlen < sizeof(struct iphdr))
8127                         return hdr.network - data;
8128
8129                 /* record next protocol if header is present */
8130                 if (!(hdr.ipv4->frag_off & htons(IP_OFFSET)))
8131                         nexthdr = hdr.ipv4->protocol;
8132 #ifdef NETIF_F_TSO6
8133         } else if (protocol == __constant_htons(ETH_P_IPV6)) {
8134                 if ((hdr.network - data) > (max_len - sizeof(struct ipv6hdr)))
8135                         return max_len;
8136
8137                 /* record next protocol */
8138                 nexthdr = hdr.ipv6->nexthdr;
8139                 hlen = sizeof(struct ipv6hdr);
8140 #endif /* NETIF_F_TSO6 */
8141         } else {
8142                 return hdr.network - data;
8143         }
8144
8145         /* relocate pointer to start of L4 header */
8146         hdr.network += hlen;
8147
8148         /* finally sort out TCP */
8149         if (nexthdr == IPPROTO_TCP) {
8150                 if ((hdr.network - data) > (max_len - sizeof(struct tcphdr)))
8151                         return max_len;
8152
8153                 /* access doff as a u8 to avoid unaligned access on ia64 */
8154                 hlen = (hdr.network[12] & 0xF0) >> 2;
8155
8156                 /* verify hlen meets minimum size requirements */
8157                 if (hlen < sizeof(struct tcphdr))
8158                         return hdr.network - data;
8159
8160                 hdr.network += hlen;
8161         } else if (nexthdr == IPPROTO_UDP) {
8162                 if ((hdr.network - data) > (max_len - sizeof(struct udphdr)))
8163                         return max_len;
8164
8165                 hdr.network += sizeof(struct udphdr);
8166         }
8167
8168         /*
8169          * If everything has gone correctly hdr.network should be the
8170          * data section of the packet and will be the end of the header.
8171          * If not then it probably represents the end of the last recognized
8172          * header.
8173          */
8174         if ((hdr.network - data) < max_len)
8175                 return hdr.network - data;
8176         else
8177                 return max_len;
8178 }
8179
8180 /**
8181  * igb_pull_tail - igb specific version of skb_pull_tail
8182  * @rx_ring: rx descriptor ring packet is being transacted on
8183  * @rx_desc: pointer to the EOP Rx descriptor
8184  * @skb: pointer to current skb being adjusted
8185  *
8186  * This function is an igb specific version of __pskb_pull_tail.  The
8187  * main difference between this version and the original function is that
8188  * this function can make several assumptions about the state of things
8189  * that allow for significant optimizations versus the standard function.
8190  * As a result we can do things like drop a frag and maintain an accurate
8191  * truesize for the skb.
8192  */
8193 static void igb_pull_tail(struct igb_ring *rx_ring,
8194                           union e1000_adv_rx_desc *rx_desc,
8195                           struct sk_buff *skb)
8196 {
8197         struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[0];
8198         unsigned char *va;
8199         unsigned int pull_len;
8200
8201         /*
8202          * it is valid to use page_address instead of kmap since we are
8203          * working with pages allocated out of the lomem pool per
8204          * alloc_page(GFP_ATOMIC)
8205          */
8206         va = skb_frag_address(frag);
8207
8208 #ifdef HAVE_PTP_1588_CLOCK
8209         if (igb_test_staterr(rx_desc, E1000_RXDADV_STAT_TSIP)) {
8210                 /* retrieve timestamp from buffer */
8211                 igb_ptp_rx_pktstamp(rx_ring->q_vector, va, skb);
8212
8213                 /* update pointers to remove timestamp header */
8214                 skb_frag_size_sub(frag, IGB_TS_HDR_LEN);
8215                 frag->page_offset += IGB_TS_HDR_LEN;
8216                 skb->data_len -= IGB_TS_HDR_LEN;
8217                 skb->len -= IGB_TS_HDR_LEN;
8218
8219                 /* move va to start of packet data */
8220                 va += IGB_TS_HDR_LEN;
8221         }
8222 #endif /* HAVE_PTP_1588_CLOCK */
8223
8224         /*
8225          * we need the header to contain the greater of either ETH_HLEN or
8226          * 60 bytes if the skb->len is less than 60 for skb_pad.
8227          */
8228         pull_len = igb_get_headlen(va, IGB_RX_HDR_LEN);
8229
8230         /* align pull length to size of long to optimize memcpy performance */
8231         skb_copy_to_linear_data(skb, va, ALIGN(pull_len, sizeof(long)));
8232
8233         /* update all of the pointers */
8234         skb_frag_size_sub(frag, pull_len);
8235         frag->page_offset += pull_len;
8236         skb->data_len -= pull_len;
8237         skb->tail += pull_len;
8238 }
8239
8240 /**
8241  * igb_cleanup_headers - Correct corrupted or empty headers
8242  * @rx_ring: rx descriptor ring packet is being transacted on
8243  * @rx_desc: pointer to the EOP Rx descriptor
8244  * @skb: pointer to current skb being fixed
8245  *
8246  * Address the case where we are pulling data in on pages only
8247  * and as such no data is present in the skb header.
8248  *
8249  * In addition if skb is not at least 60 bytes we need to pad it so that
8250  * it is large enough to qualify as a valid Ethernet frame.
8251  *
8252  * Returns true if an error was encountered and skb was freed.
8253  **/
8254 static bool igb_cleanup_headers(struct igb_ring *rx_ring,
8255                                 union e1000_adv_rx_desc *rx_desc,
8256                                 struct sk_buff *skb)
8257 {
8258
8259         if (unlikely((igb_test_staterr(rx_desc,
8260                                        E1000_RXDEXT_ERR_FRAME_ERR_MASK)))) {
8261                 struct net_device *netdev = rx_ring->netdev;
8262                 if (!(netdev->features & NETIF_F_RXALL)) {
8263                         dev_kfree_skb_any(skb);
8264                         return true;
8265                 }
8266         }
8267
8268         /* place header in linear portion of buffer */
8269         if (skb_is_nonlinear(skb))
8270                 igb_pull_tail(rx_ring, rx_desc, skb);
8271
8272         /* if skb_pad returns an error the skb was freed */
8273         if (unlikely(skb->len < 60)) {
8274                 int pad_len = 60 - skb->len;
8275
8276                 if (skb_pad(skb, pad_len))
8277                         return true;
8278                 __skb_put(skb, pad_len);
8279         }
8280
8281         return false;
8282 }
8283
8284 /* igb_clean_rx_irq -- * packet split */
8285 static bool igb_clean_rx_irq(struct igb_q_vector *q_vector, int budget)
8286 {
8287         struct igb_ring *rx_ring = q_vector->rx.ring;
8288         struct sk_buff *skb = rx_ring->skb;
8289         unsigned int total_bytes = 0, total_packets = 0;
8290         u16 cleaned_count = igb_desc_unused(rx_ring);
8291
8292         do {
8293                 union e1000_adv_rx_desc *rx_desc;
8294
8295                 /* return some buffers to hardware, one at a time is too slow */
8296                 if (cleaned_count >= IGB_RX_BUFFER_WRITE) {
8297                         igb_alloc_rx_buffers(rx_ring, cleaned_count);
8298                         cleaned_count = 0;
8299                 }
8300
8301                 rx_desc = IGB_RX_DESC(rx_ring, rx_ring->next_to_clean);
8302
8303                 if (!igb_test_staterr(rx_desc, E1000_RXD_STAT_DD))
8304                         break;
8305
8306                 /*
8307                  * This memory barrier is needed to keep us from reading
8308                  * any other fields out of the rx_desc until we know the
8309                  * RXD_STAT_DD bit is set
8310                  */
8311                 rmb();
8312
8313                 /* retrieve a buffer from the ring */
8314                 skb = igb_fetch_rx_buffer(rx_ring, rx_desc, skb);
8315
8316                 /* exit if we failed to retrieve a buffer */
8317                 if (!skb)
8318                         break;
8319
8320                 cleaned_count++;
8321
8322                 /* fetch next buffer in frame if non-eop */
8323                 if (igb_is_non_eop(rx_ring, rx_desc))
8324                         continue;
8325
8326                 /* verify the packet layout is correct */
8327                 if (igb_cleanup_headers(rx_ring, rx_desc, skb)) {
8328                         skb = NULL;
8329                         continue;
8330                 }
8331
8332                 /* probably a little skewed due to removing CRC */
8333                 total_bytes += skb->len;
8334
8335                 /* populate checksum, timestamp, VLAN, and protocol */
8336                 igb_process_skb_fields(rx_ring, rx_desc, skb);
8337
8338 #ifndef IGB_NO_LRO
8339                 if (igb_can_lro(rx_ring, rx_desc, skb))
8340                         igb_lro_receive(q_vector, skb);
8341                 else
8342 #endif
8343 #ifdef HAVE_VLAN_RX_REGISTER
8344                         igb_receive_skb(q_vector, skb);
8345 #else
8346                         napi_gro_receive(&q_vector->napi, skb);
8347 #endif
8348 #ifndef NETIF_F_GRO
8349
8350                 netdev_ring(rx_ring)->last_rx = jiffies;
8351 #endif
8352
8353                 /* reset skb pointer */
8354                 skb = NULL;
8355
8356                 /* update budget accounting */
8357                 total_packets++;
8358         } while (likely(total_packets < budget));
8359
8360         /* place incomplete frames back on ring for completion */
8361         rx_ring->skb = skb;
8362
8363         rx_ring->rx_stats.packets += total_packets;
8364         rx_ring->rx_stats.bytes += total_bytes;
8365         q_vector->rx.total_packets += total_packets;
8366         q_vector->rx.total_bytes += total_bytes;
8367
8368         if (cleaned_count)
8369                 igb_alloc_rx_buffers(rx_ring, cleaned_count);
8370
8371 #ifndef IGB_NO_LRO
8372         igb_lro_flush_all(q_vector);
8373
8374 #endif /* IGB_NO_LRO */
8375         return total_packets < budget;
8376 }
8377 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8378
8379 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8380 static bool igb_alloc_mapped_skb(struct igb_ring *rx_ring,
8381                                  struct igb_rx_buffer *bi)
8382 {
8383         struct sk_buff *skb = bi->skb;
8384         dma_addr_t dma = bi->dma;
8385
8386         if (dma)
8387                 return true;
8388
8389         if (likely(!skb)) {
8390                 skb = netdev_alloc_skb_ip_align(netdev_ring(rx_ring),
8391                                                 rx_ring->rx_buffer_len);
8392                 bi->skb = skb;
8393                 if (!skb) {
8394                         rx_ring->rx_stats.alloc_failed++;
8395                         return false;
8396                 }
8397
8398                 /* initialize skb for ring */
8399                 skb_record_rx_queue(skb, ring_queue_index(rx_ring));
8400         }
8401
8402         dma = dma_map_single(rx_ring->dev, skb->data,
8403                              rx_ring->rx_buffer_len, DMA_FROM_DEVICE);
8404
8405         /* if mapping failed free memory back to system since
8406          * there isn't much point in holding memory we can't use
8407          */
8408         if (dma_mapping_error(rx_ring->dev, dma)) {
8409                 dev_kfree_skb_any(skb);
8410                 bi->skb = NULL;
8411
8412                 rx_ring->rx_stats.alloc_failed++;
8413                 return false;
8414         }
8415
8416         bi->dma = dma;
8417         return true;
8418 }
8419
8420 #else /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8421 static bool igb_alloc_mapped_page(struct igb_ring *rx_ring,
8422                                   struct igb_rx_buffer *bi)
8423 {
8424         struct page *page = bi->page;
8425         dma_addr_t dma;
8426
8427         /* since we are recycling buffers we should seldom need to alloc */
8428         if (likely(page))
8429                 return true;
8430
8431         /* alloc new page for storage */
8432         page = alloc_page(GFP_ATOMIC | __GFP_COLD);
8433         if (unlikely(!page)) {
8434                 rx_ring->rx_stats.alloc_failed++;
8435                 return false;
8436         }
8437
8438         /* map page for use */
8439         dma = dma_map_page(rx_ring->dev, page, 0, PAGE_SIZE, DMA_FROM_DEVICE);
8440
8441         /*
8442          * if mapping failed free memory back to system since
8443          * there isn't much point in holding memory we can't use
8444          */
8445         if (dma_mapping_error(rx_ring->dev, dma)) {
8446                 __free_page(page);
8447
8448                 rx_ring->rx_stats.alloc_failed++;
8449                 return false;
8450         }
8451
8452         bi->dma = dma;
8453         bi->page = page;
8454         bi->page_offset = 0;
8455
8456         return true;
8457 }
8458
8459 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8460 /**
8461  * igb_alloc_rx_buffers - Replace used receive buffers; packet split
8462  * @adapter: address of board private structure
8463  **/
8464 void igb_alloc_rx_buffers(struct igb_ring *rx_ring, u16 cleaned_count)
8465 {
8466         union e1000_adv_rx_desc *rx_desc;
8467         struct igb_rx_buffer *bi;
8468         u16 i = rx_ring->next_to_use;
8469
8470         /* nothing to do */
8471         if (!cleaned_count)
8472                 return;
8473
8474         rx_desc = IGB_RX_DESC(rx_ring, i);
8475         bi = &rx_ring->rx_buffer_info[i];
8476         i -= rx_ring->count;
8477
8478         do {
8479 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8480                 if (!igb_alloc_mapped_skb(rx_ring, bi))
8481 #else
8482                 if (!igb_alloc_mapped_page(rx_ring, bi))
8483 #endif /* CONFIG_IGB_DISABLE_PACKET_SPLIT */
8484                         break;
8485
8486                 /*
8487                  * Refresh the desc even if buffer_addrs didn't change
8488                  * because each write-back erases this info.
8489                  */
8490 #ifdef CONFIG_IGB_DISABLE_PACKET_SPLIT
8491                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma);
8492 #else
8493                 rx_desc->read.pkt_addr = cpu_to_le64(bi->dma + bi->page_offset);
8494 #endif
8495
8496                 rx_desc++;
8497                 bi++;
8498                 i++;
8499                 if (unlikely(!i)) {
8500                         rx_desc = IGB_RX_DESC(rx_ring, 0);
8501                         bi = rx_ring->rx_buffer_info;
8502                         i -= rx_ring->count;
8503                 }
8504
8505                 /* clear the hdr_addr for the next_to_use descriptor */
8506                 rx_desc->read.hdr_addr = 0;
8507
8508                 cleaned_count--;
8509         } while (cleaned_count);
8510
8511         i += rx_ring->count;
8512
8513         if (rx_ring->next_to_use != i) {
8514                 /* record the next descriptor to use */
8515                 rx_ring->next_to_use = i;
8516
8517 #ifndef CONFIG_IGB_DISABLE_PACKET_SPLIT
8518                 /* update next to alloc since we have filled the ring */
8519                 rx_ring->next_to_alloc = i;
8520
8521 #endif
8522                 /*
8523                  * Force memory writes to complete before letting h/w
8524                  * know there are new descriptors to fetch.  (Only
8525                  * applicable for weak-ordered memory model archs,
8526                  * such as IA-64).
8527                  */
8528                 wmb();
8529                 writel(i, rx_ring->tail);
8530         }
8531 }
8532
8533 #ifdef SIOCGMIIPHY
8534 /**
8535  * igb_mii_ioctl -
8536  * @netdev:
8537  * @ifreq:
8538  * @cmd:
8539  **/
8540 static int igb_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
8541 {
8542         struct igb_adapter *adapter = netdev_priv(netdev);
8543         struct mii_ioctl_data *data = if_mii(ifr);
8544
8545         if (adapter->hw.phy.media_type != e1000_media_type_copper)
8546                 return -EOPNOTSUPP;
8547
8548         switch (cmd) {
8549         case SIOCGMIIPHY:
8550                 data->phy_id = adapter->hw.phy.addr;
8551                 break;
8552         case SIOCGMIIREG:
8553                 if (!capable(CAP_NET_ADMIN))
8554                         return -EPERM;
8555                 if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
8556                                    &data->val_out))
8557                         return -EIO;
8558                 break;
8559         case SIOCSMIIREG:
8560         default:
8561                 return -EOPNOTSUPP;
8562         }
8563         return E1000_SUCCESS;
8564 }
8565
8566 #endif
8567 /**
8568  * igb_ioctl -
8569  * @netdev:
8570  * @ifreq:
8571  * @cmd:
8572  **/
8573 static int igb_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
8574 {
8575         switch (cmd) {
8576 #ifdef SIOCGMIIPHY
8577         case SIOCGMIIPHY:
8578         case SIOCGMIIREG:
8579         case SIOCSMIIREG:
8580                 return igb_mii_ioctl(netdev, ifr, cmd);
8581 #endif
8582 #ifdef HAVE_PTP_1588_CLOCK
8583         case SIOCSHWTSTAMP:
8584                 return igb_ptp_hwtstamp_ioctl(netdev, ifr, cmd);
8585 #endif /* HAVE_PTP_1588_CLOCK */
8586 #ifdef ETHTOOL_OPS_COMPAT
8587         case SIOCETHTOOL:
8588                 return ethtool_ioctl(ifr);
8589 #endif
8590         default:
8591                 return -EOPNOTSUPP;
8592         }
8593 }
8594
8595 s32 e1000_read_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
8596 {
8597         struct igb_adapter *adapter = hw->back;
8598         u16 cap_offset;
8599
8600         cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
8601         if (!cap_offset)
8602                 return -E1000_ERR_CONFIG;
8603
8604         pci_read_config_word(adapter->pdev, cap_offset + reg, value);
8605
8606         return E1000_SUCCESS;
8607 }
8608
8609 s32 e1000_write_pcie_cap_reg(struct e1000_hw *hw, u32 reg, u16 *value)
8610 {
8611         struct igb_adapter *adapter = hw->back;
8612         u16 cap_offset;
8613
8614         cap_offset = pci_find_capability(adapter->pdev, PCI_CAP_ID_EXP);
8615         if (!cap_offset)
8616                 return -E1000_ERR_CONFIG;
8617
8618         pci_write_config_word(adapter->pdev, cap_offset + reg, *value);
8619
8620         return E1000_SUCCESS;
8621 }
8622
8623 #ifdef HAVE_VLAN_RX_REGISTER
8624 static void igb_vlan_mode(struct net_device *netdev, struct vlan_group *vlgrp)
8625 #else
8626 void igb_vlan_mode(struct net_device *netdev, u32 features)
8627 #endif
8628 {
8629         struct igb_adapter *adapter = netdev_priv(netdev);
8630         struct e1000_hw *hw = &adapter->hw;
8631         u32 ctrl, rctl;
8632         int i;
8633 #ifdef HAVE_VLAN_RX_REGISTER
8634         bool enable = !!vlgrp;
8635
8636         igb_irq_disable(adapter);
8637
8638         adapter->vlgrp = vlgrp;
8639
8640         if (!test_bit(__IGB_DOWN, &adapter->state))
8641                 igb_irq_enable(adapter);
8642 #else
8643 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8644         bool enable = !!(features & NETIF_F_HW_VLAN_CTAG_RX);
8645 #else
8646         bool enable = !!(features & NETIF_F_HW_VLAN_RX);
8647 #endif
8648 #endif
8649
8650         if (enable) {
8651                 /* enable VLAN tag insert/strip */
8652                 ctrl = E1000_READ_REG(hw, E1000_CTRL);
8653                 ctrl |= E1000_CTRL_VME;
8654                 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
8655
8656                 /* Disable CFI check */
8657                 rctl = E1000_READ_REG(hw, E1000_RCTL);
8658                 rctl &= ~E1000_RCTL_CFIEN;
8659                 E1000_WRITE_REG(hw, E1000_RCTL, rctl);
8660         } else {
8661                 /* disable VLAN tag insert/strip */
8662                 ctrl = E1000_READ_REG(hw, E1000_CTRL);
8663                 ctrl &= ~E1000_CTRL_VME;
8664                 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
8665         }
8666
8667 #ifndef CONFIG_IGB_VMDQ_NETDEV
8668         for (i = 0; i < adapter->vmdq_pools; i++) {
8669                 igb_set_vf_vlan_strip(adapter,
8670                                       adapter->vfs_allocated_count + i,
8671                                       enable);
8672         }
8673
8674 #else
8675         igb_set_vf_vlan_strip(adapter,
8676                               adapter->vfs_allocated_count,
8677                               enable);
8678
8679         for (i = 1; i < adapter->vmdq_pools; i++) {
8680 #ifdef HAVE_VLAN_RX_REGISTER
8681                 struct igb_vmdq_adapter *vadapter;
8682                 vadapter = netdev_priv(adapter->vmdq_netdev[i-1]);
8683                 enable = !!vadapter->vlgrp;
8684 #else
8685                 struct net_device *vnetdev;
8686                 vnetdev = adapter->vmdq_netdev[i-1];
8687 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8688                 enable = !!(vnetdev->features & NETIF_F_HW_VLAN_CTAG_RX);
8689 #else
8690                 enable = !!(vnetdev->features & NETIF_F_HW_VLAN_RX);
8691 #endif
8692 #endif
8693                 igb_set_vf_vlan_strip(adapter,
8694                                       adapter->vfs_allocated_count + i,
8695                                       enable);
8696         }
8697
8698 #endif
8699         igb_rlpml_set(adapter);
8700 }
8701
8702 #ifdef HAVE_VLAN_PROTOCOL
8703 static int igb_vlan_rx_add_vid(struct net_device *netdev, __be16 proto, u16 vid)
8704 #elif defined HAVE_INT_NDO_VLAN_RX_ADD_VID
8705 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8706 static int igb_vlan_rx_add_vid(struct net_device *netdev,
8707                                __always_unused __be16 proto, u16 vid)
8708 #else
8709 static int igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
8710 #endif
8711 #else
8712 static void igb_vlan_rx_add_vid(struct net_device *netdev, u16 vid)
8713 #endif
8714 {
8715         struct igb_adapter *adapter = netdev_priv(netdev);
8716         int pf_id = adapter->vfs_allocated_count;
8717
8718         /* attempt to add filter to vlvf array */
8719         igb_vlvf_set(adapter, vid, TRUE, pf_id);
8720
8721         /* add the filter since PF can receive vlans w/o entry in vlvf */
8722         igb_vfta_set(adapter, vid, TRUE);
8723 #ifndef HAVE_NETDEV_VLAN_FEATURES
8724
8725         /* Copy feature flags from netdev to the vlan netdev for this vid.
8726          * This allows things like TSO to bubble down to our vlan device.
8727          * There is no need to update netdev for vlan 0 (DCB), since it
8728          * wouldn't has v_netdev.
8729          */
8730         if (adapter->vlgrp) {
8731                 struct vlan_group *vlgrp = adapter->vlgrp;
8732                 struct net_device *v_netdev = vlan_group_get_device(vlgrp, vid);
8733                 if (v_netdev) {
8734                         v_netdev->features |= netdev->features;
8735                         vlan_group_set_device(vlgrp, vid, v_netdev);
8736                 }
8737         }
8738 #endif
8739 #ifndef HAVE_VLAN_RX_REGISTER
8740
8741         set_bit(vid, adapter->active_vlans);
8742 #endif
8743 #ifdef HAVE_INT_NDO_VLAN_RX_ADD_VID
8744         return 0;
8745 #endif
8746 }
8747
8748 #ifdef HAVE_VLAN_PROTOCOL
8749 static int igb_vlan_rx_kill_vid(struct net_device *netdev, __be16 proto, u16 vid)
8750 #elif defined HAVE_INT_NDO_VLAN_RX_ADD_VID
8751 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8752 static int igb_vlan_rx_kill_vid(struct net_device *netdev,
8753                                 __always_unused __be16 proto, u16 vid)
8754 #else
8755 static int igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
8756 #endif
8757 #else
8758 static void igb_vlan_rx_kill_vid(struct net_device *netdev, u16 vid)
8759 #endif
8760 {
8761         struct igb_adapter *adapter = netdev_priv(netdev);
8762         int pf_id = adapter->vfs_allocated_count;
8763         s32 err;
8764
8765 #ifdef HAVE_VLAN_RX_REGISTER
8766         igb_irq_disable(adapter);
8767
8768         vlan_group_set_device(adapter->vlgrp, vid, NULL);
8769
8770         if (!test_bit(__IGB_DOWN, &adapter->state))
8771                 igb_irq_enable(adapter);
8772
8773 #endif /* HAVE_VLAN_RX_REGISTER */
8774         /* remove vlan from VLVF table array */
8775         err = igb_vlvf_set(adapter, vid, FALSE, pf_id);
8776
8777         /* if vid was not present in VLVF just remove it from table */
8778         if (err)
8779                 igb_vfta_set(adapter, vid, FALSE);
8780 #ifndef HAVE_VLAN_RX_REGISTER
8781
8782         clear_bit(vid, adapter->active_vlans);
8783 #endif
8784 #ifdef HAVE_INT_NDO_VLAN_RX_ADD_VID
8785         return 0;
8786 #endif
8787 }
8788
8789 static void igb_restore_vlan(struct igb_adapter *adapter)
8790 {
8791 #ifdef HAVE_VLAN_RX_REGISTER
8792         igb_vlan_mode(adapter->netdev, adapter->vlgrp);
8793
8794         if (adapter->vlgrp) {
8795                 u16 vid;
8796                 for (vid = 0; vid < VLAN_N_VID; vid++) {
8797                         if (!vlan_group_get_device(adapter->vlgrp, vid))
8798                                 continue;
8799 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8800                         igb_vlan_rx_add_vid(adapter->netdev,
8801                                             htons(ETH_P_8021Q), vid);
8802 #else
8803                         igb_vlan_rx_add_vid(adapter->netdev, vid);
8804 #endif
8805                 }
8806         }
8807 #else
8808         u16 vid;
8809
8810         igb_vlan_mode(adapter->netdev, adapter->netdev->features);
8811
8812         for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
8813 #ifdef NETIF_F_HW_VLAN_CTAG_RX
8814                 igb_vlan_rx_add_vid(adapter->netdev,
8815                                     htons(ETH_P_8021Q), vid);
8816 #else
8817                 igb_vlan_rx_add_vid(adapter->netdev, vid);
8818 #endif
8819 #endif
8820 }
8821
8822 int igb_set_spd_dplx(struct igb_adapter *adapter, u16 spddplx)
8823 {
8824         struct pci_dev *pdev = adapter->pdev;
8825         struct e1000_mac_info *mac = &adapter->hw.mac;
8826
8827         mac->autoneg = 0;
8828
8829         /* SerDes device's does not support 10Mbps Full/duplex
8830          * and 100Mbps Half duplex
8831          */
8832         if (adapter->hw.phy.media_type == e1000_media_type_internal_serdes) {
8833                 switch (spddplx) {
8834                 case SPEED_10 + DUPLEX_HALF:
8835                 case SPEED_10 + DUPLEX_FULL:
8836                 case SPEED_100 + DUPLEX_HALF:
8837                         dev_err(pci_dev_to_dev(pdev),
8838                                 "Unsupported Speed/Duplex configuration\n");
8839                         return -EINVAL;
8840                 default:
8841                         break;
8842                 }
8843         }
8844
8845         switch (spddplx) {
8846         case SPEED_10 + DUPLEX_HALF:
8847                 mac->forced_speed_duplex = ADVERTISE_10_HALF;
8848                 break;
8849         case SPEED_10 + DUPLEX_FULL:
8850                 mac->forced_speed_duplex = ADVERTISE_10_FULL;
8851                 break;
8852         case SPEED_100 + DUPLEX_HALF:
8853                 mac->forced_speed_duplex = ADVERTISE_100_HALF;
8854                 break;
8855         case SPEED_100 + DUPLEX_FULL:
8856                 mac->forced_speed_duplex = ADVERTISE_100_FULL;
8857                 break;
8858         case SPEED_1000 + DUPLEX_FULL:
8859                 mac->autoneg = 1;
8860                 adapter->hw.phy.autoneg_advertised = ADVERTISE_1000_FULL;
8861                 break;
8862         case SPEED_1000 + DUPLEX_HALF: /* not supported */
8863         default:
8864                 dev_err(pci_dev_to_dev(pdev), "Unsupported Speed/Duplex configuration\n");
8865                 return -EINVAL;
8866         }
8867
8868         /* clear MDI, MDI(-X) override is only allowed when autoneg enabled */
8869         adapter->hw.phy.mdix = AUTO_ALL_MODES;
8870
8871         return 0;
8872 }
8873
8874 static int __igb_shutdown(struct pci_dev *pdev, bool *enable_wake,
8875                           bool runtime)
8876 {
8877         struct net_device *netdev = pci_get_drvdata(pdev);
8878         struct igb_adapter *adapter = netdev_priv(netdev);
8879         struct e1000_hw *hw = &adapter->hw;
8880         u32 ctrl, rctl, status;
8881         u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
8882 #ifdef CONFIG_PM
8883         int retval = 0;
8884 #endif
8885
8886         netif_device_detach(netdev);
8887
8888         status = E1000_READ_REG(hw, E1000_STATUS);
8889         if (status & E1000_STATUS_LU)
8890                 wufc &= ~E1000_WUFC_LNKC;
8891
8892         if (netif_running(netdev))
8893                 __igb_close(netdev, true);
8894
8895         igb_clear_interrupt_scheme(adapter);
8896
8897 #ifdef CONFIG_PM
8898         retval = pci_save_state(pdev);
8899         if (retval)
8900                 return retval;
8901 #endif
8902
8903         if (wufc) {
8904                 igb_setup_rctl(adapter);
8905                 igb_set_rx_mode(netdev);
8906
8907                 /* turn on all-multi mode if wake on multicast is enabled */
8908                 if (wufc & E1000_WUFC_MC) {
8909                         rctl = E1000_READ_REG(hw, E1000_RCTL);
8910                         rctl |= E1000_RCTL_MPE;
8911                         E1000_WRITE_REG(hw, E1000_RCTL, rctl);
8912                 }
8913
8914                 ctrl = E1000_READ_REG(hw, E1000_CTRL);
8915                 /* phy power management enable */
8916                 #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
8917                 ctrl |= E1000_CTRL_ADVD3WUC;
8918                 E1000_WRITE_REG(hw, E1000_CTRL, ctrl);
8919
8920                 /* Allow time for pending master requests to run */
8921                 e1000_disable_pcie_master(hw);
8922
8923                 E1000_WRITE_REG(hw, E1000_WUC, E1000_WUC_PME_EN);
8924                 E1000_WRITE_REG(hw, E1000_WUFC, wufc);
8925         } else {
8926                 E1000_WRITE_REG(hw, E1000_WUC, 0);
8927                 E1000_WRITE_REG(hw, E1000_WUFC, 0);
8928         }
8929
8930         *enable_wake = wufc || adapter->en_mng_pt;
8931         if (!*enable_wake)
8932                 igb_power_down_link(adapter);
8933         else
8934                 igb_power_up_link(adapter);
8935
8936         /* Release control of h/w to f/w.  If f/w is AMT enabled, this
8937          * would have already happened in close and is redundant. */
8938         igb_release_hw_control(adapter);
8939
8940         pci_disable_device(pdev);
8941
8942         return 0;
8943 }
8944
8945 #ifdef CONFIG_PM
8946 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8947 static int igb_suspend(struct device *dev)
8948 #else
8949 static int igb_suspend(struct pci_dev *pdev, pm_message_t state)
8950 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8951 {
8952 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8953         struct pci_dev *pdev = to_pci_dev(dev);
8954 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8955         int retval;
8956         bool wake;
8957
8958         retval = __igb_shutdown(pdev, &wake, 0);
8959         if (retval)
8960                 return retval;
8961
8962         if (wake) {
8963                 pci_prepare_to_sleep(pdev);
8964         } else {
8965                 pci_wake_from_d3(pdev, false);
8966                 pci_set_power_state(pdev, PCI_D3hot);
8967         }
8968
8969         return 0;
8970 }
8971
8972 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8973 static int igb_resume(struct device *dev)
8974 #else
8975 static int igb_resume(struct pci_dev *pdev)
8976 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8977 {
8978 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
8979         struct pci_dev *pdev = to_pci_dev(dev);
8980 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
8981         struct net_device *netdev = pci_get_drvdata(pdev);
8982         struct igb_adapter *adapter = netdev_priv(netdev);
8983         struct e1000_hw *hw = &adapter->hw;
8984         u32 err;
8985
8986         pci_set_power_state(pdev, PCI_D0);
8987         pci_restore_state(pdev);
8988         pci_save_state(pdev);
8989
8990         err = pci_enable_device_mem(pdev);
8991         if (err) {
8992                 dev_err(pci_dev_to_dev(pdev),
8993                         "igb: Cannot enable PCI device from suspend\n");
8994                 return err;
8995         }
8996         pci_set_master(pdev);
8997
8998         pci_enable_wake(pdev, PCI_D3hot, 0);
8999         pci_enable_wake(pdev, PCI_D3cold, 0);
9000
9001         if (igb_init_interrupt_scheme(adapter, true)) {
9002                 dev_err(pci_dev_to_dev(pdev), "Unable to allocate memory for queues\n");
9003                 return -ENOMEM;
9004         }
9005
9006         igb_reset(adapter);
9007
9008         /* let the f/w know that the h/w is now under the control of the
9009          * driver. */
9010         igb_get_hw_control(adapter);
9011
9012         E1000_WRITE_REG(hw, E1000_WUS, ~0);
9013
9014         if (netdev->flags & IFF_UP) {
9015                 rtnl_lock();
9016                 err = __igb_open(netdev, true);
9017                 rtnl_unlock();
9018                 if (err)
9019                         return err;
9020         }
9021
9022         netif_device_attach(netdev);
9023
9024         return 0;
9025 }
9026
9027 #ifdef CONFIG_PM_RUNTIME
9028 #ifdef HAVE_SYSTEM_SLEEP_PM_OPS
9029 static int igb_runtime_idle(struct device *dev)
9030 {
9031         struct pci_dev *pdev = to_pci_dev(dev);
9032         struct net_device *netdev = pci_get_drvdata(pdev);
9033         struct igb_adapter *adapter = netdev_priv(netdev);
9034
9035         if (!igb_has_link(adapter))
9036                 pm_schedule_suspend(dev, MSEC_PER_SEC * 5);
9037
9038         return -EBUSY;
9039 }
9040
9041 static int igb_runtime_suspend(struct device *dev)
9042 {
9043         struct pci_dev *pdev = to_pci_dev(dev);
9044         int retval;
9045         bool wake;
9046
9047         retval = __igb_shutdown(pdev, &wake, 1);
9048         if (retval)
9049                 return retval;
9050
9051         if (wake) {
9052                 pci_prepare_to_sleep(pdev);
9053         } else {
9054                 pci_wake_from_d3(pdev, false);
9055                 pci_set_power_state(pdev, PCI_D3hot);
9056         }
9057
9058         return 0;
9059 }
9060
9061 static int igb_runtime_resume(struct device *dev)
9062 {
9063         return igb_resume(dev);
9064 }
9065 #endif /* HAVE_SYSTEM_SLEEP_PM_OPS */
9066 #endif /* CONFIG_PM_RUNTIME */
9067 #endif /* CONFIG_PM */
9068
9069 #ifdef USE_REBOOT_NOTIFIER
9070 /* only want to do this for 2.4 kernels? */
9071 static int igb_notify_reboot(struct notifier_block *nb, unsigned long event,
9072                              void *p)
9073 {
9074         struct pci_dev *pdev = NULL;
9075         bool wake;
9076
9077         switch (event) {
9078         case SYS_DOWN:
9079         case SYS_HALT:
9080         case SYS_POWER_OFF:
9081                 while ((pdev = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pdev))) {
9082                         if (pci_dev_driver(pdev) == &igb_driver) {
9083                                 __igb_shutdown(pdev, &wake, 0);
9084                                 if (event == SYS_POWER_OFF) {
9085                                         pci_wake_from_d3(pdev, wake);
9086                                         pci_set_power_state(pdev, PCI_D3hot);
9087                                 }
9088                         }
9089                 }
9090         }
9091         return NOTIFY_DONE;
9092 }
9093 #else
9094 static void igb_shutdown(struct pci_dev *pdev)
9095 {
9096         bool wake = false;
9097
9098         __igb_shutdown(pdev, &wake, 0);
9099
9100         if (system_state == SYSTEM_POWER_OFF) {
9101                 pci_wake_from_d3(pdev, wake);
9102                 pci_set_power_state(pdev, PCI_D3hot);
9103         }
9104 }
9105 #endif /* USE_REBOOT_NOTIFIER */
9106
9107 #ifdef CONFIG_NET_POLL_CONTROLLER
9108 /*
9109  * Polling 'interrupt' - used by things like netconsole to send skbs
9110  * without having to re-enable interrupts. It's not called while
9111  * the interrupt routine is executing.
9112  */
9113 static void igb_netpoll(struct net_device *netdev)
9114 {
9115         struct igb_adapter *adapter = netdev_priv(netdev);
9116         struct e1000_hw *hw = &adapter->hw;
9117         struct igb_q_vector *q_vector;
9118         int i;
9119
9120         for (i = 0; i < adapter->num_q_vectors; i++) {
9121                 q_vector = adapter->q_vector[i];
9122                 if (adapter->msix_entries)
9123                         E1000_WRITE_REG(hw, E1000_EIMC, q_vector->eims_value);
9124                 else
9125                         igb_irq_disable(adapter);
9126                 napi_schedule(&q_vector->napi);
9127         }
9128 }
9129 #endif /* CONFIG_NET_POLL_CONTROLLER */
9130
9131 #ifdef HAVE_PCI_ERS
9132 #define E1000_DEV_ID_82576_VF 0x10CA
9133 /**
9134  * igb_io_error_detected - called when PCI error is detected
9135  * @pdev: Pointer to PCI device
9136  * @state: The current pci connection state
9137  *
9138  * This function is called after a PCI bus error affecting
9139  * this device has been detected.
9140  */
9141 static pci_ers_result_t igb_io_error_detected(struct pci_dev *pdev,
9142                                               pci_channel_state_t state)
9143 {
9144         struct net_device *netdev = pci_get_drvdata(pdev);
9145         struct igb_adapter *adapter = netdev_priv(netdev);
9146
9147 #ifdef CONFIG_PCI_IOV__UNUSED
9148         struct pci_dev *bdev, *vfdev;
9149         u32 dw0, dw1, dw2, dw3;
9150         int vf, pos;
9151         u16 req_id, pf_func;
9152
9153         if (!(adapter->flags & IGB_FLAG_DETECT_BAD_DMA))
9154                 goto skip_bad_vf_detection;
9155
9156         bdev = pdev->bus->self;
9157         while (bdev && (pci_pcie_type(bdev) != PCI_EXP_TYPE_ROOT_PORT))
9158                 bdev = bdev->bus->self;
9159
9160         if (!bdev)
9161                 goto skip_bad_vf_detection;
9162
9163         pos = pci_find_ext_capability(bdev, PCI_EXT_CAP_ID_ERR);
9164         if (!pos)
9165                 goto skip_bad_vf_detection;
9166
9167         pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG, &dw0);
9168         pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 4, &dw1);
9169         pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 8, &dw2);
9170         pci_read_config_dword(bdev, pos + PCI_ERR_HEADER_LOG + 12, &dw3);
9171
9172         req_id = dw1 >> 16;
9173         /* On the 82576 if bit 7 of the requestor ID is set then it's a VF */
9174         if (!(req_id & 0x0080))
9175                 goto skip_bad_vf_detection;
9176
9177         pf_func = req_id & 0x01;
9178         if ((pf_func & 1) == (pdev->devfn & 1)) {
9179
9180                 vf = (req_id & 0x7F) >> 1;
9181                 dev_err(pci_dev_to_dev(pdev),
9182                         "VF %d has caused a PCIe error\n", vf);
9183                 dev_err(pci_dev_to_dev(pdev),
9184                         "TLP: dw0: %8.8x\tdw1: %8.8x\tdw2: "
9185                         "%8.8x\tdw3: %8.8x\n",
9186                         dw0, dw1, dw2, dw3);
9187
9188                 /* Find the pci device of the offending VF */
9189                 vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
9190                                        E1000_DEV_ID_82576_VF, NULL);
9191                 while (vfdev) {
9192                         if (vfdev->devfn == (req_id & 0xFF))
9193                                 break;
9194                         vfdev = pci_get_device(PCI_VENDOR_ID_INTEL,
9195                                                E1000_DEV_ID_82576_VF, vfdev);
9196                 }
9197                 /*
9198                  * There's a slim chance the VF could have been hot plugged,
9199                  * so if it is no longer present we don't need to issue the
9200                  * VFLR.  Just clean up the AER in that case.
9201                  */
9202                 if (vfdev) {
9203                         dev_err(pci_dev_to_dev(pdev),
9204                                 "Issuing VFLR to VF %d\n", vf);
9205                         pci_write_config_dword(vfdev, 0xA8, 0x00008000);
9206                 }
9207
9208                 pci_cleanup_aer_uncorrect_error_status(pdev);
9209         }
9210
9211         /*
9212          * Even though the error may have occurred on the other port
9213          * we still need to increment the vf error reference count for
9214          * both ports because the I/O resume function will be called
9215          * for both of them.
9216          */
9217         adapter->vferr_refcount++;
9218
9219         return PCI_ERS_RESULT_RECOVERED;
9220
9221 skip_bad_vf_detection:
9222 #endif /* CONFIG_PCI_IOV */
9223
9224         netif_device_detach(netdev);
9225
9226         if (state == pci_channel_io_perm_failure)
9227                 return PCI_ERS_RESULT_DISCONNECT;
9228
9229         if (netif_running(netdev))
9230                 igb_down(adapter);
9231         pci_disable_device(pdev);
9232
9233         /* Request a slot slot reset. */
9234         return PCI_ERS_RESULT_NEED_RESET;
9235 }
9236
9237 /**
9238  * igb_io_slot_reset - called after the pci bus has been reset.
9239  * @pdev: Pointer to PCI device
9240  *
9241  * Restart the card from scratch, as if from a cold-boot. Implementation
9242  * resembles the first-half of the igb_resume routine.
9243  */
9244 static pci_ers_result_t igb_io_slot_reset(struct pci_dev *pdev)
9245 {
9246         struct net_device *netdev = pci_get_drvdata(pdev);
9247         struct igb_adapter *adapter = netdev_priv(netdev);
9248         struct e1000_hw *hw = &adapter->hw;
9249         pci_ers_result_t result;
9250
9251         if (pci_enable_device_mem(pdev)) {
9252                 dev_err(pci_dev_to_dev(pdev),
9253                         "Cannot re-enable PCI device after reset.\n");
9254                 result = PCI_ERS_RESULT_DISCONNECT;
9255         } else {
9256                 pci_set_master(pdev);
9257                 pci_restore_state(pdev);
9258                 pci_save_state(pdev);
9259
9260                 pci_enable_wake(pdev, PCI_D3hot, 0);
9261                 pci_enable_wake(pdev, PCI_D3cold, 0);
9262
9263                 schedule_work(&adapter->reset_task);
9264                 E1000_WRITE_REG(hw, E1000_WUS, ~0);
9265                 result = PCI_ERS_RESULT_RECOVERED;
9266         }
9267
9268         pci_cleanup_aer_uncorrect_error_status(pdev);
9269
9270         return result;
9271 }
9272
9273 /**
9274  * igb_io_resume - called when traffic can start flowing again.
9275  * @pdev: Pointer to PCI device
9276  *
9277  * This callback is called when the error recovery driver tells us that
9278  * its OK to resume normal operation. Implementation resembles the
9279  * second-half of the igb_resume routine.
9280  */
9281 static void igb_io_resume(struct pci_dev *pdev)
9282 {
9283         struct net_device *netdev = pci_get_drvdata(pdev);
9284         struct igb_adapter *adapter = netdev_priv(netdev);
9285
9286         if (adapter->vferr_refcount) {
9287                 dev_info(pci_dev_to_dev(pdev), "Resuming after VF err\n");
9288                 adapter->vferr_refcount--;
9289                 return;
9290         }
9291
9292         if (netif_running(netdev)) {
9293                 if (igb_up(adapter)) {
9294                         dev_err(pci_dev_to_dev(pdev), "igb_up failed after reset\n");
9295                         return;
9296                 }
9297         }
9298
9299         netif_device_attach(netdev);
9300
9301         /* let the f/w know that the h/w is now under the control of the
9302          * driver. */
9303         igb_get_hw_control(adapter);
9304 }
9305
9306 #endif /* HAVE_PCI_ERS */
9307
9308 int igb_add_mac_filter(struct igb_adapter *adapter, u8 *addr, u16 queue)
9309 {
9310         struct e1000_hw *hw = &adapter->hw;
9311         int i;
9312
9313         if (is_zero_ether_addr(addr))
9314                 return 0;
9315
9316         for (i = 0; i < hw->mac.rar_entry_count; i++) {
9317                 if (adapter->mac_table[i].state & IGB_MAC_STATE_IN_USE)
9318                         continue;
9319                 adapter->mac_table[i].state = (IGB_MAC_STATE_MODIFIED |
9320                                                    IGB_MAC_STATE_IN_USE);
9321                 memcpy(adapter->mac_table[i].addr, addr, ETH_ALEN);
9322                 adapter->mac_table[i].queue = queue;
9323                 igb_sync_mac_table(adapter);
9324                 return 0;
9325         }
9326         return -ENOMEM;
9327 }
9328 int igb_del_mac_filter(struct igb_adapter *adapter, u8* addr, u16 queue)
9329 {
9330         /* search table for addr, if found, set to 0 and sync */
9331         int i;
9332         struct e1000_hw *hw = &adapter->hw;
9333
9334         if (is_zero_ether_addr(addr))
9335                 return 0;
9336         for (i = 0; i < hw->mac.rar_entry_count; i++) {
9337                 if (ether_addr_equal(addr, adapter->mac_table[i].addr) &&
9338                     adapter->mac_table[i].queue == queue) {
9339                         adapter->mac_table[i].state = IGB_MAC_STATE_MODIFIED;
9340                         memset(adapter->mac_table[i].addr, 0, ETH_ALEN);
9341                         adapter->mac_table[i].queue = 0;
9342                         igb_sync_mac_table(adapter);
9343                         return 0;
9344                 }
9345         }
9346         return -ENOMEM;
9347 }
9348 static int igb_set_vf_mac(struct igb_adapter *adapter,
9349                           int vf, unsigned char *mac_addr)
9350 {
9351         igb_del_mac_filter(adapter, adapter->vf_data[vf].vf_mac_addresses, vf);
9352         memcpy(adapter->vf_data[vf].vf_mac_addresses, mac_addr, ETH_ALEN);
9353
9354         igb_add_mac_filter(adapter, mac_addr, vf);
9355
9356         return 0;
9357 }
9358
9359 #ifdef IFLA_VF_MAX
9360 static int igb_ndo_set_vf_mac(struct net_device *netdev, int vf, u8 *mac)
9361 {
9362         struct igb_adapter *adapter = netdev_priv(netdev);
9363         if (!is_valid_ether_addr(mac) || (vf >= adapter->vfs_allocated_count))
9364                 return -EINVAL;
9365         adapter->vf_data[vf].flags |= IGB_VF_FLAG_PF_SET_MAC;
9366         dev_info(&adapter->pdev->dev, "setting MAC %pM on VF %d\n", mac, vf);
9367         dev_info(&adapter->pdev->dev, "Reload the VF driver to make this"
9368                                       " change effective.\n");
9369         if (test_bit(__IGB_DOWN, &adapter->state)) {
9370                 dev_warn(&adapter->pdev->dev, "The VF MAC address has been set,"
9371                          " but the PF device is not up.\n");
9372                 dev_warn(&adapter->pdev->dev, "Bring the PF device up before"
9373                          " attempting to use the VF device.\n");
9374         }
9375         return igb_set_vf_mac(adapter, vf, mac);
9376 }
9377
9378 static int igb_link_mbps(int internal_link_speed)
9379 {
9380         switch (internal_link_speed) {
9381         case SPEED_100:
9382                 return 100;
9383         case SPEED_1000:
9384                 return 1000;
9385         case SPEED_2500:
9386                 return 2500;
9387         default:
9388                 return 0;
9389         }
9390 }
9391
9392 static void igb_set_vf_rate_limit(struct e1000_hw *hw, int vf, int tx_rate,
9393                         int link_speed)
9394 {
9395         int rf_dec, rf_int;
9396         u32 bcnrc_val;
9397
9398         if (tx_rate != 0) {
9399                 /* Calculate the rate factor values to set */
9400                 rf_int = link_speed / tx_rate;
9401                 rf_dec = (link_speed - (rf_int * tx_rate));
9402                 rf_dec = (rf_dec * (1<<E1000_RTTBCNRC_RF_INT_SHIFT)) / tx_rate;
9403
9404                 bcnrc_val = E1000_RTTBCNRC_RS_ENA;
9405                 bcnrc_val |= ((rf_int<<E1000_RTTBCNRC_RF_INT_SHIFT) &
9406                                 E1000_RTTBCNRC_RF_INT_MASK);
9407                 bcnrc_val |= (rf_dec & E1000_RTTBCNRC_RF_DEC_MASK);
9408         } else {
9409                 bcnrc_val = 0;
9410         }
9411
9412         E1000_WRITE_REG(hw, E1000_RTTDQSEL, vf); /* vf X uses queue X */
9413         /*
9414          * Set global transmit compensation time to the MMW_SIZE in RTTBCNRM
9415          * register. MMW_SIZE=0x014 if 9728-byte jumbo is supported.
9416          */
9417         E1000_WRITE_REG(hw, E1000_RTTBCNRM(0), 0x14);
9418         E1000_WRITE_REG(hw, E1000_RTTBCNRC, bcnrc_val);
9419 }
9420
9421 static void igb_check_vf_rate_limit(struct igb_adapter *adapter)
9422 {
9423         int actual_link_speed, i;
9424         bool reset_rate = false;
9425
9426         /* VF TX rate limit was not set */
9427         if ((adapter->vf_rate_link_speed == 0) ||
9428                 (adapter->hw.mac.type != e1000_82576))
9429                 return;
9430
9431         actual_link_speed = igb_link_mbps(adapter->link_speed);
9432         if (actual_link_speed != adapter->vf_rate_link_speed) {
9433                 reset_rate = true;
9434                 adapter->vf_rate_link_speed = 0;
9435                 dev_info(&adapter->pdev->dev,
9436                 "Link speed has been changed. VF Transmit rate is disabled\n");
9437         }
9438
9439         for (i = 0; i < adapter->vfs_allocated_count; i++) {
9440                 if (reset_rate)
9441                         adapter->vf_data[i].tx_rate = 0;
9442
9443                 igb_set_vf_rate_limit(&adapter->hw, i,
9444                         adapter->vf_data[i].tx_rate, actual_link_speed);
9445         }
9446 }
9447
9448 #ifdef HAVE_VF_MIN_MAX_TXRATE
9449 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int min_tx_rate,
9450                              int tx_rate)
9451 #else /* HAVE_VF_MIN_MAX_TXRATE */
9452 static int igb_ndo_set_vf_bw(struct net_device *netdev, int vf, int tx_rate)
9453 #endif /* HAVE_VF_MIN_MAX_TXRATE */
9454 {
9455         struct igb_adapter *adapter = netdev_priv(netdev);
9456         struct e1000_hw *hw = &adapter->hw;
9457         int actual_link_speed;
9458
9459         if (hw->mac.type != e1000_82576)
9460                 return -EOPNOTSUPP;
9461
9462 #ifdef HAVE_VF_MIN_MAX_TXRATE
9463         if (min_tx_rate)
9464                 return -EINVAL;
9465 #endif /* HAVE_VF_MIN_MAX_TXRATE */
9466
9467         actual_link_speed = igb_link_mbps(adapter->link_speed);
9468         if ((vf >= adapter->vfs_allocated_count) ||
9469                 (!(E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_LU)) ||
9470                 (tx_rate < 0) || (tx_rate > actual_link_speed))
9471                 return -EINVAL;
9472
9473         adapter->vf_rate_link_speed = actual_link_speed;
9474         adapter->vf_data[vf].tx_rate = (u16)tx_rate;
9475         igb_set_vf_rate_limit(hw, vf, tx_rate, actual_link_speed);
9476
9477         return 0;
9478 }
9479
9480 static int igb_ndo_get_vf_config(struct net_device *netdev,
9481                                  int vf, struct ifla_vf_info *ivi)
9482 {
9483         struct igb_adapter *adapter = netdev_priv(netdev);
9484         if (vf >= adapter->vfs_allocated_count)
9485                 return -EINVAL;
9486         ivi->vf = vf;
9487         memcpy(&ivi->mac, adapter->vf_data[vf].vf_mac_addresses, ETH_ALEN);
9488 #ifdef HAVE_VF_MIN_MAX_TXRATE
9489         ivi->max_tx_rate = adapter->vf_data[vf].tx_rate;
9490         ivi->min_tx_rate = 0;
9491 #else /* HAVE_VF_MIN_MAX_TXRATE */
9492         ivi->tx_rate = adapter->vf_data[vf].tx_rate;
9493 #endif /* HAVE_VF_MIN_MAX_TXRATE */
9494         ivi->vlan = adapter->vf_data[vf].pf_vlan;
9495         ivi->qos = adapter->vf_data[vf].pf_qos;
9496 #ifdef HAVE_VF_SPOOFCHK_CONFIGURE
9497         ivi->spoofchk = adapter->vf_data[vf].spoofchk_enabled;
9498 #endif
9499         return 0;
9500 }
9501 #endif
9502 static void igb_vmm_control(struct igb_adapter *adapter)
9503 {
9504         struct e1000_hw *hw = &adapter->hw;
9505         int count;
9506         u32 reg;
9507
9508         switch (hw->mac.type) {
9509         case e1000_82575:
9510         default:
9511                 /* replication is not supported for 82575 */
9512                 return;
9513         case e1000_82576:
9514                 /* notify HW that the MAC is adding vlan tags */
9515                 reg = E1000_READ_REG(hw, E1000_DTXCTL);
9516                 reg |= (E1000_DTXCTL_VLAN_ADDED |
9517                         E1000_DTXCTL_SPOOF_INT);
9518                 E1000_WRITE_REG(hw, E1000_DTXCTL, reg);
9519         case e1000_82580:
9520                 /* enable replication vlan tag stripping */
9521                 reg = E1000_READ_REG(hw, E1000_RPLOLR);
9522                 reg |= E1000_RPLOLR_STRVLAN;
9523                 E1000_WRITE_REG(hw, E1000_RPLOLR, reg);
9524         case e1000_i350:
9525         case e1000_i354:
9526                 /* none of the above registers are supported by i350 */
9527                 break;
9528         }
9529
9530         /* Enable Malicious Driver Detection */
9531         if ((adapter->vfs_allocated_count) &&
9532             (adapter->mdd)) {
9533                 if (hw->mac.type == e1000_i350)
9534                         igb_enable_mdd(adapter);
9535         }
9536
9537                 /* enable replication and loopback support */
9538                 count = adapter->vfs_allocated_count || adapter->vmdq_pools;
9539                 if (adapter->flags & IGB_FLAG_LOOPBACK_ENABLE && count)
9540                         e1000_vmdq_set_loopback_pf(hw, 1);
9541                 e1000_vmdq_set_anti_spoofing_pf(hw,
9542                         adapter->vfs_allocated_count || adapter->vmdq_pools,
9543                         adapter->vfs_allocated_count);
9544         e1000_vmdq_set_replication_pf(hw, adapter->vfs_allocated_count ||
9545                                       adapter->vmdq_pools);
9546 }
9547
9548 static void igb_init_fw(struct igb_adapter *adapter)
9549 {
9550         struct e1000_fw_drv_info fw_cmd;
9551         struct e1000_hw *hw = &adapter->hw;
9552         int i;
9553         u16 mask;
9554
9555         if (hw->mac.type == e1000_i210)
9556                 mask = E1000_SWFW_EEP_SM;
9557         else
9558                 mask = E1000_SWFW_PHY0_SM;
9559         /* i211 parts do not support this feature */
9560         if (hw->mac.type == e1000_i211)
9561                 hw->mac.arc_subsystem_valid = false;
9562
9563         if (!hw->mac.ops.acquire_swfw_sync(hw, mask)) {
9564                 for (i = 0; i <= FW_MAX_RETRIES; i++) {
9565                         E1000_WRITE_REG(hw, E1000_FWSTS, E1000_FWSTS_FWRI);
9566                         fw_cmd.hdr.cmd = FW_CMD_DRV_INFO;
9567                         fw_cmd.hdr.buf_len = FW_CMD_DRV_INFO_LEN;
9568                         fw_cmd.hdr.cmd_or_resp.cmd_resv = FW_CMD_RESERVED;
9569                         fw_cmd.port_num = hw->bus.func;
9570                         fw_cmd.drv_version = FW_FAMILY_DRV_VER;
9571                         fw_cmd.hdr.checksum = 0;
9572                         fw_cmd.hdr.checksum = e1000_calculate_checksum((u8 *)&fw_cmd,
9573                                                                    (FW_HDR_LEN +
9574                                                                     fw_cmd.hdr.buf_len));
9575                          e1000_host_interface_command(hw, (u8*)&fw_cmd,
9576                                                      sizeof(fw_cmd));
9577                         if (fw_cmd.hdr.cmd_or_resp.ret_status == FW_STATUS_SUCCESS)
9578                                 break;
9579                 }
9580         } else
9581                 dev_warn(pci_dev_to_dev(adapter->pdev),
9582                          "Unable to get semaphore, firmware init failed.\n");
9583         hw->mac.ops.release_swfw_sync(hw, mask);
9584 }
9585
9586 static void igb_init_dmac(struct igb_adapter *adapter, u32 pba)
9587 {
9588         struct e1000_hw *hw = &adapter->hw;
9589         u32 dmac_thr;
9590         u16 hwm;
9591         u32 status;
9592
9593         if (hw->mac.type == e1000_i211)
9594                 return;
9595
9596         if (hw->mac.type > e1000_82580) {
9597                 if (adapter->dmac != IGB_DMAC_DISABLE) {
9598                         u32 reg;
9599
9600                         /* force threshold to 0.  */
9601                         E1000_WRITE_REG(hw, E1000_DMCTXTH, 0);
9602
9603                         /*
9604                          * DMA Coalescing high water mark needs to be greater
9605                          * than the Rx threshold. Set hwm to PBA - max frame
9606                          * size in 16B units, capping it at PBA - 6KB.
9607                          */
9608                         hwm = 64 * pba - adapter->max_frame_size / 16;
9609                         if (hwm < 64 * (pba - 6))
9610                                 hwm = 64 * (pba - 6);
9611                         reg = E1000_READ_REG(hw, E1000_FCRTC);
9612                         reg &= ~E1000_FCRTC_RTH_COAL_MASK;
9613                         reg |= ((hwm << E1000_FCRTC_RTH_COAL_SHIFT)
9614                                 & E1000_FCRTC_RTH_COAL_MASK);
9615                         E1000_WRITE_REG(hw, E1000_FCRTC, reg);
9616
9617                         /*
9618                          * Set the DMA Coalescing Rx threshold to PBA - 2 * max
9619                          * frame size, capping it at PBA - 10KB.
9620                          */
9621                         dmac_thr = pba - adapter->max_frame_size / 512;
9622                         if (dmac_thr < pba - 10)
9623                                 dmac_thr = pba - 10;
9624                         reg = E1000_READ_REG(hw, E1000_DMACR);
9625                         reg &= ~E1000_DMACR_DMACTHR_MASK;
9626                         reg |= ((dmac_thr << E1000_DMACR_DMACTHR_SHIFT)
9627                                 & E1000_DMACR_DMACTHR_MASK);
9628
9629                         /* transition to L0x or L1 if available..*/
9630                         reg |= (E1000_DMACR_DMAC_EN | E1000_DMACR_DMAC_LX_MASK);
9631
9632                         /* Check if status is 2.5Gb backplane connection
9633                          * before configuration of watchdog timer, which is
9634                          * in msec values in 12.8usec intervals
9635                          * watchdog timer= msec values in 32usec intervals
9636                          * for non 2.5Gb connection
9637                          */
9638                         if (hw->mac.type == e1000_i354) {
9639                                 status = E1000_READ_REG(hw, E1000_STATUS);
9640                                 if ((status & E1000_STATUS_2P5_SKU) &&
9641                                     (!(status & E1000_STATUS_2P5_SKU_OVER)))
9642                                         reg |= ((adapter->dmac * 5) >> 6);
9643                                 else
9644                                         reg |= ((adapter->dmac) >> 5);
9645                         } else {
9646                                 reg |= ((adapter->dmac) >> 5);
9647                         }
9648
9649                         /*
9650                          * Disable BMC-to-OS Watchdog enable
9651                          * on devices that support OS-to-BMC
9652                          */
9653                         if (hw->mac.type != e1000_i354)
9654                                 reg &= ~E1000_DMACR_DC_BMC2OSW_EN;
9655                         E1000_WRITE_REG(hw, E1000_DMACR, reg);
9656
9657                         /* no lower threshold to disable coalescing(smart fifb)-UTRESH=0*/
9658                         E1000_WRITE_REG(hw, E1000_DMCRTRH, 0);
9659
9660                         /* This sets the time to wait before requesting
9661                          * transition to low power state to number of usecs
9662                          * needed to receive 1 512 byte frame at gigabit
9663                          * line rate. On i350 device, time to make transition
9664                          * to Lx state is delayed by 4 usec with flush disable
9665                          * bit set to avoid losing mailbox interrupts
9666                          */
9667                         reg = E1000_READ_REG(hw, E1000_DMCTLX);
9668                         if (hw->mac.type == e1000_i350)
9669                                 reg |= IGB_DMCTLX_DCFLUSH_DIS;
9670
9671                         /* in 2.5Gb connection, TTLX unit is 0.4 usec
9672                          * which is 0x4*2 = 0xA. But delay is still 4 usec
9673                          */
9674                         if (hw->mac.type == e1000_i354) {
9675                                 status = E1000_READ_REG(hw, E1000_STATUS);
9676                                 if ((status & E1000_STATUS_2P5_SKU) &&
9677                                     (!(status & E1000_STATUS_2P5_SKU_OVER)))
9678                                         reg |= 0xA;
9679                                 else
9680                                         reg |= 0x4;
9681                         } else {
9682                                 reg |= 0x4;
9683                         }
9684                         E1000_WRITE_REG(hw, E1000_DMCTLX, reg);
9685
9686                         /* free space in tx packet buffer to wake from DMA coal */
9687                         E1000_WRITE_REG(hw, E1000_DMCTXTH, (IGB_MIN_TXPBSIZE -
9688                                 (IGB_TX_BUF_4096 + adapter->max_frame_size)) >> 6);
9689
9690                         /* make low power state decision controlled by DMA coal */
9691                         reg = E1000_READ_REG(hw, E1000_PCIEMISC);
9692                         reg &= ~E1000_PCIEMISC_LX_DECISION;
9693                         E1000_WRITE_REG(hw, E1000_PCIEMISC, reg);
9694                 } /* endif adapter->dmac is not disabled */
9695         } else if (hw->mac.type == e1000_82580) {
9696                 u32 reg = E1000_READ_REG(hw, E1000_PCIEMISC);
9697                 E1000_WRITE_REG(hw, E1000_PCIEMISC,
9698                                 reg & ~E1000_PCIEMISC_LX_DECISION);
9699                 E1000_WRITE_REG(hw, E1000_DMACR, 0);
9700         }
9701 }
9702
9703 #ifdef HAVE_I2C_SUPPORT
9704 /*  igb_read_i2c_byte - Reads 8 bit word over I2C
9705  *  @hw: pointer to hardware structure
9706  *  @byte_offset: byte offset to read
9707  *  @dev_addr: device address
9708  *  @data: value read
9709  *
9710  *  Performs byte read operation over I2C interface at
9711  *  a specified device address.
9712  */
9713 s32 igb_read_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
9714                                 u8 dev_addr, u8 *data)
9715 {
9716         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
9717         struct i2c_client *this_client = adapter->i2c_client;
9718         s32 status;
9719         u16 swfw_mask = 0;
9720
9721         if (!this_client)
9722                 return E1000_ERR_I2C;
9723
9724         swfw_mask = E1000_SWFW_PHY0_SM;
9725
9726         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask)
9727             != E1000_SUCCESS)
9728                 return E1000_ERR_SWFW_SYNC;
9729
9730         status = i2c_smbus_read_byte_data(this_client, byte_offset);
9731         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
9732
9733         if (status < 0)
9734                 return E1000_ERR_I2C;
9735         else {
9736                 *data = status;
9737                 return E1000_SUCCESS;
9738         }
9739 }
9740
9741 /*  igb_write_i2c_byte - Writes 8 bit word over I2C
9742  *  @hw: pointer to hardware structure
9743  *  @byte_offset: byte offset to write
9744  *  @dev_addr: device address
9745  *  @data: value to write
9746  *
9747  *  Performs byte write operation over I2C interface at
9748  *  a specified device address.
9749  */
9750 s32 igb_write_i2c_byte(struct e1000_hw *hw, u8 byte_offset,
9751                                  u8 dev_addr, u8 data)
9752 {
9753         struct igb_adapter *adapter = container_of(hw, struct igb_adapter, hw);
9754         struct i2c_client *this_client = adapter->i2c_client;
9755         s32 status;
9756         u16 swfw_mask = E1000_SWFW_PHY0_SM;
9757
9758         if (!this_client)
9759                 return E1000_ERR_I2C;
9760
9761         if (hw->mac.ops.acquire_swfw_sync(hw, swfw_mask) != E1000_SUCCESS)
9762                 return E1000_ERR_SWFW_SYNC;
9763         status = i2c_smbus_write_byte_data(this_client, byte_offset, data);
9764         hw->mac.ops.release_swfw_sync(hw, swfw_mask);
9765
9766         if (status)
9767                 return E1000_ERR_I2C;
9768         else
9769                 return E1000_SUCCESS;
9770 }
9771 #endif /*  HAVE_I2C_SUPPORT */
9772 /* igb_main.c */
9773
9774
9775 /**
9776  * igb_probe - Device Initialization Routine
9777  * @pdev: PCI device information struct
9778  * @ent: entry in igb_pci_tbl
9779  *
9780  * Returns 0 on success, negative on failure
9781  *
9782  * igb_probe initializes an adapter identified by a pci_dev structure.
9783  * The OS initialization, configuring of the adapter private structure,
9784  * and a hardware reset occur.
9785  **/
9786 int igb_kni_probe(struct pci_dev *pdev,
9787                                struct net_device **lad_dev)
9788 {
9789         struct net_device *netdev;
9790         struct igb_adapter *adapter;
9791         struct e1000_hw *hw;
9792         u16 eeprom_data = 0;
9793         u8 pba_str[E1000_PBANUM_LENGTH];
9794         s32 ret_val;
9795         static int global_quad_port_a; /* global quad port a indication */
9796         int i, err, pci_using_dac = 0;
9797         static int cards_found;
9798
9799         err = pci_enable_device_mem(pdev);
9800         if (err)
9801                 return err;
9802
9803 #ifdef NO_KNI
9804         pci_using_dac = 0;
9805         err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
9806         if (!err) {
9807                 err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(64));
9808                 if (!err)
9809                         pci_using_dac = 1;
9810         } else {
9811                 err = dma_set_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
9812                 if (err) {
9813                         err = dma_set_coherent_mask(pci_dev_to_dev(pdev), DMA_BIT_MASK(32));
9814                         if (err) {
9815                                 IGB_ERR("No usable DMA configuration, "
9816                                         "aborting\n");
9817                                 goto err_dma;
9818                         }
9819                 }
9820         }
9821
9822 #ifndef HAVE_ASPM_QUIRKS
9823         /* 82575 requires that the pci-e link partner disable the L0s state */
9824         switch (pdev->device) {
9825         case E1000_DEV_ID_82575EB_COPPER:
9826         case E1000_DEV_ID_82575EB_FIBER_SERDES:
9827         case E1000_DEV_ID_82575GB_QUAD_COPPER:
9828                 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S);
9829         default:
9830                 break;
9831         }
9832
9833 #endif /* HAVE_ASPM_QUIRKS */
9834         err = pci_request_selected_regions(pdev,
9835                                            pci_select_bars(pdev,
9836                                                            IORESOURCE_MEM),
9837                                            igb_driver_name);
9838         if (err)
9839                 goto err_pci_reg;
9840
9841         pci_enable_pcie_error_reporting(pdev);
9842
9843         pci_set_master(pdev);
9844
9845         err = -ENOMEM;
9846 #endif /* NO_KNI */
9847 #ifdef HAVE_TX_MQ
9848         netdev = alloc_etherdev_mq(sizeof(struct igb_adapter),
9849                                    IGB_MAX_TX_QUEUES);
9850 #else
9851         netdev = alloc_etherdev(sizeof(struct igb_adapter));
9852 #endif /* HAVE_TX_MQ */
9853         if (!netdev)
9854                 goto err_alloc_etherdev;
9855
9856         SET_MODULE_OWNER(netdev);
9857         SET_NETDEV_DEV(netdev, &pdev->dev);
9858
9859         //pci_set_drvdata(pdev, netdev);
9860         adapter = netdev_priv(netdev);
9861         adapter->netdev = netdev;
9862         adapter->pdev = pdev;
9863         hw = &adapter->hw;
9864         hw->back = adapter;
9865         adapter->port_num = hw->bus.func;
9866         adapter->msg_enable = (1 << debug) - 1;
9867
9868 #ifdef HAVE_PCI_ERS
9869         err = pci_save_state(pdev);
9870         if (err)
9871                 goto err_ioremap;
9872 #endif
9873         err = -EIO;
9874         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
9875                               pci_resource_len(pdev, 0));
9876         if (!hw->hw_addr)
9877                 goto err_ioremap;
9878
9879 #ifdef HAVE_NET_DEVICE_OPS
9880         netdev->netdev_ops = &igb_netdev_ops;
9881 #else /* HAVE_NET_DEVICE_OPS */
9882         netdev->open = &igb_open;
9883         netdev->stop = &igb_close;
9884         netdev->get_stats = &igb_get_stats;
9885 #ifdef HAVE_SET_RX_MODE
9886         netdev->set_rx_mode = &igb_set_rx_mode;
9887 #endif
9888         netdev->set_multicast_list = &igb_set_rx_mode;
9889         netdev->set_mac_address = &igb_set_mac;
9890         netdev->change_mtu = &igb_change_mtu;
9891         netdev->do_ioctl = &igb_ioctl;
9892 #ifdef HAVE_TX_TIMEOUT
9893         netdev->tx_timeout = &igb_tx_timeout;
9894 #endif
9895         netdev->vlan_rx_register = igb_vlan_mode;
9896         netdev->vlan_rx_add_vid = igb_vlan_rx_add_vid;
9897         netdev->vlan_rx_kill_vid = igb_vlan_rx_kill_vid;
9898 #ifdef CONFIG_NET_POLL_CONTROLLER
9899         netdev->poll_controller = igb_netpoll;
9900 #endif
9901         netdev->hard_start_xmit = &igb_xmit_frame;
9902 #endif /* HAVE_NET_DEVICE_OPS */
9903         igb_set_ethtool_ops(netdev);
9904 #ifdef HAVE_TX_TIMEOUT
9905         netdev->watchdog_timeo = 5 * HZ;
9906 #endif
9907
9908         strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);
9909
9910         adapter->bd_number = cards_found;
9911
9912         /* setup the private structure */
9913         err = igb_sw_init(adapter);
9914         if (err)
9915                 goto err_sw_init;
9916
9917         e1000_get_bus_info(hw);
9918
9919         hw->phy.autoneg_wait_to_complete = FALSE;
9920         hw->mac.adaptive_ifs = FALSE;
9921
9922         /* Copper options */
9923         if (hw->phy.media_type == e1000_media_type_copper) {
9924                 hw->phy.mdix = AUTO_ALL_MODES;
9925                 hw->phy.disable_polarity_correction = FALSE;
9926                 hw->phy.ms_type = e1000_ms_hw_default;
9927         }
9928
9929         if (e1000_check_reset_block(hw))
9930                 dev_info(pci_dev_to_dev(pdev),
9931                         "PHY reset is blocked due to SOL/IDER session.\n");
9932
9933         /*
9934          * features is initialized to 0 in allocation, it might have bits
9935          * set by igb_sw_init so we should use an or instead of an
9936          * assignment.
9937          */
9938         netdev->features |= NETIF_F_SG |
9939                             NETIF_F_IP_CSUM |
9940 #ifdef NETIF_F_IPV6_CSUM
9941                             NETIF_F_IPV6_CSUM |
9942 #endif
9943 #ifdef NETIF_F_TSO
9944                             NETIF_F_TSO |
9945 #ifdef NETIF_F_TSO6
9946                             NETIF_F_TSO6 |
9947 #endif
9948 #endif /* NETIF_F_TSO */
9949 #ifdef NETIF_F_RXHASH
9950                             NETIF_F_RXHASH |
9951 #endif
9952                             NETIF_F_RXCSUM |
9953 #ifdef NETIF_F_HW_VLAN_CTAG_RX
9954                             NETIF_F_HW_VLAN_CTAG_RX |
9955                             NETIF_F_HW_VLAN_CTAG_TX;
9956 #else
9957                             NETIF_F_HW_VLAN_RX |
9958                             NETIF_F_HW_VLAN_TX;
9959 #endif
9960
9961         if (hw->mac.type >= e1000_82576)
9962                 netdev->features |= NETIF_F_SCTP_CSUM;
9963
9964 #ifdef HAVE_NDO_SET_FEATURES
9965         /* copy netdev features into list of user selectable features */
9966         netdev->hw_features |= netdev->features;
9967 #ifndef IGB_NO_LRO
9968
9969         /* give us the option of enabling LRO later */
9970         netdev->hw_features |= NETIF_F_LRO;
9971 #endif
9972 #else
9973 #ifdef NETIF_F_GRO
9974
9975         /* this is only needed on kernels prior to 2.6.39 */
9976         netdev->features |= NETIF_F_GRO;
9977 #endif
9978 #endif
9979
9980         /* set this bit last since it cannot be part of hw_features */
9981 #ifdef NETIF_F_HW_VLAN_CTAG_FILTER
9982         netdev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
9983 #else
9984         netdev->features |= NETIF_F_HW_VLAN_FILTER;
9985 #endif
9986
9987 #ifdef HAVE_NETDEV_VLAN_FEATURES
9988         netdev->vlan_features |= NETIF_F_TSO |
9989                                  NETIF_F_TSO6 |
9990                                  NETIF_F_IP_CSUM |
9991                                  NETIF_F_IPV6_CSUM |
9992                                  NETIF_F_SG;
9993
9994 #endif
9995         if (pci_using_dac)
9996                 netdev->features |= NETIF_F_HIGHDMA;
9997
9998 #ifdef NO_KNI
9999         adapter->en_mng_pt = e1000_enable_mng_pass_thru(hw);
10000 #ifdef DEBUG
10001         if (adapter->dmac != IGB_DMAC_DISABLE)
10002                 printk("%s: DMA Coalescing is enabled..\n", netdev->name);
10003 #endif
10004
10005         /* before reading the NVM, reset the controller to put the device in a
10006          * known good starting state */
10007         e1000_reset_hw(hw);
10008 #endif /* NO_KNI */
10009
10010         /* make sure the NVM is good */
10011         if (e1000_validate_nvm_checksum(hw) < 0) {
10012                 dev_err(pci_dev_to_dev(pdev), "The NVM Checksum Is Not"
10013                         " Valid\n");
10014                 err = -EIO;
10015                 goto err_eeprom;
10016         }
10017
10018         /* copy the MAC address out of the NVM */
10019         if (e1000_read_mac_addr(hw))
10020                 dev_err(pci_dev_to_dev(pdev), "NVM Read Error\n");
10021         memcpy(netdev->dev_addr, hw->mac.addr, netdev->addr_len);
10022 #ifdef ETHTOOL_GPERMADDR
10023         memcpy(netdev->perm_addr, hw->mac.addr, netdev->addr_len);
10024
10025         if (!is_valid_ether_addr(netdev->perm_addr)) {
10026 #else
10027         if (!is_valid_ether_addr(netdev->dev_addr)) {
10028 #endif
10029                 dev_err(pci_dev_to_dev(pdev), "Invalid MAC Address\n");
10030                 err = -EIO;
10031                 goto err_eeprom;
10032         }
10033
10034         memcpy(&adapter->mac_table[0].addr, hw->mac.addr, netdev->addr_len);
10035         adapter->mac_table[0].queue = adapter->vfs_allocated_count;
10036         adapter->mac_table[0].state = (IGB_MAC_STATE_DEFAULT | IGB_MAC_STATE_IN_USE);
10037         igb_rar_set(adapter, 0);
10038
10039         /* get firmware version for ethtool -i */
10040         igb_set_fw_version(adapter);
10041
10042         /* Check if Media Autosense is enabled */
10043         if (hw->mac.type == e1000_82580)
10044                 igb_init_mas(adapter);
10045
10046 #ifdef NO_KNI
10047         setup_timer(&adapter->watchdog_timer, &igb_watchdog,
10048                     (unsigned long) adapter);
10049         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
10050                 setup_timer(&adapter->dma_err_timer, &igb_dma_err_timer,
10051                             (unsigned long) adapter);
10052         setup_timer(&adapter->phy_info_timer, &igb_update_phy_info,
10053                     (unsigned long) adapter);
10054
10055         INIT_WORK(&adapter->reset_task, igb_reset_task);
10056         INIT_WORK(&adapter->watchdog_task, igb_watchdog_task);
10057         if (adapter->flags & IGB_FLAG_DETECT_BAD_DMA)
10058                 INIT_WORK(&adapter->dma_err_task, igb_dma_err_task);
10059 #endif
10060
10061         /* Initialize link properties that are user-changeable */
10062         adapter->fc_autoneg = true;
10063         hw->mac.autoneg = true;
10064         hw->phy.autoneg_advertised = 0x2f;
10065
10066         hw->fc.requested_mode = e1000_fc_default;
10067         hw->fc.current_mode = e1000_fc_default;
10068
10069         e1000_validate_mdi_setting(hw);
10070
10071         /* By default, support wake on port A */
10072         if (hw->bus.func == 0)
10073                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
10074
10075         /* Check the NVM for wake support for non-port A ports */
10076         if (hw->mac.type >= e1000_82580)
10077                 hw->nvm.ops.read(hw, NVM_INIT_CONTROL3_PORT_A +
10078                                  NVM_82580_LAN_FUNC_OFFSET(hw->bus.func), 1,
10079                                  &eeprom_data);
10080         else if (hw->bus.func == 1)
10081                 e1000_read_nvm(hw, NVM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
10082
10083         if (eeprom_data & IGB_EEPROM_APME)
10084                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
10085
10086         /* now that we have the eeprom settings, apply the special cases where
10087          * the eeprom may be wrong or the board simply won't support wake on
10088          * lan on a particular port */
10089         switch (pdev->device) {
10090         case E1000_DEV_ID_82575GB_QUAD_COPPER:
10091                 adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10092                 break;
10093         case E1000_DEV_ID_82575EB_FIBER_SERDES:
10094         case E1000_DEV_ID_82576_FIBER:
10095         case E1000_DEV_ID_82576_SERDES:
10096                 /* Wake events only supported on port A for dual fiber
10097                  * regardless of eeprom setting */
10098                 if (E1000_READ_REG(hw, E1000_STATUS) & E1000_STATUS_FUNC_1)
10099                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10100                 break;
10101         case E1000_DEV_ID_82576_QUAD_COPPER:
10102         case E1000_DEV_ID_82576_QUAD_COPPER_ET2:
10103                 /* if quad port adapter, disable WoL on all but port A */
10104                 if (global_quad_port_a != 0)
10105                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10106                 else
10107                         adapter->flags |= IGB_FLAG_QUAD_PORT_A;
10108                 /* Reset for multiple quad port adapters */
10109                 if (++global_quad_port_a == 4)
10110                         global_quad_port_a = 0;
10111                 break;
10112         default:
10113                 /* If the device can't wake, don't set software support */
10114                 if (!device_can_wakeup(&adapter->pdev->dev))
10115                         adapter->flags &= ~IGB_FLAG_WOL_SUPPORTED;
10116                 break;
10117         }
10118
10119         /* initialize the wol settings based on the eeprom settings */
10120         if (adapter->flags & IGB_FLAG_WOL_SUPPORTED)
10121                 adapter->wol |= E1000_WUFC_MAG;
10122
10123         /* Some vendors want WoL disabled by default, but still supported */
10124         if ((hw->mac.type == e1000_i350) &&
10125             (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)) {
10126                 adapter->flags |= IGB_FLAG_WOL_SUPPORTED;
10127                 adapter->wol = 0;
10128         }
10129
10130 #ifdef NO_KNI
10131         device_set_wakeup_enable(pci_dev_to_dev(adapter->pdev),
10132                                  adapter->flags & IGB_FLAG_WOL_SUPPORTED);
10133
10134         /* reset the hardware with the new settings */
10135         igb_reset(adapter);
10136         adapter->devrc = 0;
10137
10138 #ifdef HAVE_I2C_SUPPORT
10139         /* Init the I2C interface */
10140         err = igb_init_i2c(adapter);
10141         if (err) {
10142                 dev_err(&pdev->dev, "failed to init i2c interface\n");
10143                 goto err_eeprom;
10144         }
10145 #endif /* HAVE_I2C_SUPPORT */
10146
10147         /* let the f/w know that the h/w is now under the control of the
10148          * driver. */
10149         igb_get_hw_control(adapter);
10150
10151         strncpy(netdev->name, "eth%d", IFNAMSIZ);
10152         err = register_netdev(netdev);
10153         if (err)
10154                 goto err_register;
10155
10156 #ifdef CONFIG_IGB_VMDQ_NETDEV
10157         err = igb_init_vmdq_netdevs(adapter);
10158         if (err)
10159                 goto err_register;
10160 #endif
10161         /* carrier off reporting is important to ethtool even BEFORE open */
10162         netif_carrier_off(netdev);
10163
10164 #ifdef IGB_DCA
10165         if (dca_add_requester(&pdev->dev) == E1000_SUCCESS) {
10166                 adapter->flags |= IGB_FLAG_DCA_ENABLED;
10167                 dev_info(pci_dev_to_dev(pdev), "DCA enabled\n");
10168                 igb_setup_dca(adapter);
10169         }
10170
10171 #endif
10172 #ifdef HAVE_PTP_1588_CLOCK
10173         /* do hw tstamp init after resetting */
10174         igb_ptp_init(adapter);
10175 #endif /* HAVE_PTP_1588_CLOCK */
10176
10177 #endif /* NO_KNI */
10178         dev_info(pci_dev_to_dev(pdev), "Intel(R) Gigabit Ethernet Network Connection\n");
10179         /* print bus type/speed/width info */
10180         dev_info(pci_dev_to_dev(pdev), "%s: (PCIe:%s:%s) ",
10181                  netdev->name,
10182                  ((hw->bus.speed == e1000_bus_speed_2500) ? "2.5GT/s" :
10183                   (hw->bus.speed == e1000_bus_speed_5000) ? "5.0GT/s" :
10184                   (hw->mac.type == e1000_i354) ? "integrated" :
10185                                                             "unknown"),
10186                  ((hw->bus.width == e1000_bus_width_pcie_x4) ? "Width x4" :
10187                   (hw->bus.width == e1000_bus_width_pcie_x2) ? "Width x2" :
10188                   (hw->bus.width == e1000_bus_width_pcie_x1) ? "Width x1" :
10189                   (hw->mac.type == e1000_i354) ? "integrated" :
10190                    "unknown"));
10191         dev_info(pci_dev_to_dev(pdev), "%s: MAC: ", netdev->name);
10192         for (i = 0; i < 6; i++)
10193                 printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
10194
10195         ret_val = e1000_read_pba_string(hw, pba_str, E1000_PBANUM_LENGTH);
10196         if (ret_val)
10197                 strncpy(pba_str, "Unknown", sizeof(pba_str) - 1);
10198         dev_info(pci_dev_to_dev(pdev), "%s: PBA No: %s\n", netdev->name,
10199                  pba_str);
10200
10201
10202         /* Initialize the thermal sensor on i350 devices. */
10203         if (hw->mac.type == e1000_i350) {
10204                 if (hw->bus.func == 0) {
10205                         u16 ets_word;
10206
10207                         /*
10208                          * Read the NVM to determine if this i350 device
10209                          * supports an external thermal sensor.
10210                          */
10211                         e1000_read_nvm(hw, NVM_ETS_CFG, 1, &ets_word);
10212                         if (ets_word != 0x0000 && ets_word != 0xFFFF)
10213                                 adapter->ets = true;
10214                         else
10215                                 adapter->ets = false;
10216                 }
10217 #ifdef NO_KNI
10218 #ifdef IGB_HWMON
10219
10220                 igb_sysfs_init(adapter);
10221 #else
10222 #ifdef IGB_PROCFS
10223
10224                 igb_procfs_init(adapter);
10225 #endif /* IGB_PROCFS */
10226 #endif /* IGB_HWMON */
10227 #endif /* NO_KNI */
10228         } else {
10229                 adapter->ets = false;
10230         }
10231
10232         if (hw->phy.media_type == e1000_media_type_copper) {
10233                 switch (hw->mac.type) {
10234                 case e1000_i350:
10235                 case e1000_i210:
10236                 case e1000_i211:
10237                         /* Enable EEE for internal copper PHY devices */
10238                         err = e1000_set_eee_i350(hw);
10239                         if ((!err) &&
10240                             (adapter->flags & IGB_FLAG_EEE))
10241                                 adapter->eee_advert =
10242                                         MDIO_EEE_100TX | MDIO_EEE_1000T;
10243                         break;
10244                 case e1000_i354:
10245                         if ((E1000_READ_REG(hw, E1000_CTRL_EXT)) &
10246                             (E1000_CTRL_EXT_LINK_MODE_SGMII)) {
10247                                 err = e1000_set_eee_i354(hw);
10248                                 if ((!err) &&
10249                                     (adapter->flags & IGB_FLAG_EEE))
10250                                         adapter->eee_advert =
10251                                            MDIO_EEE_100TX | MDIO_EEE_1000T;
10252                         }
10253                         break;
10254                 default:
10255                         break;
10256                 }
10257         }
10258
10259         /* send driver version info to firmware */
10260         if (hw->mac.type >= e1000_i350)
10261                 igb_init_fw(adapter);
10262
10263 #ifndef IGB_NO_LRO
10264         if (netdev->features & NETIF_F_LRO)
10265                 dev_info(pci_dev_to_dev(pdev), "Internal LRO is enabled \n");
10266         else
10267                 dev_info(pci_dev_to_dev(pdev), "LRO is disabled \n");
10268 #endif
10269         dev_info(pci_dev_to_dev(pdev),
10270                  "Using %s interrupts. %d rx queue(s), %d tx queue(s)\n",
10271                  adapter->msix_entries ? "MSI-X" :
10272                  (adapter->flags & IGB_FLAG_HAS_MSI) ? "MSI" : "legacy",
10273                  adapter->num_rx_queues, adapter->num_tx_queues);
10274
10275         cards_found++;
10276         *lad_dev = netdev;
10277
10278         pm_runtime_put_noidle(&pdev->dev);
10279         return 0;
10280
10281 //err_register:
10282 //      igb_release_hw_control(adapter);
10283 #ifdef HAVE_I2C_SUPPORT
10284         memset(&adapter->i2c_adap, 0, sizeof(adapter->i2c_adap));
10285 #endif /* HAVE_I2C_SUPPORT */
10286 err_eeprom:
10287 //      if (!e1000_check_reset_block(hw))
10288 //              e1000_phy_hw_reset(hw);
10289
10290         if (hw->flash_address)
10291                 iounmap(hw->flash_address);
10292 err_sw_init:
10293 //      igb_clear_interrupt_scheme(adapter);
10294 //      igb_reset_sriov_capability(adapter);
10295         iounmap(hw->hw_addr);
10296 err_ioremap:
10297         free_netdev(netdev);
10298 err_alloc_etherdev:
10299 //      pci_release_selected_regions(pdev,
10300 //                                   pci_select_bars(pdev, IORESOURCE_MEM));
10301 //err_pci_reg:
10302 //err_dma:
10303         pci_disable_device(pdev);
10304         return err;
10305 }
10306
10307
10308 void igb_kni_remove(struct pci_dev *pdev)
10309 {
10310         pci_disable_device(pdev);
10311 }