New upstream version 18.02
[deb_dpdk.git] / lib / librte_eal / linuxapp / kni / ethtool / ixgbe / ixgbe_ethtool.c
1 // SPDX-License-Identifier: GPL-2.0
2 /*******************************************************************************
3
4   Intel 10 Gigabit PCI Express Linux driver
5   Copyright(c) 1999 - 2012 Intel Corporation.
6
7   Contact Information:
8   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
9   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
10
11 *******************************************************************************/
12
13 /* ethtool support for ixgbe */
14
15 #include <linux/types.h>
16 #include <linux/module.h>
17 #include <linux/pci.h>
18 #include <linux/netdevice.h>
19 #include <linux/ethtool.h>
20 #include <linux/vmalloc.h>
21 #include <linux/highmem.h>
22 #ifdef SIOCETHTOOL
23 #include <asm/uaccess.h>
24
25 #include "ixgbe.h"
26
27 #ifndef ETH_GSTRING_LEN
28 #define ETH_GSTRING_LEN 32
29 #endif
30
31 #define IXGBE_ALL_RAR_ENTRIES 16
32
33 #ifdef ETHTOOL_OPS_COMPAT
34 #include "kcompat_ethtool.c"
35 #endif
36 #ifdef ETHTOOL_GSTATS
37 struct ixgbe_stats {
38         char stat_string[ETH_GSTRING_LEN];
39         int sizeof_stat;
40         int stat_offset;
41 };
42
43 #define IXGBE_NETDEV_STAT(_net_stat) { \
44         .stat_string = #_net_stat, \
45         .sizeof_stat = FIELD_SIZEOF(struct net_device_stats, _net_stat), \
46         .stat_offset = offsetof(struct net_device_stats, _net_stat) \
47 }
48 static const struct ixgbe_stats ixgbe_gstrings_net_stats[] = {
49         IXGBE_NETDEV_STAT(rx_packets),
50         IXGBE_NETDEV_STAT(tx_packets),
51         IXGBE_NETDEV_STAT(rx_bytes),
52         IXGBE_NETDEV_STAT(tx_bytes),
53         IXGBE_NETDEV_STAT(rx_errors),
54         IXGBE_NETDEV_STAT(tx_errors),
55         IXGBE_NETDEV_STAT(rx_dropped),
56         IXGBE_NETDEV_STAT(tx_dropped),
57         IXGBE_NETDEV_STAT(multicast),
58         IXGBE_NETDEV_STAT(collisions),
59         IXGBE_NETDEV_STAT(rx_over_errors),
60         IXGBE_NETDEV_STAT(rx_crc_errors),
61         IXGBE_NETDEV_STAT(rx_frame_errors),
62         IXGBE_NETDEV_STAT(rx_fifo_errors),
63         IXGBE_NETDEV_STAT(rx_missed_errors),
64         IXGBE_NETDEV_STAT(tx_aborted_errors),
65         IXGBE_NETDEV_STAT(tx_carrier_errors),
66         IXGBE_NETDEV_STAT(tx_fifo_errors),
67         IXGBE_NETDEV_STAT(tx_heartbeat_errors),
68 };
69
70 #define IXGBE_STAT(_name, _stat) { \
71         .stat_string = _name, \
72         .sizeof_stat = FIELD_SIZEOF(struct ixgbe_adapter, _stat), \
73         .stat_offset = offsetof(struct ixgbe_adapter, _stat) \
74 }
75 static struct ixgbe_stats ixgbe_gstrings_stats[] = {
76         IXGBE_STAT("rx_pkts_nic", stats.gprc),
77         IXGBE_STAT("tx_pkts_nic", stats.gptc),
78         IXGBE_STAT("rx_bytes_nic", stats.gorc),
79         IXGBE_STAT("tx_bytes_nic", stats.gotc),
80         IXGBE_STAT("lsc_int", lsc_int),
81         IXGBE_STAT("tx_busy", tx_busy),
82         IXGBE_STAT("non_eop_descs", non_eop_descs),
83 #ifndef CONFIG_IXGBE_NAPI
84         IXGBE_STAT("rx_dropped_backlog", rx_dropped_backlog),
85 #endif
86         IXGBE_STAT("broadcast", stats.bprc),
87         IXGBE_STAT("rx_no_buffer_count", stats.rnbc[0]) ,
88         IXGBE_STAT("tx_timeout_count", tx_timeout_count),
89         IXGBE_STAT("tx_restart_queue", restart_queue),
90         IXGBE_STAT("rx_long_length_errors", stats.roc),
91         IXGBE_STAT("rx_short_length_errors", stats.ruc),
92         IXGBE_STAT("tx_flow_control_xon", stats.lxontxc),
93         IXGBE_STAT("rx_flow_control_xon", stats.lxonrxc),
94         IXGBE_STAT("tx_flow_control_xoff", stats.lxofftxc),
95         IXGBE_STAT("rx_flow_control_xoff", stats.lxoffrxc),
96         IXGBE_STAT("rx_csum_offload_errors", hw_csum_rx_error),
97         IXGBE_STAT("alloc_rx_page_failed", alloc_rx_page_failed),
98         IXGBE_STAT("alloc_rx_buff_failed", alloc_rx_buff_failed),
99 #ifndef IXGBE_NO_LRO
100         IXGBE_STAT("lro_aggregated", lro_stats.coal),
101         IXGBE_STAT("lro_flushed", lro_stats.flushed),
102 #endif /* IXGBE_NO_LRO */
103         IXGBE_STAT("rx_no_dma_resources", hw_rx_no_dma_resources),
104         IXGBE_STAT("hw_rsc_aggregated", rsc_total_count),
105         IXGBE_STAT("hw_rsc_flushed", rsc_total_flush),
106 #ifdef HAVE_TX_MQ
107         IXGBE_STAT("fdir_match", stats.fdirmatch),
108         IXGBE_STAT("fdir_miss", stats.fdirmiss),
109         IXGBE_STAT("fdir_overflow", fdir_overflow),
110 #endif /* HAVE_TX_MQ */
111 #ifdef IXGBE_FCOE
112         IXGBE_STAT("fcoe_bad_fccrc", stats.fccrc),
113         IXGBE_STAT("fcoe_last_errors", stats.fclast),
114         IXGBE_STAT("rx_fcoe_dropped", stats.fcoerpdc),
115         IXGBE_STAT("rx_fcoe_packets", stats.fcoeprc),
116         IXGBE_STAT("rx_fcoe_dwords", stats.fcoedwrc),
117         IXGBE_STAT("fcoe_noddp", stats.fcoe_noddp),
118         IXGBE_STAT("fcoe_noddp_ext_buff", stats.fcoe_noddp_ext_buff),
119         IXGBE_STAT("tx_fcoe_packets", stats.fcoeptc),
120         IXGBE_STAT("tx_fcoe_dwords", stats.fcoedwtc),
121 #endif /* IXGBE_FCOE */
122         IXGBE_STAT("os2bmc_rx_by_bmc", stats.o2bgptc),
123         IXGBE_STAT("os2bmc_tx_by_bmc", stats.b2ospc),
124         IXGBE_STAT("os2bmc_tx_by_host", stats.o2bspc),
125         IXGBE_STAT("os2bmc_rx_by_host", stats.b2ogprc),
126 };
127
128 #define IXGBE_QUEUE_STATS_LEN \
129         ((((struct ixgbe_adapter *)netdev_priv(netdev))->num_tx_queues + \
130          ((struct ixgbe_adapter *)netdev_priv(netdev))->num_rx_queues) * \
131           (sizeof(struct ixgbe_queue_stats) / sizeof(u64)))
132 #define IXGBE_GLOBAL_STATS_LEN  ARRAY_SIZE(ixgbe_gstrings_stats)
133 #define IXGBE_NETDEV_STATS_LEN  ARRAY_SIZE(ixgbe_gstrings_net_stats)
134 #define IXGBE_PB_STATS_LEN ( \
135                 (((struct ixgbe_adapter *)netdev_priv(netdev))->flags & \
136                  IXGBE_FLAG_DCB_ENABLED) ? \
137                  (sizeof(((struct ixgbe_adapter *)0)->stats.pxonrxc) + \
138                   sizeof(((struct ixgbe_adapter *)0)->stats.pxontxc) + \
139                   sizeof(((struct ixgbe_adapter *)0)->stats.pxoffrxc) + \
140                   sizeof(((struct ixgbe_adapter *)0)->stats.pxofftxc)) \
141                  / sizeof(u64) : 0)
142 #define IXGBE_VF_STATS_LEN \
143         ((((struct ixgbe_adapter *)netdev_priv(netdev))->num_vfs) * \
144           (sizeof(struct vf_stats) / sizeof(u64)))
145 #define IXGBE_STATS_LEN (IXGBE_GLOBAL_STATS_LEN + \
146                          IXGBE_NETDEV_STATS_LEN + \
147                          IXGBE_PB_STATS_LEN + \
148                          IXGBE_QUEUE_STATS_LEN + \
149                          IXGBE_VF_STATS_LEN)
150
151 #endif /* ETHTOOL_GSTATS */
152 #ifdef ETHTOOL_TEST
153 static const char ixgbe_gstrings_test[][ETH_GSTRING_LEN] = {
154         "Register test  (offline)", "Eeprom test    (offline)",
155         "Interrupt test (offline)", "Loopback test  (offline)",
156         "Link test   (on/offline)"
157 };
158 #define IXGBE_TEST_LEN  (sizeof(ixgbe_gstrings_test) / ETH_GSTRING_LEN)
159 #endif /* ETHTOOL_TEST */
160
161 int ixgbe_get_settings(struct net_device *netdev,
162                        struct ethtool_cmd *ecmd)
163 {
164         struct ixgbe_adapter *adapter = netdev_priv(netdev);
165         struct ixgbe_hw *hw = &adapter->hw;
166         u32 link_speed = 0;
167         bool link_up;
168
169         ecmd->supported = SUPPORTED_10000baseT_Full;
170         ecmd->autoneg = AUTONEG_ENABLE;
171         ecmd->transceiver = XCVR_EXTERNAL;
172         if ((hw->phy.media_type == ixgbe_media_type_copper) ||
173             (hw->phy.multispeed_fiber)) {
174                 ecmd->supported |= (SUPPORTED_1000baseT_Full |
175                                     SUPPORTED_Autoneg);
176                 switch (hw->mac.type) {
177                 case ixgbe_mac_X540:
178                         ecmd->supported |= SUPPORTED_100baseT_Full;
179                         break;
180                 default:
181                         break;
182                 }
183
184                 ecmd->advertising = ADVERTISED_Autoneg;
185                 if (hw->phy.autoneg_advertised) {
186                         if (hw->phy.autoneg_advertised &
187                             IXGBE_LINK_SPEED_100_FULL)
188                                 ecmd->advertising |= ADVERTISED_100baseT_Full;
189                         if (hw->phy.autoneg_advertised &
190                             IXGBE_LINK_SPEED_10GB_FULL)
191                                 ecmd->advertising |= ADVERTISED_10000baseT_Full;
192                         if (hw->phy.autoneg_advertised &
193                             IXGBE_LINK_SPEED_1GB_FULL)
194                                 ecmd->advertising |= ADVERTISED_1000baseT_Full;
195                 } else {
196                         /*
197                          * Default advertised modes in case
198                          * phy.autoneg_advertised isn't set.
199                          */
200                         ecmd->advertising |= (ADVERTISED_10000baseT_Full |
201                                               ADVERTISED_1000baseT_Full);
202                         if (hw->mac.type == ixgbe_mac_X540)
203                                 ecmd->advertising |= ADVERTISED_100baseT_Full;
204                 }
205
206                 if (hw->phy.media_type == ixgbe_media_type_copper) {
207                         ecmd->supported |= SUPPORTED_TP;
208                         ecmd->advertising |= ADVERTISED_TP;
209                         ecmd->port = PORT_TP;
210                 } else {
211                         ecmd->supported |= SUPPORTED_FIBRE;
212                         ecmd->advertising |= ADVERTISED_FIBRE;
213                         ecmd->port = PORT_FIBRE;
214                 }
215         } else if (hw->phy.media_type == ixgbe_media_type_backplane) {
216                 /* Set as FIBRE until SERDES defined in kernel */
217                 if (hw->device_id == IXGBE_DEV_ID_82598_BX) {
218                         ecmd->supported = (SUPPORTED_1000baseT_Full |
219                                            SUPPORTED_FIBRE);
220                         ecmd->advertising = (ADVERTISED_1000baseT_Full |
221                                              ADVERTISED_FIBRE);
222                         ecmd->port = PORT_FIBRE;
223                         ecmd->autoneg = AUTONEG_DISABLE;
224                 } else if ((hw->device_id == IXGBE_DEV_ID_82599_COMBO_BACKPLANE)
225                           || (hw->device_id == IXGBE_DEV_ID_82599_KX4_MEZZ)) {
226                         ecmd->supported |= (SUPPORTED_1000baseT_Full |
227                                             SUPPORTED_Autoneg |
228                                             SUPPORTED_FIBRE);
229                         ecmd->advertising = (ADVERTISED_10000baseT_Full |
230                                              ADVERTISED_1000baseT_Full |
231                                              ADVERTISED_Autoneg |
232                                              ADVERTISED_FIBRE);
233                         ecmd->port = PORT_FIBRE;
234                 } else {
235                         ecmd->supported |= (SUPPORTED_1000baseT_Full |
236                                             SUPPORTED_FIBRE);
237                         ecmd->advertising = (ADVERTISED_10000baseT_Full |
238                                              ADVERTISED_1000baseT_Full |
239                                              ADVERTISED_FIBRE);
240                         ecmd->port = PORT_FIBRE;
241                 }
242         } else {
243                 ecmd->supported |= SUPPORTED_FIBRE;
244                 ecmd->advertising = (ADVERTISED_10000baseT_Full |
245                                      ADVERTISED_FIBRE);
246                 ecmd->port = PORT_FIBRE;
247                 ecmd->autoneg = AUTONEG_DISABLE;
248         }
249
250 #ifdef HAVE_ETHTOOL_SFP_DISPLAY_PORT
251         /* Get PHY type */
252         switch (adapter->hw.phy.type) {
253         case ixgbe_phy_tn:
254         case ixgbe_phy_aq:
255         case ixgbe_phy_cu_unknown:
256                 /* Copper 10G-BASET */
257                 ecmd->port = PORT_TP;
258                 break;
259         case ixgbe_phy_qt:
260                 ecmd->port = PORT_FIBRE;
261                 break;
262         case ixgbe_phy_nl:
263         case ixgbe_phy_sfp_passive_tyco:
264         case ixgbe_phy_sfp_passive_unknown:
265         case ixgbe_phy_sfp_ftl:
266         case ixgbe_phy_sfp_avago:
267         case ixgbe_phy_sfp_intel:
268         case ixgbe_phy_sfp_unknown:
269                 switch (adapter->hw.phy.sfp_type) {
270                 /* SFP+ devices, further checking needed */
271                 case ixgbe_sfp_type_da_cu:
272                 case ixgbe_sfp_type_da_cu_core0:
273                 case ixgbe_sfp_type_da_cu_core1:
274                         ecmd->port = PORT_DA;
275                         break;
276                 case ixgbe_sfp_type_sr:
277                 case ixgbe_sfp_type_lr:
278                 case ixgbe_sfp_type_srlr_core0:
279                 case ixgbe_sfp_type_srlr_core1:
280                         ecmd->port = PORT_FIBRE;
281                         break;
282                 case ixgbe_sfp_type_not_present:
283                         ecmd->port = PORT_NONE;
284                         break;
285                 case ixgbe_sfp_type_1g_cu_core0:
286                 case ixgbe_sfp_type_1g_cu_core1:
287                         ecmd->port = PORT_TP;
288                         ecmd->supported = SUPPORTED_TP;
289                         ecmd->advertising = (ADVERTISED_1000baseT_Full |
290                                 ADVERTISED_TP);
291                         break;
292                 case ixgbe_sfp_type_1g_sx_core0:
293                 case ixgbe_sfp_type_1g_sx_core1:
294                         ecmd->port = PORT_FIBRE;
295                         ecmd->supported = SUPPORTED_FIBRE;
296                         ecmd->advertising = (ADVERTISED_1000baseT_Full |
297                                 ADVERTISED_FIBRE);
298                         break;
299                 case ixgbe_sfp_type_unknown:
300                 default:
301                         ecmd->port = PORT_OTHER;
302                         break;
303                 }
304                 break;
305         case ixgbe_phy_xaui:
306                 ecmd->port = PORT_NONE;
307                 break;
308         case ixgbe_phy_unknown:
309         case ixgbe_phy_generic:
310         case ixgbe_phy_sfp_unsupported:
311         default:
312                 ecmd->port = PORT_OTHER;
313                 break;
314         }
315 #endif
316
317         if (!in_interrupt()) {
318                 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
319         } else {
320                 /*
321                  * this case is a special workaround for RHEL5 bonding
322                  * that calls this routine from interrupt context
323                  */
324                 link_speed = adapter->link_speed;
325                 link_up = adapter->link_up;
326         }
327
328         if (link_up) {
329                 switch (link_speed) {
330                 case IXGBE_LINK_SPEED_10GB_FULL:
331                         ecmd->speed = SPEED_10000;
332                         break;
333                 case IXGBE_LINK_SPEED_1GB_FULL:
334                         ecmd->speed = SPEED_1000;
335                         break;
336                 case IXGBE_LINK_SPEED_100_FULL:
337                         ecmd->speed = SPEED_100;
338                         break;
339                 default:
340                         break;
341                 }
342                 ecmd->duplex = DUPLEX_FULL;
343         } else {
344                 ecmd->speed = -1;
345                 ecmd->duplex = -1;
346         }
347
348         return 0;
349 }
350
351 static int ixgbe_set_settings(struct net_device *netdev,
352                               struct ethtool_cmd *ecmd)
353 {
354         struct ixgbe_adapter *adapter = netdev_priv(netdev);
355         struct ixgbe_hw *hw = &adapter->hw;
356         u32 advertised, old;
357         s32 err = 0;
358
359         if ((hw->phy.media_type == ixgbe_media_type_copper) ||
360             (hw->phy.multispeed_fiber)) {
361                 /*
362                  * this function does not support duplex forcing, but can
363                  * limit the advertising of the adapter to the specified speed
364                  */
365                 if (ecmd->autoneg == AUTONEG_DISABLE)
366                         return -EINVAL;
367
368                 if (ecmd->advertising & ~ecmd->supported)
369                         return -EINVAL;
370
371                 old = hw->phy.autoneg_advertised;
372                 advertised = 0;
373                 if (ecmd->advertising & ADVERTISED_10000baseT_Full)
374                         advertised |= IXGBE_LINK_SPEED_10GB_FULL;
375
376                 if (ecmd->advertising & ADVERTISED_1000baseT_Full)
377                         advertised |= IXGBE_LINK_SPEED_1GB_FULL;
378
379                 if (ecmd->advertising & ADVERTISED_100baseT_Full)
380                         advertised |= IXGBE_LINK_SPEED_100_FULL;
381
382                 if (old == advertised)
383                         return err;
384                 /* this sets the link speed and restarts auto-neg */
385                 hw->mac.autotry_restart = true;
386                 err = hw->mac.ops.setup_link(hw, advertised, true, true);
387                 if (err) {
388                         e_info(probe, "setup link failed with code %d\n", err);
389                         hw->mac.ops.setup_link(hw, old, true, true);
390                 }
391         }
392         return err;
393 }
394
395 static void ixgbe_get_pauseparam(struct net_device *netdev,
396                                  struct ethtool_pauseparam *pause)
397 {
398         struct ixgbe_adapter *adapter = netdev_priv(netdev);
399         struct ixgbe_hw *hw = &adapter->hw;
400
401         if (hw->fc.disable_fc_autoneg)
402                 pause->autoneg = 0;
403         else
404                 pause->autoneg = 1;
405
406         if (hw->fc.current_mode == ixgbe_fc_rx_pause) {
407                 pause->rx_pause = 1;
408         } else if (hw->fc.current_mode == ixgbe_fc_tx_pause) {
409                 pause->tx_pause = 1;
410         } else if (hw->fc.current_mode == ixgbe_fc_full) {
411                 pause->rx_pause = 1;
412                 pause->tx_pause = 1;
413         }
414 }
415
416 static int ixgbe_set_pauseparam(struct net_device *netdev,
417                                 struct ethtool_pauseparam *pause)
418 {
419         struct ixgbe_adapter *adapter = netdev_priv(netdev);
420         struct ixgbe_hw *hw = &adapter->hw;
421         struct ixgbe_fc_info fc = hw->fc;
422
423         /* 82598 does no support link flow control with DCB enabled */
424         if ((hw->mac.type == ixgbe_mac_82598EB) &&
425             (adapter->flags & IXGBE_FLAG_DCB_ENABLED))
426                 return -EINVAL;
427
428         fc.disable_fc_autoneg = (pause->autoneg != AUTONEG_ENABLE);
429
430         if ((pause->rx_pause && pause->tx_pause) || pause->autoneg)
431                 fc.requested_mode = ixgbe_fc_full;
432         else if (pause->rx_pause)
433                 fc.requested_mode = ixgbe_fc_rx_pause;
434         else if (pause->tx_pause)
435                 fc.requested_mode = ixgbe_fc_tx_pause;
436         else
437                 fc.requested_mode = ixgbe_fc_none;
438
439         /* if the thing changed then we'll update and use new autoneg */
440         if (memcmp(&fc, &hw->fc, sizeof(struct ixgbe_fc_info))) {
441                 hw->fc = fc;
442                 if (netif_running(netdev))
443                         ixgbe_reinit_locked(adapter);
444                 else
445                         ixgbe_reset(adapter);
446         }
447
448         return 0;
449 }
450
451 static u32 ixgbe_get_msglevel(struct net_device *netdev)
452 {
453         struct ixgbe_adapter *adapter = netdev_priv(netdev);
454         return adapter->msg_enable;
455 }
456
457 static void ixgbe_set_msglevel(struct net_device *netdev, u32 data)
458 {
459         struct ixgbe_adapter *adapter = netdev_priv(netdev);
460         adapter->msg_enable = data;
461 }
462
463 static int ixgbe_get_regs_len(struct net_device *netdev)
464 {
465 #define IXGBE_REGS_LEN  1129
466         return IXGBE_REGS_LEN * sizeof(u32);
467 }
468
469 #define IXGBE_GET_STAT(_A_, _R_)        (_A_->stats._R_)
470
471
472 static void ixgbe_get_regs(struct net_device *netdev, struct ethtool_regs *regs,
473                            void *p)
474 {
475         struct ixgbe_adapter *adapter = netdev_priv(netdev);
476         struct ixgbe_hw *hw = &adapter->hw;
477         u32 *regs_buff = p;
478         u8 i;
479
480         printk(KERN_DEBUG "ixgbe_get_regs_1\n");
481         memset(p, 0, IXGBE_REGS_LEN * sizeof(u32));
482         printk(KERN_DEBUG "ixgbe_get_regs_2 0x%p\n", hw->hw_addr);
483
484         regs->version = (1 << 24) | hw->revision_id << 16 | hw->device_id;
485
486         /* General Registers */
487         regs_buff[0] = IXGBE_READ_REG(hw, IXGBE_CTRL);
488         printk(KERN_DEBUG "ixgbe_get_regs_3\n");
489         regs_buff[1] = IXGBE_READ_REG(hw, IXGBE_STATUS);
490         regs_buff[2] = IXGBE_READ_REG(hw, IXGBE_CTRL_EXT);
491         regs_buff[3] = IXGBE_READ_REG(hw, IXGBE_ESDP);
492         regs_buff[4] = IXGBE_READ_REG(hw, IXGBE_EODSDP);
493         regs_buff[5] = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
494         regs_buff[6] = IXGBE_READ_REG(hw, IXGBE_FRTIMER);
495         regs_buff[7] = IXGBE_READ_REG(hw, IXGBE_TCPTIMER);
496
497         printk(KERN_DEBUG "ixgbe_get_regs_4\n");
498
499         /* NVM Register */
500         regs_buff[8] = IXGBE_READ_REG(hw, IXGBE_EEC);
501         regs_buff[9] = IXGBE_READ_REG(hw, IXGBE_EERD);
502         regs_buff[10] = IXGBE_READ_REG(hw, IXGBE_FLA);
503         regs_buff[11] = IXGBE_READ_REG(hw, IXGBE_EEMNGCTL);
504         regs_buff[12] = IXGBE_READ_REG(hw, IXGBE_EEMNGDATA);
505         regs_buff[13] = IXGBE_READ_REG(hw, IXGBE_FLMNGCTL);
506         regs_buff[14] = IXGBE_READ_REG(hw, IXGBE_FLMNGDATA);
507         regs_buff[15] = IXGBE_READ_REG(hw, IXGBE_FLMNGCNT);
508         regs_buff[16] = IXGBE_READ_REG(hw, IXGBE_FLOP);
509         regs_buff[17] = IXGBE_READ_REG(hw, IXGBE_GRC);
510
511         /* Interrupt */
512         /* don't read EICR because it can clear interrupt causes, instead
513          * read EICS which is a shadow but doesn't clear EICR */
514         regs_buff[18] = IXGBE_READ_REG(hw, IXGBE_EICS);
515         regs_buff[19] = IXGBE_READ_REG(hw, IXGBE_EICS);
516         regs_buff[20] = IXGBE_READ_REG(hw, IXGBE_EIMS);
517         regs_buff[21] = IXGBE_READ_REG(hw, IXGBE_EIMC);
518         regs_buff[22] = IXGBE_READ_REG(hw, IXGBE_EIAC);
519         regs_buff[23] = IXGBE_READ_REG(hw, IXGBE_EIAM);
520         regs_buff[24] = IXGBE_READ_REG(hw, IXGBE_EITR(0));
521         regs_buff[25] = IXGBE_READ_REG(hw, IXGBE_IVAR(0));
522         regs_buff[26] = IXGBE_READ_REG(hw, IXGBE_MSIXT);
523         regs_buff[27] = IXGBE_READ_REG(hw, IXGBE_MSIXPBA);
524         regs_buff[28] = IXGBE_READ_REG(hw, IXGBE_PBACL(0));
525         regs_buff[29] = IXGBE_READ_REG(hw, IXGBE_GPIE);
526
527         /* Flow Control */
528         regs_buff[30] = IXGBE_READ_REG(hw, IXGBE_PFCTOP);
529         regs_buff[31] = IXGBE_READ_REG(hw, IXGBE_FCTTV(0));
530         regs_buff[32] = IXGBE_READ_REG(hw, IXGBE_FCTTV(1));
531         regs_buff[33] = IXGBE_READ_REG(hw, IXGBE_FCTTV(2));
532         regs_buff[34] = IXGBE_READ_REG(hw, IXGBE_FCTTV(3));
533         for (i = 0; i < 8; i++) {
534                 switch (hw->mac.type) {
535                 case ixgbe_mac_82598EB:
536                         regs_buff[35 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTL(i));
537                         regs_buff[43 + i] = IXGBE_READ_REG(hw, IXGBE_FCRTH(i));
538                         break;
539                 case ixgbe_mac_82599EB:
540                 case ixgbe_mac_X540:
541                         regs_buff[35 + i] = IXGBE_READ_REG(hw,
542                                                           IXGBE_FCRTL_82599(i));
543                         regs_buff[43 + i] = IXGBE_READ_REG(hw,
544                                                           IXGBE_FCRTH_82599(i));
545                         break;
546                 default:
547                         break;
548                 }
549         }
550         regs_buff[51] = IXGBE_READ_REG(hw, IXGBE_FCRTV);
551         regs_buff[52] = IXGBE_READ_REG(hw, IXGBE_TFCS);
552
553         /* Receive DMA */
554         for (i = 0; i < 64; i++)
555                 regs_buff[53 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAL(i));
556         for (i = 0; i < 64; i++)
557                 regs_buff[117 + i] = IXGBE_READ_REG(hw, IXGBE_RDBAH(i));
558         for (i = 0; i < 64; i++)
559                 regs_buff[181 + i] = IXGBE_READ_REG(hw, IXGBE_RDLEN(i));
560         for (i = 0; i < 64; i++)
561                 regs_buff[245 + i] = IXGBE_READ_REG(hw, IXGBE_RDH(i));
562         for (i = 0; i < 64; i++)
563                 regs_buff[309 + i] = IXGBE_READ_REG(hw, IXGBE_RDT(i));
564         for (i = 0; i < 64; i++)
565                 regs_buff[373 + i] = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i));
566         for (i = 0; i < 16; i++)
567                 regs_buff[437 + i] = IXGBE_READ_REG(hw, IXGBE_SRRCTL(i));
568         for (i = 0; i < 16; i++)
569                 regs_buff[453 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i));
570         regs_buff[469] = IXGBE_READ_REG(hw, IXGBE_RDRXCTL);
571         for (i = 0; i < 8; i++)
572                 regs_buff[470 + i] = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(i));
573         regs_buff[478] = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
574         regs_buff[479] = IXGBE_READ_REG(hw, IXGBE_DROPEN);
575
576         /* Receive */
577         regs_buff[480] = IXGBE_READ_REG(hw, IXGBE_RXCSUM);
578         regs_buff[481] = IXGBE_READ_REG(hw, IXGBE_RFCTL);
579         for (i = 0; i < 16; i++)
580                 regs_buff[482 + i] = IXGBE_READ_REG(hw, IXGBE_RAL(i));
581         for (i = 0; i < 16; i++)
582                 regs_buff[498 + i] = IXGBE_READ_REG(hw, IXGBE_RAH(i));
583         regs_buff[514] = IXGBE_READ_REG(hw, IXGBE_PSRTYPE(0));
584         regs_buff[515] = IXGBE_READ_REG(hw, IXGBE_FCTRL);
585         regs_buff[516] = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
586         regs_buff[517] = IXGBE_READ_REG(hw, IXGBE_MCSTCTRL);
587         regs_buff[518] = IXGBE_READ_REG(hw, IXGBE_MRQC);
588         regs_buff[519] = IXGBE_READ_REG(hw, IXGBE_VMD_CTL);
589         for (i = 0; i < 8; i++)
590                 regs_buff[520 + i] = IXGBE_READ_REG(hw, IXGBE_IMIR(i));
591         for (i = 0; i < 8; i++)
592                 regs_buff[528 + i] = IXGBE_READ_REG(hw, IXGBE_IMIREXT(i));
593         regs_buff[536] = IXGBE_READ_REG(hw, IXGBE_IMIRVP);
594
595         /* Transmit */
596         for (i = 0; i < 32; i++)
597                 regs_buff[537 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAL(i));
598         for (i = 0; i < 32; i++)
599                 regs_buff[569 + i] = IXGBE_READ_REG(hw, IXGBE_TDBAH(i));
600         for (i = 0; i < 32; i++)
601                 regs_buff[601 + i] = IXGBE_READ_REG(hw, IXGBE_TDLEN(i));
602         for (i = 0; i < 32; i++)
603                 regs_buff[633 + i] = IXGBE_READ_REG(hw, IXGBE_TDH(i));
604         for (i = 0; i < 32; i++)
605                 regs_buff[665 + i] = IXGBE_READ_REG(hw, IXGBE_TDT(i));
606         for (i = 0; i < 32; i++)
607                 regs_buff[697 + i] = IXGBE_READ_REG(hw, IXGBE_TXDCTL(i));
608         for (i = 0; i < 32; i++)
609                 regs_buff[729 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAL(i));
610         for (i = 0; i < 32; i++)
611                 regs_buff[761 + i] = IXGBE_READ_REG(hw, IXGBE_TDWBAH(i));
612         regs_buff[793] = IXGBE_READ_REG(hw, IXGBE_DTXCTL);
613         for (i = 0; i < 16; i++)
614                 regs_buff[794 + i] = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i));
615         regs_buff[810] = IXGBE_READ_REG(hw, IXGBE_TIPG);
616         for (i = 0; i < 8; i++)
617                 regs_buff[811 + i] = IXGBE_READ_REG(hw, IXGBE_TXPBSIZE(i));
618         regs_buff[819] = IXGBE_READ_REG(hw, IXGBE_MNGTXMAP);
619
620         /* Wake Up */
621         regs_buff[820] = IXGBE_READ_REG(hw, IXGBE_WUC);
622         regs_buff[821] = IXGBE_READ_REG(hw, IXGBE_WUFC);
623         regs_buff[822] = IXGBE_READ_REG(hw, IXGBE_WUS);
624         regs_buff[823] = IXGBE_READ_REG(hw, IXGBE_IPAV);
625         regs_buff[824] = IXGBE_READ_REG(hw, IXGBE_IP4AT);
626         regs_buff[825] = IXGBE_READ_REG(hw, IXGBE_IP6AT);
627         regs_buff[826] = IXGBE_READ_REG(hw, IXGBE_WUPL);
628         regs_buff[827] = IXGBE_READ_REG(hw, IXGBE_WUPM);
629         regs_buff[828] = IXGBE_READ_REG(hw, IXGBE_FHFT(0));
630
631         /* DCB */
632         regs_buff[829] = IXGBE_READ_REG(hw, IXGBE_RMCS);
633         regs_buff[830] = IXGBE_READ_REG(hw, IXGBE_DPMCS);
634         regs_buff[831] = IXGBE_READ_REG(hw, IXGBE_PDPMCS);
635         regs_buff[832] = IXGBE_READ_REG(hw, IXGBE_RUPPBMR);
636         for (i = 0; i < 8; i++)
637                 regs_buff[833 + i] = IXGBE_READ_REG(hw, IXGBE_RT2CR(i));
638         for (i = 0; i < 8; i++)
639                 regs_buff[841 + i] = IXGBE_READ_REG(hw, IXGBE_RT2SR(i));
640         for (i = 0; i < 8; i++)
641                 regs_buff[849 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCCR(i));
642         for (i = 0; i < 8; i++)
643                 regs_buff[857 + i] = IXGBE_READ_REG(hw, IXGBE_TDTQ2TCSR(i));
644         for (i = 0; i < 8; i++)
645                 regs_buff[865 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCCR(i));
646         for (i = 0; i < 8; i++)
647                 regs_buff[873 + i] = IXGBE_READ_REG(hw, IXGBE_TDPT2TCSR(i));
648
649         /* Statistics */
650         regs_buff[881] = IXGBE_GET_STAT(adapter, crcerrs);
651         regs_buff[882] = IXGBE_GET_STAT(adapter, illerrc);
652         regs_buff[883] = IXGBE_GET_STAT(adapter, errbc);
653         regs_buff[884] = IXGBE_GET_STAT(adapter, mspdc);
654         for (i = 0; i < 8; i++)
655                 regs_buff[885 + i] = IXGBE_GET_STAT(adapter, mpc[i]);
656         regs_buff[893] = IXGBE_GET_STAT(adapter, mlfc);
657         regs_buff[894] = IXGBE_GET_STAT(adapter, mrfc);
658         regs_buff[895] = IXGBE_GET_STAT(adapter, rlec);
659         regs_buff[896] = IXGBE_GET_STAT(adapter, lxontxc);
660         regs_buff[897] = IXGBE_GET_STAT(adapter, lxonrxc);
661         regs_buff[898] = IXGBE_GET_STAT(adapter, lxofftxc);
662         regs_buff[899] = IXGBE_GET_STAT(adapter, lxoffrxc);
663         for (i = 0; i < 8; i++)
664                 regs_buff[900 + i] = IXGBE_GET_STAT(adapter, pxontxc[i]);
665         for (i = 0; i < 8; i++)
666                 regs_buff[908 + i] = IXGBE_GET_STAT(adapter, pxonrxc[i]);
667         for (i = 0; i < 8; i++)
668                 regs_buff[916 + i] = IXGBE_GET_STAT(adapter, pxofftxc[i]);
669         for (i = 0; i < 8; i++)
670                 regs_buff[924 + i] = IXGBE_GET_STAT(adapter, pxoffrxc[i]);
671         regs_buff[932] = IXGBE_GET_STAT(adapter, prc64);
672         regs_buff[933] = IXGBE_GET_STAT(adapter, prc127);
673         regs_buff[934] = IXGBE_GET_STAT(adapter, prc255);
674         regs_buff[935] = IXGBE_GET_STAT(adapter, prc511);
675         regs_buff[936] = IXGBE_GET_STAT(adapter, prc1023);
676         regs_buff[937] = IXGBE_GET_STAT(adapter, prc1522);
677         regs_buff[938] = IXGBE_GET_STAT(adapter, gprc);
678         regs_buff[939] = IXGBE_GET_STAT(adapter, bprc);
679         regs_buff[940] = IXGBE_GET_STAT(adapter, mprc);
680         regs_buff[941] = IXGBE_GET_STAT(adapter, gptc);
681         regs_buff[942] = IXGBE_GET_STAT(adapter, gorc);
682         regs_buff[944] = IXGBE_GET_STAT(adapter, gotc);
683         for (i = 0; i < 8; i++)
684                 regs_buff[946 + i] = IXGBE_GET_STAT(adapter, rnbc[i]);
685         regs_buff[954] = IXGBE_GET_STAT(adapter, ruc);
686         regs_buff[955] = IXGBE_GET_STAT(adapter, rfc);
687         regs_buff[956] = IXGBE_GET_STAT(adapter, roc);
688         regs_buff[957] = IXGBE_GET_STAT(adapter, rjc);
689         regs_buff[958] = IXGBE_GET_STAT(adapter, mngprc);
690         regs_buff[959] = IXGBE_GET_STAT(adapter, mngpdc);
691         regs_buff[960] = IXGBE_GET_STAT(adapter, mngptc);
692         regs_buff[961] = IXGBE_GET_STAT(adapter, tor);
693         regs_buff[963] = IXGBE_GET_STAT(adapter, tpr);
694         regs_buff[964] = IXGBE_GET_STAT(adapter, tpt);
695         regs_buff[965] = IXGBE_GET_STAT(adapter, ptc64);
696         regs_buff[966] = IXGBE_GET_STAT(adapter, ptc127);
697         regs_buff[967] = IXGBE_GET_STAT(adapter, ptc255);
698         regs_buff[968] = IXGBE_GET_STAT(adapter, ptc511);
699         regs_buff[969] = IXGBE_GET_STAT(adapter, ptc1023);
700         regs_buff[970] = IXGBE_GET_STAT(adapter, ptc1522);
701         regs_buff[971] = IXGBE_GET_STAT(adapter, mptc);
702         regs_buff[972] = IXGBE_GET_STAT(adapter, bptc);
703         regs_buff[973] = IXGBE_GET_STAT(adapter, xec);
704         for (i = 0; i < 16; i++)
705                 regs_buff[974 + i] = IXGBE_GET_STAT(adapter, qprc[i]);
706         for (i = 0; i < 16; i++)
707                 regs_buff[990 + i] = IXGBE_GET_STAT(adapter, qptc[i]);
708         for (i = 0; i < 16; i++)
709                 regs_buff[1006 + i] = IXGBE_GET_STAT(adapter, qbrc[i]);
710         for (i = 0; i < 16; i++)
711                 regs_buff[1022 + i] = IXGBE_GET_STAT(adapter, qbtc[i]);
712
713         /* MAC */
714         regs_buff[1038] = IXGBE_READ_REG(hw, IXGBE_PCS1GCFIG);
715         regs_buff[1039] = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL);
716         regs_buff[1040] = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA);
717         regs_buff[1041] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG0);
718         regs_buff[1042] = IXGBE_READ_REG(hw, IXGBE_PCS1GDBG1);
719         regs_buff[1043] = IXGBE_READ_REG(hw, IXGBE_PCS1GANA);
720         regs_buff[1044] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP);
721         regs_buff[1045] = IXGBE_READ_REG(hw, IXGBE_PCS1GANNP);
722         regs_buff[1046] = IXGBE_READ_REG(hw, IXGBE_PCS1GANLPNP);
723         regs_buff[1047] = IXGBE_READ_REG(hw, IXGBE_HLREG0);
724         regs_buff[1048] = IXGBE_READ_REG(hw, IXGBE_HLREG1);
725         regs_buff[1049] = IXGBE_READ_REG(hw, IXGBE_PAP);
726         regs_buff[1050] = IXGBE_READ_REG(hw, IXGBE_MACA);
727         regs_buff[1051] = IXGBE_READ_REG(hw, IXGBE_APAE);
728         regs_buff[1052] = IXGBE_READ_REG(hw, IXGBE_ARD);
729         regs_buff[1053] = IXGBE_READ_REG(hw, IXGBE_AIS);
730         regs_buff[1054] = IXGBE_READ_REG(hw, IXGBE_MSCA);
731         regs_buff[1055] = IXGBE_READ_REG(hw, IXGBE_MSRWD);
732         regs_buff[1056] = IXGBE_READ_REG(hw, IXGBE_MLADD);
733         regs_buff[1057] = IXGBE_READ_REG(hw, IXGBE_MHADD);
734         regs_buff[1058] = IXGBE_READ_REG(hw, IXGBE_TREG);
735         regs_buff[1059] = IXGBE_READ_REG(hw, IXGBE_PCSS1);
736         regs_buff[1060] = IXGBE_READ_REG(hw, IXGBE_PCSS2);
737         regs_buff[1061] = IXGBE_READ_REG(hw, IXGBE_XPCSS);
738         regs_buff[1062] = IXGBE_READ_REG(hw, IXGBE_SERDESC);
739         regs_buff[1063] = IXGBE_READ_REG(hw, IXGBE_MACS);
740         regs_buff[1064] = IXGBE_READ_REG(hw, IXGBE_AUTOC);
741         regs_buff[1065] = IXGBE_READ_REG(hw, IXGBE_LINKS);
742         regs_buff[1066] = IXGBE_READ_REG(hw, IXGBE_AUTOC2);
743         regs_buff[1067] = IXGBE_READ_REG(hw, IXGBE_AUTOC3);
744         regs_buff[1068] = IXGBE_READ_REG(hw, IXGBE_ANLP1);
745         regs_buff[1069] = IXGBE_READ_REG(hw, IXGBE_ANLP2);
746         regs_buff[1070] = IXGBE_READ_REG(hw, IXGBE_ATLASCTL);
747
748         /* Diagnostic */
749         regs_buff[1071] = IXGBE_READ_REG(hw, IXGBE_RDSTATCTL);
750         for (i = 0; i < 8; i++)
751                 regs_buff[1072 + i] = IXGBE_READ_REG(hw, IXGBE_RDSTAT(i));
752         regs_buff[1080] = IXGBE_READ_REG(hw, IXGBE_RDHMPN);
753         for (i = 0; i < 4; i++)
754                 regs_buff[1081 + i] = IXGBE_READ_REG(hw, IXGBE_RIC_DW(i));
755         regs_buff[1085] = IXGBE_READ_REG(hw, IXGBE_RDPROBE);
756         regs_buff[1086] = IXGBE_READ_REG(hw, IXGBE_TDSTATCTL);
757         for (i = 0; i < 8; i++)
758                 regs_buff[1087 + i] = IXGBE_READ_REG(hw, IXGBE_TDSTAT(i));
759         regs_buff[1095] = IXGBE_READ_REG(hw, IXGBE_TDHMPN);
760         for (i = 0; i < 4; i++)
761                 regs_buff[1096 + i] = IXGBE_READ_REG(hw, IXGBE_TIC_DW(i));
762         regs_buff[1100] = IXGBE_READ_REG(hw, IXGBE_TDPROBE);
763         regs_buff[1101] = IXGBE_READ_REG(hw, IXGBE_TXBUFCTRL);
764         regs_buff[1102] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA0);
765         regs_buff[1103] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA1);
766         regs_buff[1104] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA2);
767         regs_buff[1105] = IXGBE_READ_REG(hw, IXGBE_TXBUFDATA3);
768         regs_buff[1106] = IXGBE_READ_REG(hw, IXGBE_RXBUFCTRL);
769         regs_buff[1107] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA0);
770         regs_buff[1108] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA1);
771         regs_buff[1109] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA2);
772         regs_buff[1110] = IXGBE_READ_REG(hw, IXGBE_RXBUFDATA3);
773         for (i = 0; i < 8; i++)
774                 regs_buff[1111 + i] = IXGBE_READ_REG(hw, IXGBE_PCIE_DIAG(i));
775         regs_buff[1119] = IXGBE_READ_REG(hw, IXGBE_RFVAL);
776         regs_buff[1120] = IXGBE_READ_REG(hw, IXGBE_MDFTC1);
777         regs_buff[1121] = IXGBE_READ_REG(hw, IXGBE_MDFTC2);
778         regs_buff[1122] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO1);
779         regs_buff[1123] = IXGBE_READ_REG(hw, IXGBE_MDFTFIFO2);
780         regs_buff[1124] = IXGBE_READ_REG(hw, IXGBE_MDFTS);
781         regs_buff[1125] = IXGBE_READ_REG(hw, IXGBE_PCIEECCCTL);
782         regs_buff[1126] = IXGBE_READ_REG(hw, IXGBE_PBTXECC);
783         regs_buff[1127] = IXGBE_READ_REG(hw, IXGBE_PBRXECC);
784
785         /* 82599 X540 specific registers  */
786         regs_buff[1128] = IXGBE_READ_REG(hw, IXGBE_MFLCN);
787 }
788
789 static int ixgbe_get_eeprom_len(struct net_device *netdev)
790 {
791         struct ixgbe_adapter *adapter = netdev_priv(netdev);
792         return adapter->hw.eeprom.word_size * 2;
793 }
794
795 static int ixgbe_get_eeprom(struct net_device *netdev,
796                             struct ethtool_eeprom *eeprom, u8 *bytes)
797 {
798         struct ixgbe_adapter *adapter = netdev_priv(netdev);
799         struct ixgbe_hw *hw = &adapter->hw;
800         u16 *eeprom_buff;
801         int first_word, last_word, eeprom_len;
802         int ret_val = 0;
803         u16 i;
804
805         if (eeprom->len == 0)
806                 return -EINVAL;
807
808         eeprom->magic = hw->vendor_id | (hw->device_id << 16);
809
810         first_word = eeprom->offset >> 1;
811         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
812         eeprom_len = last_word - first_word + 1;
813
814         eeprom_buff = kmalloc(sizeof(u16) * eeprom_len, GFP_KERNEL);
815         if (!eeprom_buff)
816                 return -ENOMEM;
817
818         ret_val = ixgbe_read_eeprom_buffer(hw, first_word, eeprom_len,
819                                            eeprom_buff);
820
821         /* Device's eeprom is always little-endian, word addressable */
822         for (i = 0; i < eeprom_len; i++)
823                 le16_to_cpus(&eeprom_buff[i]);
824
825         memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len);
826         kfree(eeprom_buff);
827
828         return ret_val;
829 }
830
831 static int ixgbe_set_eeprom(struct net_device *netdev,
832                             struct ethtool_eeprom *eeprom, u8 *bytes)
833 {
834         struct ixgbe_adapter *adapter = netdev_priv(netdev);
835         struct ixgbe_hw *hw = &adapter->hw;
836         u16 *eeprom_buff;
837         void *ptr;
838         int max_len, first_word, last_word, ret_val = 0;
839         u16 i;
840
841         if (eeprom->len == 0)
842                 return -EINVAL;
843
844         if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
845                 return -EINVAL;
846
847         max_len = hw->eeprom.word_size * 2;
848
849         first_word = eeprom->offset >> 1;
850         last_word = (eeprom->offset + eeprom->len - 1) >> 1;
851         eeprom_buff = kmalloc(max_len, GFP_KERNEL);
852         if (!eeprom_buff)
853                 return -ENOMEM;
854
855         ptr = eeprom_buff;
856
857         if (eeprom->offset & 1) {
858                 /*
859                  * need read/modify/write of first changed EEPROM word
860                  * only the second byte of the word is being modified
861                  */
862                 ret_val = ixgbe_read_eeprom(hw, first_word, &eeprom_buff[0]);
863                 if (ret_val)
864                         goto err;
865
866                 ptr++;
867         }
868         if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
869                 /*
870                  * need read/modify/write of last changed EEPROM word
871                  * only the first byte of the word is being modified
872                  */
873                 ret_val = ixgbe_read_eeprom(hw, last_word,
874                                           &eeprom_buff[last_word - first_word]);
875                 if (ret_val)
876                         goto err;
877         }
878
879         /* Device's eeprom is always little-endian, word addressable */
880         for (i = 0; i < last_word - first_word + 1; i++)
881                 le16_to_cpus(&eeprom_buff[i]);
882
883         memcpy(ptr, bytes, eeprom->len);
884
885         for (i = 0; i < last_word - first_word + 1; i++)
886                 cpu_to_le16s(&eeprom_buff[i]);
887
888         ret_val = ixgbe_write_eeprom_buffer(hw, first_word,
889                                             last_word - first_word + 1,
890                                             eeprom_buff);
891
892         /* Update the checksum */
893         if (ret_val == 0)
894                 ixgbe_update_eeprom_checksum(hw);
895
896 err:
897         kfree(eeprom_buff);
898         return ret_val;
899 }
900
901 static void ixgbe_get_drvinfo(struct net_device *netdev,
902                               struct ethtool_drvinfo *drvinfo)
903 {
904         struct ixgbe_adapter *adapter = netdev_priv(netdev);
905
906         strlcpy(drvinfo->driver, ixgbe_driver_name, sizeof(drvinfo->driver));
907
908         strlcpy(drvinfo->version, ixgbe_driver_version,
909                                 sizeof(drvinfo->version));
910
911         strlcpy(drvinfo->fw_version, adapter->eeprom_id,
912                                 sizeof(drvinfo->fw_version));
913
914         strlcpy(drvinfo->bus_info, pci_name(adapter->pdev),
915                                 sizeof(drvinfo->bus_info));
916
917         drvinfo->n_stats = IXGBE_STATS_LEN;
918         drvinfo->testinfo_len = IXGBE_TEST_LEN;
919         drvinfo->regdump_len = ixgbe_get_regs_len(netdev);
920 }
921
922 static void ixgbe_get_ringparam(struct net_device *netdev,
923                                 struct ethtool_ringparam *ring)
924 {
925         struct ixgbe_adapter *adapter = netdev_priv(netdev);
926
927         ring->rx_max_pending = IXGBE_MAX_RXD;
928         ring->tx_max_pending = IXGBE_MAX_TXD;
929         ring->rx_mini_max_pending = 0;
930         ring->rx_jumbo_max_pending = 0;
931         ring->rx_pending = adapter->rx_ring_count;
932         ring->tx_pending = adapter->tx_ring_count;
933         ring->rx_mini_pending = 0;
934         ring->rx_jumbo_pending = 0;
935 }
936
937 static int ixgbe_set_ringparam(struct net_device *netdev,
938                                struct ethtool_ringparam *ring)
939 {
940         struct ixgbe_adapter *adapter = netdev_priv(netdev);
941         struct ixgbe_ring *tx_ring = NULL, *rx_ring = NULL;
942         u32 new_rx_count, new_tx_count;
943         int i, err = 0;
944
945         if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
946                 return -EINVAL;
947
948         new_tx_count = clamp_t(u32, ring->tx_pending,
949                                IXGBE_MIN_TXD, IXGBE_MAX_TXD);
950         new_tx_count = ALIGN(new_tx_count, IXGBE_REQ_TX_DESCRIPTOR_MULTIPLE);
951
952         new_rx_count = clamp_t(u32, ring->rx_pending,
953                                IXGBE_MIN_RXD, IXGBE_MAX_RXD);
954         new_rx_count = ALIGN(new_rx_count, IXGBE_REQ_RX_DESCRIPTOR_MULTIPLE);
955
956         /* if nothing to do return success */
957         if ((new_tx_count == adapter->tx_ring_count) &&
958             (new_rx_count == adapter->rx_ring_count))
959                 return 0;
960
961         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
962                 usleep_range(1000, 2000);
963
964         if (!netif_running(adapter->netdev)) {
965                 for (i = 0; i < adapter->num_tx_queues; i++)
966                         adapter->tx_ring[i]->count = new_tx_count;
967                 for (i = 0; i < adapter->num_rx_queues; i++)
968                         adapter->rx_ring[i]->count = new_rx_count;
969                 adapter->tx_ring_count = new_tx_count;
970                 adapter->rx_ring_count = new_rx_count;
971                 goto clear_reset;
972         }
973
974         /* alloc updated Tx resources */
975         if (new_tx_count != adapter->tx_ring_count) {
976                 tx_ring = vmalloc(adapter->num_tx_queues * sizeof(*tx_ring));
977                 if (!tx_ring) {
978                         err = -ENOMEM;
979                         goto clear_reset;
980                 }
981
982                 for (i = 0; i < adapter->num_tx_queues; i++) {
983                         /* clone ring and setup updated count */
984                         tx_ring[i] = *adapter->tx_ring[i];
985                         tx_ring[i].count = new_tx_count;
986                         err = ixgbe_setup_tx_resources(&tx_ring[i]);
987                         if (err) {
988                                 while (i) {
989                                         i--;
990                                         ixgbe_free_tx_resources(&tx_ring[i]);
991                                 }
992
993                                 vfree(tx_ring);
994                                 tx_ring = NULL;
995
996                                 goto clear_reset;
997                         }
998                 }
999         }
1000
1001         /* alloc updated Rx resources */
1002         if (new_rx_count != adapter->rx_ring_count) {
1003                 rx_ring = vmalloc(adapter->num_rx_queues * sizeof(*rx_ring));
1004                 if (!rx_ring) {
1005                         err = -ENOMEM;
1006                         goto clear_reset;
1007                 }
1008
1009                 for (i = 0; i < adapter->num_rx_queues; i++) {
1010                         /* clone ring and setup updated count */
1011                         rx_ring[i] = *adapter->rx_ring[i];
1012                         rx_ring[i].count = new_rx_count;
1013                         err = ixgbe_setup_rx_resources(&rx_ring[i]);
1014                         if (err) {
1015                                 while (i) {
1016                                         i--;
1017                                         ixgbe_free_rx_resources(&rx_ring[i]);
1018                                 }
1019
1020                                 vfree(rx_ring);
1021                                 rx_ring = NULL;
1022
1023                                 goto clear_reset;
1024                         }
1025                 }
1026         }
1027
1028         /* bring interface down to prepare for update */
1029         ixgbe_down(adapter);
1030
1031         /* Tx */
1032         if (tx_ring) {
1033                 for (i = 0; i < adapter->num_tx_queues; i++) {
1034                         ixgbe_free_tx_resources(adapter->tx_ring[i]);
1035                         *adapter->tx_ring[i] = tx_ring[i];
1036                 }
1037                 adapter->tx_ring_count = new_tx_count;
1038
1039                 vfree(tx_ring);
1040                 tx_ring = NULL;
1041         }
1042
1043         /* Rx */
1044         if (rx_ring) {
1045                 for (i = 0; i < adapter->num_rx_queues; i++) {
1046                         ixgbe_free_rx_resources(adapter->rx_ring[i]);
1047                         *adapter->rx_ring[i] = rx_ring[i];
1048                 }
1049                 adapter->rx_ring_count = new_rx_count;
1050
1051                 vfree(rx_ring);
1052                 rx_ring = NULL;
1053         }
1054
1055         /* restore interface using new values */
1056         ixgbe_up(adapter);
1057
1058 clear_reset:
1059         /* free Tx resources if Rx error is encountered */
1060         if (tx_ring) {
1061                 for (i = 0; i < adapter->num_tx_queues; i++)
1062                         ixgbe_free_tx_resources(&tx_ring[i]);
1063                 vfree(tx_ring);
1064         }
1065
1066         clear_bit(__IXGBE_RESETTING, &adapter->state);
1067         return err;
1068 }
1069
1070 #ifndef HAVE_ETHTOOL_GET_SSET_COUNT
1071 static int ixgbe_get_stats_count(struct net_device *netdev)
1072 {
1073         return IXGBE_STATS_LEN;
1074 }
1075
1076 #else /* HAVE_ETHTOOL_GET_SSET_COUNT */
1077 static int ixgbe_get_sset_count(struct net_device *netdev, int sset)
1078 {
1079         switch (sset) {
1080         case ETH_SS_TEST:
1081                 return IXGBE_TEST_LEN;
1082         case ETH_SS_STATS:
1083                 return IXGBE_STATS_LEN;
1084         default:
1085                 return -EOPNOTSUPP;
1086         }
1087 }
1088
1089 #endif /* HAVE_ETHTOOL_GET_SSET_COUNT */
1090 static void ixgbe_get_ethtool_stats(struct net_device *netdev,
1091                                     struct ethtool_stats *stats, u64 *data)
1092 {
1093         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1094 #ifdef HAVE_NETDEV_STATS_IN_NETDEV
1095         struct net_device_stats *net_stats = &netdev->stats;
1096 #else
1097         struct net_device_stats *net_stats = &adapter->net_stats;
1098 #endif
1099         u64 *queue_stat;
1100         int stat_count = sizeof(struct ixgbe_queue_stats) / sizeof(u64);
1101         int i, j, k;
1102         char *p;
1103
1104         printk(KERN_DEBUG "ixgbe_stats 0\n");
1105         ixgbe_update_stats(adapter);
1106         printk(KERN_DEBUG "ixgbe_stats 1\n");
1107
1108         for (i = 0; i < IXGBE_NETDEV_STATS_LEN; i++) {
1109                 p = (char *)net_stats + ixgbe_gstrings_net_stats[i].stat_offset;
1110                 data[i] = (ixgbe_gstrings_net_stats[i].sizeof_stat ==
1111                         sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1112         }
1113         for (j = 0; j < IXGBE_GLOBAL_STATS_LEN; j++, i++) {
1114                 p = (char *)adapter + ixgbe_gstrings_stats[j].stat_offset;
1115                 data[i] = (ixgbe_gstrings_stats[j].sizeof_stat ==
1116                            sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1117         }
1118         printk(KERN_DEBUG "ixgbe_stats 2\n");
1119 #ifdef NO_VNIC
1120         for (j = 0; j < adapter->num_tx_queues; j++) {
1121                 queue_stat = (u64 *)&adapter->tx_ring[j]->stats;
1122                 for (k = 0; k < stat_count; k++)
1123                         data[i + k] = queue_stat[k];
1124                 i += k;
1125         }
1126         for (j = 0; j < adapter->num_rx_queues; j++) {
1127                 queue_stat = (u64 *)&adapter->rx_ring[j]->stats;
1128                 for (k = 0; k < stat_count; k++)
1129                         data[i + k] = queue_stat[k];
1130                 i += k;
1131         }
1132         printk(KERN_DEBUG "ixgbe_stats 3\n");
1133 #endif
1134         if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
1135                 for (j = 0; j < MAX_TX_PACKET_BUFFERS; j++) {
1136                         data[i++] = adapter->stats.pxontxc[j];
1137                         data[i++] = adapter->stats.pxofftxc[j];
1138                 }
1139                 for (j = 0; j < MAX_RX_PACKET_BUFFERS; j++) {
1140                         data[i++] = adapter->stats.pxonrxc[j];
1141                         data[i++] = adapter->stats.pxoffrxc[j];
1142                 }
1143         }
1144         printk(KERN_DEBUG "ixgbe_stats 4\n");
1145         stat_count = sizeof(struct vf_stats) / sizeof(u64);
1146         for (j = 0; j < adapter->num_vfs; j++) {
1147                 queue_stat = (u64 *)&adapter->vfinfo[j].vfstats;
1148                 for (k = 0; k < stat_count; k++)
1149                         data[i + k] = queue_stat[k];
1150                 queue_stat = (u64 *)&adapter->vfinfo[j].saved_rst_vfstats;
1151                 for (k = 0; k < stat_count; k++)
1152                         data[i + k] += queue_stat[k];
1153                 i += k;
1154         }
1155 }
1156
1157 static void ixgbe_get_strings(struct net_device *netdev, u32 stringset,
1158                               u8 *data)
1159 {
1160         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1161         char *p = (char *)data;
1162         int i;
1163
1164         switch (stringset) {
1165         case ETH_SS_TEST:
1166                 memcpy(data, *ixgbe_gstrings_test,
1167                         IXGBE_TEST_LEN * ETH_GSTRING_LEN);
1168                 break;
1169         case ETH_SS_STATS:
1170                 for (i = 0; i < IXGBE_NETDEV_STATS_LEN; i++) {
1171                         memcpy(p, ixgbe_gstrings_net_stats[i].stat_string,
1172                                ETH_GSTRING_LEN);
1173                         p += ETH_GSTRING_LEN;
1174                 }
1175                 for (i = 0; i < IXGBE_GLOBAL_STATS_LEN; i++) {
1176                         memcpy(p, ixgbe_gstrings_stats[i].stat_string,
1177                                ETH_GSTRING_LEN);
1178                         p += ETH_GSTRING_LEN;
1179                 }
1180                 for (i = 0; i < adapter->num_tx_queues; i++) {
1181                         sprintf(p, "tx_queue_%u_packets", i);
1182                         p += ETH_GSTRING_LEN;
1183                         sprintf(p, "tx_queue_%u_bytes", i);
1184                         p += ETH_GSTRING_LEN;
1185                 }
1186                 for (i = 0; i < adapter->num_rx_queues; i++) {
1187                         sprintf(p, "rx_queue_%u_packets", i);
1188                         p += ETH_GSTRING_LEN;
1189                         sprintf(p, "rx_queue_%u_bytes", i);
1190                         p += ETH_GSTRING_LEN;
1191                 }
1192                 if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
1193                         for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
1194                                 sprintf(p, "tx_pb_%u_pxon", i);
1195                                 p += ETH_GSTRING_LEN;
1196                                 sprintf(p, "tx_pb_%u_pxoff", i);
1197                                 p += ETH_GSTRING_LEN;
1198                         }
1199                         for (i = 0; i < MAX_RX_PACKET_BUFFERS; i++) {
1200                                 sprintf(p, "rx_pb_%u_pxon", i);
1201                                 p += ETH_GSTRING_LEN;
1202                                 sprintf(p, "rx_pb_%u_pxoff", i);
1203                                 p += ETH_GSTRING_LEN;
1204                         }
1205                 }
1206                 for (i = 0; i < adapter->num_vfs; i++) {
1207                         sprintf(p, "VF %d Rx Packets", i);
1208                         p += ETH_GSTRING_LEN;
1209                         sprintf(p, "VF %d Rx Bytes", i);
1210                         p += ETH_GSTRING_LEN;
1211                         sprintf(p, "VF %d Tx Packets", i);
1212                         p += ETH_GSTRING_LEN;
1213                         sprintf(p, "VF %d Tx Bytes", i);
1214                         p += ETH_GSTRING_LEN;
1215                         sprintf(p, "VF %d MC Packets", i);
1216                         p += ETH_GSTRING_LEN;
1217                 }
1218                 /* BUG_ON(p - data != IXGBE_STATS_LEN * ETH_GSTRING_LEN); */
1219                 break;
1220         }
1221 }
1222
1223 static int ixgbe_link_test(struct ixgbe_adapter *adapter, u64 *data)
1224 {
1225         struct ixgbe_hw *hw = &adapter->hw;
1226         bool link_up;
1227         u32 link_speed = 0;
1228         *data = 0;
1229
1230         hw->mac.ops.check_link(hw, &link_speed, &link_up, true);
1231         if (link_up)
1232                 return *data;
1233         else
1234                 *data = 1;
1235         return *data;
1236 }
1237
1238 /* ethtool register test data */
1239 struct ixgbe_reg_test {
1240         u16 reg;
1241         u8  array_len;
1242         u8  test_type;
1243         u32 mask;
1244         u32 write;
1245 };
1246
1247 /* In the hardware, registers are laid out either singly, in arrays
1248  * spaced 0x40 bytes apart, or in contiguous tables.  We assume
1249  * most tests take place on arrays or single registers (handled
1250  * as a single-element array) and special-case the tables.
1251  * Table tests are always pattern tests.
1252  *
1253  * We also make provision for some required setup steps by specifying
1254  * registers to be written without any read-back testing.
1255  */
1256
1257 #define PATTERN_TEST    1
1258 #define SET_READ_TEST   2
1259 #define WRITE_NO_TEST   3
1260 #define TABLE32_TEST    4
1261 #define TABLE64_TEST_LO 5
1262 #define TABLE64_TEST_HI 6
1263
1264 /* default 82599 register test */
1265 static struct ixgbe_reg_test reg_test_82599[] = {
1266         { IXGBE_FCRTL_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1267         { IXGBE_FCRTH_82599(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1268         { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1269         { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1270         { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFF80 },
1271         { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1272         { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1273         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1274         { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1275         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1276         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1277         { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1278         { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1279         { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1280         { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFF80 },
1281         { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000001, 0x00000001 },
1282         { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1283         { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x8001FFFF, 0x800CFFFF },
1284         { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1285         { 0, 0, 0, 0 }
1286 };
1287
1288 /* default 82598 register test */
1289 static struct ixgbe_reg_test reg_test_82598[] = {
1290         { IXGBE_FCRTL(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1291         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1292         { IXGBE_PFCTOP, 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1293         { IXGBE_VLNCTRL, 1, PATTERN_TEST, 0x00000000, 0x00000000 },
1294         { IXGBE_RDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1295         { IXGBE_RDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1296         { IXGBE_RDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1297         /* Enable all four RX queues before testing. */
1298         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, IXGBE_RXDCTL_ENABLE },
1299         /* RDH is read-only for 82598, only test RDT. */
1300         { IXGBE_RDT(0), 4, PATTERN_TEST, 0x0000FFFF, 0x0000FFFF },
1301         { IXGBE_RXDCTL(0), 4, WRITE_NO_TEST, 0, 0 },
1302         { IXGBE_FCRTH(0), 1, PATTERN_TEST, 0x8007FFF0, 0x8007FFF0 },
1303         { IXGBE_FCTTV(0), 1, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1304         { IXGBE_TIPG, 1, PATTERN_TEST, 0x000000FF, 0x000000FF },
1305         { IXGBE_TDBAL(0), 4, PATTERN_TEST, 0xFFFFFF80, 0xFFFFFFFF },
1306         { IXGBE_TDBAH(0), 4, PATTERN_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1307         { IXGBE_TDLEN(0), 4, PATTERN_TEST, 0x000FFF80, 0x000FFFFF },
1308         { IXGBE_RXCTRL, 1, SET_READ_TEST, 0x00000003, 0x00000003 },
1309         { IXGBE_DTXCTL, 1, SET_READ_TEST, 0x00000005, 0x00000005 },
1310         { IXGBE_RAL(0), 16, TABLE64_TEST_LO, 0xFFFFFFFF, 0xFFFFFFFF },
1311         { IXGBE_RAL(0), 16, TABLE64_TEST_HI, 0x800CFFFF, 0x800CFFFF },
1312         { IXGBE_MTA(0), 128, TABLE32_TEST, 0xFFFFFFFF, 0xFFFFFFFF },
1313         { 0, 0, 0, 0 }
1314 };
1315
1316 #define REG_PATTERN_TEST(R, M, W)                                             \
1317 {                                                                             \
1318         u32 pat, val, before;                                                 \
1319         const u32 _test[] = {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; \
1320         for (pat = 0; pat < ARRAY_SIZE(_test); pat++) {                       \
1321                 before = readl(adapter->hw.hw_addr + R);                      \
1322                 writel((_test[pat] & W), (adapter->hw.hw_addr + R));          \
1323                 val = readl(adapter->hw.hw_addr + R);                         \
1324                 if (val != (_test[pat] & W & M)) {                            \
1325                         e_err(drv, "pattern test reg %04X failed: got "       \
1326                               "0x%08X expected 0x%08X\n",                     \
1327                                 R, val, (_test[pat] & W & M));                \
1328                         *data = R;                                            \
1329                         writel(before, adapter->hw.hw_addr + R);              \
1330                         return 1;                                             \
1331                 }                                                             \
1332                 writel(before, adapter->hw.hw_addr + R);                      \
1333         }                                                                     \
1334 }
1335
1336 #define REG_SET_AND_CHECK(R, M, W)                                            \
1337 {                                                                             \
1338         u32 val, before;                                                      \
1339         before = readl(adapter->hw.hw_addr + R);                              \
1340         writel((W & M), (adapter->hw.hw_addr + R));                           \
1341         val = readl(adapter->hw.hw_addr + R);                                 \
1342         if ((W & M) != (val & M)) {                                           \
1343                 e_err(drv, "set/check reg %04X test failed: got 0x%08X "      \
1344                       "expected 0x%08X\n", R, (val & M), (W & M));            \
1345                 *data = R;                                                    \
1346                 writel(before, (adapter->hw.hw_addr + R));                    \
1347                 return 1;                                                     \
1348         }                                                                     \
1349         writel(before, (adapter->hw.hw_addr + R));                            \
1350 }
1351
1352 static int ixgbe_reg_test(struct ixgbe_adapter *adapter, u64 *data)
1353 {
1354         struct ixgbe_reg_test *test;
1355         u32 value, status_before, status_after;
1356         u32 i, toggle;
1357
1358         switch (adapter->hw.mac.type) {
1359         case ixgbe_mac_82598EB:
1360                 toggle = 0x7FFFF3FF;
1361                 test = reg_test_82598;
1362                 break;
1363         case ixgbe_mac_82599EB:
1364         case ixgbe_mac_X540:
1365                 toggle = 0x7FFFF30F;
1366                 test = reg_test_82599;
1367                 break;
1368         default:
1369                 *data = 1;
1370                 return 1;
1371                 break;
1372         }
1373
1374         /*
1375          * Because the status register is such a special case,
1376          * we handle it separately from the rest of the register
1377          * tests.  Some bits are read-only, some toggle, and some
1378          * are writeable on newer MACs.
1379          */
1380         status_before = IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS);
1381         value = (IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS) & toggle);
1382         IXGBE_WRITE_REG(&adapter->hw, IXGBE_STATUS, toggle);
1383         status_after = IXGBE_READ_REG(&adapter->hw, IXGBE_STATUS) & toggle;
1384         if (value != status_after) {
1385                 e_err(drv, "failed STATUS register test got: "
1386                       "0x%08X expected: 0x%08X\n", status_after, value);
1387                 *data = 1;
1388                 return 1;
1389         }
1390         /* restore previous status */
1391         IXGBE_WRITE_REG(&adapter->hw, IXGBE_STATUS, status_before);
1392
1393         /*
1394          * Perform the remainder of the register test, looping through
1395          * the test table until we either fail or reach the null entry.
1396          */
1397         while (test->reg) {
1398                 for (i = 0; i < test->array_len; i++) {
1399                         switch (test->test_type) {
1400                         case PATTERN_TEST:
1401                                 REG_PATTERN_TEST(test->reg + (i * 0x40),
1402                                                 test->mask,
1403                                                 test->write);
1404                                 break;
1405                         case SET_READ_TEST:
1406                                 REG_SET_AND_CHECK(test->reg + (i * 0x40),
1407                                                 test->mask,
1408                                                 test->write);
1409                                 break;
1410                         case WRITE_NO_TEST:
1411                                 writel(test->write,
1412                                        (adapter->hw.hw_addr + test->reg)
1413                                        + (i * 0x40));
1414                                 break;
1415                         case TABLE32_TEST:
1416                                 REG_PATTERN_TEST(test->reg + (i * 4),
1417                                                 test->mask,
1418                                                 test->write);
1419                                 break;
1420                         case TABLE64_TEST_LO:
1421                                 REG_PATTERN_TEST(test->reg + (i * 8),
1422                                                 test->mask,
1423                                                 test->write);
1424                                 break;
1425                         case TABLE64_TEST_HI:
1426                                 REG_PATTERN_TEST((test->reg + 4) + (i * 8),
1427                                                 test->mask,
1428                                                 test->write);
1429                                 break;
1430                         }
1431                 }
1432                 test++;
1433         }
1434
1435         *data = 0;
1436         return 0;
1437 }
1438
1439 static int ixgbe_eeprom_test(struct ixgbe_adapter *adapter, u64 *data)
1440 {
1441         if (ixgbe_validate_eeprom_checksum(&adapter->hw, NULL))
1442                 *data = 1;
1443         else
1444                 *data = 0;
1445         return *data;
1446 }
1447
1448 static irqreturn_t ixgbe_test_intr(int irq, void *data)
1449 {
1450         struct net_device *netdev = data;
1451         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1452
1453         adapter->test_icr |= IXGBE_READ_REG(&adapter->hw, IXGBE_EICR);
1454
1455         return IRQ_HANDLED;
1456 }
1457
1458 static int ixgbe_intr_test(struct ixgbe_adapter *adapter, u64 *data)
1459 {
1460         struct net_device *netdev = adapter->netdev;
1461         u32 mask, i = 0, shared_int = true;
1462         u32 irq = adapter->pdev->irq;
1463
1464         *data = 0;
1465
1466         /* Hook up test interrupt handler just for this test */
1467         if (adapter->msix_entries) {
1468                 /* NOTE: we don't test MSI-X interrupts here, yet */
1469                 return 0;
1470         } else if (adapter->flags & IXGBE_FLAG_MSI_ENABLED) {
1471                 shared_int = false;
1472                 if (request_irq(irq, &ixgbe_test_intr, 0, netdev->name,
1473                                 netdev)) {
1474                         *data = 1;
1475                         return -1;
1476                 }
1477         } else if (!request_irq(irq, &ixgbe_test_intr, IRQF_PROBE_SHARED,
1478                                 netdev->name, netdev)) {
1479                 shared_int = false;
1480         } else if (request_irq(irq, &ixgbe_test_intr, IRQF_SHARED,
1481                                netdev->name, netdev)) {
1482                 *data = 1;
1483                 return -1;
1484         }
1485         e_info(hw, "testing %s interrupt\n",
1486                (shared_int ? "shared" : "unshared"));
1487
1488         /* Disable all the interrupts */
1489         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1490         IXGBE_WRITE_FLUSH(&adapter->hw);
1491         usleep_range(10000, 20000);
1492
1493         /* Test each interrupt */
1494         for (; i < 10; i++) {
1495                 /* Interrupt to test */
1496                 mask = 1 << i;
1497
1498                 if (!shared_int) {
1499                         /*
1500                          * Disable the interrupts to be reported in
1501                          * the cause register and then force the same
1502                          * interrupt and see if one gets posted.  If
1503                          * an interrupt was posted to the bus, the
1504                          * test failed.
1505                          */
1506                         adapter->test_icr = 0;
1507                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1508                                         ~mask & 0x00007FFF);
1509                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1510                                         ~mask & 0x00007FFF);
1511                         IXGBE_WRITE_FLUSH(&adapter->hw);
1512                         usleep_range(10000, 20000);
1513
1514                         if (adapter->test_icr & mask) {
1515                                 *data = 3;
1516                                 break;
1517                         }
1518                 }
1519
1520                 /*
1521                  * Enable the interrupt to be reported in the cause
1522                  * register and then force the same interrupt and see
1523                  * if one gets posted.  If an interrupt was not posted
1524                  * to the bus, the test failed.
1525                  */
1526                 adapter->test_icr = 0;
1527                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMS, mask);
1528                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS, mask);
1529                 IXGBE_WRITE_FLUSH(&adapter->hw);
1530                 usleep_range(10000, 20000);
1531
1532                 if (!(adapter->test_icr & mask)) {
1533                         *data = 4;
1534                         break;
1535                 }
1536
1537                 if (!shared_int) {
1538                         /*
1539                          * Disable the other interrupts to be reported in
1540                          * the cause register and then force the other
1541                          * interrupts and see if any get posted.  If
1542                          * an interrupt was posted to the bus, the
1543                          * test failed.
1544                          */
1545                         adapter->test_icr = 0;
1546                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC,
1547                                         ~mask & 0x00007FFF);
1548                         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EICS,
1549                                         ~mask & 0x00007FFF);
1550                         IXGBE_WRITE_FLUSH(&adapter->hw);
1551                         usleep_range(10000, 20000);
1552
1553                         if (adapter->test_icr) {
1554                                 *data = 5;
1555                                 break;
1556                         }
1557                 }
1558         }
1559
1560         /* Disable all the interrupts */
1561         IXGBE_WRITE_REG(&adapter->hw, IXGBE_EIMC, 0xFFFFFFFF);
1562         IXGBE_WRITE_FLUSH(&adapter->hw);
1563         usleep_range(10000, 20000);
1564
1565         /* Unhook test interrupt handler */
1566         free_irq(irq, netdev);
1567
1568         return *data;
1569 }
1570
1571
1572
1573 static int ixgbe_setup_loopback_test(struct ixgbe_adapter *adapter)
1574 {
1575         struct ixgbe_hw *hw = &adapter->hw;
1576         u32 reg_data;
1577
1578         /* X540 needs to set the MACC.FLU bit to force link up */
1579         if (adapter->hw.mac.type == ixgbe_mac_X540) {
1580                 reg_data = IXGBE_READ_REG(hw, IXGBE_MACC);
1581                 reg_data |= IXGBE_MACC_FLU;
1582                 IXGBE_WRITE_REG(hw, IXGBE_MACC, reg_data);
1583         }
1584
1585         /* right now we only support MAC loopback in the driver */
1586         reg_data = IXGBE_READ_REG(hw, IXGBE_HLREG0);
1587         /* Setup MAC loopback */
1588         reg_data |= IXGBE_HLREG0_LPBK;
1589         IXGBE_WRITE_REG(hw, IXGBE_HLREG0, reg_data);
1590
1591         reg_data = IXGBE_READ_REG(hw, IXGBE_FCTRL);
1592         reg_data |= IXGBE_FCTRL_BAM | IXGBE_FCTRL_SBP | IXGBE_FCTRL_MPE;
1593         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, reg_data);
1594
1595         reg_data = IXGBE_READ_REG(hw, IXGBE_AUTOC);
1596         reg_data &= ~IXGBE_AUTOC_LMS_MASK;
1597         reg_data |= IXGBE_AUTOC_LMS_10G_LINK_NO_AN | IXGBE_AUTOC_FLU;
1598         IXGBE_WRITE_REG(hw, IXGBE_AUTOC, reg_data);
1599         IXGBE_WRITE_FLUSH(hw);
1600         usleep_range(10000, 20000);
1601
1602         /* Disable Atlas Tx lanes; re-enabled in reset path */
1603         if (hw->mac.type == ixgbe_mac_82598EB) {
1604                 u8 atlas;
1605
1606                 ixgbe_read_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, &atlas);
1607                 atlas |= IXGBE_ATLAS_PDN_TX_REG_EN;
1608                 ixgbe_write_analog_reg8(hw, IXGBE_ATLAS_PDN_LPBK, atlas);
1609
1610                 ixgbe_read_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, &atlas);
1611                 atlas |= IXGBE_ATLAS_PDN_TX_10G_QL_ALL;
1612                 ixgbe_write_analog_reg8(hw, IXGBE_ATLAS_PDN_10G, atlas);
1613
1614                 ixgbe_read_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, &atlas);
1615                 atlas |= IXGBE_ATLAS_PDN_TX_1G_QL_ALL;
1616                 ixgbe_write_analog_reg8(hw, IXGBE_ATLAS_PDN_1G, atlas);
1617
1618                 ixgbe_read_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, &atlas);
1619                 atlas |= IXGBE_ATLAS_PDN_TX_AN_QL_ALL;
1620                 ixgbe_write_analog_reg8(hw, IXGBE_ATLAS_PDN_AN, atlas);
1621         }
1622
1623         return 0;
1624 }
1625
1626 static void ixgbe_loopback_cleanup(struct ixgbe_adapter *adapter)
1627 {
1628         u32 reg_data;
1629
1630         reg_data = IXGBE_READ_REG(&adapter->hw, IXGBE_HLREG0);
1631         reg_data &= ~IXGBE_HLREG0_LPBK;
1632         IXGBE_WRITE_REG(&adapter->hw, IXGBE_HLREG0, reg_data);
1633 }
1634
1635
1636
1637
1638
1639
1640 static int ixgbe_loopback_test(struct ixgbe_adapter *adapter, u64 *data)
1641 {
1642
1643         //*data = ixgbe_setup_desc_rings(adapter);
1644         //if (*data)
1645         //      goto out;
1646         *data = ixgbe_setup_loopback_test(adapter);
1647         if (*data)
1648                 goto err_loopback;
1649         //*data = ixgbe_run_loopback_test(adapter);
1650         ixgbe_loopback_cleanup(adapter);
1651
1652 err_loopback:
1653         //ixgbe_free_desc_rings(adapter);
1654 //out:
1655         return *data;
1656
1657 }
1658
1659 #ifndef HAVE_ETHTOOL_GET_SSET_COUNT
1660 static int ixgbe_diag_test_count(struct net_device *netdev)
1661 {
1662         return IXGBE_TEST_LEN;
1663 }
1664
1665 #endif /* HAVE_ETHTOOL_GET_SSET_COUNT */
1666 static void ixgbe_diag_test(struct net_device *netdev,
1667                             struct ethtool_test *eth_test, u64 *data)
1668 {
1669         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1670         bool if_running = netif_running(netdev);
1671
1672         set_bit(__IXGBE_TESTING, &adapter->state);
1673         if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1674                 /* Offline tests */
1675
1676                 e_info(hw, "offline testing starting\n");
1677
1678                 /* Link test performed before hardware reset so autoneg doesn't
1679                  * interfere with test result */
1680                 if (ixgbe_link_test(adapter, &data[4]))
1681                         eth_test->flags |= ETH_TEST_FL_FAILED;
1682
1683                 if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED) {
1684                         int i;
1685                         for (i = 0; i < adapter->num_vfs; i++) {
1686                                 if (adapter->vfinfo[i].clear_to_send) {
1687                                         e_warn(drv, "Please take active VFS "
1688                                                "offline and restart the "
1689                                                "adapter before running NIC "
1690                                                "diagnostics\n");
1691                                         data[0] = 1;
1692                                         data[1] = 1;
1693                                         data[2] = 1;
1694                                         data[3] = 1;
1695                                         eth_test->flags |= ETH_TEST_FL_FAILED;
1696                                         clear_bit(__IXGBE_TESTING,
1697                                                   &adapter->state);
1698                                         goto skip_ol_tests;
1699                                 }
1700                         }
1701                 }
1702
1703                 if (if_running)
1704                         /* indicate we're in test mode */
1705                         dev_close(netdev);
1706                 else
1707                         ixgbe_reset(adapter);
1708
1709                 e_info(hw, "register testing starting\n");
1710                 if (ixgbe_reg_test(adapter, &data[0]))
1711                         eth_test->flags |= ETH_TEST_FL_FAILED;
1712
1713                 ixgbe_reset(adapter);
1714                 e_info(hw, "eeprom testing starting\n");
1715                 if (ixgbe_eeprom_test(adapter, &data[1]))
1716                         eth_test->flags |= ETH_TEST_FL_FAILED;
1717
1718                 ixgbe_reset(adapter);
1719                 e_info(hw, "interrupt testing starting\n");
1720                 if (ixgbe_intr_test(adapter, &data[2]))
1721                         eth_test->flags |= ETH_TEST_FL_FAILED;
1722
1723                 /* If SRIOV or VMDq is enabled then skip MAC
1724                  * loopback diagnostic. */
1725                 if (adapter->flags & (IXGBE_FLAG_SRIOV_ENABLED |
1726                                       IXGBE_FLAG_VMDQ_ENABLED)) {
1727                         e_info(hw, "skip MAC loopback diagnostic in VT mode\n");
1728                         data[3] = 0;
1729                         goto skip_loopback;
1730                 }
1731
1732                 ixgbe_reset(adapter);
1733                 e_info(hw, "loopback testing starting\n");
1734                 if (ixgbe_loopback_test(adapter, &data[3]))
1735                         eth_test->flags |= ETH_TEST_FL_FAILED;
1736
1737 skip_loopback:
1738                 ixgbe_reset(adapter);
1739
1740                 clear_bit(__IXGBE_TESTING, &adapter->state);
1741                 if (if_running)
1742                         dev_open(netdev);
1743         } else {
1744                 e_info(hw, "online testing starting\n");
1745                 /* Online tests */
1746                 if (ixgbe_link_test(adapter, &data[4]))
1747                         eth_test->flags |= ETH_TEST_FL_FAILED;
1748
1749                 /* Online tests aren't run; pass by default */
1750                 data[0] = 0;
1751                 data[1] = 0;
1752                 data[2] = 0;
1753                 data[3] = 0;
1754
1755                 clear_bit(__IXGBE_TESTING, &adapter->state);
1756         }
1757 skip_ol_tests:
1758         msleep_interruptible(4 * 1000);
1759 }
1760
1761 static int ixgbe_wol_exclusion(struct ixgbe_adapter *adapter,
1762                                struct ethtool_wolinfo *wol)
1763 {
1764         struct ixgbe_hw *hw = &adapter->hw;
1765         int retval = 1;
1766         u16 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
1767
1768         /* WOL not supported except for the following */
1769         switch (hw->device_id) {
1770         case IXGBE_DEV_ID_82599_SFP:
1771                 /* Only these subdevice could supports WOL */
1772                 switch (hw->subsystem_device_id) {
1773                 case IXGBE_SUBDEV_ID_82599_560FLR:
1774                         /* only support first port */
1775                         if (hw->bus.func != 0) {
1776                                 wol->supported = 0;
1777                                 break;
1778                         }
1779                 case IXGBE_SUBDEV_ID_82599_SFP:
1780                         retval = 0;
1781                         break;
1782                 default:
1783                         wol->supported = 0;
1784                         break;
1785                 }
1786                 break;
1787         case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
1788                 /* All except this subdevice support WOL */
1789                 if (hw->subsystem_device_id ==
1790                     IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ) {
1791                         wol->supported = 0;
1792                         break;
1793                 }
1794                 retval = 0;
1795                 break;
1796         case IXGBE_DEV_ID_82599_KX4:
1797                 retval = 0;
1798                 break;
1799         case IXGBE_DEV_ID_X540T:
1800                 /* check eeprom to see if enabled wol */
1801                 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
1802                     ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
1803                      (hw->bus.func == 0))) {
1804                         retval = 0;
1805                         break;
1806                 }
1807
1808                 /* All others not supported */
1809                 wol->supported = 0;
1810                 break;
1811         default:
1812                 wol->supported = 0;
1813         }
1814         return retval;
1815 }
1816
1817 static void ixgbe_get_wol(struct net_device *netdev,
1818                           struct ethtool_wolinfo *wol)
1819 {
1820         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1821
1822         wol->supported = WAKE_UCAST | WAKE_MCAST |
1823                          WAKE_BCAST | WAKE_MAGIC;
1824         wol->wolopts = 0;
1825
1826         if (ixgbe_wol_exclusion(adapter, wol) ||
1827             !device_can_wakeup(&adapter->pdev->dev))
1828                 return;
1829
1830         if (adapter->wol & IXGBE_WUFC_EX)
1831                 wol->wolopts |= WAKE_UCAST;
1832         if (adapter->wol & IXGBE_WUFC_MC)
1833                 wol->wolopts |= WAKE_MCAST;
1834         if (adapter->wol & IXGBE_WUFC_BC)
1835                 wol->wolopts |= WAKE_BCAST;
1836         if (adapter->wol & IXGBE_WUFC_MAG)
1837                 wol->wolopts |= WAKE_MAGIC;
1838 }
1839
1840 static int ixgbe_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1841 {
1842         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1843
1844         if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
1845                 return -EOPNOTSUPP;
1846
1847         if (ixgbe_wol_exclusion(adapter, wol))
1848                 return wol->wolopts ? -EOPNOTSUPP : 0;
1849
1850         adapter->wol = 0;
1851
1852         if (wol->wolopts & WAKE_UCAST)
1853                 adapter->wol |= IXGBE_WUFC_EX;
1854         if (wol->wolopts & WAKE_MCAST)
1855                 adapter->wol |= IXGBE_WUFC_MC;
1856         if (wol->wolopts & WAKE_BCAST)
1857                 adapter->wol |= IXGBE_WUFC_BC;
1858         if (wol->wolopts & WAKE_MAGIC)
1859                 adapter->wol |= IXGBE_WUFC_MAG;
1860
1861         device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
1862
1863         return 0;
1864 }
1865
1866 static int ixgbe_nway_reset(struct net_device *netdev)
1867 {
1868         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1869
1870         if (netif_running(netdev))
1871                 ixgbe_reinit_locked(adapter);
1872
1873         return 0;
1874 }
1875
1876 #ifdef HAVE_ETHTOOL_SET_PHYS_ID
1877 static int ixgbe_set_phys_id(struct net_device *netdev,
1878                              enum ethtool_phys_id_state state)
1879 {
1880         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1881         struct ixgbe_hw *hw = &adapter->hw;
1882
1883         switch (state) {
1884         case ETHTOOL_ID_ACTIVE:
1885                 adapter->led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
1886                 return 2;
1887
1888         case ETHTOOL_ID_ON:
1889                 hw->mac.ops.led_on(hw, IXGBE_LED_ON);
1890                 break;
1891
1892         case ETHTOOL_ID_OFF:
1893                 hw->mac.ops.led_off(hw, IXGBE_LED_ON);
1894                 break;
1895
1896         case ETHTOOL_ID_INACTIVE:
1897                 /* Restore LED settings */
1898                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_LEDCTL, adapter->led_reg);
1899                 break;
1900         }
1901
1902         return 0;
1903 }
1904 #else
1905 static int ixgbe_phys_id(struct net_device *netdev, u32 data)
1906 {
1907         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1908         struct ixgbe_hw *hw = &adapter->hw;
1909         u32 led_reg = IXGBE_READ_REG(hw, IXGBE_LEDCTL);
1910         u32 i;
1911
1912         if (!data || data > 300)
1913                 data = 300;
1914
1915         for (i = 0; i < (data * 1000); i += 400) {
1916                 ixgbe_led_on(hw, IXGBE_LED_ON);
1917                 msleep_interruptible(200);
1918                 ixgbe_led_off(hw, IXGBE_LED_ON);
1919                 msleep_interruptible(200);
1920         }
1921
1922         /* Restore LED settings */
1923         IXGBE_WRITE_REG(hw, IXGBE_LEDCTL, led_reg);
1924
1925         return 0;
1926 }
1927 #endif /* HAVE_ETHTOOL_SET_PHYS_ID */
1928
1929 static int ixgbe_get_coalesce(struct net_device *netdev,
1930                               struct ethtool_coalesce *ec)
1931 {
1932         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1933
1934         ec->tx_max_coalesced_frames_irq = adapter->tx_work_limit;
1935 #ifndef CONFIG_IXGBE_NAPI
1936         ec->rx_max_coalesced_frames_irq = adapter->rx_work_limit;
1937 #endif /* CONFIG_IXGBE_NAPI */
1938         /* only valid if in constant ITR mode */
1939         if (adapter->rx_itr_setting <= 1)
1940                 ec->rx_coalesce_usecs = adapter->rx_itr_setting;
1941         else
1942                 ec->rx_coalesce_usecs = adapter->rx_itr_setting >> 2;
1943
1944         /* if in mixed tx/rx queues per vector mode, report only rx settings */
1945         if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count)
1946                 return 0;
1947
1948         /* only valid if in constant ITR mode */
1949         if (adapter->tx_itr_setting <= 1)
1950                 ec->tx_coalesce_usecs = adapter->tx_itr_setting;
1951         else
1952                 ec->tx_coalesce_usecs = adapter->tx_itr_setting >> 2;
1953
1954         return 0;
1955 }
1956
1957 /*
1958  * this function must be called before setting the new value of
1959  * rx_itr_setting
1960  */
1961 #ifdef NO_VNIC
1962 static bool ixgbe_update_rsc(struct ixgbe_adapter *adapter)
1963 {
1964         struct net_device *netdev = adapter->netdev;
1965
1966         /* nothing to do if LRO or RSC are not enabled */
1967         if (!(adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) ||
1968             !(netdev->features & NETIF_F_LRO))
1969                 return false;
1970
1971         /* check the feature flag value and enable RSC if necessary */
1972         if (adapter->rx_itr_setting == 1 ||
1973             adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
1974                 if (!(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
1975                         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
1976                         e_info(probe, "rx-usecs value high enough "
1977                                       "to re-enable RSC\n");
1978                         return true;
1979                 }
1980         /* if interrupt rate is too high then disable RSC */
1981         } else if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
1982                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
1983 #ifdef IXGBE_NO_LRO
1984                 e_info(probe, "rx-usecs set too low, disabling RSC\n");
1985 #else
1986                 e_info(probe, "rx-usecs set too low, "
1987                               "falling back to software LRO\n");
1988 #endif
1989                 return true;
1990         }
1991         return false;
1992 }
1993 #endif
1994
1995 static int ixgbe_set_coalesce(struct net_device *netdev,
1996                               struct ethtool_coalesce *ec)
1997 {
1998 #ifdef NO_VNIC
1999         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2000         struct ixgbe_q_vector *q_vector;
2001         int i;
2002         int num_vectors;
2003         u16 tx_itr_param, rx_itr_param;
2004         bool need_reset = false;
2005
2006         /* don't accept tx specific changes if we've got mixed RxTx vectors */
2007         if (adapter->q_vector[0]->tx.count && adapter->q_vector[0]->rx.count
2008             && ec->tx_coalesce_usecs)
2009                 return -EINVAL;
2010
2011         if (ec->tx_max_coalesced_frames_irq)
2012                 adapter->tx_work_limit = ec->tx_max_coalesced_frames_irq;
2013
2014 #ifndef CONFIG_IXGBE_NAPI
2015         if (ec->rx_max_coalesced_frames_irq)
2016                 adapter->rx_work_limit = ec->rx_max_coalesced_frames_irq;
2017
2018 #endif
2019         if ((ec->rx_coalesce_usecs > (IXGBE_MAX_EITR >> 2)) ||
2020             (ec->tx_coalesce_usecs > (IXGBE_MAX_EITR >> 2)))
2021                 return -EINVAL;
2022
2023         if (ec->rx_coalesce_usecs > 1)
2024                 adapter->rx_itr_setting = ec->rx_coalesce_usecs << 2;
2025         else
2026                 adapter->rx_itr_setting = ec->rx_coalesce_usecs;
2027
2028         if (adapter->rx_itr_setting == 1)
2029                 rx_itr_param = IXGBE_20K_ITR;
2030         else
2031                 rx_itr_param = adapter->rx_itr_setting;
2032
2033         if (ec->tx_coalesce_usecs > 1)
2034                 adapter->tx_itr_setting = ec->tx_coalesce_usecs << 2;
2035         else
2036                 adapter->tx_itr_setting = ec->tx_coalesce_usecs;
2037
2038         if (adapter->tx_itr_setting == 1)
2039                 tx_itr_param = IXGBE_10K_ITR;
2040         else
2041                 tx_itr_param = adapter->tx_itr_setting;
2042
2043         /* check the old value and enable RSC if necessary */
2044         need_reset = ixgbe_update_rsc(adapter);
2045
2046         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
2047                 num_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
2048         else
2049                 num_vectors = 1;
2050
2051         for (i = 0; i < num_vectors; i++) {
2052                 q_vector = adapter->q_vector[i];
2053                 q_vector->tx.work_limit = adapter->tx_work_limit;
2054                 q_vector->rx.work_limit = adapter->rx_work_limit;
2055                 if (q_vector->tx.count && !q_vector->rx.count)
2056                         /* tx only */
2057                         q_vector->itr = tx_itr_param;
2058                 else
2059                         /* rx only or mixed */
2060                         q_vector->itr = rx_itr_param;
2061                 ixgbe_write_eitr(q_vector);
2062         }
2063
2064         /*
2065          * do reset here at the end to make sure EITR==0 case is handled
2066          * correctly w.r.t stopping tx, and changing TXDCTL.WTHRESH settings
2067          * also locks in RSC enable/disable which requires reset
2068          */
2069         if (need_reset)
2070                 ixgbe_do_reset(netdev);
2071 #endif
2072         return 0;
2073 }
2074
2075 #ifndef HAVE_NDO_SET_FEATURES
2076 static u32 ixgbe_get_rx_csum(struct net_device *netdev)
2077 {
2078         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2079         struct ixgbe_ring *ring = adapter->rx_ring[0];
2080         return test_bit(__IXGBE_RX_CSUM_ENABLED, &ring->state);
2081 }
2082
2083 static int ixgbe_set_rx_csum(struct net_device *netdev, u32 data)
2084 {
2085         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2086         int i;
2087
2088         for (i = 0; i < adapter->num_rx_queues; i++) {
2089                 struct ixgbe_ring *ring = adapter->rx_ring[i];
2090                 if (data)
2091                         set_bit(__IXGBE_RX_CSUM_ENABLED, &ring->state);
2092                 else
2093                         clear_bit(__IXGBE_RX_CSUM_ENABLED, &ring->state);
2094         }
2095
2096         /* LRO and RSC both depend on RX checksum to function */
2097         if (!data && (netdev->features & NETIF_F_LRO)) {
2098                 netdev->features &= ~NETIF_F_LRO;
2099
2100                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
2101                         adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
2102                         ixgbe_do_reset(netdev);
2103                 }
2104         }
2105
2106         return 0;
2107 }
2108
2109 static u32 ixgbe_get_tx_csum(struct net_device *netdev)
2110 {
2111         return (netdev->features & NETIF_F_IP_CSUM) != 0;
2112 }
2113
2114 static int ixgbe_set_tx_csum(struct net_device *netdev, u32 data)
2115 {
2116         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2117         u32 feature_list;
2118
2119 #ifdef NETIF_F_IPV6_CSUM
2120         feature_list = NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
2121 #else
2122         feature_list = NETIF_F_IP_CSUM;
2123 #endif
2124         switch (adapter->hw.mac.type) {
2125         case ixgbe_mac_82599EB:
2126         case ixgbe_mac_X540:
2127                 feature_list |= NETIF_F_SCTP_CSUM;
2128                 break;
2129         default:
2130                 break;
2131         }
2132         if (data)
2133                 netdev->features |= feature_list;
2134         else
2135                 netdev->features &= ~feature_list;
2136
2137         return 0;
2138 }
2139
2140 #ifdef NETIF_F_TSO
2141 static int ixgbe_set_tso(struct net_device *netdev, u32 data)
2142 {
2143         if (data) {
2144                 netdev->features |= NETIF_F_TSO;
2145 #ifdef NETIF_F_TSO6
2146                 netdev->features |= NETIF_F_TSO6;
2147 #endif
2148         } else {
2149 #ifndef HAVE_NETDEV_VLAN_FEATURES
2150 #ifdef NETIF_F_HW_VLAN_TX
2151                 struct ixgbe_adapter *adapter = netdev_priv(netdev);
2152                 /* disable TSO on all VLANs if they're present */
2153                 if (adapter->vlgrp) {
2154                         int i;
2155                         struct net_device *v_netdev;
2156                         for (i = 0; i < VLAN_N_VID; i++) {
2157                                 v_netdev =
2158                                        vlan_group_get_device(adapter->vlgrp, i);
2159                                 if (v_netdev) {
2160                                         v_netdev->features &= ~NETIF_F_TSO;
2161 #ifdef NETIF_F_TSO6
2162                                         v_netdev->features &= ~NETIF_F_TSO6;
2163 #endif
2164                                         vlan_group_set_device(adapter->vlgrp, i,
2165                                                               v_netdev);
2166                                 }
2167                         }
2168                 }
2169 #endif
2170 #endif /* HAVE_NETDEV_VLAN_FEATURES */
2171                 netdev->features &= ~NETIF_F_TSO;
2172 #ifdef NETIF_F_TSO6
2173                 netdev->features &= ~NETIF_F_TSO6;
2174 #endif
2175         }
2176         return 0;
2177 }
2178
2179 #endif /* NETIF_F_TSO */
2180 #ifdef ETHTOOL_GFLAGS
2181 static int ixgbe_set_flags(struct net_device *netdev, u32 data)
2182 {
2183         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2184         u32 supported_flags = ETH_FLAG_RXVLAN | ETH_FLAG_TXVLAN;
2185         u32 changed = netdev->features ^ data;
2186         bool need_reset = false;
2187         int rc;
2188
2189 #ifndef HAVE_VLAN_RX_REGISTER
2190         if ((adapter->flags & IXGBE_FLAG_DCB_ENABLED) &&
2191             !(data & ETH_FLAG_RXVLAN))
2192                 return -EINVAL;
2193
2194 #endif
2195 #ifdef NETIF_F_RXHASH
2196         if (adapter->flags & IXGBE_FLAG_RSS_ENABLED)
2197                 supported_flags |= ETH_FLAG_RXHASH;
2198 #endif
2199 #ifdef IXGBE_NO_LRO
2200         if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
2201 #endif
2202                 supported_flags |= ETH_FLAG_LRO;
2203
2204 #ifdef ETHTOOL_GRXRINGS
2205         switch (adapter->hw.mac.type) {
2206         case ixgbe_mac_X540:
2207         case ixgbe_mac_82599EB:
2208                 supported_flags |= ETH_FLAG_NTUPLE;
2209         default:
2210                 break;
2211         }
2212
2213 #endif
2214         rc = ethtool_op_set_flags(netdev, data, supported_flags);
2215         if (rc)
2216                 return rc;
2217
2218 #ifndef HAVE_VLAN_RX_REGISTER
2219         if (changed & ETH_FLAG_RXVLAN)
2220                 ixgbe_vlan_mode(netdev, netdev->features);
2221
2222 #endif
2223         /* if state changes we need to update adapter->flags and reset */
2224         if (!(netdev->features & NETIF_F_LRO)) {
2225                 if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)
2226                         need_reset = true;
2227                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_ENABLED;
2228         } else if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
2229                    !(adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED)) {
2230                 if (adapter->rx_itr_setting == 1 ||
2231                     adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR) {
2232                         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
2233                         need_reset = true;
2234                 } else if (changed & ETH_FLAG_LRO) {
2235 #ifdef IXGBE_NO_LRO
2236                         e_info(probe, "rx-usecs set too low, "
2237                                "disabling RSC\n");
2238 #else
2239                         e_info(probe, "rx-usecs set too low, "
2240                                "falling back to software LRO\n");
2241 #endif
2242                 }
2243         }
2244
2245 #ifdef ETHTOOL_GRXRINGS
2246         /*
2247          * Check if Flow Director n-tuple support was enabled or disabled.  If
2248          * the state changed, we need to reset.
2249          */
2250         if (!(netdev->features & NETIF_F_NTUPLE)) {
2251                 if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
2252                         /* turn off Flow Director, set ATR and reset */
2253                         if ((adapter->flags & IXGBE_FLAG_RSS_ENABLED) &&
2254                             !(adapter->flags & IXGBE_FLAG_DCB_ENABLED))
2255                                 adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
2256                         need_reset = true;
2257                 }
2258                 adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
2259         } else if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)) {
2260                 /* turn off ATR, enable perfect filters and reset */
2261                 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
2262                 adapter->flags |= IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
2263                 need_reset = true;
2264         }
2265
2266 #endif /* ETHTOOL_GRXRINGS */
2267         if (need_reset)
2268                 ixgbe_do_reset(netdev);
2269
2270         return 0;
2271 }
2272
2273 #endif /* ETHTOOL_GFLAGS */
2274 #endif /* HAVE_NDO_SET_FEATURES */
2275 #ifdef ETHTOOL_GRXRINGS
2276 static int ixgbe_get_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2277                                         struct ethtool_rxnfc *cmd)
2278 {
2279         union ixgbe_atr_input *mask = &adapter->fdir_mask;
2280         struct ethtool_rx_flow_spec *fsp =
2281                 (struct ethtool_rx_flow_spec *)&cmd->fs;
2282         struct hlist_node *node, *node2;
2283         struct ixgbe_fdir_filter *rule = NULL;
2284
2285         /* report total rule count */
2286         cmd->data = (1024 << adapter->fdir_pballoc) - 2;
2287
2288         hlist_for_each_entry_safe(rule, node, node2,
2289                                   &adapter->fdir_filter_list, fdir_node) {
2290                 if (fsp->location <= rule->sw_idx)
2291                         break;
2292         }
2293
2294         if (!rule || fsp->location != rule->sw_idx)
2295                 return -EINVAL;
2296
2297         /* fill out the flow spec entry */
2298
2299         /* set flow type field */
2300         switch (rule->filter.formatted.flow_type) {
2301         case IXGBE_ATR_FLOW_TYPE_TCPV4:
2302                 fsp->flow_type = TCP_V4_FLOW;
2303                 break;
2304         case IXGBE_ATR_FLOW_TYPE_UDPV4:
2305                 fsp->flow_type = UDP_V4_FLOW;
2306                 break;
2307         case IXGBE_ATR_FLOW_TYPE_SCTPV4:
2308                 fsp->flow_type = SCTP_V4_FLOW;
2309                 break;
2310         case IXGBE_ATR_FLOW_TYPE_IPV4:
2311                 fsp->flow_type = IP_USER_FLOW;
2312                 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4;
2313                 fsp->h_u.usr_ip4_spec.proto = 0;
2314                 fsp->m_u.usr_ip4_spec.proto = 0;
2315                 break;
2316         default:
2317                 return -EINVAL;
2318         }
2319
2320         fsp->h_u.tcp_ip4_spec.psrc = rule->filter.formatted.src_port;
2321         fsp->m_u.tcp_ip4_spec.psrc = mask->formatted.src_port;
2322         fsp->h_u.tcp_ip4_spec.pdst = rule->filter.formatted.dst_port;
2323         fsp->m_u.tcp_ip4_spec.pdst = mask->formatted.dst_port;
2324         fsp->h_u.tcp_ip4_spec.ip4src = rule->filter.formatted.src_ip[0];
2325         fsp->m_u.tcp_ip4_spec.ip4src = mask->formatted.src_ip[0];
2326         fsp->h_u.tcp_ip4_spec.ip4dst = rule->filter.formatted.dst_ip[0];
2327         fsp->m_u.tcp_ip4_spec.ip4dst = mask->formatted.dst_ip[0];
2328         fsp->h_ext.vlan_tci = rule->filter.formatted.vlan_id;
2329         fsp->m_ext.vlan_tci = mask->formatted.vlan_id;
2330         fsp->h_ext.vlan_etype = rule->filter.formatted.flex_bytes;
2331         fsp->m_ext.vlan_etype = mask->formatted.flex_bytes;
2332         fsp->h_ext.data[1] = htonl(rule->filter.formatted.vm_pool);
2333         fsp->m_ext.data[1] = htonl(mask->formatted.vm_pool);
2334         fsp->flow_type |= FLOW_EXT;
2335
2336         /* record action */
2337         if (rule->action == IXGBE_FDIR_DROP_QUEUE)
2338                 fsp->ring_cookie = RX_CLS_FLOW_DISC;
2339         else
2340                 fsp->ring_cookie = rule->action;
2341
2342         return 0;
2343 }
2344
2345 static int ixgbe_get_ethtool_fdir_all(struct ixgbe_adapter *adapter,
2346                                       struct ethtool_rxnfc *cmd,
2347                                       u32 *rule_locs)
2348 {
2349         struct hlist_node *node, *node2;
2350         struct ixgbe_fdir_filter *rule;
2351         int cnt = 0;
2352
2353         /* report total rule count */
2354         cmd->data = (1024 << adapter->fdir_pballoc) - 2;
2355
2356         hlist_for_each_entry_safe(rule, node, node2,
2357                                   &adapter->fdir_filter_list, fdir_node) {
2358                 if (cnt == cmd->rule_cnt)
2359                         return -EMSGSIZE;
2360                 rule_locs[cnt] = rule->sw_idx;
2361                 cnt++;
2362         }
2363
2364         cmd->rule_cnt = cnt;
2365
2366         return 0;
2367 }
2368
2369 static int ixgbe_get_rss_hash_opts(struct ixgbe_adapter *adapter,
2370                                    struct ethtool_rxnfc *cmd)
2371 {
2372         cmd->data = 0;
2373
2374         /* if RSS is disabled then report no hashing */
2375         if (!(adapter->flags & IXGBE_FLAG_RSS_ENABLED))
2376                 return 0;
2377
2378         /* Report default options for RSS on ixgbe */
2379         switch (cmd->flow_type) {
2380         case TCP_V4_FLOW:
2381                 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2382         case UDP_V4_FLOW:
2383                 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
2384                         cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2385         case SCTP_V4_FLOW:
2386         case AH_ESP_V4_FLOW:
2387         case AH_V4_FLOW:
2388         case ESP_V4_FLOW:
2389         case IPV4_FLOW:
2390                 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2391                 break;
2392         case TCP_V6_FLOW:
2393                 cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2394         case UDP_V6_FLOW:
2395                 if (adapter->flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
2396                         cmd->data |= RXH_L4_B_0_1 | RXH_L4_B_2_3;
2397         case SCTP_V6_FLOW:
2398         case AH_ESP_V6_FLOW:
2399         case AH_V6_FLOW:
2400         case ESP_V6_FLOW:
2401         case IPV6_FLOW:
2402                 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2403                 break;
2404         default:
2405                 return -EINVAL;
2406         }
2407
2408         return 0;
2409 }
2410
2411 static int ixgbe_get_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd,
2412 #ifdef HAVE_ETHTOOL_GET_RXNFC_VOID_RULE_LOCS
2413                            void *rule_locs)
2414 #else
2415                            u32 *rule_locs)
2416 #endif
2417 {
2418         struct ixgbe_adapter *adapter = netdev_priv(dev);
2419         int ret = -EOPNOTSUPP;
2420
2421         switch (cmd->cmd) {
2422         case ETHTOOL_GRXRINGS:
2423                 cmd->data = adapter->num_rx_queues;
2424                 ret = 0;
2425                 break;
2426         case ETHTOOL_GRXCLSRLCNT:
2427                 cmd->rule_cnt = adapter->fdir_filter_count;
2428                 ret = 0;
2429                 break;
2430         case ETHTOOL_GRXCLSRULE:
2431                 ret = ixgbe_get_ethtool_fdir_entry(adapter, cmd);
2432                 break;
2433         case ETHTOOL_GRXCLSRLALL:
2434                 ret = ixgbe_get_ethtool_fdir_all(adapter, cmd,
2435                                                  rule_locs);
2436                 break;
2437         case ETHTOOL_GRXFH:
2438                 ret = ixgbe_get_rss_hash_opts(adapter, cmd);
2439                 break;
2440         default:
2441                 break;
2442         }
2443
2444         return ret;
2445 }
2446
2447 static int ixgbe_update_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2448                                            struct ixgbe_fdir_filter *input,
2449                                            u16 sw_idx)
2450 {
2451         struct ixgbe_hw *hw = &adapter->hw;
2452         struct hlist_node *node, *node2, *parent;
2453         struct ixgbe_fdir_filter *rule;
2454         int err = -EINVAL;
2455
2456         parent = NULL;
2457         rule = NULL;
2458
2459         hlist_for_each_entry_safe(rule, node, node2,
2460                                   &adapter->fdir_filter_list, fdir_node) {
2461                 /* hash found, or no matching entry */
2462                 if (rule->sw_idx >= sw_idx)
2463                         break;
2464                 parent = node;
2465         }
2466
2467         /* if there is an old rule occupying our place remove it */
2468         if (rule && (rule->sw_idx == sw_idx)) {
2469                 if (!input || (rule->filter.formatted.bkt_hash !=
2470                                input->filter.formatted.bkt_hash)) {
2471                         err = ixgbe_fdir_erase_perfect_filter_82599(hw,
2472                                                                 &rule->filter,
2473                                                                 sw_idx);
2474                 }
2475
2476                 hlist_del(&rule->fdir_node);
2477                 kfree(rule);
2478                 adapter->fdir_filter_count--;
2479         }
2480
2481         /*
2482          * If no input this was a delete, err should be 0 if a rule was
2483          * successfully found and removed from the list else -EINVAL
2484          */
2485         if (!input)
2486                 return err;
2487
2488         /* initialize node and set software index */
2489         INIT_HLIST_NODE(&input->fdir_node);
2490
2491         /* add filter to the list */
2492         if (parent)
2493                 hlist_add_after(parent, &input->fdir_node);
2494         else
2495                 hlist_add_head(&input->fdir_node,
2496                                &adapter->fdir_filter_list);
2497
2498         /* update counts */
2499         adapter->fdir_filter_count++;
2500
2501         return 0;
2502 }
2503
2504 static int ixgbe_flowspec_to_flow_type(struct ethtool_rx_flow_spec *fsp,
2505                                        u8 *flow_type)
2506 {
2507         switch (fsp->flow_type & ~FLOW_EXT) {
2508         case TCP_V4_FLOW:
2509                 *flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
2510                 break;
2511         case UDP_V4_FLOW:
2512                 *flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4;
2513                 break;
2514         case SCTP_V4_FLOW:
2515                 *flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4;
2516                 break;
2517         case IP_USER_FLOW:
2518                 switch (fsp->h_u.usr_ip4_spec.proto) {
2519                 case IPPROTO_TCP:
2520                         *flow_type = IXGBE_ATR_FLOW_TYPE_TCPV4;
2521                         break;
2522                 case IPPROTO_UDP:
2523                         *flow_type = IXGBE_ATR_FLOW_TYPE_UDPV4;
2524                         break;
2525                 case IPPROTO_SCTP:
2526                         *flow_type = IXGBE_ATR_FLOW_TYPE_SCTPV4;
2527                         break;
2528                 case 0:
2529                         if (!fsp->m_u.usr_ip4_spec.proto) {
2530                                 *flow_type = IXGBE_ATR_FLOW_TYPE_IPV4;
2531                                 break;
2532                         }
2533                 default:
2534                         return 0;
2535                 }
2536                 break;
2537         default:
2538                 return 0;
2539         }
2540
2541         return 1;
2542 }
2543
2544 static int ixgbe_add_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2545                                         struct ethtool_rxnfc *cmd)
2546 {
2547         struct ethtool_rx_flow_spec *fsp =
2548                 (struct ethtool_rx_flow_spec *)&cmd->fs;
2549         struct ixgbe_hw *hw = &adapter->hw;
2550         struct ixgbe_fdir_filter *input;
2551         union ixgbe_atr_input mask;
2552         int err;
2553
2554         if (!(adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE))
2555                 return -EOPNOTSUPP;
2556
2557         /*
2558          * Don't allow programming if the action is a queue greater than
2559          * the number of online Rx queues.
2560          */
2561         if ((fsp->ring_cookie != RX_CLS_FLOW_DISC) &&
2562             (fsp->ring_cookie >= adapter->num_rx_queues))
2563                 return -EINVAL;
2564
2565         /* Don't allow indexes to exist outside of available space */
2566         if (fsp->location >= ((1024 << adapter->fdir_pballoc) - 2)) {
2567                 e_err(drv, "Location out of range\n");
2568                 return -EINVAL;
2569         }
2570
2571         input = kzalloc(sizeof(*input), GFP_ATOMIC);
2572         if (!input)
2573                 return -ENOMEM;
2574
2575         memset(&mask, 0, sizeof(union ixgbe_atr_input));
2576
2577         /* set SW index */
2578         input->sw_idx = fsp->location;
2579
2580         /* record flow type */
2581         if (!ixgbe_flowspec_to_flow_type(fsp,
2582                                          &input->filter.formatted.flow_type)) {
2583                 e_err(drv, "Unrecognized flow type\n");
2584                 goto err_out;
2585         }
2586
2587         mask.formatted.flow_type = IXGBE_ATR_L4TYPE_IPV6_MASK |
2588                                    IXGBE_ATR_L4TYPE_MASK;
2589
2590         if (input->filter.formatted.flow_type == IXGBE_ATR_FLOW_TYPE_IPV4)
2591                 mask.formatted.flow_type &= IXGBE_ATR_L4TYPE_IPV6_MASK;
2592
2593         /* Copy input into formatted structures */
2594         input->filter.formatted.src_ip[0] = fsp->h_u.tcp_ip4_spec.ip4src;
2595         mask.formatted.src_ip[0] = fsp->m_u.tcp_ip4_spec.ip4src;
2596         input->filter.formatted.dst_ip[0] = fsp->h_u.tcp_ip4_spec.ip4dst;
2597         mask.formatted.dst_ip[0] = fsp->m_u.tcp_ip4_spec.ip4dst;
2598         input->filter.formatted.src_port = fsp->h_u.tcp_ip4_spec.psrc;
2599         mask.formatted.src_port = fsp->m_u.tcp_ip4_spec.psrc;
2600         input->filter.formatted.dst_port = fsp->h_u.tcp_ip4_spec.pdst;
2601         mask.formatted.dst_port = fsp->m_u.tcp_ip4_spec.pdst;
2602
2603         if (fsp->flow_type & FLOW_EXT) {
2604                 input->filter.formatted.vm_pool =
2605                                 (unsigned char)ntohl(fsp->h_ext.data[1]);
2606                 mask.formatted.vm_pool =
2607                                 (unsigned char)ntohl(fsp->m_ext.data[1]);
2608                 input->filter.formatted.vlan_id = fsp->h_ext.vlan_tci;
2609                 mask.formatted.vlan_id = fsp->m_ext.vlan_tci;
2610                 input->filter.formatted.flex_bytes =
2611                                                 fsp->h_ext.vlan_etype;
2612                 mask.formatted.flex_bytes = fsp->m_ext.vlan_etype;
2613         }
2614
2615         /* determine if we need to drop or route the packet */
2616         if (fsp->ring_cookie == RX_CLS_FLOW_DISC)
2617                 input->action = IXGBE_FDIR_DROP_QUEUE;
2618         else
2619                 input->action = fsp->ring_cookie;
2620
2621         spin_lock(&adapter->fdir_perfect_lock);
2622
2623         if (hlist_empty(&adapter->fdir_filter_list)) {
2624                 /* save mask and program input mask into HW */
2625                 memcpy(&adapter->fdir_mask, &mask, sizeof(mask));
2626                 err = ixgbe_fdir_set_input_mask_82599(hw, &mask);
2627                 if (err) {
2628                         e_err(drv, "Error writing mask\n");
2629                         goto err_out_w_lock;
2630                 }
2631         } else if (memcmp(&adapter->fdir_mask, &mask, sizeof(mask))) {
2632                 e_err(drv, "Only one mask supported per port\n");
2633                 goto err_out_w_lock;
2634         }
2635
2636         /* apply mask and compute/store hash */
2637         ixgbe_atr_compute_perfect_hash_82599(&input->filter, &mask);
2638
2639         /* program filters to filter memory */
2640         err = ixgbe_fdir_write_perfect_filter_82599(hw,
2641                                 &input->filter, input->sw_idx,
2642                                 (input->action == IXGBE_FDIR_DROP_QUEUE) ?
2643                                 IXGBE_FDIR_DROP_QUEUE :
2644                                 adapter->rx_ring[input->action]->reg_idx);
2645         if (err)
2646                 goto err_out_w_lock;
2647
2648         ixgbe_update_ethtool_fdir_entry(adapter, input, input->sw_idx);
2649
2650         spin_unlock(&adapter->fdir_perfect_lock);
2651
2652         kfree(input);
2653         return err;
2654 err_out_w_lock:
2655         spin_unlock(&adapter->fdir_perfect_lock);
2656 err_out:
2657         kfree(input);
2658         return -EINVAL;
2659 }
2660
2661 static int ixgbe_del_ethtool_fdir_entry(struct ixgbe_adapter *adapter,
2662                                         struct ethtool_rxnfc *cmd)
2663 {
2664         struct ethtool_rx_flow_spec *fsp =
2665                 (struct ethtool_rx_flow_spec *)&cmd->fs;
2666         int err;
2667
2668         spin_lock(&adapter->fdir_perfect_lock);
2669         err = ixgbe_update_ethtool_fdir_entry(adapter, NULL, (u16)(fsp->location));
2670         spin_unlock(&adapter->fdir_perfect_lock);
2671
2672         return err;
2673 }
2674
2675 #ifdef ETHTOOL_SRXNTUPLE
2676 /*
2677  * We need to keep this around for kernels 2.6.33 - 2.6.39 in order to avoid
2678  * a null pointer dereference as it was assumend if the NETIF_F_NTUPLE flag
2679  * was defined that this function was present.
2680  */
2681 static int ixgbe_set_rx_ntuple(struct net_device *dev,
2682                                struct ethtool_rx_ntuple *cmd)
2683 {
2684         return -EOPNOTSUPP;
2685 }
2686
2687 #endif
2688 #define UDP_RSS_FLAGS (IXGBE_FLAG2_RSS_FIELD_IPV4_UDP | \
2689                        IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
2690 static int ixgbe_set_rss_hash_opt(struct ixgbe_adapter *adapter,
2691                                   struct ethtool_rxnfc *nfc)
2692 {
2693         u32 flags2 = adapter->flags2;
2694
2695         /*
2696          * RSS does not support anything other than hashing
2697          * to queues on src and dst IPs and ports
2698          */
2699         if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST |
2700                           RXH_L4_B_0_1 | RXH_L4_B_2_3))
2701                 return -EINVAL;
2702
2703         switch (nfc->flow_type) {
2704         case TCP_V4_FLOW:
2705         case TCP_V6_FLOW:
2706                 if (!(nfc->data & RXH_IP_SRC) ||
2707                     !(nfc->data & RXH_IP_DST) ||
2708                     !(nfc->data & RXH_L4_B_0_1) ||
2709                     !(nfc->data & RXH_L4_B_2_3))
2710                         return -EINVAL;
2711                 break;
2712         case UDP_V4_FLOW:
2713                 if (!(nfc->data & RXH_IP_SRC) ||
2714                     !(nfc->data & RXH_IP_DST))
2715                         return -EINVAL;
2716                 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2717                 case 0:
2718                         flags2 &= ~IXGBE_FLAG2_RSS_FIELD_IPV4_UDP;
2719                         break;
2720                 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2721                         flags2 |= IXGBE_FLAG2_RSS_FIELD_IPV4_UDP;
2722                         break;
2723                 default:
2724                         return -EINVAL;
2725                 }
2726                 break;
2727         case UDP_V6_FLOW:
2728                 if (!(nfc->data & RXH_IP_SRC) ||
2729                     !(nfc->data & RXH_IP_DST))
2730                         return -EINVAL;
2731                 switch (nfc->data & (RXH_L4_B_0_1 | RXH_L4_B_2_3)) {
2732                 case 0:
2733                         flags2 &= ~IXGBE_FLAG2_RSS_FIELD_IPV6_UDP;
2734                         break;
2735                 case (RXH_L4_B_0_1 | RXH_L4_B_2_3):
2736                         flags2 |= IXGBE_FLAG2_RSS_FIELD_IPV6_UDP;
2737                         break;
2738                 default:
2739                         return -EINVAL;
2740                 }
2741                 break;
2742         case AH_ESP_V4_FLOW:
2743         case AH_V4_FLOW:
2744         case ESP_V4_FLOW:
2745         case SCTP_V4_FLOW:
2746         case AH_ESP_V6_FLOW:
2747         case AH_V6_FLOW:
2748         case ESP_V6_FLOW:
2749         case SCTP_V6_FLOW:
2750                 if (!(nfc->data & RXH_IP_SRC) ||
2751                     !(nfc->data & RXH_IP_DST) ||
2752                     (nfc->data & RXH_L4_B_0_1) ||
2753                     (nfc->data & RXH_L4_B_2_3))
2754                         return -EINVAL;
2755                 break;
2756         default:
2757                 return -EINVAL;
2758         }
2759
2760         /* if we changed something we need to update flags */
2761         if (flags2 != adapter->flags2) {
2762                 struct ixgbe_hw *hw = &adapter->hw;
2763                 u32 mrqc = IXGBE_READ_REG(hw, IXGBE_MRQC);
2764
2765                 if ((flags2 & UDP_RSS_FLAGS) &&
2766                     !(adapter->flags2 & UDP_RSS_FLAGS))
2767                         e_warn(drv, "enabling UDP RSS: fragmented packets"
2768                                " may arrive out of order to the stack above\n");
2769
2770                 adapter->flags2 = flags2;
2771
2772                 /* Perform hash on these packet types */
2773                 mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4
2774                       | IXGBE_MRQC_RSS_FIELD_IPV4_TCP
2775                       | IXGBE_MRQC_RSS_FIELD_IPV6
2776                       | IXGBE_MRQC_RSS_FIELD_IPV6_TCP;
2777
2778                 mrqc &= ~(IXGBE_MRQC_RSS_FIELD_IPV4_UDP |
2779                           IXGBE_MRQC_RSS_FIELD_IPV6_UDP);
2780
2781                 if (flags2 & IXGBE_FLAG2_RSS_FIELD_IPV4_UDP)
2782                         mrqc |= IXGBE_MRQC_RSS_FIELD_IPV4_UDP;
2783
2784                 if (flags2 & IXGBE_FLAG2_RSS_FIELD_IPV6_UDP)
2785                         mrqc |= IXGBE_MRQC_RSS_FIELD_IPV6_UDP;
2786
2787                 IXGBE_WRITE_REG(hw, IXGBE_MRQC, mrqc);
2788         }
2789
2790         return 0;
2791 }
2792
2793 static int ixgbe_set_rxnfc(struct net_device *dev, struct ethtool_rxnfc *cmd)
2794 {
2795         struct ixgbe_adapter *adapter = netdev_priv(dev);
2796         int ret = -EOPNOTSUPP;
2797
2798         switch (cmd->cmd) {
2799         case ETHTOOL_SRXCLSRLINS:
2800                 ret = ixgbe_add_ethtool_fdir_entry(adapter, cmd);
2801                 break;
2802         case ETHTOOL_SRXCLSRLDEL:
2803                 ret = ixgbe_del_ethtool_fdir_entry(adapter, cmd);
2804                 break;
2805         case ETHTOOL_SRXFH:
2806                 ret = ixgbe_set_rss_hash_opt(adapter, cmd);
2807                 break;
2808         default:
2809                 break;
2810         }
2811
2812         return ret;
2813 }
2814
2815 #endif /* ETHTOOL_GRXRINGS */
2816 //static
2817 struct ethtool_ops ixgbe_ethtool_ops = {
2818         .get_settings           = ixgbe_get_settings,
2819         .set_settings           = ixgbe_set_settings,
2820         .get_drvinfo            = ixgbe_get_drvinfo,
2821         .get_regs_len           = ixgbe_get_regs_len,
2822         .get_regs               = ixgbe_get_regs,
2823         .get_wol                = ixgbe_get_wol,
2824         .set_wol                = ixgbe_set_wol,
2825         .nway_reset             = ixgbe_nway_reset,
2826         .get_link               = ethtool_op_get_link,
2827         .get_eeprom_len         = ixgbe_get_eeprom_len,
2828         .get_eeprom             = ixgbe_get_eeprom,
2829         .set_eeprom             = ixgbe_set_eeprom,
2830         .get_ringparam          = ixgbe_get_ringparam,
2831         .set_ringparam          = ixgbe_set_ringparam,
2832         .get_pauseparam         = ixgbe_get_pauseparam,
2833         .set_pauseparam         = ixgbe_set_pauseparam,
2834         .get_msglevel           = ixgbe_get_msglevel,
2835         .set_msglevel           = ixgbe_set_msglevel,
2836 #ifndef HAVE_ETHTOOL_GET_SSET_COUNT
2837         .self_test_count        = ixgbe_diag_test_count,
2838 #endif /* HAVE_ETHTOOL_GET_SSET_COUNT */
2839         .self_test              = ixgbe_diag_test,
2840         .get_strings            = ixgbe_get_strings,
2841 #ifdef HAVE_ETHTOOL_SET_PHYS_ID
2842         .set_phys_id            = ixgbe_set_phys_id,
2843 #else
2844         .phys_id                = ixgbe_phys_id,
2845 #endif /* HAVE_ETHTOOL_SET_PHYS_ID */
2846 #ifndef HAVE_ETHTOOL_GET_SSET_COUNT
2847         .get_stats_count        = ixgbe_get_stats_count,
2848 #else /* HAVE_ETHTOOL_GET_SSET_COUNT */
2849         .get_sset_count         = ixgbe_get_sset_count,
2850 #endif /* HAVE_ETHTOOL_GET_SSET_COUNT */
2851         .get_ethtool_stats      = ixgbe_get_ethtool_stats,
2852 #ifdef HAVE_ETHTOOL_GET_PERM_ADDR
2853         .get_perm_addr          = ethtool_op_get_perm_addr,
2854 #endif
2855         .get_coalesce           = ixgbe_get_coalesce,
2856         .set_coalesce           = ixgbe_set_coalesce,
2857 #ifndef HAVE_NDO_SET_FEATURES
2858         .get_rx_csum            = ixgbe_get_rx_csum,
2859         .set_rx_csum            = ixgbe_set_rx_csum,
2860         .get_tx_csum            = ixgbe_get_tx_csum,
2861         .set_tx_csum            = ixgbe_set_tx_csum,
2862         .get_sg                 = ethtool_op_get_sg,
2863         .set_sg                 = ethtool_op_set_sg,
2864 #ifdef NETIF_F_TSO
2865         .get_tso                = ethtool_op_get_tso,
2866         .set_tso                = ixgbe_set_tso,
2867 #endif
2868 #ifdef ETHTOOL_GFLAGS
2869         .get_flags              = ethtool_op_get_flags,
2870         .set_flags              = ixgbe_set_flags,
2871 #endif
2872 #endif /* HAVE_NDO_SET_FEATURES */
2873 #ifdef ETHTOOL_GRXRINGS
2874         .get_rxnfc              = ixgbe_get_rxnfc,
2875         .set_rxnfc              = ixgbe_set_rxnfc,
2876 #ifdef ETHTOOL_SRXNTUPLE
2877         .set_rx_ntuple          = ixgbe_set_rx_ntuple,
2878 #endif
2879 #endif
2880 };
2881
2882 void ixgbe_set_ethtool_ops(struct net_device *netdev)
2883 {
2884         SET_ETHTOOL_OPS(netdev, &ixgbe_ethtool_ops);
2885 }
2886 #endif /* SIOCETHTOOL */