lib/librte_eal/linuxapp/kni/ethtool/ixgbe/ixgbe_main.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*******************************************************************************
   3
   4   Intel 10 Gigabit PCI Express Linux driver
   5   Copyright(c) 1999 - 2012 Intel Corporation.
   6
   7   Contact Information:
   8   e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
   9   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  10
  11 *******************************************************************************/
  12
  13 /******************************************************************************
  14  Copyright (c)2006 - 2007 Myricom, Inc. for some LRO specific code
  15 ******************************************************************************/
  16 #include <linux/types.h>
  17 #include <linux/module.h>
  18 #include <linux/pci.h>
  19 #include <linux/netdevice.h>
  20 #include <linux/vmalloc.h>
  21 #include <linux/highmem.h>
  22 #include <linux/string.h>
  23 #include <linux/in.h>
  24 #include <linux/ip.h>
  25 #include <linux/tcp.h>
  26 #ifdef HAVE_SCTP
  27 #include <linux/sctp.h>
  28 #endif
  29 #include <linux/pkt_sched.h>
  30 #include <linux/ipv6.h>
  31 #ifdef NETIF_F_TSO
  32 #include <net/checksum.h>
  33 #ifdef NETIF_F_TSO6
  34 #include <net/ip6_checksum.h>
  35 #endif
  36 #endif
  37 #ifdef SIOCETHTOOL
  38 #include <linux/ethtool.h>
  39 #endif
  40
  41 #include "ixgbe.h"
  42
  43 #undef CONFIG_DCA
  44 #undef CONFIG_DCA_MODULE
  45
  46 char ixgbe_driver_name[] = "ixgbe";
  47 #define DRV_HW_PERF
  48
  49 #ifndef CONFIG_IXGBE_NAPI
  50 #define DRIVERNAPI
  51 #else
  52 #define DRIVERNAPI "-NAPI"
  53 #endif
  54
  55 #define FPGA
  56
  57 #define VMDQ_TAG
  58
  59 #define MAJ 3
  60 #define MIN 9
  61 #define BUILD 17
  62 #define DRV_VERSION     __stringify(MAJ) "." __stringify(MIN) "." \
  63                         __stringify(BUILD) DRIVERNAPI DRV_HW_PERF FPGA VMDQ_TAG
  64 const char ixgbe_driver_version[] = DRV_VERSION;
  65
  66 /* ixgbe_pci_tbl - PCI Device ID Table
  67  *
  68  * Wildcard entries (PCI_ANY_ID) should come last
  69  * Last entry must be all 0s
  70  *
  71  * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  72  *   Class, Class Mask, private data (not used) }
  73  */
  74 const struct pci_device_id ixgbe_pci_tbl[] = {
  75         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598)},
  76         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_DUAL_PORT)},
  77         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AF_SINGLE_PORT)},
  78         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT)},
  79         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598AT2)},
  80         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_CX4)},
  81         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_CX4_DUAL_PORT)},
  82         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_DA_DUAL_PORT)},
  83         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_SR_DUAL_PORT_EM)},
  84         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_XF_LR)},
  85         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598EB_SFP_LOM)},
  86         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82598_BX)},
  87         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4)},
  88         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_XAUI_LOM)},
  89         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KR)},
  90         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP)},
  91         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_EM)},
  92         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_KX4_MEZZ)},
  93         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_CX4)},
  94         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_BACKPLANE_FCOE)},
  95         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_FCOE)},
  96         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_T3_LOM)},
  97         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_COMBO_BACKPLANE)},
  98         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_X540T)},
  99         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_SFP_SF2)},
 100         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_LS)},
 101         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599EN_SFP)},
 102         {PCI_VDEVICE(INTEL, IXGBE_DEV_ID_82599_QSFP_SF_QP)},
 103         /* required last entry */
 104         {0, }
 105 };
 106
 107 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
 108 static int ixgbe_notify_dca(struct notifier_block *, unsigned long event,
 109                             void *p);
 110 static struct notifier_block dca_notifier = {
 111         .notifier_call  = ixgbe_notify_dca,
 112         .next           = NULL,
 113         .priority       = 0
 114 };
 115
 116 #endif
 117 MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
 118 MODULE_DESCRIPTION("Intel(R) 10 Gigabit PCI Express Network Driver");
 119 MODULE_LICENSE("GPL");
 120 MODULE_VERSION(DRV_VERSION);
 121
 122 #define DEFAULT_DEBUG_LEVEL_SHIFT 3
 123
 124
 125 static void ixgbe_release_hw_control(struct ixgbe_adapter *adapter)
 126 {
 127         u32 ctrl_ext;
 128
 129         /* Let firmware take over control of h/w */
 130         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 131         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 132                         ctrl_ext & ~IXGBE_CTRL_EXT_DRV_LOAD);
 133 }
 134
 135 #ifdef NO_VNIC
 136 static void ixgbe_get_hw_control(struct ixgbe_adapter *adapter)
 137 {
 138         u32 ctrl_ext;
 139
 140         /* Let firmware know the driver has taken over */
 141         ctrl_ext = IXGBE_READ_REG(&adapter->hw, IXGBE_CTRL_EXT);
 142         IXGBE_WRITE_REG(&adapter->hw, IXGBE_CTRL_EXT,
 143                         ctrl_ext | IXGBE_CTRL_EXT_DRV_LOAD);
 144 }
 145 #endif
 146
 147
 148 static void ixgbe_update_xoff_rx_lfc(struct ixgbe_adapter *adapter)
 149 {
 150         struct ixgbe_hw *hw = &adapter->hw;
 151         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 152         int i;
 153         u32 data;
 154
 155         if ((hw->fc.current_mode != ixgbe_fc_full) &&
 156             (hw->fc.current_mode != ixgbe_fc_rx_pause))
 157                 return;
 158
 159         switch (hw->mac.type) {
 160         case ixgbe_mac_82598EB:
 161                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXC);
 162                 break;
 163         default:
 164                 data = IXGBE_READ_REG(hw, IXGBE_LXOFFRXCNT);
 165         }
 166         hwstats->lxoffrxc += data;
 167
 168         /* refill credits (no tx hang) if we received xoff */
 169         if (!data)
 170                 return;
 171
 172         for (i = 0; i < adapter->num_tx_queues; i++)
 173                 clear_bit(__IXGBE_HANG_CHECK_ARMED,
 174                           &adapter->tx_ring[i]->state);
 175 }
 176
 177 static void ixgbe_update_xoff_received(struct ixgbe_adapter *adapter)
 178 {
 179         struct ixgbe_hw *hw = &adapter->hw;
 180         struct ixgbe_hw_stats *hwstats = &adapter->stats;
 181         u32 xoff[8] = {0};
 182         int i;
 183         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
 184
 185 #ifdef HAVE_DCBNL_IEEE
 186         if (adapter->ixgbe_ieee_pfc)
 187                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
 188
 189 #endif
 190         if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED) || !pfc_en) {
 191                 ixgbe_update_xoff_rx_lfc(adapter);
 192                 return;
 193         }
 194
 195         /* update stats for each tc, only valid with PFC enabled */
 196         for (i = 0; i < MAX_TX_PACKET_BUFFERS; i++) {
 197                 switch (hw->mac.type) {
 198                 case ixgbe_mac_82598EB:
 199                         xoff[i] = IXGBE_READ_REG(hw, IXGBE_PXOFFRXC(i));
 200                         break;
 201                 default:
 202                         xoff[i] = IXGBE_READ_REG(hw, IXGBE_PXOFFRXCNT(i));
 203                 }
 204                 hwstats->pxoffrxc[i] += xoff[i];
 205         }
 206
 207         /* disarm tx queues that have received xoff frames */
 208         for (i = 0; i < adapter->num_tx_queues; i++) {
 209                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
 210                 u8 tc = tx_ring->dcb_tc;
 211
 212                 if ((tc <= 7) && (xoff[tc]))
 213                         clear_bit(__IXGBE_HANG_CHECK_ARMED, &tx_ring->state);
 214         }
 215 }
 216
 217
 218
 219
 220 #define IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT 2
 221
 222
 223
 224
 225 #ifdef HAVE_8021P_SUPPORT
 226 /**
 227  * ixgbe_vlan_stripping_disable - helper to disable vlan tag stripping
 228  * @adapter: driver data
 229  */
 230 void ixgbe_vlan_stripping_disable(struct ixgbe_adapter *adapter)
 231 {
 232         struct ixgbe_hw *hw = &adapter->hw;
 233         u32 vlnctrl;
 234         int i;
 235
 236         /* leave vlan tag stripping enabled for DCB */
 237         if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
 238                 return;
 239
 240         switch (hw->mac.type) {
 241         case ixgbe_mac_82598EB:
 242                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
 243                 vlnctrl &= ~IXGBE_VLNCTRL_VME;
 244                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
 245                 break;
 246         case ixgbe_mac_82599EB:
 247         case ixgbe_mac_X540:
 248                 for (i = 0; i < adapter->num_rx_queues; i++) {
 249                         u8 reg_idx = adapter->rx_ring[i]->reg_idx;
 250                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
 251                         vlnctrl &= ~IXGBE_RXDCTL_VME;
 252                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), vlnctrl);
 253                 }
 254                 break;
 255         default:
 256                 break;
 257         }
 258 }
 259
 260 #endif
 261 /**
 262  * ixgbe_vlan_stripping_enable - helper to enable vlan tag stripping
 263  * @adapter: driver data
 264  */
 265 void ixgbe_vlan_stripping_enable(struct ixgbe_adapter *adapter)
 266 {
 267         struct ixgbe_hw *hw = &adapter->hw;
 268         u32 vlnctrl;
 269         int i;
 270
 271         switch (hw->mac.type) {
 272         case ixgbe_mac_82598EB:
 273                 vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
 274                 vlnctrl |= IXGBE_VLNCTRL_VME;
 275                 IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
 276                 break;
 277         case ixgbe_mac_82599EB:
 278         case ixgbe_mac_X540:
 279                 for (i = 0; i < adapter->num_rx_queues; i++) {
 280                         u8 reg_idx = adapter->rx_ring[i]->reg_idx;
 281                         vlnctrl = IXGBE_READ_REG(hw, IXGBE_RXDCTL(reg_idx));
 282                         vlnctrl |= IXGBE_RXDCTL_VME;
 283                         IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(reg_idx), vlnctrl);
 284                 }
 285                 break;
 286         default:
 287                 break;
 288         }
 289 }
 290
 291 #ifdef HAVE_VLAN_RX_REGISTER
 292 void ixgbe_vlan_mode(struct net_device *netdev, struct vlan_group *grp)
 293 #else
 294 void ixgbe_vlan_mode(struct net_device *netdev, u32 features)
 295 #endif
 296 {
 297         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 298 #ifdef HAVE_8021P_SUPPORT
 299         bool enable;
 300 #endif
 301 #ifdef HAVE_VLAN_RX_REGISTER
 302
 303         //if (!test_bit(__IXGBE_DOWN, &adapter->state))
 304         //      ixgbe_irq_disable(adapter);
 305
 306         adapter->vlgrp = grp;
 307
 308         //if (!test_bit(__IXGBE_DOWN, &adapter->state))
 309         //      ixgbe_irq_enable(adapter, true, true);
 310 #endif
 311 #ifdef HAVE_8021P_SUPPORT
 312 #ifdef HAVE_VLAN_RX_REGISTER
 313         enable = (grp || (adapter->flags & IXGBE_FLAG_DCB_ENABLED));
 314 #else
 315         enable = !!(features & NETIF_F_HW_VLAN_RX);
 316 #endif
 317         if (enable)
 318                 /* enable VLAN tag insert/strip */
 319                 ixgbe_vlan_stripping_enable(adapter);
 320         else
 321                 /* disable VLAN tag insert/strip */
 322                 ixgbe_vlan_stripping_disable(adapter);
 323
 324 #endif
 325 }
 326
 327 static u8 *ixgbe_addr_list_itr(struct ixgbe_hw *hw, u8 **mc_addr_ptr, u32 *vmdq)
 328 {
 329 #ifdef NETDEV_HW_ADDR_T_MULTICAST
 330         struct netdev_hw_addr *mc_ptr;
 331 #else
 332         struct dev_mc_list *mc_ptr;
 333 #endif
 334         struct ixgbe_adapter *adapter = hw->back;
 335         u8 *addr = *mc_addr_ptr;
 336
 337         *vmdq = adapter->num_vfs;
 338
 339 #ifdef NETDEV_HW_ADDR_T_MULTICAST
 340         mc_ptr = container_of(addr, struct netdev_hw_addr, addr[0]);
 341         if (mc_ptr->list.next) {
 342                 struct netdev_hw_addr *ha;
 343
 344                 ha = list_entry(mc_ptr->list.next, struct netdev_hw_addr, list);
 345                 *mc_addr_ptr = ha->addr;
 346         }
 347 #else
 348         mc_ptr = container_of(addr, struct dev_mc_list, dmi_addr[0]);
 349         if (mc_ptr->next)
 350                 *mc_addr_ptr = mc_ptr->next->dmi_addr;
 351 #endif
 352         else
 353                 *mc_addr_ptr = NULL;
 354
 355         return addr;
 356 }
 357
 358 /**
 359  * ixgbe_write_mc_addr_list - write multicast addresses to MTA
 360  * @netdev: network interface device structure
 361  *
 362  * Writes multicast address list to the MTA hash table.
 363  * Returns: -ENOMEM on failure
 364  *                0 on no addresses written
 365  *                X on writing X addresses to MTA
 366  **/
 367 int ixgbe_write_mc_addr_list(struct net_device *netdev)
 368 {
 369         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 370         struct ixgbe_hw *hw = &adapter->hw;
 371 #ifdef NETDEV_HW_ADDR_T_MULTICAST
 372         struct netdev_hw_addr *ha;
 373 #endif
 374         u8  *addr_list = NULL;
 375         int addr_count = 0;
 376
 377         if (!hw->mac.ops.update_mc_addr_list)
 378                 return -ENOMEM;
 379
 380         if (!netif_running(netdev))
 381                 return 0;
 382
 383
 384         hw->mac.ops.update_mc_addr_list(hw, NULL, 0,
 385                                         ixgbe_addr_list_itr, true);
 386
 387         if (!netdev_mc_empty(netdev)) {
 388 #ifdef NETDEV_HW_ADDR_T_MULTICAST
 389                 ha = list_first_entry(&netdev->mc.list,
 390                                       struct netdev_hw_addr, list);
 391                 addr_list = ha->addr;
 392 #else
 393                 addr_list = netdev->mc_list->dmi_addr;
 394 #endif
 395                 addr_count = netdev_mc_count(netdev);
 396
 397                 hw->mac.ops.update_mc_addr_list(hw, addr_list, addr_count,
 398                                                 ixgbe_addr_list_itr, false);
 399         }
 400
 401 #ifdef CONFIG_PCI_IOV
 402         //ixgbe_restore_vf_multicasts(adapter);
 403 #endif
 404         return addr_count;
 405 }
 406
 407
 408 void ixgbe_full_sync_mac_table(struct ixgbe_adapter *adapter)
 409 {
 410         struct ixgbe_hw *hw = &adapter->hw;
 411         int i;
 412         for (i = 0; i < hw->mac.num_rar_entries; i++) {
 413                 if (adapter->mac_table[i].state & IXGBE_MAC_STATE_IN_USE) {
 414                         hw->mac.ops.set_rar(hw, i, adapter->mac_table[i].addr,
 415                                                 adapter->mac_table[i].queue,
 416                                                 IXGBE_RAH_AV);
 417                 } else {
 418                         hw->mac.ops.clear_rar(hw, i);
 419                 }
 420         }
 421 }
 422
 423 void ixgbe_sync_mac_table(struct ixgbe_adapter *adapter)
 424 {
 425         struct ixgbe_hw *hw = &adapter->hw;
 426         int i;
 427         for (i = 0; i < hw->mac.num_rar_entries; i++) {
 428                 if (adapter->mac_table[i].state & IXGBE_MAC_STATE_MODIFIED) {
 429                         if (adapter->mac_table[i].state &
 430                                         IXGBE_MAC_STATE_IN_USE) {
 431                                 hw->mac.ops.set_rar(hw, i,
 432                                                 adapter->mac_table[i].addr,
 433                                                 adapter->mac_table[i].queue,
 434                                                 IXGBE_RAH_AV);
 435                         } else {
 436                                 hw->mac.ops.clear_rar(hw, i);
 437                         }
 438                         adapter->mac_table[i].state &=
 439                                 ~(IXGBE_MAC_STATE_MODIFIED);
 440                 }
 441         }
 442 }
 443
 444 int ixgbe_available_rars(struct ixgbe_adapter *adapter)
 445 {
 446         struct ixgbe_hw *hw = &adapter->hw;
 447         int i, count = 0;
 448
 449         for (i = 0; i < hw->mac.num_rar_entries; i++) {
 450                 if (adapter->mac_table[i].state == 0)
 451                         count++;
 452         }
 453         return count;
 454 }
 455
 456 int ixgbe_add_mac_filter(struct ixgbe_adapter *adapter, u8 *addr, u16 queue)
 457 {
 458         struct ixgbe_hw *hw = &adapter->hw;
 459         int i;
 460
 461         if (is_zero_ether_addr(addr))
 462                 return 0;
 463
 464         for (i = 0; i < hw->mac.num_rar_entries; i++) {
 465                 if (adapter->mac_table[i].state & IXGBE_MAC_STATE_IN_USE)
 466                         continue;
 467                 adapter->mac_table[i].state |= (IXGBE_MAC_STATE_MODIFIED |
 468                                                 IXGBE_MAC_STATE_IN_USE);
 469                 memcpy(adapter->mac_table[i].addr, addr, ETH_ALEN);
 470                 adapter->mac_table[i].queue = queue;
 471                 ixgbe_sync_mac_table(adapter);
 472                 return i;
 473         }
 474         return -ENOMEM;
 475 }
 476
 477 void ixgbe_flush_sw_mac_table(struct ixgbe_adapter *adapter)
 478 {
 479         int i;
 480         struct ixgbe_hw *hw = &adapter->hw;
 481
 482         for (i = 0; i < hw->mac.num_rar_entries; i++) {
 483                 adapter->mac_table[i].state |= IXGBE_MAC_STATE_MODIFIED;
 484                 adapter->mac_table[i].state &= ~IXGBE_MAC_STATE_IN_USE;
 485                 memset(adapter->mac_table[i].addr, 0, ETH_ALEN);
 486                 adapter->mac_table[i].queue = 0;
 487         }
 488         ixgbe_sync_mac_table(adapter);
 489 }
 490
 491 void ixgbe_del_mac_filter_by_index(struct ixgbe_adapter *adapter, int index)
 492 {
 493         adapter->mac_table[index].state |= IXGBE_MAC_STATE_MODIFIED;
 494         adapter->mac_table[index].state &= ~IXGBE_MAC_STATE_IN_USE;
 495         memset(adapter->mac_table[index].addr, 0, ETH_ALEN);
 496         adapter->mac_table[index].queue = 0;
 497         ixgbe_sync_mac_table(adapter);
 498 }
 499
 500 int ixgbe_del_mac_filter(struct ixgbe_adapter *adapter, u8* addr, u16 queue)
 501 {
 502         /* search table for addr, if found, set to 0 and sync */
 503         int i;
 504         struct ixgbe_hw *hw = &adapter->hw;
 505
 506         if (is_zero_ether_addr(addr))
 507                 return 0;
 508         for (i = 0; i < hw->mac.num_rar_entries; i++) {
 509                 if (ether_addr_equal(addr, adapter->mac_table[i].addr) &&
 510                     adapter->mac_table[i].queue == queue) {
 511                         adapter->mac_table[i].state |= IXGBE_MAC_STATE_MODIFIED;
 512                         adapter->mac_table[i].state &= ~IXGBE_MAC_STATE_IN_USE;
 513                         memset(adapter->mac_table[i].addr, 0, ETH_ALEN);
 514                         adapter->mac_table[i].queue = 0;
 515                         ixgbe_sync_mac_table(adapter);
 516                         return 0;
 517                 }
 518         }
 519         return -ENOMEM;
 520 }
 521 #ifdef HAVE_SET_RX_MODE
 522 /**
 523  * ixgbe_write_uc_addr_list - write unicast addresses to RAR table
 524  * @netdev: network interface device structure
 525  *
 526  * Writes unicast address list to the RAR table.
 527  * Returns: -ENOMEM on failure/insufficient address space
 528  *                0 on no addresses written
 529  *                X on writing X addresses to the RAR table
 530  **/
 531 int ixgbe_write_uc_addr_list(struct ixgbe_adapter *adapter,
 532                              struct net_device *netdev, unsigned int vfn)
 533 {
 534         int count = 0;
 535
 536         /* return ENOMEM indicating insufficient memory for addresses */
 537         if (netdev_uc_count(netdev) > ixgbe_available_rars(adapter))
 538                 return -ENOMEM;
 539
 540         if (!netdev_uc_empty(netdev)) {
 541 #ifdef NETDEV_HW_ADDR_T_UNICAST
 542                 struct netdev_hw_addr *ha;
 543 #else
 544                 struct dev_mc_list *ha;
 545 #endif
 546                 netdev_for_each_uc_addr(ha, netdev) {
 547 #ifdef NETDEV_HW_ADDR_T_UNICAST
 548                         ixgbe_del_mac_filter(adapter, ha->addr, (u16)vfn);
 549                         ixgbe_add_mac_filter(adapter, ha->addr, (u16)vfn);
 550 #else
 551                         ixgbe_del_mac_filter(adapter, ha->da_addr, (u16)vfn);
 552                         ixgbe_add_mac_filter(adapter, ha->da_addr, (u16)vfn);
 553 #endif
 554                         count++;
 555                 }
 556         }
 557         return count;
 558 }
 559
 560 #endif
 561 /**
 562  * ixgbe_set_rx_mode - Unicast, Multicast and Promiscuous mode set
 563  * @netdev: network interface device structure
 564  *
 565  * The set_rx_method entry point is called whenever the unicast/multicast
 566  * address list or the network interface flags are updated.  This routine is
 567  * responsible for configuring the hardware for proper unicast, multicast and
 568  * promiscuous mode.
 569  **/
 570 void ixgbe_set_rx_mode(struct net_device *netdev)
 571 {
 572         struct ixgbe_adapter *adapter = netdev_priv(netdev);
 573         struct ixgbe_hw *hw = &adapter->hw;
 574         u32 fctrl, vmolr = IXGBE_VMOLR_BAM | IXGBE_VMOLR_AUPE;
 575         u32 vlnctrl;
 576         int count;
 577
 578         /* Check for Promiscuous and All Multicast modes */
 579         fctrl = IXGBE_READ_REG(hw, IXGBE_FCTRL);
 580         vlnctrl = IXGBE_READ_REG(hw, IXGBE_VLNCTRL);
 581
 582         /* set all bits that we expect to always be set */
 583         fctrl |= IXGBE_FCTRL_BAM;
 584         fctrl |= IXGBE_FCTRL_DPF; /* discard pause frames when FC enabled */
 585         fctrl |= IXGBE_FCTRL_PMCF;
 586
 587         /* clear the bits we are changing the status of */
 588         fctrl &= ~(IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
 589         vlnctrl  &= ~(IXGBE_VLNCTRL_VFE | IXGBE_VLNCTRL_CFIEN);
 590
 591         if (netdev->flags & IFF_PROMISC) {
 592                 hw->addr_ctrl.user_set_promisc = true;
 593                 fctrl |= (IXGBE_FCTRL_UPE | IXGBE_FCTRL_MPE);
 594                 vmolr |= IXGBE_VMOLR_MPE;
 595         } else {
 596                 if (netdev->flags & IFF_ALLMULTI) {
 597                         fctrl |= IXGBE_FCTRL_MPE;
 598                         vmolr |= IXGBE_VMOLR_MPE;
 599                 } else {
 600                         /*
 601                          * Write addresses to the MTA, if the attempt fails
 602                          * then we should just turn on promiscuous mode so
 603                          * that we can at least receive multicast traffic
 604                          */
 605                         count = ixgbe_write_mc_addr_list(netdev);
 606                         if (count < 0) {
 607                                 fctrl |= IXGBE_FCTRL_MPE;
 608                                 vmolr |= IXGBE_VMOLR_MPE;
 609                         } else if (count) {
 610                                 vmolr |= IXGBE_VMOLR_ROMPE;
 611                         }
 612                 }
 613 #ifdef NETIF_F_HW_VLAN_TX
 614                 /* enable hardware vlan filtering */
 615                 vlnctrl |= IXGBE_VLNCTRL_VFE;
 616 #endif
 617                 hw->addr_ctrl.user_set_promisc = false;
 618 #ifdef HAVE_SET_RX_MODE
 619                 /*
 620                  * Write addresses to available RAR registers, if there is not
 621                  * sufficient space to store all the addresses then enable
 622                  * unicast promiscuous mode
 623                  */
 624                 count = ixgbe_write_uc_addr_list(adapter, netdev,
 625                                                  adapter->num_vfs);
 626                 if (count < 0) {
 627                         fctrl |= IXGBE_FCTRL_UPE;
 628                         vmolr |= IXGBE_VMOLR_ROPE;
 629                 }
 630 #endif
 631         }
 632
 633         if (hw->mac.type != ixgbe_mac_82598EB) {
 634                 vmolr |= IXGBE_READ_REG(hw, IXGBE_VMOLR(adapter->num_vfs)) &
 635                          ~(IXGBE_VMOLR_MPE | IXGBE_VMOLR_ROMPE |
 636                            IXGBE_VMOLR_ROPE);
 637                 IXGBE_WRITE_REG(hw, IXGBE_VMOLR(adapter->num_vfs), vmolr);
 638         }
 639
 640         IXGBE_WRITE_REG(hw, IXGBE_VLNCTRL, vlnctrl);
 641         IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl);
 642 }
 643
 644
 645
 646
 647
 648
 649
 650
 651 /* Additional bittime to account for IXGBE framing */
 652 #define IXGBE_ETH_FRAMING 20
 653
 654 /*
 655  * ixgbe_hpbthresh - calculate high water mark for flow control
 656  *
 657  * @adapter: board private structure to calculate for
 658  * @pb - packet buffer to calculate
 659  */
 660 static int ixgbe_hpbthresh(struct ixgbe_adapter *adapter, int pb)
 661 {
 662         struct ixgbe_hw *hw = &adapter->hw;
 663         struct net_device *dev = adapter->netdev;
 664         int link, tc, kb, marker;
 665         u32 dv_id, rx_pba;
 666
 667         /* Calculate max LAN frame size */
 668         tc = link = dev->mtu + ETH_HLEN + ETH_FCS_LEN + IXGBE_ETH_FRAMING;
 669
 670 #ifdef IXGBE_FCOE
 671         /* FCoE traffic class uses FCOE jumbo frames */
 672         if (dev->features & NETIF_F_FCOE_MTU) {
 673                 int fcoe_pb = 0;
 674
 675                 fcoe_pb = netdev_get_prio_tc_map(dev, adapter->fcoe.up);
 676
 677                 if (fcoe_pb == pb && tc < IXGBE_FCOE_JUMBO_FRAME_SIZE)
 678                         tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
 679         }
 680 #endif
 681
 682         /* Calculate delay value for device */
 683         switch (hw->mac.type) {
 684         case ixgbe_mac_X540:
 685                 dv_id = IXGBE_DV_X540(link, tc);
 686                 break;
 687         default:
 688                 dv_id = IXGBE_DV(link, tc);
 689                 break;
 690         }
 691
 692         /* Loopback switch introduces additional latency */
 693         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
 694                 dv_id += IXGBE_B2BT(tc);
 695
 696         /* Delay value is calculated in bit times convert to KB */
 697         kb = IXGBE_BT2KB(dv_id);
 698         rx_pba = IXGBE_READ_REG(hw, IXGBE_RXPBSIZE(pb)) >> 10;
 699
 700         marker = rx_pba - kb;
 701
 702         /* It is possible that the packet buffer is not large enough
 703          * to provide required headroom. In this case throw an error
 704          * to user and a do the best we can.
 705          */
 706         if (marker < 0) {
 707                 e_warn(drv, "Packet Buffer(%i) can not provide enough"
 708                             "headroom to suppport flow control."
 709                             "Decrease MTU or number of traffic classes\n", pb);
 710                 marker = tc + 1;
 711         }
 712
 713         return marker;
 714 }
 715
 716 /*
 717  * ixgbe_lpbthresh - calculate low water mark for for flow control
 718  *
 719  * @adapter: board private structure to calculate for
 720  * @pb - packet buffer to calculate
 721  */
 722 static int ixgbe_lpbthresh(struct ixgbe_adapter *adapter, int pb)
 723 {
 724         struct ixgbe_hw *hw = &adapter->hw;
 725         struct net_device *dev = adapter->netdev;
 726         int tc;
 727         u32 dv_id;
 728
 729         /* Calculate max LAN frame size */
 730         tc = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
 731
 732 #ifdef IXGBE_FCOE
 733         /* FCoE traffic class uses FCOE jumbo frames */
 734         if (dev->features & NETIF_F_FCOE_MTU) {
 735                 int fcoe_pb = 0;
 736
 737                 fcoe_pb = netdev_get_prio_tc_map(dev, adapter->fcoe.up);
 738
 739                 if (fcoe_pb == pb && tc < IXGBE_FCOE_JUMBO_FRAME_SIZE)
 740                         tc = IXGBE_FCOE_JUMBO_FRAME_SIZE;
 741         }
 742 #endif
 743
 744         /* Calculate delay value for device */
 745         switch (hw->mac.type) {
 746         case ixgbe_mac_X540:
 747                 dv_id = IXGBE_LOW_DV_X540(tc);
 748                 break;
 749         default:
 750                 dv_id = IXGBE_LOW_DV(tc);
 751                 break;
 752         }
 753
 754         /* Delay value is calculated in bit times convert to KB */
 755         return IXGBE_BT2KB(dv_id);
 756 }
 757
 758 /*
 759  * ixgbe_pbthresh_setup - calculate and setup high low water marks
 760  */
 761 static void ixgbe_pbthresh_setup(struct ixgbe_adapter *adapter)
 762 {
 763         struct ixgbe_hw *hw = &adapter->hw;
 764         int num_tc = netdev_get_num_tc(adapter->netdev);
 765         int i;
 766
 767         if (!num_tc)
 768                 num_tc = 1;
 769         if (num_tc > IXGBE_DCB_MAX_TRAFFIC_CLASS)
 770                 num_tc = IXGBE_DCB_MAX_TRAFFIC_CLASS;
 771
 772         for (i = 0; i < num_tc; i++) {
 773                 hw->fc.high_water[i] = ixgbe_hpbthresh(adapter, i);
 774                 hw->fc.low_water[i] = ixgbe_lpbthresh(adapter, i);
 775
 776                 /* Low water marks must not be larger than high water marks */
 777                 if (hw->fc.low_water[i] > hw->fc.high_water[i])
 778                         hw->fc.low_water[i] = 0;
 779         }
 780
 781         for (; i < IXGBE_DCB_MAX_TRAFFIC_CLASS; i++)
 782                 hw->fc.high_water[i] = 0;
 783 }
 784
 785
 786
 787 #ifdef NO_VNIC
 788 static void ixgbe_configure(struct ixgbe_adapter *adapter)
 789 {
 790         struct ixgbe_hw *hw = &adapter->hw;
 791
 792         ixgbe_configure_pb(adapter);
 793         ixgbe_configure_dcb(adapter);
 794
 795         ixgbe_set_rx_mode(adapter->netdev);
 796 #ifdef NETIF_F_HW_VLAN_TX
 797         ixgbe_restore_vlan(adapter);
 798 #endif
 799
 800 #ifdef IXGBE_FCOE
 801         if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED)
 802                 ixgbe_configure_fcoe(adapter);
 803
 804 #endif /* IXGBE_FCOE */
 805
 806         if (adapter->hw.mac.type != ixgbe_mac_82598EB)
 807                 hw->mac.ops.disable_sec_rx_path(hw);
 808
 809         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
 810                 ixgbe_init_fdir_signature_82599(&adapter->hw,
 811                                                 adapter->fdir_pballoc);
 812         } else if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
 813                 ixgbe_init_fdir_perfect_82599(&adapter->hw,
 814                                               adapter->fdir_pballoc);
 815                 ixgbe_fdir_filter_restore(adapter);
 816         }
 817
 818         if (adapter->hw.mac.type != ixgbe_mac_82598EB)
 819                 hw->mac.ops.enable_sec_rx_path(hw);
 820
 821         ixgbe_configure_virtualization(adapter);
 822
 823         ixgbe_configure_tx(adapter);
 824         ixgbe_configure_rx(adapter);
 825 }
 826 #endif
 827
 828 static bool ixgbe_is_sfp(struct ixgbe_hw *hw)
 829 {
 830         switch (hw->phy.type) {
 831         case ixgbe_phy_sfp_avago:
 832         case ixgbe_phy_sfp_ftl:
 833         case ixgbe_phy_sfp_intel:
 834         case ixgbe_phy_sfp_unknown:
 835         case ixgbe_phy_sfp_passive_tyco:
 836         case ixgbe_phy_sfp_passive_unknown:
 837         case ixgbe_phy_sfp_active_unknown:
 838         case ixgbe_phy_sfp_ftl_active:
 839                 return true;
 840         case ixgbe_phy_nl:
 841                 if (hw->mac.type == ixgbe_mac_82598EB)
 842                         return true;
 843         default:
 844                 return false;
 845         }
 846 }
 847
 848
 849 /**
 850  * ixgbe_clear_vf_stats_counters - Clear out VF stats after reset
 851  * @adapter: board private structure
 852  *
 853  * On a reset we need to clear out the VF stats or accounting gets
 854  * messed up because they're not clear on read.
 855  **/
 856 void ixgbe_clear_vf_stats_counters(struct ixgbe_adapter *adapter)
 857 {
 858         struct ixgbe_hw *hw = &adapter->hw;
 859         int i;
 860
 861         for (i = 0; i < adapter->num_vfs; i++) {
 862                 adapter->vfinfo[i].last_vfstats.gprc =
 863                         IXGBE_READ_REG(hw, IXGBE_PVFGPRC(i));
 864                 adapter->vfinfo[i].saved_rst_vfstats.gprc +=
 865                         adapter->vfinfo[i].vfstats.gprc;
 866                 adapter->vfinfo[i].vfstats.gprc = 0;
 867                 adapter->vfinfo[i].last_vfstats.gptc =
 868                         IXGBE_READ_REG(hw, IXGBE_PVFGPTC(i));
 869                 adapter->vfinfo[i].saved_rst_vfstats.gptc +=
 870                         adapter->vfinfo[i].vfstats.gptc;
 871                 adapter->vfinfo[i].vfstats.gptc = 0;
 872                 adapter->vfinfo[i].last_vfstats.gorc =
 873                         IXGBE_READ_REG(hw, IXGBE_PVFGORC_LSB(i));
 874                 adapter->vfinfo[i].saved_rst_vfstats.gorc +=
 875                         adapter->vfinfo[i].vfstats.gorc;
 876                 adapter->vfinfo[i].vfstats.gorc = 0;
 877                 adapter->vfinfo[i].last_vfstats.gotc =
 878                         IXGBE_READ_REG(hw, IXGBE_PVFGOTC_LSB(i));
 879                 adapter->vfinfo[i].saved_rst_vfstats.gotc +=
 880                         adapter->vfinfo[i].vfstats.gotc;
 881                 adapter->vfinfo[i].vfstats.gotc = 0;
 882                 adapter->vfinfo[i].last_vfstats.mprc =
 883                         IXGBE_READ_REG(hw, IXGBE_PVFMPRC(i));
 884                 adapter->vfinfo[i].saved_rst_vfstats.mprc +=
 885                         adapter->vfinfo[i].vfstats.mprc;
 886                 adapter->vfinfo[i].vfstats.mprc = 0;
 887         }
 888 }
 889
 890
 891
 892 void ixgbe_reinit_locked(struct ixgbe_adapter *adapter)
 893 {
 894 #ifdef NO_VNIC
 895         WARN_ON(in_interrupt());
 896         /* put off any impending NetWatchDogTimeout */
 897         adapter->netdev->trans_start = jiffies;
 898
 899         while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
 900                 usleep_range(1000, 2000);
 901         ixgbe_down(adapter);
 902         /*
 903          * If SR-IOV enabled then wait a bit before bringing the adapter
 904          * back up to give the VFs time to respond to the reset.  The
 905          * two second wait is based upon the watchdog timer cycle in
 906          * the VF driver.
 907          */
 908         if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
 909                 msleep(2000);
 910         ixgbe_up(adapter);
 911         clear_bit(__IXGBE_RESETTING, &adapter->state);
 912 #endif
 913 }
 914
 915 void ixgbe_up(struct ixgbe_adapter *adapter)
 916 {
 917         /* hardware has been reset, we need to reload some things */
 918         //ixgbe_configure(adapter);
 919
 920         //ixgbe_up_complete(adapter);
 921 }
 922
 923 void ixgbe_reset(struct ixgbe_adapter *adapter)
 924 {
 925         struct ixgbe_hw *hw = &adapter->hw;
 926         struct net_device *netdev = adapter->netdev;
 927         int err;
 928
 929         /* lock SFP init bit to prevent race conditions with the watchdog */
 930         while (test_and_set_bit(__IXGBE_IN_SFP_INIT, &adapter->state))
 931                 usleep_range(1000, 2000);
 932
 933         /* clear all SFP and link config related flags while holding SFP_INIT */
 934         adapter->flags2 &= ~(IXGBE_FLAG2_SEARCH_FOR_SFP |
 935                              IXGBE_FLAG2_SFP_NEEDS_RESET);
 936         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_CONFIG;
 937
 938         err = hw->mac.ops.init_hw(hw);
 939         switch (err) {
 940         case 0:
 941         case IXGBE_ERR_SFP_NOT_PRESENT:
 942         case IXGBE_ERR_SFP_NOT_SUPPORTED:
 943                 break;
 944         case IXGBE_ERR_MASTER_REQUESTS_PENDING:
 945                 e_dev_err("master disable timed out\n");
 946                 break;
 947         case IXGBE_ERR_EEPROM_VERSION:
 948                 /* We are running on a pre-production device, log a warning */
 949                 e_dev_warn("This device is a pre-production adapter/LOM. "
 950                            "Please be aware there may be issues associated "
 951                            "with your hardware.  If you are experiencing "
 952                            "problems please contact your Intel or hardware "
 953                            "representative who provided you with this "
 954                            "hardware.\n");
 955                 break;
 956         default:
 957                 e_dev_err("Hardware Error: %d\n", err);
 958         }
 959
 960         clear_bit(__IXGBE_IN_SFP_INIT, &adapter->state);
 961
 962         ixgbe_flush_sw_mac_table(adapter);
 963         memcpy(&adapter->mac_table[0].addr, hw->mac.perm_addr,
 964                netdev->addr_len);
 965         adapter->mac_table[0].queue = adapter->num_vfs;
 966         adapter->mac_table[0].state = (IXGBE_MAC_STATE_DEFAULT |
 967                                         IXGBE_MAC_STATE_IN_USE);
 968         hw->mac.ops.set_rar(hw, 0, adapter->mac_table[0].addr,
 969                                 adapter->mac_table[0].queue,
 970                                 IXGBE_RAH_AV);
 971 }
 972
 973
 974
 975
 976
 977
 978 void ixgbe_down(struct ixgbe_adapter *adapter)
 979 {
 980 #ifdef NO_VNIC
 981         struct net_device *netdev = adapter->netdev;
 982         struct ixgbe_hw *hw = &adapter->hw;
 983         u32 rxctrl;
 984         int i;
 985
 986         /* signal that we are down to the interrupt handler */
 987         set_bit(__IXGBE_DOWN, &adapter->state);
 988
 989         /* disable receives */
 990         rxctrl = IXGBE_READ_REG(hw, IXGBE_RXCTRL);
 991         IXGBE_WRITE_REG(hw, IXGBE_RXCTRL, rxctrl & ~IXGBE_RXCTRL_RXEN);
 992
 993         /* disable all enabled rx queues */
 994         for (i = 0; i < adapter->num_rx_queues; i++)
 995                 /* this call also flushes the previous write */
 996                 ixgbe_disable_rx_queue(adapter, adapter->rx_ring[i]);
 997
 998         usleep_range(10000, 20000);
 999
1000         netif_tx_stop_all_queues(netdev);
1001
1002         /* call carrier off first to avoid false dev_watchdog timeouts */
1003         netif_carrier_off(netdev);
1004         netif_tx_disable(netdev);
1005
1006         ixgbe_irq_disable(adapter);
1007
1008         ixgbe_napi_disable_all(adapter);
1009
1010         adapter->flags2 &= ~(IXGBE_FLAG2_FDIR_REQUIRES_REINIT |
1011                              IXGBE_FLAG2_RESET_REQUESTED);
1012         adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
1013
1014         del_timer_sync(&adapter->service_timer);
1015
1016         if (adapter->num_vfs) {
1017                 /* Clear EITR Select mapping */
1018                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_EITRSEL, 0);
1019
1020                 /* Mark all the VFs as inactive */
1021                 for (i = 0 ; i < adapter->num_vfs; i++)
1022                         adapter->vfinfo[i].clear_to_send = 0;
1023
1024                 /* ping all the active vfs to let them know we are going down */
1025                 ixgbe_ping_all_vfs(adapter);
1026
1027                 /* Disable all VFTE/VFRE TX/RX */
1028                 ixgbe_disable_tx_rx(adapter);
1029         }
1030
1031         /* disable transmits in the hardware now that interrupts are off */
1032         for (i = 0; i < adapter->num_tx_queues; i++) {
1033                 u8 reg_idx = adapter->tx_ring[i]->reg_idx;
1034                 IXGBE_WRITE_REG(hw, IXGBE_TXDCTL(reg_idx), IXGBE_TXDCTL_SWFLSH);
1035         }
1036
1037         /* Disable the Tx DMA engine on 82599 and X540 */
1038         switch (hw->mac.type) {
1039         case ixgbe_mac_82599EB:
1040         case ixgbe_mac_X540:
1041                 IXGBE_WRITE_REG(hw, IXGBE_DMATXCTL,
1042                                 (IXGBE_READ_REG(hw, IXGBE_DMATXCTL) &
1043                                  ~IXGBE_DMATXCTL_TE));
1044                 break;
1045         default:
1046                 break;
1047         }
1048
1049 #ifdef HAVE_PCI_ERS
1050         if (!pci_channel_offline(adapter->pdev))
1051 #endif
1052                 ixgbe_reset(adapter);
1053         /* power down the optics */
1054         if ((hw->phy.multispeed_fiber) ||
1055             ((hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber) &&
1056              (hw->mac.type == ixgbe_mac_82599EB)))
1057                 ixgbe_disable_tx_laser(hw);
1058
1059         ixgbe_clean_all_tx_rings(adapter);
1060         ixgbe_clean_all_rx_rings(adapter);
1061
1062 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
1063         /* since we reset the hardware DCA settings were cleared */
1064         ixgbe_setup_dca(adapter);
1065 #endif
1066
1067 #endif /* NO_VNIC */
1068 }
1069
1070 #ifndef NO_VNIC
1071
1072 #undef IXGBE_FCOE
1073
1074 /* Artificial max queue cap per traffic class in DCB mode */
1075 #define DCB_QUEUE_CAP 8
1076
1077 /**
1078  * ixgbe_set_dcb_queues: Allocate queues for a DCB-enabled device
1079  * @adapter: board private structure to initialize
1080  *
1081  * When DCB (Data Center Bridging) is enabled, allocate queues for
1082  * each traffic class.  If multiqueue isn't available,then abort DCB
1083  * initialization.
1084  *
1085  * This function handles all combinations of DCB, RSS, and FCoE.
1086  *
1087  **/
1088 static bool ixgbe_set_dcb_queues(struct ixgbe_adapter *adapter)
1089 {
1090        int tcs;
1091 #ifdef HAVE_MQPRIO
1092        int rss_i, i, offset = 0;
1093        struct net_device *dev = adapter->netdev;
1094
1095        /* Map queue offset and counts onto allocated tx queues */
1096        tcs = netdev_get_num_tc(dev);
1097
1098        if (!tcs)
1099               return false;
1100
1101        rss_i = min_t(int, dev->num_tx_queues / tcs, num_online_cpus());
1102
1103        if (rss_i > DCB_QUEUE_CAP)
1104               rss_i = DCB_QUEUE_CAP;
1105
1106        for (i = 0; i < tcs; i++) {
1107               netdev_set_tc_queue(dev, i, rss_i, offset);
1108               offset += rss_i;
1109        }
1110
1111        adapter->num_tx_queues = rss_i * tcs;
1112        adapter->num_rx_queues = rss_i * tcs;
1113
1114 #ifdef IXGBE_FCOE
1115        /* FCoE enabled queues require special configuration indexed
1116         * by feature specific indices and mask. Here we map FCoE
1117         * indices onto the DCB queue pairs allowing FCoE to own
1118         * configuration later.
1119         */
1120
1121        if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED) {
1122               struct ixgbe_ring_feature *f;
1123               int tc;
1124               u8 prio_tc[IXGBE_DCB_MAX_USER_PRIORITY] = {0};
1125
1126               ixgbe_dcb_unpack_map_cee(&adapter->dcb_cfg,
1127                                     IXGBE_DCB_TX_CONFIG,
1128                                     prio_tc);
1129               tc = prio_tc[adapter->fcoe.up];
1130
1131               f = &adapter->ring_feature[RING_F_FCOE];
1132               f->indices = min_t(int, rss_i, f->indices);
1133               f->mask = rss_i * tc;
1134        }
1135 #endif /* IXGBE_FCOE */
1136 #else
1137        if (!(adapter->flags & IXGBE_FLAG_DCB_ENABLED))
1138               return false;
1139
1140        /* Enable one Queue per traffic class */
1141        tcs = adapter->tc;
1142        if (!tcs)
1143               return false;
1144
1145 #ifdef IXGBE_FCOE
1146        if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED) {
1147               struct ixgbe_ring_feature *f;
1148               int tc = netdev_get_prio_tc_map(adapter->netdev,
1149                                           adapter->fcoe.up);
1150
1151               f = &adapter->ring_feature[RING_F_FCOE];
1152
1153               /*
1154                * We have max 8 queues for FCoE, where 8 the is
1155                * FCoE redirection table size.  We must also share
1156                * ring resources with network traffic so if FCoE TC is
1157                * 4 or greater and we are in 8 TC mode we can only use
1158                * 7 queues.
1159                */
1160               if ((tcs > 4) && (tc >= 4) && (f->indices > 7))
1161                      f->indices = 7;
1162
1163               f->indices = min_t(int, num_online_cpus(), f->indices);
1164               f->mask = tcs;
1165
1166               adapter->num_rx_queues = f->indices + tcs;
1167               adapter->num_tx_queues = f->indices + tcs;
1168
1169               return true;
1170        }
1171
1172 #endif /* IXGBE_FCOE */
1173        adapter->num_rx_queues = tcs;
1174        adapter->num_tx_queues = tcs;
1175 #endif /* HAVE_MQ */
1176
1177        return true;
1178 }
1179
1180 /**
1181  * ixgbe_set_vmdq_queues: Allocate queues for VMDq devices
1182  * @adapter: board private structure to initialize
1183  *
1184  * When VMDq (Virtual Machine Devices queue) is enabled, allocate queues
1185  * and VM pools where appropriate.  If RSS is available, then also try and
1186  * enable RSS and map accordingly.
1187  *
1188  **/
1189 static bool ixgbe_set_vmdq_queues(struct ixgbe_adapter *adapter)
1190 {
1191        int vmdq_i = adapter->ring_feature[RING_F_VMDQ].indices;
1192        int vmdq_m = 0;
1193        int rss_i = adapter->ring_feature[RING_F_RSS].indices;
1194        unsigned long i;
1195        int rss_shift;
1196        bool ret = false;
1197
1198
1199        switch (adapter->flags & (IXGBE_FLAG_RSS_ENABLED
1200                                | IXGBE_FLAG_DCB_ENABLED
1201                                | IXGBE_FLAG_VMDQ_ENABLED)) {
1202
1203        case (IXGBE_FLAG_RSS_ENABLED | IXGBE_FLAG_VMDQ_ENABLED):
1204               switch (adapter->hw.mac.type) {
1205               case ixgbe_mac_82599EB:
1206               case ixgbe_mac_X540:
1207                      vmdq_i = min((int)IXGBE_MAX_VMDQ_INDICES, vmdq_i);
1208                      if (vmdq_i > 32)
1209                             rss_i = 2;
1210                      else
1211                             rss_i = 4;
1212                      i = rss_i;
1213                      rss_shift = find_first_bit(&i, sizeof(i) * 8);
1214                      vmdq_m = ((IXGBE_MAX_VMDQ_INDICES - 1) <<
1215                                rss_shift) & (MAX_RX_QUEUES - 1);
1216                      break;
1217               default:
1218                      break;
1219               }
1220               adapter->num_rx_queues = vmdq_i * rss_i;
1221               adapter->num_tx_queues = min((int)MAX_TX_QUEUES, vmdq_i * rss_i);
1222               ret = true;
1223               break;
1224
1225        case (IXGBE_FLAG_VMDQ_ENABLED):
1226               switch (adapter->hw.mac.type) {
1227               case ixgbe_mac_82598EB:
1228                      vmdq_m = (IXGBE_MAX_VMDQ_INDICES - 1);
1229                      break;
1230               case ixgbe_mac_82599EB:
1231               case ixgbe_mac_X540:
1232                      vmdq_m = (IXGBE_MAX_VMDQ_INDICES - 1) << 1;
1233                      break;
1234               default:
1235                      break;
1236               }
1237               adapter->num_rx_queues = vmdq_i;
1238               adapter->num_tx_queues = vmdq_i;
1239               ret = true;
1240               break;
1241
1242        default:
1243               ret = false;
1244               goto vmdq_queues_out;
1245        }
1246
1247        if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) {
1248               adapter->num_rx_pools = vmdq_i;
1249               adapter->num_rx_queues_per_pool = adapter->num_rx_queues /
1250                                             vmdq_i;
1251        } else {
1252               adapter->num_rx_pools = adapter->num_rx_queues;
1253               adapter->num_rx_queues_per_pool = 1;
1254        }
1255        /* save the mask for later use */
1256        adapter->ring_feature[RING_F_VMDQ].mask = vmdq_m;
1257 vmdq_queues_out:
1258        return ret;
1259 }
1260
1261 /**
1262  * ixgbe_set_rss_queues: Allocate queues for RSS
1263  * @adapter: board private structure to initialize
1264  *
1265  * This is our "base" multiqueue mode.  RSS (Receive Side Scaling) will try
1266  * to allocate one Rx queue per CPU, and if available, one Tx queue per CPU.
1267  *
1268  **/
1269 static bool ixgbe_set_rss_queues(struct ixgbe_adapter *adapter)
1270 {
1271        struct ixgbe_ring_feature *f;
1272
1273        if (!(adapter->flags & IXGBE_FLAG_RSS_ENABLED)) {
1274               adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
1275               return false;
1276        }
1277
1278        /* set mask for 16 queue limit of RSS */
1279        f = &adapter->ring_feature[RING_F_RSS];
1280        f->mask = 0xF;
1281
1282        /*
1283         * Use Flow Director in addition to RSS to ensure the best
1284         * distribution of flows across cores, even when an FDIR flow
1285         * isn't matched.
1286         */
1287        if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
1288               f = &adapter->ring_feature[RING_F_FDIR];
1289
1290               f->indices = min_t(int, num_online_cpus(), f->indices);
1291               f->mask = 0;
1292        }
1293
1294        adapter->num_rx_queues = f->indices;
1295 #ifdef HAVE_TX_MQ
1296        adapter->num_tx_queues = f->indices;
1297 #endif
1298
1299        return true;
1300 }
1301
1302 #ifdef IXGBE_FCOE
1303 /**
1304  * ixgbe_set_fcoe_queues: Allocate queues for Fiber Channel over Ethernet (FCoE)
1305  * @adapter: board private structure to initialize
1306  *
1307  * FCoE RX FCRETA can use up to 8 rx queues for up to 8 different exchanges.
1308  * The ring feature mask is not used as a mask for FCoE, as it can take any 8
1309  * rx queues out of the max number of rx queues, instead, it is used as the
1310  * index of the first rx queue used by FCoE.
1311  *
1312  **/
1313 static bool ixgbe_set_fcoe_queues(struct ixgbe_adapter *adapter)
1314 {
1315        struct ixgbe_ring_feature *f;
1316
1317        if (!(adapter->flags & IXGBE_FLAG_FCOE_ENABLED))
1318               return false;
1319
1320        ixgbe_set_rss_queues(adapter);
1321
1322        f = &adapter->ring_feature[RING_F_FCOE];
1323        f->indices = min_t(int, num_online_cpus(), f->indices);
1324
1325        /* adding FCoE queues */
1326        f->mask = adapter->num_rx_queues;
1327        adapter->num_rx_queues += f->indices;
1328        adapter->num_tx_queues += f->indices;
1329
1330        return true;
1331 }
1332
1333 #endif /* IXGBE_FCOE */
1334 /*
1335  * ixgbe_set_num_queues: Allocate queues for device, feature dependent
1336  * @adapter: board private structure to initialize
1337  *
1338  * This is the top level queue allocation routine.  The order here is very
1339  * important, starting with the "most" number of features turned on at once,
1340  * and ending with the smallest set of features.  This way large combinations
1341  * can be allocated if they're turned on, and smaller combinations are the
1342  * fallthrough conditions.
1343  *
1344  **/
1345 static void ixgbe_set_num_queues(struct ixgbe_adapter *adapter)
1346 {
1347        /* Start with base case */
1348        adapter->num_rx_queues = 1;
1349        adapter->num_tx_queues = 1;
1350        adapter->num_rx_pools = adapter->num_rx_queues;
1351        adapter->num_rx_queues_per_pool = 1;
1352
1353        if (ixgbe_set_vmdq_queues(adapter))
1354               return;
1355
1356        if (ixgbe_set_dcb_queues(adapter))
1357               return;
1358
1359 #ifdef IXGBE_FCOE
1360        if (ixgbe_set_fcoe_queues(adapter))
1361               return;
1362
1363 #endif /* IXGBE_FCOE */
1364        ixgbe_set_rss_queues(adapter);
1365 }
1366
1367 #endif
1368
1369
1370 /**
1371  * ixgbe_sw_init - Initialize general software structures (struct ixgbe_adapter)
1372  * @adapter: board private structure to initialize
1373  *
1374  * ixgbe_sw_init initializes the Adapter private data structure.
1375  * Fields are initialized based on PCI device information and
1376  * OS network device settings (MTU size).
1377  **/
1378 static int ixgbe_sw_init(struct ixgbe_adapter *adapter)
1379 {
1380         struct ixgbe_hw *hw = &adapter->hw;
1381         struct pci_dev *pdev = adapter->pdev;
1382         int err;
1383
1384         /* PCI config space info */
1385
1386         hw->vendor_id = pdev->vendor;
1387         hw->device_id = pdev->device;
1388         pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
1389         hw->subsystem_vendor_id = pdev->subsystem_vendor;
1390         hw->subsystem_device_id = pdev->subsystem_device;
1391
1392         err = ixgbe_init_shared_code(hw);
1393         if (err) {
1394                 e_err(probe, "init_shared_code failed: %d\n", err);
1395                 goto out;
1396         }
1397         adapter->mac_table = kzalloc(sizeof(struct ixgbe_mac_addr) *
1398                                      hw->mac.num_rar_entries,
1399                                      GFP_ATOMIC);
1400         /* Set capability flags */
1401         switch (hw->mac.type) {
1402         case ixgbe_mac_82598EB:
1403                 adapter->flags |= IXGBE_FLAG_MSI_CAPABLE |
1404                                   IXGBE_FLAG_MSIX_CAPABLE |
1405                                   IXGBE_FLAG_MQ_CAPABLE |
1406                                   IXGBE_FLAG_RSS_CAPABLE;
1407                 adapter->flags |= IXGBE_FLAG_DCB_CAPABLE;
1408 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
1409                 adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
1410 #endif
1411                 adapter->flags &= ~IXGBE_FLAG_SRIOV_CAPABLE;
1412                 adapter->flags2 &= ~IXGBE_FLAG2_RSC_CAPABLE;
1413
1414                 if (hw->device_id == IXGBE_DEV_ID_82598AT)
1415                         adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE;
1416
1417                 adapter->max_msix_q_vectors = IXGBE_MAX_MSIX_Q_VECTORS_82598;
1418                 break;
1419         case ixgbe_mac_X540:
1420                 adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
1421         case ixgbe_mac_82599EB:
1422                 adapter->flags |= IXGBE_FLAG_MSI_CAPABLE |
1423                                   IXGBE_FLAG_MSIX_CAPABLE |
1424                                   IXGBE_FLAG_MQ_CAPABLE |
1425                                   IXGBE_FLAG_RSS_CAPABLE;
1426                 adapter->flags |= IXGBE_FLAG_DCB_CAPABLE;
1427 #if defined(CONFIG_DCA) || defined(CONFIG_DCA_MODULE)
1428                 adapter->flags |= IXGBE_FLAG_DCA_CAPABLE;
1429 #endif
1430                 adapter->flags |= IXGBE_FLAG_SRIOV_CAPABLE;
1431                 adapter->flags2 |= IXGBE_FLAG2_RSC_CAPABLE;
1432 #ifdef IXGBE_FCOE
1433                 adapter->flags |= IXGBE_FLAG_FCOE_CAPABLE;
1434                 adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
1435                 adapter->ring_feature[RING_F_FCOE].indices = 0;
1436 #ifdef CONFIG_DCB
1437                 /* Default traffic class to use for FCoE */
1438                 adapter->fcoe.tc = IXGBE_FCOE_DEFTC;
1439                 adapter->fcoe.up = IXGBE_FCOE_DEFTC;
1440                 adapter->fcoe.up_set = IXGBE_FCOE_DEFTC;
1441 #endif
1442 #endif
1443                 if (hw->device_id == IXGBE_DEV_ID_82599_T3_LOM)
1444                         adapter->flags2 |= IXGBE_FLAG2_TEMP_SENSOR_CAPABLE;
1445 #ifndef IXGBE_NO_SMART_SPEED
1446                 hw->phy.smart_speed = ixgbe_smart_speed_on;
1447 #else
1448                 hw->phy.smart_speed = ixgbe_smart_speed_off;
1449 #endif
1450                 adapter->max_msix_q_vectors = IXGBE_MAX_MSIX_Q_VECTORS_82599;
1451         default:
1452                 break;
1453         }
1454
1455         /* n-tuple support exists, always init our spinlock */
1456         //spin_lock_init(&adapter->fdir_perfect_lock);
1457
1458         if (adapter->flags & IXGBE_FLAG_DCB_CAPABLE) {
1459                 int j;
1460                 struct ixgbe_dcb_tc_config *tc;
1461                 int dcb_i = IXGBE_DCB_MAX_TRAFFIC_CLASS;
1462
1463
1464                 adapter->dcb_cfg.num_tcs.pg_tcs = dcb_i;
1465                 adapter->dcb_cfg.num_tcs.pfc_tcs = dcb_i;
1466                 for (j = 0; j < dcb_i; j++) {
1467                         tc = &adapter->dcb_cfg.tc_config[j];
1468                         tc->path[IXGBE_DCB_TX_CONFIG].bwg_id = 0;
1469                         tc->path[IXGBE_DCB_TX_CONFIG].bwg_percent = 100 / dcb_i;
1470                         tc->path[IXGBE_DCB_RX_CONFIG].bwg_id = 0;
1471                         tc->path[IXGBE_DCB_RX_CONFIG].bwg_percent = 100 / dcb_i;
1472                         tc->pfc = ixgbe_dcb_pfc_disabled;
1473                         if (j == 0) {
1474                                 /* total of all TCs bandwidth needs to be 100 */
1475                                 tc->path[IXGBE_DCB_TX_CONFIG].bwg_percent +=
1476                                                                  100 % dcb_i;
1477                                 tc->path[IXGBE_DCB_RX_CONFIG].bwg_percent +=
1478                                                                  100 % dcb_i;
1479                         }
1480                 }
1481
1482                 /* Initialize default user to priority mapping, UPx->TC0 */
1483                 tc = &adapter->dcb_cfg.tc_config[0];
1484                 tc->path[IXGBE_DCB_TX_CONFIG].up_to_tc_bitmap = 0xFF;
1485                 tc->path[IXGBE_DCB_RX_CONFIG].up_to_tc_bitmap = 0xFF;
1486
1487                 adapter->dcb_cfg.bw_percentage[IXGBE_DCB_TX_CONFIG][0] = 100;
1488                 adapter->dcb_cfg.bw_percentage[IXGBE_DCB_RX_CONFIG][0] = 100;
1489                 adapter->dcb_cfg.rx_pba_cfg = ixgbe_dcb_pba_equal;
1490                 adapter->dcb_cfg.pfc_mode_enable = false;
1491                 adapter->dcb_cfg.round_robin_enable = false;
1492                 adapter->dcb_set_bitmap = 0x00;
1493 #ifdef CONFIG_DCB
1494                 adapter->dcbx_cap = DCB_CAP_DCBX_HOST | DCB_CAP_DCBX_VER_CEE;
1495 #endif /* CONFIG_DCB */
1496
1497                 if (hw->mac.type == ixgbe_mac_X540) {
1498                         adapter->dcb_cfg.num_tcs.pg_tcs = 4;
1499                         adapter->dcb_cfg.num_tcs.pfc_tcs = 4;
1500                 }
1501         }
1502 #ifdef CONFIG_DCB
1503         /* XXX does this need to be initialized even w/o DCB? */
1504         //memcpy(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
1505         //       sizeof(adapter->temp_dcb_cfg));
1506
1507 #endif
1508         //if (hw->mac.type == ixgbe_mac_82599EB ||
1509         //    hw->mac.type == ixgbe_mac_X540)
1510         //      hw->mbx.ops.init_params(hw);
1511
1512         /* default flow control settings */
1513         hw->fc.requested_mode = ixgbe_fc_full;
1514         hw->fc.current_mode = ixgbe_fc_full;    /* init for ethtool output */
1515
1516         adapter->last_lfc_mode = hw->fc.current_mode;
1517         ixgbe_pbthresh_setup(adapter);
1518         hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE;
1519         hw->fc.send_xon = true;
1520         hw->fc.disable_fc_autoneg = false;
1521
1522         /* set default ring sizes */
1523         adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
1524         adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
1525
1526         /* set default work limits */
1527         adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
1528         adapter->rx_work_limit = IXGBE_DEFAULT_RX_WORK;
1529
1530         set_bit(__IXGBE_DOWN, &adapter->state);
1531 out:
1532         return err;
1533 }
1534
1535 /**
1536  * ixgbe_setup_tx_resources - allocate Tx resources (Descriptors)
1537  * @tx_ring:    tx descriptor ring (for a specific queue) to setup
1538  *
1539  * Return 0 on success, negative on failure
1540  **/
1541 int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
1542 {
1543         struct device *dev = tx_ring->dev;
1544         //int orig_node = dev_to_node(dev);
1545         int numa_node = -1;
1546         int size;
1547
1548         size = sizeof(struct ixgbe_tx_buffer) * tx_ring->count;
1549
1550         if (tx_ring->q_vector)
1551                 numa_node = tx_ring->q_vector->numa_node;
1552
1553         tx_ring->tx_buffer_info = vzalloc_node(size, numa_node);
1554         if (!tx_ring->tx_buffer_info)
1555                 tx_ring->tx_buffer_info = vzalloc(size);
1556         if (!tx_ring->tx_buffer_info)
1557                 goto err;
1558
1559         /* round up to nearest 4K */
1560         tx_ring->size = tx_ring->count * sizeof(union ixgbe_adv_tx_desc);
1561         tx_ring->size = ALIGN(tx_ring->size, 4096);
1562
1563         //set_dev_node(dev, numa_node);
1564         //tx_ring->desc = dma_alloc_coherent(dev,
1565         //                                 tx_ring->size,
1566         //                                 &tx_ring->dma,
1567         //                                 GFP_KERNEL);
1568         //set_dev_node(dev, orig_node);
1569         //if (!tx_ring->desc)
1570         //      tx_ring->desc = dma_alloc_coherent(dev, tx_ring->size,
1571         //                                         &tx_ring->dma, GFP_KERNEL);
1572         //if (!tx_ring->desc)
1573         //      goto err;
1574
1575         return 0;
1576
1577 err:
1578         vfree(tx_ring->tx_buffer_info);
1579         tx_ring->tx_buffer_info = NULL;
1580         dev_err(dev, "Unable to allocate memory for the Tx descriptor ring\n");
1581         return -ENOMEM;
1582 }
1583
1584 /**
1585  * ixgbe_setup_all_tx_resources - allocate all queues Tx resources
1586  * @adapter: board private structure
1587  *
1588  * If this function returns with an error, then it's possible one or
1589  * more of the rings is populated (while the rest are not).  It is the
1590  * callers duty to clean those orphaned rings.
1591  *
1592  * Return 0 on success, negative on failure
1593  **/
1594 static int ixgbe_setup_all_tx_resources(struct ixgbe_adapter *adapter)
1595 {
1596         int i, err = 0;
1597
1598         for (i = 0; i < adapter->num_tx_queues; i++) {
1599                 err = ixgbe_setup_tx_resources(adapter->tx_ring[i]);
1600                 if (!err)
1601                         continue;
1602                 e_err(probe, "Allocation for Tx Queue %u failed\n", i);
1603                 break;
1604         }
1605
1606         return err;
1607 }
1608
1609 /**
1610  * ixgbe_setup_rx_resources - allocate Rx resources (Descriptors)
1611  * @rx_ring:    rx descriptor ring (for a specific queue) to setup
1612  *
1613  * Returns 0 on success, negative on failure
1614  **/
1615 int ixgbe_setup_rx_resources(struct ixgbe_ring *rx_ring)
1616 {
1617         struct device *dev = rx_ring->dev;
1618         //int orig_node = dev_to_node(dev);
1619         int numa_node = -1;
1620         int size;
1621
1622         size = sizeof(struct ixgbe_rx_buffer) * rx_ring->count;
1623
1624         if (rx_ring->q_vector)
1625                 numa_node = rx_ring->q_vector->numa_node;
1626
1627         rx_ring->rx_buffer_info = vzalloc_node(size, numa_node);
1628         if (!rx_ring->rx_buffer_info)
1629                 rx_ring->rx_buffer_info = vzalloc(size);
1630         if (!rx_ring->rx_buffer_info)
1631                 goto err;
1632
1633         /* Round up to nearest 4K */
1634         rx_ring->size = rx_ring->count * sizeof(union ixgbe_adv_rx_desc);
1635         rx_ring->size = ALIGN(rx_ring->size, 4096);
1636
1637 #ifdef NO_VNIC
1638         set_dev_node(dev, numa_node);
1639         rx_ring->desc = dma_alloc_coherent(dev,
1640                                            rx_ring->size,
1641                                            &rx_ring->dma,
1642                                            GFP_KERNEL);
1643         set_dev_node(dev, orig_node);
1644         if (!rx_ring->desc)
1645                 rx_ring->desc = dma_alloc_coherent(dev, rx_ring->size,
1646                                                    &rx_ring->dma, GFP_KERNEL);
1647         if (!rx_ring->desc)
1648                 goto err;
1649
1650 #ifndef CONFIG_IXGBE_DISABLE_PACKET_SPLIT
1651         ixgbe_init_rx_page_offset(rx_ring);
1652
1653 #endif
1654
1655 #endif /* NO_VNIC */
1656         return 0;
1657 err:
1658         vfree(rx_ring->rx_buffer_info);
1659         rx_ring->rx_buffer_info = NULL;
1660         dev_err(dev, "Unable to allocate memory for the Rx descriptor ring\n");
1661         return -ENOMEM;
1662 }
1663
1664 /**
1665  * ixgbe_setup_all_rx_resources - allocate all queues Rx resources
1666  * @adapter: board private structure
1667  *
1668  * If this function returns with an error, then it's possible one or
1669  * more of the rings is populated (while the rest are not).  It is the
1670  * callers duty to clean those orphaned rings.
1671  *
1672  * Return 0 on success, negative on failure
1673  **/
1674 static int ixgbe_setup_all_rx_resources(struct ixgbe_adapter *adapter)
1675 {
1676         int i, err = 0;
1677
1678         for (i = 0; i < adapter->num_rx_queues; i++) {
1679                 err = ixgbe_setup_rx_resources(adapter->rx_ring[i]);
1680                 if (!err)
1681                         continue;
1682                 e_err(probe, "Allocation for Rx Queue %u failed\n", i);
1683                 break;
1684         }
1685
1686         return err;
1687 }
1688
1689 /**
1690  * ixgbe_free_tx_resources - Free Tx Resources per Queue
1691  * @tx_ring: Tx descriptor ring for a specific queue
1692  *
1693  * Free all transmit software resources
1694  **/
1695 void ixgbe_free_tx_resources(struct ixgbe_ring *tx_ring)
1696 {
1697         //ixgbe_clean_tx_ring(tx_ring);
1698
1699         vfree(tx_ring->tx_buffer_info);
1700         tx_ring->tx_buffer_info = NULL;
1701
1702         /* if not set, then don't free */
1703         if (!tx_ring->desc)
1704                 return;
1705
1706         //dma_free_coherent(tx_ring->dev, tx_ring->size,
1707         //                tx_ring->desc, tx_ring->dma);
1708
1709         tx_ring->desc = NULL;
1710 }
1711
1712 /**
1713  * ixgbe_free_all_tx_resources - Free Tx Resources for All Queues
1714  * @adapter: board private structure
1715  *
1716  * Free all transmit software resources
1717  **/
1718 static void ixgbe_free_all_tx_resources(struct ixgbe_adapter *adapter)
1719 {
1720         int i;
1721
1722         for (i = 0; i < adapter->num_tx_queues; i++)
1723                 if (adapter->tx_ring[i]->desc)
1724                         ixgbe_free_tx_resources(adapter->tx_ring[i]);
1725 }
1726
1727 /**
1728  * ixgbe_free_rx_resources - Free Rx Resources
1729  * @rx_ring: ring to clean the resources from
1730  *
1731  * Free all receive software resources
1732  **/
1733 void ixgbe_free_rx_resources(struct ixgbe_ring *rx_ring)
1734 {
1735         //ixgbe_clean_rx_ring(rx_ring);
1736
1737         vfree(rx_ring->rx_buffer_info);
1738         rx_ring->rx_buffer_info = NULL;
1739
1740         /* if not set, then don't free */
1741         if (!rx_ring->desc)
1742                 return;
1743
1744         //dma_free_coherent(rx_ring->dev, rx_ring->size,
1745         //                rx_ring->desc, rx_ring->dma);
1746
1747         rx_ring->desc = NULL;
1748 }
1749
1750 /**
1751  * ixgbe_free_all_rx_resources - Free Rx Resources for All Queues
1752  * @adapter: board private structure
1753  *
1754  * Free all receive software resources
1755  **/
1756 static void ixgbe_free_all_rx_resources(struct ixgbe_adapter *adapter)
1757 {
1758         int i;
1759
1760         for (i = 0; i < adapter->num_rx_queues; i++)
1761                 if (adapter->rx_ring[i]->desc)
1762                         ixgbe_free_rx_resources(adapter->rx_ring[i]);
1763 }
1764
1765
1766 /**
1767  * ixgbe_open - Called when a network interface is made active
1768  * @netdev: network interface device structure
1769  *
1770  * Returns 0 on success, negative value on failure
1771  *
1772  * The open entry point is called when a network interface is made
1773  * active by the system (IFF_UP).  At this point all resources needed
1774  * for transmit and receive operations are allocated, the interrupt
1775  * handler is registered with the OS, the watchdog timer is started,
1776  * and the stack is notified that the interface is ready.
1777  **/
1778 //static
1779 int ixgbe_open(struct net_device *netdev)
1780 {
1781         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1782         int err;
1783
1784         /* disallow open during test */
1785         if (test_bit(__IXGBE_TESTING, &adapter->state))
1786                 return -EBUSY;
1787
1788         netif_carrier_off(netdev);
1789
1790         /* allocate transmit descriptors */
1791         err = ixgbe_setup_all_tx_resources(adapter);
1792         if (err)
1793                 goto err_setup_tx;
1794
1795         /* allocate receive descriptors */
1796         err = ixgbe_setup_all_rx_resources(adapter);
1797         if (err)
1798                 goto err_setup_rx;
1799
1800 #ifdef NO_VNIC
1801         ixgbe_configure(adapter);
1802
1803         err = ixgbe_request_irq(adapter);
1804         if (err)
1805                 goto err_req_irq;
1806
1807         ixgbe_up_complete(adapter);
1808
1809 err_req_irq:
1810 #else
1811         return 0;
1812 #endif
1813 err_setup_rx:
1814         ixgbe_free_all_rx_resources(adapter);
1815 err_setup_tx:
1816         ixgbe_free_all_tx_resources(adapter);
1817         ixgbe_reset(adapter);
1818
1819         return err;
1820 }
1821
1822 /**
1823  * ixgbe_close - Disables a network interface
1824  * @netdev: network interface device structure
1825  *
1826  * Returns 0, this is not allowed to fail
1827  *
1828  * The close entry point is called when an interface is de-activated
1829  * by the OS.  The hardware is still under the drivers control, but
1830  * needs to be disabled.  A global MAC reset is issued to stop the
1831  * hardware, and all transmit and receive resources are freed.
1832  **/
1833 //static
1834 int ixgbe_close(struct net_device *netdev)
1835 {
1836         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1837
1838         //ixgbe_down(adapter);
1839         //ixgbe_free_irq(adapter);
1840
1841         //ixgbe_fdir_filter_exit(adapter);
1842
1843         //ixgbe_free_all_tx_resources(adapter);
1844         //ixgbe_free_all_rx_resources(adapter);
1845
1846         ixgbe_release_hw_control(adapter);
1847
1848         return 0;
1849 }
1850
1851
1852
1853
1854
1855 /**
1856  * ixgbe_get_stats - Get System Network Statistics
1857  * @netdev: network interface device structure
1858  *
1859  * Returns the address of the device statistics structure.
1860  * The statistics are actually updated from the timer callback.
1861  **/
1862 //static
1863 struct net_device_stats *ixgbe_get_stats(struct net_device *netdev)
1864 {
1865         struct ixgbe_adapter *adapter = netdev_priv(netdev);
1866
1867         /* update the stats data */
1868         ixgbe_update_stats(adapter);
1869
1870 #ifdef HAVE_NETDEV_STATS_IN_NETDEV
1871         /* only return the current stats */
1872         return &netdev->stats;
1873 #else
1874         /* only return the current stats */
1875         return &adapter->net_stats;
1876 #endif /* HAVE_NETDEV_STATS_IN_NETDEV */
1877 }
1878
1879 /**
1880  * ixgbe_update_stats - Update the board statistics counters.
1881  * @adapter: board private structure
1882  **/
1883 void ixgbe_update_stats(struct ixgbe_adapter *adapter)
1884 {
1885 #ifdef HAVE_NETDEV_STATS_IN_NETDEV
1886         struct net_device_stats *net_stats = &adapter->netdev->stats;
1887 #else
1888         struct net_device_stats *net_stats = &adapter->net_stats;
1889 #endif /* HAVE_NETDEV_STATS_IN_NETDEV */
1890         struct ixgbe_hw *hw = &adapter->hw;
1891         struct ixgbe_hw_stats *hwstats = &adapter->stats;
1892         u64 total_mpc = 0;
1893         u32 i, missed_rx = 0, mpc, bprc, lxon, lxoff, xon_off_tot;
1894         u64 non_eop_descs = 0, restart_queue = 0, tx_busy = 0;
1895         u64 alloc_rx_page_failed = 0, alloc_rx_buff_failed = 0;
1896         u64 bytes = 0, packets = 0, hw_csum_rx_error = 0;
1897 #ifndef IXGBE_NO_LRO
1898         u32 flushed = 0, coal = 0;
1899         int num_q_vectors = 1;
1900 #endif
1901 #ifdef IXGBE_FCOE
1902         struct ixgbe_fcoe *fcoe = &adapter->fcoe;
1903         unsigned int cpu;
1904         u64 fcoe_noddp_counts_sum = 0, fcoe_noddp_ext_buff_counts_sum = 0;
1905 #endif /* IXGBE_FCOE */
1906
1907         printk(KERN_DEBUG "ixgbe_update_stats, tx_queues=%d, rx_queues=%d\n",
1908                         adapter->num_tx_queues, adapter->num_rx_queues);
1909
1910         if (test_bit(__IXGBE_DOWN, &adapter->state) ||
1911             test_bit(__IXGBE_RESETTING, &adapter->state))
1912                 return;
1913
1914 #ifndef IXGBE_NO_LRO
1915         if (adapter->flags & IXGBE_FLAG_MSIX_ENABLED)
1916                 num_q_vectors = adapter->num_msix_vectors - NON_Q_VECTORS;
1917
1918 #endif
1919         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
1920                 u64 rsc_count = 0;
1921                 u64 rsc_flush = 0;
1922                 for (i = 0; i < adapter->num_rx_queues; i++) {
1923                         rsc_count += adapter->rx_ring[i]->rx_stats.rsc_count;
1924                         rsc_flush += adapter->rx_ring[i]->rx_stats.rsc_flush;
1925                 }
1926                 adapter->rsc_total_count = rsc_count;
1927                 adapter->rsc_total_flush = rsc_flush;
1928         }
1929
1930 #ifndef IXGBE_NO_LRO
1931         for (i = 0; i < num_q_vectors; i++) {
1932                 struct ixgbe_q_vector *q_vector = adapter->q_vector[i];
1933                 if (!q_vector)
1934                         continue;
1935                 flushed += q_vector->lrolist.stats.flushed;
1936                 coal += q_vector->lrolist.stats.coal;
1937         }
1938         adapter->lro_stats.flushed = flushed;
1939         adapter->lro_stats.coal = coal;
1940
1941 #endif
1942         for (i = 0; i < adapter->num_rx_queues; i++) {
1943                 struct ixgbe_ring *rx_ring = adapter->rx_ring[i];
1944                 non_eop_descs += rx_ring->rx_stats.non_eop_descs;
1945                 alloc_rx_page_failed += rx_ring->rx_stats.alloc_rx_page_failed;
1946                 alloc_rx_buff_failed += rx_ring->rx_stats.alloc_rx_buff_failed;
1947                 hw_csum_rx_error += rx_ring->rx_stats.csum_err;
1948                 bytes += rx_ring->stats.bytes;
1949                 packets += rx_ring->stats.packets;
1950
1951         }
1952         adapter->non_eop_descs = non_eop_descs;
1953         adapter->alloc_rx_page_failed = alloc_rx_page_failed;
1954         adapter->alloc_rx_buff_failed = alloc_rx_buff_failed;
1955         adapter->hw_csum_rx_error = hw_csum_rx_error;
1956         net_stats->rx_bytes = bytes;
1957         net_stats->rx_packets = packets;
1958
1959         bytes = 0;
1960         packets = 0;
1961         /* gather some stats to the adapter struct that are per queue */
1962         for (i = 0; i < adapter->num_tx_queues; i++) {
1963                 struct ixgbe_ring *tx_ring = adapter->tx_ring[i];
1964                 restart_queue += tx_ring->tx_stats.restart_queue;
1965                 tx_busy += tx_ring->tx_stats.tx_busy;
1966                 bytes += tx_ring->stats.bytes;
1967                 packets += tx_ring->stats.packets;
1968         }
1969         adapter->restart_queue = restart_queue;
1970         adapter->tx_busy = tx_busy;
1971         net_stats->tx_bytes = bytes;
1972         net_stats->tx_packets = packets;
1973
1974         hwstats->crcerrs += IXGBE_READ_REG(hw, IXGBE_CRCERRS);
1975
1976         /* 8 register reads */
1977         for (i = 0; i < 8; i++) {
1978                 /* for packet buffers not used, the register should read 0 */
1979                 mpc = IXGBE_READ_REG(hw, IXGBE_MPC(i));
1980                 missed_rx += mpc;
1981                 hwstats->mpc[i] += mpc;
1982                 total_mpc += hwstats->mpc[i];
1983                 hwstats->pxontxc[i] += IXGBE_READ_REG(hw, IXGBE_PXONTXC(i));
1984                 hwstats->pxofftxc[i] += IXGBE_READ_REG(hw, IXGBE_PXOFFTXC(i));
1985                 switch (hw->mac.type) {
1986                 case ixgbe_mac_82598EB:
1987                         hwstats->rnbc[i] += IXGBE_READ_REG(hw, IXGBE_RNBC(i));
1988                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC(i));
1989                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC(i));
1990                         hwstats->pxonrxc[i] +=
1991                                 IXGBE_READ_REG(hw, IXGBE_PXONRXC(i));
1992                         break;
1993                 case ixgbe_mac_82599EB:
1994                 case ixgbe_mac_X540:
1995                         hwstats->pxonrxc[i] +=
1996                                 IXGBE_READ_REG(hw, IXGBE_PXONRXCNT(i));
1997                         break;
1998                 default:
1999                         break;
2000                 }
2001         }
2002
2003         /*16 register reads */
2004         for (i = 0; i < 16; i++) {
2005                 hwstats->qptc[i] += IXGBE_READ_REG(hw, IXGBE_QPTC(i));
2006                 hwstats->qprc[i] += IXGBE_READ_REG(hw, IXGBE_QPRC(i));
2007                 if ((hw->mac.type == ixgbe_mac_82599EB) ||
2008                     (hw->mac.type == ixgbe_mac_X540)) {
2009                         hwstats->qbtc[i] += IXGBE_READ_REG(hw, IXGBE_QBTC_L(i));
2010                         IXGBE_READ_REG(hw, IXGBE_QBTC_H(i)); /* to clear */
2011                         hwstats->qbrc[i] += IXGBE_READ_REG(hw, IXGBE_QBRC_L(i));
2012                         IXGBE_READ_REG(hw, IXGBE_QBRC_H(i)); /* to clear */
2013                 }
2014         }
2015
2016         hwstats->gprc += IXGBE_READ_REG(hw, IXGBE_GPRC);
2017         /* work around hardware counting issue */
2018         hwstats->gprc -= missed_rx;
2019
2020         ixgbe_update_xoff_received(adapter);
2021
2022         /* 82598 hardware only has a 32 bit counter in the high register */
2023         switch (hw->mac.type) {
2024         case ixgbe_mac_82598EB:
2025                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXC);
2026                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCH);
2027                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCH);
2028                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORH);
2029                 break;
2030         case ixgbe_mac_X540:
2031                 /* OS2BMC stats are X540 only*/
2032                 hwstats->o2bgptc += IXGBE_READ_REG(hw, IXGBE_O2BGPTC);
2033                 hwstats->o2bspc += IXGBE_READ_REG(hw, IXGBE_O2BSPC);
2034                 hwstats->b2ospc += IXGBE_READ_REG(hw, IXGBE_B2OSPC);
2035                 hwstats->b2ogprc += IXGBE_READ_REG(hw, IXGBE_B2OGPRC);
2036         case ixgbe_mac_82599EB:
2037                 for (i = 0; i < 16; i++)
2038                         adapter->hw_rx_no_dma_resources +=
2039                                              IXGBE_READ_REG(hw, IXGBE_QPRDC(i));
2040                 hwstats->gorc += IXGBE_READ_REG(hw, IXGBE_GORCL);
2041                 IXGBE_READ_REG(hw, IXGBE_GORCH); /* to clear */
2042                 hwstats->gotc += IXGBE_READ_REG(hw, IXGBE_GOTCL);
2043                 IXGBE_READ_REG(hw, IXGBE_GOTCH); /* to clear */
2044                 hwstats->tor += IXGBE_READ_REG(hw, IXGBE_TORL);
2045                 IXGBE_READ_REG(hw, IXGBE_TORH); /* to clear */
2046                 hwstats->lxonrxc += IXGBE_READ_REG(hw, IXGBE_LXONRXCNT);
2047 #ifdef HAVE_TX_MQ
2048                 hwstats->fdirmatch += IXGBE_READ_REG(hw, IXGBE_FDIRMATCH);
2049                 hwstats->fdirmiss += IXGBE_READ_REG(hw, IXGBE_FDIRMISS);
2050 #endif /* HAVE_TX_MQ */
2051 #ifdef IXGBE_FCOE
2052                 hwstats->fccrc += IXGBE_READ_REG(hw, IXGBE_FCCRC);
2053                 hwstats->fclast += IXGBE_READ_REG(hw, IXGBE_FCLAST);
2054                 hwstats->fcoerpdc += IXGBE_READ_REG(hw, IXGBE_FCOERPDC);
2055                 hwstats->fcoeprc += IXGBE_READ_REG(hw, IXGBE_FCOEPRC);
2056                 hwstats->fcoeptc += IXGBE_READ_REG(hw, IXGBE_FCOEPTC);
2057                 hwstats->fcoedwrc += IXGBE_READ_REG(hw, IXGBE_FCOEDWRC);
2058                 hwstats->fcoedwtc += IXGBE_READ_REG(hw, IXGBE_FCOEDWTC);
2059                 /* Add up per cpu counters for total ddp aloc fail */
2060                 if (fcoe && fcoe->pcpu_noddp && fcoe->pcpu_noddp_ext_buff) {
2061                         for_each_possible_cpu(cpu) {
2062                                 fcoe_noddp_counts_sum +=
2063                                         *per_cpu_ptr(fcoe->pcpu_noddp, cpu);
2064                                 fcoe_noddp_ext_buff_counts_sum +=
2065                                         *per_cpu_ptr(fcoe->
2066                                                 pcpu_noddp_ext_buff, cpu);
2067                         }
2068                 }
2069                 hwstats->fcoe_noddp = fcoe_noddp_counts_sum;
2070                 hwstats->fcoe_noddp_ext_buff = fcoe_noddp_ext_buff_counts_sum;
2071
2072 #endif /* IXGBE_FCOE */
2073                 break;
2074         default:
2075                 break;
2076         }
2077         bprc = IXGBE_READ_REG(hw, IXGBE_BPRC);
2078         hwstats->bprc += bprc;
2079         hwstats->mprc += IXGBE_READ_REG(hw, IXGBE_MPRC);
2080         if (hw->mac.type == ixgbe_mac_82598EB)
2081                 hwstats->mprc -= bprc;
2082         hwstats->roc += IXGBE_READ_REG(hw, IXGBE_ROC);
2083         hwstats->prc64 += IXGBE_READ_REG(hw, IXGBE_PRC64);
2084         hwstats->prc127 += IXGBE_READ_REG(hw, IXGBE_PRC127);
2085         hwstats->prc255 += IXGBE_READ_REG(hw, IXGBE_PRC255);
2086         hwstats->prc511 += IXGBE_READ_REG(hw, IXGBE_PRC511);
2087         hwstats->prc1023 += IXGBE_READ_REG(hw, IXGBE_PRC1023);
2088         hwstats->prc1522 += IXGBE_READ_REG(hw, IXGBE_PRC1522);
2089         hwstats->rlec += IXGBE_READ_REG(hw, IXGBE_RLEC);
2090         lxon = IXGBE_READ_REG(hw, IXGBE_LXONTXC);
2091         hwstats->lxontxc += lxon;
2092         lxoff = IXGBE_READ_REG(hw, IXGBE_LXOFFTXC);
2093         hwstats->lxofftxc += lxoff;
2094         hwstats->gptc += IXGBE_READ_REG(hw, IXGBE_GPTC);
2095         hwstats->mptc += IXGBE_READ_REG(hw, IXGBE_MPTC);
2096         /*
2097          * 82598 errata - tx of flow control packets is included in tx counters
2098          */
2099         xon_off_tot = lxon + lxoff;
2100         hwstats->gptc -= xon_off_tot;
2101         hwstats->mptc -= xon_off_tot;
2102         hwstats->gotc -= (xon_off_tot * (ETH_ZLEN + ETH_FCS_LEN));
2103         hwstats->ruc += IXGBE_READ_REG(hw, IXGBE_RUC);
2104         hwstats->rfc += IXGBE_READ_REG(hw, IXGBE_RFC);
2105         hwstats->rjc += IXGBE_READ_REG(hw, IXGBE_RJC);
2106         hwstats->tpr += IXGBE_READ_REG(hw, IXGBE_TPR);
2107         hwstats->ptc64 += IXGBE_READ_REG(hw, IXGBE_PTC64);
2108         hwstats->ptc64 -= xon_off_tot;
2109         hwstats->ptc127 += IXGBE_READ_REG(hw, IXGBE_PTC127);
2110         hwstats->ptc255 += IXGBE_READ_REG(hw, IXGBE_PTC255);
2111         hwstats->ptc511 += IXGBE_READ_REG(hw, IXGBE_PTC511);
2112         hwstats->ptc1023 += IXGBE_READ_REG(hw, IXGBE_PTC1023);
2113         hwstats->ptc1522 += IXGBE_READ_REG(hw, IXGBE_PTC1522);
2114         hwstats->bptc += IXGBE_READ_REG(hw, IXGBE_BPTC);
2115         /* Fill out the OS statistics structure */
2116         net_stats->multicast = hwstats->mprc;
2117
2118         /* Rx Errors */
2119         net_stats->rx_errors = hwstats->crcerrs +
2120                                        hwstats->rlec;
2121         net_stats->rx_dropped = 0;
2122         net_stats->rx_length_errors = hwstats->rlec;
2123         net_stats->rx_crc_errors = hwstats->crcerrs;
2124         net_stats->rx_missed_errors = total_mpc;
2125
2126         /*
2127          * VF Stats Collection - skip while resetting because these
2128          * are not clear on read and otherwise you'll sometimes get
2129          * crazy values.
2130          */
2131         if (!test_bit(__IXGBE_RESETTING, &adapter->state)) {
2132                 for (i = 0; i < adapter->num_vfs; i++) {
2133                         UPDATE_VF_COUNTER_32bit(IXGBE_PVFGPRC(i),             \
2134                                         adapter->vfinfo[i].last_vfstats.gprc, \
2135                                         adapter->vfinfo[i].vfstats.gprc);
2136                         UPDATE_VF_COUNTER_32bit(IXGBE_PVFGPTC(i),             \
2137                                         adapter->vfinfo[i].last_vfstats.gptc, \
2138                                         adapter->vfinfo[i].vfstats.gptc);
2139                         UPDATE_VF_COUNTER_36bit(IXGBE_PVFGORC_LSB(i),         \
2140                                         IXGBE_PVFGORC_MSB(i),                 \
2141                                         adapter->vfinfo[i].last_vfstats.gorc, \
2142                                         adapter->vfinfo[i].vfstats.gorc);
2143                         UPDATE_VF_COUNTER_36bit(IXGBE_PVFGOTC_LSB(i),         \
2144                                         IXGBE_PVFGOTC_MSB(i),                 \
2145                                         adapter->vfinfo[i].last_vfstats.gotc, \
2146                                         adapter->vfinfo[i].vfstats.gotc);
2147                         UPDATE_VF_COUNTER_32bit(IXGBE_PVFMPRC(i),             \
2148                                         adapter->vfinfo[i].last_vfstats.mprc, \
2149                                         adapter->vfinfo[i].vfstats.mprc);
2150                 }
2151         }
2152 }
2153
2154
2155 #ifdef NO_VNIC
2156
2157 /**
2158  * ixgbe_watchdog_update_link - update the link status
2159  * @adapter - pointer to the device adapter structure
2160  * @link_speed - pointer to a u32 to store the link_speed
2161  **/
2162 static void ixgbe_watchdog_update_link(struct ixgbe_adapter *adapter)
2163 {
2164         struct ixgbe_hw *hw = &adapter->hw;
2165         u32 link_speed = adapter->link_speed;
2166         bool link_up = adapter->link_up;
2167         bool pfc_en = adapter->dcb_cfg.pfc_mode_enable;
2168
2169         if (!(adapter->flags & IXGBE_FLAG_NEED_LINK_UPDATE))
2170                 return;
2171
2172         if (hw->mac.ops.check_link) {
2173                 hw->mac.ops.check_link(hw, &link_speed, &link_up, false);
2174         } else {
2175                 /* always assume link is up, if no check link function */
2176                 link_speed = IXGBE_LINK_SPEED_10GB_FULL;
2177                 link_up = true;
2178         }
2179
2180 #ifdef HAVE_DCBNL_IEEE
2181         if (adapter->ixgbe_ieee_pfc)
2182                 pfc_en |= !!(adapter->ixgbe_ieee_pfc->pfc_en);
2183
2184 #endif
2185         if (link_up && !((adapter->flags & IXGBE_FLAG_DCB_ENABLED) && pfc_en)) {
2186                 hw->mac.ops.fc_enable(hw);
2187                 //ixgbe_set_rx_drop_en(adapter);
2188         }
2189
2190         if (link_up ||
2191             time_after(jiffies, (adapter->link_check_timeout +
2192                                  IXGBE_TRY_LINK_TIMEOUT))) {
2193                 adapter->flags &= ~IXGBE_FLAG_NEED_LINK_UPDATE;
2194                 IXGBE_WRITE_REG(hw, IXGBE_EIMS, IXGBE_EIMC_LSC);
2195                 IXGBE_WRITE_FLUSH(hw);
2196         }
2197
2198         adapter->link_up = link_up;
2199         adapter->link_speed = link_speed;
2200 }
2201 #endif
2202
2203
2204
2205 #ifdef NO_VNIC
2206
2207 /**
2208  * ixgbe_service_task - manages and runs subtasks
2209  * @work: pointer to work_struct containing our data
2210  **/
2211 static void ixgbe_service_task(struct work_struct *work)
2212 {
2213         //struct ixgbe_adapter *adapter = container_of(work,
2214         //                                           struct ixgbe_adapter,
2215         //                                           service_task);
2216
2217         //ixgbe_reset_subtask(adapter);
2218         //ixgbe_sfp_detection_subtask(adapter);
2219         //ixgbe_sfp_link_config_subtask(adapter);
2220         //ixgbe_check_overtemp_subtask(adapter);
2221         //ixgbe_watchdog_subtask(adapter);
2222 #ifdef HAVE_TX_MQ
2223         //ixgbe_fdir_reinit_subtask(adapter);
2224 #endif
2225         //ixgbe_check_hang_subtask(adapter);
2226
2227         //ixgbe_service_event_complete(adapter);
2228 }
2229
2230
2231
2232
2233 #define IXGBE_TXD_CMD (IXGBE_TXD_CMD_EOP | \
2234                        IXGBE_TXD_CMD_RS)
2235
2236
2237 /**
2238  * ixgbe_set_mac - Change the Ethernet Address of the NIC
2239  * @netdev: network interface device structure
2240  * @p: pointer to an address structure
2241  *
2242  * Returns 0 on success, negative on failure
2243  **/
2244 static int ixgbe_set_mac(struct net_device *netdev, void *p)
2245 {
2246         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2247         struct ixgbe_hw *hw = &adapter->hw;
2248         struct sockaddr *addr = p;
2249         int ret;
2250
2251         if (!is_valid_ether_addr(addr->sa_data))
2252                 return -EADDRNOTAVAIL;
2253
2254         ixgbe_del_mac_filter(adapter, hw->mac.addr,
2255                              adapter->num_vfs);
2256         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2257         memcpy(hw->mac.addr, addr->sa_data, netdev->addr_len);
2258
2259
2260         /* set the correct pool for the new PF MAC address in entry 0 */
2261         ret = ixgbe_add_mac_filter(adapter, hw->mac.addr,
2262                                     adapter->num_vfs);
2263         return ret > 0 ? 0 : ret;
2264 }
2265
2266
2267 /**
2268  * ixgbe_ioctl -
2269  * @netdev:
2270  * @ifreq:
2271  * @cmd:
2272  **/
2273 static int ixgbe_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
2274 {
2275         switch (cmd) {
2276 #ifdef ETHTOOL_OPS_COMPAT
2277         case SIOCETHTOOL:
2278                 return ethtool_ioctl(ifr);
2279 #endif
2280         default:
2281                 return -EOPNOTSUPP;
2282         }
2283 }
2284 #endif /* NO_VNIC */
2285
2286
2287 void ixgbe_do_reset(struct net_device *netdev)
2288 {
2289         struct ixgbe_adapter *adapter = netdev_priv(netdev);
2290
2291         if (netif_running(netdev))
2292                 ixgbe_reinit_locked(adapter);
2293         else
2294                 ixgbe_reset(adapter);
2295 }
2296
2297
2298
2299
2300
2301
2302 /**
2303  * ixgbe_probe - Device Initialization Routine
2304  * @pdev: PCI device information struct
2305  * @ent: entry in ixgbe_pci_tbl
2306  *
2307  * Returns 0 on success, negative on failure
2308  *
2309  * ixgbe_probe initializes an adapter identified by a pci_dev structure.
2310  * The OS initialization, configuring of the adapter private structure,
2311  * and a hardware reset occur.
2312  **/
2313 //static
2314 int ixgbe_kni_probe(struct pci_dev *pdev,
2315                                  struct net_device **lad_dev)
2316 {
2317         size_t count;
2318         struct net_device *netdev;
2319         struct ixgbe_adapter *adapter = NULL;
2320         struct ixgbe_hw *hw = NULL;
2321         static int cards_found;
2322         int i, err;
2323         u16 offset;
2324         u16 eeprom_verh, eeprom_verl, eeprom_cfg_blkh, eeprom_cfg_blkl;
2325         u32 etrack_id;
2326         u16 build, major, patch;
2327         char *info_string, *i_s_var;
2328         u8 part_str[IXGBE_PBANUM_LENGTH];
2329         enum ixgbe_mac_type mac_type = ixgbe_mac_unknown;
2330 #ifdef HAVE_TX_MQ
2331         unsigned int indices = num_possible_cpus();
2332 #endif /* HAVE_TX_MQ */
2333 #ifdef IXGBE_FCOE
2334         u16 device_caps;
2335 #endif
2336         u16 wol_cap;
2337
2338         err = pci_enable_device_mem(pdev);
2339         if (err)
2340                 return err;
2341
2342
2343 #ifdef NO_VNIC
2344         err = pci_request_selected_regions(pdev, pci_select_bars(pdev,
2345                                            IORESOURCE_MEM), ixgbe_driver_name);
2346         if (err) {
2347                 dev_err(pci_dev_to_dev(pdev),
2348                         "pci_request_selected_regions failed 0x%x\n", err);
2349                 goto err_pci_reg;
2350         }
2351 #endif
2352
2353         /*
2354          * The mac_type is needed before we have the adapter is  set up
2355          * so rather than maintain two devID -> MAC tables we dummy up
2356          * an ixgbe_hw stuct and use ixgbe_set_mac_type.
2357          */
2358         hw = vmalloc(sizeof(struct ixgbe_hw));
2359         if (!hw) {
2360                 pr_info("Unable to allocate memory for early mac "
2361                         "check\n");
2362         } else {
2363                 hw->vendor_id = pdev->vendor;
2364                 hw->device_id = pdev->device;
2365                 ixgbe_set_mac_type(hw);
2366                 mac_type = hw->mac.type;
2367                 vfree(hw);
2368         }
2369
2370 #ifdef NO_VNIC
2371         /*
2372          * Workaround of Silicon errata on 82598. Disable LOs in the PCI switch
2373          * port to which the 82598 is connected to prevent duplicate
2374          * completions caused by LOs.  We need the mac type so that we only
2375          * do this on 82598 devices, ixgbe_set_mac_type does this for us if
2376          * we set it's device ID.
2377          */
2378         if (mac_type == ixgbe_mac_82598EB)
2379                 pci_disable_link_state(pdev, PCIE_LINK_STATE_L0S);
2380
2381         pci_enable_pcie_error_reporting(pdev);
2382
2383         pci_set_master(pdev);
2384 #endif
2385
2386 #ifdef HAVE_TX_MQ
2387 #ifdef CONFIG_DCB
2388 #ifdef HAVE_MQPRIO
2389         indices *= IXGBE_DCB_MAX_TRAFFIC_CLASS;
2390 #else
2391         indices = max_t(unsigned int, indices, IXGBE_MAX_DCB_INDICES);
2392 #endif /* HAVE_MQPRIO */
2393 #endif /* CONFIG_DCB */
2394
2395         if (mac_type == ixgbe_mac_82598EB)
2396                 indices = min_t(unsigned int, indices, IXGBE_MAX_RSS_INDICES);
2397         else
2398                 indices = min_t(unsigned int, indices, IXGBE_MAX_FDIR_INDICES);
2399
2400 #ifdef IXGBE_FCOE
2401         indices += min_t(unsigned int, num_possible_cpus(),
2402                          IXGBE_MAX_FCOE_INDICES);
2403 #endif
2404         netdev = alloc_etherdev_mq(sizeof(struct ixgbe_adapter), indices);
2405 #else /* HAVE_TX_MQ */
2406         netdev = alloc_etherdev(sizeof(struct ixgbe_adapter));
2407 #endif /* HAVE_TX_MQ */
2408         if (!netdev) {
2409                 err = -ENOMEM;
2410                 goto err_alloc_etherdev;
2411         }
2412
2413         SET_NETDEV_DEV(netdev, &pdev->dev);
2414
2415         adapter = netdev_priv(netdev);
2416         //pci_set_drvdata(pdev, adapter);
2417
2418         adapter->netdev = netdev;
2419         adapter->pdev = pdev;
2420         hw = &adapter->hw;
2421         hw->back = adapter;
2422         adapter->msg_enable = (1 << DEFAULT_DEBUG_LEVEL_SHIFT) - 1;
2423
2424 #ifdef HAVE_PCI_ERS
2425         /*
2426          * call save state here in standalone driver because it relies on
2427          * adapter struct to exist, and needs to call netdev_priv
2428          */
2429         pci_save_state(pdev);
2430
2431 #endif
2432         hw->hw_addr = ioremap(pci_resource_start(pdev, 0),
2433                               pci_resource_len(pdev, 0));
2434         if (!hw->hw_addr) {
2435                 err = -EIO;
2436                 goto err_ioremap;
2437         }
2438         //ixgbe_assign_netdev_ops(netdev);
2439         ixgbe_set_ethtool_ops(netdev);
2440
2441         strlcpy(netdev->name, pci_name(pdev), sizeof(netdev->name));
2442
2443         adapter->bd_number = cards_found;
2444
2445         /* setup the private structure */
2446         err = ixgbe_sw_init(adapter);
2447         if (err)
2448                 goto err_sw_init;
2449
2450         /* Make it possible the adapter to be woken up via WOL */
2451         switch (adapter->hw.mac.type) {
2452         case ixgbe_mac_82599EB:
2453         case ixgbe_mac_X540:
2454                 IXGBE_WRITE_REG(&adapter->hw, IXGBE_WUS, ~0);
2455                 break;
2456         default:
2457                 break;
2458         }
2459
2460         /*
2461          * check_options must be called before setup_link to set up
2462          * hw->fc completely
2463          */
2464         //ixgbe_check_options(adapter);
2465
2466 #ifndef NO_VNIC
2467         /* reset_hw fills in the perm_addr as well */
2468         hw->phy.reset_if_overtemp = true;
2469         err = hw->mac.ops.reset_hw(hw);
2470         hw->phy.reset_if_overtemp = false;
2471         if (err == IXGBE_ERR_SFP_NOT_PRESENT &&
2472             hw->mac.type == ixgbe_mac_82598EB) {
2473                 err = 0;
2474         } else if (err == IXGBE_ERR_SFP_NOT_SUPPORTED) {
2475                 e_dev_err("failed to load because an unsupported SFP+ "
2476                           "module type was detected.\n");
2477                 e_dev_err("Reload the driver after installing a supported "
2478                           "module.\n");
2479                 goto err_sw_init;
2480         } else if (err) {
2481                 e_dev_err("HW Init failed: %d\n", err);
2482                 goto err_sw_init;
2483         }
2484 #endif
2485
2486         //if (adapter->flags & IXGBE_FLAG_SRIOV_ENABLED)
2487         //      ixgbe_probe_vf(adapter);
2488
2489
2490 #ifdef MAX_SKB_FRAGS
2491         netdev->features |= NETIF_F_SG |
2492                             NETIF_F_IP_CSUM;
2493
2494 #ifdef NETIF_F_IPV6_CSUM
2495         netdev->features |= NETIF_F_IPV6_CSUM;
2496 #endif
2497
2498 #ifdef NETIF_F_HW_VLAN_TX
2499         netdev->features |= NETIF_F_HW_VLAN_TX |
2500                             NETIF_F_HW_VLAN_RX;
2501 #endif
2502 #ifdef NETIF_F_TSO
2503         netdev->features |= NETIF_F_TSO;
2504 #endif /* NETIF_F_TSO */
2505 #ifdef NETIF_F_TSO6
2506         netdev->features |= NETIF_F_TSO6;
2507 #endif /* NETIF_F_TSO6 */
2508 #ifdef NETIF_F_RXHASH
2509         netdev->features |= NETIF_F_RXHASH;
2510 #endif /* NETIF_F_RXHASH */
2511
2512 #ifdef HAVE_NDO_SET_FEATURES
2513         netdev->features |= NETIF_F_RXCSUM;
2514
2515         /* copy netdev features into list of user selectable features */
2516         netdev->hw_features |= netdev->features;
2517
2518         /* give us the option of enabling RSC/LRO later */
2519 #ifdef IXGBE_NO_LRO
2520         if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE)
2521 #endif
2522                 netdev->hw_features |= NETIF_F_LRO;
2523
2524 #else
2525 #ifdef NETIF_F_GRO
2526
2527         /* this is only needed on kernels prior to 2.6.39 */
2528         netdev->features |= NETIF_F_GRO;
2529 #endif /* NETIF_F_GRO */
2530 #endif
2531
2532 #ifdef NETIF_F_HW_VLAN_TX
2533         /* set this bit last since it cannot be part of hw_features */
2534         netdev->features |= NETIF_F_HW_VLAN_FILTER;
2535 #endif
2536         switch (adapter->hw.mac.type) {
2537         case ixgbe_mac_82599EB:
2538         case ixgbe_mac_X540:
2539                 netdev->features |= NETIF_F_SCTP_CSUM;
2540 #ifdef HAVE_NDO_SET_FEATURES
2541                 netdev->hw_features |= NETIF_F_SCTP_CSUM |
2542                                        NETIF_F_NTUPLE;
2543 #endif
2544                 break;
2545         default:
2546                 break;
2547         }
2548
2549 #ifdef HAVE_NETDEV_VLAN_FEATURES
2550         netdev->vlan_features |= NETIF_F_SG |
2551                                  NETIF_F_IP_CSUM |
2552                                  NETIF_F_IPV6_CSUM |
2553                                  NETIF_F_TSO |
2554                                  NETIF_F_TSO6;
2555
2556 #endif /* HAVE_NETDEV_VLAN_FEATURES */
2557         /*
2558          * If perfect filters were enabled in check_options(), enable them
2559          * on the netdevice too.
2560          */
2561         if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE)
2562                 netdev->features |= NETIF_F_NTUPLE;
2563         if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED)
2564                 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2565         if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
2566                 adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2567         if (adapter->flags & IXGBE_FLAG_VMDQ_ENABLED) {
2568                 adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
2569                 /* clear n-tuple support in the netdev unconditionally */
2570                 netdev->features &= ~NETIF_F_NTUPLE;
2571         }
2572
2573 #ifdef NETIF_F_RXHASH
2574         if (!(adapter->flags & IXGBE_FLAG_RSS_ENABLED))
2575                 netdev->features &= ~NETIF_F_RXHASH;
2576
2577 #endif /* NETIF_F_RXHASH */
2578         if (netdev->features & NETIF_F_LRO) {
2579                 if ((adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) &&
2580                     ((adapter->rx_itr_setting == 1) ||
2581                      (adapter->rx_itr_setting > IXGBE_MIN_RSC_ITR))) {
2582                         adapter->flags2 |= IXGBE_FLAG2_RSC_ENABLED;
2583                 } else if (adapter->flags2 & IXGBE_FLAG2_RSC_CAPABLE) {
2584 #ifdef IXGBE_NO_LRO
2585                         e_info(probe, "InterruptThrottleRate set too high, "
2586                                "disabling RSC\n");
2587 #else
2588                         e_info(probe, "InterruptThrottleRate set too high, "
2589                                "falling back to software LRO\n");
2590 #endif
2591                 }
2592         }
2593 #ifdef CONFIG_DCB
2594         //netdev->dcbnl_ops = &dcbnl_ops;
2595 #endif
2596
2597 #ifdef IXGBE_FCOE
2598 #ifdef NETIF_F_FSO
2599         if (adapter->flags & IXGBE_FLAG_FCOE_CAPABLE) {
2600                 ixgbe_get_device_caps(hw, &device_caps);
2601                 if (device_caps & IXGBE_DEVICE_CAPS_FCOE_OFFLOADS) {
2602                         adapter->flags &= ~IXGBE_FLAG_FCOE_ENABLED;
2603                         adapter->flags &= ~IXGBE_FLAG_FCOE_CAPABLE;
2604                         e_info(probe, "FCoE offload feature is not available. "
2605                                "Disabling FCoE offload feature\n");
2606                 }
2607 #ifndef HAVE_NETDEV_OPS_FCOE_ENABLE
2608                 else {
2609                         adapter->flags |= IXGBE_FLAG_FCOE_ENABLED;
2610                         adapter->ring_feature[RING_F_FCOE].indices =
2611                                 IXGBE_FCRETA_SIZE;
2612                         netdev->features |= NETIF_F_FSO |
2613                                             NETIF_F_FCOE_CRC |
2614                                             NETIF_F_FCOE_MTU;
2615                         netdev->fcoe_ddp_xid = IXGBE_FCOE_DDP_MAX - 1;
2616                 }
2617 #endif /* HAVE_NETDEV_OPS_FCOE_ENABLE */
2618 #ifdef HAVE_NETDEV_VLAN_FEATURES
2619                 netdev->vlan_features |= NETIF_F_FSO |
2620                                          NETIF_F_FCOE_CRC |
2621                                          NETIF_F_FCOE_MTU;
2622 #endif /* HAVE_NETDEV_VLAN_FEATURES */
2623         }
2624 #endif /* NETIF_F_FSO */
2625 #endif /* IXGBE_FCOE */
2626
2627 #endif /* MAX_SKB_FRAGS */
2628         /* make sure the EEPROM is good */
2629         if (hw->eeprom.ops.validate_checksum &&
2630             (hw->eeprom.ops.validate_checksum(hw, NULL) < 0)) {
2631                 e_dev_err("The EEPROM Checksum Is Not Valid\n");
2632                 err = -EIO;
2633                 goto err_sw_init;
2634         }
2635
2636         memcpy(netdev->dev_addr, hw->mac.perm_addr, netdev->addr_len);
2637 #ifdef ETHTOOL_GPERMADDR
2638         memcpy(netdev->perm_addr, hw->mac.perm_addr, netdev->addr_len);
2639
2640         if (ixgbe_validate_mac_addr(netdev->perm_addr)) {
2641                 e_dev_err("invalid MAC address\n");
2642                 err = -EIO;
2643                 goto err_sw_init;
2644         }
2645 #else
2646         if (ixgbe_validate_mac_addr(netdev->dev_addr)) {
2647                 e_dev_err("invalid MAC address\n");
2648                 err = -EIO;
2649                 goto err_sw_init;
2650         }
2651 #endif
2652         memcpy(&adapter->mac_table[0].addr, hw->mac.perm_addr,
2653                netdev->addr_len);
2654         adapter->mac_table[0].queue = adapter->num_vfs;
2655         adapter->mac_table[0].state = (IXGBE_MAC_STATE_DEFAULT |
2656                                        IXGBE_MAC_STATE_IN_USE);
2657         hw->mac.ops.set_rar(hw, 0, adapter->mac_table[0].addr,
2658                             adapter->mac_table[0].queue,
2659                             IXGBE_RAH_AV);
2660
2661         //setup_timer(&adapter->service_timer, &ixgbe_service_timer,
2662         //          (unsigned long) adapter);
2663
2664         //INIT_WORK(&adapter->service_task, ixgbe_service_task);
2665         //clear_bit(__IXGBE_SERVICE_SCHED, &adapter->state);
2666
2667         //err = ixgbe_init_interrupt_scheme(adapter);
2668         //if (err)
2669         //      goto err_sw_init;
2670
2671         //adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
2672         ixgbe_set_num_queues(adapter);
2673
2674         adapter->wol = 0;
2675         /* WOL not supported for all but the following */
2676         switch (pdev->device) {
2677         case IXGBE_DEV_ID_82599_SFP:
2678                 /* Only these subdevice supports WOL */
2679                 switch (pdev->subsystem_device) {
2680                 case IXGBE_SUBDEV_ID_82599_560FLR:
2681                         /* only support first port */
2682                         if (hw->bus.func != 0)
2683                                 break;
2684                 case IXGBE_SUBDEV_ID_82599_SFP:
2685                         adapter->wol = IXGBE_WUFC_MAG;
2686                         break;
2687                 }
2688                 break;
2689         case IXGBE_DEV_ID_82599_COMBO_BACKPLANE:
2690                 /* All except this subdevice support WOL */
2691                 if (pdev->subsystem_device != IXGBE_SUBDEV_ID_82599_KX4_KR_MEZZ)
2692                         adapter->wol = IXGBE_WUFC_MAG;
2693                 break;
2694         case IXGBE_DEV_ID_82599_KX4:
2695                 adapter->wol = IXGBE_WUFC_MAG;
2696                 break;
2697         case IXGBE_DEV_ID_X540T:
2698                 /* Check eeprom to see if it is enabled */
2699                 ixgbe_read_eeprom(hw, 0x2c, &adapter->eeprom_cap);
2700                 wol_cap = adapter->eeprom_cap & IXGBE_DEVICE_CAPS_WOL_MASK;
2701
2702                 if ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0_1) ||
2703                     ((wol_cap == IXGBE_DEVICE_CAPS_WOL_PORT0) &&
2704                      (hw->bus.func == 0)))
2705                         adapter->wol = IXGBE_WUFC_MAG;
2706                 break;
2707         }
2708         //device_set_wakeup_enable(&adapter->pdev->dev, adapter->wol);
2709
2710
2711         /*
2712          * Save off EEPROM version number and Option Rom version which
2713          * together make a unique identify for the eeprom
2714          */
2715         ixgbe_read_eeprom(hw, 0x2e, &eeprom_verh);
2716         ixgbe_read_eeprom(hw, 0x2d, &eeprom_verl);
2717
2718         etrack_id = (eeprom_verh << 16) | eeprom_verl;
2719
2720         ixgbe_read_eeprom(hw, 0x17, &offset);
2721
2722         /* Make sure offset to SCSI block is valid */
2723         if (!(offset == 0x0) && !(offset == 0xffff)) {
2724                 ixgbe_read_eeprom(hw, offset + 0x84, &eeprom_cfg_blkh);
2725                 ixgbe_read_eeprom(hw, offset + 0x83, &eeprom_cfg_blkl);
2726
2727                 /* Only display Option Rom if exist */
2728                 if (eeprom_cfg_blkl && eeprom_cfg_blkh) {
2729                         major = eeprom_cfg_blkl >> 8;
2730                         build = (eeprom_cfg_blkl << 8) | (eeprom_cfg_blkh >> 8);
2731                         patch = eeprom_cfg_blkh & 0x00ff;
2732
2733                         snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
2734                                  "0x%08x, %d.%d.%d", etrack_id, major, build,
2735                                  patch);
2736                 } else {
2737                         snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
2738                                  "0x%08x", etrack_id);
2739                 }
2740         } else {
2741                 snprintf(adapter->eeprom_id, sizeof(adapter->eeprom_id),
2742                          "0x%08x", etrack_id);
2743         }
2744
2745         /* reset the hardware with the new settings */
2746         err = hw->mac.ops.start_hw(hw);
2747         if (err == IXGBE_ERR_EEPROM_VERSION) {
2748                 /* We are running on a pre-production device, log a warning */
2749                 e_dev_warn("This device is a pre-production adapter/LOM. "
2750                            "Please be aware there may be issues associated "
2751                            "with your hardware.  If you are experiencing "
2752                            "problems please contact your Intel or hardware "
2753                            "representative who provided you with this "
2754                            "hardware.\n");
2755         }
2756         /* pick up the PCI bus settings for reporting later */
2757         if (hw->mac.ops.get_bus_info)
2758                 hw->mac.ops.get_bus_info(hw);
2759
2760         strlcpy(netdev->name, "eth%d", sizeof(netdev->name));
2761         *lad_dev = netdev;
2762
2763         adapter->netdev_registered = true;
2764 #ifdef NO_VNIC
2765         /* power down the optics */
2766         if ((hw->phy.multispeed_fiber) ||
2767             ((hw->mac.ops.get_media_type(hw) == ixgbe_media_type_fiber) &&
2768              (hw->mac.type == ixgbe_mac_82599EB)))
2769                 ixgbe_disable_tx_laser(hw);
2770
2771         /* carrier off reporting is important to ethtool even BEFORE open */
2772         netif_carrier_off(netdev);
2773         /* keep stopping all the transmit queues for older kernels */
2774         netif_tx_stop_all_queues(netdev);
2775 #endif
2776
2777         /* print all messages at the end so that we use our eth%d name */
2778         /* print bus type/speed/width info */
2779         e_dev_info("(PCI Express:%s:%s) ",
2780                    (hw->bus.speed == ixgbe_bus_speed_5000 ? "5.0GT/s" :
2781                    hw->bus.speed == ixgbe_bus_speed_2500 ? "2.5GT/s" :
2782                    "Unknown"),
2783                    (hw->bus.width == ixgbe_bus_width_pcie_x8 ? "Width x8" :
2784                    hw->bus.width == ixgbe_bus_width_pcie_x4 ? "Width x4" :
2785                    hw->bus.width == ixgbe_bus_width_pcie_x1 ? "Width x1" :
2786                    "Unknown"));
2787
2788         /* print the MAC address */
2789         for (i = 0; i < 6; i++)
2790                 pr_cont("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
2791
2792         /* First try to read PBA as a string */
2793         err = ixgbe_read_pba_string(hw, part_str, IXGBE_PBANUM_LENGTH);
2794         if (err)
2795                 strlcpy(part_str, "Unknown", sizeof(part_str));
2796         if (ixgbe_is_sfp(hw) && hw->phy.sfp_type != ixgbe_sfp_type_not_present)
2797                 e_info(probe, "MAC: %d, PHY: %d, SFP+: %d, PBA No: %s\n",
2798                        hw->mac.type, hw->phy.type, hw->phy.sfp_type, part_str);
2799         else
2800                 e_info(probe, "MAC: %d, PHY: %d, PBA No: %s\n",
2801                       hw->mac.type, hw->phy.type, part_str);
2802
2803         if (((hw->bus.speed == ixgbe_bus_speed_2500) &&
2804              (hw->bus.width <= ixgbe_bus_width_pcie_x4)) ||
2805             (hw->bus.width <= ixgbe_bus_width_pcie_x2)) {
2806                 e_dev_warn("PCI-Express bandwidth available for this "
2807                            "card is not sufficient for optimal "
2808                            "performance.\n");
2809                 e_dev_warn("For optimal performance a x8 PCI-Express "
2810                            "slot is required.\n");
2811         }
2812
2813 #define INFO_STRING_LEN 255
2814         info_string = kzalloc(INFO_STRING_LEN, GFP_KERNEL);
2815         if (!info_string) {
2816                 e_err(probe, "allocation for info string failed\n");
2817                 goto no_info_string;
2818         }
2819         count = 0;
2820         i_s_var = info_string;
2821         count += snprintf(i_s_var, INFO_STRING_LEN, "Enabled Features: ");
2822
2823         i_s_var = info_string + count;
2824         count += snprintf(i_s_var, (INFO_STRING_LEN - count),
2825                         "RxQ: %d TxQ: %d ", adapter->num_rx_queues,
2826                                         adapter->num_tx_queues);
2827         i_s_var = info_string + count;
2828 #ifdef IXGBE_FCOE
2829         if (adapter->flags & IXGBE_FLAG_FCOE_ENABLED) {
2830                 count += snprintf(i_s_var, INFO_STRING_LEN - count, "FCoE ");
2831                 i_s_var = info_string + count;
2832         }
2833 #endif
2834         if (adapter->flags & IXGBE_FLAG_FDIR_HASH_CAPABLE) {
2835                 count += snprintf(i_s_var, INFO_STRING_LEN - count,
2836                                                         "FdirHash ");
2837                 i_s_var = info_string + count;
2838         }
2839         if (adapter->flags & IXGBE_FLAG_FDIR_PERFECT_CAPABLE) {
2840                 count += snprintf(i_s_var, INFO_STRING_LEN - count,
2841                                                 "FdirPerfect ");
2842                 i_s_var = info_string + count;
2843         }
2844         if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
2845                 count += snprintf(i_s_var, INFO_STRING_LEN - count, "DCB ");
2846                 i_s_var = info_string + count;
2847         }
2848         if (adapter->flags & IXGBE_FLAG_RSS_ENABLED) {
2849                 count += snprintf(i_s_var, INFO_STRING_LEN - count, "RSS ");
2850                 i_s_var = info_string + count;
2851         }
2852         if (adapter->flags & IXGBE_FLAG_DCA_ENABLED) {
2853                 count += snprintf(i_s_var, INFO_STRING_LEN - count, "DCA ");
2854                 i_s_var = info_string + count;
2855         }
2856         if (adapter->flags2 & IXGBE_FLAG2_RSC_ENABLED) {
2857                 count += snprintf(i_s_var, INFO_STRING_LEN - count, "RSC ");
2858                 i_s_var = info_string + count;
2859         }
2860 #ifndef IXGBE_NO_LRO
2861         else if (netdev->features & NETIF_F_LRO) {
2862                 count += snprintf(i_s_var, INFO_STRING_LEN - count, "LRO ");
2863                 i_s_var = info_string + count;
2864         }
2865 #endif
2866
2867         BUG_ON(i_s_var > (info_string + INFO_STRING_LEN));
2868         /* end features printing */
2869         e_info(probe, "%s\n", info_string);
2870         kfree(info_string);
2871 no_info_string:
2872
2873         /* firmware requires blank driver version */
2874         ixgbe_set_fw_drv_ver(hw, 0xFF, 0xFF, 0xFF, 0xFF);
2875
2876 #if defined(HAVE_NETDEV_STORAGE_ADDRESS) && defined(NETDEV_HW_ADDR_T_SAN)
2877         /* add san mac addr to netdev */
2878         //ixgbe_add_sanmac_netdev(netdev);
2879
2880 #endif /* (HAVE_NETDEV_STORAGE_ADDRESS) && (NETDEV_HW_ADDR_T_SAN) */
2881         e_info(probe, "Intel(R) 10 Gigabit Network Connection\n");
2882         cards_found++;
2883
2884 #ifdef IXGBE_SYSFS
2885         //if (ixgbe_sysfs_init(adapter))
2886         //      e_err(probe, "failed to allocate sysfs resources\n");
2887 #else
2888 #ifdef IXGBE_PROCFS
2889         //if (ixgbe_procfs_init(adapter))
2890         //      e_err(probe, "failed to allocate procfs resources\n");
2891 #endif /* IXGBE_PROCFS */
2892 #endif /* IXGBE_SYSFS */
2893
2894         return 0;
2895
2896 //err_register:
2897         //ixgbe_clear_interrupt_scheme(adapter);
2898         //ixgbe_release_hw_control(adapter);
2899 err_sw_init:
2900         adapter->flags2 &= ~IXGBE_FLAG2_SEARCH_FOR_SFP;
2901         if (adapter->mac_table)
2902                 kfree(adapter->mac_table);
2903         iounmap(hw->hw_addr);
2904 err_ioremap:
2905         free_netdev(netdev);
2906 err_alloc_etherdev:
2907         //pci_release_selected_regions(pdev,
2908         //                           pci_select_bars(pdev, IORESOURCE_MEM));
2909 //err_pci_reg:
2910 //err_dma:
2911         pci_disable_device(pdev);
2912         return err;
2913 }
2914
2915 /**
2916  * ixgbe_remove - Device Removal Routine
2917  * @pdev: PCI device information struct
2918  *
2919  * ixgbe_remove is called by the PCI subsystem to alert the driver
2920  * that it should release a PCI device.  The could be caused by a
2921  * Hot-Plug event, or because the driver is going to be removed from
2922  * memory.
2923  **/
2924 void ixgbe_kni_remove(struct pci_dev *pdev)
2925 {
2926         pci_disable_device(pdev);
2927 }
2928
2929
2930 u16 ixgbe_read_pci_cfg_word(struct ixgbe_hw *hw, u32 reg)
2931 {
2932         u16 value;
2933         struct ixgbe_adapter *adapter = hw->back;
2934
2935         pci_read_config_word(adapter->pdev, reg, &value);
2936         return value;
2937 }
2938
2939 void ixgbe_write_pci_cfg_word(struct ixgbe_hw *hw, u32 reg, u16 value)
2940 {
2941         struct ixgbe_adapter *adapter = hw->back;
2942
2943         pci_write_config_word(adapter->pdev, reg, value);
2944 }
2945
2946 void ewarn(struct ixgbe_hw *hw, const char *st, u32 status)
2947 {
2948         struct ixgbe_adapter *adapter = hw->back;
2949
2950         netif_warn(adapter, drv, adapter->netdev,  "%s", st);
2951 }