4 * Copyright(c) 2010-2017 Intel Corporation. All rights reserved.
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8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Intel Corporation nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 #include <sys/types.h>
35 #include <sys/queue.h>
44 #include <netinet/in.h>
46 #include <rte_byteorder.h>
48 #include <rte_debug.h>
49 #include <rte_interrupts.h>
50 #include <rte_memory.h>
51 #include <rte_memcpy.h>
52 #include <rte_memzone.h>
53 #include <rte_launch.h>
55 #include <rte_per_lcore.h>
56 #include <rte_lcore.h>
57 #include <rte_atomic.h>
58 #include <rte_branch_prediction.h>
59 #include <rte_common.h>
60 #include <rte_mempool.h>
61 #include <rte_malloc.h>
63 #include <rte_errno.h>
64 #include <rte_spinlock.h>
65 #include <rte_string_fns.h>
67 #include "rte_ether.h"
68 #include "rte_ethdev.h"
69 #include "ethdev_profile.h"
71 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
72 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
73 static struct rte_eth_dev_data *rte_eth_dev_data;
74 static uint8_t eth_dev_last_created_port;
76 /* spinlock for eth device callbacks */
77 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
79 /* spinlock for add/remove rx callbacks */
80 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
82 /* spinlock for add/remove tx callbacks */
83 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
85 /* store statistics names and its offset in stats structure */
86 struct rte_eth_xstats_name_off {
87 char name[RTE_ETH_XSTATS_NAME_SIZE];
91 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
92 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
93 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
94 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
95 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
96 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
97 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
98 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
99 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
103 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
105 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
106 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
107 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
108 {"errors", offsetof(struct rte_eth_stats, q_errors)},
111 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
112 sizeof(rte_rxq_stats_strings[0]))
114 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
115 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
116 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
118 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
119 sizeof(rte_txq_stats_strings[0]))
123 * The user application callback description.
125 * It contains callback address to be registered by user application,
126 * the pointer to the parameters for callback, and the event type.
128 struct rte_eth_dev_callback {
129 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
130 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
131 void *cb_arg; /**< Parameter for callback */
132 void *ret_param; /**< Return parameter */
133 enum rte_eth_event_type event; /**< Interrupt event type */
134 uint32_t active; /**< Callback is executing */
143 rte_eth_find_next(uint16_t port_id)
145 while (port_id < RTE_MAX_ETHPORTS &&
146 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED)
149 if (port_id >= RTE_MAX_ETHPORTS)
150 return RTE_MAX_ETHPORTS;
156 rte_eth_dev_data_alloc(void)
158 const unsigned flags = 0;
159 const struct rte_memzone *mz;
161 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
162 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
163 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data),
164 rte_socket_id(), flags);
166 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
168 rte_panic("Cannot allocate memzone for ethernet port data\n");
170 rte_eth_dev_data = mz->addr;
171 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
172 memset(rte_eth_dev_data, 0,
173 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data));
177 rte_eth_dev_allocated(const char *name)
181 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
182 if ((rte_eth_devices[i].state == RTE_ETH_DEV_ATTACHED) &&
183 strcmp(rte_eth_devices[i].data->name, name) == 0)
184 return &rte_eth_devices[i];
190 rte_eth_dev_find_free_port(void)
194 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
195 /* Using shared name field to find a free port. */
196 if (rte_eth_dev_data[i].name[0] == '\0') {
197 RTE_ASSERT(rte_eth_devices[i].state ==
202 return RTE_MAX_ETHPORTS;
205 static struct rte_eth_dev *
206 eth_dev_get(uint16_t port_id)
208 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
210 eth_dev->data = &rte_eth_dev_data[port_id];
211 eth_dev->state = RTE_ETH_DEV_ATTACHED;
212 TAILQ_INIT(&(eth_dev->link_intr_cbs));
214 eth_dev_last_created_port = port_id;
220 rte_eth_dev_allocate(const char *name)
223 struct rte_eth_dev *eth_dev;
225 if (rte_eth_dev_data == NULL)
226 rte_eth_dev_data_alloc();
228 port_id = rte_eth_dev_find_free_port();
229 if (port_id == RTE_MAX_ETHPORTS) {
230 RTE_PMD_DEBUG_TRACE("Reached maximum number of Ethernet ports\n");
234 if (rte_eth_dev_allocated(name) != NULL) {
235 RTE_PMD_DEBUG_TRACE("Ethernet Device with name %s already allocated!\n",
240 eth_dev = eth_dev_get(port_id);
241 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
242 eth_dev->data->port_id = port_id;
243 eth_dev->data->mtu = ETHER_MTU;
249 * Attach to a port already registered by the primary process, which
250 * makes sure that the same device would have the same port id both
251 * in the primary and secondary process.
254 rte_eth_dev_attach_secondary(const char *name)
257 struct rte_eth_dev *eth_dev;
259 if (rte_eth_dev_data == NULL)
260 rte_eth_dev_data_alloc();
262 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
263 if (strcmp(rte_eth_dev_data[i].name, name) == 0)
266 if (i == RTE_MAX_ETHPORTS) {
268 "device %s is not driven by the primary process\n",
273 eth_dev = eth_dev_get(i);
274 RTE_ASSERT(eth_dev->data->port_id == i);
280 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
285 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
286 eth_dev->state = RTE_ETH_DEV_UNUSED;
291 rte_eth_dev_is_valid_port(uint16_t port_id)
293 if (port_id >= RTE_MAX_ETHPORTS ||
294 (rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
295 rte_eth_devices[port_id].state != RTE_ETH_DEV_DEFERRED))
302 rte_eth_dev_socket_id(uint16_t port_id)
304 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
305 return rte_eth_devices[port_id].data->numa_node;
309 rte_eth_dev_get_sec_ctx(uint8_t port_id)
311 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
312 return rte_eth_devices[port_id].security_ctx;
316 rte_eth_dev_count(void)
323 RTE_ETH_FOREACH_DEV(p)
330 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
334 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
337 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
341 /* shouldn't check 'rte_eth_devices[i].data',
342 * because it might be overwritten by VDEV PMD */
343 tmp = rte_eth_dev_data[port_id].name;
349 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
354 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
358 RTE_ETH_FOREACH_DEV(i) {
360 rte_eth_dev_data[i].name, strlen(name))) {
370 /* attach the new device, then store port_id of the device */
372 rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
375 int current = rte_eth_dev_count();
379 if ((devargs == NULL) || (port_id == NULL)) {
384 /* parse devargs, then retrieve device name and args */
385 if (rte_eal_parse_devargs_str(devargs, &name, &args))
388 ret = rte_eal_dev_attach(name, args);
392 /* no point looking at the port count if no port exists */
393 if (!rte_eth_dev_count()) {
394 RTE_LOG(ERR, EAL, "No port found for device (%s)\n", name);
399 /* if nothing happened, there is a bug here, since some driver told us
400 * it did attach a device, but did not create a port.
402 if (current == rte_eth_dev_count()) {
407 *port_id = eth_dev_last_created_port;
416 /* detach the device, then store the name of the device */
418 rte_eth_dev_detach(uint16_t port_id, char *name)
423 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
430 dev_flags = rte_eth_devices[port_id].data->dev_flags;
431 if (dev_flags & RTE_ETH_DEV_BONDED_SLAVE) {
432 RTE_LOG(ERR, EAL, "Port %" PRIu16 " is bonded, cannot detach\n",
438 snprintf(name, sizeof(rte_eth_devices[port_id].data->name),
439 "%s", rte_eth_devices[port_id].data->name);
441 ret = rte_eal_dev_detach(rte_eth_devices[port_id].device);
445 rte_eth_devices[port_id].state = RTE_ETH_DEV_UNUSED;
453 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
455 uint16_t old_nb_queues = dev->data->nb_rx_queues;
459 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
460 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
461 sizeof(dev->data->rx_queues[0]) * nb_queues,
462 RTE_CACHE_LINE_SIZE);
463 if (dev->data->rx_queues == NULL) {
464 dev->data->nb_rx_queues = 0;
467 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
468 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
470 rxq = dev->data->rx_queues;
472 for (i = nb_queues; i < old_nb_queues; i++)
473 (*dev->dev_ops->rx_queue_release)(rxq[i]);
474 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
475 RTE_CACHE_LINE_SIZE);
478 if (nb_queues > old_nb_queues) {
479 uint16_t new_qs = nb_queues - old_nb_queues;
481 memset(rxq + old_nb_queues, 0,
482 sizeof(rxq[0]) * new_qs);
485 dev->data->rx_queues = rxq;
487 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
488 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
490 rxq = dev->data->rx_queues;
492 for (i = nb_queues; i < old_nb_queues; i++)
493 (*dev->dev_ops->rx_queue_release)(rxq[i]);
495 rte_free(dev->data->rx_queues);
496 dev->data->rx_queues = NULL;
498 dev->data->nb_rx_queues = nb_queues;
503 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
505 struct rte_eth_dev *dev;
507 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
509 dev = &rte_eth_devices[port_id];
510 if (!dev->data->dev_started) {
512 "port %d must be started before start any queue\n",
517 if (rx_queue_id >= dev->data->nb_rx_queues) {
518 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
522 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
524 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
525 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
526 " already started\n",
527 rx_queue_id, port_id);
531 return dev->dev_ops->rx_queue_start(dev, rx_queue_id);
536 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
538 struct rte_eth_dev *dev;
540 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
542 dev = &rte_eth_devices[port_id];
543 if (rx_queue_id >= dev->data->nb_rx_queues) {
544 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
548 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
550 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
551 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
552 " already stopped\n",
553 rx_queue_id, port_id);
557 return dev->dev_ops->rx_queue_stop(dev, rx_queue_id);
562 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
564 struct rte_eth_dev *dev;
566 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
568 dev = &rte_eth_devices[port_id];
569 if (!dev->data->dev_started) {
571 "port %d must be started before start any queue\n",
576 if (tx_queue_id >= dev->data->nb_tx_queues) {
577 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
581 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
583 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
584 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
585 " already started\n",
586 tx_queue_id, port_id);
590 return dev->dev_ops->tx_queue_start(dev, tx_queue_id);
595 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
597 struct rte_eth_dev *dev;
599 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
601 dev = &rte_eth_devices[port_id];
602 if (tx_queue_id >= dev->data->nb_tx_queues) {
603 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
607 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
609 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
610 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
611 " already stopped\n",
612 tx_queue_id, port_id);
616 return dev->dev_ops->tx_queue_stop(dev, tx_queue_id);
621 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
623 uint16_t old_nb_queues = dev->data->nb_tx_queues;
627 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
628 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
629 sizeof(dev->data->tx_queues[0]) * nb_queues,
630 RTE_CACHE_LINE_SIZE);
631 if (dev->data->tx_queues == NULL) {
632 dev->data->nb_tx_queues = 0;
635 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
636 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
638 txq = dev->data->tx_queues;
640 for (i = nb_queues; i < old_nb_queues; i++)
641 (*dev->dev_ops->tx_queue_release)(txq[i]);
642 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
643 RTE_CACHE_LINE_SIZE);
646 if (nb_queues > old_nb_queues) {
647 uint16_t new_qs = nb_queues - old_nb_queues;
649 memset(txq + old_nb_queues, 0,
650 sizeof(txq[0]) * new_qs);
653 dev->data->tx_queues = txq;
655 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
656 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
658 txq = dev->data->tx_queues;
660 for (i = nb_queues; i < old_nb_queues; i++)
661 (*dev->dev_ops->tx_queue_release)(txq[i]);
663 rte_free(dev->data->tx_queues);
664 dev->data->tx_queues = NULL;
666 dev->data->nb_tx_queues = nb_queues;
671 rte_eth_speed_bitflag(uint32_t speed, int duplex)
674 case ETH_SPEED_NUM_10M:
675 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
676 case ETH_SPEED_NUM_100M:
677 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
678 case ETH_SPEED_NUM_1G:
679 return ETH_LINK_SPEED_1G;
680 case ETH_SPEED_NUM_2_5G:
681 return ETH_LINK_SPEED_2_5G;
682 case ETH_SPEED_NUM_5G:
683 return ETH_LINK_SPEED_5G;
684 case ETH_SPEED_NUM_10G:
685 return ETH_LINK_SPEED_10G;
686 case ETH_SPEED_NUM_20G:
687 return ETH_LINK_SPEED_20G;
688 case ETH_SPEED_NUM_25G:
689 return ETH_LINK_SPEED_25G;
690 case ETH_SPEED_NUM_40G:
691 return ETH_LINK_SPEED_40G;
692 case ETH_SPEED_NUM_50G:
693 return ETH_LINK_SPEED_50G;
694 case ETH_SPEED_NUM_56G:
695 return ETH_LINK_SPEED_56G;
696 case ETH_SPEED_NUM_100G:
697 return ETH_LINK_SPEED_100G;
704 * A conversion function from rxmode bitfield API.
707 rte_eth_convert_rx_offload_bitfield(const struct rte_eth_rxmode *rxmode,
708 uint64_t *rx_offloads)
710 uint64_t offloads = 0;
712 if (rxmode->header_split == 1)
713 offloads |= DEV_RX_OFFLOAD_HEADER_SPLIT;
714 if (rxmode->hw_ip_checksum == 1)
715 offloads |= DEV_RX_OFFLOAD_CHECKSUM;
716 if (rxmode->hw_vlan_filter == 1)
717 offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
718 if (rxmode->hw_vlan_strip == 1)
719 offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
720 if (rxmode->hw_vlan_extend == 1)
721 offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
722 if (rxmode->jumbo_frame == 1)
723 offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
724 if (rxmode->hw_strip_crc == 1)
725 offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
726 if (rxmode->enable_scatter == 1)
727 offloads |= DEV_RX_OFFLOAD_SCATTER;
728 if (rxmode->enable_lro == 1)
729 offloads |= DEV_RX_OFFLOAD_TCP_LRO;
730 if (rxmode->hw_timestamp == 1)
731 offloads |= DEV_RX_OFFLOAD_TIMESTAMP;
732 if (rxmode->security == 1)
733 offloads |= DEV_RX_OFFLOAD_SECURITY;
735 *rx_offloads = offloads;
739 * A conversion function from rxmode offloads API.
742 rte_eth_convert_rx_offloads(const uint64_t rx_offloads,
743 struct rte_eth_rxmode *rxmode)
746 if (rx_offloads & DEV_RX_OFFLOAD_HEADER_SPLIT)
747 rxmode->header_split = 1;
749 rxmode->header_split = 0;
750 if (rx_offloads & DEV_RX_OFFLOAD_CHECKSUM)
751 rxmode->hw_ip_checksum = 1;
753 rxmode->hw_ip_checksum = 0;
754 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
755 rxmode->hw_vlan_filter = 1;
757 rxmode->hw_vlan_filter = 0;
758 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
759 rxmode->hw_vlan_strip = 1;
761 rxmode->hw_vlan_strip = 0;
762 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
763 rxmode->hw_vlan_extend = 1;
765 rxmode->hw_vlan_extend = 0;
766 if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME)
767 rxmode->jumbo_frame = 1;
769 rxmode->jumbo_frame = 0;
770 if (rx_offloads & DEV_RX_OFFLOAD_CRC_STRIP)
771 rxmode->hw_strip_crc = 1;
773 rxmode->hw_strip_crc = 0;
774 if (rx_offloads & DEV_RX_OFFLOAD_SCATTER)
775 rxmode->enable_scatter = 1;
777 rxmode->enable_scatter = 0;
778 if (rx_offloads & DEV_RX_OFFLOAD_TCP_LRO)
779 rxmode->enable_lro = 1;
781 rxmode->enable_lro = 0;
782 if (rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP)
783 rxmode->hw_timestamp = 1;
785 rxmode->hw_timestamp = 0;
786 if (rx_offloads & DEV_RX_OFFLOAD_SECURITY)
787 rxmode->security = 1;
789 rxmode->security = 0;
793 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
794 const struct rte_eth_conf *dev_conf)
796 struct rte_eth_dev *dev;
797 struct rte_eth_dev_info dev_info;
798 struct rte_eth_conf local_conf = *dev_conf;
801 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
803 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
805 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
806 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
810 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
812 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
813 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
817 dev = &rte_eth_devices[port_id];
819 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
820 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
822 if (dev->data->dev_started) {
824 "port %d must be stopped to allow configuration\n", port_id);
829 * Convert between the offloads API to enable PMDs to support
832 if ((dev_conf->rxmode.ignore_offload_bitfield == 0)) {
833 rte_eth_convert_rx_offload_bitfield(
834 &dev_conf->rxmode, &local_conf.rxmode.offloads);
836 rte_eth_convert_rx_offloads(dev_conf->rxmode.offloads,
840 /* Copy the dev_conf parameter into the dev structure */
841 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
844 * Check that the numbers of RX and TX queues are not greater
845 * than the maximum number of RX and TX queues supported by the
848 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
850 if (nb_rx_q == 0 && nb_tx_q == 0) {
851 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d both rx and tx queue cannot be 0\n", port_id);
855 if (nb_rx_q > dev_info.max_rx_queues) {
856 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
857 port_id, nb_rx_q, dev_info.max_rx_queues);
861 if (nb_tx_q > dev_info.max_tx_queues) {
862 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
863 port_id, nb_tx_q, dev_info.max_tx_queues);
867 /* Check that the device supports requested interrupts */
868 if ((dev_conf->intr_conf.lsc == 1) &&
869 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
870 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
871 dev->device->driver->name);
874 if ((dev_conf->intr_conf.rmv == 1) &&
875 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
876 RTE_PMD_DEBUG_TRACE("driver %s does not support rmv\n",
877 dev->device->driver->name);
882 * If jumbo frames are enabled, check that the maximum RX packet
883 * length is supported by the configured device.
885 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
886 if (dev_conf->rxmode.max_rx_pkt_len >
887 dev_info.max_rx_pktlen) {
888 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
889 " > max valid value %u\n",
891 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
892 (unsigned)dev_info.max_rx_pktlen);
894 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
895 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
896 " < min valid value %u\n",
898 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
899 (unsigned)ETHER_MIN_LEN);
903 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
904 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
905 /* Use default value */
906 dev->data->dev_conf.rxmode.max_rx_pkt_len =
911 * Setup new number of RX/TX queues and reconfigure device.
913 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
915 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
920 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
922 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
924 rte_eth_dev_rx_queue_config(dev, 0);
928 diag = (*dev->dev_ops->dev_configure)(dev);
930 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
932 rte_eth_dev_rx_queue_config(dev, 0);
933 rte_eth_dev_tx_queue_config(dev, 0);
937 /* Initialize Rx profiling if enabled at compilation time. */
938 diag = __rte_eth_profile_rx_init(port_id, dev);
940 RTE_PMD_DEBUG_TRACE("port%d __rte_eth_profile_rx_init = %d\n",
942 rte_eth_dev_rx_queue_config(dev, 0);
943 rte_eth_dev_tx_queue_config(dev, 0);
951 _rte_eth_dev_reset(struct rte_eth_dev *dev)
953 if (dev->data->dev_started) {
955 "port %d must be stopped to allow reset\n",
960 rte_eth_dev_rx_queue_config(dev, 0);
961 rte_eth_dev_tx_queue_config(dev, 0);
963 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
967 rte_eth_dev_config_restore(uint16_t port_id)
969 struct rte_eth_dev *dev;
970 struct rte_eth_dev_info dev_info;
971 struct ether_addr *addr;
976 dev = &rte_eth_devices[port_id];
978 rte_eth_dev_info_get(port_id, &dev_info);
980 /* replay MAC address configuration including default MAC */
981 addr = &dev->data->mac_addrs[0];
982 if (*dev->dev_ops->mac_addr_set != NULL)
983 (*dev->dev_ops->mac_addr_set)(dev, addr);
984 else if (*dev->dev_ops->mac_addr_add != NULL)
985 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
987 if (*dev->dev_ops->mac_addr_add != NULL) {
988 for (i = 1; i < dev_info.max_mac_addrs; i++) {
989 addr = &dev->data->mac_addrs[i];
991 /* skip zero address */
992 if (is_zero_ether_addr(addr))
996 pool_mask = dev->data->mac_pool_sel[i];
999 if (pool_mask & 1ULL)
1000 (*dev->dev_ops->mac_addr_add)(dev,
1004 } while (pool_mask);
1008 /* replay promiscuous configuration */
1009 if (rte_eth_promiscuous_get(port_id) == 1)
1010 rte_eth_promiscuous_enable(port_id);
1011 else if (rte_eth_promiscuous_get(port_id) == 0)
1012 rte_eth_promiscuous_disable(port_id);
1014 /* replay all multicast configuration */
1015 if (rte_eth_allmulticast_get(port_id) == 1)
1016 rte_eth_allmulticast_enable(port_id);
1017 else if (rte_eth_allmulticast_get(port_id) == 0)
1018 rte_eth_allmulticast_disable(port_id);
1022 rte_eth_dev_start(uint16_t port_id)
1024 struct rte_eth_dev *dev;
1027 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1029 dev = &rte_eth_devices[port_id];
1031 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1033 if (dev->data->dev_started != 0) {
1034 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1035 " already started\n",
1040 diag = (*dev->dev_ops->dev_start)(dev);
1042 dev->data->dev_started = 1;
1046 rte_eth_dev_config_restore(port_id);
1048 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1049 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1050 (*dev->dev_ops->link_update)(dev, 0);
1056 rte_eth_dev_stop(uint16_t port_id)
1058 struct rte_eth_dev *dev;
1060 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1061 dev = &rte_eth_devices[port_id];
1063 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1065 if (dev->data->dev_started == 0) {
1066 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1067 " already stopped\n",
1072 dev->data->dev_started = 0;
1073 (*dev->dev_ops->dev_stop)(dev);
1077 rte_eth_dev_set_link_up(uint16_t port_id)
1079 struct rte_eth_dev *dev;
1081 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1083 dev = &rte_eth_devices[port_id];
1085 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1086 return (*dev->dev_ops->dev_set_link_up)(dev);
1090 rte_eth_dev_set_link_down(uint16_t port_id)
1092 struct rte_eth_dev *dev;
1094 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1096 dev = &rte_eth_devices[port_id];
1098 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1099 return (*dev->dev_ops->dev_set_link_down)(dev);
1103 rte_eth_dev_close(uint16_t port_id)
1105 struct rte_eth_dev *dev;
1107 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1108 dev = &rte_eth_devices[port_id];
1110 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1111 dev->data->dev_started = 0;
1112 (*dev->dev_ops->dev_close)(dev);
1114 dev->data->nb_rx_queues = 0;
1115 rte_free(dev->data->rx_queues);
1116 dev->data->rx_queues = NULL;
1117 dev->data->nb_tx_queues = 0;
1118 rte_free(dev->data->tx_queues);
1119 dev->data->tx_queues = NULL;
1123 rte_eth_dev_reset(uint16_t port_id)
1125 struct rte_eth_dev *dev;
1128 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1129 dev = &rte_eth_devices[port_id];
1131 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1133 rte_eth_dev_stop(port_id);
1134 ret = dev->dev_ops->dev_reset(dev);
1140 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1141 uint16_t nb_rx_desc, unsigned int socket_id,
1142 const struct rte_eth_rxconf *rx_conf,
1143 struct rte_mempool *mp)
1146 uint32_t mbp_buf_size;
1147 struct rte_eth_dev *dev;
1148 struct rte_eth_dev_info dev_info;
1149 struct rte_eth_rxconf local_conf;
1152 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1154 dev = &rte_eth_devices[port_id];
1155 if (rx_queue_id >= dev->data->nb_rx_queues) {
1156 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1160 if (dev->data->dev_started) {
1161 RTE_PMD_DEBUG_TRACE(
1162 "port %d must be stopped to allow configuration\n", port_id);
1166 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1167 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1170 * Check the size of the mbuf data buffer.
1171 * This value must be provided in the private data of the memory pool.
1172 * First check that the memory pool has a valid private data.
1174 rte_eth_dev_info_get(port_id, &dev_info);
1175 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1176 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1177 mp->name, (int) mp->private_data_size,
1178 (int) sizeof(struct rte_pktmbuf_pool_private));
1181 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1183 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1184 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1185 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1189 (int)(RTE_PKTMBUF_HEADROOM +
1190 dev_info.min_rx_bufsize),
1191 (int)RTE_PKTMBUF_HEADROOM,
1192 (int)dev_info.min_rx_bufsize);
1196 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1197 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1198 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1200 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1201 "should be: <= %hu, = %hu, and a product of %hu\n",
1203 dev_info.rx_desc_lim.nb_max,
1204 dev_info.rx_desc_lim.nb_min,
1205 dev_info.rx_desc_lim.nb_align);
1209 rxq = dev->data->rx_queues;
1210 if (rxq[rx_queue_id]) {
1211 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1213 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1214 rxq[rx_queue_id] = NULL;
1217 if (rx_conf == NULL)
1218 rx_conf = &dev_info.default_rxconf;
1220 local_conf = *rx_conf;
1221 if (dev->data->dev_conf.rxmode.ignore_offload_bitfield == 0) {
1223 * Reflect port offloads to queue offloads in order for
1224 * offloads to not be discarded.
1226 rte_eth_convert_rx_offload_bitfield(&dev->data->dev_conf.rxmode,
1227 &local_conf.offloads);
1230 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1231 socket_id, &local_conf, mp);
1233 if (!dev->data->min_rx_buf_size ||
1234 dev->data->min_rx_buf_size > mbp_buf_size)
1235 dev->data->min_rx_buf_size = mbp_buf_size;
1242 * A conversion function from txq_flags API.
1245 rte_eth_convert_txq_flags(const uint32_t txq_flags, uint64_t *tx_offloads)
1247 uint64_t offloads = 0;
1249 if (!(txq_flags & ETH_TXQ_FLAGS_NOMULTSEGS))
1250 offloads |= DEV_TX_OFFLOAD_MULTI_SEGS;
1251 if (!(txq_flags & ETH_TXQ_FLAGS_NOVLANOFFL))
1252 offloads |= DEV_TX_OFFLOAD_VLAN_INSERT;
1253 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMSCTP))
1254 offloads |= DEV_TX_OFFLOAD_SCTP_CKSUM;
1255 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMUDP))
1256 offloads |= DEV_TX_OFFLOAD_UDP_CKSUM;
1257 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMTCP))
1258 offloads |= DEV_TX_OFFLOAD_TCP_CKSUM;
1259 if ((txq_flags & ETH_TXQ_FLAGS_NOREFCOUNT) &&
1260 (txq_flags & ETH_TXQ_FLAGS_NOMULTMEMP))
1261 offloads |= DEV_TX_OFFLOAD_MBUF_FAST_FREE;
1263 *tx_offloads = offloads;
1267 * A conversion function from offloads API.
1270 rte_eth_convert_txq_offloads(const uint64_t tx_offloads, uint32_t *txq_flags)
1274 if (!(tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS))
1275 flags |= ETH_TXQ_FLAGS_NOMULTSEGS;
1276 if (!(tx_offloads & DEV_TX_OFFLOAD_VLAN_INSERT))
1277 flags |= ETH_TXQ_FLAGS_NOVLANOFFL;
1278 if (!(tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM))
1279 flags |= ETH_TXQ_FLAGS_NOXSUMSCTP;
1280 if (!(tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM))
1281 flags |= ETH_TXQ_FLAGS_NOXSUMUDP;
1282 if (!(tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM))
1283 flags |= ETH_TXQ_FLAGS_NOXSUMTCP;
1284 if (tx_offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE)
1285 flags |= (ETH_TXQ_FLAGS_NOREFCOUNT | ETH_TXQ_FLAGS_NOMULTMEMP);
1291 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1292 uint16_t nb_tx_desc, unsigned int socket_id,
1293 const struct rte_eth_txconf *tx_conf)
1295 struct rte_eth_dev *dev;
1296 struct rte_eth_dev_info dev_info;
1297 struct rte_eth_txconf local_conf;
1300 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1302 dev = &rte_eth_devices[port_id];
1303 if (tx_queue_id >= dev->data->nb_tx_queues) {
1304 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1308 if (dev->data->dev_started) {
1309 RTE_PMD_DEBUG_TRACE(
1310 "port %d must be stopped to allow configuration\n", port_id);
1314 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1315 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1317 rte_eth_dev_info_get(port_id, &dev_info);
1319 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1320 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1321 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1322 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1323 "should be: <= %hu, = %hu, and a product of %hu\n",
1325 dev_info.tx_desc_lim.nb_max,
1326 dev_info.tx_desc_lim.nb_min,
1327 dev_info.tx_desc_lim.nb_align);
1331 txq = dev->data->tx_queues;
1332 if (txq[tx_queue_id]) {
1333 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1335 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1336 txq[tx_queue_id] = NULL;
1339 if (tx_conf == NULL)
1340 tx_conf = &dev_info.default_txconf;
1343 * Convert between the offloads API to enable PMDs to support
1346 local_conf = *tx_conf;
1347 if (tx_conf->txq_flags & ETH_TXQ_FLAGS_IGNORE) {
1348 rte_eth_convert_txq_offloads(tx_conf->offloads,
1349 &local_conf.txq_flags);
1350 /* Keep the ignore flag. */
1351 local_conf.txq_flags |= ETH_TXQ_FLAGS_IGNORE;
1353 rte_eth_convert_txq_flags(tx_conf->txq_flags,
1354 &local_conf.offloads);
1357 return (*dev->dev_ops->tx_queue_setup)(dev, tx_queue_id, nb_tx_desc,
1358 socket_id, &local_conf);
1362 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1363 void *userdata __rte_unused)
1367 for (i = 0; i < unsent; i++)
1368 rte_pktmbuf_free(pkts[i]);
1372 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1375 uint64_t *count = userdata;
1378 for (i = 0; i < unsent; i++)
1379 rte_pktmbuf_free(pkts[i]);
1385 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1386 buffer_tx_error_fn cbfn, void *userdata)
1388 buffer->error_callback = cbfn;
1389 buffer->error_userdata = userdata;
1394 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1401 buffer->size = size;
1402 if (buffer->error_callback == NULL) {
1403 ret = rte_eth_tx_buffer_set_err_callback(
1404 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1411 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1413 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1415 /* Validate Input Data. Bail if not valid or not supported. */
1416 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1417 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1419 /* Call driver to free pending mbufs. */
1420 return (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1425 rte_eth_promiscuous_enable(uint16_t port_id)
1427 struct rte_eth_dev *dev;
1429 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1430 dev = &rte_eth_devices[port_id];
1432 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1433 (*dev->dev_ops->promiscuous_enable)(dev);
1434 dev->data->promiscuous = 1;
1438 rte_eth_promiscuous_disable(uint16_t port_id)
1440 struct rte_eth_dev *dev;
1442 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1443 dev = &rte_eth_devices[port_id];
1445 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1446 dev->data->promiscuous = 0;
1447 (*dev->dev_ops->promiscuous_disable)(dev);
1451 rte_eth_promiscuous_get(uint16_t port_id)
1453 struct rte_eth_dev *dev;
1455 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1457 dev = &rte_eth_devices[port_id];
1458 return dev->data->promiscuous;
1462 rte_eth_allmulticast_enable(uint16_t port_id)
1464 struct rte_eth_dev *dev;
1466 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1467 dev = &rte_eth_devices[port_id];
1469 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1470 (*dev->dev_ops->allmulticast_enable)(dev);
1471 dev->data->all_multicast = 1;
1475 rte_eth_allmulticast_disable(uint16_t port_id)
1477 struct rte_eth_dev *dev;
1479 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1480 dev = &rte_eth_devices[port_id];
1482 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1483 dev->data->all_multicast = 0;
1484 (*dev->dev_ops->allmulticast_disable)(dev);
1488 rte_eth_allmulticast_get(uint16_t port_id)
1490 struct rte_eth_dev *dev;
1492 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1494 dev = &rte_eth_devices[port_id];
1495 return dev->data->all_multicast;
1499 rte_eth_dev_atomic_read_link_status(struct rte_eth_dev *dev,
1500 struct rte_eth_link *link)
1502 struct rte_eth_link *dst = link;
1503 struct rte_eth_link *src = &(dev->data->dev_link);
1505 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1506 *(uint64_t *)src) == 0)
1513 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1515 struct rte_eth_dev *dev;
1517 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1518 dev = &rte_eth_devices[port_id];
1520 if (dev->data->dev_conf.intr_conf.lsc != 0)
1521 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1523 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1524 (*dev->dev_ops->link_update)(dev, 1);
1525 *eth_link = dev->data->dev_link;
1530 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1532 struct rte_eth_dev *dev;
1534 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1535 dev = &rte_eth_devices[port_id];
1537 if (dev->data->dev_conf.intr_conf.lsc != 0)
1538 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1540 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1541 (*dev->dev_ops->link_update)(dev, 0);
1542 *eth_link = dev->data->dev_link;
1547 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1549 struct rte_eth_dev *dev;
1551 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1553 dev = &rte_eth_devices[port_id];
1554 memset(stats, 0, sizeof(*stats));
1556 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1557 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1558 return (*dev->dev_ops->stats_get)(dev, stats);
1562 rte_eth_stats_reset(uint16_t port_id)
1564 struct rte_eth_dev *dev;
1566 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1567 dev = &rte_eth_devices[port_id];
1569 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1570 (*dev->dev_ops->stats_reset)(dev);
1571 dev->data->rx_mbuf_alloc_failed = 0;
1577 get_xstats_basic_count(struct rte_eth_dev *dev)
1579 uint16_t nb_rxqs, nb_txqs;
1582 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1583 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1585 count = RTE_NB_STATS;
1586 count += nb_rxqs * RTE_NB_RXQ_STATS;
1587 count += nb_txqs * RTE_NB_TXQ_STATS;
1593 get_xstats_count(uint16_t port_id)
1595 struct rte_eth_dev *dev;
1598 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1599 dev = &rte_eth_devices[port_id];
1600 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1601 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1606 if (dev->dev_ops->xstats_get_names != NULL) {
1607 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1614 count += get_xstats_basic_count(dev);
1620 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
1623 int cnt_xstats, idx_xstat;
1625 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1628 RTE_PMD_DEBUG_TRACE("Error: id pointer is NULL\n");
1633 RTE_PMD_DEBUG_TRACE("Error: xstat_name pointer is NULL\n");
1638 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1639 if (cnt_xstats < 0) {
1640 RTE_PMD_DEBUG_TRACE("Error: Cannot get count of xstats\n");
1644 /* Get id-name lookup table */
1645 struct rte_eth_xstat_name xstats_names[cnt_xstats];
1647 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
1648 port_id, xstats_names, cnt_xstats, NULL)) {
1649 RTE_PMD_DEBUG_TRACE("Error: Cannot get xstats lookup\n");
1653 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
1654 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
1663 /* retrieve ethdev extended statistics names */
1665 rte_eth_xstats_get_names_by_id(uint16_t port_id,
1666 struct rte_eth_xstat_name *xstats_names, unsigned int size,
1669 struct rte_eth_xstat_name *xstats_names_copy;
1670 unsigned int no_basic_stat_requested = 1;
1671 unsigned int expected_entries;
1672 struct rte_eth_dev *dev;
1676 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1677 dev = &rte_eth_devices[port_id];
1679 ret = get_xstats_count(port_id);
1682 expected_entries = (unsigned int)ret;
1684 /* Return max number of stats if no ids given */
1687 return expected_entries;
1688 else if (xstats_names && size < expected_entries)
1689 return expected_entries;
1692 if (ids && !xstats_names)
1695 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
1696 unsigned int basic_count = get_xstats_basic_count(dev);
1697 uint64_t ids_copy[size];
1699 for (i = 0; i < size; i++) {
1700 if (ids[i] < basic_count) {
1701 no_basic_stat_requested = 0;
1706 * Convert ids to xstats ids that PMD knows.
1707 * ids known by user are basic + extended stats.
1709 ids_copy[i] = ids[i] - basic_count;
1712 if (no_basic_stat_requested)
1713 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
1714 xstats_names, ids_copy, size);
1717 /* Retrieve all stats */
1719 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
1721 if (num_stats < 0 || num_stats > (int)expected_entries)
1724 return expected_entries;
1727 xstats_names_copy = calloc(expected_entries,
1728 sizeof(struct rte_eth_xstat_name));
1730 if (!xstats_names_copy) {
1731 RTE_PMD_DEBUG_TRACE("ERROR: can't allocate memory");
1735 /* Fill xstats_names_copy structure */
1736 rte_eth_xstats_get_names(port_id, xstats_names_copy, expected_entries);
1739 for (i = 0; i < size; i++) {
1740 if (ids[i] >= expected_entries) {
1741 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
1742 free(xstats_names_copy);
1745 xstats_names[i] = xstats_names_copy[ids[i]];
1748 free(xstats_names_copy);
1753 rte_eth_xstats_get_names(uint16_t port_id,
1754 struct rte_eth_xstat_name *xstats_names,
1757 struct rte_eth_dev *dev;
1758 int cnt_used_entries;
1759 int cnt_expected_entries;
1760 int cnt_driver_entries;
1761 uint32_t idx, id_queue;
1764 cnt_expected_entries = get_xstats_count(port_id);
1765 if (xstats_names == NULL || cnt_expected_entries < 0 ||
1766 (int)size < cnt_expected_entries)
1767 return cnt_expected_entries;
1769 /* port_id checked in get_xstats_count() */
1770 dev = &rte_eth_devices[port_id];
1771 cnt_used_entries = 0;
1773 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1774 snprintf(xstats_names[cnt_used_entries].name,
1775 sizeof(xstats_names[0].name),
1776 "%s", rte_stats_strings[idx].name);
1779 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1780 for (id_queue = 0; id_queue < num_q; id_queue++) {
1781 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1782 snprintf(xstats_names[cnt_used_entries].name,
1783 sizeof(xstats_names[0].name),
1785 id_queue, rte_rxq_stats_strings[idx].name);
1790 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1791 for (id_queue = 0; id_queue < num_q; id_queue++) {
1792 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1793 snprintf(xstats_names[cnt_used_entries].name,
1794 sizeof(xstats_names[0].name),
1796 id_queue, rte_txq_stats_strings[idx].name);
1801 if (dev->dev_ops->xstats_get_names != NULL) {
1802 /* If there are any driver-specific xstats, append them
1805 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
1807 xstats_names + cnt_used_entries,
1808 size - cnt_used_entries);
1809 if (cnt_driver_entries < 0)
1810 return cnt_driver_entries;
1811 cnt_used_entries += cnt_driver_entries;
1814 return cnt_used_entries;
1817 /* retrieve ethdev extended statistics */
1819 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
1820 uint64_t *values, unsigned int size)
1822 unsigned int no_basic_stat_requested = 1;
1823 unsigned int num_xstats_filled;
1824 uint16_t expected_entries;
1825 struct rte_eth_dev *dev;
1829 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1830 expected_entries = get_xstats_count(port_id);
1831 struct rte_eth_xstat xstats[expected_entries];
1832 dev = &rte_eth_devices[port_id];
1834 /* Return max number of stats if no ids given */
1837 return expected_entries;
1838 else if (values && size < expected_entries)
1839 return expected_entries;
1845 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
1846 unsigned int basic_count = get_xstats_basic_count(dev);
1847 uint64_t ids_copy[size];
1849 for (i = 0; i < size; i++) {
1850 if (ids[i] < basic_count) {
1851 no_basic_stat_requested = 0;
1856 * Convert ids to xstats ids that PMD knows.
1857 * ids known by user are basic + extended stats.
1859 ids_copy[i] = ids[i] - basic_count;
1862 if (no_basic_stat_requested)
1863 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
1867 /* Fill the xstats structure */
1868 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
1871 num_xstats_filled = (unsigned int)ret;
1873 /* Return all stats */
1875 for (i = 0; i < num_xstats_filled; i++)
1876 values[i] = xstats[i].value;
1877 return expected_entries;
1881 for (i = 0; i < size; i++) {
1882 if (ids[i] >= expected_entries) {
1883 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
1886 values[i] = xstats[ids[i]].value;
1892 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
1895 struct rte_eth_stats eth_stats;
1896 struct rte_eth_dev *dev;
1897 unsigned int count = 0, i, q;
1898 signed int xcount = 0;
1899 uint64_t val, *stats_ptr;
1900 uint16_t nb_rxqs, nb_txqs;
1902 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1904 dev = &rte_eth_devices[port_id];
1906 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1907 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1909 /* Return generic statistics */
1910 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
1911 (nb_txqs * RTE_NB_TXQ_STATS);
1913 /* implemented by the driver */
1914 if (dev->dev_ops->xstats_get != NULL) {
1915 /* Retrieve the xstats from the driver at the end of the
1918 xcount = (*dev->dev_ops->xstats_get)(dev,
1919 xstats ? xstats + count : NULL,
1920 (n > count) ? n - count : 0);
1926 if (n < count + xcount || xstats == NULL)
1927 return count + xcount;
1929 /* now fill the xstats structure */
1931 rte_eth_stats_get(port_id, ð_stats);
1934 for (i = 0; i < RTE_NB_STATS; i++) {
1935 stats_ptr = RTE_PTR_ADD(ð_stats,
1936 rte_stats_strings[i].offset);
1938 xstats[count++].value = val;
1942 for (q = 0; q < nb_rxqs; q++) {
1943 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
1944 stats_ptr = RTE_PTR_ADD(ð_stats,
1945 rte_rxq_stats_strings[i].offset +
1946 q * sizeof(uint64_t));
1948 xstats[count++].value = val;
1953 for (q = 0; q < nb_txqs; q++) {
1954 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
1955 stats_ptr = RTE_PTR_ADD(ð_stats,
1956 rte_txq_stats_strings[i].offset +
1957 q * sizeof(uint64_t));
1959 xstats[count++].value = val;
1963 for (i = 0; i < count; i++)
1965 /* add an offset to driver-specific stats */
1966 for ( ; i < count + xcount; i++)
1967 xstats[i].id += count;
1969 return count + xcount;
1972 /* reset ethdev extended statistics */
1974 rte_eth_xstats_reset(uint16_t port_id)
1976 struct rte_eth_dev *dev;
1978 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1979 dev = &rte_eth_devices[port_id];
1981 /* implemented by the driver */
1982 if (dev->dev_ops->xstats_reset != NULL) {
1983 (*dev->dev_ops->xstats_reset)(dev);
1987 /* fallback to default */
1988 rte_eth_stats_reset(port_id);
1992 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
1995 struct rte_eth_dev *dev;
1997 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1999 dev = &rte_eth_devices[port_id];
2001 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2002 return (*dev->dev_ops->queue_stats_mapping_set)
2003 (dev, queue_id, stat_idx, is_rx);
2008 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2011 return set_queue_stats_mapping(port_id, tx_queue_id, stat_idx,
2017 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2020 return set_queue_stats_mapping(port_id, rx_queue_id, stat_idx,
2025 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2027 struct rte_eth_dev *dev;
2029 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2030 dev = &rte_eth_devices[port_id];
2032 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2033 return (*dev->dev_ops->fw_version_get)(dev, fw_version, fw_size);
2037 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2039 struct rte_eth_dev *dev;
2040 const struct rte_eth_desc_lim lim = {
2041 .nb_max = UINT16_MAX,
2046 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2047 dev = &rte_eth_devices[port_id];
2049 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2050 dev_info->rx_desc_lim = lim;
2051 dev_info->tx_desc_lim = lim;
2053 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2054 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2055 dev_info->driver_name = dev->device->driver->name;
2056 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2057 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2061 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2062 uint32_t *ptypes, int num)
2065 struct rte_eth_dev *dev;
2066 const uint32_t *all_ptypes;
2068 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2069 dev = &rte_eth_devices[port_id];
2070 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2071 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2076 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2077 if (all_ptypes[i] & ptype_mask) {
2079 ptypes[j] = all_ptypes[i];
2087 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2089 struct rte_eth_dev *dev;
2091 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2092 dev = &rte_eth_devices[port_id];
2093 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2098 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2100 struct rte_eth_dev *dev;
2102 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2104 dev = &rte_eth_devices[port_id];
2105 *mtu = dev->data->mtu;
2110 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2113 struct rte_eth_dev *dev;
2115 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2116 dev = &rte_eth_devices[port_id];
2117 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2119 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2121 dev->data->mtu = mtu;
2127 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2129 struct rte_eth_dev *dev;
2132 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2133 dev = &rte_eth_devices[port_id];
2134 if (!(dev->data->dev_conf.rxmode.offloads &
2135 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2136 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
2140 if (vlan_id > 4095) {
2141 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
2142 port_id, (unsigned) vlan_id);
2145 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2147 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2149 struct rte_vlan_filter_conf *vfc;
2153 vfc = &dev->data->vlan_filter_conf;
2154 vidx = vlan_id / 64;
2155 vbit = vlan_id % 64;
2158 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2160 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2167 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2170 struct rte_eth_dev *dev;
2172 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2173 dev = &rte_eth_devices[port_id];
2174 if (rx_queue_id >= dev->data->nb_rx_queues) {
2175 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
2179 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2180 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2186 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2187 enum rte_vlan_type vlan_type,
2190 struct rte_eth_dev *dev;
2192 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2193 dev = &rte_eth_devices[port_id];
2194 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2196 return (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type, tpid);
2200 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2202 struct rte_eth_dev *dev;
2206 uint64_t orig_offloads;
2208 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2209 dev = &rte_eth_devices[port_id];
2211 /* save original values in case of failure */
2212 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2214 /*check which option changed by application*/
2215 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2216 org = !!(dev->data->dev_conf.rxmode.offloads &
2217 DEV_RX_OFFLOAD_VLAN_STRIP);
2220 dev->data->dev_conf.rxmode.offloads |=
2221 DEV_RX_OFFLOAD_VLAN_STRIP;
2223 dev->data->dev_conf.rxmode.offloads &=
2224 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2225 mask |= ETH_VLAN_STRIP_MASK;
2228 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2229 org = !!(dev->data->dev_conf.rxmode.offloads &
2230 DEV_RX_OFFLOAD_VLAN_FILTER);
2233 dev->data->dev_conf.rxmode.offloads |=
2234 DEV_RX_OFFLOAD_VLAN_FILTER;
2236 dev->data->dev_conf.rxmode.offloads &=
2237 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2238 mask |= ETH_VLAN_FILTER_MASK;
2241 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2242 org = !!(dev->data->dev_conf.rxmode.offloads &
2243 DEV_RX_OFFLOAD_VLAN_EXTEND);
2246 dev->data->dev_conf.rxmode.offloads |=
2247 DEV_RX_OFFLOAD_VLAN_EXTEND;
2249 dev->data->dev_conf.rxmode.offloads &=
2250 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2251 mask |= ETH_VLAN_EXTEND_MASK;
2258 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2261 * Convert to the offload bitfield API just in case the underlying PMD
2262 * still supporting it.
2264 rte_eth_convert_rx_offloads(dev->data->dev_conf.rxmode.offloads,
2265 &dev->data->dev_conf.rxmode);
2266 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2268 /* hit an error restore original values */
2269 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2270 rte_eth_convert_rx_offloads(dev->data->dev_conf.rxmode.offloads,
2271 &dev->data->dev_conf.rxmode);
2278 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2280 struct rte_eth_dev *dev;
2283 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2284 dev = &rte_eth_devices[port_id];
2286 if (dev->data->dev_conf.rxmode.offloads &
2287 DEV_RX_OFFLOAD_VLAN_STRIP)
2288 ret |= ETH_VLAN_STRIP_OFFLOAD;
2290 if (dev->data->dev_conf.rxmode.offloads &
2291 DEV_RX_OFFLOAD_VLAN_FILTER)
2292 ret |= ETH_VLAN_FILTER_OFFLOAD;
2294 if (dev->data->dev_conf.rxmode.offloads &
2295 DEV_RX_OFFLOAD_VLAN_EXTEND)
2296 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2302 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2304 struct rte_eth_dev *dev;
2306 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2307 dev = &rte_eth_devices[port_id];
2308 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2309 (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on);
2315 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2317 struct rte_eth_dev *dev;
2319 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2320 dev = &rte_eth_devices[port_id];
2321 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2322 memset(fc_conf, 0, sizeof(*fc_conf));
2323 return (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf);
2327 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2329 struct rte_eth_dev *dev;
2331 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2332 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2333 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
2337 dev = &rte_eth_devices[port_id];
2338 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2339 return (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf);
2343 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2344 struct rte_eth_pfc_conf *pfc_conf)
2346 struct rte_eth_dev *dev;
2348 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2349 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2350 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
2354 dev = &rte_eth_devices[port_id];
2355 /* High water, low water validation are device specific */
2356 if (*dev->dev_ops->priority_flow_ctrl_set)
2357 return (*dev->dev_ops->priority_flow_ctrl_set)(dev, pfc_conf);
2362 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2370 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2371 for (i = 0; i < num; i++) {
2372 if (reta_conf[i].mask)
2380 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2384 uint16_t i, idx, shift;
2390 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
2394 for (i = 0; i < reta_size; i++) {
2395 idx = i / RTE_RETA_GROUP_SIZE;
2396 shift = i % RTE_RETA_GROUP_SIZE;
2397 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2398 (reta_conf[idx].reta[shift] >= max_rxq)) {
2399 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
2400 "the maximum rxq index: %u\n", idx, shift,
2401 reta_conf[idx].reta[shift], max_rxq);
2410 rte_eth_dev_rss_reta_update(uint16_t port_id,
2411 struct rte_eth_rss_reta_entry64 *reta_conf,
2414 struct rte_eth_dev *dev;
2417 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2418 /* Check mask bits */
2419 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2423 dev = &rte_eth_devices[port_id];
2425 /* Check entry value */
2426 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2427 dev->data->nb_rx_queues);
2431 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2432 return (*dev->dev_ops->reta_update)(dev, reta_conf, reta_size);
2436 rte_eth_dev_rss_reta_query(uint16_t port_id,
2437 struct rte_eth_rss_reta_entry64 *reta_conf,
2440 struct rte_eth_dev *dev;
2443 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2445 /* Check mask bits */
2446 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2450 dev = &rte_eth_devices[port_id];
2451 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2452 return (*dev->dev_ops->reta_query)(dev, reta_conf, reta_size);
2456 rte_eth_dev_rss_hash_update(uint16_t port_id,
2457 struct rte_eth_rss_conf *rss_conf)
2459 struct rte_eth_dev *dev;
2461 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2462 dev = &rte_eth_devices[port_id];
2463 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2464 return (*dev->dev_ops->rss_hash_update)(dev, rss_conf);
2468 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2469 struct rte_eth_rss_conf *rss_conf)
2471 struct rte_eth_dev *dev;
2473 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2474 dev = &rte_eth_devices[port_id];
2475 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2476 return (*dev->dev_ops->rss_hash_conf_get)(dev, rss_conf);
2480 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2481 struct rte_eth_udp_tunnel *udp_tunnel)
2483 struct rte_eth_dev *dev;
2485 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2486 if (udp_tunnel == NULL) {
2487 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2491 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2492 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2496 dev = &rte_eth_devices[port_id];
2497 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2498 return (*dev->dev_ops->udp_tunnel_port_add)(dev, udp_tunnel);
2502 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2503 struct rte_eth_udp_tunnel *udp_tunnel)
2505 struct rte_eth_dev *dev;
2507 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2508 dev = &rte_eth_devices[port_id];
2510 if (udp_tunnel == NULL) {
2511 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2515 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2516 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2520 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2521 return (*dev->dev_ops->udp_tunnel_port_del)(dev, udp_tunnel);
2525 rte_eth_led_on(uint16_t port_id)
2527 struct rte_eth_dev *dev;
2529 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2530 dev = &rte_eth_devices[port_id];
2531 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2532 return (*dev->dev_ops->dev_led_on)(dev);
2536 rte_eth_led_off(uint16_t port_id)
2538 struct rte_eth_dev *dev;
2540 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2541 dev = &rte_eth_devices[port_id];
2542 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2543 return (*dev->dev_ops->dev_led_off)(dev);
2547 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2551 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2553 struct rte_eth_dev_info dev_info;
2554 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2557 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2558 rte_eth_dev_info_get(port_id, &dev_info);
2560 for (i = 0; i < dev_info.max_mac_addrs; i++)
2561 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2567 static const struct ether_addr null_mac_addr;
2570 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
2573 struct rte_eth_dev *dev;
2578 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2579 dev = &rte_eth_devices[port_id];
2580 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2582 if (is_zero_ether_addr(addr)) {
2583 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2587 if (pool >= ETH_64_POOLS) {
2588 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2592 index = get_mac_addr_index(port_id, addr);
2594 index = get_mac_addr_index(port_id, &null_mac_addr);
2596 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2601 pool_mask = dev->data->mac_pool_sel[index];
2603 /* Check if both MAC address and pool is already there, and do nothing */
2604 if (pool_mask & (1ULL << pool))
2609 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2612 /* Update address in NIC data structure */
2613 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2615 /* Update pool bitmap in NIC data structure */
2616 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2623 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
2625 struct rte_eth_dev *dev;
2628 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2629 dev = &rte_eth_devices[port_id];
2630 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2632 index = get_mac_addr_index(port_id, addr);
2634 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2636 } else if (index < 0)
2637 return 0; /* Do nothing if address wasn't found */
2640 (*dev->dev_ops->mac_addr_remove)(dev, index);
2642 /* Update address in NIC data structure */
2643 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
2645 /* reset pool bitmap */
2646 dev->data->mac_pool_sel[index] = 0;
2652 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
2654 struct rte_eth_dev *dev;
2656 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2658 if (!is_valid_assigned_ether_addr(addr))
2661 dev = &rte_eth_devices[port_id];
2662 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
2664 /* Update default address in NIC data structure */
2665 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
2667 (*dev->dev_ops->mac_addr_set)(dev, addr);
2674 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2678 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2680 struct rte_eth_dev_info dev_info;
2681 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2684 rte_eth_dev_info_get(port_id, &dev_info);
2685 if (!dev->data->hash_mac_addrs)
2688 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
2689 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
2690 ETHER_ADDR_LEN) == 0)
2697 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
2702 struct rte_eth_dev *dev;
2704 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2706 dev = &rte_eth_devices[port_id];
2707 if (is_zero_ether_addr(addr)) {
2708 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2713 index = get_hash_mac_addr_index(port_id, addr);
2714 /* Check if it's already there, and do nothing */
2715 if ((index >= 0) && (on))
2720 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
2721 "set in UTA\n", port_id);
2725 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
2727 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2733 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
2734 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
2736 /* Update address in NIC data structure */
2738 ether_addr_copy(addr,
2739 &dev->data->hash_mac_addrs[index]);
2741 ether_addr_copy(&null_mac_addr,
2742 &dev->data->hash_mac_addrs[index]);
2749 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
2751 struct rte_eth_dev *dev;
2753 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2755 dev = &rte_eth_devices[port_id];
2757 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
2758 return (*dev->dev_ops->uc_all_hash_table_set)(dev, on);
2761 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
2764 struct rte_eth_dev *dev;
2765 struct rte_eth_dev_info dev_info;
2766 struct rte_eth_link link;
2768 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2770 dev = &rte_eth_devices[port_id];
2771 rte_eth_dev_info_get(port_id, &dev_info);
2772 link = dev->data->dev_link;
2774 if (queue_idx > dev_info.max_tx_queues) {
2775 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
2776 "invalid queue id=%d\n", port_id, queue_idx);
2780 if (tx_rate > link.link_speed) {
2781 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
2782 "bigger than link speed= %d\n",
2783 tx_rate, link.link_speed);
2787 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
2788 return (*dev->dev_ops->set_queue_rate_limit)(dev, queue_idx, tx_rate);
2792 rte_eth_mirror_rule_set(uint16_t port_id,
2793 struct rte_eth_mirror_conf *mirror_conf,
2794 uint8_t rule_id, uint8_t on)
2796 struct rte_eth_dev *dev;
2798 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2799 if (mirror_conf->rule_type == 0) {
2800 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
2804 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
2805 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
2810 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
2811 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
2812 (mirror_conf->pool_mask == 0)) {
2813 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
2817 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
2818 mirror_conf->vlan.vlan_mask == 0) {
2819 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
2823 dev = &rte_eth_devices[port_id];
2824 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
2826 return (*dev->dev_ops->mirror_rule_set)(dev, mirror_conf, rule_id, on);
2830 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
2832 struct rte_eth_dev *dev;
2834 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2836 dev = &rte_eth_devices[port_id];
2837 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
2839 return (*dev->dev_ops->mirror_rule_reset)(dev, rule_id);
2843 rte_eth_dev_callback_register(uint16_t port_id,
2844 enum rte_eth_event_type event,
2845 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2847 struct rte_eth_dev *dev;
2848 struct rte_eth_dev_callback *user_cb;
2853 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2855 dev = &rte_eth_devices[port_id];
2856 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2858 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
2859 if (user_cb->cb_fn == cb_fn &&
2860 user_cb->cb_arg == cb_arg &&
2861 user_cb->event == event) {
2866 /* create a new callback. */
2867 if (user_cb == NULL) {
2868 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
2869 sizeof(struct rte_eth_dev_callback), 0);
2870 if (user_cb != NULL) {
2871 user_cb->cb_fn = cb_fn;
2872 user_cb->cb_arg = cb_arg;
2873 user_cb->event = event;
2874 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs), user_cb, next);
2878 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2879 return (user_cb == NULL) ? -ENOMEM : 0;
2883 rte_eth_dev_callback_unregister(uint16_t port_id,
2884 enum rte_eth_event_type event,
2885 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2888 struct rte_eth_dev *dev;
2889 struct rte_eth_dev_callback *cb, *next;
2894 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2896 dev = &rte_eth_devices[port_id];
2897 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2900 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL; cb = next) {
2902 next = TAILQ_NEXT(cb, next);
2904 if (cb->cb_fn != cb_fn || cb->event != event ||
2905 (cb->cb_arg != (void *)-1 &&
2906 cb->cb_arg != cb_arg))
2910 * if this callback is not executing right now,
2913 if (cb->active == 0) {
2914 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
2921 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2926 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
2927 enum rte_eth_event_type event, void *cb_arg, void *ret_param)
2929 struct rte_eth_dev_callback *cb_lst;
2930 struct rte_eth_dev_callback dev_cb;
2933 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2934 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
2935 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
2940 dev_cb.cb_arg = cb_arg;
2941 if (ret_param != NULL)
2942 dev_cb.ret_param = ret_param;
2944 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2945 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
2946 dev_cb.cb_arg, dev_cb.ret_param);
2947 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2950 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2955 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
2958 struct rte_eth_dev *dev;
2959 struct rte_intr_handle *intr_handle;
2963 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2965 dev = &rte_eth_devices[port_id];
2967 if (!dev->intr_handle) {
2968 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
2972 intr_handle = dev->intr_handle;
2973 if (!intr_handle->intr_vec) {
2974 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2978 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
2979 vec = intr_handle->intr_vec[qid];
2980 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2981 if (rc && rc != -EEXIST) {
2982 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2983 " op %d epfd %d vec %u\n",
2984 port_id, qid, op, epfd, vec);
2991 const struct rte_memzone *
2992 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
2993 uint16_t queue_id, size_t size, unsigned align,
2996 char z_name[RTE_MEMZONE_NAMESIZE];
2997 const struct rte_memzone *mz;
2999 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
3000 dev->device->driver->name, ring_name,
3001 dev->data->port_id, queue_id);
3003 mz = rte_memzone_lookup(z_name);
3007 return rte_memzone_reserve_aligned(z_name, size, socket_id, 0, align);
3011 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3012 int epfd, int op, void *data)
3015 struct rte_eth_dev *dev;
3016 struct rte_intr_handle *intr_handle;
3019 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3021 dev = &rte_eth_devices[port_id];
3022 if (queue_id >= dev->data->nb_rx_queues) {
3023 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
3027 if (!dev->intr_handle) {
3028 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3032 intr_handle = dev->intr_handle;
3033 if (!intr_handle->intr_vec) {
3034 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3038 vec = intr_handle->intr_vec[queue_id];
3039 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3040 if (rc && rc != -EEXIST) {
3041 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3042 " op %d epfd %d vec %u\n",
3043 port_id, queue_id, op, epfd, vec);
3051 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3054 struct rte_eth_dev *dev;
3056 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3058 dev = &rte_eth_devices[port_id];
3060 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3061 return (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id);
3065 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3068 struct rte_eth_dev *dev;
3070 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3072 dev = &rte_eth_devices[port_id];
3074 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3075 return (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id);
3080 rte_eth_dev_filter_supported(uint16_t port_id,
3081 enum rte_filter_type filter_type)
3083 struct rte_eth_dev *dev;
3085 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3087 dev = &rte_eth_devices[port_id];
3088 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3089 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3090 RTE_ETH_FILTER_NOP, NULL);
3094 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3095 enum rte_filter_op filter_op, void *arg)
3097 struct rte_eth_dev *dev;
3099 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3101 dev = &rte_eth_devices[port_id];
3102 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3103 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op, arg);
3107 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3108 rte_rx_callback_fn fn, void *user_param)
3110 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3111 rte_errno = ENOTSUP;
3114 /* check input parameters */
3115 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3116 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3120 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3128 cb->param = user_param;
3130 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3131 /* Add the callbacks in fifo order. */
3132 struct rte_eth_rxtx_callback *tail =
3133 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3136 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3143 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3149 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3150 rte_rx_callback_fn fn, void *user_param)
3152 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3153 rte_errno = ENOTSUP;
3156 /* check input parameters */
3157 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3158 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3163 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3171 cb->param = user_param;
3173 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3174 /* Add the callbacks at fisrt position*/
3175 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3177 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3178 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3184 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3185 rte_tx_callback_fn fn, void *user_param)
3187 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3188 rte_errno = ENOTSUP;
3191 /* check input parameters */
3192 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3193 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3198 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3206 cb->param = user_param;
3208 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3209 /* Add the callbacks in fifo order. */
3210 struct rte_eth_rxtx_callback *tail =
3211 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3214 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3221 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3227 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3228 struct rte_eth_rxtx_callback *user_cb)
3230 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3233 /* Check input parameters. */
3234 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3235 if (user_cb == NULL ||
3236 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3239 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3240 struct rte_eth_rxtx_callback *cb;
3241 struct rte_eth_rxtx_callback **prev_cb;
3244 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3245 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3246 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3248 if (cb == user_cb) {
3249 /* Remove the user cb from the callback list. */
3250 *prev_cb = cb->next;
3255 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3261 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3262 struct rte_eth_rxtx_callback *user_cb)
3264 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3267 /* Check input parameters. */
3268 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3269 if (user_cb == NULL ||
3270 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3273 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3275 struct rte_eth_rxtx_callback *cb;
3276 struct rte_eth_rxtx_callback **prev_cb;
3278 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3279 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3280 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3282 if (cb == user_cb) {
3283 /* Remove the user cb from the callback list. */
3284 *prev_cb = cb->next;
3289 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3295 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3296 struct rte_eth_rxq_info *qinfo)
3298 struct rte_eth_dev *dev;
3300 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3305 dev = &rte_eth_devices[port_id];
3306 if (queue_id >= dev->data->nb_rx_queues) {
3307 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3311 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3313 memset(qinfo, 0, sizeof(*qinfo));
3314 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3319 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3320 struct rte_eth_txq_info *qinfo)
3322 struct rte_eth_dev *dev;
3324 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3329 dev = &rte_eth_devices[port_id];
3330 if (queue_id >= dev->data->nb_tx_queues) {
3331 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3335 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3337 memset(qinfo, 0, sizeof(*qinfo));
3338 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3343 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3344 struct ether_addr *mc_addr_set,
3345 uint32_t nb_mc_addr)
3347 struct rte_eth_dev *dev;
3349 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3351 dev = &rte_eth_devices[port_id];
3352 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3353 return dev->dev_ops->set_mc_addr_list(dev, mc_addr_set, nb_mc_addr);
3357 rte_eth_timesync_enable(uint16_t port_id)
3359 struct rte_eth_dev *dev;
3361 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3362 dev = &rte_eth_devices[port_id];
3364 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3365 return (*dev->dev_ops->timesync_enable)(dev);
3369 rte_eth_timesync_disable(uint16_t port_id)
3371 struct rte_eth_dev *dev;
3373 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3374 dev = &rte_eth_devices[port_id];
3376 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3377 return (*dev->dev_ops->timesync_disable)(dev);
3381 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
3384 struct rte_eth_dev *dev;
3386 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3387 dev = &rte_eth_devices[port_id];
3389 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3390 return (*dev->dev_ops->timesync_read_rx_timestamp)(dev, timestamp, flags);
3394 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
3395 struct timespec *timestamp)
3397 struct rte_eth_dev *dev;
3399 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3400 dev = &rte_eth_devices[port_id];
3402 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3403 return (*dev->dev_ops->timesync_read_tx_timestamp)(dev, timestamp);
3407 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
3409 struct rte_eth_dev *dev;
3411 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3412 dev = &rte_eth_devices[port_id];
3414 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3415 return (*dev->dev_ops->timesync_adjust_time)(dev, delta);
3419 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
3421 struct rte_eth_dev *dev;
3423 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3424 dev = &rte_eth_devices[port_id];
3426 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3427 return (*dev->dev_ops->timesync_read_time)(dev, timestamp);
3431 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
3433 struct rte_eth_dev *dev;
3435 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3436 dev = &rte_eth_devices[port_id];
3438 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3439 return (*dev->dev_ops->timesync_write_time)(dev, timestamp);
3443 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
3445 struct rte_eth_dev *dev;
3447 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3449 dev = &rte_eth_devices[port_id];
3450 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3451 return (*dev->dev_ops->get_reg)(dev, info);
3455 rte_eth_dev_get_eeprom_length(uint16_t port_id)
3457 struct rte_eth_dev *dev;
3459 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3461 dev = &rte_eth_devices[port_id];
3462 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3463 return (*dev->dev_ops->get_eeprom_length)(dev);
3467 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3469 struct rte_eth_dev *dev;
3471 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3473 dev = &rte_eth_devices[port_id];
3474 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3475 return (*dev->dev_ops->get_eeprom)(dev, info);
3479 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3481 struct rte_eth_dev *dev;
3483 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3485 dev = &rte_eth_devices[port_id];
3486 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
3487 return (*dev->dev_ops->set_eeprom)(dev, info);
3491 rte_eth_dev_get_dcb_info(uint16_t port_id,
3492 struct rte_eth_dcb_info *dcb_info)
3494 struct rte_eth_dev *dev;
3496 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3498 dev = &rte_eth_devices[port_id];
3499 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
3501 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
3502 return (*dev->dev_ops->get_dcb_info)(dev, dcb_info);
3506 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
3507 struct rte_eth_l2_tunnel_conf *l2_tunnel)
3509 struct rte_eth_dev *dev;
3511 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3512 if (l2_tunnel == NULL) {
3513 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3517 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3518 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
3522 dev = &rte_eth_devices[port_id];
3523 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
3525 return (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev, l2_tunnel);
3529 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
3530 struct rte_eth_l2_tunnel_conf *l2_tunnel,
3534 struct rte_eth_dev *dev;
3536 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3538 if (l2_tunnel == NULL) {
3539 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3543 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3544 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
3549 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
3553 dev = &rte_eth_devices[port_id];
3554 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
3556 return (*dev->dev_ops->l2_tunnel_offload_set)(dev, l2_tunnel, mask, en);
3560 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
3561 const struct rte_eth_desc_lim *desc_lim)
3563 if (desc_lim->nb_align != 0)
3564 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
3566 if (desc_lim->nb_max != 0)
3567 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
3569 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
3573 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
3574 uint16_t *nb_rx_desc,
3575 uint16_t *nb_tx_desc)
3577 struct rte_eth_dev *dev;
3578 struct rte_eth_dev_info dev_info;
3580 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3582 dev = &rte_eth_devices[port_id];
3583 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
3585 rte_eth_dev_info_get(port_id, &dev_info);
3587 if (nb_rx_desc != NULL)
3588 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
3590 if (nb_tx_desc != NULL)
3591 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
3597 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
3599 struct rte_eth_dev *dev;
3601 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3606 dev = &rte_eth_devices[port_id];
3608 if (*dev->dev_ops->pool_ops_supported == NULL)
3609 return 1; /* all pools are supported */
3611 return (*dev->dev_ops->pool_ops_supported)(dev, pool);