4 * Copyright(c) 2010-2016 Intel Corporation. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Intel Corporation nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 #include <sys/types.h>
35 #include <sys/queue.h>
44 #include <netinet/in.h>
46 #include <rte_byteorder.h>
48 #include <rte_debug.h>
49 #include <rte_interrupts.h>
51 #include <rte_memory.h>
52 #include <rte_memcpy.h>
53 #include <rte_memzone.h>
54 #include <rte_launch.h>
56 #include <rte_per_lcore.h>
57 #include <rte_lcore.h>
58 #include <rte_atomic.h>
59 #include <rte_branch_prediction.h>
60 #include <rte_common.h>
61 #include <rte_mempool.h>
62 #include <rte_malloc.h>
64 #include <rte_errno.h>
65 #include <rte_spinlock.h>
66 #include <rte_string_fns.h>
68 #include "rte_ether.h"
69 #include "rte_ethdev.h"
71 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
72 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
73 static struct rte_eth_dev_data *rte_eth_dev_data;
74 static uint8_t eth_dev_last_created_port;
75 static uint8_t nb_ports;
77 /* spinlock for eth device callbacks */
78 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
80 /* spinlock for add/remove rx callbacks */
81 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
83 /* spinlock for add/remove tx callbacks */
84 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
86 /* store statistics names and its offset in stats structure */
87 struct rte_eth_xstats_name_off {
88 char name[RTE_ETH_XSTATS_NAME_SIZE];
92 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
93 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
94 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
95 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
96 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
97 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
98 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
99 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
100 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
104 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
106 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
107 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
108 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
109 {"errors", offsetof(struct rte_eth_stats, q_errors)},
112 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
113 sizeof(rte_rxq_stats_strings[0]))
115 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
116 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
117 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
119 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
120 sizeof(rte_txq_stats_strings[0]))
124 * The user application callback description.
126 * It contains callback address to be registered by user application,
127 * the pointer to the parameters for callback, and the event type.
129 struct rte_eth_dev_callback {
130 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
131 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
132 void *cb_arg; /**< Parameter for callback */
133 enum rte_eth_event_type event; /**< Interrupt event type */
134 uint32_t active; /**< Callback is executing */
148 rte_eth_dev_data_alloc(void)
150 const unsigned flags = 0;
151 const struct rte_memzone *mz;
153 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
154 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
155 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data),
156 rte_socket_id(), flags);
158 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
160 rte_panic("Cannot allocate memzone for ethernet port data\n");
162 rte_eth_dev_data = mz->addr;
163 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
164 memset(rte_eth_dev_data, 0,
165 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data));
169 rte_eth_dev_allocated(const char *name)
173 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
174 if ((rte_eth_devices[i].attached == DEV_ATTACHED) &&
175 strcmp(rte_eth_devices[i].data->name, name) == 0)
176 return &rte_eth_devices[i];
182 rte_eth_dev_find_free_port(void)
186 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
187 if (rte_eth_devices[i].attached == DEV_DETACHED)
190 return RTE_MAX_ETHPORTS;
193 static struct rte_eth_dev *
194 eth_dev_get(uint8_t port_id)
196 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
198 eth_dev->data = &rte_eth_dev_data[port_id];
199 eth_dev->attached = DEV_ATTACHED;
201 eth_dev_last_created_port = port_id;
208 rte_eth_dev_allocate(const char *name)
211 struct rte_eth_dev *eth_dev;
213 port_id = rte_eth_dev_find_free_port();
214 if (port_id == RTE_MAX_ETHPORTS) {
215 RTE_PMD_DEBUG_TRACE("Reached maximum number of Ethernet ports\n");
219 if (rte_eth_dev_data == NULL)
220 rte_eth_dev_data_alloc();
222 if (rte_eth_dev_allocated(name) != NULL) {
223 RTE_PMD_DEBUG_TRACE("Ethernet Device with name %s already allocated!\n",
228 eth_dev = eth_dev_get(port_id);
229 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
230 eth_dev->data->port_id = port_id;
236 * Attach to a port already registered by the primary process, which
237 * makes sure that the same device would have the same port id both
238 * in the primary and secondary process.
240 static struct rte_eth_dev *
241 eth_dev_attach_secondary(const char *name)
244 struct rte_eth_dev *eth_dev;
246 if (rte_eth_dev_data == NULL)
247 rte_eth_dev_data_alloc();
249 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
250 if (strcmp(rte_eth_dev_data[i].name, name) == 0)
253 if (i == RTE_MAX_ETHPORTS) {
255 "device %s is not driven by the primary process\n",
260 eth_dev = eth_dev_get(i);
261 RTE_ASSERT(eth_dev->data->port_id == i);
267 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
272 eth_dev->attached = DEV_DETACHED;
278 rte_eth_dev_pci_probe(struct rte_pci_driver *pci_drv,
279 struct rte_pci_device *pci_dev)
281 struct eth_driver *eth_drv;
282 struct rte_eth_dev *eth_dev;
283 char ethdev_name[RTE_ETH_NAME_MAX_LEN];
287 eth_drv = (struct eth_driver *)pci_drv;
289 rte_eal_pci_device_name(&pci_dev->addr, ethdev_name,
290 sizeof(ethdev_name));
292 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
293 eth_dev = rte_eth_dev_allocate(ethdev_name);
297 eth_dev->data->dev_private = rte_zmalloc("ethdev private structure",
298 eth_drv->dev_private_size,
299 RTE_CACHE_LINE_SIZE);
300 if (eth_dev->data->dev_private == NULL)
301 rte_panic("Cannot allocate memzone for private port data\n");
303 eth_dev = eth_dev_attach_secondary(ethdev_name);
304 if (eth_dev == NULL) {
306 * if we failed to attach a device, it means the
307 * device is skipped in primary process, due to
308 * some errors. If so, we return a positive value,
309 * to let EAL skip it for the secondary process
315 eth_dev->pci_dev = pci_dev;
316 eth_dev->driver = eth_drv;
317 eth_dev->data->rx_mbuf_alloc_failed = 0;
319 /* init user callbacks */
320 TAILQ_INIT(&(eth_dev->link_intr_cbs));
323 * Set the default MTU.
325 eth_dev->data->mtu = ETHER_MTU;
327 /* Invoke PMD device initialization function */
328 diag = (*eth_drv->eth_dev_init)(eth_dev);
332 RTE_PMD_DEBUG_TRACE("driver %s: eth_dev_init(vendor_id=0x%x device_id=0x%x) failed\n",
333 pci_drv->driver.name,
334 (unsigned) pci_dev->id.vendor_id,
335 (unsigned) pci_dev->id.device_id);
336 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
337 rte_free(eth_dev->data->dev_private);
338 rte_eth_dev_release_port(eth_dev);
343 rte_eth_dev_pci_remove(struct rte_pci_device *pci_dev)
345 const struct eth_driver *eth_drv;
346 struct rte_eth_dev *eth_dev;
347 char ethdev_name[RTE_ETH_NAME_MAX_LEN];
353 rte_eal_pci_device_name(&pci_dev->addr, ethdev_name,
354 sizeof(ethdev_name));
356 eth_dev = rte_eth_dev_allocated(ethdev_name);
360 eth_drv = (const struct eth_driver *)pci_dev->driver;
362 /* Invoke PMD device uninit function */
363 if (*eth_drv->eth_dev_uninit) {
364 ret = (*eth_drv->eth_dev_uninit)(eth_dev);
369 /* free ether device */
370 rte_eth_dev_release_port(eth_dev);
372 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
373 rte_free(eth_dev->data->dev_private);
375 eth_dev->pci_dev = NULL;
376 eth_dev->driver = NULL;
377 eth_dev->data = NULL;
383 rte_eth_dev_is_valid_port(uint8_t port_id)
385 if (port_id >= RTE_MAX_ETHPORTS ||
386 rte_eth_devices[port_id].attached != DEV_ATTACHED)
393 rte_eth_dev_socket_id(uint8_t port_id)
395 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
396 return rte_eth_devices[port_id].data->numa_node;
400 rte_eth_dev_count(void)
406 rte_eth_dev_get_name_by_port(uint8_t port_id, char *name)
410 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
413 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
417 /* shouldn't check 'rte_eth_devices[i].data',
418 * because it might be overwritten by VDEV PMD */
419 tmp = rte_eth_dev_data[port_id].name;
425 rte_eth_dev_get_port_by_name(const char *name, uint8_t *port_id)
430 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
437 *port_id = RTE_MAX_ETHPORTS;
439 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
441 if (!strcmp(name, rte_eth_dev_data[i].name)) {
452 rte_eth_dev_is_detachable(uint8_t port_id)
456 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
458 switch (rte_eth_devices[port_id].data->kdrv) {
459 case RTE_KDRV_IGB_UIO:
460 case RTE_KDRV_UIO_GENERIC:
461 case RTE_KDRV_NIC_UIO:
468 dev_flags = rte_eth_devices[port_id].data->dev_flags;
469 if ((dev_flags & RTE_ETH_DEV_DETACHABLE) &&
470 (!(dev_flags & RTE_ETH_DEV_BONDED_SLAVE)))
476 /* attach the new device, then store port_id of the device */
478 rte_eth_dev_attach(const char *devargs, uint8_t *port_id)
481 int current = rte_eth_dev_count();
485 if ((devargs == NULL) || (port_id == NULL)) {
490 /* parse devargs, then retrieve device name and args */
491 if (rte_eal_parse_devargs_str(devargs, &name, &args))
494 ret = rte_eal_dev_attach(name, args);
498 /* no point looking at the port count if no port exists */
499 if (!rte_eth_dev_count()) {
500 RTE_LOG(ERR, EAL, "No port found for device (%s)\n", name);
505 /* if nothing happened, there is a bug here, since some driver told us
506 * it did attach a device, but did not create a port.
508 if (current == rte_eth_dev_count()) {
513 *port_id = eth_dev_last_created_port;
522 /* detach the device, then store the name of the device */
524 rte_eth_dev_detach(uint8_t port_id, char *name)
533 /* FIXME: move this to eal, once device flags are relocated there */
534 if (rte_eth_dev_is_detachable(port_id))
537 snprintf(name, sizeof(rte_eth_devices[port_id].data->name),
538 "%s", rte_eth_devices[port_id].data->name);
539 ret = rte_eal_dev_detach(name);
550 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
552 uint16_t old_nb_queues = dev->data->nb_rx_queues;
556 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
557 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
558 sizeof(dev->data->rx_queues[0]) * nb_queues,
559 RTE_CACHE_LINE_SIZE);
560 if (dev->data->rx_queues == NULL) {
561 dev->data->nb_rx_queues = 0;
564 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
565 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
567 rxq = dev->data->rx_queues;
569 for (i = nb_queues; i < old_nb_queues; i++)
570 (*dev->dev_ops->rx_queue_release)(rxq[i]);
571 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
572 RTE_CACHE_LINE_SIZE);
575 if (nb_queues > old_nb_queues) {
576 uint16_t new_qs = nb_queues - old_nb_queues;
578 memset(rxq + old_nb_queues, 0,
579 sizeof(rxq[0]) * new_qs);
582 dev->data->rx_queues = rxq;
584 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
585 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
587 rxq = dev->data->rx_queues;
589 for (i = nb_queues; i < old_nb_queues; i++)
590 (*dev->dev_ops->rx_queue_release)(rxq[i]);
592 dev->data->nb_rx_queues = nb_queues;
597 rte_eth_dev_rx_queue_start(uint8_t port_id, uint16_t rx_queue_id)
599 struct rte_eth_dev *dev;
601 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
603 dev = &rte_eth_devices[port_id];
604 if (rx_queue_id >= dev->data->nb_rx_queues) {
605 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
609 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
611 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
612 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
613 " already started\n",
614 rx_queue_id, port_id);
618 return dev->dev_ops->rx_queue_start(dev, rx_queue_id);
623 rte_eth_dev_rx_queue_stop(uint8_t port_id, uint16_t rx_queue_id)
625 struct rte_eth_dev *dev;
627 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
629 dev = &rte_eth_devices[port_id];
630 if (!dev->data->dev_started) {
632 "port %d must be started before start any queue\n", port_id);
636 if (rx_queue_id >= dev->data->nb_rx_queues) {
637 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
641 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
643 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
644 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
645 " already stopped\n",
646 rx_queue_id, port_id);
650 return dev->dev_ops->rx_queue_stop(dev, rx_queue_id);
655 rte_eth_dev_tx_queue_start(uint8_t port_id, uint16_t tx_queue_id)
657 struct rte_eth_dev *dev;
659 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
661 dev = &rte_eth_devices[port_id];
662 if (tx_queue_id >= dev->data->nb_tx_queues) {
663 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
667 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
669 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
670 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
671 " already started\n",
672 tx_queue_id, port_id);
676 return dev->dev_ops->tx_queue_start(dev, tx_queue_id);
681 rte_eth_dev_tx_queue_stop(uint8_t port_id, uint16_t tx_queue_id)
683 struct rte_eth_dev *dev;
685 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
687 dev = &rte_eth_devices[port_id];
688 if (!dev->data->dev_started) {
690 "port %d must be started before start any queue\n", port_id);
694 if (tx_queue_id >= dev->data->nb_tx_queues) {
695 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
699 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
701 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
702 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
703 " already stopped\n",
704 tx_queue_id, port_id);
708 return dev->dev_ops->tx_queue_stop(dev, tx_queue_id);
713 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
715 uint16_t old_nb_queues = dev->data->nb_tx_queues;
719 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
720 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
721 sizeof(dev->data->tx_queues[0]) * nb_queues,
722 RTE_CACHE_LINE_SIZE);
723 if (dev->data->tx_queues == NULL) {
724 dev->data->nb_tx_queues = 0;
727 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
728 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
730 txq = dev->data->tx_queues;
732 for (i = nb_queues; i < old_nb_queues; i++)
733 (*dev->dev_ops->tx_queue_release)(txq[i]);
734 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
735 RTE_CACHE_LINE_SIZE);
738 if (nb_queues > old_nb_queues) {
739 uint16_t new_qs = nb_queues - old_nb_queues;
741 memset(txq + old_nb_queues, 0,
742 sizeof(txq[0]) * new_qs);
745 dev->data->tx_queues = txq;
747 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
748 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
750 txq = dev->data->tx_queues;
752 for (i = nb_queues; i < old_nb_queues; i++)
753 (*dev->dev_ops->tx_queue_release)(txq[i]);
755 dev->data->nb_tx_queues = nb_queues;
760 rte_eth_speed_bitflag(uint32_t speed, int duplex)
763 case ETH_SPEED_NUM_10M:
764 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
765 case ETH_SPEED_NUM_100M:
766 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
767 case ETH_SPEED_NUM_1G:
768 return ETH_LINK_SPEED_1G;
769 case ETH_SPEED_NUM_2_5G:
770 return ETH_LINK_SPEED_2_5G;
771 case ETH_SPEED_NUM_5G:
772 return ETH_LINK_SPEED_5G;
773 case ETH_SPEED_NUM_10G:
774 return ETH_LINK_SPEED_10G;
775 case ETH_SPEED_NUM_20G:
776 return ETH_LINK_SPEED_20G;
777 case ETH_SPEED_NUM_25G:
778 return ETH_LINK_SPEED_25G;
779 case ETH_SPEED_NUM_40G:
780 return ETH_LINK_SPEED_40G;
781 case ETH_SPEED_NUM_50G:
782 return ETH_LINK_SPEED_50G;
783 case ETH_SPEED_NUM_56G:
784 return ETH_LINK_SPEED_56G;
785 case ETH_SPEED_NUM_100G:
786 return ETH_LINK_SPEED_100G;
793 rte_eth_dev_configure(uint8_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
794 const struct rte_eth_conf *dev_conf)
796 struct rte_eth_dev *dev;
797 struct rte_eth_dev_info dev_info;
800 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
802 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
804 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
805 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
809 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
811 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
812 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
816 dev = &rte_eth_devices[port_id];
818 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
819 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
821 if (dev->data->dev_started) {
823 "port %d must be stopped to allow configuration\n", port_id);
827 /* Copy the dev_conf parameter into the dev structure */
828 memcpy(&dev->data->dev_conf, dev_conf, sizeof(dev->data->dev_conf));
831 * Check that the numbers of RX and TX queues are not greater
832 * than the maximum number of RX and TX queues supported by the
835 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
837 if (nb_rx_q == 0 && nb_tx_q == 0) {
838 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d both rx and tx queue cannot be 0\n", port_id);
842 if (nb_rx_q > dev_info.max_rx_queues) {
843 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
844 port_id, nb_rx_q, dev_info.max_rx_queues);
848 if (nb_tx_q > dev_info.max_tx_queues) {
849 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
850 port_id, nb_tx_q, dev_info.max_tx_queues);
855 * If link state interrupt is enabled, check that the
856 * device supports it.
858 if ((dev_conf->intr_conf.lsc == 1) &&
859 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
860 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
861 dev->data->drv_name);
866 * If jumbo frames are enabled, check that the maximum RX packet
867 * length is supported by the configured device.
869 if (dev_conf->rxmode.jumbo_frame == 1) {
870 if (dev_conf->rxmode.max_rx_pkt_len >
871 dev_info.max_rx_pktlen) {
872 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
873 " > max valid value %u\n",
875 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
876 (unsigned)dev_info.max_rx_pktlen);
878 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
879 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
880 " < min valid value %u\n",
882 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
883 (unsigned)ETHER_MIN_LEN);
887 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
888 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
889 /* Use default value */
890 dev->data->dev_conf.rxmode.max_rx_pkt_len =
895 * Setup new number of RX/TX queues and reconfigure device.
897 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
899 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
904 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
906 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
908 rte_eth_dev_rx_queue_config(dev, 0);
912 diag = (*dev->dev_ops->dev_configure)(dev);
914 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
916 rte_eth_dev_rx_queue_config(dev, 0);
917 rte_eth_dev_tx_queue_config(dev, 0);
925 rte_eth_dev_config_restore(uint8_t port_id)
927 struct rte_eth_dev *dev;
928 struct rte_eth_dev_info dev_info;
929 struct ether_addr addr;
933 dev = &rte_eth_devices[port_id];
935 rte_eth_dev_info_get(port_id, &dev_info);
937 if (RTE_ETH_DEV_SRIOV(dev).active)
938 pool = RTE_ETH_DEV_SRIOV(dev).def_vmdq_idx;
940 /* replay MAC address configuration */
941 for (i = 0; i < dev_info.max_mac_addrs; i++) {
942 addr = dev->data->mac_addrs[i];
944 /* skip zero address */
945 if (is_zero_ether_addr(&addr))
948 /* add address to the hardware */
949 if (*dev->dev_ops->mac_addr_add &&
950 (dev->data->mac_pool_sel[i] & (1ULL << pool)))
951 (*dev->dev_ops->mac_addr_add)(dev, &addr, i, pool);
953 RTE_PMD_DEBUG_TRACE("port %d: MAC address array not supported\n",
955 /* exit the loop but not return an error */
960 /* replay promiscuous configuration */
961 if (rte_eth_promiscuous_get(port_id) == 1)
962 rte_eth_promiscuous_enable(port_id);
963 else if (rte_eth_promiscuous_get(port_id) == 0)
964 rte_eth_promiscuous_disable(port_id);
966 /* replay all multicast configuration */
967 if (rte_eth_allmulticast_get(port_id) == 1)
968 rte_eth_allmulticast_enable(port_id);
969 else if (rte_eth_allmulticast_get(port_id) == 0)
970 rte_eth_allmulticast_disable(port_id);
974 rte_eth_dev_start(uint8_t port_id)
976 struct rte_eth_dev *dev;
979 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
981 dev = &rte_eth_devices[port_id];
983 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
985 if (dev->data->dev_started != 0) {
986 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
987 " already started\n",
992 diag = (*dev->dev_ops->dev_start)(dev);
994 dev->data->dev_started = 1;
998 rte_eth_dev_config_restore(port_id);
1000 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1001 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1002 (*dev->dev_ops->link_update)(dev, 0);
1008 rte_eth_dev_stop(uint8_t port_id)
1010 struct rte_eth_dev *dev;
1012 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1013 dev = &rte_eth_devices[port_id];
1015 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1017 if (dev->data->dev_started == 0) {
1018 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu8
1019 " already stopped\n",
1024 dev->data->dev_started = 0;
1025 (*dev->dev_ops->dev_stop)(dev);
1029 rte_eth_dev_set_link_up(uint8_t port_id)
1031 struct rte_eth_dev *dev;
1033 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1035 dev = &rte_eth_devices[port_id];
1037 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1038 return (*dev->dev_ops->dev_set_link_up)(dev);
1042 rte_eth_dev_set_link_down(uint8_t port_id)
1044 struct rte_eth_dev *dev;
1046 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1048 dev = &rte_eth_devices[port_id];
1050 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1051 return (*dev->dev_ops->dev_set_link_down)(dev);
1055 rte_eth_dev_close(uint8_t port_id)
1057 struct rte_eth_dev *dev;
1059 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1060 dev = &rte_eth_devices[port_id];
1062 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1063 dev->data->dev_started = 0;
1064 (*dev->dev_ops->dev_close)(dev);
1066 dev->data->nb_rx_queues = 0;
1067 rte_free(dev->data->rx_queues);
1068 dev->data->rx_queues = NULL;
1069 dev->data->nb_tx_queues = 0;
1070 rte_free(dev->data->tx_queues);
1071 dev->data->tx_queues = NULL;
1075 rte_eth_rx_queue_setup(uint8_t port_id, uint16_t rx_queue_id,
1076 uint16_t nb_rx_desc, unsigned int socket_id,
1077 const struct rte_eth_rxconf *rx_conf,
1078 struct rte_mempool *mp)
1081 uint32_t mbp_buf_size;
1082 struct rte_eth_dev *dev;
1083 struct rte_eth_dev_info dev_info;
1085 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1087 dev = &rte_eth_devices[port_id];
1088 if (rx_queue_id >= dev->data->nb_rx_queues) {
1089 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1093 if (dev->data->dev_started) {
1094 RTE_PMD_DEBUG_TRACE(
1095 "port %d must be stopped to allow configuration\n", port_id);
1099 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1100 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1103 * Check the size of the mbuf data buffer.
1104 * This value must be provided in the private data of the memory pool.
1105 * First check that the memory pool has a valid private data.
1107 rte_eth_dev_info_get(port_id, &dev_info);
1108 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1109 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1110 mp->name, (int) mp->private_data_size,
1111 (int) sizeof(struct rte_pktmbuf_pool_private));
1114 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1116 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1117 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1118 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1122 (int)(RTE_PKTMBUF_HEADROOM +
1123 dev_info.min_rx_bufsize),
1124 (int)RTE_PKTMBUF_HEADROOM,
1125 (int)dev_info.min_rx_bufsize);
1129 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1130 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1131 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1133 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1134 "should be: <= %hu, = %hu, and a product of %hu\n",
1136 dev_info.rx_desc_lim.nb_max,
1137 dev_info.rx_desc_lim.nb_min,
1138 dev_info.rx_desc_lim.nb_align);
1142 if (rx_conf == NULL)
1143 rx_conf = &dev_info.default_rxconf;
1145 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1146 socket_id, rx_conf, mp);
1148 if (!dev->data->min_rx_buf_size ||
1149 dev->data->min_rx_buf_size > mbp_buf_size)
1150 dev->data->min_rx_buf_size = mbp_buf_size;
1157 rte_eth_tx_queue_setup(uint8_t port_id, uint16_t tx_queue_id,
1158 uint16_t nb_tx_desc, unsigned int socket_id,
1159 const struct rte_eth_txconf *tx_conf)
1161 struct rte_eth_dev *dev;
1162 struct rte_eth_dev_info dev_info;
1164 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1166 dev = &rte_eth_devices[port_id];
1167 if (tx_queue_id >= dev->data->nb_tx_queues) {
1168 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1172 if (dev->data->dev_started) {
1173 RTE_PMD_DEBUG_TRACE(
1174 "port %d must be stopped to allow configuration\n", port_id);
1178 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1179 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1181 rte_eth_dev_info_get(port_id, &dev_info);
1183 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1184 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1185 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1186 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1187 "should be: <= %hu, = %hu, and a product of %hu\n",
1189 dev_info.tx_desc_lim.nb_max,
1190 dev_info.tx_desc_lim.nb_min,
1191 dev_info.tx_desc_lim.nb_align);
1195 if (tx_conf == NULL)
1196 tx_conf = &dev_info.default_txconf;
1198 return (*dev->dev_ops->tx_queue_setup)(dev, tx_queue_id, nb_tx_desc,
1199 socket_id, tx_conf);
1203 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1204 void *userdata __rte_unused)
1208 for (i = 0; i < unsent; i++)
1209 rte_pktmbuf_free(pkts[i]);
1213 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1216 uint64_t *count = userdata;
1219 for (i = 0; i < unsent; i++)
1220 rte_pktmbuf_free(pkts[i]);
1226 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1227 buffer_tx_error_fn cbfn, void *userdata)
1229 buffer->error_callback = cbfn;
1230 buffer->error_userdata = userdata;
1235 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1242 buffer->size = size;
1243 if (buffer->error_callback == NULL) {
1244 ret = rte_eth_tx_buffer_set_err_callback(
1245 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1252 rte_eth_promiscuous_enable(uint8_t port_id)
1254 struct rte_eth_dev *dev;
1256 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1257 dev = &rte_eth_devices[port_id];
1259 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1260 (*dev->dev_ops->promiscuous_enable)(dev);
1261 dev->data->promiscuous = 1;
1265 rte_eth_promiscuous_disable(uint8_t port_id)
1267 struct rte_eth_dev *dev;
1269 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1270 dev = &rte_eth_devices[port_id];
1272 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1273 dev->data->promiscuous = 0;
1274 (*dev->dev_ops->promiscuous_disable)(dev);
1278 rte_eth_promiscuous_get(uint8_t port_id)
1280 struct rte_eth_dev *dev;
1282 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1284 dev = &rte_eth_devices[port_id];
1285 return dev->data->promiscuous;
1289 rte_eth_allmulticast_enable(uint8_t port_id)
1291 struct rte_eth_dev *dev;
1293 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1294 dev = &rte_eth_devices[port_id];
1296 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1297 (*dev->dev_ops->allmulticast_enable)(dev);
1298 dev->data->all_multicast = 1;
1302 rte_eth_allmulticast_disable(uint8_t port_id)
1304 struct rte_eth_dev *dev;
1306 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1307 dev = &rte_eth_devices[port_id];
1309 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1310 dev->data->all_multicast = 0;
1311 (*dev->dev_ops->allmulticast_disable)(dev);
1315 rte_eth_allmulticast_get(uint8_t port_id)
1317 struct rte_eth_dev *dev;
1319 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1321 dev = &rte_eth_devices[port_id];
1322 return dev->data->all_multicast;
1326 rte_eth_dev_atomic_read_link_status(struct rte_eth_dev *dev,
1327 struct rte_eth_link *link)
1329 struct rte_eth_link *dst = link;
1330 struct rte_eth_link *src = &(dev->data->dev_link);
1332 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1333 *(uint64_t *)src) == 0)
1340 rte_eth_link_get(uint8_t port_id, struct rte_eth_link *eth_link)
1342 struct rte_eth_dev *dev;
1344 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1345 dev = &rte_eth_devices[port_id];
1347 if (dev->data->dev_conf.intr_conf.lsc != 0)
1348 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1350 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1351 (*dev->dev_ops->link_update)(dev, 1);
1352 *eth_link = dev->data->dev_link;
1357 rte_eth_link_get_nowait(uint8_t port_id, struct rte_eth_link *eth_link)
1359 struct rte_eth_dev *dev;
1361 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1362 dev = &rte_eth_devices[port_id];
1364 if (dev->data->dev_conf.intr_conf.lsc != 0)
1365 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1367 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1368 (*dev->dev_ops->link_update)(dev, 0);
1369 *eth_link = dev->data->dev_link;
1374 rte_eth_stats_get(uint8_t port_id, struct rte_eth_stats *stats)
1376 struct rte_eth_dev *dev;
1378 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1380 dev = &rte_eth_devices[port_id];
1381 memset(stats, 0, sizeof(*stats));
1383 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1384 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1385 (*dev->dev_ops->stats_get)(dev, stats);
1390 rte_eth_stats_reset(uint8_t port_id)
1392 struct rte_eth_dev *dev;
1394 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1395 dev = &rte_eth_devices[port_id];
1397 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->stats_reset);
1398 (*dev->dev_ops->stats_reset)(dev);
1399 dev->data->rx_mbuf_alloc_failed = 0;
1403 get_xstats_count(uint8_t port_id)
1405 struct rte_eth_dev *dev;
1408 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1409 dev = &rte_eth_devices[port_id];
1410 if (dev->dev_ops->xstats_get_names != NULL) {
1411 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1416 count += RTE_NB_STATS;
1417 count += RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS) *
1419 count += RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS) *
1425 rte_eth_xstats_get_names(uint8_t port_id,
1426 struct rte_eth_xstat_name *xstats_names,
1429 struct rte_eth_dev *dev;
1430 int cnt_used_entries;
1431 int cnt_expected_entries;
1432 int cnt_driver_entries;
1433 uint32_t idx, id_queue;
1436 cnt_expected_entries = get_xstats_count(port_id);
1437 if (xstats_names == NULL || cnt_expected_entries < 0 ||
1438 (int)size < cnt_expected_entries)
1439 return cnt_expected_entries;
1441 /* port_id checked in get_xstats_count() */
1442 dev = &rte_eth_devices[port_id];
1443 cnt_used_entries = 0;
1445 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1446 snprintf(xstats_names[cnt_used_entries].name,
1447 sizeof(xstats_names[0].name),
1448 "%s", rte_stats_strings[idx].name);
1451 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1452 for (id_queue = 0; id_queue < num_q; id_queue++) {
1453 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1454 snprintf(xstats_names[cnt_used_entries].name,
1455 sizeof(xstats_names[0].name),
1457 id_queue, rte_rxq_stats_strings[idx].name);
1462 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1463 for (id_queue = 0; id_queue < num_q; id_queue++) {
1464 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1465 snprintf(xstats_names[cnt_used_entries].name,
1466 sizeof(xstats_names[0].name),
1468 id_queue, rte_txq_stats_strings[idx].name);
1473 if (dev->dev_ops->xstats_get_names != NULL) {
1474 /* If there are any driver-specific xstats, append them
1477 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
1479 xstats_names + cnt_used_entries,
1480 size - cnt_used_entries);
1481 if (cnt_driver_entries < 0)
1482 return cnt_driver_entries;
1483 cnt_used_entries += cnt_driver_entries;
1486 return cnt_used_entries;
1489 /* retrieve ethdev extended statistics */
1491 rte_eth_xstats_get(uint8_t port_id, struct rte_eth_xstat *xstats,
1494 struct rte_eth_stats eth_stats;
1495 struct rte_eth_dev *dev;
1496 unsigned count = 0, i, q;
1498 uint64_t val, *stats_ptr;
1499 uint16_t nb_rxqs, nb_txqs;
1501 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1503 dev = &rte_eth_devices[port_id];
1505 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1506 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1508 /* Return generic statistics */
1509 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
1510 (nb_txqs * RTE_NB_TXQ_STATS);
1512 /* implemented by the driver */
1513 if (dev->dev_ops->xstats_get != NULL) {
1514 /* Retrieve the xstats from the driver at the end of the
1517 xcount = (*dev->dev_ops->xstats_get)(dev,
1518 xstats ? xstats + count : NULL,
1519 (n > count) ? n - count : 0);
1525 if (n < count + xcount || xstats == NULL)
1526 return count + xcount;
1528 /* now fill the xstats structure */
1530 rte_eth_stats_get(port_id, ð_stats);
1533 for (i = 0; i < RTE_NB_STATS; i++) {
1534 stats_ptr = RTE_PTR_ADD(ð_stats,
1535 rte_stats_strings[i].offset);
1537 xstats[count++].value = val;
1541 for (q = 0; q < nb_rxqs; q++) {
1542 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
1543 stats_ptr = RTE_PTR_ADD(ð_stats,
1544 rte_rxq_stats_strings[i].offset +
1545 q * sizeof(uint64_t));
1547 xstats[count++].value = val;
1552 for (q = 0; q < nb_txqs; q++) {
1553 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
1554 stats_ptr = RTE_PTR_ADD(ð_stats,
1555 rte_txq_stats_strings[i].offset +
1556 q * sizeof(uint64_t));
1558 xstats[count++].value = val;
1562 for (i = 0; i < count; i++)
1564 /* add an offset to driver-specific stats */
1565 for ( ; i < count + xcount; i++)
1566 xstats[i].id += count;
1568 return count + xcount;
1571 /* reset ethdev extended statistics */
1573 rte_eth_xstats_reset(uint8_t port_id)
1575 struct rte_eth_dev *dev;
1577 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1578 dev = &rte_eth_devices[port_id];
1580 /* implemented by the driver */
1581 if (dev->dev_ops->xstats_reset != NULL) {
1582 (*dev->dev_ops->xstats_reset)(dev);
1586 /* fallback to default */
1587 rte_eth_stats_reset(port_id);
1591 set_queue_stats_mapping(uint8_t port_id, uint16_t queue_id, uint8_t stat_idx,
1594 struct rte_eth_dev *dev;
1596 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1598 dev = &rte_eth_devices[port_id];
1600 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
1602 if (is_rx && (queue_id >= dev->data->nb_rx_queues))
1605 if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
1608 if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
1611 return (*dev->dev_ops->queue_stats_mapping_set)
1612 (dev, queue_id, stat_idx, is_rx);
1617 rte_eth_dev_set_tx_queue_stats_mapping(uint8_t port_id, uint16_t tx_queue_id,
1620 return set_queue_stats_mapping(port_id, tx_queue_id, stat_idx,
1626 rte_eth_dev_set_rx_queue_stats_mapping(uint8_t port_id, uint16_t rx_queue_id,
1629 return set_queue_stats_mapping(port_id, rx_queue_id, stat_idx,
1634 rte_eth_dev_info_get(uint8_t port_id, struct rte_eth_dev_info *dev_info)
1636 struct rte_eth_dev *dev;
1637 const struct rte_eth_desc_lim lim = {
1638 .nb_max = UINT16_MAX,
1643 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1644 dev = &rte_eth_devices[port_id];
1646 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
1647 dev_info->rx_desc_lim = lim;
1648 dev_info->tx_desc_lim = lim;
1650 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
1651 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
1652 dev_info->pci_dev = dev->pci_dev;
1653 dev_info->driver_name = dev->data->drv_name;
1654 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
1655 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
1659 rte_eth_dev_get_supported_ptypes(uint8_t port_id, uint32_t ptype_mask,
1660 uint32_t *ptypes, int num)
1663 struct rte_eth_dev *dev;
1664 const uint32_t *all_ptypes;
1666 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1667 dev = &rte_eth_devices[port_id];
1668 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
1669 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
1674 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
1675 if (all_ptypes[i] & ptype_mask) {
1677 ptypes[j] = all_ptypes[i];
1685 rte_eth_macaddr_get(uint8_t port_id, struct ether_addr *mac_addr)
1687 struct rte_eth_dev *dev;
1689 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1690 dev = &rte_eth_devices[port_id];
1691 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
1696 rte_eth_dev_get_mtu(uint8_t port_id, uint16_t *mtu)
1698 struct rte_eth_dev *dev;
1700 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1702 dev = &rte_eth_devices[port_id];
1703 *mtu = dev->data->mtu;
1708 rte_eth_dev_set_mtu(uint8_t port_id, uint16_t mtu)
1711 struct rte_eth_dev *dev;
1713 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1714 dev = &rte_eth_devices[port_id];
1715 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
1717 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
1719 dev->data->mtu = mtu;
1725 rte_eth_dev_vlan_filter(uint8_t port_id, uint16_t vlan_id, int on)
1727 struct rte_eth_dev *dev;
1729 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1730 dev = &rte_eth_devices[port_id];
1731 if (!(dev->data->dev_conf.rxmode.hw_vlan_filter)) {
1732 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
1736 if (vlan_id > 4095) {
1737 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
1738 port_id, (unsigned) vlan_id);
1741 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
1743 return (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
1747 rte_eth_dev_set_vlan_strip_on_queue(uint8_t port_id, uint16_t rx_queue_id, int on)
1749 struct rte_eth_dev *dev;
1751 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1752 dev = &rte_eth_devices[port_id];
1753 if (rx_queue_id >= dev->data->nb_rx_queues) {
1754 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
1758 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
1759 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
1765 rte_eth_dev_set_vlan_ether_type(uint8_t port_id,
1766 enum rte_vlan_type vlan_type,
1769 struct rte_eth_dev *dev;
1771 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1772 dev = &rte_eth_devices[port_id];
1773 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
1775 return (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type, tpid);
1779 rte_eth_dev_set_vlan_offload(uint8_t port_id, int offload_mask)
1781 struct rte_eth_dev *dev;
1786 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1787 dev = &rte_eth_devices[port_id];
1789 /*check which option changed by application*/
1790 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
1791 org = !!(dev->data->dev_conf.rxmode.hw_vlan_strip);
1793 dev->data->dev_conf.rxmode.hw_vlan_strip = (uint8_t)cur;
1794 mask |= ETH_VLAN_STRIP_MASK;
1797 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
1798 org = !!(dev->data->dev_conf.rxmode.hw_vlan_filter);
1800 dev->data->dev_conf.rxmode.hw_vlan_filter = (uint8_t)cur;
1801 mask |= ETH_VLAN_FILTER_MASK;
1804 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
1805 org = !!(dev->data->dev_conf.rxmode.hw_vlan_extend);
1807 dev->data->dev_conf.rxmode.hw_vlan_extend = (uint8_t)cur;
1808 mask |= ETH_VLAN_EXTEND_MASK;
1815 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
1816 (*dev->dev_ops->vlan_offload_set)(dev, mask);
1822 rte_eth_dev_get_vlan_offload(uint8_t port_id)
1824 struct rte_eth_dev *dev;
1827 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1828 dev = &rte_eth_devices[port_id];
1830 if (dev->data->dev_conf.rxmode.hw_vlan_strip)
1831 ret |= ETH_VLAN_STRIP_OFFLOAD;
1833 if (dev->data->dev_conf.rxmode.hw_vlan_filter)
1834 ret |= ETH_VLAN_FILTER_OFFLOAD;
1836 if (dev->data->dev_conf.rxmode.hw_vlan_extend)
1837 ret |= ETH_VLAN_EXTEND_OFFLOAD;
1843 rte_eth_dev_set_vlan_pvid(uint8_t port_id, uint16_t pvid, int on)
1845 struct rte_eth_dev *dev;
1847 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1848 dev = &rte_eth_devices[port_id];
1849 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
1850 (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on);
1856 rte_eth_dev_flow_ctrl_get(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
1858 struct rte_eth_dev *dev;
1860 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1861 dev = &rte_eth_devices[port_id];
1862 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
1863 memset(fc_conf, 0, sizeof(*fc_conf));
1864 return (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf);
1868 rte_eth_dev_flow_ctrl_set(uint8_t port_id, struct rte_eth_fc_conf *fc_conf)
1870 struct rte_eth_dev *dev;
1872 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1873 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
1874 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
1878 dev = &rte_eth_devices[port_id];
1879 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
1880 return (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf);
1884 rte_eth_dev_priority_flow_ctrl_set(uint8_t port_id, struct rte_eth_pfc_conf *pfc_conf)
1886 struct rte_eth_dev *dev;
1888 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1889 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
1890 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
1894 dev = &rte_eth_devices[port_id];
1895 /* High water, low water validation are device specific */
1896 if (*dev->dev_ops->priority_flow_ctrl_set)
1897 return (*dev->dev_ops->priority_flow_ctrl_set)(dev, pfc_conf);
1902 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
1910 if (reta_size != RTE_ALIGN(reta_size, RTE_RETA_GROUP_SIZE)) {
1911 RTE_PMD_DEBUG_TRACE("Invalid reta size, should be %u aligned\n",
1912 RTE_RETA_GROUP_SIZE);
1916 num = reta_size / RTE_RETA_GROUP_SIZE;
1917 for (i = 0; i < num; i++) {
1918 if (reta_conf[i].mask)
1926 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
1930 uint16_t i, idx, shift;
1936 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
1940 for (i = 0; i < reta_size; i++) {
1941 idx = i / RTE_RETA_GROUP_SIZE;
1942 shift = i % RTE_RETA_GROUP_SIZE;
1943 if ((reta_conf[idx].mask & (1ULL << shift)) &&
1944 (reta_conf[idx].reta[shift] >= max_rxq)) {
1945 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
1946 "the maximum rxq index: %u\n", idx, shift,
1947 reta_conf[idx].reta[shift], max_rxq);
1956 rte_eth_dev_rss_reta_update(uint8_t port_id,
1957 struct rte_eth_rss_reta_entry64 *reta_conf,
1960 struct rte_eth_dev *dev;
1963 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1964 /* Check mask bits */
1965 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
1969 dev = &rte_eth_devices[port_id];
1971 /* Check entry value */
1972 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
1973 dev->data->nb_rx_queues);
1977 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
1978 return (*dev->dev_ops->reta_update)(dev, reta_conf, reta_size);
1982 rte_eth_dev_rss_reta_query(uint8_t port_id,
1983 struct rte_eth_rss_reta_entry64 *reta_conf,
1986 struct rte_eth_dev *dev;
1989 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1991 /* Check mask bits */
1992 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
1996 dev = &rte_eth_devices[port_id];
1997 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
1998 return (*dev->dev_ops->reta_query)(dev, reta_conf, reta_size);
2002 rte_eth_dev_rss_hash_update(uint8_t port_id, struct rte_eth_rss_conf *rss_conf)
2004 struct rte_eth_dev *dev;
2005 uint16_t rss_hash_protos;
2007 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2008 rss_hash_protos = rss_conf->rss_hf;
2009 if ((rss_hash_protos != 0) &&
2010 ((rss_hash_protos & ETH_RSS_PROTO_MASK) == 0)) {
2011 RTE_PMD_DEBUG_TRACE("Invalid rss_hash_protos=0x%x\n",
2015 dev = &rte_eth_devices[port_id];
2016 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2017 return (*dev->dev_ops->rss_hash_update)(dev, rss_conf);
2021 rte_eth_dev_rss_hash_conf_get(uint8_t port_id,
2022 struct rte_eth_rss_conf *rss_conf)
2024 struct rte_eth_dev *dev;
2026 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2027 dev = &rte_eth_devices[port_id];
2028 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2029 return (*dev->dev_ops->rss_hash_conf_get)(dev, rss_conf);
2033 rte_eth_dev_udp_tunnel_port_add(uint8_t port_id,
2034 struct rte_eth_udp_tunnel *udp_tunnel)
2036 struct rte_eth_dev *dev;
2038 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2039 if (udp_tunnel == NULL) {
2040 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2044 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2045 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2049 dev = &rte_eth_devices[port_id];
2050 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2051 return (*dev->dev_ops->udp_tunnel_port_add)(dev, udp_tunnel);
2055 rte_eth_dev_udp_tunnel_port_delete(uint8_t port_id,
2056 struct rte_eth_udp_tunnel *udp_tunnel)
2058 struct rte_eth_dev *dev;
2060 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2061 dev = &rte_eth_devices[port_id];
2063 if (udp_tunnel == NULL) {
2064 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2068 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2069 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2073 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2074 return (*dev->dev_ops->udp_tunnel_port_del)(dev, udp_tunnel);
2078 rte_eth_led_on(uint8_t port_id)
2080 struct rte_eth_dev *dev;
2082 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2083 dev = &rte_eth_devices[port_id];
2084 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2085 return (*dev->dev_ops->dev_led_on)(dev);
2089 rte_eth_led_off(uint8_t port_id)
2091 struct rte_eth_dev *dev;
2093 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2094 dev = &rte_eth_devices[port_id];
2095 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2096 return (*dev->dev_ops->dev_led_off)(dev);
2100 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2104 get_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2106 struct rte_eth_dev_info dev_info;
2107 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2110 rte_eth_dev_info_get(port_id, &dev_info);
2112 for (i = 0; i < dev_info.max_mac_addrs; i++)
2113 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2119 static const struct ether_addr null_mac_addr;
2122 rte_eth_dev_mac_addr_add(uint8_t port_id, struct ether_addr *addr,
2125 struct rte_eth_dev *dev;
2129 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2130 dev = &rte_eth_devices[port_id];
2131 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2133 if (is_zero_ether_addr(addr)) {
2134 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2138 if (pool >= ETH_64_POOLS) {
2139 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2143 index = get_mac_addr_index(port_id, addr);
2145 index = get_mac_addr_index(port_id, &null_mac_addr);
2147 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2152 pool_mask = dev->data->mac_pool_sel[index];
2154 /* Check if both MAC address and pool is already there, and do nothing */
2155 if (pool_mask & (1ULL << pool))
2160 (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2162 /* Update address in NIC data structure */
2163 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2165 /* Update pool bitmap in NIC data structure */
2166 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2172 rte_eth_dev_mac_addr_remove(uint8_t port_id, struct ether_addr *addr)
2174 struct rte_eth_dev *dev;
2177 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2178 dev = &rte_eth_devices[port_id];
2179 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2181 index = get_mac_addr_index(port_id, addr);
2183 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2185 } else if (index < 0)
2186 return 0; /* Do nothing if address wasn't found */
2189 (*dev->dev_ops->mac_addr_remove)(dev, index);
2191 /* Update address in NIC data structure */
2192 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
2194 /* reset pool bitmap */
2195 dev->data->mac_pool_sel[index] = 0;
2201 rte_eth_dev_default_mac_addr_set(uint8_t port_id, struct ether_addr *addr)
2203 struct rte_eth_dev *dev;
2205 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2207 if (!is_valid_assigned_ether_addr(addr))
2210 dev = &rte_eth_devices[port_id];
2211 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
2213 /* Update default address in NIC data structure */
2214 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
2216 (*dev->dev_ops->mac_addr_set)(dev, addr);
2222 rte_eth_dev_set_vf_rxmode(uint8_t port_id, uint16_t vf,
2223 uint16_t rx_mode, uint8_t on)
2226 struct rte_eth_dev *dev;
2227 struct rte_eth_dev_info dev_info;
2229 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2231 dev = &rte_eth_devices[port_id];
2232 rte_eth_dev_info_get(port_id, &dev_info);
2234 num_vfs = dev_info.max_vfs;
2236 RTE_PMD_DEBUG_TRACE("set VF RX mode:invalid VF id %d\n", vf);
2241 RTE_PMD_DEBUG_TRACE("set VF RX mode:mode mask ca not be zero\n");
2244 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_rx_mode, -ENOTSUP);
2245 return (*dev->dev_ops->set_vf_rx_mode)(dev, vf, rx_mode, on);
2249 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2253 get_hash_mac_addr_index(uint8_t port_id, const struct ether_addr *addr)
2255 struct rte_eth_dev_info dev_info;
2256 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2259 rte_eth_dev_info_get(port_id, &dev_info);
2260 if (!dev->data->hash_mac_addrs)
2263 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
2264 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
2265 ETHER_ADDR_LEN) == 0)
2272 rte_eth_dev_uc_hash_table_set(uint8_t port_id, struct ether_addr *addr,
2277 struct rte_eth_dev *dev;
2279 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2281 dev = &rte_eth_devices[port_id];
2282 if (is_zero_ether_addr(addr)) {
2283 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2288 index = get_hash_mac_addr_index(port_id, addr);
2289 /* Check if it's already there, and do nothing */
2290 if ((index >= 0) && (on))
2295 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
2296 "set in UTA\n", port_id);
2300 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
2302 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2308 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
2309 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
2311 /* Update address in NIC data structure */
2313 ether_addr_copy(addr,
2314 &dev->data->hash_mac_addrs[index]);
2316 ether_addr_copy(&null_mac_addr,
2317 &dev->data->hash_mac_addrs[index]);
2324 rte_eth_dev_uc_all_hash_table_set(uint8_t port_id, uint8_t on)
2326 struct rte_eth_dev *dev;
2328 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2330 dev = &rte_eth_devices[port_id];
2332 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
2333 return (*dev->dev_ops->uc_all_hash_table_set)(dev, on);
2337 rte_eth_dev_set_vf_rx(uint8_t port_id, uint16_t vf, uint8_t on)
2340 struct rte_eth_dev *dev;
2341 struct rte_eth_dev_info dev_info;
2343 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2345 dev = &rte_eth_devices[port_id];
2346 rte_eth_dev_info_get(port_id, &dev_info);
2348 num_vfs = dev_info.max_vfs;
2350 RTE_PMD_DEBUG_TRACE("port %d: invalid vf id\n", port_id);
2354 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_rx, -ENOTSUP);
2355 return (*dev->dev_ops->set_vf_rx)(dev, vf, on);
2359 rte_eth_dev_set_vf_tx(uint8_t port_id, uint16_t vf, uint8_t on)
2362 struct rte_eth_dev *dev;
2363 struct rte_eth_dev_info dev_info;
2365 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2367 dev = &rte_eth_devices[port_id];
2368 rte_eth_dev_info_get(port_id, &dev_info);
2370 num_vfs = dev_info.max_vfs;
2372 RTE_PMD_DEBUG_TRACE("set pool tx:invalid pool id=%d\n", vf);
2376 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_tx, -ENOTSUP);
2377 return (*dev->dev_ops->set_vf_tx)(dev, vf, on);
2381 rte_eth_dev_set_vf_vlan_filter(uint8_t port_id, uint16_t vlan_id,
2382 uint64_t vf_mask, uint8_t vlan_on)
2384 struct rte_eth_dev *dev;
2386 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2388 dev = &rte_eth_devices[port_id];
2390 if (vlan_id > ETHER_MAX_VLAN_ID) {
2391 RTE_PMD_DEBUG_TRACE("VF VLAN filter:invalid VLAN id=%d\n",
2397 RTE_PMD_DEBUG_TRACE("VF VLAN filter:pool_mask can not be 0\n");
2401 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_vlan_filter, -ENOTSUP);
2402 return (*dev->dev_ops->set_vf_vlan_filter)(dev, vlan_id,
2406 int rte_eth_set_queue_rate_limit(uint8_t port_id, uint16_t queue_idx,
2409 struct rte_eth_dev *dev;
2410 struct rte_eth_dev_info dev_info;
2411 struct rte_eth_link link;
2413 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2415 dev = &rte_eth_devices[port_id];
2416 rte_eth_dev_info_get(port_id, &dev_info);
2417 link = dev->data->dev_link;
2419 if (queue_idx > dev_info.max_tx_queues) {
2420 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
2421 "invalid queue id=%d\n", port_id, queue_idx);
2425 if (tx_rate > link.link_speed) {
2426 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
2427 "bigger than link speed= %d\n",
2428 tx_rate, link.link_speed);
2432 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
2433 return (*dev->dev_ops->set_queue_rate_limit)(dev, queue_idx, tx_rate);
2436 int rte_eth_set_vf_rate_limit(uint8_t port_id, uint16_t vf, uint16_t tx_rate,
2439 struct rte_eth_dev *dev;
2440 struct rte_eth_dev_info dev_info;
2441 struct rte_eth_link link;
2446 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2448 dev = &rte_eth_devices[port_id];
2449 rte_eth_dev_info_get(port_id, &dev_info);
2450 link = dev->data->dev_link;
2452 if (vf > dev_info.max_vfs) {
2453 RTE_PMD_DEBUG_TRACE("set VF rate limit:port %d: "
2454 "invalid vf id=%d\n", port_id, vf);
2458 if (tx_rate > link.link_speed) {
2459 RTE_PMD_DEBUG_TRACE("set VF rate limit:invalid tx_rate=%d, "
2460 "bigger than link speed= %d\n",
2461 tx_rate, link.link_speed);
2465 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_vf_rate_limit, -ENOTSUP);
2466 return (*dev->dev_ops->set_vf_rate_limit)(dev, vf, tx_rate, q_msk);
2470 rte_eth_mirror_rule_set(uint8_t port_id,
2471 struct rte_eth_mirror_conf *mirror_conf,
2472 uint8_t rule_id, uint8_t on)
2474 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2476 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2477 if (mirror_conf->rule_type == 0) {
2478 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
2482 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
2483 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
2488 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
2489 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
2490 (mirror_conf->pool_mask == 0)) {
2491 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
2495 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
2496 mirror_conf->vlan.vlan_mask == 0) {
2497 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
2501 dev = &rte_eth_devices[port_id];
2502 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
2504 return (*dev->dev_ops->mirror_rule_set)(dev, mirror_conf, rule_id, on);
2508 rte_eth_mirror_rule_reset(uint8_t port_id, uint8_t rule_id)
2510 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2512 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2514 dev = &rte_eth_devices[port_id];
2515 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
2517 return (*dev->dev_ops->mirror_rule_reset)(dev, rule_id);
2521 rte_eth_dev_callback_register(uint8_t port_id,
2522 enum rte_eth_event_type event,
2523 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2525 struct rte_eth_dev *dev;
2526 struct rte_eth_dev_callback *user_cb;
2531 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2533 dev = &rte_eth_devices[port_id];
2534 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2536 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
2537 if (user_cb->cb_fn == cb_fn &&
2538 user_cb->cb_arg == cb_arg &&
2539 user_cb->event == event) {
2544 /* create a new callback. */
2545 if (user_cb == NULL) {
2546 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
2547 sizeof(struct rte_eth_dev_callback), 0);
2548 if (user_cb != NULL) {
2549 user_cb->cb_fn = cb_fn;
2550 user_cb->cb_arg = cb_arg;
2551 user_cb->event = event;
2552 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs), user_cb, next);
2556 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2557 return (user_cb == NULL) ? -ENOMEM : 0;
2561 rte_eth_dev_callback_unregister(uint8_t port_id,
2562 enum rte_eth_event_type event,
2563 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2566 struct rte_eth_dev *dev;
2567 struct rte_eth_dev_callback *cb, *next;
2572 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2574 dev = &rte_eth_devices[port_id];
2575 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2578 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL; cb = next) {
2580 next = TAILQ_NEXT(cb, next);
2582 if (cb->cb_fn != cb_fn || cb->event != event ||
2583 (cb->cb_arg != (void *)-1 &&
2584 cb->cb_arg != cb_arg))
2588 * if this callback is not executing right now,
2591 if (cb->active == 0) {
2592 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
2599 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2604 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
2605 enum rte_eth_event_type event, void *cb_arg)
2607 struct rte_eth_dev_callback *cb_lst;
2608 struct rte_eth_dev_callback dev_cb;
2610 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2611 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
2612 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
2617 dev_cb.cb_arg = (void *) cb_arg;
2619 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2620 dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
2622 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2625 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2629 rte_eth_dev_rx_intr_ctl(uint8_t port_id, int epfd, int op, void *data)
2632 struct rte_eth_dev *dev;
2633 struct rte_intr_handle *intr_handle;
2637 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2639 dev = &rte_eth_devices[port_id];
2640 intr_handle = &dev->pci_dev->intr_handle;
2641 if (!intr_handle->intr_vec) {
2642 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2646 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
2647 vec = intr_handle->intr_vec[qid];
2648 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2649 if (rc && rc != -EEXIST) {
2650 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2651 " op %d epfd %d vec %u\n",
2652 port_id, qid, op, epfd, vec);
2659 const struct rte_memzone *
2660 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
2661 uint16_t queue_id, size_t size, unsigned align,
2664 char z_name[RTE_MEMZONE_NAMESIZE];
2665 const struct rte_memzone *mz;
2667 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
2668 dev->driver->pci_drv.driver.name, ring_name,
2669 dev->data->port_id, queue_id);
2671 mz = rte_memzone_lookup(z_name);
2675 if (rte_xen_dom0_supported())
2676 return rte_memzone_reserve_bounded(z_name, size, socket_id,
2677 0, align, RTE_PGSIZE_2M);
2679 return rte_memzone_reserve_aligned(z_name, size, socket_id,
2684 rte_eth_dev_rx_intr_ctl_q(uint8_t port_id, uint16_t queue_id,
2685 int epfd, int op, void *data)
2688 struct rte_eth_dev *dev;
2689 struct rte_intr_handle *intr_handle;
2692 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2694 dev = &rte_eth_devices[port_id];
2695 if (queue_id >= dev->data->nb_rx_queues) {
2696 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
2700 intr_handle = &dev->pci_dev->intr_handle;
2701 if (!intr_handle->intr_vec) {
2702 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2706 vec = intr_handle->intr_vec[queue_id];
2707 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2708 if (rc && rc != -EEXIST) {
2709 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2710 " op %d epfd %d vec %u\n",
2711 port_id, queue_id, op, epfd, vec);
2719 rte_eth_dev_rx_intr_enable(uint8_t port_id,
2722 struct rte_eth_dev *dev;
2724 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2726 dev = &rte_eth_devices[port_id];
2728 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
2729 return (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id);
2733 rte_eth_dev_rx_intr_disable(uint8_t port_id,
2736 struct rte_eth_dev *dev;
2738 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2740 dev = &rte_eth_devices[port_id];
2742 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
2743 return (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id);
2746 #ifdef RTE_NIC_BYPASS
2747 int rte_eth_dev_bypass_init(uint8_t port_id)
2749 struct rte_eth_dev *dev;
2751 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2753 dev = &rte_eth_devices[port_id];
2754 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_init, -ENOTSUP);
2755 (*dev->dev_ops->bypass_init)(dev);
2760 rte_eth_dev_bypass_state_show(uint8_t port_id, uint32_t *state)
2762 struct rte_eth_dev *dev;
2764 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2766 dev = &rte_eth_devices[port_id];
2767 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_show, -ENOTSUP);
2768 (*dev->dev_ops->bypass_state_show)(dev, state);
2773 rte_eth_dev_bypass_state_set(uint8_t port_id, uint32_t *new_state)
2775 struct rte_eth_dev *dev;
2777 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2779 dev = &rte_eth_devices[port_id];
2780 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_set, -ENOTSUP);
2781 (*dev->dev_ops->bypass_state_set)(dev, new_state);
2786 rte_eth_dev_bypass_event_show(uint8_t port_id, uint32_t event, uint32_t *state)
2788 struct rte_eth_dev *dev;
2790 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2792 dev = &rte_eth_devices[port_id];
2793 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_state_show, -ENOTSUP);
2794 (*dev->dev_ops->bypass_event_show)(dev, event, state);
2799 rte_eth_dev_bypass_event_store(uint8_t port_id, uint32_t event, uint32_t state)
2801 struct rte_eth_dev *dev;
2803 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2805 dev = &rte_eth_devices[port_id];
2807 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_event_set, -ENOTSUP);
2808 (*dev->dev_ops->bypass_event_set)(dev, event, state);
2813 rte_eth_dev_wd_timeout_store(uint8_t port_id, uint32_t timeout)
2815 struct rte_eth_dev *dev;
2817 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2819 dev = &rte_eth_devices[port_id];
2821 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_timeout_set, -ENOTSUP);
2822 (*dev->dev_ops->bypass_wd_timeout_set)(dev, timeout);
2827 rte_eth_dev_bypass_ver_show(uint8_t port_id, uint32_t *ver)
2829 struct rte_eth_dev *dev;
2831 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2833 dev = &rte_eth_devices[port_id];
2835 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_ver_show, -ENOTSUP);
2836 (*dev->dev_ops->bypass_ver_show)(dev, ver);
2841 rte_eth_dev_bypass_wd_timeout_show(uint8_t port_id, uint32_t *wd_timeout)
2843 struct rte_eth_dev *dev;
2845 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2847 dev = &rte_eth_devices[port_id];
2849 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_timeout_show, -ENOTSUP);
2850 (*dev->dev_ops->bypass_wd_timeout_show)(dev, wd_timeout);
2855 rte_eth_dev_bypass_wd_reset(uint8_t port_id)
2857 struct rte_eth_dev *dev;
2859 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2861 dev = &rte_eth_devices[port_id];
2863 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->bypass_wd_reset, -ENOTSUP);
2864 (*dev->dev_ops->bypass_wd_reset)(dev);
2870 rte_eth_dev_filter_supported(uint8_t port_id, enum rte_filter_type filter_type)
2872 struct rte_eth_dev *dev;
2874 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2876 dev = &rte_eth_devices[port_id];
2877 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
2878 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
2879 RTE_ETH_FILTER_NOP, NULL);
2883 rte_eth_dev_filter_ctrl(uint8_t port_id, enum rte_filter_type filter_type,
2884 enum rte_filter_op filter_op, void *arg)
2886 struct rte_eth_dev *dev;
2888 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2890 dev = &rte_eth_devices[port_id];
2891 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
2892 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op, arg);
2896 rte_eth_add_rx_callback(uint8_t port_id, uint16_t queue_id,
2897 rte_rx_callback_fn fn, void *user_param)
2899 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2900 rte_errno = ENOTSUP;
2903 /* check input parameters */
2904 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2905 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
2909 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2917 cb->param = user_param;
2919 rte_spinlock_lock(&rte_eth_rx_cb_lock);
2920 /* Add the callbacks in fifo order. */
2921 struct rte_eth_rxtx_callback *tail =
2922 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
2925 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
2932 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
2938 rte_eth_add_first_rx_callback(uint8_t port_id, uint16_t queue_id,
2939 rte_rx_callback_fn fn, void *user_param)
2941 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2942 rte_errno = ENOTSUP;
2945 /* check input parameters */
2946 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2947 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
2952 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2960 cb->param = user_param;
2962 rte_spinlock_lock(&rte_eth_rx_cb_lock);
2963 /* Add the callbacks at fisrt position*/
2964 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
2966 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
2967 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
2973 rte_eth_add_tx_callback(uint8_t port_id, uint16_t queue_id,
2974 rte_tx_callback_fn fn, void *user_param)
2976 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
2977 rte_errno = ENOTSUP;
2980 /* check input parameters */
2981 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
2982 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
2987 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
2995 cb->param = user_param;
2997 rte_spinlock_lock(&rte_eth_tx_cb_lock);
2998 /* Add the callbacks in fifo order. */
2999 struct rte_eth_rxtx_callback *tail =
3000 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3003 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3010 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3016 rte_eth_remove_rx_callback(uint8_t port_id, uint16_t queue_id,
3017 struct rte_eth_rxtx_callback *user_cb)
3019 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3022 /* Check input parameters. */
3023 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3024 if (user_cb == NULL ||
3025 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3028 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3029 struct rte_eth_rxtx_callback *cb;
3030 struct rte_eth_rxtx_callback **prev_cb;
3033 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3034 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3035 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3037 if (cb == user_cb) {
3038 /* Remove the user cb from the callback list. */
3039 *prev_cb = cb->next;
3044 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3050 rte_eth_remove_tx_callback(uint8_t port_id, uint16_t queue_id,
3051 struct rte_eth_rxtx_callback *user_cb)
3053 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3056 /* Check input parameters. */
3057 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3058 if (user_cb == NULL ||
3059 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3062 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3064 struct rte_eth_rxtx_callback *cb;
3065 struct rte_eth_rxtx_callback **prev_cb;
3067 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3068 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3069 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3071 if (cb == user_cb) {
3072 /* Remove the user cb from the callback list. */
3073 *prev_cb = cb->next;
3078 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3084 rte_eth_rx_queue_info_get(uint8_t port_id, uint16_t queue_id,
3085 struct rte_eth_rxq_info *qinfo)
3087 struct rte_eth_dev *dev;
3089 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3094 dev = &rte_eth_devices[port_id];
3095 if (queue_id >= dev->data->nb_rx_queues) {
3096 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3100 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3102 memset(qinfo, 0, sizeof(*qinfo));
3103 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3108 rte_eth_tx_queue_info_get(uint8_t port_id, uint16_t queue_id,
3109 struct rte_eth_txq_info *qinfo)
3111 struct rte_eth_dev *dev;
3113 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3118 dev = &rte_eth_devices[port_id];
3119 if (queue_id >= dev->data->nb_tx_queues) {
3120 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3124 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3126 memset(qinfo, 0, sizeof(*qinfo));
3127 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3132 rte_eth_dev_set_mc_addr_list(uint8_t port_id,
3133 struct ether_addr *mc_addr_set,
3134 uint32_t nb_mc_addr)
3136 struct rte_eth_dev *dev;
3138 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3140 dev = &rte_eth_devices[port_id];
3141 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3142 return dev->dev_ops->set_mc_addr_list(dev, mc_addr_set, nb_mc_addr);
3146 rte_eth_timesync_enable(uint8_t port_id)
3148 struct rte_eth_dev *dev;
3150 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3151 dev = &rte_eth_devices[port_id];
3153 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3154 return (*dev->dev_ops->timesync_enable)(dev);
3158 rte_eth_timesync_disable(uint8_t port_id)
3160 struct rte_eth_dev *dev;
3162 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3163 dev = &rte_eth_devices[port_id];
3165 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3166 return (*dev->dev_ops->timesync_disable)(dev);
3170 rte_eth_timesync_read_rx_timestamp(uint8_t port_id, struct timespec *timestamp,
3173 struct rte_eth_dev *dev;
3175 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3176 dev = &rte_eth_devices[port_id];
3178 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3179 return (*dev->dev_ops->timesync_read_rx_timestamp)(dev, timestamp, flags);
3183 rte_eth_timesync_read_tx_timestamp(uint8_t port_id, struct timespec *timestamp)
3185 struct rte_eth_dev *dev;
3187 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3188 dev = &rte_eth_devices[port_id];
3190 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3191 return (*dev->dev_ops->timesync_read_tx_timestamp)(dev, timestamp);
3195 rte_eth_timesync_adjust_time(uint8_t port_id, int64_t delta)
3197 struct rte_eth_dev *dev;
3199 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3200 dev = &rte_eth_devices[port_id];
3202 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3203 return (*dev->dev_ops->timesync_adjust_time)(dev, delta);
3207 rte_eth_timesync_read_time(uint8_t port_id, struct timespec *timestamp)
3209 struct rte_eth_dev *dev;
3211 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3212 dev = &rte_eth_devices[port_id];
3214 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3215 return (*dev->dev_ops->timesync_read_time)(dev, timestamp);
3219 rte_eth_timesync_write_time(uint8_t port_id, const struct timespec *timestamp)
3221 struct rte_eth_dev *dev;
3223 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3224 dev = &rte_eth_devices[port_id];
3226 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3227 return (*dev->dev_ops->timesync_write_time)(dev, timestamp);
3231 rte_eth_dev_get_reg_info(uint8_t port_id, struct rte_dev_reg_info *info)
3233 struct rte_eth_dev *dev;
3235 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3237 dev = &rte_eth_devices[port_id];
3238 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3239 return (*dev->dev_ops->get_reg)(dev, info);
3243 rte_eth_dev_get_eeprom_length(uint8_t port_id)
3245 struct rte_eth_dev *dev;
3247 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3249 dev = &rte_eth_devices[port_id];
3250 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3251 return (*dev->dev_ops->get_eeprom_length)(dev);
3255 rte_eth_dev_get_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3257 struct rte_eth_dev *dev;
3259 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3261 dev = &rte_eth_devices[port_id];
3262 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3263 return (*dev->dev_ops->get_eeprom)(dev, info);
3267 rte_eth_dev_set_eeprom(uint8_t port_id, struct rte_dev_eeprom_info *info)
3269 struct rte_eth_dev *dev;
3271 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3273 dev = &rte_eth_devices[port_id];
3274 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
3275 return (*dev->dev_ops->set_eeprom)(dev, info);
3279 rte_eth_dev_get_dcb_info(uint8_t port_id,
3280 struct rte_eth_dcb_info *dcb_info)
3282 struct rte_eth_dev *dev;
3284 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3286 dev = &rte_eth_devices[port_id];
3287 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
3289 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
3290 return (*dev->dev_ops->get_dcb_info)(dev, dcb_info);
3294 rte_eth_copy_pci_info(struct rte_eth_dev *eth_dev, struct rte_pci_device *pci_dev)
3296 if ((eth_dev == NULL) || (pci_dev == NULL)) {
3297 RTE_PMD_DEBUG_TRACE("NULL pointer eth_dev=%p pci_dev=%p\n",
3302 eth_dev->data->dev_flags = 0;
3303 if (pci_dev->driver->drv_flags & RTE_PCI_DRV_INTR_LSC)
3304 eth_dev->data->dev_flags |= RTE_ETH_DEV_INTR_LSC;
3305 if (pci_dev->driver->drv_flags & RTE_PCI_DRV_DETACHABLE)
3306 eth_dev->data->dev_flags |= RTE_ETH_DEV_DETACHABLE;
3308 eth_dev->data->kdrv = pci_dev->kdrv;
3309 eth_dev->data->numa_node = pci_dev->device.numa_node;
3310 eth_dev->data->drv_name = pci_dev->driver->driver.name;
3314 rte_eth_dev_l2_tunnel_eth_type_conf(uint8_t port_id,
3315 struct rte_eth_l2_tunnel_conf *l2_tunnel)
3317 struct rte_eth_dev *dev;
3319 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3320 if (l2_tunnel == NULL) {
3321 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3325 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3326 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
3330 dev = &rte_eth_devices[port_id];
3331 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
3333 return (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev, l2_tunnel);
3337 rte_eth_dev_l2_tunnel_offload_set(uint8_t port_id,
3338 struct rte_eth_l2_tunnel_conf *l2_tunnel,
3342 struct rte_eth_dev *dev;
3344 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3346 if (l2_tunnel == NULL) {
3347 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3351 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3352 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
3357 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
3361 dev = &rte_eth_devices[port_id];
3362 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
3364 return (*dev->dev_ops->l2_tunnel_offload_set)(dev, l2_tunnel, mask, en);