4 * Copyright(c) 2010-2017 Intel Corporation. All rights reserved.
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
11 * * Redistributions of source code must retain the above copyright
12 * notice, this list of conditions and the following disclaimer.
13 * * Redistributions in binary form must reproduce the above copyright
14 * notice, this list of conditions and the following disclaimer in
15 * the documentation and/or other materials provided with the
17 * * Neither the name of Intel Corporation nor the names of its
18 * contributors may be used to endorse or promote products derived
19 * from this software without specific prior written permission.
21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
24 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34 #include <sys/types.h>
35 #include <sys/queue.h>
44 #include <netinet/in.h>
46 #include <rte_byteorder.h>
48 #include <rte_debug.h>
49 #include <rte_interrupts.h>
50 #include <rte_memory.h>
51 #include <rte_memcpy.h>
52 #include <rte_memzone.h>
53 #include <rte_launch.h>
55 #include <rte_per_lcore.h>
56 #include <rte_lcore.h>
57 #include <rte_atomic.h>
58 #include <rte_branch_prediction.h>
59 #include <rte_common.h>
60 #include <rte_mempool.h>
61 #include <rte_malloc.h>
63 #include <rte_errno.h>
64 #include <rte_spinlock.h>
65 #include <rte_string_fns.h>
67 #include "rte_ether.h"
68 #include "rte_ethdev.h"
69 #include "ethdev_profile.h"
71 static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
72 struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
73 static struct rte_eth_dev_data *rte_eth_dev_data;
74 static uint8_t eth_dev_last_created_port;
76 /* spinlock for eth device callbacks */
77 static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
79 /* spinlock for add/remove rx callbacks */
80 static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
82 /* spinlock for add/remove tx callbacks */
83 static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
85 /* store statistics names and its offset in stats structure */
86 struct rte_eth_xstats_name_off {
87 char name[RTE_ETH_XSTATS_NAME_SIZE];
91 static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
92 {"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
93 {"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
94 {"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
95 {"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
96 {"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
97 {"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
98 {"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
99 {"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
103 #define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
105 static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
106 {"packets", offsetof(struct rte_eth_stats, q_ipackets)},
107 {"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
108 {"errors", offsetof(struct rte_eth_stats, q_errors)},
111 #define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
112 sizeof(rte_rxq_stats_strings[0]))
114 static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
115 {"packets", offsetof(struct rte_eth_stats, q_opackets)},
116 {"bytes", offsetof(struct rte_eth_stats, q_obytes)},
118 #define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
119 sizeof(rte_txq_stats_strings[0]))
123 * The user application callback description.
125 * It contains callback address to be registered by user application,
126 * the pointer to the parameters for callback, and the event type.
128 struct rte_eth_dev_callback {
129 TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
130 rte_eth_dev_cb_fn cb_fn; /**< Callback address */
131 void *cb_arg; /**< Parameter for callback */
132 void *ret_param; /**< Return parameter */
133 enum rte_eth_event_type event; /**< Interrupt event type */
134 uint32_t active; /**< Callback is executing */
143 rte_eth_find_next(uint16_t port_id)
145 while (port_id < RTE_MAX_ETHPORTS &&
146 rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED)
149 if (port_id >= RTE_MAX_ETHPORTS)
150 return RTE_MAX_ETHPORTS;
156 rte_eth_dev_data_alloc(void)
158 const unsigned flags = 0;
159 const struct rte_memzone *mz;
161 if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
162 mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
163 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data),
164 rte_socket_id(), flags);
166 mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
168 rte_panic("Cannot allocate memzone for ethernet port data\n");
170 rte_eth_dev_data = mz->addr;
171 if (rte_eal_process_type() == RTE_PROC_PRIMARY)
172 memset(rte_eth_dev_data, 0,
173 RTE_MAX_ETHPORTS * sizeof(*rte_eth_dev_data));
177 rte_eth_dev_allocated(const char *name)
181 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
182 if ((rte_eth_devices[i].state == RTE_ETH_DEV_ATTACHED) &&
183 strcmp(rte_eth_devices[i].data->name, name) == 0)
184 return &rte_eth_devices[i];
190 rte_eth_dev_find_free_port(void)
194 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
195 /* Using shared name field to find a free port. */
196 if (rte_eth_dev_data[i].name[0] == '\0') {
197 RTE_ASSERT(rte_eth_devices[i].state ==
202 return RTE_MAX_ETHPORTS;
205 static struct rte_eth_dev *
206 eth_dev_get(uint16_t port_id)
208 struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
210 eth_dev->data = &rte_eth_dev_data[port_id];
211 eth_dev->state = RTE_ETH_DEV_ATTACHED;
212 TAILQ_INIT(&(eth_dev->link_intr_cbs));
214 eth_dev_last_created_port = port_id;
220 rte_eth_dev_allocate(const char *name)
223 struct rte_eth_dev *eth_dev;
225 if (rte_eth_dev_data == NULL)
226 rte_eth_dev_data_alloc();
228 port_id = rte_eth_dev_find_free_port();
229 if (port_id == RTE_MAX_ETHPORTS) {
230 RTE_PMD_DEBUG_TRACE("Reached maximum number of Ethernet ports\n");
234 if (rte_eth_dev_allocated(name) != NULL) {
235 RTE_PMD_DEBUG_TRACE("Ethernet Device with name %s already allocated!\n",
240 eth_dev = eth_dev_get(port_id);
241 snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
242 eth_dev->data->port_id = port_id;
243 eth_dev->data->mtu = ETHER_MTU;
249 * Attach to a port already registered by the primary process, which
250 * makes sure that the same device would have the same port id both
251 * in the primary and secondary process.
254 rte_eth_dev_attach_secondary(const char *name)
257 struct rte_eth_dev *eth_dev;
259 if (rte_eth_dev_data == NULL)
260 rte_eth_dev_data_alloc();
262 for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
263 if (strcmp(rte_eth_dev_data[i].name, name) == 0)
266 if (i == RTE_MAX_ETHPORTS) {
268 "device %s is not driven by the primary process\n",
273 eth_dev = eth_dev_get(i);
274 RTE_ASSERT(eth_dev->data->port_id == i);
280 rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
285 memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
286 eth_dev->state = RTE_ETH_DEV_UNUSED;
291 rte_eth_dev_is_valid_port(uint16_t port_id)
293 if (port_id >= RTE_MAX_ETHPORTS ||
294 (rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
295 rte_eth_devices[port_id].state != RTE_ETH_DEV_DEFERRED))
302 rte_eth_dev_socket_id(uint16_t port_id)
304 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
305 return rte_eth_devices[port_id].data->numa_node;
309 rte_eth_dev_get_sec_ctx(uint8_t port_id)
311 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
312 return rte_eth_devices[port_id].security_ctx;
316 rte_eth_dev_count(void)
323 RTE_ETH_FOREACH_DEV(p)
330 rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
334 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
337 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
341 /* shouldn't check 'rte_eth_devices[i].data',
342 * because it might be overwritten by VDEV PMD */
343 tmp = rte_eth_dev_data[port_id].name;
349 rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
354 RTE_PMD_DEBUG_TRACE("Null pointer is specified\n");
358 RTE_ETH_FOREACH_DEV(i) {
360 rte_eth_dev_data[i].name, strlen(name))) {
370 /* attach the new device, then store port_id of the device */
372 rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
375 int current = rte_eth_dev_count();
379 if ((devargs == NULL) || (port_id == NULL)) {
384 /* parse devargs, then retrieve device name and args */
385 if (rte_eal_parse_devargs_str(devargs, &name, &args))
388 ret = rte_eal_dev_attach(name, args);
392 /* no point looking at the port count if no port exists */
393 if (!rte_eth_dev_count()) {
394 RTE_LOG(ERR, EAL, "No port found for device (%s)\n", name);
399 /* if nothing happened, there is a bug here, since some driver told us
400 * it did attach a device, but did not create a port.
402 if (current == rte_eth_dev_count()) {
407 *port_id = eth_dev_last_created_port;
416 /* detach the device, then store the name of the device */
418 rte_eth_dev_detach(uint16_t port_id, char *name)
423 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
430 dev_flags = rte_eth_devices[port_id].data->dev_flags;
431 if (dev_flags & RTE_ETH_DEV_BONDED_SLAVE) {
432 RTE_LOG(ERR, EAL, "Port %" PRIu16 " is bonded, cannot detach\n",
438 snprintf(name, sizeof(rte_eth_devices[port_id].data->name),
439 "%s", rte_eth_devices[port_id].data->name);
441 ret = rte_eal_dev_detach(rte_eth_devices[port_id].device);
445 rte_eth_devices[port_id].state = RTE_ETH_DEV_UNUSED;
453 rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
455 uint16_t old_nb_queues = dev->data->nb_rx_queues;
459 if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
460 dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
461 sizeof(dev->data->rx_queues[0]) * nb_queues,
462 RTE_CACHE_LINE_SIZE);
463 if (dev->data->rx_queues == NULL) {
464 dev->data->nb_rx_queues = 0;
467 } else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
468 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
470 rxq = dev->data->rx_queues;
472 for (i = nb_queues; i < old_nb_queues; i++)
473 (*dev->dev_ops->rx_queue_release)(rxq[i]);
474 rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
475 RTE_CACHE_LINE_SIZE);
478 if (nb_queues > old_nb_queues) {
479 uint16_t new_qs = nb_queues - old_nb_queues;
481 memset(rxq + old_nb_queues, 0,
482 sizeof(rxq[0]) * new_qs);
485 dev->data->rx_queues = rxq;
487 } else if (dev->data->rx_queues != NULL && nb_queues == 0) {
488 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
490 rxq = dev->data->rx_queues;
492 for (i = nb_queues; i < old_nb_queues; i++)
493 (*dev->dev_ops->rx_queue_release)(rxq[i]);
495 rte_free(dev->data->rx_queues);
496 dev->data->rx_queues = NULL;
498 dev->data->nb_rx_queues = nb_queues;
503 rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
505 struct rte_eth_dev *dev;
507 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
509 dev = &rte_eth_devices[port_id];
510 if (rx_queue_id >= dev->data->nb_rx_queues) {
511 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
515 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
517 if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
518 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
519 " already started\n",
520 rx_queue_id, port_id);
524 return dev->dev_ops->rx_queue_start(dev, rx_queue_id);
529 rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
531 struct rte_eth_dev *dev;
533 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
535 dev = &rte_eth_devices[port_id];
536 if (!dev->data->dev_started) {
538 "port %d must be started before start any queue\n", port_id);
542 if (rx_queue_id >= dev->data->nb_rx_queues) {
543 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
547 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
549 if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
550 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
551 " already stopped\n",
552 rx_queue_id, port_id);
556 return dev->dev_ops->rx_queue_stop(dev, rx_queue_id);
561 rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
563 struct rte_eth_dev *dev;
565 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
567 dev = &rte_eth_devices[port_id];
568 if (tx_queue_id >= dev->data->nb_tx_queues) {
569 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
573 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
575 if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
576 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
577 " already started\n",
578 tx_queue_id, port_id);
582 return dev->dev_ops->tx_queue_start(dev, tx_queue_id);
587 rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
589 struct rte_eth_dev *dev;
591 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
593 dev = &rte_eth_devices[port_id];
594 if (!dev->data->dev_started) {
596 "port %d must be started before start any queue\n", port_id);
600 if (tx_queue_id >= dev->data->nb_tx_queues) {
601 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
605 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
607 if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
608 RTE_PMD_DEBUG_TRACE("Queue %" PRIu16" of device with port_id=%" PRIu8
609 " already stopped\n",
610 tx_queue_id, port_id);
614 return dev->dev_ops->tx_queue_stop(dev, tx_queue_id);
619 rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
621 uint16_t old_nb_queues = dev->data->nb_tx_queues;
625 if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
626 dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
627 sizeof(dev->data->tx_queues[0]) * nb_queues,
628 RTE_CACHE_LINE_SIZE);
629 if (dev->data->tx_queues == NULL) {
630 dev->data->nb_tx_queues = 0;
633 } else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
634 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
636 txq = dev->data->tx_queues;
638 for (i = nb_queues; i < old_nb_queues; i++)
639 (*dev->dev_ops->tx_queue_release)(txq[i]);
640 txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
641 RTE_CACHE_LINE_SIZE);
644 if (nb_queues > old_nb_queues) {
645 uint16_t new_qs = nb_queues - old_nb_queues;
647 memset(txq + old_nb_queues, 0,
648 sizeof(txq[0]) * new_qs);
651 dev->data->tx_queues = txq;
653 } else if (dev->data->tx_queues != NULL && nb_queues == 0) {
654 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
656 txq = dev->data->tx_queues;
658 for (i = nb_queues; i < old_nb_queues; i++)
659 (*dev->dev_ops->tx_queue_release)(txq[i]);
661 rte_free(dev->data->tx_queues);
662 dev->data->tx_queues = NULL;
664 dev->data->nb_tx_queues = nb_queues;
669 rte_eth_speed_bitflag(uint32_t speed, int duplex)
672 case ETH_SPEED_NUM_10M:
673 return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
674 case ETH_SPEED_NUM_100M:
675 return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
676 case ETH_SPEED_NUM_1G:
677 return ETH_LINK_SPEED_1G;
678 case ETH_SPEED_NUM_2_5G:
679 return ETH_LINK_SPEED_2_5G;
680 case ETH_SPEED_NUM_5G:
681 return ETH_LINK_SPEED_5G;
682 case ETH_SPEED_NUM_10G:
683 return ETH_LINK_SPEED_10G;
684 case ETH_SPEED_NUM_20G:
685 return ETH_LINK_SPEED_20G;
686 case ETH_SPEED_NUM_25G:
687 return ETH_LINK_SPEED_25G;
688 case ETH_SPEED_NUM_40G:
689 return ETH_LINK_SPEED_40G;
690 case ETH_SPEED_NUM_50G:
691 return ETH_LINK_SPEED_50G;
692 case ETH_SPEED_NUM_56G:
693 return ETH_LINK_SPEED_56G;
694 case ETH_SPEED_NUM_100G:
695 return ETH_LINK_SPEED_100G;
702 * A conversion function from rxmode bitfield API.
705 rte_eth_convert_rx_offload_bitfield(const struct rte_eth_rxmode *rxmode,
706 uint64_t *rx_offloads)
708 uint64_t offloads = 0;
710 if (rxmode->header_split == 1)
711 offloads |= DEV_RX_OFFLOAD_HEADER_SPLIT;
712 if (rxmode->hw_ip_checksum == 1)
713 offloads |= DEV_RX_OFFLOAD_CHECKSUM;
714 if (rxmode->hw_vlan_filter == 1)
715 offloads |= DEV_RX_OFFLOAD_VLAN_FILTER;
716 if (rxmode->hw_vlan_strip == 1)
717 offloads |= DEV_RX_OFFLOAD_VLAN_STRIP;
718 if (rxmode->hw_vlan_extend == 1)
719 offloads |= DEV_RX_OFFLOAD_VLAN_EXTEND;
720 if (rxmode->jumbo_frame == 1)
721 offloads |= DEV_RX_OFFLOAD_JUMBO_FRAME;
722 if (rxmode->hw_strip_crc == 1)
723 offloads |= DEV_RX_OFFLOAD_CRC_STRIP;
724 if (rxmode->enable_scatter == 1)
725 offloads |= DEV_RX_OFFLOAD_SCATTER;
726 if (rxmode->enable_lro == 1)
727 offloads |= DEV_RX_OFFLOAD_TCP_LRO;
728 if (rxmode->hw_timestamp == 1)
729 offloads |= DEV_RX_OFFLOAD_TIMESTAMP;
730 if (rxmode->security == 1)
731 offloads |= DEV_RX_OFFLOAD_SECURITY;
733 *rx_offloads = offloads;
737 * A conversion function from rxmode offloads API.
740 rte_eth_convert_rx_offloads(const uint64_t rx_offloads,
741 struct rte_eth_rxmode *rxmode)
744 if (rx_offloads & DEV_RX_OFFLOAD_HEADER_SPLIT)
745 rxmode->header_split = 1;
747 rxmode->header_split = 0;
748 if (rx_offloads & DEV_RX_OFFLOAD_CHECKSUM)
749 rxmode->hw_ip_checksum = 1;
751 rxmode->hw_ip_checksum = 0;
752 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_FILTER)
753 rxmode->hw_vlan_filter = 1;
755 rxmode->hw_vlan_filter = 0;
756 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_STRIP)
757 rxmode->hw_vlan_strip = 1;
759 rxmode->hw_vlan_strip = 0;
760 if (rx_offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
761 rxmode->hw_vlan_extend = 1;
763 rxmode->hw_vlan_extend = 0;
764 if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME)
765 rxmode->jumbo_frame = 1;
767 rxmode->jumbo_frame = 0;
768 if (rx_offloads & DEV_RX_OFFLOAD_CRC_STRIP)
769 rxmode->hw_strip_crc = 1;
771 rxmode->hw_strip_crc = 0;
772 if (rx_offloads & DEV_RX_OFFLOAD_SCATTER)
773 rxmode->enable_scatter = 1;
775 rxmode->enable_scatter = 0;
776 if (rx_offloads & DEV_RX_OFFLOAD_TCP_LRO)
777 rxmode->enable_lro = 1;
779 rxmode->enable_lro = 0;
780 if (rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP)
781 rxmode->hw_timestamp = 1;
783 rxmode->hw_timestamp = 0;
784 if (rx_offloads & DEV_RX_OFFLOAD_SECURITY)
785 rxmode->security = 1;
787 rxmode->security = 0;
791 rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
792 const struct rte_eth_conf *dev_conf)
794 struct rte_eth_dev *dev;
795 struct rte_eth_dev_info dev_info;
796 struct rte_eth_conf local_conf = *dev_conf;
799 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
801 if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
803 "Number of RX queues requested (%u) is greater than max supported(%d)\n",
804 nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
808 if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
810 "Number of TX queues requested (%u) is greater than max supported(%d)\n",
811 nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
815 dev = &rte_eth_devices[port_id];
817 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
818 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
820 if (dev->data->dev_started) {
822 "port %d must be stopped to allow configuration\n", port_id);
827 * Convert between the offloads API to enable PMDs to support
830 if ((dev_conf->rxmode.ignore_offload_bitfield == 0)) {
831 rte_eth_convert_rx_offload_bitfield(
832 &dev_conf->rxmode, &local_conf.rxmode.offloads);
834 rte_eth_convert_rx_offloads(dev_conf->rxmode.offloads,
838 /* Copy the dev_conf parameter into the dev structure */
839 memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
842 * Check that the numbers of RX and TX queues are not greater
843 * than the maximum number of RX and TX queues supported by the
846 (*dev->dev_ops->dev_infos_get)(dev, &dev_info);
848 if (nb_rx_q == 0 && nb_tx_q == 0) {
849 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d both rx and tx queue cannot be 0\n", port_id);
853 if (nb_rx_q > dev_info.max_rx_queues) {
854 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_rx_queues=%d > %d\n",
855 port_id, nb_rx_q, dev_info.max_rx_queues);
859 if (nb_tx_q > dev_info.max_tx_queues) {
860 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d nb_tx_queues=%d > %d\n",
861 port_id, nb_tx_q, dev_info.max_tx_queues);
865 /* Check that the device supports requested interrupts */
866 if ((dev_conf->intr_conf.lsc == 1) &&
867 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
868 RTE_PMD_DEBUG_TRACE("driver %s does not support lsc\n",
869 dev->device->driver->name);
872 if ((dev_conf->intr_conf.rmv == 1) &&
873 (!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
874 RTE_PMD_DEBUG_TRACE("driver %s does not support rmv\n",
875 dev->device->driver->name);
880 * If jumbo frames are enabled, check that the maximum RX packet
881 * length is supported by the configured device.
883 if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
884 if (dev_conf->rxmode.max_rx_pkt_len >
885 dev_info.max_rx_pktlen) {
886 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
887 " > max valid value %u\n",
889 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
890 (unsigned)dev_info.max_rx_pktlen);
892 } else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
893 RTE_PMD_DEBUG_TRACE("ethdev port_id=%d max_rx_pkt_len %u"
894 " < min valid value %u\n",
896 (unsigned)dev_conf->rxmode.max_rx_pkt_len,
897 (unsigned)ETHER_MIN_LEN);
901 if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
902 dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
903 /* Use default value */
904 dev->data->dev_conf.rxmode.max_rx_pkt_len =
909 * Setup new number of RX/TX queues and reconfigure device.
911 diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
913 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_rx_queue_config = %d\n",
918 diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
920 RTE_PMD_DEBUG_TRACE("port%d rte_eth_dev_tx_queue_config = %d\n",
922 rte_eth_dev_rx_queue_config(dev, 0);
926 diag = (*dev->dev_ops->dev_configure)(dev);
928 RTE_PMD_DEBUG_TRACE("port%d dev_configure = %d\n",
930 rte_eth_dev_rx_queue_config(dev, 0);
931 rte_eth_dev_tx_queue_config(dev, 0);
935 /* Initialize Rx profiling if enabled at compilation time. */
936 diag = __rte_eth_profile_rx_init(port_id, dev);
938 RTE_PMD_DEBUG_TRACE("port%d __rte_eth_profile_rx_init = %d\n",
940 rte_eth_dev_rx_queue_config(dev, 0);
941 rte_eth_dev_tx_queue_config(dev, 0);
949 _rte_eth_dev_reset(struct rte_eth_dev *dev)
951 if (dev->data->dev_started) {
953 "port %d must be stopped to allow reset\n",
958 rte_eth_dev_rx_queue_config(dev, 0);
959 rte_eth_dev_tx_queue_config(dev, 0);
961 memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
965 rte_eth_dev_config_restore(uint16_t port_id)
967 struct rte_eth_dev *dev;
968 struct rte_eth_dev_info dev_info;
969 struct ether_addr *addr;
974 dev = &rte_eth_devices[port_id];
976 rte_eth_dev_info_get(port_id, &dev_info);
978 /* replay MAC address configuration including default MAC */
979 addr = &dev->data->mac_addrs[0];
980 if (*dev->dev_ops->mac_addr_set != NULL)
981 (*dev->dev_ops->mac_addr_set)(dev, addr);
982 else if (*dev->dev_ops->mac_addr_add != NULL)
983 (*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
985 if (*dev->dev_ops->mac_addr_add != NULL) {
986 for (i = 1; i < dev_info.max_mac_addrs; i++) {
987 addr = &dev->data->mac_addrs[i];
989 /* skip zero address */
990 if (is_zero_ether_addr(addr))
994 pool_mask = dev->data->mac_pool_sel[i];
997 if (pool_mask & 1ULL)
998 (*dev->dev_ops->mac_addr_add)(dev,
1002 } while (pool_mask);
1006 /* replay promiscuous configuration */
1007 if (rte_eth_promiscuous_get(port_id) == 1)
1008 rte_eth_promiscuous_enable(port_id);
1009 else if (rte_eth_promiscuous_get(port_id) == 0)
1010 rte_eth_promiscuous_disable(port_id);
1012 /* replay all multicast configuration */
1013 if (rte_eth_allmulticast_get(port_id) == 1)
1014 rte_eth_allmulticast_enable(port_id);
1015 else if (rte_eth_allmulticast_get(port_id) == 0)
1016 rte_eth_allmulticast_disable(port_id);
1020 rte_eth_dev_start(uint16_t port_id)
1022 struct rte_eth_dev *dev;
1025 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1027 dev = &rte_eth_devices[port_id];
1029 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
1031 if (dev->data->dev_started != 0) {
1032 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1033 " already started\n",
1038 diag = (*dev->dev_ops->dev_start)(dev);
1040 dev->data->dev_started = 1;
1044 rte_eth_dev_config_restore(port_id);
1046 if (dev->data->dev_conf.intr_conf.lsc == 0) {
1047 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
1048 (*dev->dev_ops->link_update)(dev, 0);
1054 rte_eth_dev_stop(uint16_t port_id)
1056 struct rte_eth_dev *dev;
1058 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1059 dev = &rte_eth_devices[port_id];
1061 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
1063 if (dev->data->dev_started == 0) {
1064 RTE_PMD_DEBUG_TRACE("Device with port_id=%" PRIu16
1065 " already stopped\n",
1070 dev->data->dev_started = 0;
1071 (*dev->dev_ops->dev_stop)(dev);
1075 rte_eth_dev_set_link_up(uint16_t port_id)
1077 struct rte_eth_dev *dev;
1079 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1081 dev = &rte_eth_devices[port_id];
1083 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
1084 return (*dev->dev_ops->dev_set_link_up)(dev);
1088 rte_eth_dev_set_link_down(uint16_t port_id)
1090 struct rte_eth_dev *dev;
1092 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1094 dev = &rte_eth_devices[port_id];
1096 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
1097 return (*dev->dev_ops->dev_set_link_down)(dev);
1101 rte_eth_dev_close(uint16_t port_id)
1103 struct rte_eth_dev *dev;
1105 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1106 dev = &rte_eth_devices[port_id];
1108 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
1109 dev->data->dev_started = 0;
1110 (*dev->dev_ops->dev_close)(dev);
1112 dev->data->nb_rx_queues = 0;
1113 rte_free(dev->data->rx_queues);
1114 dev->data->rx_queues = NULL;
1115 dev->data->nb_tx_queues = 0;
1116 rte_free(dev->data->tx_queues);
1117 dev->data->tx_queues = NULL;
1121 rte_eth_dev_reset(uint16_t port_id)
1123 struct rte_eth_dev *dev;
1126 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1127 dev = &rte_eth_devices[port_id];
1129 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
1131 rte_eth_dev_stop(port_id);
1132 ret = dev->dev_ops->dev_reset(dev);
1138 rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
1139 uint16_t nb_rx_desc, unsigned int socket_id,
1140 const struct rte_eth_rxconf *rx_conf,
1141 struct rte_mempool *mp)
1144 uint32_t mbp_buf_size;
1145 struct rte_eth_dev *dev;
1146 struct rte_eth_dev_info dev_info;
1147 struct rte_eth_rxconf local_conf;
1150 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1152 dev = &rte_eth_devices[port_id];
1153 if (rx_queue_id >= dev->data->nb_rx_queues) {
1154 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", rx_queue_id);
1158 if (dev->data->dev_started) {
1159 RTE_PMD_DEBUG_TRACE(
1160 "port %d must be stopped to allow configuration\n", port_id);
1164 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1165 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
1168 * Check the size of the mbuf data buffer.
1169 * This value must be provided in the private data of the memory pool.
1170 * First check that the memory pool has a valid private data.
1172 rte_eth_dev_info_get(port_id, &dev_info);
1173 if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
1174 RTE_PMD_DEBUG_TRACE("%s private_data_size %d < %d\n",
1175 mp->name, (int) mp->private_data_size,
1176 (int) sizeof(struct rte_pktmbuf_pool_private));
1179 mbp_buf_size = rte_pktmbuf_data_room_size(mp);
1181 if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
1182 RTE_PMD_DEBUG_TRACE("%s mbuf_data_room_size %d < %d "
1183 "(RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)"
1187 (int)(RTE_PKTMBUF_HEADROOM +
1188 dev_info.min_rx_bufsize),
1189 (int)RTE_PKTMBUF_HEADROOM,
1190 (int)dev_info.min_rx_bufsize);
1194 if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
1195 nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
1196 nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
1198 RTE_PMD_DEBUG_TRACE("Invalid value for nb_rx_desc(=%hu), "
1199 "should be: <= %hu, = %hu, and a product of %hu\n",
1201 dev_info.rx_desc_lim.nb_max,
1202 dev_info.rx_desc_lim.nb_min,
1203 dev_info.rx_desc_lim.nb_align);
1207 rxq = dev->data->rx_queues;
1208 if (rxq[rx_queue_id]) {
1209 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
1211 (*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
1212 rxq[rx_queue_id] = NULL;
1215 if (rx_conf == NULL)
1216 rx_conf = &dev_info.default_rxconf;
1218 local_conf = *rx_conf;
1219 if (dev->data->dev_conf.rxmode.ignore_offload_bitfield == 0) {
1221 * Reflect port offloads to queue offloads in order for
1222 * offloads to not be discarded.
1224 rte_eth_convert_rx_offload_bitfield(&dev->data->dev_conf.rxmode,
1225 &local_conf.offloads);
1228 ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
1229 socket_id, &local_conf, mp);
1231 if (!dev->data->min_rx_buf_size ||
1232 dev->data->min_rx_buf_size > mbp_buf_size)
1233 dev->data->min_rx_buf_size = mbp_buf_size;
1240 * A conversion function from txq_flags API.
1243 rte_eth_convert_txq_flags(const uint32_t txq_flags, uint64_t *tx_offloads)
1245 uint64_t offloads = 0;
1247 if (!(txq_flags & ETH_TXQ_FLAGS_NOMULTSEGS))
1248 offloads |= DEV_TX_OFFLOAD_MULTI_SEGS;
1249 if (!(txq_flags & ETH_TXQ_FLAGS_NOVLANOFFL))
1250 offloads |= DEV_TX_OFFLOAD_VLAN_INSERT;
1251 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMSCTP))
1252 offloads |= DEV_TX_OFFLOAD_SCTP_CKSUM;
1253 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMUDP))
1254 offloads |= DEV_TX_OFFLOAD_UDP_CKSUM;
1255 if (!(txq_flags & ETH_TXQ_FLAGS_NOXSUMTCP))
1256 offloads |= DEV_TX_OFFLOAD_TCP_CKSUM;
1257 if ((txq_flags & ETH_TXQ_FLAGS_NOREFCOUNT) &&
1258 (txq_flags & ETH_TXQ_FLAGS_NOMULTMEMP))
1259 offloads |= DEV_TX_OFFLOAD_MBUF_FAST_FREE;
1261 *tx_offloads = offloads;
1265 * A conversion function from offloads API.
1268 rte_eth_convert_txq_offloads(const uint64_t tx_offloads, uint32_t *txq_flags)
1272 if (!(tx_offloads & DEV_TX_OFFLOAD_MULTI_SEGS))
1273 flags |= ETH_TXQ_FLAGS_NOMULTSEGS;
1274 if (!(tx_offloads & DEV_TX_OFFLOAD_VLAN_INSERT))
1275 flags |= ETH_TXQ_FLAGS_NOVLANOFFL;
1276 if (!(tx_offloads & DEV_TX_OFFLOAD_SCTP_CKSUM))
1277 flags |= ETH_TXQ_FLAGS_NOXSUMSCTP;
1278 if (!(tx_offloads & DEV_TX_OFFLOAD_UDP_CKSUM))
1279 flags |= ETH_TXQ_FLAGS_NOXSUMUDP;
1280 if (!(tx_offloads & DEV_TX_OFFLOAD_TCP_CKSUM))
1281 flags |= ETH_TXQ_FLAGS_NOXSUMTCP;
1282 if (tx_offloads & DEV_TX_OFFLOAD_MBUF_FAST_FREE)
1283 flags |= (ETH_TXQ_FLAGS_NOREFCOUNT | ETH_TXQ_FLAGS_NOMULTMEMP);
1289 rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
1290 uint16_t nb_tx_desc, unsigned int socket_id,
1291 const struct rte_eth_txconf *tx_conf)
1293 struct rte_eth_dev *dev;
1294 struct rte_eth_dev_info dev_info;
1295 struct rte_eth_txconf local_conf;
1298 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1300 dev = &rte_eth_devices[port_id];
1301 if (tx_queue_id >= dev->data->nb_tx_queues) {
1302 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", tx_queue_id);
1306 if (dev->data->dev_started) {
1307 RTE_PMD_DEBUG_TRACE(
1308 "port %d must be stopped to allow configuration\n", port_id);
1312 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
1313 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
1315 rte_eth_dev_info_get(port_id, &dev_info);
1317 if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
1318 nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
1319 nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
1320 RTE_PMD_DEBUG_TRACE("Invalid value for nb_tx_desc(=%hu), "
1321 "should be: <= %hu, = %hu, and a product of %hu\n",
1323 dev_info.tx_desc_lim.nb_max,
1324 dev_info.tx_desc_lim.nb_min,
1325 dev_info.tx_desc_lim.nb_align);
1329 txq = dev->data->tx_queues;
1330 if (txq[tx_queue_id]) {
1331 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
1333 (*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
1334 txq[tx_queue_id] = NULL;
1337 if (tx_conf == NULL)
1338 tx_conf = &dev_info.default_txconf;
1341 * Convert between the offloads API to enable PMDs to support
1344 local_conf = *tx_conf;
1345 if (tx_conf->txq_flags & ETH_TXQ_FLAGS_IGNORE) {
1346 rte_eth_convert_txq_offloads(tx_conf->offloads,
1347 &local_conf.txq_flags);
1348 /* Keep the ignore flag. */
1349 local_conf.txq_flags |= ETH_TXQ_FLAGS_IGNORE;
1351 rte_eth_convert_txq_flags(tx_conf->txq_flags,
1352 &local_conf.offloads);
1355 return (*dev->dev_ops->tx_queue_setup)(dev, tx_queue_id, nb_tx_desc,
1356 socket_id, &local_conf);
1360 rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
1361 void *userdata __rte_unused)
1365 for (i = 0; i < unsent; i++)
1366 rte_pktmbuf_free(pkts[i]);
1370 rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
1373 uint64_t *count = userdata;
1376 for (i = 0; i < unsent; i++)
1377 rte_pktmbuf_free(pkts[i]);
1383 rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
1384 buffer_tx_error_fn cbfn, void *userdata)
1386 buffer->error_callback = cbfn;
1387 buffer->error_userdata = userdata;
1392 rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
1399 buffer->size = size;
1400 if (buffer->error_callback == NULL) {
1401 ret = rte_eth_tx_buffer_set_err_callback(
1402 buffer, rte_eth_tx_buffer_drop_callback, NULL);
1409 rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
1411 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
1413 /* Validate Input Data. Bail if not valid or not supported. */
1414 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1415 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
1417 /* Call driver to free pending mbufs. */
1418 return (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
1423 rte_eth_promiscuous_enable(uint16_t port_id)
1425 struct rte_eth_dev *dev;
1427 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1428 dev = &rte_eth_devices[port_id];
1430 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
1431 (*dev->dev_ops->promiscuous_enable)(dev);
1432 dev->data->promiscuous = 1;
1436 rte_eth_promiscuous_disable(uint16_t port_id)
1438 struct rte_eth_dev *dev;
1440 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1441 dev = &rte_eth_devices[port_id];
1443 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
1444 dev->data->promiscuous = 0;
1445 (*dev->dev_ops->promiscuous_disable)(dev);
1449 rte_eth_promiscuous_get(uint16_t port_id)
1451 struct rte_eth_dev *dev;
1453 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1455 dev = &rte_eth_devices[port_id];
1456 return dev->data->promiscuous;
1460 rte_eth_allmulticast_enable(uint16_t port_id)
1462 struct rte_eth_dev *dev;
1464 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1465 dev = &rte_eth_devices[port_id];
1467 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
1468 (*dev->dev_ops->allmulticast_enable)(dev);
1469 dev->data->all_multicast = 1;
1473 rte_eth_allmulticast_disable(uint16_t port_id)
1475 struct rte_eth_dev *dev;
1477 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1478 dev = &rte_eth_devices[port_id];
1480 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
1481 dev->data->all_multicast = 0;
1482 (*dev->dev_ops->allmulticast_disable)(dev);
1486 rte_eth_allmulticast_get(uint16_t port_id)
1488 struct rte_eth_dev *dev;
1490 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1492 dev = &rte_eth_devices[port_id];
1493 return dev->data->all_multicast;
1497 rte_eth_dev_atomic_read_link_status(struct rte_eth_dev *dev,
1498 struct rte_eth_link *link)
1500 struct rte_eth_link *dst = link;
1501 struct rte_eth_link *src = &(dev->data->dev_link);
1503 if (rte_atomic64_cmpset((uint64_t *)dst, *(uint64_t *)dst,
1504 *(uint64_t *)src) == 0)
1511 rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
1513 struct rte_eth_dev *dev;
1515 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1516 dev = &rte_eth_devices[port_id];
1518 if (dev->data->dev_conf.intr_conf.lsc != 0)
1519 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1521 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1522 (*dev->dev_ops->link_update)(dev, 1);
1523 *eth_link = dev->data->dev_link;
1528 rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
1530 struct rte_eth_dev *dev;
1532 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1533 dev = &rte_eth_devices[port_id];
1535 if (dev->data->dev_conf.intr_conf.lsc != 0)
1536 rte_eth_dev_atomic_read_link_status(dev, eth_link);
1538 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
1539 (*dev->dev_ops->link_update)(dev, 0);
1540 *eth_link = dev->data->dev_link;
1545 rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
1547 struct rte_eth_dev *dev;
1549 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1551 dev = &rte_eth_devices[port_id];
1552 memset(stats, 0, sizeof(*stats));
1554 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
1555 stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
1556 return (*dev->dev_ops->stats_get)(dev, stats);
1560 rte_eth_stats_reset(uint16_t port_id)
1562 struct rte_eth_dev *dev;
1564 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1565 dev = &rte_eth_devices[port_id];
1567 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
1568 (*dev->dev_ops->stats_reset)(dev);
1569 dev->data->rx_mbuf_alloc_failed = 0;
1575 get_xstats_basic_count(struct rte_eth_dev *dev)
1577 uint16_t nb_rxqs, nb_txqs;
1580 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1581 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1583 count = RTE_NB_STATS;
1584 count += nb_rxqs * RTE_NB_RXQ_STATS;
1585 count += nb_txqs * RTE_NB_TXQ_STATS;
1591 get_xstats_count(uint16_t port_id)
1593 struct rte_eth_dev *dev;
1596 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1597 dev = &rte_eth_devices[port_id];
1598 if (dev->dev_ops->xstats_get_names_by_id != NULL) {
1599 count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
1604 if (dev->dev_ops->xstats_get_names != NULL) {
1605 count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
1612 count += get_xstats_basic_count(dev);
1618 rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
1621 int cnt_xstats, idx_xstat;
1623 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1626 RTE_PMD_DEBUG_TRACE("Error: id pointer is NULL\n");
1631 RTE_PMD_DEBUG_TRACE("Error: xstat_name pointer is NULL\n");
1636 cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
1637 if (cnt_xstats < 0) {
1638 RTE_PMD_DEBUG_TRACE("Error: Cannot get count of xstats\n");
1642 /* Get id-name lookup table */
1643 struct rte_eth_xstat_name xstats_names[cnt_xstats];
1645 if (cnt_xstats != rte_eth_xstats_get_names_by_id(
1646 port_id, xstats_names, cnt_xstats, NULL)) {
1647 RTE_PMD_DEBUG_TRACE("Error: Cannot get xstats lookup\n");
1651 for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
1652 if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
1661 /* retrieve ethdev extended statistics names */
1663 rte_eth_xstats_get_names_by_id(uint16_t port_id,
1664 struct rte_eth_xstat_name *xstats_names, unsigned int size,
1667 struct rte_eth_xstat_name *xstats_names_copy;
1668 unsigned int no_basic_stat_requested = 1;
1669 unsigned int expected_entries;
1670 struct rte_eth_dev *dev;
1674 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1675 dev = &rte_eth_devices[port_id];
1677 ret = get_xstats_count(port_id);
1680 expected_entries = (unsigned int)ret;
1682 /* Return max number of stats if no ids given */
1685 return expected_entries;
1686 else if (xstats_names && size < expected_entries)
1687 return expected_entries;
1690 if (ids && !xstats_names)
1693 if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
1694 unsigned int basic_count = get_xstats_basic_count(dev);
1695 uint64_t ids_copy[size];
1697 for (i = 0; i < size; i++) {
1698 if (ids[i] < basic_count) {
1699 no_basic_stat_requested = 0;
1704 * Convert ids to xstats ids that PMD knows.
1705 * ids known by user are basic + extended stats.
1707 ids_copy[i] = ids[i] - basic_count;
1710 if (no_basic_stat_requested)
1711 return (*dev->dev_ops->xstats_get_names_by_id)(dev,
1712 xstats_names, ids_copy, size);
1715 /* Retrieve all stats */
1717 int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
1719 if (num_stats < 0 || num_stats > (int)expected_entries)
1722 return expected_entries;
1725 xstats_names_copy = calloc(expected_entries,
1726 sizeof(struct rte_eth_xstat_name));
1728 if (!xstats_names_copy) {
1729 RTE_PMD_DEBUG_TRACE("ERROR: can't allocate memory");
1733 /* Fill xstats_names_copy structure */
1734 rte_eth_xstats_get_names(port_id, xstats_names_copy, expected_entries);
1737 for (i = 0; i < size; i++) {
1738 if (ids[i] >= expected_entries) {
1739 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
1740 free(xstats_names_copy);
1743 xstats_names[i] = xstats_names_copy[ids[i]];
1746 free(xstats_names_copy);
1751 rte_eth_xstats_get_names(uint16_t port_id,
1752 struct rte_eth_xstat_name *xstats_names,
1755 struct rte_eth_dev *dev;
1756 int cnt_used_entries;
1757 int cnt_expected_entries;
1758 int cnt_driver_entries;
1759 uint32_t idx, id_queue;
1762 cnt_expected_entries = get_xstats_count(port_id);
1763 if (xstats_names == NULL || cnt_expected_entries < 0 ||
1764 (int)size < cnt_expected_entries)
1765 return cnt_expected_entries;
1767 /* port_id checked in get_xstats_count() */
1768 dev = &rte_eth_devices[port_id];
1769 cnt_used_entries = 0;
1771 for (idx = 0; idx < RTE_NB_STATS; idx++) {
1772 snprintf(xstats_names[cnt_used_entries].name,
1773 sizeof(xstats_names[0].name),
1774 "%s", rte_stats_strings[idx].name);
1777 num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1778 for (id_queue = 0; id_queue < num_q; id_queue++) {
1779 for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
1780 snprintf(xstats_names[cnt_used_entries].name,
1781 sizeof(xstats_names[0].name),
1783 id_queue, rte_rxq_stats_strings[idx].name);
1788 num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1789 for (id_queue = 0; id_queue < num_q; id_queue++) {
1790 for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
1791 snprintf(xstats_names[cnt_used_entries].name,
1792 sizeof(xstats_names[0].name),
1794 id_queue, rte_txq_stats_strings[idx].name);
1799 if (dev->dev_ops->xstats_get_names != NULL) {
1800 /* If there are any driver-specific xstats, append them
1803 cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
1805 xstats_names + cnt_used_entries,
1806 size - cnt_used_entries);
1807 if (cnt_driver_entries < 0)
1808 return cnt_driver_entries;
1809 cnt_used_entries += cnt_driver_entries;
1812 return cnt_used_entries;
1815 /* retrieve ethdev extended statistics */
1817 rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
1818 uint64_t *values, unsigned int size)
1820 unsigned int no_basic_stat_requested = 1;
1821 unsigned int num_xstats_filled;
1822 uint16_t expected_entries;
1823 struct rte_eth_dev *dev;
1827 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1828 expected_entries = get_xstats_count(port_id);
1829 struct rte_eth_xstat xstats[expected_entries];
1830 dev = &rte_eth_devices[port_id];
1832 /* Return max number of stats if no ids given */
1835 return expected_entries;
1836 else if (values && size < expected_entries)
1837 return expected_entries;
1843 if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
1844 unsigned int basic_count = get_xstats_basic_count(dev);
1845 uint64_t ids_copy[size];
1847 for (i = 0; i < size; i++) {
1848 if (ids[i] < basic_count) {
1849 no_basic_stat_requested = 0;
1854 * Convert ids to xstats ids that PMD knows.
1855 * ids known by user are basic + extended stats.
1857 ids_copy[i] = ids[i] - basic_count;
1860 if (no_basic_stat_requested)
1861 return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
1865 /* Fill the xstats structure */
1866 ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
1869 num_xstats_filled = (unsigned int)ret;
1871 /* Return all stats */
1873 for (i = 0; i < num_xstats_filled; i++)
1874 values[i] = xstats[i].value;
1875 return expected_entries;
1879 for (i = 0; i < size; i++) {
1880 if (ids[i] >= expected_entries) {
1881 RTE_PMD_DEBUG_TRACE("ERROR: id value isn't valid\n");
1884 values[i] = xstats[ids[i]].value;
1890 rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
1893 struct rte_eth_stats eth_stats;
1894 struct rte_eth_dev *dev;
1895 unsigned int count = 0, i, q;
1896 signed int xcount = 0;
1897 uint64_t val, *stats_ptr;
1898 uint16_t nb_rxqs, nb_txqs;
1900 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
1902 dev = &rte_eth_devices[port_id];
1904 nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1905 nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
1907 /* Return generic statistics */
1908 count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
1909 (nb_txqs * RTE_NB_TXQ_STATS);
1911 /* implemented by the driver */
1912 if (dev->dev_ops->xstats_get != NULL) {
1913 /* Retrieve the xstats from the driver at the end of the
1916 xcount = (*dev->dev_ops->xstats_get)(dev,
1917 xstats ? xstats + count : NULL,
1918 (n > count) ? n - count : 0);
1924 if (n < count + xcount || xstats == NULL)
1925 return count + xcount;
1927 /* now fill the xstats structure */
1929 rte_eth_stats_get(port_id, ð_stats);
1932 for (i = 0; i < RTE_NB_STATS; i++) {
1933 stats_ptr = RTE_PTR_ADD(ð_stats,
1934 rte_stats_strings[i].offset);
1936 xstats[count++].value = val;
1940 for (q = 0; q < nb_rxqs; q++) {
1941 for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
1942 stats_ptr = RTE_PTR_ADD(ð_stats,
1943 rte_rxq_stats_strings[i].offset +
1944 q * sizeof(uint64_t));
1946 xstats[count++].value = val;
1951 for (q = 0; q < nb_txqs; q++) {
1952 for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
1953 stats_ptr = RTE_PTR_ADD(ð_stats,
1954 rte_txq_stats_strings[i].offset +
1955 q * sizeof(uint64_t));
1957 xstats[count++].value = val;
1961 for (i = 0; i < count; i++)
1963 /* add an offset to driver-specific stats */
1964 for ( ; i < count + xcount; i++)
1965 xstats[i].id += count;
1967 return count + xcount;
1970 /* reset ethdev extended statistics */
1972 rte_eth_xstats_reset(uint16_t port_id)
1974 struct rte_eth_dev *dev;
1976 RTE_ETH_VALID_PORTID_OR_RET(port_id);
1977 dev = &rte_eth_devices[port_id];
1979 /* implemented by the driver */
1980 if (dev->dev_ops->xstats_reset != NULL) {
1981 (*dev->dev_ops->xstats_reset)(dev);
1985 /* fallback to default */
1986 rte_eth_stats_reset(port_id);
1990 set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
1993 struct rte_eth_dev *dev;
1995 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
1997 dev = &rte_eth_devices[port_id];
1999 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
2000 return (*dev->dev_ops->queue_stats_mapping_set)
2001 (dev, queue_id, stat_idx, is_rx);
2006 rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
2009 return set_queue_stats_mapping(port_id, tx_queue_id, stat_idx,
2015 rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
2018 return set_queue_stats_mapping(port_id, rx_queue_id, stat_idx,
2023 rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
2025 struct rte_eth_dev *dev;
2027 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2028 dev = &rte_eth_devices[port_id];
2030 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
2031 return (*dev->dev_ops->fw_version_get)(dev, fw_version, fw_size);
2035 rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
2037 struct rte_eth_dev *dev;
2038 const struct rte_eth_desc_lim lim = {
2039 .nb_max = UINT16_MAX,
2044 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2045 dev = &rte_eth_devices[port_id];
2047 memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
2048 dev_info->rx_desc_lim = lim;
2049 dev_info->tx_desc_lim = lim;
2051 RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
2052 (*dev->dev_ops->dev_infos_get)(dev, dev_info);
2053 dev_info->driver_name = dev->device->driver->name;
2054 dev_info->nb_rx_queues = dev->data->nb_rx_queues;
2055 dev_info->nb_tx_queues = dev->data->nb_tx_queues;
2059 rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
2060 uint32_t *ptypes, int num)
2063 struct rte_eth_dev *dev;
2064 const uint32_t *all_ptypes;
2066 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2067 dev = &rte_eth_devices[port_id];
2068 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
2069 all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
2074 for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
2075 if (all_ptypes[i] & ptype_mask) {
2077 ptypes[j] = all_ptypes[i];
2085 rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
2087 struct rte_eth_dev *dev;
2089 RTE_ETH_VALID_PORTID_OR_RET(port_id);
2090 dev = &rte_eth_devices[port_id];
2091 ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
2096 rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
2098 struct rte_eth_dev *dev;
2100 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2102 dev = &rte_eth_devices[port_id];
2103 *mtu = dev->data->mtu;
2108 rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
2111 struct rte_eth_dev *dev;
2113 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2114 dev = &rte_eth_devices[port_id];
2115 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
2117 ret = (*dev->dev_ops->mtu_set)(dev, mtu);
2119 dev->data->mtu = mtu;
2125 rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
2127 struct rte_eth_dev *dev;
2130 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2131 dev = &rte_eth_devices[port_id];
2132 if (!(dev->data->dev_conf.rxmode.offloads &
2133 DEV_RX_OFFLOAD_VLAN_FILTER)) {
2134 RTE_PMD_DEBUG_TRACE("port %d: vlan-filtering disabled\n", port_id);
2138 if (vlan_id > 4095) {
2139 RTE_PMD_DEBUG_TRACE("(port_id=%d) invalid vlan_id=%u > 4095\n",
2140 port_id, (unsigned) vlan_id);
2143 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
2145 ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
2147 struct rte_vlan_filter_conf *vfc;
2151 vfc = &dev->data->vlan_filter_conf;
2152 vidx = vlan_id / 64;
2153 vbit = vlan_id % 64;
2156 vfc->ids[vidx] |= UINT64_C(1) << vbit;
2158 vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
2165 rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
2168 struct rte_eth_dev *dev;
2170 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2171 dev = &rte_eth_devices[port_id];
2172 if (rx_queue_id >= dev->data->nb_rx_queues) {
2173 RTE_PMD_DEBUG_TRACE("Invalid rx_queue_id=%d\n", port_id);
2177 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
2178 (*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
2184 rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
2185 enum rte_vlan_type vlan_type,
2188 struct rte_eth_dev *dev;
2190 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2191 dev = &rte_eth_devices[port_id];
2192 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
2194 return (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type, tpid);
2198 rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
2200 struct rte_eth_dev *dev;
2204 uint64_t orig_offloads;
2206 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2207 dev = &rte_eth_devices[port_id];
2209 /* save original values in case of failure */
2210 orig_offloads = dev->data->dev_conf.rxmode.offloads;
2212 /*check which option changed by application*/
2213 cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
2214 org = !!(dev->data->dev_conf.rxmode.offloads &
2215 DEV_RX_OFFLOAD_VLAN_STRIP);
2218 dev->data->dev_conf.rxmode.offloads |=
2219 DEV_RX_OFFLOAD_VLAN_STRIP;
2221 dev->data->dev_conf.rxmode.offloads &=
2222 ~DEV_RX_OFFLOAD_VLAN_STRIP;
2223 mask |= ETH_VLAN_STRIP_MASK;
2226 cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
2227 org = !!(dev->data->dev_conf.rxmode.offloads &
2228 DEV_RX_OFFLOAD_VLAN_FILTER);
2231 dev->data->dev_conf.rxmode.offloads |=
2232 DEV_RX_OFFLOAD_VLAN_FILTER;
2234 dev->data->dev_conf.rxmode.offloads &=
2235 ~DEV_RX_OFFLOAD_VLAN_FILTER;
2236 mask |= ETH_VLAN_FILTER_MASK;
2239 cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
2240 org = !!(dev->data->dev_conf.rxmode.offloads &
2241 DEV_RX_OFFLOAD_VLAN_EXTEND);
2244 dev->data->dev_conf.rxmode.offloads |=
2245 DEV_RX_OFFLOAD_VLAN_EXTEND;
2247 dev->data->dev_conf.rxmode.offloads &=
2248 ~DEV_RX_OFFLOAD_VLAN_EXTEND;
2249 mask |= ETH_VLAN_EXTEND_MASK;
2256 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
2259 * Convert to the offload bitfield API just in case the underlying PMD
2260 * still supporting it.
2262 rte_eth_convert_rx_offloads(dev->data->dev_conf.rxmode.offloads,
2263 &dev->data->dev_conf.rxmode);
2264 ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
2266 /* hit an error restore original values */
2267 dev->data->dev_conf.rxmode.offloads = orig_offloads;
2268 rte_eth_convert_rx_offloads(dev->data->dev_conf.rxmode.offloads,
2269 &dev->data->dev_conf.rxmode);
2276 rte_eth_dev_get_vlan_offload(uint16_t port_id)
2278 struct rte_eth_dev *dev;
2281 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2282 dev = &rte_eth_devices[port_id];
2284 if (dev->data->dev_conf.rxmode.offloads &
2285 DEV_RX_OFFLOAD_VLAN_STRIP)
2286 ret |= ETH_VLAN_STRIP_OFFLOAD;
2288 if (dev->data->dev_conf.rxmode.offloads &
2289 DEV_RX_OFFLOAD_VLAN_FILTER)
2290 ret |= ETH_VLAN_FILTER_OFFLOAD;
2292 if (dev->data->dev_conf.rxmode.offloads &
2293 DEV_RX_OFFLOAD_VLAN_EXTEND)
2294 ret |= ETH_VLAN_EXTEND_OFFLOAD;
2300 rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
2302 struct rte_eth_dev *dev;
2304 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2305 dev = &rte_eth_devices[port_id];
2306 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
2307 (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on);
2313 rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2315 struct rte_eth_dev *dev;
2317 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2318 dev = &rte_eth_devices[port_id];
2319 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
2320 memset(fc_conf, 0, sizeof(*fc_conf));
2321 return (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf);
2325 rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
2327 struct rte_eth_dev *dev;
2329 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2330 if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
2331 RTE_PMD_DEBUG_TRACE("Invalid send_xon, only 0/1 allowed\n");
2335 dev = &rte_eth_devices[port_id];
2336 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
2337 return (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf);
2341 rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
2342 struct rte_eth_pfc_conf *pfc_conf)
2344 struct rte_eth_dev *dev;
2346 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2347 if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
2348 RTE_PMD_DEBUG_TRACE("Invalid priority, only 0-7 allowed\n");
2352 dev = &rte_eth_devices[port_id];
2353 /* High water, low water validation are device specific */
2354 if (*dev->dev_ops->priority_flow_ctrl_set)
2355 return (*dev->dev_ops->priority_flow_ctrl_set)(dev, pfc_conf);
2360 rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
2368 num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
2369 for (i = 0; i < num; i++) {
2370 if (reta_conf[i].mask)
2378 rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
2382 uint16_t i, idx, shift;
2388 RTE_PMD_DEBUG_TRACE("No receive queue is available\n");
2392 for (i = 0; i < reta_size; i++) {
2393 idx = i / RTE_RETA_GROUP_SIZE;
2394 shift = i % RTE_RETA_GROUP_SIZE;
2395 if ((reta_conf[idx].mask & (1ULL << shift)) &&
2396 (reta_conf[idx].reta[shift] >= max_rxq)) {
2397 RTE_PMD_DEBUG_TRACE("reta_conf[%u]->reta[%u]: %u exceeds "
2398 "the maximum rxq index: %u\n", idx, shift,
2399 reta_conf[idx].reta[shift], max_rxq);
2408 rte_eth_dev_rss_reta_update(uint16_t port_id,
2409 struct rte_eth_rss_reta_entry64 *reta_conf,
2412 struct rte_eth_dev *dev;
2415 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2416 /* Check mask bits */
2417 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2421 dev = &rte_eth_devices[port_id];
2423 /* Check entry value */
2424 ret = rte_eth_check_reta_entry(reta_conf, reta_size,
2425 dev->data->nb_rx_queues);
2429 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
2430 return (*dev->dev_ops->reta_update)(dev, reta_conf, reta_size);
2434 rte_eth_dev_rss_reta_query(uint16_t port_id,
2435 struct rte_eth_rss_reta_entry64 *reta_conf,
2438 struct rte_eth_dev *dev;
2441 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2443 /* Check mask bits */
2444 ret = rte_eth_check_reta_mask(reta_conf, reta_size);
2448 dev = &rte_eth_devices[port_id];
2449 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
2450 return (*dev->dev_ops->reta_query)(dev, reta_conf, reta_size);
2454 rte_eth_dev_rss_hash_update(uint16_t port_id,
2455 struct rte_eth_rss_conf *rss_conf)
2457 struct rte_eth_dev *dev;
2459 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2460 dev = &rte_eth_devices[port_id];
2461 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
2462 return (*dev->dev_ops->rss_hash_update)(dev, rss_conf);
2466 rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
2467 struct rte_eth_rss_conf *rss_conf)
2469 struct rte_eth_dev *dev;
2471 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2472 dev = &rte_eth_devices[port_id];
2473 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
2474 return (*dev->dev_ops->rss_hash_conf_get)(dev, rss_conf);
2478 rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
2479 struct rte_eth_udp_tunnel *udp_tunnel)
2481 struct rte_eth_dev *dev;
2483 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2484 if (udp_tunnel == NULL) {
2485 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2489 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2490 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2494 dev = &rte_eth_devices[port_id];
2495 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
2496 return (*dev->dev_ops->udp_tunnel_port_add)(dev, udp_tunnel);
2500 rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
2501 struct rte_eth_udp_tunnel *udp_tunnel)
2503 struct rte_eth_dev *dev;
2505 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2506 dev = &rte_eth_devices[port_id];
2508 if (udp_tunnel == NULL) {
2509 RTE_PMD_DEBUG_TRACE("Invalid udp_tunnel parameter\n");
2513 if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
2514 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
2518 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
2519 return (*dev->dev_ops->udp_tunnel_port_del)(dev, udp_tunnel);
2523 rte_eth_led_on(uint16_t port_id)
2525 struct rte_eth_dev *dev;
2527 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2528 dev = &rte_eth_devices[port_id];
2529 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
2530 return (*dev->dev_ops->dev_led_on)(dev);
2534 rte_eth_led_off(uint16_t port_id)
2536 struct rte_eth_dev *dev;
2538 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2539 dev = &rte_eth_devices[port_id];
2540 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
2541 return (*dev->dev_ops->dev_led_off)(dev);
2545 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2549 get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2551 struct rte_eth_dev_info dev_info;
2552 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2555 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2556 rte_eth_dev_info_get(port_id, &dev_info);
2558 for (i = 0; i < dev_info.max_mac_addrs; i++)
2559 if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
2565 static const struct ether_addr null_mac_addr;
2568 rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
2571 struct rte_eth_dev *dev;
2576 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2577 dev = &rte_eth_devices[port_id];
2578 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
2580 if (is_zero_ether_addr(addr)) {
2581 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2585 if (pool >= ETH_64_POOLS) {
2586 RTE_PMD_DEBUG_TRACE("pool id must be 0-%d\n", ETH_64_POOLS - 1);
2590 index = get_mac_addr_index(port_id, addr);
2592 index = get_mac_addr_index(port_id, &null_mac_addr);
2594 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2599 pool_mask = dev->data->mac_pool_sel[index];
2601 /* Check if both MAC address and pool is already there, and do nothing */
2602 if (pool_mask & (1ULL << pool))
2607 ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
2610 /* Update address in NIC data structure */
2611 ether_addr_copy(addr, &dev->data->mac_addrs[index]);
2613 /* Update pool bitmap in NIC data structure */
2614 dev->data->mac_pool_sel[index] |= (1ULL << pool);
2621 rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
2623 struct rte_eth_dev *dev;
2626 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2627 dev = &rte_eth_devices[port_id];
2628 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
2630 index = get_mac_addr_index(port_id, addr);
2632 RTE_PMD_DEBUG_TRACE("port %d: Cannot remove default MAC address\n", port_id);
2634 } else if (index < 0)
2635 return 0; /* Do nothing if address wasn't found */
2638 (*dev->dev_ops->mac_addr_remove)(dev, index);
2640 /* Update address in NIC data structure */
2641 ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
2643 /* reset pool bitmap */
2644 dev->data->mac_pool_sel[index] = 0;
2650 rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
2652 struct rte_eth_dev *dev;
2654 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2656 if (!is_valid_assigned_ether_addr(addr))
2659 dev = &rte_eth_devices[port_id];
2660 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
2662 /* Update default address in NIC data structure */
2663 ether_addr_copy(addr, &dev->data->mac_addrs[0]);
2665 (*dev->dev_ops->mac_addr_set)(dev, addr);
2672 * Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
2676 get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
2678 struct rte_eth_dev_info dev_info;
2679 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
2682 rte_eth_dev_info_get(port_id, &dev_info);
2683 if (!dev->data->hash_mac_addrs)
2686 for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
2687 if (memcmp(addr, &dev->data->hash_mac_addrs[i],
2688 ETHER_ADDR_LEN) == 0)
2695 rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
2700 struct rte_eth_dev *dev;
2702 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2704 dev = &rte_eth_devices[port_id];
2705 if (is_zero_ether_addr(addr)) {
2706 RTE_PMD_DEBUG_TRACE("port %d: Cannot add NULL MAC address\n",
2711 index = get_hash_mac_addr_index(port_id, addr);
2712 /* Check if it's already there, and do nothing */
2713 if ((index >= 0) && (on))
2718 RTE_PMD_DEBUG_TRACE("port %d: the MAC address was not "
2719 "set in UTA\n", port_id);
2723 index = get_hash_mac_addr_index(port_id, &null_mac_addr);
2725 RTE_PMD_DEBUG_TRACE("port %d: MAC address array full\n",
2731 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
2732 ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
2734 /* Update address in NIC data structure */
2736 ether_addr_copy(addr,
2737 &dev->data->hash_mac_addrs[index]);
2739 ether_addr_copy(&null_mac_addr,
2740 &dev->data->hash_mac_addrs[index]);
2747 rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
2749 struct rte_eth_dev *dev;
2751 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2753 dev = &rte_eth_devices[port_id];
2755 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
2756 return (*dev->dev_ops->uc_all_hash_table_set)(dev, on);
2759 int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
2762 struct rte_eth_dev *dev;
2763 struct rte_eth_dev_info dev_info;
2764 struct rte_eth_link link;
2766 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2768 dev = &rte_eth_devices[port_id];
2769 rte_eth_dev_info_get(port_id, &dev_info);
2770 link = dev->data->dev_link;
2772 if (queue_idx > dev_info.max_tx_queues) {
2773 RTE_PMD_DEBUG_TRACE("set queue rate limit:port %d: "
2774 "invalid queue id=%d\n", port_id, queue_idx);
2778 if (tx_rate > link.link_speed) {
2779 RTE_PMD_DEBUG_TRACE("set queue rate limit:invalid tx_rate=%d, "
2780 "bigger than link speed= %d\n",
2781 tx_rate, link.link_speed);
2785 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
2786 return (*dev->dev_ops->set_queue_rate_limit)(dev, queue_idx, tx_rate);
2790 rte_eth_mirror_rule_set(uint16_t port_id,
2791 struct rte_eth_mirror_conf *mirror_conf,
2792 uint8_t rule_id, uint8_t on)
2794 struct rte_eth_dev *dev;
2796 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2797 if (mirror_conf->rule_type == 0) {
2798 RTE_PMD_DEBUG_TRACE("mirror rule type can not be 0.\n");
2802 if (mirror_conf->dst_pool >= ETH_64_POOLS) {
2803 RTE_PMD_DEBUG_TRACE("Invalid dst pool, pool id must be 0-%d\n",
2808 if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
2809 ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
2810 (mirror_conf->pool_mask == 0)) {
2811 RTE_PMD_DEBUG_TRACE("Invalid mirror pool, pool mask can not be 0.\n");
2815 if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
2816 mirror_conf->vlan.vlan_mask == 0) {
2817 RTE_PMD_DEBUG_TRACE("Invalid vlan mask, vlan mask can not be 0.\n");
2821 dev = &rte_eth_devices[port_id];
2822 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
2824 return (*dev->dev_ops->mirror_rule_set)(dev, mirror_conf, rule_id, on);
2828 rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
2830 struct rte_eth_dev *dev;
2832 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2834 dev = &rte_eth_devices[port_id];
2835 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
2837 return (*dev->dev_ops->mirror_rule_reset)(dev, rule_id);
2841 rte_eth_dev_callback_register(uint16_t port_id,
2842 enum rte_eth_event_type event,
2843 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2845 struct rte_eth_dev *dev;
2846 struct rte_eth_dev_callback *user_cb;
2851 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2853 dev = &rte_eth_devices[port_id];
2854 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2856 TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
2857 if (user_cb->cb_fn == cb_fn &&
2858 user_cb->cb_arg == cb_arg &&
2859 user_cb->event == event) {
2864 /* create a new callback. */
2865 if (user_cb == NULL) {
2866 user_cb = rte_zmalloc("INTR_USER_CALLBACK",
2867 sizeof(struct rte_eth_dev_callback), 0);
2868 if (user_cb != NULL) {
2869 user_cb->cb_fn = cb_fn;
2870 user_cb->cb_arg = cb_arg;
2871 user_cb->event = event;
2872 TAILQ_INSERT_TAIL(&(dev->link_intr_cbs), user_cb, next);
2876 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2877 return (user_cb == NULL) ? -ENOMEM : 0;
2881 rte_eth_dev_callback_unregister(uint16_t port_id,
2882 enum rte_eth_event_type event,
2883 rte_eth_dev_cb_fn cb_fn, void *cb_arg)
2886 struct rte_eth_dev *dev;
2887 struct rte_eth_dev_callback *cb, *next;
2892 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
2894 dev = &rte_eth_devices[port_id];
2895 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2898 for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL; cb = next) {
2900 next = TAILQ_NEXT(cb, next);
2902 if (cb->cb_fn != cb_fn || cb->event != event ||
2903 (cb->cb_arg != (void *)-1 &&
2904 cb->cb_arg != cb_arg))
2908 * if this callback is not executing right now,
2911 if (cb->active == 0) {
2912 TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
2919 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2924 _rte_eth_dev_callback_process(struct rte_eth_dev *dev,
2925 enum rte_eth_event_type event, void *cb_arg, void *ret_param)
2927 struct rte_eth_dev_callback *cb_lst;
2928 struct rte_eth_dev_callback dev_cb;
2931 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2932 TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
2933 if (cb_lst->cb_fn == NULL || cb_lst->event != event)
2938 dev_cb.cb_arg = cb_arg;
2939 if (ret_param != NULL)
2940 dev_cb.ret_param = ret_param;
2942 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2943 rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
2944 dev_cb.cb_arg, dev_cb.ret_param);
2945 rte_spinlock_lock(&rte_eth_dev_cb_lock);
2948 rte_spinlock_unlock(&rte_eth_dev_cb_lock);
2953 rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
2956 struct rte_eth_dev *dev;
2957 struct rte_intr_handle *intr_handle;
2961 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
2963 dev = &rte_eth_devices[port_id];
2965 if (!dev->intr_handle) {
2966 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
2970 intr_handle = dev->intr_handle;
2971 if (!intr_handle->intr_vec) {
2972 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
2976 for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
2977 vec = intr_handle->intr_vec[qid];
2978 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
2979 if (rc && rc != -EEXIST) {
2980 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
2981 " op %d epfd %d vec %u\n",
2982 port_id, qid, op, epfd, vec);
2989 const struct rte_memzone *
2990 rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
2991 uint16_t queue_id, size_t size, unsigned align,
2994 char z_name[RTE_MEMZONE_NAMESIZE];
2995 const struct rte_memzone *mz;
2997 snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
2998 dev->device->driver->name, ring_name,
2999 dev->data->port_id, queue_id);
3001 mz = rte_memzone_lookup(z_name);
3005 return rte_memzone_reserve_aligned(z_name, size, socket_id, 0, align);
3009 rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
3010 int epfd, int op, void *data)
3013 struct rte_eth_dev *dev;
3014 struct rte_intr_handle *intr_handle;
3017 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3019 dev = &rte_eth_devices[port_id];
3020 if (queue_id >= dev->data->nb_rx_queues) {
3021 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%u\n", queue_id);
3025 if (!dev->intr_handle) {
3026 RTE_PMD_DEBUG_TRACE("RX Intr handle unset\n");
3030 intr_handle = dev->intr_handle;
3031 if (!intr_handle->intr_vec) {
3032 RTE_PMD_DEBUG_TRACE("RX Intr vector unset\n");
3036 vec = intr_handle->intr_vec[queue_id];
3037 rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
3038 if (rc && rc != -EEXIST) {
3039 RTE_PMD_DEBUG_TRACE("p %u q %u rx ctl error"
3040 " op %d epfd %d vec %u\n",
3041 port_id, queue_id, op, epfd, vec);
3049 rte_eth_dev_rx_intr_enable(uint16_t port_id,
3052 struct rte_eth_dev *dev;
3054 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3056 dev = &rte_eth_devices[port_id];
3058 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
3059 return (*dev->dev_ops->rx_queue_intr_enable)(dev, queue_id);
3063 rte_eth_dev_rx_intr_disable(uint16_t port_id,
3066 struct rte_eth_dev *dev;
3068 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3070 dev = &rte_eth_devices[port_id];
3072 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
3073 return (*dev->dev_ops->rx_queue_intr_disable)(dev, queue_id);
3078 rte_eth_dev_filter_supported(uint16_t port_id,
3079 enum rte_filter_type filter_type)
3081 struct rte_eth_dev *dev;
3083 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3085 dev = &rte_eth_devices[port_id];
3086 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3087 return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
3088 RTE_ETH_FILTER_NOP, NULL);
3092 rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
3093 enum rte_filter_op filter_op, void *arg)
3095 struct rte_eth_dev *dev;
3097 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3099 dev = &rte_eth_devices[port_id];
3100 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
3101 return (*dev->dev_ops->filter_ctrl)(dev, filter_type, filter_op, arg);
3105 rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
3106 rte_rx_callback_fn fn, void *user_param)
3108 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3109 rte_errno = ENOTSUP;
3112 /* check input parameters */
3113 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3114 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3118 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3126 cb->param = user_param;
3128 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3129 /* Add the callbacks in fifo order. */
3130 struct rte_eth_rxtx_callback *tail =
3131 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3134 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3141 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3147 rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
3148 rte_rx_callback_fn fn, void *user_param)
3150 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3151 rte_errno = ENOTSUP;
3154 /* check input parameters */
3155 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3156 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
3161 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3169 cb->param = user_param;
3171 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3172 /* Add the callbacks at fisrt position*/
3173 cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
3175 rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
3176 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3182 rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
3183 rte_tx_callback_fn fn, void *user_param)
3185 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3186 rte_errno = ENOTSUP;
3189 /* check input parameters */
3190 if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
3191 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
3196 struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
3204 cb->param = user_param;
3206 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3207 /* Add the callbacks in fifo order. */
3208 struct rte_eth_rxtx_callback *tail =
3209 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
3212 rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
3219 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3225 rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
3226 struct rte_eth_rxtx_callback *user_cb)
3228 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3231 /* Check input parameters. */
3232 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3233 if (user_cb == NULL ||
3234 queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
3237 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3238 struct rte_eth_rxtx_callback *cb;
3239 struct rte_eth_rxtx_callback **prev_cb;
3242 rte_spinlock_lock(&rte_eth_rx_cb_lock);
3243 prev_cb = &dev->post_rx_burst_cbs[queue_id];
3244 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3246 if (cb == user_cb) {
3247 /* Remove the user cb from the callback list. */
3248 *prev_cb = cb->next;
3253 rte_spinlock_unlock(&rte_eth_rx_cb_lock);
3259 rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
3260 struct rte_eth_rxtx_callback *user_cb)
3262 #ifndef RTE_ETHDEV_RXTX_CALLBACKS
3265 /* Check input parameters. */
3266 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
3267 if (user_cb == NULL ||
3268 queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
3271 struct rte_eth_dev *dev = &rte_eth_devices[port_id];
3273 struct rte_eth_rxtx_callback *cb;
3274 struct rte_eth_rxtx_callback **prev_cb;
3276 rte_spinlock_lock(&rte_eth_tx_cb_lock);
3277 prev_cb = &dev->pre_tx_burst_cbs[queue_id];
3278 for (; *prev_cb != NULL; prev_cb = &cb->next) {
3280 if (cb == user_cb) {
3281 /* Remove the user cb from the callback list. */
3282 *prev_cb = cb->next;
3287 rte_spinlock_unlock(&rte_eth_tx_cb_lock);
3293 rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3294 struct rte_eth_rxq_info *qinfo)
3296 struct rte_eth_dev *dev;
3298 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3303 dev = &rte_eth_devices[port_id];
3304 if (queue_id >= dev->data->nb_rx_queues) {
3305 RTE_PMD_DEBUG_TRACE("Invalid RX queue_id=%d\n", queue_id);
3309 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
3311 memset(qinfo, 0, sizeof(*qinfo));
3312 dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
3317 rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
3318 struct rte_eth_txq_info *qinfo)
3320 struct rte_eth_dev *dev;
3322 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3327 dev = &rte_eth_devices[port_id];
3328 if (queue_id >= dev->data->nb_tx_queues) {
3329 RTE_PMD_DEBUG_TRACE("Invalid TX queue_id=%d\n", queue_id);
3333 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
3335 memset(qinfo, 0, sizeof(*qinfo));
3336 dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
3341 rte_eth_dev_set_mc_addr_list(uint16_t port_id,
3342 struct ether_addr *mc_addr_set,
3343 uint32_t nb_mc_addr)
3345 struct rte_eth_dev *dev;
3347 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3349 dev = &rte_eth_devices[port_id];
3350 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
3351 return dev->dev_ops->set_mc_addr_list(dev, mc_addr_set, nb_mc_addr);
3355 rte_eth_timesync_enable(uint16_t port_id)
3357 struct rte_eth_dev *dev;
3359 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3360 dev = &rte_eth_devices[port_id];
3362 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
3363 return (*dev->dev_ops->timesync_enable)(dev);
3367 rte_eth_timesync_disable(uint16_t port_id)
3369 struct rte_eth_dev *dev;
3371 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3372 dev = &rte_eth_devices[port_id];
3374 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
3375 return (*dev->dev_ops->timesync_disable)(dev);
3379 rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
3382 struct rte_eth_dev *dev;
3384 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3385 dev = &rte_eth_devices[port_id];
3387 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
3388 return (*dev->dev_ops->timesync_read_rx_timestamp)(dev, timestamp, flags);
3392 rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
3393 struct timespec *timestamp)
3395 struct rte_eth_dev *dev;
3397 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3398 dev = &rte_eth_devices[port_id];
3400 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
3401 return (*dev->dev_ops->timesync_read_tx_timestamp)(dev, timestamp);
3405 rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
3407 struct rte_eth_dev *dev;
3409 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3410 dev = &rte_eth_devices[port_id];
3412 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
3413 return (*dev->dev_ops->timesync_adjust_time)(dev, delta);
3417 rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
3419 struct rte_eth_dev *dev;
3421 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3422 dev = &rte_eth_devices[port_id];
3424 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
3425 return (*dev->dev_ops->timesync_read_time)(dev, timestamp);
3429 rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
3431 struct rte_eth_dev *dev;
3433 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3434 dev = &rte_eth_devices[port_id];
3436 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
3437 return (*dev->dev_ops->timesync_write_time)(dev, timestamp);
3441 rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
3443 struct rte_eth_dev *dev;
3445 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3447 dev = &rte_eth_devices[port_id];
3448 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
3449 return (*dev->dev_ops->get_reg)(dev, info);
3453 rte_eth_dev_get_eeprom_length(uint16_t port_id)
3455 struct rte_eth_dev *dev;
3457 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3459 dev = &rte_eth_devices[port_id];
3460 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
3461 return (*dev->dev_ops->get_eeprom_length)(dev);
3465 rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3467 struct rte_eth_dev *dev;
3469 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3471 dev = &rte_eth_devices[port_id];
3472 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
3473 return (*dev->dev_ops->get_eeprom)(dev, info);
3477 rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
3479 struct rte_eth_dev *dev;
3481 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3483 dev = &rte_eth_devices[port_id];
3484 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
3485 return (*dev->dev_ops->set_eeprom)(dev, info);
3489 rte_eth_dev_get_dcb_info(uint16_t port_id,
3490 struct rte_eth_dcb_info *dcb_info)
3492 struct rte_eth_dev *dev;
3494 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3496 dev = &rte_eth_devices[port_id];
3497 memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
3499 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
3500 return (*dev->dev_ops->get_dcb_info)(dev, dcb_info);
3504 rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
3505 struct rte_eth_l2_tunnel_conf *l2_tunnel)
3507 struct rte_eth_dev *dev;
3509 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3510 if (l2_tunnel == NULL) {
3511 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3515 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3516 RTE_PMD_DEBUG_TRACE("Invalid tunnel type\n");
3520 dev = &rte_eth_devices[port_id];
3521 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
3523 return (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev, l2_tunnel);
3527 rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
3528 struct rte_eth_l2_tunnel_conf *l2_tunnel,
3532 struct rte_eth_dev *dev;
3534 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3536 if (l2_tunnel == NULL) {
3537 RTE_PMD_DEBUG_TRACE("Invalid l2_tunnel parameter\n");
3541 if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
3542 RTE_PMD_DEBUG_TRACE("Invalid tunnel type.\n");
3547 RTE_PMD_DEBUG_TRACE("Mask should have a value.\n");
3551 dev = &rte_eth_devices[port_id];
3552 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
3554 return (*dev->dev_ops->l2_tunnel_offload_set)(dev, l2_tunnel, mask, en);
3558 rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
3559 const struct rte_eth_desc_lim *desc_lim)
3561 if (desc_lim->nb_align != 0)
3562 *nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
3564 if (desc_lim->nb_max != 0)
3565 *nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
3567 *nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
3571 rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
3572 uint16_t *nb_rx_desc,
3573 uint16_t *nb_tx_desc)
3575 struct rte_eth_dev *dev;
3576 struct rte_eth_dev_info dev_info;
3578 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3580 dev = &rte_eth_devices[port_id];
3581 RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
3583 rte_eth_dev_info_get(port_id, &dev_info);
3585 if (nb_rx_desc != NULL)
3586 rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
3588 if (nb_tx_desc != NULL)
3589 rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
3595 rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
3597 struct rte_eth_dev *dev;
3599 RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
3604 dev = &rte_eth_devices[port_id];
3606 if (*dev->dev_ops->pool_ops_supported == NULL)
3607 return 1; /* all pools are supported */
3609 return (*dev->dev_ops->pool_ops_supported)(dev, pool);