lib/librte_sched/rte_sched.c

   1 /* SPDX-License-Identifier: BSD-3-Clause
   2  * Copyright(c) 2010-2014 Intel Corporation
   3  */
   4
   5 #include <stdio.h>
   6 #include <string.h>
   7
   8 #include <rte_common.h>
   9 #include <rte_log.h>
  10 #include <rte_memory.h>
  11 #include <rte_malloc.h>
  12 #include <rte_cycles.h>
  13 #include <rte_prefetch.h>
  14 #include <rte_branch_prediction.h>
  15 #include <rte_mbuf.h>
  16 #include <rte_bitmap.h>
  17 #include <rte_reciprocal.h>
  18
  19 #include "rte_sched.h"
  20 #include "rte_sched_common.h"
  21 #include "rte_approx.h"
  22
  23 #ifdef __INTEL_COMPILER
  24 #pragma warning(disable:2259) /* conversion may lose significant bits */
  25 #endif
  26
  27 #ifdef RTE_SCHED_VECTOR
  28 #include <rte_vect.h>
  29
  30 #ifdef RTE_ARCH_X86
  31 #define SCHED_VECTOR_SSE4
  32 #elif defined(RTE_MACHINE_CPUFLAG_NEON)
  33 #define SCHED_VECTOR_NEON
  34 #endif
  35
  36 #endif
  37
  38 #define RTE_SCHED_TB_RATE_CONFIG_ERR          (1e-7)
  39 #define RTE_SCHED_WRR_SHIFT                   3
  40 #define RTE_SCHED_GRINDER_PCACHE_SIZE         (64 / RTE_SCHED_QUEUES_PER_PIPE)
  41 #define RTE_SCHED_PIPE_INVALID                UINT32_MAX
  42 #define RTE_SCHED_BMP_POS_INVALID             UINT32_MAX
  43
  44 /* Scaling for cycles_per_byte calculation
  45  * Chosen so that minimum rate is 480 bit/sec
  46  */
  47 #define RTE_SCHED_TIME_SHIFT                  8
  48
  49 struct rte_sched_subport {
  50         /* Token bucket (TB) */
  51         uint64_t tb_time; /* time of last update */
  52         uint32_t tb_period;
  53         uint32_t tb_credits_per_period;
  54         uint32_t tb_size;
  55         uint32_t tb_credits;
  56
  57         /* Traffic classes (TCs) */
  58         uint64_t tc_time; /* time of next update */
  59         uint32_t tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
  60         uint32_t tc_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
  61         uint32_t tc_period;
  62
  63         /* TC oversubscription */
  64         uint32_t tc_ov_wm;
  65         uint32_t tc_ov_wm_min;
  66         uint32_t tc_ov_wm_max;
  67         uint8_t tc_ov_period_id;
  68         uint8_t tc_ov;
  69         uint32_t tc_ov_n;
  70         double tc_ov_rate;
  71
  72         /* Statistics */
  73         struct rte_sched_subport_stats stats;
  74 };
  75
  76 struct rte_sched_pipe_profile {
  77         /* Token bucket (TB) */
  78         uint32_t tb_period;
  79         uint32_t tb_credits_per_period;
  80         uint32_t tb_size;
  81
  82         /* Pipe traffic classes */
  83         uint32_t tc_period;
  84         uint32_t tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
  85         uint8_t tc_ov_weight;
  86
  87         /* Pipe queues */
  88         uint8_t  wrr_cost[RTE_SCHED_QUEUES_PER_PIPE];
  89 };
  90
  91 struct rte_sched_pipe {
  92         /* Token bucket (TB) */
  93         uint64_t tb_time; /* time of last update */
  94         uint32_t tb_credits;
  95
  96         /* Pipe profile and flags */
  97         uint32_t profile;
  98
  99         /* Traffic classes (TCs) */
 100         uint64_t tc_time; /* time of next update */
 101         uint32_t tc_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
 102
 103         /* Weighted Round Robin (WRR) */
 104         uint8_t wrr_tokens[RTE_SCHED_QUEUES_PER_PIPE];
 105
 106         /* TC oversubscription */
 107         uint32_t tc_ov_credits;
 108         uint8_t tc_ov_period_id;
 109         uint8_t reserved[3];
 110 } __rte_cache_aligned;
 111
 112 struct rte_sched_queue {
 113         uint16_t qw;
 114         uint16_t qr;
 115 };
 116
 117 struct rte_sched_queue_extra {
 118         struct rte_sched_queue_stats stats;
 119 #ifdef RTE_SCHED_RED
 120         struct rte_red red;
 121 #endif
 122 };
 123
 124 enum grinder_state {
 125         e_GRINDER_PREFETCH_PIPE = 0,
 126         e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS,
 127         e_GRINDER_PREFETCH_MBUF,
 128         e_GRINDER_READ_MBUF
 129 };
 130
 131 /*
 132  * Path through the scheduler hierarchy used by the scheduler enqueue
 133  * operation to identify the destination queue for the current
 134  * packet. Stored in the field pkt.hash.sched of struct rte_mbuf of
 135  * each packet, typically written by the classification stage and read
 136  * by scheduler enqueue.
 137  */
 138 struct rte_sched_port_hierarchy {
 139         uint16_t queue:2;                /**< Queue ID (0 .. 3) */
 140         uint16_t traffic_class:2;        /**< Traffic class ID (0 .. 3)*/
 141         uint32_t color:2;                /**< Color */
 142         uint16_t unused:10;
 143         uint16_t subport;                /**< Subport ID */
 144         uint32_t pipe;                   /**< Pipe ID */
 145 };
 146
 147 struct rte_sched_grinder {
 148         /* Pipe cache */
 149         uint16_t pcache_qmask[RTE_SCHED_GRINDER_PCACHE_SIZE];
 150         uint32_t pcache_qindex[RTE_SCHED_GRINDER_PCACHE_SIZE];
 151         uint32_t pcache_w;
 152         uint32_t pcache_r;
 153
 154         /* Current pipe */
 155         enum grinder_state state;
 156         uint32_t productive;
 157         uint32_t pindex;
 158         struct rte_sched_subport *subport;
 159         struct rte_sched_pipe *pipe;
 160         struct rte_sched_pipe_profile *pipe_params;
 161
 162         /* TC cache */
 163         uint8_t tccache_qmask[4];
 164         uint32_t tccache_qindex[4];
 165         uint32_t tccache_w;
 166         uint32_t tccache_r;
 167
 168         /* Current TC */
 169         uint32_t tc_index;
 170         struct rte_sched_queue *queue[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
 171         struct rte_mbuf **qbase[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
 172         uint32_t qindex[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
 173         uint16_t qsize;
 174         uint32_t qmask;
 175         uint32_t qpos;
 176         struct rte_mbuf *pkt;
 177
 178         /* WRR */
 179         uint16_t wrr_tokens[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
 180         uint16_t wrr_mask[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
 181         uint8_t wrr_cost[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
 182 };
 183
 184 struct rte_sched_port {
 185         /* User parameters */
 186         uint32_t n_subports_per_port;
 187         uint32_t n_pipes_per_subport;
 188         uint32_t rate;
 189         uint32_t mtu;
 190         uint32_t frame_overhead;
 191         uint16_t qsize[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
 192         uint32_t n_pipe_profiles;
 193         uint32_t pipe_tc3_rate_max;
 194 #ifdef RTE_SCHED_RED
 195         struct rte_red_config red_config[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE][e_RTE_METER_COLORS];
 196 #endif
 197
 198         /* Timing */
 199         uint64_t time_cpu_cycles;     /* Current CPU time measured in CPU cyles */
 200         uint64_t time_cpu_bytes;      /* Current CPU time measured in bytes */
 201         uint64_t time;                /* Current NIC TX time measured in bytes */
 202         struct rte_reciprocal inv_cycles_per_byte; /* CPU cycles per byte */
 203
 204         /* Scheduling loop detection */
 205         uint32_t pipe_loop;
 206         uint32_t pipe_exhaustion;
 207
 208         /* Bitmap */
 209         struct rte_bitmap *bmp;
 210         uint32_t grinder_base_bmp_pos[RTE_SCHED_PORT_N_GRINDERS] __rte_aligned_16;
 211
 212         /* Grinders */
 213         struct rte_sched_grinder grinder[RTE_SCHED_PORT_N_GRINDERS];
 214         uint32_t busy_grinders;
 215         struct rte_mbuf **pkts_out;
 216         uint32_t n_pkts_out;
 217
 218         /* Queue base calculation */
 219         uint32_t qsize_add[RTE_SCHED_QUEUES_PER_PIPE];
 220         uint32_t qsize_sum;
 221
 222         /* Large data structures */
 223         struct rte_sched_subport *subport;
 224         struct rte_sched_pipe *pipe;
 225         struct rte_sched_queue *queue;
 226         struct rte_sched_queue_extra *queue_extra;
 227         struct rte_sched_pipe_profile *pipe_profiles;
 228         uint8_t *bmp_array;
 229         struct rte_mbuf **queue_array;
 230         uint8_t memory[0] __rte_cache_aligned;
 231 } __rte_cache_aligned;
 232
 233 enum rte_sched_port_array {
 234         e_RTE_SCHED_PORT_ARRAY_SUBPORT = 0,
 235         e_RTE_SCHED_PORT_ARRAY_PIPE,
 236         e_RTE_SCHED_PORT_ARRAY_QUEUE,
 237         e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA,
 238         e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES,
 239         e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY,
 240         e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY,
 241         e_RTE_SCHED_PORT_ARRAY_TOTAL,
 242 };
 243
 244 #ifdef RTE_SCHED_COLLECT_STATS
 245
 246 static inline uint32_t
 247 rte_sched_port_queues_per_subport(struct rte_sched_port *port)
 248 {
 249         return RTE_SCHED_QUEUES_PER_PIPE * port->n_pipes_per_subport;
 250 }
 251
 252 #endif
 253
 254 static inline uint32_t
 255 rte_sched_port_queues_per_port(struct rte_sched_port *port)
 256 {
 257         return RTE_SCHED_QUEUES_PER_PIPE * port->n_pipes_per_subport * port->n_subports_per_port;
 258 }
 259
 260 static inline struct rte_mbuf **
 261 rte_sched_port_qbase(struct rte_sched_port *port, uint32_t qindex)
 262 {
 263         uint32_t pindex = qindex >> 4;
 264         uint32_t qpos = qindex & 0xF;
 265
 266         return (port->queue_array + pindex *
 267                 port->qsize_sum + port->qsize_add[qpos]);
 268 }
 269
 270 static inline uint16_t
 271 rte_sched_port_qsize(struct rte_sched_port *port, uint32_t qindex)
 272 {
 273         uint32_t tc = (qindex >> 2) & 0x3;
 274
 275         return port->qsize[tc];
 276 }
 277
 278 static int
 279 pipe_profile_check(struct rte_sched_pipe_params *params,
 280         uint32_t rate)
 281 {
 282         uint32_t i;
 283
 284         /* Pipe parameters */
 285         if (params == NULL)
 286                 return -10;
 287
 288         /* TB rate: non-zero, not greater than port rate */
 289         if (params->tb_rate == 0 ||
 290                 params->tb_rate > rate)
 291                 return -11;
 292
 293         /* TB size: non-zero */
 294         if (params->tb_size == 0)
 295                 return -12;
 296
 297         /* TC rate: non-zero, less than pipe rate */
 298         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
 299                 if (params->tc_rate[i] == 0 ||
 300                         params->tc_rate[i] > params->tb_rate)
 301                         return -13;
 302         }
 303
 304         /* TC period: non-zero */
 305         if (params->tc_period == 0)
 306                 return -14;
 307
 308 #ifdef RTE_SCHED_SUBPORT_TC_OV
 309         /* TC3 oversubscription weight: non-zero */
 310         if (params->tc_ov_weight == 0)
 311                 return -15;
 312 #endif
 313
 314         /* Queue WRR weights: non-zero */
 315         for (i = 0; i < RTE_SCHED_QUEUES_PER_PIPE; i++) {
 316                 if (params->wrr_weights[i] == 0)
 317                         return -16;
 318         }
 319
 320         return 0;
 321 }
 322
 323 static int
 324 rte_sched_port_check_params(struct rte_sched_port_params *params)
 325 {
 326         uint32_t i;
 327
 328         if (params == NULL)
 329                 return -1;
 330
 331         /* socket */
 332         if (params->socket < 0)
 333                 return -3;
 334
 335         /* rate */
 336         if (params->rate == 0)
 337                 return -4;
 338
 339         /* mtu */
 340         if (params->mtu == 0)
 341                 return -5;
 342
 343         /* n_subports_per_port: non-zero, limited to 16 bits, power of 2 */
 344         if (params->n_subports_per_port == 0 ||
 345             params->n_subports_per_port > 1u << 16 ||
 346             !rte_is_power_of_2(params->n_subports_per_port))
 347                 return -6;
 348
 349         /* n_pipes_per_subport: non-zero, power of 2 */
 350         if (params->n_pipes_per_subport == 0 ||
 351             !rte_is_power_of_2(params->n_pipes_per_subport))
 352                 return -7;
 353
 354         /* qsize: non-zero, power of 2,
 355          * no bigger than 32K (due to 16-bit read/write pointers)
 356          */
 357         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
 358                 uint16_t qsize = params->qsize[i];
 359
 360                 if (qsize == 0 || !rte_is_power_of_2(qsize))
 361                         return -8;
 362         }
 363
 364         /* pipe_profiles and n_pipe_profiles */
 365         if (params->pipe_profiles == NULL ||
 366             params->n_pipe_profiles == 0 ||
 367             params->n_pipe_profiles > RTE_SCHED_PIPE_PROFILES_PER_PORT)
 368                 return -9;
 369
 370         for (i = 0; i < params->n_pipe_profiles; i++) {
 371                 struct rte_sched_pipe_params *p = params->pipe_profiles + i;
 372                 int status;
 373
 374                 status = pipe_profile_check(p, params->rate);
 375                 if (status != 0)
 376                         return status;
 377         }
 378
 379         return 0;
 380 }
 381
 382 static uint32_t
 383 rte_sched_port_get_array_base(struct rte_sched_port_params *params, enum rte_sched_port_array array)
 384 {
 385         uint32_t n_subports_per_port = params->n_subports_per_port;
 386         uint32_t n_pipes_per_subport = params->n_pipes_per_subport;
 387         uint32_t n_pipes_per_port = n_pipes_per_subport * n_subports_per_port;
 388         uint32_t n_queues_per_port = RTE_SCHED_QUEUES_PER_PIPE * n_pipes_per_subport * n_subports_per_port;
 389
 390         uint32_t size_subport = n_subports_per_port * sizeof(struct rte_sched_subport);
 391         uint32_t size_pipe = n_pipes_per_port * sizeof(struct rte_sched_pipe);
 392         uint32_t size_queue = n_queues_per_port * sizeof(struct rte_sched_queue);
 393         uint32_t size_queue_extra
 394                 = n_queues_per_port * sizeof(struct rte_sched_queue_extra);
 395         uint32_t size_pipe_profiles
 396                 = RTE_SCHED_PIPE_PROFILES_PER_PORT * sizeof(struct rte_sched_pipe_profile);
 397         uint32_t size_bmp_array = rte_bitmap_get_memory_footprint(n_queues_per_port);
 398         uint32_t size_per_pipe_queue_array, size_queue_array;
 399
 400         uint32_t base, i;
 401
 402         size_per_pipe_queue_array = 0;
 403         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
 404                 size_per_pipe_queue_array += RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS
 405                         * params->qsize[i] * sizeof(struct rte_mbuf *);
 406         }
 407         size_queue_array = n_pipes_per_port * size_per_pipe_queue_array;
 408
 409         base = 0;
 410
 411         if (array == e_RTE_SCHED_PORT_ARRAY_SUBPORT)
 412                 return base;
 413         base += RTE_CACHE_LINE_ROUNDUP(size_subport);
 414
 415         if (array == e_RTE_SCHED_PORT_ARRAY_PIPE)
 416                 return base;
 417         base += RTE_CACHE_LINE_ROUNDUP(size_pipe);
 418
 419         if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE)
 420                 return base;
 421         base += RTE_CACHE_LINE_ROUNDUP(size_queue);
 422
 423         if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA)
 424                 return base;
 425         base += RTE_CACHE_LINE_ROUNDUP(size_queue_extra);
 426
 427         if (array == e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES)
 428                 return base;
 429         base += RTE_CACHE_LINE_ROUNDUP(size_pipe_profiles);
 430
 431         if (array == e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY)
 432                 return base;
 433         base += RTE_CACHE_LINE_ROUNDUP(size_bmp_array);
 434
 435         if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY)
 436                 return base;
 437         base += RTE_CACHE_LINE_ROUNDUP(size_queue_array);
 438
 439         return base;
 440 }
 441
 442 uint32_t
 443 rte_sched_port_get_memory_footprint(struct rte_sched_port_params *params)
 444 {
 445         uint32_t size0, size1;
 446         int status;
 447
 448         status = rte_sched_port_check_params(params);
 449         if (status != 0) {
 450                 RTE_LOG(NOTICE, SCHED,
 451                         "Port scheduler params check failed (%d)\n", status);
 452
 453                 return 0;
 454         }
 455
 456         size0 = sizeof(struct rte_sched_port);
 457         size1 = rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_TOTAL);
 458
 459         return size0 + size1;
 460 }
 461
 462 static void
 463 rte_sched_port_config_qsize(struct rte_sched_port *port)
 464 {
 465         /* TC 0 */
 466         port->qsize_add[0] = 0;
 467         port->qsize_add[1] = port->qsize_add[0] + port->qsize[0];
 468         port->qsize_add[2] = port->qsize_add[1] + port->qsize[0];
 469         port->qsize_add[3] = port->qsize_add[2] + port->qsize[0];
 470
 471         /* TC 1 */
 472         port->qsize_add[4] = port->qsize_add[3] + port->qsize[0];
 473         port->qsize_add[5] = port->qsize_add[4] + port->qsize[1];
 474         port->qsize_add[6] = port->qsize_add[5] + port->qsize[1];
 475         port->qsize_add[7] = port->qsize_add[6] + port->qsize[1];
 476
 477         /* TC 2 */
 478         port->qsize_add[8] = port->qsize_add[7] + port->qsize[1];
 479         port->qsize_add[9] = port->qsize_add[8] + port->qsize[2];
 480         port->qsize_add[10] = port->qsize_add[9] + port->qsize[2];
 481         port->qsize_add[11] = port->qsize_add[10] + port->qsize[2];
 482
 483         /* TC 3 */
 484         port->qsize_add[12] = port->qsize_add[11] + port->qsize[2];
 485         port->qsize_add[13] = port->qsize_add[12] + port->qsize[3];
 486         port->qsize_add[14] = port->qsize_add[13] + port->qsize[3];
 487         port->qsize_add[15] = port->qsize_add[14] + port->qsize[3];
 488
 489         port->qsize_sum = port->qsize_add[15] + port->qsize[3];
 490 }
 491
 492 static void
 493 rte_sched_port_log_pipe_profile(struct rte_sched_port *port, uint32_t i)
 494 {
 495         struct rte_sched_pipe_profile *p = port->pipe_profiles + i;
 496
 497         RTE_LOG(DEBUG, SCHED, "Low level config for pipe profile %u:\n"
 498                 "    Token bucket: period = %u, credits per period = %u, size = %u\n"
 499                 "    Traffic classes: period = %u, credits per period = [%u, %u, %u, %u]\n"
 500                 "    Traffic class 3 oversubscription: weight = %hhu\n"
 501                 "    WRR cost: [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu]\n",
 502                 i,
 503
 504                 /* Token bucket */
 505                 p->tb_period,
 506                 p->tb_credits_per_period,
 507                 p->tb_size,
 508
 509                 /* Traffic classes */
 510                 p->tc_period,
 511                 p->tc_credits_per_period[0],
 512                 p->tc_credits_per_period[1],
 513                 p->tc_credits_per_period[2],
 514                 p->tc_credits_per_period[3],
 515
 516                 /* Traffic class 3 oversubscription */
 517                 p->tc_ov_weight,
 518
 519                 /* WRR */
 520                 p->wrr_cost[ 0], p->wrr_cost[ 1], p->wrr_cost[ 2], p->wrr_cost[ 3],
 521                 p->wrr_cost[ 4], p->wrr_cost[ 5], p->wrr_cost[ 6], p->wrr_cost[ 7],
 522                 p->wrr_cost[ 8], p->wrr_cost[ 9], p->wrr_cost[10], p->wrr_cost[11],
 523                 p->wrr_cost[12], p->wrr_cost[13], p->wrr_cost[14], p->wrr_cost[15]);
 524 }
 525
 526 static inline uint64_t
 527 rte_sched_time_ms_to_bytes(uint32_t time_ms, uint32_t rate)
 528 {
 529         uint64_t time = time_ms;
 530
 531         time = (time * rate) / 1000;
 532
 533         return time;
 534 }
 535
 536 static void
 537 rte_sched_pipe_profile_convert(struct rte_sched_pipe_params *src,
 538         struct rte_sched_pipe_profile *dst,
 539         uint32_t rate)
 540 {
 541         uint32_t i;
 542
 543         /* Token Bucket */
 544         if (src->tb_rate == rate) {
 545                 dst->tb_credits_per_period = 1;
 546                 dst->tb_period = 1;
 547         } else {
 548                 double tb_rate = (double) src->tb_rate
 549                                 / (double) rate;
 550                 double d = RTE_SCHED_TB_RATE_CONFIG_ERR;
 551
 552                 rte_approx(tb_rate, d,
 553                         &dst->tb_credits_per_period, &dst->tb_period);
 554         }
 555
 556         dst->tb_size = src->tb_size;
 557
 558         /* Traffic Classes */
 559         dst->tc_period = rte_sched_time_ms_to_bytes(src->tc_period,
 560                                                 rate);
 561
 562         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++)
 563                 dst->tc_credits_per_period[i]
 564                         = rte_sched_time_ms_to_bytes(src->tc_period,
 565                                 src->tc_rate[i]);
 566
 567 #ifdef RTE_SCHED_SUBPORT_TC_OV
 568         dst->tc_ov_weight = src->tc_ov_weight;
 569 #endif
 570
 571         /* WRR */
 572         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
 573                 uint32_t wrr_cost[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
 574                 uint32_t lcd, lcd1, lcd2;
 575                 uint32_t qindex;
 576
 577                 qindex = i * RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS;
 578
 579                 wrr_cost[0] = src->wrr_weights[qindex];
 580                 wrr_cost[1] = src->wrr_weights[qindex + 1];
 581                 wrr_cost[2] = src->wrr_weights[qindex + 2];
 582                 wrr_cost[3] = src->wrr_weights[qindex + 3];
 583
 584                 lcd1 = rte_get_lcd(wrr_cost[0], wrr_cost[1]);
 585                 lcd2 = rte_get_lcd(wrr_cost[2], wrr_cost[3]);
 586                 lcd = rte_get_lcd(lcd1, lcd2);
 587
 588                 wrr_cost[0] = lcd / wrr_cost[0];
 589                 wrr_cost[1] = lcd / wrr_cost[1];
 590                 wrr_cost[2] = lcd / wrr_cost[2];
 591                 wrr_cost[3] = lcd / wrr_cost[3];
 592
 593                 dst->wrr_cost[qindex] = (uint8_t) wrr_cost[0];
 594                 dst->wrr_cost[qindex + 1] = (uint8_t) wrr_cost[1];
 595                 dst->wrr_cost[qindex + 2] = (uint8_t) wrr_cost[2];
 596                 dst->wrr_cost[qindex + 3] = (uint8_t) wrr_cost[3];
 597         }
 598 }
 599
 600 static void
 601 rte_sched_port_config_pipe_profile_table(struct rte_sched_port *port,
 602         struct rte_sched_port_params *params)
 603 {
 604         uint32_t i;
 605
 606         for (i = 0; i < port->n_pipe_profiles; i++) {
 607                 struct rte_sched_pipe_params *src = params->pipe_profiles + i;
 608                 struct rte_sched_pipe_profile *dst = port->pipe_profiles + i;
 609
 610                 rte_sched_pipe_profile_convert(src, dst, params->rate);
 611                 rte_sched_port_log_pipe_profile(port, i);
 612         }
 613
 614         port->pipe_tc3_rate_max = 0;
 615         for (i = 0; i < port->n_pipe_profiles; i++) {
 616                 struct rte_sched_pipe_params *src = params->pipe_profiles + i;
 617                 uint32_t pipe_tc3_rate = src->tc_rate[3];
 618
 619                 if (port->pipe_tc3_rate_max < pipe_tc3_rate)
 620                         port->pipe_tc3_rate_max = pipe_tc3_rate;
 621         }
 622 }
 623
 624 struct rte_sched_port *
 625 rte_sched_port_config(struct rte_sched_port_params *params)
 626 {
 627         struct rte_sched_port *port = NULL;
 628         uint32_t mem_size, bmp_mem_size, n_queues_per_port, i, cycles_per_byte;
 629
 630         /* Check user parameters. Determine the amount of memory to allocate */
 631         mem_size = rte_sched_port_get_memory_footprint(params);
 632         if (mem_size == 0)
 633                 return NULL;
 634
 635         /* Allocate memory to store the data structures */
 636         port = rte_zmalloc_socket("qos_params", mem_size, RTE_CACHE_LINE_SIZE,
 637                 params->socket);
 638         if (port == NULL)
 639                 return NULL;
 640
 641         /* compile time checks */
 642         RTE_BUILD_BUG_ON(RTE_SCHED_PORT_N_GRINDERS == 0);
 643         RTE_BUILD_BUG_ON(RTE_SCHED_PORT_N_GRINDERS & (RTE_SCHED_PORT_N_GRINDERS - 1));
 644
 645         /* User parameters */
 646         port->n_subports_per_port = params->n_subports_per_port;
 647         port->n_pipes_per_subport = params->n_pipes_per_subport;
 648         port->rate = params->rate;
 649         port->mtu = params->mtu + params->frame_overhead;
 650         port->frame_overhead = params->frame_overhead;
 651         memcpy(port->qsize, params->qsize, sizeof(params->qsize));
 652         port->n_pipe_profiles = params->n_pipe_profiles;
 653
 654 #ifdef RTE_SCHED_RED
 655         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
 656                 uint32_t j;
 657
 658                 for (j = 0; j < e_RTE_METER_COLORS; j++) {
 659                         /* if min/max are both zero, then RED is disabled */
 660                         if ((params->red_params[i][j].min_th |
 661                              params->red_params[i][j].max_th) == 0) {
 662                                 continue;
 663                         }
 664
 665                         if (rte_red_config_init(&port->red_config[i][j],
 666                                 params->red_params[i][j].wq_log2,
 667                                 params->red_params[i][j].min_th,
 668                                 params->red_params[i][j].max_th,
 669                                 params->red_params[i][j].maxp_inv) != 0) {
 670                                 return NULL;
 671                         }
 672                 }
 673         }
 674 #endif
 675
 676         /* Timing */
 677         port->time_cpu_cycles = rte_get_tsc_cycles();
 678         port->time_cpu_bytes = 0;
 679         port->time = 0;
 680
 681         cycles_per_byte = (rte_get_tsc_hz() << RTE_SCHED_TIME_SHIFT)
 682                 / params->rate;
 683         port->inv_cycles_per_byte = rte_reciprocal_value(cycles_per_byte);
 684
 685         /* Scheduling loop detection */
 686         port->pipe_loop = RTE_SCHED_PIPE_INVALID;
 687         port->pipe_exhaustion = 0;
 688
 689         /* Grinders */
 690         port->busy_grinders = 0;
 691         port->pkts_out = NULL;
 692         port->n_pkts_out = 0;
 693
 694         /* Queue base calculation */
 695         rte_sched_port_config_qsize(port);
 696
 697         /* Large data structures */
 698         port->subport = (struct rte_sched_subport *)
 699                 (port->memory + rte_sched_port_get_array_base(params,
 700                                                               e_RTE_SCHED_PORT_ARRAY_SUBPORT));
 701         port->pipe = (struct rte_sched_pipe *)
 702                 (port->memory + rte_sched_port_get_array_base(params,
 703                                                               e_RTE_SCHED_PORT_ARRAY_PIPE));
 704         port->queue = (struct rte_sched_queue *)
 705                 (port->memory + rte_sched_port_get_array_base(params,
 706                                                               e_RTE_SCHED_PORT_ARRAY_QUEUE));
 707         port->queue_extra = (struct rte_sched_queue_extra *)
 708                 (port->memory + rte_sched_port_get_array_base(params,
 709                                                               e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA));
 710         port->pipe_profiles = (struct rte_sched_pipe_profile *)
 711                 (port->memory + rte_sched_port_get_array_base(params,
 712                                                               e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES));
 713         port->bmp_array =  port->memory
 714                 + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY);
 715         port->queue_array = (struct rte_mbuf **)
 716                 (port->memory + rte_sched_port_get_array_base(params,
 717                                                               e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY));
 718
 719         /* Pipe profile table */
 720         rte_sched_port_config_pipe_profile_table(port, params);
 721
 722         /* Bitmap */
 723         n_queues_per_port = rte_sched_port_queues_per_port(port);
 724         bmp_mem_size = rte_bitmap_get_memory_footprint(n_queues_per_port);
 725         port->bmp = rte_bitmap_init(n_queues_per_port, port->bmp_array,
 726                                     bmp_mem_size);
 727         if (port->bmp == NULL) {
 728                 RTE_LOG(ERR, SCHED, "Bitmap init error\n");
 729                 return NULL;
 730         }
 731
 732         for (i = 0; i < RTE_SCHED_PORT_N_GRINDERS; i++)
 733                 port->grinder_base_bmp_pos[i] = RTE_SCHED_PIPE_INVALID;
 734
 735
 736         return port;
 737 }
 738
 739 void
 740 rte_sched_port_free(struct rte_sched_port *port)
 741 {
 742         uint32_t qindex;
 743         uint32_t n_queues_per_port;
 744
 745         /* Check user parameters */
 746         if (port == NULL)
 747                 return;
 748
 749         n_queues_per_port = rte_sched_port_queues_per_port(port);
 750
 751         /* Free enqueued mbufs */
 752         for (qindex = 0; qindex < n_queues_per_port; qindex++) {
 753                 struct rte_mbuf **mbufs = rte_sched_port_qbase(port, qindex);
 754                 uint16_t qsize = rte_sched_port_qsize(port, qindex);
 755                 struct rte_sched_queue *queue = port->queue + qindex;
 756                 uint16_t qr = queue->qr & (qsize - 1);
 757                 uint16_t qw = queue->qw & (qsize - 1);
 758
 759                 for (; qr != qw; qr = (qr + 1) & (qsize - 1))
 760                         rte_pktmbuf_free(mbufs[qr]);
 761         }
 762
 763         rte_bitmap_free(port->bmp);
 764         rte_free(port);
 765 }
 766
 767 static void
 768 rte_sched_port_log_subport_config(struct rte_sched_port *port, uint32_t i)
 769 {
 770         struct rte_sched_subport *s = port->subport + i;
 771
 772         RTE_LOG(DEBUG, SCHED, "Low level config for subport %u:\n"
 773                 "    Token bucket: period = %u, credits per period = %u, size = %u\n"
 774                 "    Traffic classes: period = %u, credits per period = [%u, %u, %u, %u]\n"
 775                 "    Traffic class 3 oversubscription: wm min = %u, wm max = %u\n",
 776                 i,
 777
 778                 /* Token bucket */
 779                 s->tb_period,
 780                 s->tb_credits_per_period,
 781                 s->tb_size,
 782
 783                 /* Traffic classes */
 784                 s->tc_period,
 785                 s->tc_credits_per_period[0],
 786                 s->tc_credits_per_period[1],
 787                 s->tc_credits_per_period[2],
 788                 s->tc_credits_per_period[3],
 789
 790                 /* Traffic class 3 oversubscription */
 791                 s->tc_ov_wm_min,
 792                 s->tc_ov_wm_max);
 793 }
 794
 795 int
 796 rte_sched_subport_config(struct rte_sched_port *port,
 797         uint32_t subport_id,
 798         struct rte_sched_subport_params *params)
 799 {
 800         struct rte_sched_subport *s;
 801         uint32_t i;
 802
 803         /* Check user parameters */
 804         if (port == NULL ||
 805             subport_id >= port->n_subports_per_port ||
 806             params == NULL)
 807                 return -1;
 808
 809         if (params->tb_rate == 0 || params->tb_rate > port->rate)
 810                 return -2;
 811
 812         if (params->tb_size == 0)
 813                 return -3;
 814
 815         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
 816                 if (params->tc_rate[i] == 0 ||
 817                     params->tc_rate[i] > params->tb_rate)
 818                         return -4;
 819         }
 820
 821         if (params->tc_period == 0)
 822                 return -5;
 823
 824         s = port->subport + subport_id;
 825
 826         /* Token Bucket (TB) */
 827         if (params->tb_rate == port->rate) {
 828                 s->tb_credits_per_period = 1;
 829                 s->tb_period = 1;
 830         } else {
 831                 double tb_rate = ((double) params->tb_rate) / ((double) port->rate);
 832                 double d = RTE_SCHED_TB_RATE_CONFIG_ERR;
 833
 834                 rte_approx(tb_rate, d, &s->tb_credits_per_period, &s->tb_period);
 835         }
 836
 837         s->tb_size = params->tb_size;
 838         s->tb_time = port->time;
 839         s->tb_credits = s->tb_size / 2;
 840
 841         /* Traffic Classes (TCs) */
 842         s->tc_period = rte_sched_time_ms_to_bytes(params->tc_period, port->rate);
 843         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
 844                 s->tc_credits_per_period[i]
 845                         = rte_sched_time_ms_to_bytes(params->tc_period,
 846                                                      params->tc_rate[i]);
 847         }
 848         s->tc_time = port->time + s->tc_period;
 849         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++)
 850                 s->tc_credits[i] = s->tc_credits_per_period[i];
 851
 852 #ifdef RTE_SCHED_SUBPORT_TC_OV
 853         /* TC oversubscription */
 854         s->tc_ov_wm_min = port->mtu;
 855         s->tc_ov_wm_max = rte_sched_time_ms_to_bytes(params->tc_period,
 856                                                      port->pipe_tc3_rate_max);
 857         s->tc_ov_wm = s->tc_ov_wm_max;
 858         s->tc_ov_period_id = 0;
 859         s->tc_ov = 0;
 860         s->tc_ov_n = 0;
 861         s->tc_ov_rate = 0;
 862 #endif
 863
 864         rte_sched_port_log_subport_config(port, subport_id);
 865
 866         return 0;
 867 }
 868
 869 int
 870 rte_sched_pipe_config(struct rte_sched_port *port,
 871         uint32_t subport_id,
 872         uint32_t pipe_id,
 873         int32_t pipe_profile)
 874 {
 875         struct rte_sched_subport *s;
 876         struct rte_sched_pipe *p;
 877         struct rte_sched_pipe_profile *params;
 878         uint32_t deactivate, profile, i;
 879
 880         /* Check user parameters */
 881         profile = (uint32_t) pipe_profile;
 882         deactivate = (pipe_profile < 0);
 883
 884         if (port == NULL ||
 885             subport_id >= port->n_subports_per_port ||
 886             pipe_id >= port->n_pipes_per_subport ||
 887             (!deactivate && profile >= port->n_pipe_profiles))
 888                 return -1;
 889
 890
 891         /* Check that subport configuration is valid */
 892         s = port->subport + subport_id;
 893         if (s->tb_period == 0)
 894                 return -2;
 895
 896         p = port->pipe + (subport_id * port->n_pipes_per_subport + pipe_id);
 897
 898         /* Handle the case when pipe already has a valid configuration */
 899         if (p->tb_time) {
 900                 params = port->pipe_profiles + p->profile;
 901
 902 #ifdef RTE_SCHED_SUBPORT_TC_OV
 903                 double subport_tc3_rate = (double) s->tc_credits_per_period[3]
 904                         / (double) s->tc_period;
 905                 double pipe_tc3_rate = (double) params->tc_credits_per_period[3]
 906                         / (double) params->tc_period;
 907                 uint32_t tc3_ov = s->tc_ov;
 908
 909                 /* Unplug pipe from its subport */
 910                 s->tc_ov_n -= params->tc_ov_weight;
 911                 s->tc_ov_rate -= pipe_tc3_rate;
 912                 s->tc_ov = s->tc_ov_rate > subport_tc3_rate;
 913
 914                 if (s->tc_ov != tc3_ov) {
 915                         RTE_LOG(DEBUG, SCHED,
 916                                 "Subport %u TC3 oversubscription is OFF (%.4lf >= %.4lf)\n",
 917                                 subport_id, subport_tc3_rate, s->tc_ov_rate);
 918                 }
 919 #endif
 920
 921                 /* Reset the pipe */
 922                 memset(p, 0, sizeof(struct rte_sched_pipe));
 923         }
 924
 925         if (deactivate)
 926                 return 0;
 927
 928         /* Apply the new pipe configuration */
 929         p->profile = profile;
 930         params = port->pipe_profiles + p->profile;
 931
 932         /* Token Bucket (TB) */
 933         p->tb_time = port->time;
 934         p->tb_credits = params->tb_size / 2;
 935
 936         /* Traffic Classes (TCs) */
 937         p->tc_time = port->time + params->tc_period;
 938         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++)
 939                 p->tc_credits[i] = params->tc_credits_per_period[i];
 940
 941 #ifdef RTE_SCHED_SUBPORT_TC_OV
 942         {
 943                 /* Subport TC3 oversubscription */
 944                 double subport_tc3_rate = (double) s->tc_credits_per_period[3]
 945                         / (double) s->tc_period;
 946                 double pipe_tc3_rate = (double) params->tc_credits_per_period[3]
 947                         / (double) params->tc_period;
 948                 uint32_t tc3_ov = s->tc_ov;
 949
 950                 s->tc_ov_n += params->tc_ov_weight;
 951                 s->tc_ov_rate += pipe_tc3_rate;
 952                 s->tc_ov = s->tc_ov_rate > subport_tc3_rate;
 953
 954                 if (s->tc_ov != tc3_ov) {
 955                         RTE_LOG(DEBUG, SCHED,
 956                                 "Subport %u TC3 oversubscription is ON (%.4lf < %.4lf)\n",
 957                                 subport_id, subport_tc3_rate, s->tc_ov_rate);
 958                 }
 959                 p->tc_ov_period_id = s->tc_ov_period_id;
 960                 p->tc_ov_credits = s->tc_ov_wm;
 961         }
 962 #endif
 963
 964         return 0;
 965 }
 966
 967 int __rte_experimental
 968 rte_sched_port_pipe_profile_add(struct rte_sched_port *port,
 969         struct rte_sched_pipe_params *params,
 970         uint32_t *pipe_profile_id)
 971 {
 972         struct rte_sched_pipe_profile *pp;
 973         uint32_t i;
 974         int status;
 975
 976         /* Port */
 977         if (port == NULL)
 978                 return -1;
 979
 980         /* Pipe profiles not exceeds the max limit */
 981         if (port->n_pipe_profiles >= RTE_SCHED_PIPE_PROFILES_PER_PORT)
 982                 return -2;
 983
 984         /* Pipe params */
 985         status = pipe_profile_check(params, port->rate);
 986         if (status != 0)
 987                 return status;
 988
 989         pp = &port->pipe_profiles[port->n_pipe_profiles];
 990         rte_sched_pipe_profile_convert(params, pp, port->rate);
 991
 992         /* Pipe profile not exists */
 993         for (i = 0; i < port->n_pipe_profiles; i++)
 994                 if (memcmp(port->pipe_profiles + i, pp, sizeof(*pp)) == 0)
 995                         return -3;
 996
 997         /* Pipe profile commit */
 998         *pipe_profile_id = port->n_pipe_profiles;
 999         port->n_pipe_profiles++;
1000
1001         if (port->pipe_tc3_rate_max < params->tc_rate[3])
1002                 port->pipe_tc3_rate_max = params->tc_rate[3];
1003
1004         rte_sched_port_log_pipe_profile(port, *pipe_profile_id);
1005
1006         return 0;
1007 }
1008
1009 void
1010 rte_sched_port_pkt_write(struct rte_mbuf *pkt,
1011                          uint32_t subport, uint32_t pipe, uint32_t traffic_class,
1012                          uint32_t queue, enum rte_meter_color color)
1013 {
1014         struct rte_sched_port_hierarchy *sched
1015                 = (struct rte_sched_port_hierarchy *) &pkt->hash.sched;
1016
1017         RTE_BUILD_BUG_ON(sizeof(*sched) > sizeof(pkt->hash.sched));
1018
1019         sched->color = (uint32_t) color;
1020         sched->subport = subport;
1021         sched->pipe = pipe;
1022         sched->traffic_class = traffic_class;
1023         sched->queue = queue;
1024 }
1025
1026 void
1027 rte_sched_port_pkt_read_tree_path(const struct rte_mbuf *pkt,
1028                                   uint32_t *subport, uint32_t *pipe,
1029                                   uint32_t *traffic_class, uint32_t *queue)
1030 {
1031         const struct rte_sched_port_hierarchy *sched
1032                 = (const struct rte_sched_port_hierarchy *) &pkt->hash.sched;
1033
1034         *subport = sched->subport;
1035         *pipe = sched->pipe;
1036         *traffic_class = sched->traffic_class;
1037         *queue = sched->queue;
1038 }
1039
1040 enum rte_meter_color
1041 rte_sched_port_pkt_read_color(const struct rte_mbuf *pkt)
1042 {
1043         const struct rte_sched_port_hierarchy *sched
1044                 = (const struct rte_sched_port_hierarchy *) &pkt->hash.sched;
1045
1046         return (enum rte_meter_color) sched->color;
1047 }
1048
1049 int
1050 rte_sched_subport_read_stats(struct rte_sched_port *port,
1051                              uint32_t subport_id,
1052                              struct rte_sched_subport_stats *stats,
1053                              uint32_t *tc_ov)
1054 {
1055         struct rte_sched_subport *s;
1056
1057         /* Check user parameters */
1058         if (port == NULL || subport_id >= port->n_subports_per_port ||
1059             stats == NULL || tc_ov == NULL)
1060                 return -1;
1061
1062         s = port->subport + subport_id;
1063
1064         /* Copy subport stats and clear */
1065         memcpy(stats, &s->stats, sizeof(struct rte_sched_subport_stats));
1066         memset(&s->stats, 0, sizeof(struct rte_sched_subport_stats));
1067
1068         /* Subport TC oversubscription status */
1069         *tc_ov = s->tc_ov;
1070
1071         return 0;
1072 }
1073
1074 int
1075 rte_sched_queue_read_stats(struct rte_sched_port *port,
1076         uint32_t queue_id,
1077         struct rte_sched_queue_stats *stats,
1078         uint16_t *qlen)
1079 {
1080         struct rte_sched_queue *q;
1081         struct rte_sched_queue_extra *qe;
1082
1083         /* Check user parameters */
1084         if ((port == NULL) ||
1085             (queue_id >= rte_sched_port_queues_per_port(port)) ||
1086                 (stats == NULL) ||
1087                 (qlen == NULL)) {
1088                 return -1;
1089         }
1090         q = port->queue + queue_id;
1091         qe = port->queue_extra + queue_id;
1092
1093         /* Copy queue stats and clear */
1094         memcpy(stats, &qe->stats, sizeof(struct rte_sched_queue_stats));
1095         memset(&qe->stats, 0, sizeof(struct rte_sched_queue_stats));
1096
1097         /* Queue length */
1098         *qlen = q->qw - q->qr;
1099
1100         return 0;
1101 }
1102
1103 static inline uint32_t
1104 rte_sched_port_qindex(struct rte_sched_port *port, uint32_t subport, uint32_t pipe, uint32_t traffic_class, uint32_t queue)
1105 {
1106         uint32_t result;
1107
1108         result = subport * port->n_pipes_per_subport + pipe;
1109         result = result * RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE + traffic_class;
1110         result = result * RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS + queue;
1111
1112         return result;
1113 }
1114
1115 #ifdef RTE_SCHED_DEBUG
1116
1117 static inline int
1118 rte_sched_port_queue_is_empty(struct rte_sched_port *port, uint32_t qindex)
1119 {
1120         struct rte_sched_queue *queue = port->queue + qindex;
1121
1122         return queue->qr == queue->qw;
1123 }
1124
1125 #endif /* RTE_SCHED_DEBUG */
1126
1127 #ifdef RTE_SCHED_COLLECT_STATS
1128
1129 static inline void
1130 rte_sched_port_update_subport_stats(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1131 {
1132         struct rte_sched_subport *s = port->subport + (qindex / rte_sched_port_queues_per_subport(port));
1133         uint32_t tc_index = (qindex >> 2) & 0x3;
1134         uint32_t pkt_len = pkt->pkt_len;
1135
1136         s->stats.n_pkts_tc[tc_index] += 1;
1137         s->stats.n_bytes_tc[tc_index] += pkt_len;
1138 }
1139
1140 #ifdef RTE_SCHED_RED
1141 static inline void
1142 rte_sched_port_update_subport_stats_on_drop(struct rte_sched_port *port,
1143                                                 uint32_t qindex,
1144                                                 struct rte_mbuf *pkt, uint32_t red)
1145 #else
1146 static inline void
1147 rte_sched_port_update_subport_stats_on_drop(struct rte_sched_port *port,
1148                                                 uint32_t qindex,
1149                                                 struct rte_mbuf *pkt, __rte_unused uint32_t red)
1150 #endif
1151 {
1152         struct rte_sched_subport *s = port->subport + (qindex / rte_sched_port_queues_per_subport(port));
1153         uint32_t tc_index = (qindex >> 2) & 0x3;
1154         uint32_t pkt_len = pkt->pkt_len;
1155
1156         s->stats.n_pkts_tc_dropped[tc_index] += 1;
1157         s->stats.n_bytes_tc_dropped[tc_index] += pkt_len;
1158 #ifdef RTE_SCHED_RED
1159         s->stats.n_pkts_red_dropped[tc_index] += red;
1160 #endif
1161 }
1162
1163 static inline void
1164 rte_sched_port_update_queue_stats(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1165 {
1166         struct rte_sched_queue_extra *qe = port->queue_extra + qindex;
1167         uint32_t pkt_len = pkt->pkt_len;
1168
1169         qe->stats.n_pkts += 1;
1170         qe->stats.n_bytes += pkt_len;
1171 }
1172
1173 #ifdef RTE_SCHED_RED
1174 static inline void
1175 rte_sched_port_update_queue_stats_on_drop(struct rte_sched_port *port,
1176                                                 uint32_t qindex,
1177                                                 struct rte_mbuf *pkt, uint32_t red)
1178 #else
1179 static inline void
1180 rte_sched_port_update_queue_stats_on_drop(struct rte_sched_port *port,
1181                                                 uint32_t qindex,
1182                                                 struct rte_mbuf *pkt, __rte_unused uint32_t red)
1183 #endif
1184 {
1185         struct rte_sched_queue_extra *qe = port->queue_extra + qindex;
1186         uint32_t pkt_len = pkt->pkt_len;
1187
1188         qe->stats.n_pkts_dropped += 1;
1189         qe->stats.n_bytes_dropped += pkt_len;
1190 #ifdef RTE_SCHED_RED
1191         qe->stats.n_pkts_red_dropped += red;
1192 #endif
1193 }
1194
1195 #endif /* RTE_SCHED_COLLECT_STATS */
1196
1197 #ifdef RTE_SCHED_RED
1198
1199 static inline int
1200 rte_sched_port_red_drop(struct rte_sched_port *port, struct rte_mbuf *pkt, uint32_t qindex, uint16_t qlen)
1201 {
1202         struct rte_sched_queue_extra *qe;
1203         struct rte_red_config *red_cfg;
1204         struct rte_red *red;
1205         uint32_t tc_index;
1206         enum rte_meter_color color;
1207
1208         tc_index = (qindex >> 2) & 0x3;
1209         color = rte_sched_port_pkt_read_color(pkt);
1210         red_cfg = &port->red_config[tc_index][color];
1211
1212         if ((red_cfg->min_th | red_cfg->max_th) == 0)
1213                 return 0;
1214
1215         qe = port->queue_extra + qindex;
1216         red = &qe->red;
1217
1218         return rte_red_enqueue(red_cfg, red, qlen, port->time);
1219 }
1220
1221 static inline void
1222 rte_sched_port_set_queue_empty_timestamp(struct rte_sched_port *port, uint32_t qindex)
1223 {
1224         struct rte_sched_queue_extra *qe = port->queue_extra + qindex;
1225         struct rte_red *red = &qe->red;
1226
1227         rte_red_mark_queue_empty(red, port->time);
1228 }
1229
1230 #else
1231
1232 #define rte_sched_port_red_drop(port, pkt, qindex, qlen)             0
1233
1234 #define rte_sched_port_set_queue_empty_timestamp(port, qindex)
1235
1236 #endif /* RTE_SCHED_RED */
1237
1238 #ifdef RTE_SCHED_DEBUG
1239
1240 static inline void
1241 debug_check_queue_slab(struct rte_sched_port *port, uint32_t bmp_pos,
1242                        uint64_t bmp_slab)
1243 {
1244         uint64_t mask;
1245         uint32_t i, panic;
1246
1247         if (bmp_slab == 0)
1248                 rte_panic("Empty slab at position %u\n", bmp_pos);
1249
1250         panic = 0;
1251         for (i = 0, mask = 1; i < 64; i++, mask <<= 1) {
1252                 if (mask & bmp_slab) {
1253                         if (rte_sched_port_queue_is_empty(port, bmp_pos + i)) {
1254                                 printf("Queue %u (slab offset %u) is empty\n", bmp_pos + i, i);
1255                                 panic = 1;
1256                         }
1257                 }
1258         }
1259
1260         if (panic)
1261                 rte_panic("Empty queues in slab 0x%" PRIx64 "starting at position %u\n",
1262                         bmp_slab, bmp_pos);
1263 }
1264
1265 #endif /* RTE_SCHED_DEBUG */
1266
1267 static inline uint32_t
1268 rte_sched_port_enqueue_qptrs_prefetch0(struct rte_sched_port *port,
1269                                        struct rte_mbuf *pkt)
1270 {
1271         struct rte_sched_queue *q;
1272 #ifdef RTE_SCHED_COLLECT_STATS
1273         struct rte_sched_queue_extra *qe;
1274 #endif
1275         uint32_t subport, pipe, traffic_class, queue, qindex;
1276
1277         rte_sched_port_pkt_read_tree_path(pkt, &subport, &pipe, &traffic_class, &queue);
1278
1279         qindex = rte_sched_port_qindex(port, subport, pipe, traffic_class, queue);
1280         q = port->queue + qindex;
1281         rte_prefetch0(q);
1282 #ifdef RTE_SCHED_COLLECT_STATS
1283         qe = port->queue_extra + qindex;
1284         rte_prefetch0(qe);
1285 #endif
1286
1287         return qindex;
1288 }
1289
1290 static inline void
1291 rte_sched_port_enqueue_qwa_prefetch0(struct rte_sched_port *port,
1292                                      uint32_t qindex, struct rte_mbuf **qbase)
1293 {
1294         struct rte_sched_queue *q;
1295         struct rte_mbuf **q_qw;
1296         uint16_t qsize;
1297
1298         q = port->queue + qindex;
1299         qsize = rte_sched_port_qsize(port, qindex);
1300         q_qw = qbase + (q->qw & (qsize - 1));
1301
1302         rte_prefetch0(q_qw);
1303         rte_bitmap_prefetch0(port->bmp, qindex);
1304 }
1305
1306 static inline int
1307 rte_sched_port_enqueue_qwa(struct rte_sched_port *port, uint32_t qindex,
1308                            struct rte_mbuf **qbase, struct rte_mbuf *pkt)
1309 {
1310         struct rte_sched_queue *q;
1311         uint16_t qsize;
1312         uint16_t qlen;
1313
1314         q = port->queue + qindex;
1315         qsize = rte_sched_port_qsize(port, qindex);
1316         qlen = q->qw - q->qr;
1317
1318         /* Drop the packet (and update drop stats) when queue is full */
1319         if (unlikely(rte_sched_port_red_drop(port, pkt, qindex, qlen) ||
1320                      (qlen >= qsize))) {
1321                 rte_pktmbuf_free(pkt);
1322 #ifdef RTE_SCHED_COLLECT_STATS
1323                 rte_sched_port_update_subport_stats_on_drop(port, qindex, pkt,
1324                                                             qlen < qsize);
1325                 rte_sched_port_update_queue_stats_on_drop(port, qindex, pkt,
1326                                                           qlen < qsize);
1327 #endif
1328                 return 0;
1329         }
1330
1331         /* Enqueue packet */
1332         qbase[q->qw & (qsize - 1)] = pkt;
1333         q->qw++;
1334
1335         /* Activate queue in the port bitmap */
1336         rte_bitmap_set(port->bmp, qindex);
1337
1338         /* Statistics */
1339 #ifdef RTE_SCHED_COLLECT_STATS
1340         rte_sched_port_update_subport_stats(port, qindex, pkt);
1341         rte_sched_port_update_queue_stats(port, qindex, pkt);
1342 #endif
1343
1344         return 1;
1345 }
1346
1347
1348 /*
1349  * The enqueue function implements a 4-level pipeline with each stage
1350  * processing two different packets. The purpose of using a pipeline
1351  * is to hide the latency of prefetching the data structures. The
1352  * naming convention is presented in the diagram below:
1353  *
1354  *   p00  _______   p10  _______   p20  _______   p30  _______
1355  * ----->|       |----->|       |----->|       |----->|       |----->
1356  *       |   0   |      |   1   |      |   2   |      |   3   |
1357  * ----->|_______|----->|_______|----->|_______|----->|_______|----->
1358  *   p01            p11            p21            p31
1359  *
1360  */
1361 int
1362 rte_sched_port_enqueue(struct rte_sched_port *port, struct rte_mbuf **pkts,
1363                        uint32_t n_pkts)
1364 {
1365         struct rte_mbuf *pkt00, *pkt01, *pkt10, *pkt11, *pkt20, *pkt21,
1366                 *pkt30, *pkt31, *pkt_last;
1367         struct rte_mbuf **q00_base, **q01_base, **q10_base, **q11_base,
1368                 **q20_base, **q21_base, **q30_base, **q31_base, **q_last_base;
1369         uint32_t q00, q01, q10, q11, q20, q21, q30, q31, q_last;
1370         uint32_t r00, r01, r10, r11, r20, r21, r30, r31, r_last;
1371         uint32_t result, i;
1372
1373         result = 0;
1374
1375         /*
1376          * Less then 6 input packets available, which is not enough to
1377          * feed the pipeline
1378          */
1379         if (unlikely(n_pkts < 6)) {
1380                 struct rte_mbuf **q_base[5];
1381                 uint32_t q[5];
1382
1383                 /* Prefetch the mbuf structure of each packet */
1384                 for (i = 0; i < n_pkts; i++)
1385                         rte_prefetch0(pkts[i]);
1386
1387                 /* Prefetch the queue structure for each queue */
1388                 for (i = 0; i < n_pkts; i++)
1389                         q[i] = rte_sched_port_enqueue_qptrs_prefetch0(port,
1390                                                                       pkts[i]);
1391
1392                 /* Prefetch the write pointer location of each queue */
1393                 for (i = 0; i < n_pkts; i++) {
1394                         q_base[i] = rte_sched_port_qbase(port, q[i]);
1395                         rte_sched_port_enqueue_qwa_prefetch0(port, q[i],
1396                                                              q_base[i]);
1397                 }
1398
1399                 /* Write each packet to its queue */
1400                 for (i = 0; i < n_pkts; i++)
1401                         result += rte_sched_port_enqueue_qwa(port, q[i],
1402                                                              q_base[i], pkts[i]);
1403
1404                 return result;
1405         }
1406
1407         /* Feed the first 3 stages of the pipeline (6 packets needed) */
1408         pkt20 = pkts[0];
1409         pkt21 = pkts[1];
1410         rte_prefetch0(pkt20);
1411         rte_prefetch0(pkt21);
1412
1413         pkt10 = pkts[2];
1414         pkt11 = pkts[3];
1415         rte_prefetch0(pkt10);
1416         rte_prefetch0(pkt11);
1417
1418         q20 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt20);
1419         q21 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt21);
1420
1421         pkt00 = pkts[4];
1422         pkt01 = pkts[5];
1423         rte_prefetch0(pkt00);
1424         rte_prefetch0(pkt01);
1425
1426         q10 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt10);
1427         q11 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt11);
1428
1429         q20_base = rte_sched_port_qbase(port, q20);
1430         q21_base = rte_sched_port_qbase(port, q21);
1431         rte_sched_port_enqueue_qwa_prefetch0(port, q20, q20_base);
1432         rte_sched_port_enqueue_qwa_prefetch0(port, q21, q21_base);
1433
1434         /* Run the pipeline */
1435         for (i = 6; i < (n_pkts & (~1)); i += 2) {
1436                 /* Propagate stage inputs */
1437                 pkt30 = pkt20;
1438                 pkt31 = pkt21;
1439                 pkt20 = pkt10;
1440                 pkt21 = pkt11;
1441                 pkt10 = pkt00;
1442                 pkt11 = pkt01;
1443                 q30 = q20;
1444                 q31 = q21;
1445                 q20 = q10;
1446                 q21 = q11;
1447                 q30_base = q20_base;
1448                 q31_base = q21_base;
1449
1450                 /* Stage 0: Get packets in */
1451                 pkt00 = pkts[i];
1452                 pkt01 = pkts[i + 1];
1453                 rte_prefetch0(pkt00);
1454                 rte_prefetch0(pkt01);
1455
1456                 /* Stage 1: Prefetch queue structure storing queue pointers */
1457                 q10 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt10);
1458                 q11 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt11);
1459
1460                 /* Stage 2: Prefetch queue write location */
1461                 q20_base = rte_sched_port_qbase(port, q20);
1462                 q21_base = rte_sched_port_qbase(port, q21);
1463                 rte_sched_port_enqueue_qwa_prefetch0(port, q20, q20_base);
1464                 rte_sched_port_enqueue_qwa_prefetch0(port, q21, q21_base);
1465
1466                 /* Stage 3: Write packet to queue and activate queue */
1467                 r30 = rte_sched_port_enqueue_qwa(port, q30, q30_base, pkt30);
1468                 r31 = rte_sched_port_enqueue_qwa(port, q31, q31_base, pkt31);
1469                 result += r30 + r31;
1470         }
1471
1472         /*
1473          * Drain the pipeline (exactly 6 packets).
1474          * Handle the last packet in the case
1475          * of an odd number of input packets.
1476          */
1477         pkt_last = pkts[n_pkts - 1];
1478         rte_prefetch0(pkt_last);
1479
1480         q00 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt00);
1481         q01 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt01);
1482
1483         q10_base = rte_sched_port_qbase(port, q10);
1484         q11_base = rte_sched_port_qbase(port, q11);
1485         rte_sched_port_enqueue_qwa_prefetch0(port, q10, q10_base);
1486         rte_sched_port_enqueue_qwa_prefetch0(port, q11, q11_base);
1487
1488         r20 = rte_sched_port_enqueue_qwa(port, q20, q20_base, pkt20);
1489         r21 = rte_sched_port_enqueue_qwa(port, q21, q21_base, pkt21);
1490         result += r20 + r21;
1491
1492         q_last = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt_last);
1493
1494         q00_base = rte_sched_port_qbase(port, q00);
1495         q01_base = rte_sched_port_qbase(port, q01);
1496         rte_sched_port_enqueue_qwa_prefetch0(port, q00, q00_base);
1497         rte_sched_port_enqueue_qwa_prefetch0(port, q01, q01_base);
1498
1499         r10 = rte_sched_port_enqueue_qwa(port, q10, q10_base, pkt10);
1500         r11 = rte_sched_port_enqueue_qwa(port, q11, q11_base, pkt11);
1501         result += r10 + r11;
1502
1503         q_last_base = rte_sched_port_qbase(port, q_last);
1504         rte_sched_port_enqueue_qwa_prefetch0(port, q_last, q_last_base);
1505
1506         r00 = rte_sched_port_enqueue_qwa(port, q00, q00_base, pkt00);
1507         r01 = rte_sched_port_enqueue_qwa(port, q01, q01_base, pkt01);
1508         result += r00 + r01;
1509
1510         if (n_pkts & 1) {
1511                 r_last = rte_sched_port_enqueue_qwa(port, q_last, q_last_base, pkt_last);
1512                 result += r_last;
1513         }
1514
1515         return result;
1516 }
1517
1518 #ifndef RTE_SCHED_SUBPORT_TC_OV
1519
1520 static inline void
1521 grinder_credits_update(struct rte_sched_port *port, uint32_t pos)
1522 {
1523         struct rte_sched_grinder *grinder = port->grinder + pos;
1524         struct rte_sched_subport *subport = grinder->subport;
1525         struct rte_sched_pipe *pipe = grinder->pipe;
1526         struct rte_sched_pipe_profile *params = grinder->pipe_params;
1527         uint64_t n_periods;
1528
1529         /* Subport TB */
1530         n_periods = (port->time - subport->tb_time) / subport->tb_period;
1531         subport->tb_credits += n_periods * subport->tb_credits_per_period;
1532         subport->tb_credits = rte_sched_min_val_2_u32(subport->tb_credits, subport->tb_size);
1533         subport->tb_time += n_periods * subport->tb_period;
1534
1535         /* Pipe TB */
1536         n_periods = (port->time - pipe->tb_time) / params->tb_period;
1537         pipe->tb_credits += n_periods * params->tb_credits_per_period;
1538         pipe->tb_credits = rte_sched_min_val_2_u32(pipe->tb_credits, params->tb_size);
1539         pipe->tb_time += n_periods * params->tb_period;
1540
1541         /* Subport TCs */
1542         if (unlikely(port->time >= subport->tc_time)) {
1543                 subport->tc_credits[0] = subport->tc_credits_per_period[0];
1544                 subport->tc_credits[1] = subport->tc_credits_per_period[1];
1545                 subport->tc_credits[2] = subport->tc_credits_per_period[2];
1546                 subport->tc_credits[3] = subport->tc_credits_per_period[3];
1547                 subport->tc_time = port->time + subport->tc_period;
1548         }
1549
1550         /* Pipe TCs */
1551         if (unlikely(port->time >= pipe->tc_time)) {
1552                 pipe->tc_credits[0] = params->tc_credits_per_period[0];
1553                 pipe->tc_credits[1] = params->tc_credits_per_period[1];
1554                 pipe->tc_credits[2] = params->tc_credits_per_period[2];
1555                 pipe->tc_credits[3] = params->tc_credits_per_period[3];
1556                 pipe->tc_time = port->time + params->tc_period;
1557         }
1558 }
1559
1560 #else
1561
1562 static inline uint32_t
1563 grinder_tc_ov_credits_update(struct rte_sched_port *port, uint32_t pos)
1564 {
1565         struct rte_sched_grinder *grinder = port->grinder + pos;
1566         struct rte_sched_subport *subport = grinder->subport;
1567         uint32_t tc_ov_consumption[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
1568         uint32_t tc_ov_consumption_max;
1569         uint32_t tc_ov_wm = subport->tc_ov_wm;
1570
1571         if (subport->tc_ov == 0)
1572                 return subport->tc_ov_wm_max;
1573
1574         tc_ov_consumption[0] = subport->tc_credits_per_period[0] - subport->tc_credits[0];
1575         tc_ov_consumption[1] = subport->tc_credits_per_period[1] - subport->tc_credits[1];
1576         tc_ov_consumption[2] = subport->tc_credits_per_period[2] - subport->tc_credits[2];
1577         tc_ov_consumption[3] = subport->tc_credits_per_period[3] - subport->tc_credits[3];
1578
1579         tc_ov_consumption_max = subport->tc_credits_per_period[3] -
1580                 (tc_ov_consumption[0] + tc_ov_consumption[1] + tc_ov_consumption[2]);
1581
1582         if (tc_ov_consumption[3] > (tc_ov_consumption_max - port->mtu)) {
1583                 tc_ov_wm  -= tc_ov_wm >> 7;
1584                 if (tc_ov_wm < subport->tc_ov_wm_min)
1585                         tc_ov_wm = subport->tc_ov_wm_min;
1586
1587                 return tc_ov_wm;
1588         }
1589
1590         tc_ov_wm += (tc_ov_wm >> 7) + 1;
1591         if (tc_ov_wm > subport->tc_ov_wm_max)
1592                 tc_ov_wm = subport->tc_ov_wm_max;
1593
1594         return tc_ov_wm;
1595 }
1596
1597 static inline void
1598 grinder_credits_update(struct rte_sched_port *port, uint32_t pos)
1599 {
1600         struct rte_sched_grinder *grinder = port->grinder + pos;
1601         struct rte_sched_subport *subport = grinder->subport;
1602         struct rte_sched_pipe *pipe = grinder->pipe;
1603         struct rte_sched_pipe_profile *params = grinder->pipe_params;
1604         uint64_t n_periods;
1605
1606         /* Subport TB */
1607         n_periods = (port->time - subport->tb_time) / subport->tb_period;
1608         subport->tb_credits += n_periods * subport->tb_credits_per_period;
1609         subport->tb_credits = rte_sched_min_val_2_u32(subport->tb_credits, subport->tb_size);
1610         subport->tb_time += n_periods * subport->tb_period;
1611
1612         /* Pipe TB */
1613         n_periods = (port->time - pipe->tb_time) / params->tb_period;
1614         pipe->tb_credits += n_periods * params->tb_credits_per_period;
1615         pipe->tb_credits = rte_sched_min_val_2_u32(pipe->tb_credits, params->tb_size);
1616         pipe->tb_time += n_periods * params->tb_period;
1617
1618         /* Subport TCs */
1619         if (unlikely(port->time >= subport->tc_time)) {
1620                 subport->tc_ov_wm = grinder_tc_ov_credits_update(port, pos);
1621
1622                 subport->tc_credits[0] = subport->tc_credits_per_period[0];
1623                 subport->tc_credits[1] = subport->tc_credits_per_period[1];
1624                 subport->tc_credits[2] = subport->tc_credits_per_period[2];
1625                 subport->tc_credits[3] = subport->tc_credits_per_period[3];
1626
1627                 subport->tc_time = port->time + subport->tc_period;
1628                 subport->tc_ov_period_id++;
1629         }
1630
1631         /* Pipe TCs */
1632         if (unlikely(port->time >= pipe->tc_time)) {
1633                 pipe->tc_credits[0] = params->tc_credits_per_period[0];
1634                 pipe->tc_credits[1] = params->tc_credits_per_period[1];
1635                 pipe->tc_credits[2] = params->tc_credits_per_period[2];
1636                 pipe->tc_credits[3] = params->tc_credits_per_period[3];
1637                 pipe->tc_time = port->time + params->tc_period;
1638         }
1639
1640         /* Pipe TCs - Oversubscription */
1641         if (unlikely(pipe->tc_ov_period_id != subport->tc_ov_period_id)) {
1642                 pipe->tc_ov_credits = subport->tc_ov_wm * params->tc_ov_weight;
1643
1644                 pipe->tc_ov_period_id = subport->tc_ov_period_id;
1645         }
1646 }
1647
1648 #endif /* RTE_SCHED_TS_CREDITS_UPDATE, RTE_SCHED_SUBPORT_TC_OV */
1649
1650
1651 #ifndef RTE_SCHED_SUBPORT_TC_OV
1652
1653 static inline int
1654 grinder_credits_check(struct rte_sched_port *port, uint32_t pos)
1655 {
1656         struct rte_sched_grinder *grinder = port->grinder + pos;
1657         struct rte_sched_subport *subport = grinder->subport;
1658         struct rte_sched_pipe *pipe = grinder->pipe;
1659         struct rte_mbuf *pkt = grinder->pkt;
1660         uint32_t tc_index = grinder->tc_index;
1661         uint32_t pkt_len = pkt->pkt_len + port->frame_overhead;
1662         uint32_t subport_tb_credits = subport->tb_credits;
1663         uint32_t subport_tc_credits = subport->tc_credits[tc_index];
1664         uint32_t pipe_tb_credits = pipe->tb_credits;
1665         uint32_t pipe_tc_credits = pipe->tc_credits[tc_index];
1666         int enough_credits;
1667
1668         /* Check queue credits */
1669         enough_credits = (pkt_len <= subport_tb_credits) &&
1670                 (pkt_len <= subport_tc_credits) &&
1671                 (pkt_len <= pipe_tb_credits) &&
1672                 (pkt_len <= pipe_tc_credits);
1673
1674         if (!enough_credits)
1675                 return 0;
1676
1677         /* Update port credits */
1678         subport->tb_credits -= pkt_len;
1679         subport->tc_credits[tc_index] -= pkt_len;
1680         pipe->tb_credits -= pkt_len;
1681         pipe->tc_credits[tc_index] -= pkt_len;
1682
1683         return 1;
1684 }
1685
1686 #else
1687
1688 static inline int
1689 grinder_credits_check(struct rte_sched_port *port, uint32_t pos)
1690 {
1691         struct rte_sched_grinder *grinder = port->grinder + pos;
1692         struct rte_sched_subport *subport = grinder->subport;
1693         struct rte_sched_pipe *pipe = grinder->pipe;
1694         struct rte_mbuf *pkt = grinder->pkt;
1695         uint32_t tc_index = grinder->tc_index;
1696         uint32_t pkt_len = pkt->pkt_len + port->frame_overhead;
1697         uint32_t subport_tb_credits = subport->tb_credits;
1698         uint32_t subport_tc_credits = subport->tc_credits[tc_index];
1699         uint32_t pipe_tb_credits = pipe->tb_credits;
1700         uint32_t pipe_tc_credits = pipe->tc_credits[tc_index];
1701         uint32_t pipe_tc_ov_mask1[] = {UINT32_MAX, UINT32_MAX, UINT32_MAX, pipe->tc_ov_credits};
1702         uint32_t pipe_tc_ov_mask2[] = {0, 0, 0, UINT32_MAX};
1703         uint32_t pipe_tc_ov_credits = pipe_tc_ov_mask1[tc_index];
1704         int enough_credits;
1705
1706         /* Check pipe and subport credits */
1707         enough_credits = (pkt_len <= subport_tb_credits) &&
1708                 (pkt_len <= subport_tc_credits) &&
1709                 (pkt_len <= pipe_tb_credits) &&
1710                 (pkt_len <= pipe_tc_credits) &&
1711                 (pkt_len <= pipe_tc_ov_credits);
1712
1713         if (!enough_credits)
1714                 return 0;
1715
1716         /* Update pipe and subport credits */
1717         subport->tb_credits -= pkt_len;
1718         subport->tc_credits[tc_index] -= pkt_len;
1719         pipe->tb_credits -= pkt_len;
1720         pipe->tc_credits[tc_index] -= pkt_len;
1721         pipe->tc_ov_credits -= pipe_tc_ov_mask2[tc_index] & pkt_len;
1722
1723         return 1;
1724 }
1725
1726 #endif /* RTE_SCHED_SUBPORT_TC_OV */
1727
1728
1729 static inline int
1730 grinder_schedule(struct rte_sched_port *port, uint32_t pos)
1731 {
1732         struct rte_sched_grinder *grinder = port->grinder + pos;
1733         struct rte_sched_queue *queue = grinder->queue[grinder->qpos];
1734         struct rte_mbuf *pkt = grinder->pkt;
1735         uint32_t pkt_len = pkt->pkt_len + port->frame_overhead;
1736
1737         if (!grinder_credits_check(port, pos))
1738                 return 0;
1739
1740         /* Advance port time */
1741         port->time += pkt_len;
1742
1743         /* Send packet */
1744         port->pkts_out[port->n_pkts_out++] = pkt;
1745         queue->qr++;
1746         grinder->wrr_tokens[grinder->qpos] += pkt_len * grinder->wrr_cost[grinder->qpos];
1747         if (queue->qr == queue->qw) {
1748                 uint32_t qindex = grinder->qindex[grinder->qpos];
1749
1750                 rte_bitmap_clear(port->bmp, qindex);
1751                 grinder->qmask &= ~(1 << grinder->qpos);
1752                 grinder->wrr_mask[grinder->qpos] = 0;
1753                 rte_sched_port_set_queue_empty_timestamp(port, qindex);
1754         }
1755
1756         /* Reset pipe loop detection */
1757         port->pipe_loop = RTE_SCHED_PIPE_INVALID;
1758         grinder->productive = 1;
1759
1760         return 1;
1761 }
1762
1763 #ifdef SCHED_VECTOR_SSE4
1764
1765 static inline int
1766 grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe)
1767 {
1768         __m128i index = _mm_set1_epi32(base_pipe);
1769         __m128i pipes = _mm_load_si128((__m128i *)port->grinder_base_bmp_pos);
1770         __m128i res = _mm_cmpeq_epi32(pipes, index);
1771
1772         pipes = _mm_load_si128((__m128i *)(port->grinder_base_bmp_pos + 4));
1773         pipes = _mm_cmpeq_epi32(pipes, index);
1774         res = _mm_or_si128(res, pipes);
1775
1776         if (_mm_testz_si128(res, res))
1777                 return 0;
1778
1779         return 1;
1780 }
1781
1782 #elif defined(SCHED_VECTOR_NEON)
1783
1784 static inline int
1785 grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe)
1786 {
1787         uint32x4_t index, pipes;
1788         uint32_t *pos = (uint32_t *)port->grinder_base_bmp_pos;
1789
1790         index = vmovq_n_u32(base_pipe);
1791         pipes = vld1q_u32(pos);
1792         if (!vminvq_u32(veorq_u32(pipes, index)))
1793                 return 1;
1794
1795         pipes = vld1q_u32(pos + 4);
1796         if (!vminvq_u32(veorq_u32(pipes, index)))
1797                 return 1;
1798
1799         return 0;
1800 }
1801
1802 #else
1803
1804 static inline int
1805 grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe)
1806 {
1807         uint32_t i;
1808
1809         for (i = 0; i < RTE_SCHED_PORT_N_GRINDERS; i++) {
1810                 if (port->grinder_base_bmp_pos[i] == base_pipe)
1811                         return 1;
1812         }
1813
1814         return 0;
1815 }
1816
1817 #endif /* RTE_SCHED_OPTIMIZATIONS */
1818
1819 static inline void
1820 grinder_pcache_populate(struct rte_sched_port *port, uint32_t pos, uint32_t bmp_pos, uint64_t bmp_slab)
1821 {
1822         struct rte_sched_grinder *grinder = port->grinder + pos;
1823         uint16_t w[4];
1824
1825         grinder->pcache_w = 0;
1826         grinder->pcache_r = 0;
1827
1828         w[0] = (uint16_t) bmp_slab;
1829         w[1] = (uint16_t) (bmp_slab >> 16);
1830         w[2] = (uint16_t) (bmp_slab >> 32);
1831         w[3] = (uint16_t) (bmp_slab >> 48);
1832
1833         grinder->pcache_qmask[grinder->pcache_w] = w[0];
1834         grinder->pcache_qindex[grinder->pcache_w] = bmp_pos;
1835         grinder->pcache_w += (w[0] != 0);
1836
1837         grinder->pcache_qmask[grinder->pcache_w] = w[1];
1838         grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 16;
1839         grinder->pcache_w += (w[1] != 0);
1840
1841         grinder->pcache_qmask[grinder->pcache_w] = w[2];
1842         grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 32;
1843         grinder->pcache_w += (w[2] != 0);
1844
1845         grinder->pcache_qmask[grinder->pcache_w] = w[3];
1846         grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 48;
1847         grinder->pcache_w += (w[3] != 0);
1848 }
1849
1850 static inline void
1851 grinder_tccache_populate(struct rte_sched_port *port, uint32_t pos, uint32_t qindex, uint16_t qmask)
1852 {
1853         struct rte_sched_grinder *grinder = port->grinder + pos;
1854         uint8_t b[4];
1855
1856         grinder->tccache_w = 0;
1857         grinder->tccache_r = 0;
1858
1859         b[0] = (uint8_t) (qmask & 0xF);
1860         b[1] = (uint8_t) ((qmask >> 4) & 0xF);
1861         b[2] = (uint8_t) ((qmask >> 8) & 0xF);
1862         b[3] = (uint8_t) ((qmask >> 12) & 0xF);
1863
1864         grinder->tccache_qmask[grinder->tccache_w] = b[0];
1865         grinder->tccache_qindex[grinder->tccache_w] = qindex;
1866         grinder->tccache_w += (b[0] != 0);
1867
1868         grinder->tccache_qmask[grinder->tccache_w] = b[1];
1869         grinder->tccache_qindex[grinder->tccache_w] = qindex + 4;
1870         grinder->tccache_w += (b[1] != 0);
1871
1872         grinder->tccache_qmask[grinder->tccache_w] = b[2];
1873         grinder->tccache_qindex[grinder->tccache_w] = qindex + 8;
1874         grinder->tccache_w += (b[2] != 0);
1875
1876         grinder->tccache_qmask[grinder->tccache_w] = b[3];
1877         grinder->tccache_qindex[grinder->tccache_w] = qindex + 12;
1878         grinder->tccache_w += (b[3] != 0);
1879 }
1880
1881 static inline int
1882 grinder_next_tc(struct rte_sched_port *port, uint32_t pos)
1883 {
1884         struct rte_sched_grinder *grinder = port->grinder + pos;
1885         struct rte_mbuf **qbase;
1886         uint32_t qindex;
1887         uint16_t qsize;
1888
1889         if (grinder->tccache_r == grinder->tccache_w)
1890                 return 0;
1891
1892         qindex = grinder->tccache_qindex[grinder->tccache_r];
1893         qbase = rte_sched_port_qbase(port, qindex);
1894         qsize = rte_sched_port_qsize(port, qindex);
1895
1896         grinder->tc_index = (qindex >> 2) & 0x3;
1897         grinder->qmask = grinder->tccache_qmask[grinder->tccache_r];
1898         grinder->qsize = qsize;
1899
1900         grinder->qindex[0] = qindex;
1901         grinder->qindex[1] = qindex + 1;
1902         grinder->qindex[2] = qindex + 2;
1903         grinder->qindex[3] = qindex + 3;
1904
1905         grinder->queue[0] = port->queue + qindex;
1906         grinder->queue[1] = port->queue + qindex + 1;
1907         grinder->queue[2] = port->queue + qindex + 2;
1908         grinder->queue[3] = port->queue + qindex + 3;
1909
1910         grinder->qbase[0] = qbase;
1911         grinder->qbase[1] = qbase + qsize;
1912         grinder->qbase[2] = qbase + 2 * qsize;
1913         grinder->qbase[3] = qbase + 3 * qsize;
1914
1915         grinder->tccache_r++;
1916         return 1;
1917 }
1918
1919 static inline int
1920 grinder_next_pipe(struct rte_sched_port *port, uint32_t pos)
1921 {
1922         struct rte_sched_grinder *grinder = port->grinder + pos;
1923         uint32_t pipe_qindex;
1924         uint16_t pipe_qmask;
1925
1926         if (grinder->pcache_r < grinder->pcache_w) {
1927                 pipe_qmask = grinder->pcache_qmask[grinder->pcache_r];
1928                 pipe_qindex = grinder->pcache_qindex[grinder->pcache_r];
1929                 grinder->pcache_r++;
1930         } else {
1931                 uint64_t bmp_slab = 0;
1932                 uint32_t bmp_pos = 0;
1933
1934                 /* Get another non-empty pipe group */
1935                 if (unlikely(rte_bitmap_scan(port->bmp, &bmp_pos, &bmp_slab) <= 0))
1936                         return 0;
1937
1938 #ifdef RTE_SCHED_DEBUG
1939                 debug_check_queue_slab(port, bmp_pos, bmp_slab);
1940 #endif
1941
1942                 /* Return if pipe group already in one of the other grinders */
1943                 port->grinder_base_bmp_pos[pos] = RTE_SCHED_BMP_POS_INVALID;
1944                 if (unlikely(grinder_pipe_exists(port, bmp_pos)))
1945                         return 0;
1946
1947                 port->grinder_base_bmp_pos[pos] = bmp_pos;
1948
1949                 /* Install new pipe group into grinder's pipe cache */
1950                 grinder_pcache_populate(port, pos, bmp_pos, bmp_slab);
1951
1952                 pipe_qmask = grinder->pcache_qmask[0];
1953                 pipe_qindex = grinder->pcache_qindex[0];
1954                 grinder->pcache_r = 1;
1955         }
1956
1957         /* Install new pipe in the grinder */
1958         grinder->pindex = pipe_qindex >> 4;
1959         grinder->subport = port->subport + (grinder->pindex / port->n_pipes_per_subport);
1960         grinder->pipe = port->pipe + grinder->pindex;
1961         grinder->pipe_params = NULL; /* to be set after the pipe structure is prefetched */
1962         grinder->productive = 0;
1963
1964         grinder_tccache_populate(port, pos, pipe_qindex, pipe_qmask);
1965         grinder_next_tc(port, pos);
1966
1967         /* Check for pipe exhaustion */
1968         if (grinder->pindex == port->pipe_loop) {
1969                 port->pipe_exhaustion = 1;
1970                 port->pipe_loop = RTE_SCHED_PIPE_INVALID;
1971         }
1972
1973         return 1;
1974 }
1975
1976
1977 static inline void
1978 grinder_wrr_load(struct rte_sched_port *port, uint32_t pos)
1979 {
1980         struct rte_sched_grinder *grinder = port->grinder + pos;
1981         struct rte_sched_pipe *pipe = grinder->pipe;
1982         struct rte_sched_pipe_profile *pipe_params = grinder->pipe_params;
1983         uint32_t tc_index = grinder->tc_index;
1984         uint32_t qmask = grinder->qmask;
1985         uint32_t qindex;
1986
1987         qindex = tc_index * 4;
1988
1989         grinder->wrr_tokens[0] = ((uint16_t) pipe->wrr_tokens[qindex]) << RTE_SCHED_WRR_SHIFT;
1990         grinder->wrr_tokens[1] = ((uint16_t) pipe->wrr_tokens[qindex + 1]) << RTE_SCHED_WRR_SHIFT;
1991         grinder->wrr_tokens[2] = ((uint16_t) pipe->wrr_tokens[qindex + 2]) << RTE_SCHED_WRR_SHIFT;
1992         grinder->wrr_tokens[3] = ((uint16_t) pipe->wrr_tokens[qindex + 3]) << RTE_SCHED_WRR_SHIFT;
1993
1994         grinder->wrr_mask[0] = (qmask & 0x1) * 0xFFFF;
1995         grinder->wrr_mask[1] = ((qmask >> 1) & 0x1) * 0xFFFF;
1996         grinder->wrr_mask[2] = ((qmask >> 2) & 0x1) * 0xFFFF;
1997         grinder->wrr_mask[3] = ((qmask >> 3) & 0x1) * 0xFFFF;
1998
1999         grinder->wrr_cost[0] = pipe_params->wrr_cost[qindex];
2000         grinder->wrr_cost[1] = pipe_params->wrr_cost[qindex + 1];
2001         grinder->wrr_cost[2] = pipe_params->wrr_cost[qindex + 2];
2002         grinder->wrr_cost[3] = pipe_params->wrr_cost[qindex + 3];
2003 }
2004
2005 static inline void
2006 grinder_wrr_store(struct rte_sched_port *port, uint32_t pos)
2007 {
2008         struct rte_sched_grinder *grinder = port->grinder + pos;
2009         struct rte_sched_pipe *pipe = grinder->pipe;
2010         uint32_t tc_index = grinder->tc_index;
2011         uint32_t qindex;
2012
2013         qindex = tc_index * 4;
2014
2015         pipe->wrr_tokens[qindex] = (grinder->wrr_tokens[0] & grinder->wrr_mask[0])
2016                 >> RTE_SCHED_WRR_SHIFT;
2017         pipe->wrr_tokens[qindex + 1] = (grinder->wrr_tokens[1] & grinder->wrr_mask[1])
2018                 >> RTE_SCHED_WRR_SHIFT;
2019         pipe->wrr_tokens[qindex + 2] = (grinder->wrr_tokens[2] & grinder->wrr_mask[2])
2020                 >> RTE_SCHED_WRR_SHIFT;
2021         pipe->wrr_tokens[qindex + 3] = (grinder->wrr_tokens[3] & grinder->wrr_mask[3])
2022                 >> RTE_SCHED_WRR_SHIFT;
2023 }
2024
2025 static inline void
2026 grinder_wrr(struct rte_sched_port *port, uint32_t pos)
2027 {
2028         struct rte_sched_grinder *grinder = port->grinder + pos;
2029         uint16_t wrr_tokens_min;
2030
2031         grinder->wrr_tokens[0] |= ~grinder->wrr_mask[0];
2032         grinder->wrr_tokens[1] |= ~grinder->wrr_mask[1];
2033         grinder->wrr_tokens[2] |= ~grinder->wrr_mask[2];
2034         grinder->wrr_tokens[3] |= ~grinder->wrr_mask[3];
2035
2036         grinder->qpos = rte_min_pos_4_u16(grinder->wrr_tokens);
2037         wrr_tokens_min = grinder->wrr_tokens[grinder->qpos];
2038
2039         grinder->wrr_tokens[0] -= wrr_tokens_min;
2040         grinder->wrr_tokens[1] -= wrr_tokens_min;
2041         grinder->wrr_tokens[2] -= wrr_tokens_min;
2042         grinder->wrr_tokens[3] -= wrr_tokens_min;
2043 }
2044
2045
2046 #define grinder_evict(port, pos)
2047
2048 static inline void
2049 grinder_prefetch_pipe(struct rte_sched_port *port, uint32_t pos)
2050 {
2051         struct rte_sched_grinder *grinder = port->grinder + pos;
2052
2053         rte_prefetch0(grinder->pipe);
2054         rte_prefetch0(grinder->queue[0]);
2055 }
2056
2057 static inline void
2058 grinder_prefetch_tc_queue_arrays(struct rte_sched_port *port, uint32_t pos)
2059 {
2060         struct rte_sched_grinder *grinder = port->grinder + pos;
2061         uint16_t qsize, qr[4];
2062
2063         qsize = grinder->qsize;
2064         qr[0] = grinder->queue[0]->qr & (qsize - 1);
2065         qr[1] = grinder->queue[1]->qr & (qsize - 1);
2066         qr[2] = grinder->queue[2]->qr & (qsize - 1);
2067         qr[3] = grinder->queue[3]->qr & (qsize - 1);
2068
2069         rte_prefetch0(grinder->qbase[0] + qr[0]);
2070         rte_prefetch0(grinder->qbase[1] + qr[1]);
2071
2072         grinder_wrr_load(port, pos);
2073         grinder_wrr(port, pos);
2074
2075         rte_prefetch0(grinder->qbase[2] + qr[2]);
2076         rte_prefetch0(grinder->qbase[3] + qr[3]);
2077 }
2078
2079 static inline void
2080 grinder_prefetch_mbuf(struct rte_sched_port *port, uint32_t pos)
2081 {
2082         struct rte_sched_grinder *grinder = port->grinder + pos;
2083         uint32_t qpos = grinder->qpos;
2084         struct rte_mbuf **qbase = grinder->qbase[qpos];
2085         uint16_t qsize = grinder->qsize;
2086         uint16_t qr = grinder->queue[qpos]->qr & (qsize - 1);
2087
2088         grinder->pkt = qbase[qr];
2089         rte_prefetch0(grinder->pkt);
2090
2091         if (unlikely((qr & 0x7) == 7)) {
2092                 uint16_t qr_next = (grinder->queue[qpos]->qr + 1) & (qsize - 1);
2093
2094                 rte_prefetch0(qbase + qr_next);
2095         }
2096 }
2097
2098 static inline uint32_t
2099 grinder_handle(struct rte_sched_port *port, uint32_t pos)
2100 {
2101         struct rte_sched_grinder *grinder = port->grinder + pos;
2102
2103         switch (grinder->state) {
2104         case e_GRINDER_PREFETCH_PIPE:
2105         {
2106                 if (grinder_next_pipe(port, pos)) {
2107                         grinder_prefetch_pipe(port, pos);
2108                         port->busy_grinders++;
2109
2110                         grinder->state = e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS;
2111                         return 0;
2112                 }
2113
2114                 return 0;
2115         }
2116
2117         case e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS:
2118         {
2119                 struct rte_sched_pipe *pipe = grinder->pipe;
2120
2121                 grinder->pipe_params = port->pipe_profiles + pipe->profile;
2122                 grinder_prefetch_tc_queue_arrays(port, pos);
2123                 grinder_credits_update(port, pos);
2124
2125                 grinder->state = e_GRINDER_PREFETCH_MBUF;
2126                 return 0;
2127         }
2128
2129         case e_GRINDER_PREFETCH_MBUF:
2130         {
2131                 grinder_prefetch_mbuf(port, pos);
2132
2133                 grinder->state = e_GRINDER_READ_MBUF;
2134                 return 0;
2135         }
2136
2137         case e_GRINDER_READ_MBUF:
2138         {
2139                 uint32_t result = 0;
2140
2141                 result = grinder_schedule(port, pos);
2142
2143                 /* Look for next packet within the same TC */
2144                 if (result && grinder->qmask) {
2145                         grinder_wrr(port, pos);
2146                         grinder_prefetch_mbuf(port, pos);
2147
2148                         return 1;
2149                 }
2150                 grinder_wrr_store(port, pos);
2151
2152                 /* Look for another active TC within same pipe */
2153                 if (grinder_next_tc(port, pos)) {
2154                         grinder_prefetch_tc_queue_arrays(port, pos);
2155
2156                         grinder->state = e_GRINDER_PREFETCH_MBUF;
2157                         return result;
2158                 }
2159
2160                 if (grinder->productive == 0 &&
2161                     port->pipe_loop == RTE_SCHED_PIPE_INVALID)
2162                         port->pipe_loop = grinder->pindex;
2163
2164                 grinder_evict(port, pos);
2165
2166                 /* Look for another active pipe */
2167                 if (grinder_next_pipe(port, pos)) {
2168                         grinder_prefetch_pipe(port, pos);
2169
2170                         grinder->state = e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS;
2171                         return result;
2172                 }
2173
2174                 /* No active pipe found */
2175                 port->busy_grinders--;
2176
2177                 grinder->state = e_GRINDER_PREFETCH_PIPE;
2178                 return result;
2179         }
2180
2181         default:
2182                 rte_panic("Algorithmic error (invalid state)\n");
2183                 return 0;
2184         }
2185 }
2186
2187 static inline void
2188 rte_sched_port_time_resync(struct rte_sched_port *port)
2189 {
2190         uint64_t cycles = rte_get_tsc_cycles();
2191         uint64_t cycles_diff = cycles - port->time_cpu_cycles;
2192         uint64_t bytes_diff;
2193
2194         /* Compute elapsed time in bytes */
2195         bytes_diff = rte_reciprocal_divide(cycles_diff << RTE_SCHED_TIME_SHIFT,
2196                                            port->inv_cycles_per_byte);
2197
2198         /* Advance port time */
2199         port->time_cpu_cycles = cycles;
2200         port->time_cpu_bytes += bytes_diff;
2201         if (port->time < port->time_cpu_bytes)
2202                 port->time = port->time_cpu_bytes;
2203
2204         /* Reset pipe loop detection */
2205         port->pipe_loop = RTE_SCHED_PIPE_INVALID;
2206 }
2207
2208 static inline int
2209 rte_sched_port_exceptions(struct rte_sched_port *port, int second_pass)
2210 {
2211         int exceptions;
2212
2213         /* Check if any exception flag is set */
2214         exceptions = (second_pass && port->busy_grinders == 0) ||
2215                 (port->pipe_exhaustion == 1);
2216
2217         /* Clear exception flags */
2218         port->pipe_exhaustion = 0;
2219
2220         return exceptions;
2221 }
2222
2223 int
2224 rte_sched_port_dequeue(struct rte_sched_port *port, struct rte_mbuf **pkts, uint32_t n_pkts)
2225 {
2226         uint32_t i, count;
2227
2228         port->pkts_out = pkts;
2229         port->n_pkts_out = 0;
2230
2231         rte_sched_port_time_resync(port);
2232
2233         /* Take each queue in the grinder one step further */
2234         for (i = 0, count = 0; ; i++)  {
2235                 count += grinder_handle(port, i & (RTE_SCHED_PORT_N_GRINDERS - 1));
2236                 if ((count == n_pkts) ||
2237                     rte_sched_port_exceptions(port, i >= RTE_SCHED_PORT_N_GRINDERS)) {
2238                         break;
2239                 }
2240         }
2241
2242         return count;
2243 }