lib/librte_sched/rte_sched.c

   1 /*-
   2  *   BSD LICENSE
   3  *
   4  *   Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
   5  *   All rights reserved.
   6  *
   7  *   Redistribution and use in source and binary forms, with or without
   8  *   modification, are permitted provided that the following conditions
   9  *   are met:
  10  *
  11  *     * Redistributions of source code must retain the above copyright
  12  *       notice, this list of conditions and the following disclaimer.
  13  *     * Redistributions in binary form must reproduce the above copyright
  14  *       notice, this list of conditions and the following disclaimer in
  15  *       the documentation and/or other materials provided with the
  16  *       distribution.
  17  *     * Neither the name of Intel Corporation nor the names of its
  18  *       contributors may be used to endorse or promote products derived
  19  *       from this software without specific prior written permission.
  20  *
  21  *   THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  22  *   "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  23  *   LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  24  *   A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  25  *   OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  26  *   SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  27  *   LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  28  *   DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  29  *   THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30  *   (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31  *   OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32  */
  33
  34 #include <stdio.h>
  35 #include <string.h>
  36
  37 #include <rte_common.h>
  38 #include <rte_log.h>
  39 #include <rte_memory.h>
  40 #include <rte_malloc.h>
  41 #include <rte_cycles.h>
  42 #include <rte_prefetch.h>
  43 #include <rte_branch_prediction.h>
  44 #include <rte_mbuf.h>
  45
  46 #include "rte_sched.h"
  47 #include "rte_bitmap.h"
  48 #include "rte_sched_common.h"
  49 #include "rte_approx.h"
  50 #include "rte_reciprocal.h"
  51
  52 #ifdef __INTEL_COMPILER
  53 #pragma warning(disable:2259) /* conversion may lose significant bits */
  54 #endif
  55
  56 #ifdef RTE_SCHED_VECTOR
  57 #include <rte_vect.h>
  58
  59 #if defined(__SSE4__)
  60 #define SCHED_VECTOR_SSE4
  61 #endif
  62
  63 #endif
  64
  65 #define RTE_SCHED_TB_RATE_CONFIG_ERR          (1e-7)
  66 #define RTE_SCHED_WRR_SHIFT                   3
  67 #define RTE_SCHED_GRINDER_PCACHE_SIZE         (64 / RTE_SCHED_QUEUES_PER_PIPE)
  68 #define RTE_SCHED_PIPE_INVALID                UINT32_MAX
  69 #define RTE_SCHED_BMP_POS_INVALID             UINT32_MAX
  70
  71 /* Scaling for cycles_per_byte calculation
  72  * Chosen so that minimum rate is 480 bit/sec
  73  */
  74 #define RTE_SCHED_TIME_SHIFT                  8
  75
  76 struct rte_sched_subport {
  77         /* Token bucket (TB) */
  78         uint64_t tb_time; /* time of last update */
  79         uint32_t tb_period;
  80         uint32_t tb_credits_per_period;
  81         uint32_t tb_size;
  82         uint32_t tb_credits;
  83
  84         /* Traffic classes (TCs) */
  85         uint64_t tc_time; /* time of next update */
  86         uint32_t tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
  87         uint32_t tc_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
  88         uint32_t tc_period;
  89
  90         /* TC oversubscription */
  91         uint32_t tc_ov_wm;
  92         uint32_t tc_ov_wm_min;
  93         uint32_t tc_ov_wm_max;
  94         uint8_t tc_ov_period_id;
  95         uint8_t tc_ov;
  96         uint32_t tc_ov_n;
  97         double tc_ov_rate;
  98
  99         /* Statistics */
 100         struct rte_sched_subport_stats stats;
 101 };
 102
 103 struct rte_sched_pipe_profile {
 104         /* Token bucket (TB) */
 105         uint32_t tb_period;
 106         uint32_t tb_credits_per_period;
 107         uint32_t tb_size;
 108
 109         /* Pipe traffic classes */
 110         uint32_t tc_period;
 111         uint32_t tc_credits_per_period[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
 112         uint8_t tc_ov_weight;
 113
 114         /* Pipe queues */
 115         uint8_t  wrr_cost[RTE_SCHED_QUEUES_PER_PIPE];
 116 };
 117
 118 struct rte_sched_pipe {
 119         /* Token bucket (TB) */
 120         uint64_t tb_time; /* time of last update */
 121         uint32_t tb_credits;
 122
 123         /* Pipe profile and flags */
 124         uint32_t profile;
 125
 126         /* Traffic classes (TCs) */
 127         uint64_t tc_time; /* time of next update */
 128         uint32_t tc_credits[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
 129
 130         /* Weighted Round Robin (WRR) */
 131         uint8_t wrr_tokens[RTE_SCHED_QUEUES_PER_PIPE];
 132
 133         /* TC oversubscription */
 134         uint32_t tc_ov_credits;
 135         uint8_t tc_ov_period_id;
 136         uint8_t reserved[3];
 137 } __rte_cache_aligned;
 138
 139 struct rte_sched_queue {
 140         uint16_t qw;
 141         uint16_t qr;
 142 };
 143
 144 struct rte_sched_queue_extra {
 145         struct rte_sched_queue_stats stats;
 146 #ifdef RTE_SCHED_RED
 147         struct rte_red red;
 148 #endif
 149 };
 150
 151 enum grinder_state {
 152         e_GRINDER_PREFETCH_PIPE = 0,
 153         e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS,
 154         e_GRINDER_PREFETCH_MBUF,
 155         e_GRINDER_READ_MBUF
 156 };
 157
 158 /*
 159  * Path through the scheduler hierarchy used by the scheduler enqueue
 160  * operation to identify the destination queue for the current
 161  * packet. Stored in the field pkt.hash.sched of struct rte_mbuf of
 162  * each packet, typically written by the classification stage and read
 163  * by scheduler enqueue.
 164  */
 165 struct rte_sched_port_hierarchy {
 166         uint16_t queue:2;                /**< Queue ID (0 .. 3) */
 167         uint16_t traffic_class:2;        /**< Traffic class ID (0 .. 3)*/
 168         uint32_t color:2;                /**< Color */
 169         uint16_t unused:10;
 170         uint16_t subport;                /**< Subport ID */
 171         uint32_t pipe;                   /**< Pipe ID */
 172 };
 173
 174 struct rte_sched_grinder {
 175         /* Pipe cache */
 176         uint16_t pcache_qmask[RTE_SCHED_GRINDER_PCACHE_SIZE];
 177         uint32_t pcache_qindex[RTE_SCHED_GRINDER_PCACHE_SIZE];
 178         uint32_t pcache_w;
 179         uint32_t pcache_r;
 180
 181         /* Current pipe */
 182         enum grinder_state state;
 183         uint32_t productive;
 184         uint32_t pindex;
 185         struct rte_sched_subport *subport;
 186         struct rte_sched_pipe *pipe;
 187         struct rte_sched_pipe_profile *pipe_params;
 188
 189         /* TC cache */
 190         uint8_t tccache_qmask[4];
 191         uint32_t tccache_qindex[4];
 192         uint32_t tccache_w;
 193         uint32_t tccache_r;
 194
 195         /* Current TC */
 196         uint32_t tc_index;
 197         struct rte_sched_queue *queue[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
 198         struct rte_mbuf **qbase[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
 199         uint32_t qindex[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
 200         uint16_t qsize;
 201         uint32_t qmask;
 202         uint32_t qpos;
 203         struct rte_mbuf *pkt;
 204
 205         /* WRR */
 206         uint16_t wrr_tokens[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
 207         uint16_t wrr_mask[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
 208         uint8_t wrr_cost[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
 209 };
 210
 211 struct rte_sched_port {
 212         /* User parameters */
 213         uint32_t n_subports_per_port;
 214         uint32_t n_pipes_per_subport;
 215         uint32_t rate;
 216         uint32_t mtu;
 217         uint32_t frame_overhead;
 218         uint16_t qsize[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
 219         uint32_t n_pipe_profiles;
 220         uint32_t pipe_tc3_rate_max;
 221 #ifdef RTE_SCHED_RED
 222         struct rte_red_config red_config[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE][e_RTE_METER_COLORS];
 223 #endif
 224
 225         /* Timing */
 226         uint64_t time_cpu_cycles;     /* Current CPU time measured in CPU cyles */
 227         uint64_t time_cpu_bytes;      /* Current CPU time measured in bytes */
 228         uint64_t time;                /* Current NIC TX time measured in bytes */
 229         struct rte_reciprocal inv_cycles_per_byte; /* CPU cycles per byte */
 230
 231         /* Scheduling loop detection */
 232         uint32_t pipe_loop;
 233         uint32_t pipe_exhaustion;
 234
 235         /* Bitmap */
 236         struct rte_bitmap *bmp;
 237         uint32_t grinder_base_bmp_pos[RTE_SCHED_PORT_N_GRINDERS] __rte_aligned_16;
 238
 239         /* Grinders */
 240         struct rte_sched_grinder grinder[RTE_SCHED_PORT_N_GRINDERS];
 241         uint32_t busy_grinders;
 242         struct rte_mbuf **pkts_out;
 243         uint32_t n_pkts_out;
 244
 245         /* Queue base calculation */
 246         uint32_t qsize_add[RTE_SCHED_QUEUES_PER_PIPE];
 247         uint32_t qsize_sum;
 248
 249         /* Large data structures */
 250         struct rte_sched_subport *subport;
 251         struct rte_sched_pipe *pipe;
 252         struct rte_sched_queue *queue;
 253         struct rte_sched_queue_extra *queue_extra;
 254         struct rte_sched_pipe_profile *pipe_profiles;
 255         uint8_t *bmp_array;
 256         struct rte_mbuf **queue_array;
 257         uint8_t memory[0] __rte_cache_aligned;
 258 } __rte_cache_aligned;
 259
 260 enum rte_sched_port_array {
 261         e_RTE_SCHED_PORT_ARRAY_SUBPORT = 0,
 262         e_RTE_SCHED_PORT_ARRAY_PIPE,
 263         e_RTE_SCHED_PORT_ARRAY_QUEUE,
 264         e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA,
 265         e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES,
 266         e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY,
 267         e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY,
 268         e_RTE_SCHED_PORT_ARRAY_TOTAL,
 269 };
 270
 271 #ifdef RTE_SCHED_COLLECT_STATS
 272
 273 static inline uint32_t
 274 rte_sched_port_queues_per_subport(struct rte_sched_port *port)
 275 {
 276         return RTE_SCHED_QUEUES_PER_PIPE * port->n_pipes_per_subport;
 277 }
 278
 279 #endif
 280
 281 static inline uint32_t
 282 rte_sched_port_queues_per_port(struct rte_sched_port *port)
 283 {
 284         return RTE_SCHED_QUEUES_PER_PIPE * port->n_pipes_per_subport * port->n_subports_per_port;
 285 }
 286
 287 static inline struct rte_mbuf **
 288 rte_sched_port_qbase(struct rte_sched_port *port, uint32_t qindex)
 289 {
 290         uint32_t pindex = qindex >> 4;
 291         uint32_t qpos = qindex & 0xF;
 292
 293         return (port->queue_array + pindex *
 294                 port->qsize_sum + port->qsize_add[qpos]);
 295 }
 296
 297 static inline uint16_t
 298 rte_sched_port_qsize(struct rte_sched_port *port, uint32_t qindex)
 299 {
 300         uint32_t tc = (qindex >> 2) & 0x3;
 301
 302         return port->qsize[tc];
 303 }
 304
 305 static int
 306 rte_sched_port_check_params(struct rte_sched_port_params *params)
 307 {
 308         uint32_t i, j;
 309
 310         if (params == NULL)
 311                 return -1;
 312
 313         /* socket */
 314         if ((params->socket < 0) || (params->socket >= RTE_MAX_NUMA_NODES))
 315                 return -3;
 316
 317         /* rate */
 318         if (params->rate == 0)
 319                 return -4;
 320
 321         /* mtu */
 322         if (params->mtu == 0)
 323                 return -5;
 324
 325         /* n_subports_per_port: non-zero, limited to 16 bits, power of 2 */
 326         if (params->n_subports_per_port == 0 ||
 327             params->n_subports_per_port > 1u << 16 ||
 328             !rte_is_power_of_2(params->n_subports_per_port))
 329                 return -6;
 330
 331         /* n_pipes_per_subport: non-zero, power of 2 */
 332         if (params->n_pipes_per_subport == 0 ||
 333             !rte_is_power_of_2(params->n_pipes_per_subport))
 334                 return -7;
 335
 336         /* qsize: non-zero, power of 2,
 337          * no bigger than 32K (due to 16-bit read/write pointers)
 338          */
 339         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
 340                 uint16_t qsize = params->qsize[i];
 341
 342                 if (qsize == 0 || !rte_is_power_of_2(qsize))
 343                         return -8;
 344         }
 345
 346         /* pipe_profiles and n_pipe_profiles */
 347         if (params->pipe_profiles == NULL ||
 348             params->n_pipe_profiles == 0 ||
 349             params->n_pipe_profiles > RTE_SCHED_PIPE_PROFILES_PER_PORT)
 350                 return -9;
 351
 352         for (i = 0; i < params->n_pipe_profiles; i++) {
 353                 struct rte_sched_pipe_params *p = params->pipe_profiles + i;
 354
 355                 /* TB rate: non-zero, not greater than port rate */
 356                 if (p->tb_rate == 0 || p->tb_rate > params->rate)
 357                         return -10;
 358
 359                 /* TB size: non-zero */
 360                 if (p->tb_size == 0)
 361                         return -11;
 362
 363                 /* TC rate: non-zero, less than pipe rate */
 364                 for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j++) {
 365                         if (p->tc_rate[j] == 0 || p->tc_rate[j] > p->tb_rate)
 366                                 return -12;
 367                 }
 368
 369                 /* TC period: non-zero */
 370                 if (p->tc_period == 0)
 371                         return -13;
 372
 373 #ifdef RTE_SCHED_SUBPORT_TC_OV
 374                 /* TC3 oversubscription weight: non-zero */
 375                 if (p->tc_ov_weight == 0)
 376                         return -14;
 377 #endif
 378
 379                 /* Queue WRR weights: non-zero */
 380                 for (j = 0; j < RTE_SCHED_QUEUES_PER_PIPE; j++) {
 381                         if (p->wrr_weights[j] == 0)
 382                                 return -15;
 383                 }
 384         }
 385
 386         return 0;
 387 }
 388
 389 static uint32_t
 390 rte_sched_port_get_array_base(struct rte_sched_port_params *params, enum rte_sched_port_array array)
 391 {
 392         uint32_t n_subports_per_port = params->n_subports_per_port;
 393         uint32_t n_pipes_per_subport = params->n_pipes_per_subport;
 394         uint32_t n_pipes_per_port = n_pipes_per_subport * n_subports_per_port;
 395         uint32_t n_queues_per_port = RTE_SCHED_QUEUES_PER_PIPE * n_pipes_per_subport * n_subports_per_port;
 396
 397         uint32_t size_subport = n_subports_per_port * sizeof(struct rte_sched_subport);
 398         uint32_t size_pipe = n_pipes_per_port * sizeof(struct rte_sched_pipe);
 399         uint32_t size_queue = n_queues_per_port * sizeof(struct rte_sched_queue);
 400         uint32_t size_queue_extra
 401                 = n_queues_per_port * sizeof(struct rte_sched_queue_extra);
 402         uint32_t size_pipe_profiles
 403                 = RTE_SCHED_PIPE_PROFILES_PER_PORT * sizeof(struct rte_sched_pipe_profile);
 404         uint32_t size_bmp_array = rte_bitmap_get_memory_footprint(n_queues_per_port);
 405         uint32_t size_per_pipe_queue_array, size_queue_array;
 406
 407         uint32_t base, i;
 408
 409         size_per_pipe_queue_array = 0;
 410         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
 411                 size_per_pipe_queue_array += RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS
 412                         * params->qsize[i] * sizeof(struct rte_mbuf *);
 413         }
 414         size_queue_array = n_pipes_per_port * size_per_pipe_queue_array;
 415
 416         base = 0;
 417
 418         if (array == e_RTE_SCHED_PORT_ARRAY_SUBPORT)
 419                 return base;
 420         base += RTE_CACHE_LINE_ROUNDUP(size_subport);
 421
 422         if (array == e_RTE_SCHED_PORT_ARRAY_PIPE)
 423                 return base;
 424         base += RTE_CACHE_LINE_ROUNDUP(size_pipe);
 425
 426         if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE)
 427                 return base;
 428         base += RTE_CACHE_LINE_ROUNDUP(size_queue);
 429
 430         if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA)
 431                 return base;
 432         base += RTE_CACHE_LINE_ROUNDUP(size_queue_extra);
 433
 434         if (array == e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES)
 435                 return base;
 436         base += RTE_CACHE_LINE_ROUNDUP(size_pipe_profiles);
 437
 438         if (array == e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY)
 439                 return base;
 440         base += RTE_CACHE_LINE_ROUNDUP(size_bmp_array);
 441
 442         if (array == e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY)
 443                 return base;
 444         base += RTE_CACHE_LINE_ROUNDUP(size_queue_array);
 445
 446         return base;
 447 }
 448
 449 uint32_t
 450 rte_sched_port_get_memory_footprint(struct rte_sched_port_params *params)
 451 {
 452         uint32_t size0, size1;
 453         int status;
 454
 455         status = rte_sched_port_check_params(params);
 456         if (status != 0) {
 457                 RTE_LOG(NOTICE, SCHED,
 458                         "Port scheduler params check failed (%d)\n", status);
 459
 460                 return 0;
 461         }
 462
 463         size0 = sizeof(struct rte_sched_port);
 464         size1 = rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_TOTAL);
 465
 466         return size0 + size1;
 467 }
 468
 469 static void
 470 rte_sched_port_config_qsize(struct rte_sched_port *port)
 471 {
 472         /* TC 0 */
 473         port->qsize_add[0] = 0;
 474         port->qsize_add[1] = port->qsize_add[0] + port->qsize[0];
 475         port->qsize_add[2] = port->qsize_add[1] + port->qsize[0];
 476         port->qsize_add[3] = port->qsize_add[2] + port->qsize[0];
 477
 478         /* TC 1 */
 479         port->qsize_add[4] = port->qsize_add[3] + port->qsize[0];
 480         port->qsize_add[5] = port->qsize_add[4] + port->qsize[1];
 481         port->qsize_add[6] = port->qsize_add[5] + port->qsize[1];
 482         port->qsize_add[7] = port->qsize_add[6] + port->qsize[1];
 483
 484         /* TC 2 */
 485         port->qsize_add[8] = port->qsize_add[7] + port->qsize[1];
 486         port->qsize_add[9] = port->qsize_add[8] + port->qsize[2];
 487         port->qsize_add[10] = port->qsize_add[9] + port->qsize[2];
 488         port->qsize_add[11] = port->qsize_add[10] + port->qsize[2];
 489
 490         /* TC 3 */
 491         port->qsize_add[12] = port->qsize_add[11] + port->qsize[2];
 492         port->qsize_add[13] = port->qsize_add[12] + port->qsize[3];
 493         port->qsize_add[14] = port->qsize_add[13] + port->qsize[3];
 494         port->qsize_add[15] = port->qsize_add[14] + port->qsize[3];
 495
 496         port->qsize_sum = port->qsize_add[15] + port->qsize[3];
 497 }
 498
 499 static void
 500 rte_sched_port_log_pipe_profile(struct rte_sched_port *port, uint32_t i)
 501 {
 502         struct rte_sched_pipe_profile *p = port->pipe_profiles + i;
 503
 504         RTE_LOG(DEBUG, SCHED, "Low level config for pipe profile %u:\n"
 505                 "    Token bucket: period = %u, credits per period = %u, size = %u\n"
 506                 "    Traffic classes: period = %u, credits per period = [%u, %u, %u, %u]\n"
 507                 "    Traffic class 3 oversubscription: weight = %hhu\n"
 508                 "    WRR cost: [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu], [%hhu, %hhu, %hhu, %hhu]\n",
 509                 i,
 510
 511                 /* Token bucket */
 512                 p->tb_period,
 513                 p->tb_credits_per_period,
 514                 p->tb_size,
 515
 516                 /* Traffic classes */
 517                 p->tc_period,
 518                 p->tc_credits_per_period[0],
 519                 p->tc_credits_per_period[1],
 520                 p->tc_credits_per_period[2],
 521                 p->tc_credits_per_period[3],
 522
 523                 /* Traffic class 3 oversubscription */
 524                 p->tc_ov_weight,
 525
 526                 /* WRR */
 527                 p->wrr_cost[ 0], p->wrr_cost[ 1], p->wrr_cost[ 2], p->wrr_cost[ 3],
 528                 p->wrr_cost[ 4], p->wrr_cost[ 5], p->wrr_cost[ 6], p->wrr_cost[ 7],
 529                 p->wrr_cost[ 8], p->wrr_cost[ 9], p->wrr_cost[10], p->wrr_cost[11],
 530                 p->wrr_cost[12], p->wrr_cost[13], p->wrr_cost[14], p->wrr_cost[15]);
 531 }
 532
 533 static inline uint64_t
 534 rte_sched_time_ms_to_bytes(uint32_t time_ms, uint32_t rate)
 535 {
 536         uint64_t time = time_ms;
 537
 538         time = (time * rate) / 1000;
 539
 540         return time;
 541 }
 542
 543 static void
 544 rte_sched_port_config_pipe_profile_table(struct rte_sched_port *port, struct rte_sched_port_params *params)
 545 {
 546         uint32_t i, j;
 547
 548         for (i = 0; i < port->n_pipe_profiles; i++) {
 549                 struct rte_sched_pipe_params *src = params->pipe_profiles + i;
 550                 struct rte_sched_pipe_profile *dst = port->pipe_profiles + i;
 551
 552                 /* Token Bucket */
 553                 if (src->tb_rate == params->rate) {
 554                         dst->tb_credits_per_period = 1;
 555                         dst->tb_period = 1;
 556                 } else {
 557                         double tb_rate = (double) src->tb_rate
 558                                 / (double) params->rate;
 559                         double d = RTE_SCHED_TB_RATE_CONFIG_ERR;
 560
 561                         rte_approx(tb_rate, d,
 562                                    &dst->tb_credits_per_period, &dst->tb_period);
 563                 }
 564                 dst->tb_size = src->tb_size;
 565
 566                 /* Traffic Classes */
 567                 dst->tc_period = rte_sched_time_ms_to_bytes(src->tc_period,
 568                                                             params->rate);
 569
 570                 for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j++)
 571                         dst->tc_credits_per_period[j]
 572                                 = rte_sched_time_ms_to_bytes(src->tc_period,
 573                                                              src->tc_rate[j]);
 574
 575 #ifdef RTE_SCHED_SUBPORT_TC_OV
 576                 dst->tc_ov_weight = src->tc_ov_weight;
 577 #endif
 578
 579                 /* WRR */
 580                 for (j = 0; j < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; j++) {
 581                         uint32_t wrr_cost[RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS];
 582                         uint32_t lcd, lcd1, lcd2;
 583                         uint32_t qindex;
 584
 585                         qindex = j * RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS;
 586
 587                         wrr_cost[0] = src->wrr_weights[qindex];
 588                         wrr_cost[1] = src->wrr_weights[qindex + 1];
 589                         wrr_cost[2] = src->wrr_weights[qindex + 2];
 590                         wrr_cost[3] = src->wrr_weights[qindex + 3];
 591
 592                         lcd1 = rte_get_lcd(wrr_cost[0], wrr_cost[1]);
 593                         lcd2 = rte_get_lcd(wrr_cost[2], wrr_cost[3]);
 594                         lcd = rte_get_lcd(lcd1, lcd2);
 595
 596                         wrr_cost[0] = lcd / wrr_cost[0];
 597                         wrr_cost[1] = lcd / wrr_cost[1];
 598                         wrr_cost[2] = lcd / wrr_cost[2];
 599                         wrr_cost[3] = lcd / wrr_cost[3];
 600
 601                         dst->wrr_cost[qindex] = (uint8_t) wrr_cost[0];
 602                         dst->wrr_cost[qindex + 1] = (uint8_t) wrr_cost[1];
 603                         dst->wrr_cost[qindex + 2] = (uint8_t) wrr_cost[2];
 604                         dst->wrr_cost[qindex + 3] = (uint8_t) wrr_cost[3];
 605                 }
 606
 607                 rte_sched_port_log_pipe_profile(port, i);
 608         }
 609
 610         port->pipe_tc3_rate_max = 0;
 611         for (i = 0; i < port->n_pipe_profiles; i++) {
 612                 struct rte_sched_pipe_params *src = params->pipe_profiles + i;
 613                 uint32_t pipe_tc3_rate = src->tc_rate[3];
 614
 615                 if (port->pipe_tc3_rate_max < pipe_tc3_rate)
 616                         port->pipe_tc3_rate_max = pipe_tc3_rate;
 617         }
 618 }
 619
 620 struct rte_sched_port *
 621 rte_sched_port_config(struct rte_sched_port_params *params)
 622 {
 623         struct rte_sched_port *port = NULL;
 624         uint32_t mem_size, bmp_mem_size, n_queues_per_port, i, cycles_per_byte;
 625
 626         /* Check user parameters. Determine the amount of memory to allocate */
 627         mem_size = rte_sched_port_get_memory_footprint(params);
 628         if (mem_size == 0)
 629                 return NULL;
 630
 631         /* Allocate memory to store the data structures */
 632         port = rte_zmalloc("qos_params", mem_size, RTE_CACHE_LINE_SIZE);
 633         if (port == NULL)
 634                 return NULL;
 635
 636         /* compile time checks */
 637         RTE_BUILD_BUG_ON(RTE_SCHED_PORT_N_GRINDERS == 0);
 638         RTE_BUILD_BUG_ON(RTE_SCHED_PORT_N_GRINDERS & (RTE_SCHED_PORT_N_GRINDERS - 1));
 639
 640         /* User parameters */
 641         port->n_subports_per_port = params->n_subports_per_port;
 642         port->n_pipes_per_subport = params->n_pipes_per_subport;
 643         port->rate = params->rate;
 644         port->mtu = params->mtu + params->frame_overhead;
 645         port->frame_overhead = params->frame_overhead;
 646         memcpy(port->qsize, params->qsize, sizeof(params->qsize));
 647         port->n_pipe_profiles = params->n_pipe_profiles;
 648
 649 #ifdef RTE_SCHED_RED
 650         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
 651                 uint32_t j;
 652
 653                 for (j = 0; j < e_RTE_METER_COLORS; j++) {
 654                         /* if min/max are both zero, then RED is disabled */
 655                         if ((params->red_params[i][j].min_th |
 656                              params->red_params[i][j].max_th) == 0) {
 657                                 continue;
 658                         }
 659
 660                         if (rte_red_config_init(&port->red_config[i][j],
 661                                 params->red_params[i][j].wq_log2,
 662                                 params->red_params[i][j].min_th,
 663                                 params->red_params[i][j].max_th,
 664                                 params->red_params[i][j].maxp_inv) != 0) {
 665                                 return NULL;
 666                         }
 667                 }
 668         }
 669 #endif
 670
 671         /* Timing */
 672         port->time_cpu_cycles = rte_get_tsc_cycles();
 673         port->time_cpu_bytes = 0;
 674         port->time = 0;
 675
 676         cycles_per_byte = (rte_get_tsc_hz() << RTE_SCHED_TIME_SHIFT)
 677                 / params->rate;
 678         port->inv_cycles_per_byte = rte_reciprocal_value(cycles_per_byte);
 679
 680         /* Scheduling loop detection */
 681         port->pipe_loop = RTE_SCHED_PIPE_INVALID;
 682         port->pipe_exhaustion = 0;
 683
 684         /* Grinders */
 685         port->busy_grinders = 0;
 686         port->pkts_out = NULL;
 687         port->n_pkts_out = 0;
 688
 689         /* Queue base calculation */
 690         rte_sched_port_config_qsize(port);
 691
 692         /* Large data structures */
 693         port->subport = (struct rte_sched_subport *)
 694                 (port->memory + rte_sched_port_get_array_base(params,
 695                                                               e_RTE_SCHED_PORT_ARRAY_SUBPORT));
 696         port->pipe = (struct rte_sched_pipe *)
 697                 (port->memory + rte_sched_port_get_array_base(params,
 698                                                               e_RTE_SCHED_PORT_ARRAY_PIPE));
 699         port->queue = (struct rte_sched_queue *)
 700                 (port->memory + rte_sched_port_get_array_base(params,
 701                                                               e_RTE_SCHED_PORT_ARRAY_QUEUE));
 702         port->queue_extra = (struct rte_sched_queue_extra *)
 703                 (port->memory + rte_sched_port_get_array_base(params,
 704                                                               e_RTE_SCHED_PORT_ARRAY_QUEUE_EXTRA));
 705         port->pipe_profiles = (struct rte_sched_pipe_profile *)
 706                 (port->memory + rte_sched_port_get_array_base(params,
 707                                                               e_RTE_SCHED_PORT_ARRAY_PIPE_PROFILES));
 708         port->bmp_array =  port->memory
 709                 + rte_sched_port_get_array_base(params, e_RTE_SCHED_PORT_ARRAY_BMP_ARRAY);
 710         port->queue_array = (struct rte_mbuf **)
 711                 (port->memory + rte_sched_port_get_array_base(params,
 712                                                               e_RTE_SCHED_PORT_ARRAY_QUEUE_ARRAY));
 713
 714         /* Pipe profile table */
 715         rte_sched_port_config_pipe_profile_table(port, params);
 716
 717         /* Bitmap */
 718         n_queues_per_port = rte_sched_port_queues_per_port(port);
 719         bmp_mem_size = rte_bitmap_get_memory_footprint(n_queues_per_port);
 720         port->bmp = rte_bitmap_init(n_queues_per_port, port->bmp_array,
 721                                     bmp_mem_size);
 722         if (port->bmp == NULL) {
 723                 RTE_LOG(ERR, SCHED, "Bitmap init error\n");
 724                 return NULL;
 725         }
 726
 727         for (i = 0; i < RTE_SCHED_PORT_N_GRINDERS; i++)
 728                 port->grinder_base_bmp_pos[i] = RTE_SCHED_PIPE_INVALID;
 729
 730
 731         return port;
 732 }
 733
 734 void
 735 rte_sched_port_free(struct rte_sched_port *port)
 736 {
 737         unsigned int queue;
 738
 739         /* Check user parameters */
 740         if (port == NULL)
 741                 return;
 742
 743         /* Free enqueued mbufs */
 744         for (queue = 0; queue < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; queue++) {
 745                 struct rte_mbuf **mbufs = rte_sched_port_qbase(port, queue);
 746                 unsigned int i;
 747
 748                 for (i = 0; i < rte_sched_port_qsize(port, queue); i++)
 749                         rte_pktmbuf_free(mbufs[i]);
 750         }
 751
 752         rte_bitmap_free(port->bmp);
 753         rte_free(port);
 754 }
 755
 756 static void
 757 rte_sched_port_log_subport_config(struct rte_sched_port *port, uint32_t i)
 758 {
 759         struct rte_sched_subport *s = port->subport + i;
 760
 761         RTE_LOG(DEBUG, SCHED, "Low level config for subport %u:\n"
 762                 "    Token bucket: period = %u, credits per period = %u, size = %u\n"
 763                 "    Traffic classes: period = %u, credits per period = [%u, %u, %u, %u]\n"
 764                 "    Traffic class 3 oversubscription: wm min = %u, wm max = %u\n",
 765                 i,
 766
 767                 /* Token bucket */
 768                 s->tb_period,
 769                 s->tb_credits_per_period,
 770                 s->tb_size,
 771
 772                 /* Traffic classes */
 773                 s->tc_period,
 774                 s->tc_credits_per_period[0],
 775                 s->tc_credits_per_period[1],
 776                 s->tc_credits_per_period[2],
 777                 s->tc_credits_per_period[3],
 778
 779                 /* Traffic class 3 oversubscription */
 780                 s->tc_ov_wm_min,
 781                 s->tc_ov_wm_max);
 782 }
 783
 784 int
 785 rte_sched_subport_config(struct rte_sched_port *port,
 786         uint32_t subport_id,
 787         struct rte_sched_subport_params *params)
 788 {
 789         struct rte_sched_subport *s;
 790         uint32_t i;
 791
 792         /* Check user parameters */
 793         if (port == NULL ||
 794             subport_id >= port->n_subports_per_port ||
 795             params == NULL)
 796                 return -1;
 797
 798         if (params->tb_rate == 0 || params->tb_rate > port->rate)
 799                 return -2;
 800
 801         if (params->tb_size == 0)
 802                 return -3;
 803
 804         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
 805                 if (params->tc_rate[i] == 0 ||
 806                     params->tc_rate[i] > params->tb_rate)
 807                         return -4;
 808         }
 809
 810         if (params->tc_period == 0)
 811                 return -5;
 812
 813         s = port->subport + subport_id;
 814
 815         /* Token Bucket (TB) */
 816         if (params->tb_rate == port->rate) {
 817                 s->tb_credits_per_period = 1;
 818                 s->tb_period = 1;
 819         } else {
 820                 double tb_rate = ((double) params->tb_rate) / ((double) port->rate);
 821                 double d = RTE_SCHED_TB_RATE_CONFIG_ERR;
 822
 823                 rte_approx(tb_rate, d, &s->tb_credits_per_period, &s->tb_period);
 824         }
 825
 826         s->tb_size = params->tb_size;
 827         s->tb_time = port->time;
 828         s->tb_credits = s->tb_size / 2;
 829
 830         /* Traffic Classes (TCs) */
 831         s->tc_period = rte_sched_time_ms_to_bytes(params->tc_period, port->rate);
 832         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++) {
 833                 s->tc_credits_per_period[i]
 834                         = rte_sched_time_ms_to_bytes(params->tc_period,
 835                                                      params->tc_rate[i]);
 836         }
 837         s->tc_time = port->time + s->tc_period;
 838         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++)
 839                 s->tc_credits[i] = s->tc_credits_per_period[i];
 840
 841 #ifdef RTE_SCHED_SUBPORT_TC_OV
 842         /* TC oversubscription */
 843         s->tc_ov_wm_min = port->mtu;
 844         s->tc_ov_wm_max = rte_sched_time_ms_to_bytes(params->tc_period,
 845                                                      port->pipe_tc3_rate_max);
 846         s->tc_ov_wm = s->tc_ov_wm_max;
 847         s->tc_ov_period_id = 0;
 848         s->tc_ov = 0;
 849         s->tc_ov_n = 0;
 850         s->tc_ov_rate = 0;
 851 #endif
 852
 853         rte_sched_port_log_subport_config(port, subport_id);
 854
 855         return 0;
 856 }
 857
 858 int
 859 rte_sched_pipe_config(struct rte_sched_port *port,
 860         uint32_t subport_id,
 861         uint32_t pipe_id,
 862         int32_t pipe_profile)
 863 {
 864         struct rte_sched_subport *s;
 865         struct rte_sched_pipe *p;
 866         struct rte_sched_pipe_profile *params;
 867         uint32_t deactivate, profile, i;
 868
 869         /* Check user parameters */
 870         profile = (uint32_t) pipe_profile;
 871         deactivate = (pipe_profile < 0);
 872
 873         if (port == NULL ||
 874             subport_id >= port->n_subports_per_port ||
 875             pipe_id >= port->n_pipes_per_subport ||
 876             (!deactivate && profile >= port->n_pipe_profiles))
 877                 return -1;
 878
 879
 880         /* Check that subport configuration is valid */
 881         s = port->subport + subport_id;
 882         if (s->tb_period == 0)
 883                 return -2;
 884
 885         p = port->pipe + (subport_id * port->n_pipes_per_subport + pipe_id);
 886
 887         /* Handle the case when pipe already has a valid configuration */
 888         if (p->tb_time) {
 889                 params = port->pipe_profiles + p->profile;
 890
 891 #ifdef RTE_SCHED_SUBPORT_TC_OV
 892                 double subport_tc3_rate = (double) s->tc_credits_per_period[3]
 893                         / (double) s->tc_period;
 894                 double pipe_tc3_rate = (double) params->tc_credits_per_period[3]
 895                         / (double) params->tc_period;
 896                 uint32_t tc3_ov = s->tc_ov;
 897
 898                 /* Unplug pipe from its subport */
 899                 s->tc_ov_n -= params->tc_ov_weight;
 900                 s->tc_ov_rate -= pipe_tc3_rate;
 901                 s->tc_ov = s->tc_ov_rate > subport_tc3_rate;
 902
 903                 if (s->tc_ov != tc3_ov) {
 904                         RTE_LOG(DEBUG, SCHED,
 905                                 "Subport %u TC3 oversubscription is OFF (%.4lf >= %.4lf)\n",
 906                                 subport_id, subport_tc3_rate, s->tc_ov_rate);
 907                 }
 908 #endif
 909
 910                 /* Reset the pipe */
 911                 memset(p, 0, sizeof(struct rte_sched_pipe));
 912         }
 913
 914         if (deactivate)
 915                 return 0;
 916
 917         /* Apply the new pipe configuration */
 918         p->profile = profile;
 919         params = port->pipe_profiles + p->profile;
 920
 921         /* Token Bucket (TB) */
 922         p->tb_time = port->time;
 923         p->tb_credits = params->tb_size / 2;
 924
 925         /* Traffic Classes (TCs) */
 926         p->tc_time = port->time + params->tc_period;
 927         for (i = 0; i < RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE; i++)
 928                 p->tc_credits[i] = params->tc_credits_per_period[i];
 929
 930 #ifdef RTE_SCHED_SUBPORT_TC_OV
 931         {
 932                 /* Subport TC3 oversubscription */
 933                 double subport_tc3_rate = (double) s->tc_credits_per_period[3]
 934                         / (double) s->tc_period;
 935                 double pipe_tc3_rate = (double) params->tc_credits_per_period[3]
 936                         / (double) params->tc_period;
 937                 uint32_t tc3_ov = s->tc_ov;
 938
 939                 s->tc_ov_n += params->tc_ov_weight;
 940                 s->tc_ov_rate += pipe_tc3_rate;
 941                 s->tc_ov = s->tc_ov_rate > subport_tc3_rate;
 942
 943                 if (s->tc_ov != tc3_ov) {
 944                         RTE_LOG(DEBUG, SCHED,
 945                                 "Subport %u TC3 oversubscription is ON (%.4lf < %.4lf)\n",
 946                                 subport_id, subport_tc3_rate, s->tc_ov_rate);
 947                 }
 948                 p->tc_ov_period_id = s->tc_ov_period_id;
 949                 p->tc_ov_credits = s->tc_ov_wm;
 950         }
 951 #endif
 952
 953         return 0;
 954 }
 955
 956 void
 957 rte_sched_port_pkt_write(struct rte_mbuf *pkt,
 958                          uint32_t subport, uint32_t pipe, uint32_t traffic_class,
 959                          uint32_t queue, enum rte_meter_color color)
 960 {
 961         struct rte_sched_port_hierarchy *sched
 962                 = (struct rte_sched_port_hierarchy *) &pkt->hash.sched;
 963
 964         RTE_BUILD_BUG_ON(sizeof(*sched) > sizeof(pkt->hash.sched));
 965
 966         sched->color = (uint32_t) color;
 967         sched->subport = subport;
 968         sched->pipe = pipe;
 969         sched->traffic_class = traffic_class;
 970         sched->queue = queue;
 971 }
 972
 973 void
 974 rte_sched_port_pkt_read_tree_path(const struct rte_mbuf *pkt,
 975                                   uint32_t *subport, uint32_t *pipe,
 976                                   uint32_t *traffic_class, uint32_t *queue)
 977 {
 978         const struct rte_sched_port_hierarchy *sched
 979                 = (const struct rte_sched_port_hierarchy *) &pkt->hash.sched;
 980
 981         *subport = sched->subport;
 982         *pipe = sched->pipe;
 983         *traffic_class = sched->traffic_class;
 984         *queue = sched->queue;
 985 }
 986
 987 enum rte_meter_color
 988 rte_sched_port_pkt_read_color(const struct rte_mbuf *pkt)
 989 {
 990         const struct rte_sched_port_hierarchy *sched
 991                 = (const struct rte_sched_port_hierarchy *) &pkt->hash.sched;
 992
 993         return (enum rte_meter_color) sched->color;
 994 }
 995
 996 int
 997 rte_sched_subport_read_stats(struct rte_sched_port *port,
 998                              uint32_t subport_id,
 999                              struct rte_sched_subport_stats *stats,
1000                              uint32_t *tc_ov)
1001 {
1002         struct rte_sched_subport *s;
1003
1004         /* Check user parameters */
1005         if (port == NULL || subport_id >= port->n_subports_per_port ||
1006             stats == NULL || tc_ov == NULL)
1007                 return -1;
1008
1009         s = port->subport + subport_id;
1010
1011         /* Copy subport stats and clear */
1012         memcpy(stats, &s->stats, sizeof(struct rte_sched_subport_stats));
1013         memset(&s->stats, 0, sizeof(struct rte_sched_subport_stats));
1014
1015         /* Subport TC ovesubscription status */
1016         *tc_ov = s->tc_ov;
1017
1018         return 0;
1019 }
1020
1021 int
1022 rte_sched_queue_read_stats(struct rte_sched_port *port,
1023         uint32_t queue_id,
1024         struct rte_sched_queue_stats *stats,
1025         uint16_t *qlen)
1026 {
1027         struct rte_sched_queue *q;
1028         struct rte_sched_queue_extra *qe;
1029
1030         /* Check user parameters */
1031         if ((port == NULL) ||
1032             (queue_id >= rte_sched_port_queues_per_port(port)) ||
1033                 (stats == NULL) ||
1034                 (qlen == NULL)) {
1035                 return -1;
1036         }
1037         q = port->queue + queue_id;
1038         qe = port->queue_extra + queue_id;
1039
1040         /* Copy queue stats and clear */
1041         memcpy(stats, &qe->stats, sizeof(struct rte_sched_queue_stats));
1042         memset(&qe->stats, 0, sizeof(struct rte_sched_queue_stats));
1043
1044         /* Queue length */
1045         *qlen = q->qw - q->qr;
1046
1047         return 0;
1048 }
1049
1050 static inline uint32_t
1051 rte_sched_port_qindex(struct rte_sched_port *port, uint32_t subport, uint32_t pipe, uint32_t traffic_class, uint32_t queue)
1052 {
1053         uint32_t result;
1054
1055         result = subport * port->n_pipes_per_subport + pipe;
1056         result = result * RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE + traffic_class;
1057         result = result * RTE_SCHED_QUEUES_PER_TRAFFIC_CLASS + queue;
1058
1059         return result;
1060 }
1061
1062 #ifdef RTE_SCHED_DEBUG
1063
1064 static inline int
1065 rte_sched_port_queue_is_empty(struct rte_sched_port *port, uint32_t qindex)
1066 {
1067         struct rte_sched_queue *queue = port->queue + qindex;
1068
1069         return queue->qr == queue->qw;
1070 }
1071
1072 #endif /* RTE_SCHED_DEBUG */
1073
1074 #ifdef RTE_SCHED_COLLECT_STATS
1075
1076 static inline void
1077 rte_sched_port_update_subport_stats(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1078 {
1079         struct rte_sched_subport *s = port->subport + (qindex / rte_sched_port_queues_per_subport(port));
1080         uint32_t tc_index = (qindex >> 2) & 0x3;
1081         uint32_t pkt_len = pkt->pkt_len;
1082
1083         s->stats.n_pkts_tc[tc_index] += 1;
1084         s->stats.n_bytes_tc[tc_index] += pkt_len;
1085 }
1086
1087 #ifdef RTE_SCHED_RED
1088 static inline void
1089 rte_sched_port_update_subport_stats_on_drop(struct rte_sched_port *port,
1090                                                 uint32_t qindex,
1091                                                 struct rte_mbuf *pkt, uint32_t red)
1092 #else
1093 static inline void
1094 rte_sched_port_update_subport_stats_on_drop(struct rte_sched_port *port,
1095                                                 uint32_t qindex,
1096                                                 struct rte_mbuf *pkt, __rte_unused uint32_t red)
1097 #endif
1098 {
1099         struct rte_sched_subport *s = port->subport + (qindex / rte_sched_port_queues_per_subport(port));
1100         uint32_t tc_index = (qindex >> 2) & 0x3;
1101         uint32_t pkt_len = pkt->pkt_len;
1102
1103         s->stats.n_pkts_tc_dropped[tc_index] += 1;
1104         s->stats.n_bytes_tc_dropped[tc_index] += pkt_len;
1105 #ifdef RTE_SCHED_RED
1106         s->stats.n_pkts_red_dropped[tc_index] += red;
1107 #endif
1108 }
1109
1110 static inline void
1111 rte_sched_port_update_queue_stats(struct rte_sched_port *port, uint32_t qindex, struct rte_mbuf *pkt)
1112 {
1113         struct rte_sched_queue_extra *qe = port->queue_extra + qindex;
1114         uint32_t pkt_len = pkt->pkt_len;
1115
1116         qe->stats.n_pkts += 1;
1117         qe->stats.n_bytes += pkt_len;
1118 }
1119
1120 #ifdef RTE_SCHED_RED
1121 static inline void
1122 rte_sched_port_update_queue_stats_on_drop(struct rte_sched_port *port,
1123                                                 uint32_t qindex,
1124                                                 struct rte_mbuf *pkt, uint32_t red)
1125 #else
1126 static inline void
1127 rte_sched_port_update_queue_stats_on_drop(struct rte_sched_port *port,
1128                                                 uint32_t qindex,
1129                                                 struct rte_mbuf *pkt, __rte_unused uint32_t red)
1130 #endif
1131 {
1132         struct rte_sched_queue_extra *qe = port->queue_extra + qindex;
1133         uint32_t pkt_len = pkt->pkt_len;
1134
1135         qe->stats.n_pkts_dropped += 1;
1136         qe->stats.n_bytes_dropped += pkt_len;
1137 #ifdef RTE_SCHED_RED
1138         qe->stats.n_pkts_red_dropped += red;
1139 #endif
1140 }
1141
1142 #endif /* RTE_SCHED_COLLECT_STATS */
1143
1144 #ifdef RTE_SCHED_RED
1145
1146 static inline int
1147 rte_sched_port_red_drop(struct rte_sched_port *port, struct rte_mbuf *pkt, uint32_t qindex, uint16_t qlen)
1148 {
1149         struct rte_sched_queue_extra *qe;
1150         struct rte_red_config *red_cfg;
1151         struct rte_red *red;
1152         uint32_t tc_index;
1153         enum rte_meter_color color;
1154
1155         tc_index = (qindex >> 2) & 0x3;
1156         color = rte_sched_port_pkt_read_color(pkt);
1157         red_cfg = &port->red_config[tc_index][color];
1158
1159         if ((red_cfg->min_th | red_cfg->max_th) == 0)
1160                 return 0;
1161
1162         qe = port->queue_extra + qindex;
1163         red = &qe->red;
1164
1165         return rte_red_enqueue(red_cfg, red, qlen, port->time);
1166 }
1167
1168 static inline void
1169 rte_sched_port_set_queue_empty_timestamp(struct rte_sched_port *port, uint32_t qindex)
1170 {
1171         struct rte_sched_queue_extra *qe = port->queue_extra + qindex;
1172         struct rte_red *red = &qe->red;
1173
1174         rte_red_mark_queue_empty(red, port->time);
1175 }
1176
1177 #else
1178
1179 #define rte_sched_port_red_drop(port, pkt, qindex, qlen)             0
1180
1181 #define rte_sched_port_set_queue_empty_timestamp(port, qindex)
1182
1183 #endif /* RTE_SCHED_RED */
1184
1185 #ifdef RTE_SCHED_DEBUG
1186
1187 static inline void
1188 debug_check_queue_slab(struct rte_sched_port *port, uint32_t bmp_pos,
1189                        uint64_t bmp_slab)
1190 {
1191         uint64_t mask;
1192         uint32_t i, panic;
1193
1194         if (bmp_slab == 0)
1195                 rte_panic("Empty slab at position %u\n", bmp_pos);
1196
1197         panic = 0;
1198         for (i = 0, mask = 1; i < 64; i++, mask <<= 1) {
1199                 if (mask & bmp_slab) {
1200                         if (rte_sched_port_queue_is_empty(port, bmp_pos + i)) {
1201                                 printf("Queue %u (slab offset %u) is empty\n", bmp_pos + i, i);
1202                                 panic = 1;
1203                         }
1204                 }
1205         }
1206
1207         if (panic)
1208                 rte_panic("Empty queues in slab 0x%" PRIx64 "starting at position %u\n",
1209                         bmp_slab, bmp_pos);
1210 }
1211
1212 #endif /* RTE_SCHED_DEBUG */
1213
1214 static inline uint32_t
1215 rte_sched_port_enqueue_qptrs_prefetch0(struct rte_sched_port *port,
1216                                        struct rte_mbuf *pkt)
1217 {
1218         struct rte_sched_queue *q;
1219 #ifdef RTE_SCHED_COLLECT_STATS
1220         struct rte_sched_queue_extra *qe;
1221 #endif
1222         uint32_t subport, pipe, traffic_class, queue, qindex;
1223
1224         rte_sched_port_pkt_read_tree_path(pkt, &subport, &pipe, &traffic_class, &queue);
1225
1226         qindex = rte_sched_port_qindex(port, subport, pipe, traffic_class, queue);
1227         q = port->queue + qindex;
1228         rte_prefetch0(q);
1229 #ifdef RTE_SCHED_COLLECT_STATS
1230         qe = port->queue_extra + qindex;
1231         rte_prefetch0(qe);
1232 #endif
1233
1234         return qindex;
1235 }
1236
1237 static inline void
1238 rte_sched_port_enqueue_qwa_prefetch0(struct rte_sched_port *port,
1239                                      uint32_t qindex, struct rte_mbuf **qbase)
1240 {
1241         struct rte_sched_queue *q;
1242         struct rte_mbuf **q_qw;
1243         uint16_t qsize;
1244
1245         q = port->queue + qindex;
1246         qsize = rte_sched_port_qsize(port, qindex);
1247         q_qw = qbase + (q->qw & (qsize - 1));
1248
1249         rte_prefetch0(q_qw);
1250         rte_bitmap_prefetch0(port->bmp, qindex);
1251 }
1252
1253 static inline int
1254 rte_sched_port_enqueue_qwa(struct rte_sched_port *port, uint32_t qindex,
1255                            struct rte_mbuf **qbase, struct rte_mbuf *pkt)
1256 {
1257         struct rte_sched_queue *q;
1258         uint16_t qsize;
1259         uint16_t qlen;
1260
1261         q = port->queue + qindex;
1262         qsize = rte_sched_port_qsize(port, qindex);
1263         qlen = q->qw - q->qr;
1264
1265         /* Drop the packet (and update drop stats) when queue is full */
1266         if (unlikely(rte_sched_port_red_drop(port, pkt, qindex, qlen) ||
1267                      (qlen >= qsize))) {
1268                 rte_pktmbuf_free(pkt);
1269 #ifdef RTE_SCHED_COLLECT_STATS
1270                 rte_sched_port_update_subport_stats_on_drop(port, qindex, pkt,
1271                                                             qlen < qsize);
1272                 rte_sched_port_update_queue_stats_on_drop(port, qindex, pkt,
1273                                                           qlen < qsize);
1274 #endif
1275                 return 0;
1276         }
1277
1278         /* Enqueue packet */
1279         qbase[q->qw & (qsize - 1)] = pkt;
1280         q->qw++;
1281
1282         /* Activate queue in the port bitmap */
1283         rte_bitmap_set(port->bmp, qindex);
1284
1285         /* Statistics */
1286 #ifdef RTE_SCHED_COLLECT_STATS
1287         rte_sched_port_update_subport_stats(port, qindex, pkt);
1288         rte_sched_port_update_queue_stats(port, qindex, pkt);
1289 #endif
1290
1291         return 1;
1292 }
1293
1294
1295 /*
1296  * The enqueue function implements a 4-level pipeline with each stage
1297  * processing two different packets. The purpose of using a pipeline
1298  * is to hide the latency of prefetching the data structures. The
1299  * naming convention is presented in the diagram below:
1300  *
1301  *   p00  _______   p10  _______   p20  _______   p30  _______
1302  * ----->|       |----->|       |----->|       |----->|       |----->
1303  *       |   0   |      |   1   |      |   2   |      |   3   |
1304  * ----->|_______|----->|_______|----->|_______|----->|_______|----->
1305  *   p01            p11            p21            p31
1306  *
1307  */
1308 int
1309 rte_sched_port_enqueue(struct rte_sched_port *port, struct rte_mbuf **pkts,
1310                        uint32_t n_pkts)
1311 {
1312         struct rte_mbuf *pkt00, *pkt01, *pkt10, *pkt11, *pkt20, *pkt21,
1313                 *pkt30, *pkt31, *pkt_last;
1314         struct rte_mbuf **q00_base, **q01_base, **q10_base, **q11_base,
1315                 **q20_base, **q21_base, **q30_base, **q31_base, **q_last_base;
1316         uint32_t q00, q01, q10, q11, q20, q21, q30, q31, q_last;
1317         uint32_t r00, r01, r10, r11, r20, r21, r30, r31, r_last;
1318         uint32_t result, i;
1319
1320         result = 0;
1321
1322         /*
1323          * Less then 6 input packets available, which is not enough to
1324          * feed the pipeline
1325          */
1326         if (unlikely(n_pkts < 6)) {
1327                 struct rte_mbuf **q_base[5];
1328                 uint32_t q[5];
1329
1330                 /* Prefetch the mbuf structure of each packet */
1331                 for (i = 0; i < n_pkts; i++)
1332                         rte_prefetch0(pkts[i]);
1333
1334                 /* Prefetch the queue structure for each queue */
1335                 for (i = 0; i < n_pkts; i++)
1336                         q[i] = rte_sched_port_enqueue_qptrs_prefetch0(port,
1337                                                                       pkts[i]);
1338
1339                 /* Prefetch the write pointer location of each queue */
1340                 for (i = 0; i < n_pkts; i++) {
1341                         q_base[i] = rte_sched_port_qbase(port, q[i]);
1342                         rte_sched_port_enqueue_qwa_prefetch0(port, q[i],
1343                                                              q_base[i]);
1344                 }
1345
1346                 /* Write each packet to its queue */
1347                 for (i = 0; i < n_pkts; i++)
1348                         result += rte_sched_port_enqueue_qwa(port, q[i],
1349                                                              q_base[i], pkts[i]);
1350
1351                 return result;
1352         }
1353
1354         /* Feed the first 3 stages of the pipeline (6 packets needed) */
1355         pkt20 = pkts[0];
1356         pkt21 = pkts[1];
1357         rte_prefetch0(pkt20);
1358         rte_prefetch0(pkt21);
1359
1360         pkt10 = pkts[2];
1361         pkt11 = pkts[3];
1362         rte_prefetch0(pkt10);
1363         rte_prefetch0(pkt11);
1364
1365         q20 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt20);
1366         q21 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt21);
1367
1368         pkt00 = pkts[4];
1369         pkt01 = pkts[5];
1370         rte_prefetch0(pkt00);
1371         rte_prefetch0(pkt01);
1372
1373         q10 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt10);
1374         q11 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt11);
1375
1376         q20_base = rte_sched_port_qbase(port, q20);
1377         q21_base = rte_sched_port_qbase(port, q21);
1378         rte_sched_port_enqueue_qwa_prefetch0(port, q20, q20_base);
1379         rte_sched_port_enqueue_qwa_prefetch0(port, q21, q21_base);
1380
1381         /* Run the pipeline */
1382         for (i = 6; i < (n_pkts & (~1)); i += 2) {
1383                 /* Propagate stage inputs */
1384                 pkt30 = pkt20;
1385                 pkt31 = pkt21;
1386                 pkt20 = pkt10;
1387                 pkt21 = pkt11;
1388                 pkt10 = pkt00;
1389                 pkt11 = pkt01;
1390                 q30 = q20;
1391                 q31 = q21;
1392                 q20 = q10;
1393                 q21 = q11;
1394                 q30_base = q20_base;
1395                 q31_base = q21_base;
1396
1397                 /* Stage 0: Get packets in */
1398                 pkt00 = pkts[i];
1399                 pkt01 = pkts[i + 1];
1400                 rte_prefetch0(pkt00);
1401                 rte_prefetch0(pkt01);
1402
1403                 /* Stage 1: Prefetch queue structure storing queue pointers */
1404                 q10 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt10);
1405                 q11 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt11);
1406
1407                 /* Stage 2: Prefetch queue write location */
1408                 q20_base = rte_sched_port_qbase(port, q20);
1409                 q21_base = rte_sched_port_qbase(port, q21);
1410                 rte_sched_port_enqueue_qwa_prefetch0(port, q20, q20_base);
1411                 rte_sched_port_enqueue_qwa_prefetch0(port, q21, q21_base);
1412
1413                 /* Stage 3: Write packet to queue and activate queue */
1414                 r30 = rte_sched_port_enqueue_qwa(port, q30, q30_base, pkt30);
1415                 r31 = rte_sched_port_enqueue_qwa(port, q31, q31_base, pkt31);
1416                 result += r30 + r31;
1417         }
1418
1419         /*
1420          * Drain the pipeline (exactly 6 packets).
1421          * Handle the last packet in the case
1422          * of an odd number of input packets.
1423          */
1424         pkt_last = pkts[n_pkts - 1];
1425         rte_prefetch0(pkt_last);
1426
1427         q00 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt00);
1428         q01 = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt01);
1429
1430         q10_base = rte_sched_port_qbase(port, q10);
1431         q11_base = rte_sched_port_qbase(port, q11);
1432         rte_sched_port_enqueue_qwa_prefetch0(port, q10, q10_base);
1433         rte_sched_port_enqueue_qwa_prefetch0(port, q11, q11_base);
1434
1435         r20 = rte_sched_port_enqueue_qwa(port, q20, q20_base, pkt20);
1436         r21 = rte_sched_port_enqueue_qwa(port, q21, q21_base, pkt21);
1437         result += r20 + r21;
1438
1439         q_last = rte_sched_port_enqueue_qptrs_prefetch0(port, pkt_last);
1440
1441         q00_base = rte_sched_port_qbase(port, q00);
1442         q01_base = rte_sched_port_qbase(port, q01);
1443         rte_sched_port_enqueue_qwa_prefetch0(port, q00, q00_base);
1444         rte_sched_port_enqueue_qwa_prefetch0(port, q01, q01_base);
1445
1446         r10 = rte_sched_port_enqueue_qwa(port, q10, q10_base, pkt10);
1447         r11 = rte_sched_port_enqueue_qwa(port, q11, q11_base, pkt11);
1448         result += r10 + r11;
1449
1450         q_last_base = rte_sched_port_qbase(port, q_last);
1451         rte_sched_port_enqueue_qwa_prefetch0(port, q_last, q_last_base);
1452
1453         r00 = rte_sched_port_enqueue_qwa(port, q00, q00_base, pkt00);
1454         r01 = rte_sched_port_enqueue_qwa(port, q01, q01_base, pkt01);
1455         result += r00 + r01;
1456
1457         if (n_pkts & 1) {
1458                 r_last = rte_sched_port_enqueue_qwa(port, q_last, q_last_base, pkt_last);
1459                 result += r_last;
1460         }
1461
1462         return result;
1463 }
1464
1465 #ifndef RTE_SCHED_SUBPORT_TC_OV
1466
1467 static inline void
1468 grinder_credits_update(struct rte_sched_port *port, uint32_t pos)
1469 {
1470         struct rte_sched_grinder *grinder = port->grinder + pos;
1471         struct rte_sched_subport *subport = grinder->subport;
1472         struct rte_sched_pipe *pipe = grinder->pipe;
1473         struct rte_sched_pipe_profile *params = grinder->pipe_params;
1474         uint64_t n_periods;
1475
1476         /* Subport TB */
1477         n_periods = (port->time - subport->tb_time) / subport->tb_period;
1478         subport->tb_credits += n_periods * subport->tb_credits_per_period;
1479         subport->tb_credits = rte_sched_min_val_2_u32(subport->tb_credits, subport->tb_size);
1480         subport->tb_time += n_periods * subport->tb_period;
1481
1482         /* Pipe TB */
1483         n_periods = (port->time - pipe->tb_time) / params->tb_period;
1484         pipe->tb_credits += n_periods * params->tb_credits_per_period;
1485         pipe->tb_credits = rte_sched_min_val_2_u32(pipe->tb_credits, params->tb_size);
1486         pipe->tb_time += n_periods * params->tb_period;
1487
1488         /* Subport TCs */
1489         if (unlikely(port->time >= subport->tc_time)) {
1490                 subport->tc_credits[0] = subport->tc_credits_per_period[0];
1491                 subport->tc_credits[1] = subport->tc_credits_per_period[1];
1492                 subport->tc_credits[2] = subport->tc_credits_per_period[2];
1493                 subport->tc_credits[3] = subport->tc_credits_per_period[3];
1494                 subport->tc_time = port->time + subport->tc_period;
1495         }
1496
1497         /* Pipe TCs */
1498         if (unlikely(port->time >= pipe->tc_time)) {
1499                 pipe->tc_credits[0] = params->tc_credits_per_period[0];
1500                 pipe->tc_credits[1] = params->tc_credits_per_period[1];
1501                 pipe->tc_credits[2] = params->tc_credits_per_period[2];
1502                 pipe->tc_credits[3] = params->tc_credits_per_period[3];
1503                 pipe->tc_time = port->time + params->tc_period;
1504         }
1505 }
1506
1507 #else
1508
1509 static inline uint32_t
1510 grinder_tc_ov_credits_update(struct rte_sched_port *port, uint32_t pos)
1511 {
1512         struct rte_sched_grinder *grinder = port->grinder + pos;
1513         struct rte_sched_subport *subport = grinder->subport;
1514         uint32_t tc_ov_consumption[RTE_SCHED_TRAFFIC_CLASSES_PER_PIPE];
1515         uint32_t tc_ov_consumption_max;
1516         uint32_t tc_ov_wm = subport->tc_ov_wm;
1517
1518         if (subport->tc_ov == 0)
1519                 return subport->tc_ov_wm_max;
1520
1521         tc_ov_consumption[0] = subport->tc_credits_per_period[0] - subport->tc_credits[0];
1522         tc_ov_consumption[1] = subport->tc_credits_per_period[1] - subport->tc_credits[1];
1523         tc_ov_consumption[2] = subport->tc_credits_per_period[2] - subport->tc_credits[2];
1524         tc_ov_consumption[3] = subport->tc_credits_per_period[3] - subport->tc_credits[3];
1525
1526         tc_ov_consumption_max = subport->tc_credits_per_period[3] -
1527                 (tc_ov_consumption[0] + tc_ov_consumption[1] + tc_ov_consumption[2]);
1528
1529         if (tc_ov_consumption[3] > (tc_ov_consumption_max - port->mtu)) {
1530                 tc_ov_wm  -= tc_ov_wm >> 7;
1531                 if (tc_ov_wm < subport->tc_ov_wm_min)
1532                         tc_ov_wm = subport->tc_ov_wm_min;
1533
1534                 return tc_ov_wm;
1535         }
1536
1537         tc_ov_wm += (tc_ov_wm >> 7) + 1;
1538         if (tc_ov_wm > subport->tc_ov_wm_max)
1539                 tc_ov_wm = subport->tc_ov_wm_max;
1540
1541         return tc_ov_wm;
1542 }
1543
1544 static inline void
1545 grinder_credits_update(struct rte_sched_port *port, uint32_t pos)
1546 {
1547         struct rte_sched_grinder *grinder = port->grinder + pos;
1548         struct rte_sched_subport *subport = grinder->subport;
1549         struct rte_sched_pipe *pipe = grinder->pipe;
1550         struct rte_sched_pipe_profile *params = grinder->pipe_params;
1551         uint64_t n_periods;
1552
1553         /* Subport TB */
1554         n_periods = (port->time - subport->tb_time) / subport->tb_period;
1555         subport->tb_credits += n_periods * subport->tb_credits_per_period;
1556         subport->tb_credits = rte_sched_min_val_2_u32(subport->tb_credits, subport->tb_size);
1557         subport->tb_time += n_periods * subport->tb_period;
1558
1559         /* Pipe TB */
1560         n_periods = (port->time - pipe->tb_time) / params->tb_period;
1561         pipe->tb_credits += n_periods * params->tb_credits_per_period;
1562         pipe->tb_credits = rte_sched_min_val_2_u32(pipe->tb_credits, params->tb_size);
1563         pipe->tb_time += n_periods * params->tb_period;
1564
1565         /* Subport TCs */
1566         if (unlikely(port->time >= subport->tc_time)) {
1567                 subport->tc_ov_wm = grinder_tc_ov_credits_update(port, pos);
1568
1569                 subport->tc_credits[0] = subport->tc_credits_per_period[0];
1570                 subport->tc_credits[1] = subport->tc_credits_per_period[1];
1571                 subport->tc_credits[2] = subport->tc_credits_per_period[2];
1572                 subport->tc_credits[3] = subport->tc_credits_per_period[3];
1573
1574                 subport->tc_time = port->time + subport->tc_period;
1575                 subport->tc_ov_period_id++;
1576         }
1577
1578         /* Pipe TCs */
1579         if (unlikely(port->time >= pipe->tc_time)) {
1580                 pipe->tc_credits[0] = params->tc_credits_per_period[0];
1581                 pipe->tc_credits[1] = params->tc_credits_per_period[1];
1582                 pipe->tc_credits[2] = params->tc_credits_per_period[2];
1583                 pipe->tc_credits[3] = params->tc_credits_per_period[3];
1584                 pipe->tc_time = port->time + params->tc_period;
1585         }
1586
1587         /* Pipe TCs - Oversubscription */
1588         if (unlikely(pipe->tc_ov_period_id != subport->tc_ov_period_id)) {
1589                 pipe->tc_ov_credits = subport->tc_ov_wm * params->tc_ov_weight;
1590
1591                 pipe->tc_ov_period_id = subport->tc_ov_period_id;
1592         }
1593 }
1594
1595 #endif /* RTE_SCHED_TS_CREDITS_UPDATE, RTE_SCHED_SUBPORT_TC_OV */
1596
1597
1598 #ifndef RTE_SCHED_SUBPORT_TC_OV
1599
1600 static inline int
1601 grinder_credits_check(struct rte_sched_port *port, uint32_t pos)
1602 {
1603         struct rte_sched_grinder *grinder = port->grinder + pos;
1604         struct rte_sched_subport *subport = grinder->subport;
1605         struct rte_sched_pipe *pipe = grinder->pipe;
1606         struct rte_mbuf *pkt = grinder->pkt;
1607         uint32_t tc_index = grinder->tc_index;
1608         uint32_t pkt_len = pkt->pkt_len + port->frame_overhead;
1609         uint32_t subport_tb_credits = subport->tb_credits;
1610         uint32_t subport_tc_credits = subport->tc_credits[tc_index];
1611         uint32_t pipe_tb_credits = pipe->tb_credits;
1612         uint32_t pipe_tc_credits = pipe->tc_credits[tc_index];
1613         int enough_credits;
1614
1615         /* Check queue credits */
1616         enough_credits = (pkt_len <= subport_tb_credits) &&
1617                 (pkt_len <= subport_tc_credits) &&
1618                 (pkt_len <= pipe_tb_credits) &&
1619                 (pkt_len <= pipe_tc_credits);
1620
1621         if (!enough_credits)
1622                 return 0;
1623
1624         /* Update port credits */
1625         subport->tb_credits -= pkt_len;
1626         subport->tc_credits[tc_index] -= pkt_len;
1627         pipe->tb_credits -= pkt_len;
1628         pipe->tc_credits[tc_index] -= pkt_len;
1629
1630         return 1;
1631 }
1632
1633 #else
1634
1635 static inline int
1636 grinder_credits_check(struct rte_sched_port *port, uint32_t pos)
1637 {
1638         struct rte_sched_grinder *grinder = port->grinder + pos;
1639         struct rte_sched_subport *subport = grinder->subport;
1640         struct rte_sched_pipe *pipe = grinder->pipe;
1641         struct rte_mbuf *pkt = grinder->pkt;
1642         uint32_t tc_index = grinder->tc_index;
1643         uint32_t pkt_len = pkt->pkt_len + port->frame_overhead;
1644         uint32_t subport_tb_credits = subport->tb_credits;
1645         uint32_t subport_tc_credits = subport->tc_credits[tc_index];
1646         uint32_t pipe_tb_credits = pipe->tb_credits;
1647         uint32_t pipe_tc_credits = pipe->tc_credits[tc_index];
1648         uint32_t pipe_tc_ov_mask1[] = {UINT32_MAX, UINT32_MAX, UINT32_MAX, pipe->tc_ov_credits};
1649         uint32_t pipe_tc_ov_mask2[] = {0, 0, 0, UINT32_MAX};
1650         uint32_t pipe_tc_ov_credits = pipe_tc_ov_mask1[tc_index];
1651         int enough_credits;
1652
1653         /* Check pipe and subport credits */
1654         enough_credits = (pkt_len <= subport_tb_credits) &&
1655                 (pkt_len <= subport_tc_credits) &&
1656                 (pkt_len <= pipe_tb_credits) &&
1657                 (pkt_len <= pipe_tc_credits) &&
1658                 (pkt_len <= pipe_tc_ov_credits);
1659
1660         if (!enough_credits)
1661                 return 0;
1662
1663         /* Update pipe and subport credits */
1664         subport->tb_credits -= pkt_len;
1665         subport->tc_credits[tc_index] -= pkt_len;
1666         pipe->tb_credits -= pkt_len;
1667         pipe->tc_credits[tc_index] -= pkt_len;
1668         pipe->tc_ov_credits -= pipe_tc_ov_mask2[tc_index] & pkt_len;
1669
1670         return 1;
1671 }
1672
1673 #endif /* RTE_SCHED_SUBPORT_TC_OV */
1674
1675
1676 static inline int
1677 grinder_schedule(struct rte_sched_port *port, uint32_t pos)
1678 {
1679         struct rte_sched_grinder *grinder = port->grinder + pos;
1680         struct rte_sched_queue *queue = grinder->queue[grinder->qpos];
1681         struct rte_mbuf *pkt = grinder->pkt;
1682         uint32_t pkt_len = pkt->pkt_len + port->frame_overhead;
1683
1684         if (!grinder_credits_check(port, pos))
1685                 return 0;
1686
1687         /* Advance port time */
1688         port->time += pkt_len;
1689
1690         /* Send packet */
1691         port->pkts_out[port->n_pkts_out++] = pkt;
1692         queue->qr++;
1693         grinder->wrr_tokens[grinder->qpos] += pkt_len * grinder->wrr_cost[grinder->qpos];
1694         if (queue->qr == queue->qw) {
1695                 uint32_t qindex = grinder->qindex[grinder->qpos];
1696
1697                 rte_bitmap_clear(port->bmp, qindex);
1698                 grinder->qmask &= ~(1 << grinder->qpos);
1699                 grinder->wrr_mask[grinder->qpos] = 0;
1700                 rte_sched_port_set_queue_empty_timestamp(port, qindex);
1701         }
1702
1703         /* Reset pipe loop detection */
1704         port->pipe_loop = RTE_SCHED_PIPE_INVALID;
1705         grinder->productive = 1;
1706
1707         return 1;
1708 }
1709
1710 #ifdef SCHED_VECTOR_SSE4
1711
1712 static inline int
1713 grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe)
1714 {
1715         __m128i index = _mm_set1_epi32(base_pipe);
1716         __m128i pipes = _mm_load_si128((__m128i *)port->grinder_base_bmp_pos);
1717         __m128i res = _mm_cmpeq_epi32(pipes, index);
1718
1719         pipes = _mm_load_si128((__m128i *)(port->grinder_base_bmp_pos + 4));
1720         pipes = _mm_cmpeq_epi32(pipes, index);
1721         res = _mm_or_si128(res, pipes);
1722
1723         if (_mm_testz_si128(res, res))
1724                 return 0;
1725
1726         return 1;
1727 }
1728
1729 #else
1730
1731 static inline int
1732 grinder_pipe_exists(struct rte_sched_port *port, uint32_t base_pipe)
1733 {
1734         uint32_t i;
1735
1736         for (i = 0; i < RTE_SCHED_PORT_N_GRINDERS; i++) {
1737                 if (port->grinder_base_bmp_pos[i] == base_pipe)
1738                         return 1;
1739         }
1740
1741         return 0;
1742 }
1743
1744 #endif /* RTE_SCHED_OPTIMIZATIONS */
1745
1746 static inline void
1747 grinder_pcache_populate(struct rte_sched_port *port, uint32_t pos, uint32_t bmp_pos, uint64_t bmp_slab)
1748 {
1749         struct rte_sched_grinder *grinder = port->grinder + pos;
1750         uint16_t w[4];
1751
1752         grinder->pcache_w = 0;
1753         grinder->pcache_r = 0;
1754
1755         w[0] = (uint16_t) bmp_slab;
1756         w[1] = (uint16_t) (bmp_slab >> 16);
1757         w[2] = (uint16_t) (bmp_slab >> 32);
1758         w[3] = (uint16_t) (bmp_slab >> 48);
1759
1760         grinder->pcache_qmask[grinder->pcache_w] = w[0];
1761         grinder->pcache_qindex[grinder->pcache_w] = bmp_pos;
1762         grinder->pcache_w += (w[0] != 0);
1763
1764         grinder->pcache_qmask[grinder->pcache_w] = w[1];
1765         grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 16;
1766         grinder->pcache_w += (w[1] != 0);
1767
1768         grinder->pcache_qmask[grinder->pcache_w] = w[2];
1769         grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 32;
1770         grinder->pcache_w += (w[2] != 0);
1771
1772         grinder->pcache_qmask[grinder->pcache_w] = w[3];
1773         grinder->pcache_qindex[grinder->pcache_w] = bmp_pos + 48;
1774         grinder->pcache_w += (w[3] != 0);
1775 }
1776
1777 static inline void
1778 grinder_tccache_populate(struct rte_sched_port *port, uint32_t pos, uint32_t qindex, uint16_t qmask)
1779 {
1780         struct rte_sched_grinder *grinder = port->grinder + pos;
1781         uint8_t b[4];
1782
1783         grinder->tccache_w = 0;
1784         grinder->tccache_r = 0;
1785
1786         b[0] = (uint8_t) (qmask & 0xF);
1787         b[1] = (uint8_t) ((qmask >> 4) & 0xF);
1788         b[2] = (uint8_t) ((qmask >> 8) & 0xF);
1789         b[3] = (uint8_t) ((qmask >> 12) & 0xF);
1790
1791         grinder->tccache_qmask[grinder->tccache_w] = b[0];
1792         grinder->tccache_qindex[grinder->tccache_w] = qindex;
1793         grinder->tccache_w += (b[0] != 0);
1794
1795         grinder->tccache_qmask[grinder->tccache_w] = b[1];
1796         grinder->tccache_qindex[grinder->tccache_w] = qindex + 4;
1797         grinder->tccache_w += (b[1] != 0);
1798
1799         grinder->tccache_qmask[grinder->tccache_w] = b[2];
1800         grinder->tccache_qindex[grinder->tccache_w] = qindex + 8;
1801         grinder->tccache_w += (b[2] != 0);
1802
1803         grinder->tccache_qmask[grinder->tccache_w] = b[3];
1804         grinder->tccache_qindex[grinder->tccache_w] = qindex + 12;
1805         grinder->tccache_w += (b[3] != 0);
1806 }
1807
1808 static inline int
1809 grinder_next_tc(struct rte_sched_port *port, uint32_t pos)
1810 {
1811         struct rte_sched_grinder *grinder = port->grinder + pos;
1812         struct rte_mbuf **qbase;
1813         uint32_t qindex;
1814         uint16_t qsize;
1815
1816         if (grinder->tccache_r == grinder->tccache_w)
1817                 return 0;
1818
1819         qindex = grinder->tccache_qindex[grinder->tccache_r];
1820         qbase = rte_sched_port_qbase(port, qindex);
1821         qsize = rte_sched_port_qsize(port, qindex);
1822
1823         grinder->tc_index = (qindex >> 2) & 0x3;
1824         grinder->qmask = grinder->tccache_qmask[grinder->tccache_r];
1825         grinder->qsize = qsize;
1826
1827         grinder->qindex[0] = qindex;
1828         grinder->qindex[1] = qindex + 1;
1829         grinder->qindex[2] = qindex + 2;
1830         grinder->qindex[3] = qindex + 3;
1831
1832         grinder->queue[0] = port->queue + qindex;
1833         grinder->queue[1] = port->queue + qindex + 1;
1834         grinder->queue[2] = port->queue + qindex + 2;
1835         grinder->queue[3] = port->queue + qindex + 3;
1836
1837         grinder->qbase[0] = qbase;
1838         grinder->qbase[1] = qbase + qsize;
1839         grinder->qbase[2] = qbase + 2 * qsize;
1840         grinder->qbase[3] = qbase + 3 * qsize;
1841
1842         grinder->tccache_r++;
1843         return 1;
1844 }
1845
1846 static inline int
1847 grinder_next_pipe(struct rte_sched_port *port, uint32_t pos)
1848 {
1849         struct rte_sched_grinder *grinder = port->grinder + pos;
1850         uint32_t pipe_qindex;
1851         uint16_t pipe_qmask;
1852
1853         if (grinder->pcache_r < grinder->pcache_w) {
1854                 pipe_qmask = grinder->pcache_qmask[grinder->pcache_r];
1855                 pipe_qindex = grinder->pcache_qindex[grinder->pcache_r];
1856                 grinder->pcache_r++;
1857         } else {
1858                 uint64_t bmp_slab = 0;
1859                 uint32_t bmp_pos = 0;
1860
1861                 /* Get another non-empty pipe group */
1862                 if (unlikely(rte_bitmap_scan(port->bmp, &bmp_pos, &bmp_slab) <= 0))
1863                         return 0;
1864
1865 #ifdef RTE_SCHED_DEBUG
1866                 debug_check_queue_slab(port, bmp_pos, bmp_slab);
1867 #endif
1868
1869                 /* Return if pipe group already in one of the other grinders */
1870                 port->grinder_base_bmp_pos[pos] = RTE_SCHED_BMP_POS_INVALID;
1871                 if (unlikely(grinder_pipe_exists(port, bmp_pos)))
1872                         return 0;
1873
1874                 port->grinder_base_bmp_pos[pos] = bmp_pos;
1875
1876                 /* Install new pipe group into grinder's pipe cache */
1877                 grinder_pcache_populate(port, pos, bmp_pos, bmp_slab);
1878
1879                 pipe_qmask = grinder->pcache_qmask[0];
1880                 pipe_qindex = grinder->pcache_qindex[0];
1881                 grinder->pcache_r = 1;
1882         }
1883
1884         /* Install new pipe in the grinder */
1885         grinder->pindex = pipe_qindex >> 4;
1886         grinder->subport = port->subport + (grinder->pindex / port->n_pipes_per_subport);
1887         grinder->pipe = port->pipe + grinder->pindex;
1888         grinder->pipe_params = NULL; /* to be set after the pipe structure is prefetched */
1889         grinder->productive = 0;
1890
1891         grinder_tccache_populate(port, pos, pipe_qindex, pipe_qmask);
1892         grinder_next_tc(port, pos);
1893
1894         /* Check for pipe exhaustion */
1895         if (grinder->pindex == port->pipe_loop) {
1896                 port->pipe_exhaustion = 1;
1897                 port->pipe_loop = RTE_SCHED_PIPE_INVALID;
1898         }
1899
1900         return 1;
1901 }
1902
1903
1904 static inline void
1905 grinder_wrr_load(struct rte_sched_port *port, uint32_t pos)
1906 {
1907         struct rte_sched_grinder *grinder = port->grinder + pos;
1908         struct rte_sched_pipe *pipe = grinder->pipe;
1909         struct rte_sched_pipe_profile *pipe_params = grinder->pipe_params;
1910         uint32_t tc_index = grinder->tc_index;
1911         uint32_t qmask = grinder->qmask;
1912         uint32_t qindex;
1913
1914         qindex = tc_index * 4;
1915
1916         grinder->wrr_tokens[0] = ((uint16_t) pipe->wrr_tokens[qindex]) << RTE_SCHED_WRR_SHIFT;
1917         grinder->wrr_tokens[1] = ((uint16_t) pipe->wrr_tokens[qindex + 1]) << RTE_SCHED_WRR_SHIFT;
1918         grinder->wrr_tokens[2] = ((uint16_t) pipe->wrr_tokens[qindex + 2]) << RTE_SCHED_WRR_SHIFT;
1919         grinder->wrr_tokens[3] = ((uint16_t) pipe->wrr_tokens[qindex + 3]) << RTE_SCHED_WRR_SHIFT;
1920
1921         grinder->wrr_mask[0] = (qmask & 0x1) * 0xFFFF;
1922         grinder->wrr_mask[1] = ((qmask >> 1) & 0x1) * 0xFFFF;
1923         grinder->wrr_mask[2] = ((qmask >> 2) & 0x1) * 0xFFFF;
1924         grinder->wrr_mask[3] = ((qmask >> 3) & 0x1) * 0xFFFF;
1925
1926         grinder->wrr_cost[0] = pipe_params->wrr_cost[qindex];
1927         grinder->wrr_cost[1] = pipe_params->wrr_cost[qindex + 1];
1928         grinder->wrr_cost[2] = pipe_params->wrr_cost[qindex + 2];
1929         grinder->wrr_cost[3] = pipe_params->wrr_cost[qindex + 3];
1930 }
1931
1932 static inline void
1933 grinder_wrr_store(struct rte_sched_port *port, uint32_t pos)
1934 {
1935         struct rte_sched_grinder *grinder = port->grinder + pos;
1936         struct rte_sched_pipe *pipe = grinder->pipe;
1937         uint32_t tc_index = grinder->tc_index;
1938         uint32_t qindex;
1939
1940         qindex = tc_index * 4;
1941
1942         pipe->wrr_tokens[qindex] = (grinder->wrr_tokens[0] & grinder->wrr_mask[0])
1943                 >> RTE_SCHED_WRR_SHIFT;
1944         pipe->wrr_tokens[qindex + 1] = (grinder->wrr_tokens[1] & grinder->wrr_mask[1])
1945                 >> RTE_SCHED_WRR_SHIFT;
1946         pipe->wrr_tokens[qindex + 2] = (grinder->wrr_tokens[2] & grinder->wrr_mask[2])
1947                 >> RTE_SCHED_WRR_SHIFT;
1948         pipe->wrr_tokens[qindex + 3] = (grinder->wrr_tokens[3] & grinder->wrr_mask[3])
1949                 >> RTE_SCHED_WRR_SHIFT;
1950 }
1951
1952 static inline void
1953 grinder_wrr(struct rte_sched_port *port, uint32_t pos)
1954 {
1955         struct rte_sched_grinder *grinder = port->grinder + pos;
1956         uint16_t wrr_tokens_min;
1957
1958         grinder->wrr_tokens[0] |= ~grinder->wrr_mask[0];
1959         grinder->wrr_tokens[1] |= ~grinder->wrr_mask[1];
1960         grinder->wrr_tokens[2] |= ~grinder->wrr_mask[2];
1961         grinder->wrr_tokens[3] |= ~grinder->wrr_mask[3];
1962
1963         grinder->qpos = rte_min_pos_4_u16(grinder->wrr_tokens);
1964         wrr_tokens_min = grinder->wrr_tokens[grinder->qpos];
1965
1966         grinder->wrr_tokens[0] -= wrr_tokens_min;
1967         grinder->wrr_tokens[1] -= wrr_tokens_min;
1968         grinder->wrr_tokens[2] -= wrr_tokens_min;
1969         grinder->wrr_tokens[3] -= wrr_tokens_min;
1970 }
1971
1972
1973 #define grinder_evict(port, pos)
1974
1975 static inline void
1976 grinder_prefetch_pipe(struct rte_sched_port *port, uint32_t pos)
1977 {
1978         struct rte_sched_grinder *grinder = port->grinder + pos;
1979
1980         rte_prefetch0(grinder->pipe);
1981         rte_prefetch0(grinder->queue[0]);
1982 }
1983
1984 static inline void
1985 grinder_prefetch_tc_queue_arrays(struct rte_sched_port *port, uint32_t pos)
1986 {
1987         struct rte_sched_grinder *grinder = port->grinder + pos;
1988         uint16_t qsize, qr[4];
1989
1990         qsize = grinder->qsize;
1991         qr[0] = grinder->queue[0]->qr & (qsize - 1);
1992         qr[1] = grinder->queue[1]->qr & (qsize - 1);
1993         qr[2] = grinder->queue[2]->qr & (qsize - 1);
1994         qr[3] = grinder->queue[3]->qr & (qsize - 1);
1995
1996         rte_prefetch0(grinder->qbase[0] + qr[0]);
1997         rte_prefetch0(grinder->qbase[1] + qr[1]);
1998
1999         grinder_wrr_load(port, pos);
2000         grinder_wrr(port, pos);
2001
2002         rte_prefetch0(grinder->qbase[2] + qr[2]);
2003         rte_prefetch0(grinder->qbase[3] + qr[3]);
2004 }
2005
2006 static inline void
2007 grinder_prefetch_mbuf(struct rte_sched_port *port, uint32_t pos)
2008 {
2009         struct rte_sched_grinder *grinder = port->grinder + pos;
2010         uint32_t qpos = grinder->qpos;
2011         struct rte_mbuf **qbase = grinder->qbase[qpos];
2012         uint16_t qsize = grinder->qsize;
2013         uint16_t qr = grinder->queue[qpos]->qr & (qsize - 1);
2014
2015         grinder->pkt = qbase[qr];
2016         rte_prefetch0(grinder->pkt);
2017
2018         if (unlikely((qr & 0x7) == 7)) {
2019                 uint16_t qr_next = (grinder->queue[qpos]->qr + 1) & (qsize - 1);
2020
2021                 rte_prefetch0(qbase + qr_next);
2022         }
2023 }
2024
2025 static inline uint32_t
2026 grinder_handle(struct rte_sched_port *port, uint32_t pos)
2027 {
2028         struct rte_sched_grinder *grinder = port->grinder + pos;
2029
2030         switch (grinder->state) {
2031         case e_GRINDER_PREFETCH_PIPE:
2032         {
2033                 if (grinder_next_pipe(port, pos)) {
2034                         grinder_prefetch_pipe(port, pos);
2035                         port->busy_grinders++;
2036
2037                         grinder->state = e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS;
2038                         return 0;
2039                 }
2040
2041                 return 0;
2042         }
2043
2044         case e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS:
2045         {
2046                 struct rte_sched_pipe *pipe = grinder->pipe;
2047
2048                 grinder->pipe_params = port->pipe_profiles + pipe->profile;
2049                 grinder_prefetch_tc_queue_arrays(port, pos);
2050                 grinder_credits_update(port, pos);
2051
2052                 grinder->state = e_GRINDER_PREFETCH_MBUF;
2053                 return 0;
2054         }
2055
2056         case e_GRINDER_PREFETCH_MBUF:
2057         {
2058                 grinder_prefetch_mbuf(port, pos);
2059
2060                 grinder->state = e_GRINDER_READ_MBUF;
2061                 return 0;
2062         }
2063
2064         case e_GRINDER_READ_MBUF:
2065         {
2066                 uint32_t result = 0;
2067
2068                 result = grinder_schedule(port, pos);
2069
2070                 /* Look for next packet within the same TC */
2071                 if (result && grinder->qmask) {
2072                         grinder_wrr(port, pos);
2073                         grinder_prefetch_mbuf(port, pos);
2074
2075                         return 1;
2076                 }
2077                 grinder_wrr_store(port, pos);
2078
2079                 /* Look for another active TC within same pipe */
2080                 if (grinder_next_tc(port, pos)) {
2081                         grinder_prefetch_tc_queue_arrays(port, pos);
2082
2083                         grinder->state = e_GRINDER_PREFETCH_MBUF;
2084                         return result;
2085                 }
2086
2087                 if (grinder->productive == 0 &&
2088                     port->pipe_loop == RTE_SCHED_PIPE_INVALID)
2089                         port->pipe_loop = grinder->pindex;
2090
2091                 grinder_evict(port, pos);
2092
2093                 /* Look for another active pipe */
2094                 if (grinder_next_pipe(port, pos)) {
2095                         grinder_prefetch_pipe(port, pos);
2096
2097                         grinder->state = e_GRINDER_PREFETCH_TC_QUEUE_ARRAYS;
2098                         return result;
2099                 }
2100
2101                 /* No active pipe found */
2102                 port->busy_grinders--;
2103
2104                 grinder->state = e_GRINDER_PREFETCH_PIPE;
2105                 return result;
2106         }
2107
2108         default:
2109                 rte_panic("Algorithmic error (invalid state)\n");
2110                 return 0;
2111         }
2112 }
2113
2114 static inline void
2115 rte_sched_port_time_resync(struct rte_sched_port *port)
2116 {
2117         uint64_t cycles = rte_get_tsc_cycles();
2118         uint64_t cycles_diff = cycles - port->time_cpu_cycles;
2119         uint64_t bytes_diff;
2120
2121         /* Compute elapsed time in bytes */
2122         bytes_diff = rte_reciprocal_divide(cycles_diff << RTE_SCHED_TIME_SHIFT,
2123                                            port->inv_cycles_per_byte);
2124
2125         /* Advance port time */
2126         port->time_cpu_cycles = cycles;
2127         port->time_cpu_bytes += bytes_diff;
2128         if (port->time < port->time_cpu_bytes)
2129                 port->time = port->time_cpu_bytes;
2130
2131         /* Reset pipe loop detection */
2132         port->pipe_loop = RTE_SCHED_PIPE_INVALID;
2133 }
2134
2135 static inline int
2136 rte_sched_port_exceptions(struct rte_sched_port *port, int second_pass)
2137 {
2138         int exceptions;
2139
2140         /* Check if any exception flag is set */
2141         exceptions = (second_pass && port->busy_grinders == 0) ||
2142                 (port->pipe_exhaustion == 1);
2143
2144         /* Clear exception flags */
2145         port->pipe_exhaustion = 0;
2146
2147         return exceptions;
2148 }
2149
2150 int
2151 rte_sched_port_dequeue(struct rte_sched_port *port, struct rte_mbuf **pkts, uint32_t n_pkts)
2152 {
2153         uint32_t i, count;
2154
2155         port->pkts_out = pkts;
2156         port->n_pkts_out = 0;
2157
2158         rte_sched_port_time_resync(port);
2159
2160         /* Take each queue in the grinder one step further */
2161         for (i = 0, count = 0; ; i++)  {
2162                 count += grinder_handle(port, i & (RTE_SCHED_PORT_N_GRINDERS - 1));
2163                 if ((count == n_pkts) ||
2164                     rte_sched_port_exceptions(port, i >= RTE_SCHED_PORT_N_GRINDERS)) {
2165                         break;
2166                 }
2167         }
2168
2169         return count;
2170 }