-libethdev.so.3 libethdev3 #MINVER#
- DPDK_16.04@DPDK_16.04 16.04
- DPDK_2.2@DPDK_2.2 16.04
- _rte_eth_dev_callback_process@DPDK_2.2 16.04
- rte_eth_add_rx_callback@DPDK_2.2 16.04
- rte_eth_add_tx_callback@DPDK_2.2 16.04
- rte_eth_allmulticast_disable@DPDK_2.2 16.04
- rte_eth_allmulticast_enable@DPDK_2.2 16.04
- rte_eth_allmulticast_get@DPDK_2.2 16.04
- rte_eth_copy_pci_info@DPDK_2.2 16.04
- rte_eth_dev_allocate@DPDK_2.2 16.04
- rte_eth_dev_allocated@DPDK_2.2 16.04
- rte_eth_dev_attach@DPDK_2.2 16.04
- rte_eth_dev_callback_register@DPDK_2.2 16.04
- rte_eth_dev_callback_unregister@DPDK_2.2 16.04
- rte_eth_dev_close@DPDK_2.2 16.04
- rte_eth_dev_configure@DPDK_2.2 16.04
- rte_eth_dev_count@DPDK_2.2 16.04
- rte_eth_dev_default_mac_addr_set@DPDK_2.2 16.04
- rte_eth_dev_detach@DPDK_2.2 16.04
- rte_eth_dev_filter_ctrl@DPDK_2.2 16.04
- rte_eth_dev_filter_supported@DPDK_2.2 16.04
- rte_eth_dev_flow_ctrl_get@DPDK_2.2 16.04
- rte_eth_dev_flow_ctrl_set@DPDK_2.2 16.04
- rte_eth_dev_get_dcb_info@DPDK_2.2 16.04
- rte_eth_dev_get_eeprom@DPDK_2.2 16.04
- rte_eth_dev_get_eeprom_length@DPDK_2.2 16.04
- rte_eth_dev_get_mtu@DPDK_2.2 16.04
- rte_eth_dev_get_reg_info@DPDK_2.2 16.04
- rte_eth_dev_get_reg_length@DPDK_2.2 16.04
- rte_eth_dev_get_supported_ptypes@DPDK_16.04 16.04
- rte_eth_dev_get_vlan_offload@DPDK_2.2 16.04
- rte_eth_dev_info_get@DPDK_2.2 16.04
- rte_eth_dev_is_valid_port@DPDK_2.2 16.04
- rte_eth_dev_l2_tunnel_eth_type_conf@DPDK_16.04 16.04
- rte_eth_dev_l2_tunnel_offload_set@DPDK_16.04 16.04
- rte_eth_dev_mac_addr_add@DPDK_2.2 16.04
- rte_eth_dev_mac_addr_remove@DPDK_2.2 16.04
- rte_eth_dev_priority_flow_ctrl_set@DPDK_2.2 16.04
- rte_eth_dev_release_port@DPDK_2.2 16.04
- rte_eth_dev_rss_hash_conf_get@DPDK_2.2 16.04
- rte_eth_dev_rss_hash_update@DPDK_2.2 16.04
- rte_eth_dev_rss_reta_query@DPDK_2.2 16.04
- rte_eth_dev_rss_reta_update@DPDK_2.2 16.04
- rte_eth_dev_rx_intr_ctl@DPDK_2.2 16.04
- rte_eth_dev_rx_intr_ctl_q@DPDK_2.2 16.04
- rte_eth_dev_rx_intr_disable@DPDK_2.2 16.04
- rte_eth_dev_rx_intr_enable@DPDK_2.2 16.04
- rte_eth_dev_rx_queue_start@DPDK_2.2 16.04
- rte_eth_dev_rx_queue_stop@DPDK_2.2 16.04
- rte_eth_dev_set_eeprom@DPDK_2.2 16.04
- rte_eth_dev_set_link_down@DPDK_2.2 16.04
- rte_eth_dev_set_link_up@DPDK_2.2 16.04
- rte_eth_dev_set_mc_addr_list@DPDK_2.2 16.04
- rte_eth_dev_set_mtu@DPDK_2.2 16.04
- rte_eth_dev_set_rx_queue_stats_mapping@DPDK_2.2 16.04
- rte_eth_dev_set_tx_queue_stats_mapping@DPDK_2.2 16.04
- rte_eth_dev_set_vf_rx@DPDK_2.2 16.04
- rte_eth_dev_set_vf_rxmode@DPDK_2.2 16.04
- rte_eth_dev_set_vf_tx@DPDK_2.2 16.04
- rte_eth_dev_set_vf_vlan_filter@DPDK_2.2 16.04
- rte_eth_dev_set_vlan_ether_type@DPDK_2.2 16.04
- rte_eth_dev_set_vlan_offload@DPDK_2.2 16.04
- rte_eth_dev_set_vlan_pvid@DPDK_2.2 16.04
- rte_eth_dev_set_vlan_strip_on_queue@DPDK_2.2 16.04
- rte_eth_dev_socket_id@DPDK_2.2 16.04
- rte_eth_dev_start@DPDK_2.2 16.04
- rte_eth_dev_stop@DPDK_2.2 16.04
- rte_eth_dev_tx_queue_start@DPDK_2.2 16.04
- rte_eth_dev_tx_queue_stop@DPDK_2.2 16.04
- rte_eth_dev_uc_all_hash_table_set@DPDK_2.2 16.04
- rte_eth_dev_uc_hash_table_set@DPDK_2.2 16.04
- rte_eth_dev_udp_tunnel_port_add@DPDK_16.04 16.04
- rte_eth_dev_udp_tunnel_port_delete@DPDK_16.04 16.04
- rte_eth_dev_vlan_filter@DPDK_2.2 16.04
- rte_eth_devices@DPDK_2.2 16.04
- rte_eth_dma_zone_reserve@DPDK_2.2 16.04
- rte_eth_driver_register@DPDK_2.2 16.04
- rte_eth_led_off@DPDK_2.2 16.04
- rte_eth_led_on@DPDK_2.2 16.04
- rte_eth_link_get@DPDK_2.2 16.04
- rte_eth_link_get_nowait@DPDK_2.2 16.04
- rte_eth_macaddr_get@DPDK_2.2 16.04
- rte_eth_mirror_rule_reset@DPDK_2.2 16.04
- rte_eth_mirror_rule_set@DPDK_2.2 16.04
- rte_eth_promiscuous_disable@DPDK_2.2 16.04
- rte_eth_promiscuous_enable@DPDK_2.2 16.04
- rte_eth_promiscuous_get@DPDK_2.2 16.04
- rte_eth_remove_rx_callback@DPDK_2.2 16.04
- rte_eth_remove_tx_callback@DPDK_2.2 16.04
- rte_eth_rx_queue_info_get@DPDK_2.2 16.04
- rte_eth_rx_queue_setup@DPDK_2.2 16.04
- rte_eth_set_queue_rate_limit@DPDK_2.2 16.04
- rte_eth_set_vf_rate_limit@DPDK_2.2 16.04
- rte_eth_speed_bitflag@DPDK_16.04 16.04
- rte_eth_stats_get@DPDK_2.2 16.04
- rte_eth_stats_reset@DPDK_2.2 16.04
- rte_eth_timesync_adjust_time@DPDK_2.2 16.04
- rte_eth_timesync_disable@DPDK_2.2 16.04
- rte_eth_timesync_enable@DPDK_2.2 16.04
- rte_eth_timesync_read_rx_timestamp@DPDK_2.2 16.04
- rte_eth_timesync_read_time@DPDK_2.2 16.04
- rte_eth_timesync_read_tx_timestamp@DPDK_2.2 16.04
- rte_eth_timesync_write_time@DPDK_2.2 16.04
- rte_eth_tx_buffer_count_callback@DPDK_16.04 16.04
- rte_eth_tx_buffer_drop_callback@DPDK_16.04 16.04
- rte_eth_tx_buffer_init@DPDK_16.04 16.04
- rte_eth_tx_buffer_set_err_callback@DPDK_16.04 16.04
- rte_eth_tx_queue_info_get@DPDK_2.2 16.04
- rte_eth_tx_queue_setup@DPDK_2.2 16.04
- rte_eth_xstats_get@DPDK_2.2 16.04
- rte_eth_xstats_reset@DPDK_2.2 16.04
+libethdev.so.4 libethdev4 #MINVER#
+ DPDK_16.04@DPDK_16.04 16.07-rc1-1
+ DPDK_16.07@DPDK_16.07 16.07-rc1-1
+ DPDK_2.2@DPDK_2.2 16.07-rc1-1
+ _rte_eth_dev_callback_process@DPDK_2.2 16.07-rc1-1
+ rte_eth_add_first_rx_callback@DPDK_16.07 16.07-rc1-1
+ rte_eth_add_rx_callback@DPDK_2.2 16.07-rc1-1
+ rte_eth_add_tx_callback@DPDK_2.2 16.07-rc1-1
+ rte_eth_allmulticast_disable@DPDK_2.2 16.07-rc1-1
+ rte_eth_allmulticast_enable@DPDK_2.2 16.07-rc1-1
+ rte_eth_allmulticast_get@DPDK_2.2 16.07-rc1-1
+ rte_eth_copy_pci_info@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_allocate@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_allocated@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_attach@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_callback_register@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_callback_unregister@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_close@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_configure@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_count@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_default_mac_addr_set@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_detach@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_filter_ctrl@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_filter_supported@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_flow_ctrl_get@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_flow_ctrl_set@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_get_dcb_info@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_get_eeprom@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_get_eeprom_length@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_get_mtu@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_get_name_by_port@DPDK_16.07 16.07-rc1-1
+ rte_eth_dev_get_port_by_name@DPDK_16.07 16.07-rc1-1
+ rte_eth_dev_get_reg_info@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_get_reg_length@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_get_supported_ptypes@DPDK_16.04 16.07-rc1-1
+ rte_eth_dev_get_vlan_offload@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_info_get@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_is_valid_port@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_l2_tunnel_eth_type_conf@DPDK_16.04 16.07-rc1-1
+ rte_eth_dev_l2_tunnel_offload_set@DPDK_16.04 16.07-rc1-1
+ rte_eth_dev_mac_addr_add@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_mac_addr_remove@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_priority_flow_ctrl_set@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_release_port@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_rss_hash_conf_get@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_rss_hash_update@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_rss_reta_query@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_rss_reta_update@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_rx_intr_ctl@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_rx_intr_ctl_q@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_rx_intr_disable@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_rx_intr_enable@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_rx_queue_start@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_rx_queue_stop@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_set_eeprom@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_set_link_down@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_set_link_up@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_set_mc_addr_list@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_set_mtu@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_set_rx_queue_stats_mapping@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_set_tx_queue_stats_mapping@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_set_vf_rx@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_set_vf_rxmode@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_set_vf_tx@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_set_vf_vlan_filter@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_set_vlan_ether_type@DPDK_16.04 16.07-rc1-1
+ rte_eth_dev_set_vlan_offload@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_set_vlan_pvid@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_set_vlan_strip_on_queue@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_socket_id@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_start@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_stop@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_tx_queue_start@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_tx_queue_stop@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_uc_all_hash_table_set@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_uc_hash_table_set@DPDK_2.2 16.07-rc1-1
+ rte_eth_dev_udp_tunnel_port_add@DPDK_16.04 16.07-rc1-1
+ rte_eth_dev_udp_tunnel_port_delete@DPDK_16.04 16.07-rc1-1
+ rte_eth_dev_vlan_filter@DPDK_2.2 16.07-rc1-1
+ rte_eth_devices@DPDK_2.2 16.07-rc1-1
+ rte_eth_dma_zone_reserve@DPDK_2.2 16.07-rc1-1
+ rte_eth_driver_register@DPDK_2.2 16.07-rc1-1
+ rte_eth_led_off@DPDK_2.2 16.07-rc1-1
+ rte_eth_led_on@DPDK_2.2 16.07-rc1-1
+ rte_eth_link_get@DPDK_2.2 16.07-rc1-1
+ rte_eth_link_get_nowait@DPDK_2.2 16.07-rc1-1
+ rte_eth_macaddr_get@DPDK_2.2 16.07-rc1-1
+ rte_eth_mirror_rule_reset@DPDK_2.2 16.07-rc1-1
+ rte_eth_mirror_rule_set@DPDK_2.2 16.07-rc1-1
+ rte_eth_promiscuous_disable@DPDK_2.2 16.07-rc1-1
+ rte_eth_promiscuous_enable@DPDK_2.2 16.07-rc1-1
+ rte_eth_promiscuous_get@DPDK_2.2 16.07-rc1-1
+ rte_eth_remove_rx_callback@DPDK_2.2 16.07-rc1-1
+ rte_eth_remove_tx_callback@DPDK_2.2 16.07-rc1-1
+ rte_eth_rx_queue_info_get@DPDK_2.2 16.07-rc1-1
+ rte_eth_rx_queue_setup@DPDK_2.2 16.07-rc1-1
+ rte_eth_set_queue_rate_limit@DPDK_2.2 16.07-rc1-1
+ rte_eth_set_vf_rate_limit@DPDK_2.2 16.07-rc1-1
+ rte_eth_speed_bitflag@DPDK_16.04 16.07-rc1-1
+ rte_eth_stats_get@DPDK_2.2 16.07-rc1-1
+ rte_eth_stats_reset@DPDK_2.2 16.07-rc1-1
+ rte_eth_timesync_adjust_time@DPDK_2.2 16.07-rc1-1
+ rte_eth_timesync_disable@DPDK_2.2 16.07-rc1-1
+ rte_eth_timesync_enable@DPDK_2.2 16.07-rc1-1
+ rte_eth_timesync_read_rx_timestamp@DPDK_2.2 16.07-rc1-1
+ rte_eth_timesync_read_time@DPDK_2.2 16.07-rc1-1
+ rte_eth_timesync_read_tx_timestamp@DPDK_2.2 16.07-rc1-1
+ rte_eth_timesync_write_time@DPDK_2.2 16.07-rc1-1
+ rte_eth_tx_buffer_count_callback@DPDK_16.04 16.07-rc1-1
+ rte_eth_tx_buffer_drop_callback@DPDK_16.04 16.07-rc1-1
+ rte_eth_tx_buffer_init@DPDK_16.04 16.07-rc1-1
+ rte_eth_tx_buffer_set_err_callback@DPDK_16.04 16.07-rc1-1
+ rte_eth_tx_queue_info_get@DPDK_2.2 16.07-rc1-1
+ rte_eth_tx_queue_setup@DPDK_2.2 16.07-rc1-1
+ rte_eth_xstats_get@DPDK_2.2 16.07-rc1-1
+ rte_eth_xstats_get_names@DPDK_16.07 16.07-rc1-1
+ rte_eth_xstats_reset@DPDK_2.2 16.07-rc1-1
-librte_mempool.so.1 librte-mempool1 #MINVER#
- DPDK_2.0@DPDK_2.0 16.04
- rte_dom0_mempool_create@DPDK_2.0 16.04
- rte_mempool_audit@DPDK_2.0 16.04
- rte_mempool_calc_obj_size@DPDK_2.0 16.04
- rte_mempool_count@DPDK_2.0 16.04
- rte_mempool_create@DPDK_2.0 16.04
- rte_mempool_dump@DPDK_2.0 16.04
- rte_mempool_list_dump@DPDK_2.0 16.04
- rte_mempool_lookup@DPDK_2.0 16.04
- rte_mempool_obj_iter@DPDK_2.0 16.04
- rte_mempool_walk@DPDK_2.0 16.04
- rte_mempool_xmem_create@DPDK_2.0 16.04
- rte_mempool_xmem_size@DPDK_2.0 16.04
- rte_mempool_xmem_usage@DPDK_2.0 16.04
+librte_mempool.so.2 librte-mempool2 #MINVER#
+ DPDK_16.07@DPDK_16.07 16.07-rc1-1
+ DPDK_2.0@DPDK_2.0 16.07-rc1-1
+ rte_mempool_audit@DPDK_2.0 16.07-rc1-1
+ rte_mempool_avail_count@DPDK_16.07 16.07-rc1-1
+ rte_mempool_cache_create@DPDK_16.07 16.07-rc1-1
+ rte_mempool_cache_free@DPDK_16.07 16.07-rc1-1
+ rte_mempool_calc_obj_size@DPDK_2.0 16.07-rc1-1
+ rte_mempool_check_cookies@DPDK_16.07 16.07-rc1-1
+ rte_mempool_count@DPDK_2.0 16.07-rc1-1
+ rte_mempool_create@DPDK_2.0 16.07-rc1-1
+ rte_mempool_create_empty@DPDK_16.07 16.07-rc1-1
+ rte_mempool_dump@DPDK_2.0 16.07-rc1-1
+ rte_mempool_free@DPDK_16.07 16.07-rc1-1
+ rte_mempool_in_use_count@DPDK_16.07 16.07-rc1-1
+ rte_mempool_list_dump@DPDK_2.0 16.07-rc1-1
+ rte_mempool_lookup@DPDK_2.0 16.07-rc1-1
+ rte_mempool_mem_iter@DPDK_16.07 16.07-rc1-1
+ rte_mempool_obj_iter@DPDK_16.07 16.07-rc1-1
+ rte_mempool_ops_table@DPDK_16.07 16.07-rc1-1
+ rte_mempool_populate_anon@DPDK_16.07 16.07-rc1-1
+ rte_mempool_populate_default@DPDK_16.07 16.07-rc1-1
+ rte_mempool_populate_phys@DPDK_16.07 16.07-rc1-1
+ rte_mempool_populate_phys_tab@DPDK_16.07 16.07-rc1-1
+ rte_mempool_populate_virt@DPDK_16.07 16.07-rc1-1
+ rte_mempool_register_ops@DPDK_16.07 16.07-rc1-1
+ rte_mempool_set_ops_byname@DPDK_16.07 16.07-rc1-1
+ rte_mempool_walk@DPDK_2.0 16.07-rc1-1
+ rte_mempool_xmem_create@DPDK_2.0 16.07-rc1-1
+ rte_mempool_xmem_size@DPDK_2.0 16.07-rc1-1
+ rte_mempool_xmem_usage@DPDK_2.0 16.07-rc1-1
-librte_port.so.2 librte-port2 #MINVER#
- DPDK_2.0@DPDK_2.0 16.04
- DPDK_2.1@DPDK_2.1 16.04
- DPDK_2.2@DPDK_2.2 16.04
- rte_port_ethdev_reader_ops@DPDK_2.0 16.04
- rte_port_ethdev_writer_nodrop_ops@DPDK_2.1 16.04
- rte_port_ethdev_writer_ops@DPDK_2.0 16.04
- rte_port_ring_multi_reader_ops@DPDK_2.2 16.04
- rte_port_ring_multi_writer_nodrop_ops@DPDK_2.2 16.04
- rte_port_ring_multi_writer_ops@DPDK_2.2 16.04
- rte_port_ring_reader_ipv4_frag_ops@DPDK_2.0 16.04
- rte_port_ring_reader_ipv6_frag_ops@DPDK_2.1 16.04
- rte_port_ring_reader_ops@DPDK_2.0 16.04
- rte_port_ring_writer_ipv4_ras_ops@DPDK_2.0 16.04
- rte_port_ring_writer_ipv6_ras_ops@DPDK_2.1 16.04
- rte_port_ring_writer_nodrop_ops@DPDK_2.1 16.04
- rte_port_ring_writer_ops@DPDK_2.0 16.04
- rte_port_sched_reader_ops@DPDK_2.0 16.04
- rte_port_sched_writer_ops@DPDK_2.0 16.04
- rte_port_sink_ops@DPDK_2.0 16.04
- rte_port_source_ops@DPDK_2.0 16.04
+librte_port.so.3 librte-port3 #MINVER#
+ DPDK_16.07@DPDK_16.07 16.07-rc1-1
+ DPDK_2.0@DPDK_2.0 16.07-rc1-1
+ DPDK_2.1@DPDK_2.1 16.07-rc1-1
+ DPDK_2.2@DPDK_2.2 16.07-rc1-1
+ rte_port_ethdev_reader_ops@DPDK_2.0 16.07-rc1-1
+ rte_port_ethdev_writer_nodrop_ops@DPDK_2.1 16.07-rc1-1
+ rte_port_ethdev_writer_ops@DPDK_2.0 16.07-rc1-1
+ rte_port_kni_reader_ops@DPDK_16.07 16.07-rc1-1
+ rte_port_kni_writer_nodrop_ops@DPDK_16.07 16.07-rc1-1
+ rte_port_kni_writer_ops@DPDK_16.07 16.07-rc1-1
+ rte_port_ring_multi_reader_ops@DPDK_2.2 16.07-rc1-1
+ rte_port_ring_multi_writer_nodrop_ops@DPDK_2.2 16.07-rc1-1
+ rte_port_ring_multi_writer_ops@DPDK_2.2 16.07-rc1-1
+ rte_port_ring_reader_ipv4_frag_ops@DPDK_2.0 16.07-rc1-1
+ rte_port_ring_reader_ipv6_frag_ops@DPDK_2.1 16.07-rc1-1
+ rte_port_ring_reader_ops@DPDK_2.0 16.07-rc1-1
+ rte_port_ring_writer_ipv4_ras_ops@DPDK_2.0 16.07-rc1-1
+ rte_port_ring_writer_ipv6_ras_ops@DPDK_2.1 16.07-rc1-1
+ rte_port_ring_writer_nodrop_ops@DPDK_2.1 16.07-rc1-1
+ rte_port_ring_writer_ops@DPDK_2.0 16.07-rc1-1
+ rte_port_sched_reader_ops@DPDK_2.0 16.07-rc1-1
+ rte_port_sched_writer_ops@DPDK_2.0 16.07-rc1-1
+ rte_port_sink_ops@DPDK_2.0 16.07-rc1-1
+ rte_port_source_ops@DPDK_2.0 16.07-rc1-1